--- Comment #5 from chaoyingfu at gcc dot gnu dot org 2006-12-01 00:07
---
Subject: Bug 29679
Author: chaoyingfu
Date: Fri Dec 1 00:05:26 2006
New Revision: 119383
URL: http://gcc.gnu.org/viewcvs?root=gccview=revrev=119383
Log:
Merged revisions 118455-118543 via svnmerge from
svn+ssh://[EMAIL PROTECTED]/svn/gcc/trunk
r118455 | fxcoudert | 2006-11-03 03:51:09 -0800 (Fri, 03 Nov 2006) | 20 lines
PR libfortran/27895
* intrinsics/reshape_generic.c (reshape_internal): Fix so that it
works correctly for zero-sized arrays.
* m4/reshape.m4: Likewise.
* generated/reshape_r16.c: Regenerate.
* generated/reshape_c4.c: Regenerate.
* generated/reshape_i4.c: Regenerate.
* generated/reshape_c16.c: Regenerate.
* generated/reshape_r10.c: Regenerate.
* generated/reshape_r8.c: Regenerate.
* generated/reshape_c10.c: Regenerate.
* generated/reshape_c8.c: Regenerate.
* generated/reshape_i8.c: Regenerate.
* generated/reshape_i16.c: Regenerate.
* generated/reshape_r4.c: Regenerate.
* gcc/testsuite/gfortran.dg/zero_sized_1.f90: Uncomment checks
for RESHAPE.
r118458 | amylaar | 2006-11-03 06:52:19 -0800 (Fri, 03 Nov 2006) | 97 lines
gcc:
2006-11-03 Jorn Rennecke [EMAIL PROTECTED]
* config/sh/crt1.asm: Fix #ifdef indent.
2006-11-03 Jorn Rennecke [EMAIL PROTECTED]
Merged from STMicroelectronics sources:
2006-10-06 Andrew Stubbs [EMAIL PROTECTED]
* config/sh/crt1.asm (vbr_600): Add missing #if.
2006-08-03 Jorn Rennecke [EMAIL PROTECTED]
* sh.opt (mfused-madd): New option.
* sh.md (mac_media, macsf3): Make conditional on TARGET_FMAC.
2006-07-04 Andrew Stubbs [EMAIL PROTECTED]
* config/sh/crt1.asm (vbr_start): Move to new section .test.vbr.
Remove pointless handler at VBR+0.
(vbr_200, vbr_300, vbr_500): Remove pointless handler.
(vbr_600): Save and restore mach and macl, fpul and fpscr and fr0 to
fr7. Make sure the timer handler is called with the correct FPU
precision setting, according to the ABI.
2006-06-14 Jorn Rennecke [EMAIL PROTECTED]
* config/sh/sh.opt (m2a-single, m2a-single-only): Fix Condition.
* config/sh/sh.h (SUPPORT_SH2A_NOFPU): Fix condition.
(SUPPORT_SH2A_SINGLE_ONLY, SUPPORT_SH2A_SINGLE_ONLY): Likewise.
2006-06-09 Jorn Rennecke [EMAIL PROTECTED]
* sh.md (cmpgeusi_t): Change into define_insn_and_split. Accept
zero as second operand.
2006-04-28 Jorn Rennecke [EMAIL PROTECTED]
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
Fixed some bugs related to negative values, in particular -0
and overflow at -0x8000.
* config/sh/divcost-analysis: Added sh4-300 figures.
2006-04-27 Jorn Rennecke [EMAIL PROTECTED]
* config/sh/t-sh (MULTILIB_MATCHES): Add -m4-300* / -m4-340 options.
2006-04-26 Jorn Rennecke [EMAIL PROTECTED]
* config/sh/t-sh (OPT_EXTRA_PARTS): Add libgcc-4-300.a.
($(T)div_table-4-300.o, $(T)libgcc-4-300.a): New rules.
* config/sh/divtab-sh4-300.c, config/sh/lib1funcs-4-300.asm:
New files.
* config/sh/embed-elf.h (LIBGCC_SPEC): Use -lgcc-4-300 for -m4-300* /
-m4-340.
2006-04-24 Jorn Rennecke [EMAIL PROTECTED]
SH4-300 scheduling description fixes to SH4-[12]00 description:
* sh.md: New instruction types: fstore, movi8, fpscr_toggle, gp_mac,
mac_mem, mem_mac, dfp_mul, fp_cmp.
(insn_class, dfp_comp, any_fp_comp): Update.
(push_fpul, movsf_ie, fpu_switch, toggle_sz, toggle_pr): Update type.
(cmpgtsf_t, cmpeqsf_t, cmpgtsf_t_i4, cmpeqsf_t_i4): Likewise.
(muldf3_i): Likewise.
(movsi_i): Split rI08 alternative into two separate alternatives.
Update type.
(movsi_ie, movsi_i_lowpart): Likewise.
(movqi_i): Split ri alternative into two separate alternatives.
Update type.
* sh1.md (sh1_load_store, sh1_fp): Update.
* sh4.md (sh4_store, sh4_mac_gp, fp_arith, fp_double_arith): Update.
(mac_mem, sh4_fpscr_toggle): New insn_reservations.
* sh4a.md (sh4a_mov, sh4a_load, sh4a_store, sh4a_fp_arith): Update.
(sh4a_fp_double_arith): Likewise.
* sh4-300.md: New file.
* sh.c (sh_handle_option): Handle m4-300* options.
(sh_adjust_cost): Fix latency of auto-increments.
Handle SH4-300 differently than other SH4s. Check for new insn
types.
* sh.h (OVERRIDE_OPTIONS): Initilize sh_branch_cost if it has not
been set by an option.
* sh.opt (m4-300, m4-100-nofpu, m4-200-nofpu): New options.
(m4-300-nofpu, -m4-340, m4-300-single, m4-300-single-only):
