[Bug middle-end/68134] [6 Regression] float64x1_t comparison ICE on aarch64-none-elf
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68134 --- Comment #5 from Ilya Enkovich --- Author: ienkovich Date: Tue Nov 17 13:22:40 2015 New Revision: 230463 URL: https://gcc.gnu.org/viewcvs?rev=230463=gcc=rev Log: gcc/ PR middle-end/68134 * targhooks.c (default_get_mask_mode): Filter out scalar modes returned by mode_for_vector. gcc/testsuite/ PR middle-end/68134 * gcc.dg/pr68134.c: New test. Added: trunk/gcc/testsuite/gcc.dg/pr68134.c Modified: trunk/gcc/ChangeLog trunk/gcc/targhooks.c trunk/gcc/testsuite/ChangeLog
[Bug middle-end/68134] [6 Regression] float64x1_t comparison ICE on aarch64-none-elf
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68134 Ilya Enkovich changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|--- |FIXED --- Comment #6 from Ilya Enkovich --- Fixed
[Bug middle-end/68134] [6 Regression] float64x1_t comparison ICE on aarch64-none-elf
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68134 Ilya Enkovich changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned at gcc dot gnu.org |ienkovich at gcc dot gnu.org --- Comment #4 from Ilya Enkovich --- Seems the problem is that we have V1DF mode but don't have V1DI mode. It causes mode_for_vector to return DI instead of V1DI which makes vector lowering pass think it is a scalar statements which doesn't need lowering. This patch should help: diff --git a/gcc/targhooks.c b/gcc/targhooks.c index c34b4e9..66d983b 100644 --- a/gcc/targhooks.c +++ b/gcc/targhooks.c @@ -1093,8 +1093,8 @@ default_get_mask_mode (unsigned nunits, unsigned vector_size) gcc_assert (elem_size * nunits == vector_size); vector_mode = mode_for_vector (elem_mode, nunits); - if (VECTOR_MODE_P (vector_mode) - && !targetm.vector_mode_supported_p (vector_mode)) + if (!VECTOR_MODE_P (vector_mode) + || !targetm.vector_mode_supported_p (vector_mode)) vector_mode = BLKmode; return vector_mode;
[Bug middle-end/68134] [6 Regression] float64x1_t comparison ICE on aarch64-none-elf
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68134 Ramana Radhakrishnan changed: What|Removed |Added CC||ienkovich at gcc dot gnu.org, ||ramana at gcc dot gnu.org --- Comment #3 from Ramana Radhakrishnan --- Add author to CC.
[Bug middle-end/68134] [6 Regression] float64x1_t comparison ICE on aarch64-none-elf
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68134 --- Comment #2 from James Greenhalgh --- Created attachment 36608 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=36608=edit testcasem, no arm_neon.h dependency Second testcase stripping the arm_neon.h stuff and using only GCC vector extensions. I couldn't get this to fail on s390 or i386 (two other targets which V1DF mode stuff in their back-end).
