[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-10-21 Thread jakub at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

--- Comment #11 from Jakub Jelinek  ---
Author: jakub
Date: Mon Oct 21 11:42:37 2019
New Revision: 277251

URL: https://gcc.gnu.org/viewcvs?rev=277251=gcc=rev
Log:
Backported from mainline
2019-09-11  Jakub Jelinek  

PR rtl-optimization/89435
PR rtl-optimization/89795
PR rtl-optimization/91720
* gcc.dg/pr89435.c: New test.
* gcc.dg/pr89795.c: New test.
* gcc.dg/pr91720.c: New test.

Added:
branches/gcc-9-branch/gcc/testsuite/gcc.dg/pr89435.c
branches/gcc-9-branch/gcc/testsuite/gcc.dg/pr89795.c
branches/gcc-9-branch/gcc/testsuite/gcc.dg/pr91720.c
Modified:
branches/gcc-9-branch/gcc/testsuite/ChangeLog

[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-09-11 Thread jakub at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

--- Comment #10 from Jakub Jelinek  ---
Author: jakub
Date: Wed Sep 11 11:37:39 2019
New Revision: 275642

URL: https://gcc.gnu.org/viewcvs?rev=275642=gcc=rev
Log:
PR rtl-optimization/89435
PR rtl-optimization/89795
PR rtl-optimization/91720
* gcc.dg/pr89435.c: New test.
* gcc.dg/pr89795.c: New test.
* gcc.dg/pr91720.c: New test.

Added:
trunk/gcc/testsuite/gcc.dg/pr89435.c
trunk/gcc/testsuite/gcc.dg/pr89795.c
trunk/gcc/testsuite/gcc.dg/pr91720.c
Modified:
trunk/gcc/testsuite/ChangeLog

[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-03-28 Thread ebotcazou at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

Eric Botcazou  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |DUPLICATE

--- Comment #9 from Eric Botcazou  ---
It's exactly the same underlying issue: the combiner first eliminates an AND
(or an equivalent ZERO_EXTEND) between 2 instructions as redundant, which is OK
in isolation, but IRA (combine_and_move_insns) later combines again the same 2
instructions without using the WORD_REGISTER_OPERATIONS semantics used in the
combiner.

*** This bug has been marked as a duplicate of bug 89795 ***

[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-03-28 Thread ebotcazou at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

Eric Botcazou  changed:

   What|Removed |Added

   Priority|P1  |P3

--- Comment #8 from Eric Botcazou  ---
This is ARMv4 though.

[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-03-27 Thread law at redhat dot com 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

Jeffrey A. Law  changed:

   What|Removed |Added

   Priority|P3  |P1
 CC||law at redhat dot com

[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-03-25 Thread ebotcazou at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

--- Comment #7 from Eric Botcazou  ---
*** Bug 89815 has been marked as a duplicate of this bug. ***

[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-02-21 Thread ebotcazou at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

Eric Botcazou  changed:

   What|Removed |Added

 Status|NEW |ASSIGNED
   Assignee|unassigned at gcc dot gnu.org  |ebotcazou at gcc dot 
gnu.org

[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-02-21 Thread jakub at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

--- Comment #6 from Jakub Jelinek  ---
And sure, if you could look at this (or somebody from ARM otherwise), it would
be highly appreciated.

[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-02-21 Thread jakub at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

--- Comment #5 from Jakub Jelinek  ---
Started with r242326.  Since that version, we have before ira:
(insn 28 27 36 2 (set (reg:SI 141)
(const_int 255 [0xff])) "pr89435.c":9 182 {*arm_movsi_insn}
 (nil))
...
(insn 42 36 43 2 (set (reg:QI 125 [ _18 ])
(subreg:QI (reg:SI 141) 0)) "pr89435.c":9 192 {*arm_movqi_insn}
 (expr_list:REG_DEAD (reg:SI 141)
(nil)))
...
(insn 78 77 79 6 (set (reg:SI 124 [ _15 ])
(plus:SI (reg:SI 162)
(subreg:SI (reg:QI 125 [ _18 ]) 0))) "pr89435.c":11 4 {*arm_addsi3}
 (expr_list:REG_DEAD (reg:QI 125 [ _18 ])
(expr_list:REG_DEAD (reg:SI 162)
(nil
and starting with ira:
(insn 42 36 43 2 (set (reg:QI 125 [ _18 ])
(const_int -1 [0x])) "pr89435.c":9 192
{*arm_movqi_insn}
 (nil))
...
(insn 78 77 79 6 (set (reg:SI 124 [ _15 ])
(plus:SI (reg:SI 162)
(subreg:SI (reg:QI 125 [ _18 ]) 0))) "pr89435.c":11 4 {*arm_addsi3}
 (expr_list:REG_DEAD (reg:SI 162)
(expr_list:REG_DEAD (reg:QI 125 [ _18 ])
(nil

ARM has:
#define WORD_REGISTER_OPERATIONS 1
#define LOAD_EXTEND_OP(MODE)\
  (TARGET_THUMB ? ZERO_EXTEND : \
   ((arm_arch4 || (MODE) == QImode) ? ZERO_EXTEND   \
: ((BYTES_BIG_ENDIAN && (MODE) == HImode) ? SIGN_EXTEND : UNKNOWN)))

Does that mean that (set (reg:QI 125) (const_int -1)) instruction should
actually set the register to 0xff rather than 0x?

[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-02-21 Thread ebotcazou at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

Eric Botcazou  changed:

   What|Removed |Added

 CC||ebotcazou at gcc dot gnu.org

--- Comment #4 from Eric Botcazou  ---
> The paradoxical register in the insn 78 means the upper bits are
> undefined, but we really use the upper bits later on (fully 32-bit
> comparison).  Either it should have propagated the constant down, or it
> can't assume anything about the paradoxical subreg bits (if they must not be
> ignored), because the RA can stick the different pseudos into different
> registers, rather than setting a single hw register to 0xff and then having
> the upper bits always zero.

The RA (reload/LRA) has special provisions for WORD_REGISTER_OPERATIONS targets
though to make sure that only full words are reloaded, so that the combiner can
make such assumptions.  I can have a closer look at the PR if you want.

[Bug rtl-optimization/89435] [7/8/9 Regression] wrong code with -O1 -march=armv4 -fno-forward-propagate with __builtin_sub_overflow()

2019-02-21 Thread jakub at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89435

Jakub Jelinek  changed:

   What|Removed |Added

   Target Milestone|--- |7.5
Summary|wrong code with -O1 |[7/8/9 Regression] wrong
   |-march=armv4|code with -O1 -march=armv4
   |-fno-forward-propagate with |-fno-forward-propagate with
   |__builtin_sub_overflow()|__builtin_sub_overflow()

--- Comment #3 from Jakub Jelinek  ---
Bisecting now, from skimming of what combiner does r242085 was still ok and
r242439 already not.  But don't have a setup where can I actually run
-march=armv4 code.