[Bug target/100693] PPC: missing 64-bit addg6s

2022-03-04 Thread willschm at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100693

Will Schmidt  changed:

   What|Removed |Added

 CC||willschm at gcc dot gnu.org

--- Comment #2 from Will Schmidt  ---
(In reply to Segher Boessenkool from comment #1)
> Confirmed.  The define_insn for it is for SImode only as well.

I see the SImode for the define as mentioned

(define_insn "addg6s"
  [(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "register_operand" "r")]
   UNSPEC_ADDG6S))]
  "TARGET_POPCNTD"
  "addg6s %0,%1,%2"
  [(set_attr "type" "integer")])


But.. a simple testcase with unsigned long long parms builds ok.   (both gcc 11
and older gcc 9).  


unsigned long long bcd_arith_longlong (unsigned long long a, unsigned long long
b)
{
return __builtin_addg6s (a, b); 
}

Expand shows.. this instruction is using a subset, erm, subreg of the inputs. 
Is this expected behavior?

(insn 11 10 12 2 (set (reg:SI 128)
(unspec:SI [
(subreg/s/v:SI (reg:DI 121 [ _1 ]) 0)
(subreg/s/v:SI (reg:DI 122 [ _2 ]) 0)
] UNSPEC_ADDG6S)) "./addg6s.c":11:16 -1
 (nil))

[Bug target/100693] PPC: missing 64-bit addg6s

2021-05-20 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100693

Segher Boessenkool  changed:

   What|Removed |Added

 Ever confirmed|0   |1
   Last reconfirmed||2021-05-20
 Status|UNCONFIRMED |NEW

[Bug target/100693] PPC: missing 64-bit addg6s

2021-05-20 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100693

--- Comment #1 from Segher Boessenkool  ---
Confirmed.  The define_insn for it is for SImode only as well.