[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 Peter Bergner changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED|RESOLVED --- Comment #28 from Peter Bergner --- Fixed everywhere.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #27 from GCC Commits --- The releases/gcc-11 branch has been updated by Peter Bergner : https://gcc.gnu.org/g:f8f02fd0bfeeb733a044a120b394eeac48de318a commit r11-11413-gf8f02fd0bfeeb733a044a120b394eeac48de318a Author: Peter Bergner Date: Thu May 2 18:07:05 2024 -0500 rs6000: Add OPTION_MASK_POWER8 [PR101865] The bug in PR101865 is the _ARCH_PWR8 predefine macro is conditional upon TARGET_DIRECT_MOVE, which can be false for some -mcpu=power8 compiles if the -mno-altivec or -mno-vsx options are used. The solution here is to create a new OPTION_MASK_POWER8 mask that is true for -mcpu=power8, regardless of Altivec or VSX enablement. Unfortunately, the only way to create an OPTION_MASK_* mask is to create a new option, which we have done here, but marked it as WarnRemoved since we do not want users using it. For stage1, we will look into how we can create ISA mask flags for use in the compiler without the need for explicit options. 2024-04-12 Will Schmidt Peter Bergner gcc/ PR target/101865 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Use OPTION_MASK_POWER8. * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER8. (ISA_2_7_MASKS_SERVER): Likewise. * config/rs6000/rs6000.c (rs6000_option_override_internal): Update comment. Use OPTION_MASK_POWER8 and TARGET_POWER8. * config/rs6000/rs6000.h (TARGET_SYNC_HI_QI): Use TARGET_POWER8. * config/rs6000/rs6000.md (define_attr "isa"): Add p8. (define_attr "enabled"): Handle it. (define_insn "prefetch"): Use TARGET_POWER8. * config/rs6000/rs6000.opt (mpower8-internal): New. gcc/testsuite/ PR target/101865 * gcc.target/powerpc/predefine-p7-novsx.c: New test. * gcc.target/powerpc/predefine-p8-noaltivec-novsx.c: New test. * gcc.target/powerpc/predefine-p8-noaltivec.c: New test. * gcc.target/powerpc/predefine-p8-novsx.c: New test. * gcc.target/powerpc/predefine-p8-pragma-vsx.c: New test. * gcc.target/powerpc/predefine-p9-novsx.c: New test. (cherry picked from commit aa57af93ba22865be747f926e4e5f219e7f8758a)
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #26 from GCC Commits --- The releases/gcc-11 branch has been updated by Peter Bergner : https://gcc.gnu.org/g:26d48b6d3e2d07583f25f0769d0c005864760aee commit r11-11412-g26d48b6d3e2d07583f25f0769d0c005864760aee Author: Peter Bergner Date: Tue Apr 9 15:24:39 2024 -0500 rs6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865] This is a cleanup patch in preparation to fixing the real bug in PR101865. TARGET_DIRECT_MOVE is redundant with TARGET_P8_VECTOR, so alias it to that. Also replace all usages of OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR and delete the now dead mask. 2024-04-09 Peter Bergner gcc/ PR target/101865 * config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define. * config/rs6000/rs6000.c (rs6000_option_override_internal): Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete redundant OPTION_MASK_DIRECT_MOVE usage. Delete TARGET_DIRECT_MOVE dead code. (rs6000_opt_masks): Neuter the "direct-move" option. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete useless comment. * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete OPTION_MASK_DIRECT_MOVE. (OTHER_P8_VECTOR_MASKS): Likewise. (POWERPC_MASKS): Likewise. * config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var. (cherry picked from commit 7924e352523b37155ed9d76dc426701de9d11a22)
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #25 from GCC Commits --- The releases/gcc-12 branch has been updated by Peter Bergner : https://gcc.gnu.org/g:04ca18ff5e2592ac88a5b72248332f519a17184b commit r12-10409-g04ca18ff5e2592ac88a5b72248332f519a17184b Author: Will Schmidt Date: Fri Apr 12 14:55:16 2024 -0500 rs6000: Add OPTION_MASK_POWER8 [PR101865] The bug in PR101865 is the _ARCH_PWR8 predefine macro is conditional upon TARGET_DIRECT_MOVE, which can be false for some -mcpu=power8 compiles if the -mno-altivec or -mno-vsx options are used. The solution here is to create a new OPTION_MASK_POWER8 mask that is true for -mcpu=power8, regardless of Altivec or VSX enablement. Unfortunately, the only way to create an OPTION_MASK_* mask is to create a new option, which we have done here, but marked it as WarnRemoved since we do not want users using it. For stage1, we will look into how we can create ISA mask flags for use in the compiler without the need for explicit options. 2024-04-12 Will Schmidt Peter Bergner gcc/ PR target/101865 * config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use TARGET_POWER8. * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use OPTION_MASK_POWER8. * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER8. (ISA_2_7_MASKS_SERVER): Likewise. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Update comment. Use OPTION_MASK_POWER8 and TARGET_POWER8. * config/rs6000/rs6000.h (TARGET_SYNC_HI_QI): Use TARGET_POWER8. * config/rs6000/rs6000.md (define_attr "isa"): Add p8. (define_attr "enabled"): Handle it. (define_insn "prefetch"): Use TARGET_POWER8. * config/rs6000/rs6000.opt (mpower8-internal): New. gcc/testsuite/ PR target/101865 * gcc.target/powerpc/predefine-p7-novsx.c: New test. * gcc.target/powerpc/predefine-p8-noaltivec-novsx.c: New test. * gcc.target/powerpc/predefine-p8-noaltivec.c: New test. * gcc.target/powerpc/predefine-p8-novsx.c: New test. * gcc.target/powerpc/predefine-p8-pragma-vsx.c: New test. * gcc.target/powerpc/predefine-p9-novsx.c: New test. (cherry picked from commit aa57af93ba22865be747f926e4e5f219e7f8758a)
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #24 from GCC Commits --- The releases/gcc-12 branch has been updated by Peter Bergner : https://gcc.gnu.org/g:135402288a1b1b082d2e71ff2ee5c63b7dafed9f commit r12-10408-g135402288a1b1b082d2e71ff2ee5c63b7dafed9f Author: Peter Bergner Date: Tue Apr 9 15:24:39 2024 -0500 rs6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865] This is a cleanup patch in preparation to fixing the real bug in PR101865. TARGET_DIRECT_MOVE is redundant with TARGET_P8_VECTOR, so alias it to that. Also replace all usages of OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR and delete the now dead mask. 2024-04-09 Peter Bergner gcc/ PR target/101865 * config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete redundant OPTION_MASK_DIRECT_MOVE usage. Delete TARGET_DIRECT_MOVE dead code. (rs6000_opt_masks): Neuter the "direct-move" option. * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete useless comment. * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete OPTION_MASK_DIRECT_MOVE. (OTHER_P8_VECTOR_MASKS): Likewise. (POWERPC_MASKS): Likewise. * config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var. (cherry picked from commit 7924e352523b37155ed9d76dc426701de9d11a22)
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #23 from GCC Commits --- The releases/gcc-13 branch has been updated by Peter Bergner : https://gcc.gnu.org/g:0ae9252f7b52151209b36d8a1cefc49f1b23fa46 commit r13-8673-g0ae9252f7b52151209b36d8a1cefc49f1b23fa46 Author: Will Schmidt Date: Fri Apr 12 14:55:16 2024 -0500 rs6000: Add OPTION_MASK_POWER8 [PR101865] The bug in PR101865 is the _ARCH_PWR8 predefine macro is conditional upon TARGET_DIRECT_MOVE, which can be false for some -mcpu=power8 compiles if the -mno-altivec or -mno-vsx options are used. The solution here is to create a new OPTION_MASK_POWER8 mask that is true for -mcpu=power8, regardless of Altivec or VSX enablement. Unfortunately, the only way to create an OPTION_MASK_* mask is to create a new option, which we have done here, but marked it as WarnRemoved since we do not want users using it. For stage1, we will look into how we can create ISA mask flags for use in the compiler without the need for explicit options. 2024-04-12 Will Schmidt Peter Bergner gcc/ PR target/101865 * config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use TARGET_POWER8. * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use OPTION_MASK_POWER8. * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER8. (ISA_2_7_MASKS_SERVER): Likewise. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Update comment. Use OPTION_MASK_POWER8 and TARGET_POWER8. * config/rs6000/rs6000.h (TARGET_SYNC_HI_QI): Use TARGET_POWER8. * config/rs6000/rs6000.md (define_attr "isa"): Add p8. (define_attr "enabled"): Handle it. (define_insn "prefetch"): Use TARGET_POWER8. * config/rs6000/rs6000.opt (mpower8-internal): New. gcc/testsuite/ PR target/101865 * gcc.target/powerpc/predefine-p7-novsx.c: New test. * gcc.target/powerpc/predefine-p8-noaltivec-novsx.c: New test. * gcc.target/powerpc/predefine-p8-noaltivec.c: New test. * gcc.target/powerpc/predefine-p8-novsx.c: New test. * gcc.target/powerpc/predefine-p8-pragma-vsx.c: New test. * gcc.target/powerpc/predefine-p9-novsx.c: New test. (cherry picked from commit aa57af93ba22865be747f926e4e5f219e7f8758a)
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #22 from GCC Commits --- The releases/gcc-13 branch has been updated by Peter Bergner : https://gcc.gnu.org/g:d42105742841e73ca867b6da0c5ca6ad4d86fed6 commit r13-8672-gd42105742841e73ca867b6da0c5ca6ad4d86fed6 Author: Peter Bergner Date: Tue Apr 9 15:24:39 2024 -0500 rs6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865] This is a cleanup patch in preparation to fixing the real bug in PR101865. TARGET_DIRECT_MOVE is redundant with TARGET_P8_VECTOR, so alias it to that. Also replace all usages of OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR and delete the now dead mask. 2024-04-09 Peter Bergner gcc/ PR target/101865 * config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete redundant OPTION_MASK_DIRECT_MOVE usage. Delete TARGET_DIRECT_MOVE dead code. (rs6000_opt_masks): Neuter the "direct-move" option. * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete useless comment. * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete OPTION_MASK_DIRECT_MOVE. (OTHER_P8_VECTOR_MASKS): Likewise. (POWERPC_MASKS): Likewise. * config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var. (cherry picked from commit 7924e352523b37155ed9d76dc426701de9d11a22)
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #21 from Peter Bergner --- Fixed on trunk. I'll let it burn-in there for a bit before backporting to the release branches.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #20 from GCC Commits --- The master branch has been updated by Peter Bergner : https://gcc.gnu.org/g:aa57af93ba22865be747f926e4e5f219e7f8758a commit r14-9949-gaa57af93ba22865be747f926e4e5f219e7f8758a Author: Will Schmidt Date: Fri Apr 12 14:55:16 2024 -0500 rs6000: Add OPTION_MASK_POWER8 [PR101865] The bug in PR101865 is the _ARCH_PWR8 predefine macro is conditional upon TARGET_DIRECT_MOVE, which can be false for some -mcpu=power8 compiles if the -mno-altivec or -mno-vsx options are used. The solution here is to create a new OPTION_MASK_POWER8 mask that is true for -mcpu=power8, regardless of Altivec or VSX enablement. Unfortunately, the only way to create an OPTION_MASK_* mask is to create a new option, which we have done here, but marked it as WarnRemoved since we do not want users using it. For stage1, we will look into how we can create ISA mask flags for use in the compiler without the need for explicit options. 2024-04-12 Will Schmidt Peter Bergner gcc/ PR target/101865 * config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use TARGET_POWER8. * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use OPTION_MASK_POWER8. * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER8. (ISA_2_7_MASKS_SERVER): Likewise. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Update comment. Use OPTION_MASK_POWER8 and TARGET_POWER8. * config/rs6000/rs6000.h (TARGET_SYNC_HI_QI): Use TARGET_POWER8. * config/rs6000/rs6000.md (define_attr "isa"): Add p8. (define_attr "enabled"): Handle it. (define_insn "prefetch"): Use TARGET_POWER8. * config/rs6000/rs6000.opt (mpower8-internal): New. gcc/testsuite/ PR target/101865 * gcc.target/powerpc/predefine-p7-novsx.c: New test. * gcc.target/powerpc/predefine-p8-noaltivec-novsx.c: New test. * gcc.target/powerpc/predefine-p8-noaltivec.c: New test. * gcc.target/powerpc/predefine-p8-novsx.c: New test. * gcc.target/powerpc/predefine-p8-pragma-vsx.c: New test. * gcc.target/powerpc/predefine-p9-novsx.c: New test.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 Peter Bergner changed: What|Removed |Added URL|https://gcc.gnu.org/piperma |https://gcc.gnu.org/piperma |il/gcc-patches/2022-Septemb |il/gcc-patches/2024-April/6 |er/601825.html |49329.html --- Comment #19 from Peter Bergner --- New patch submitted as an update to Will's patch.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #18 from GCC Commits --- The master branch has been updated by Peter Bergner : https://gcc.gnu.org/g:7924e352523b37155ed9d76dc426701de9d11a22 commit r14-9884-g7924e352523b37155ed9d76dc426701de9d11a22 Author: Peter Bergner Date: Tue Apr 9 15:24:39 2024 -0500 rs6000: Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR [PR101865] This is a cleanup patch in preparation to fixing the real bug in PR101865. TARGET_DIRECT_MOVE is redundant with TARGET_P8_VECTOR, so alias it to that. Also replace all usages of OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR and delete the now dead mask. 2024-04-09 Peter Bergner gcc/ PR target/101865 * config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete redundant OPTION_MASK_DIRECT_MOVE usage. Delete TARGET_DIRECT_MOVE dead code. (rs6000_opt_masks): Neuter the "direct-move" option. * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Replace OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete useless comment. * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete OPTION_MASK_DIRECT_MOVE. (OTHER_VSX_VECTOR_MASKS): Likewise. (POWERPC_MASKS): Likewise. * config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 Peter Bergner changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|willschm at gcc dot gnu.org|bergner at gcc dot gnu.org URL||https://gcc.gnu.org/piperma ||il/gcc-patches/2022-Septemb ||er/601825.html --- Comment #17 from Peter Bergner --- I'm working on updating the patch Will submitted to take into consideration the patch reviews plus trunk changes since it was submitted. Mine now.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #16 from Segher Boessenkool --- (In reply to wschmidt from comment #14) > I disagree with that. You should use __VSX__ && _ARCH_PWR9 to check for > P9 vector support, etc. The __POWERn_VECTOR__ things really are not > great and I wish they had never been added. +1 That we have corresponding TARGET_* macros internal to the backend is one thing. Also not great for the same reasons, but those can be useful shorthand maybe. But externally there should just be one authorative source of information, and ideally there will be no N other macros that confuse the user, or even confuse the user into thinking they are good to use.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #15 from Segher Boessenkool --- (In reply to HaoChen Gui from comment #9) > For this example, let's suppose that we set mcpu=power8 and mno-vsx in the > command line. Thus, _ARCH_PWR8 should be defined as mcpu=power8. But if the > Power8-specific codes contain VSX codes, could the asm be executed? I think > we just use the macro _ARCH_PWR8 here to guard which instructions are > available. Yes, it can be executed just fine. The only thing the compiler -mno-vsx flag does is make the compiler not generate any code that uses the VSRs (or any VSX insns). Whether the program tries to use VSX resources by itself is up to it. The CPU certainly does not think it does not have those insns. The kernel will not think it does not, either. Things will just work, by default anyway.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #14 from wschmidt at linux dot ibm.com --- On 8/31/21 11:09 AM, bergner at gcc dot gnu.org wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 > > --- Comment #13 from Peter Bergner --- > (In reply to Tulio Magno Quites Machado Filho from comment #12) >> There is a chance, that my previous comment is wrong with regards the >> generation of VSX instructions for Power8. >> >> I don't know what the second command means: >> >> $ gcc-11 -mcpu=power10 -dM -E - < /dev/null | grep -E 'VECTOR|VSX|ALTIVEC' >> #define __VSX__ 1 >> #define __ALTIVEC__ 1 >> #define __POWER9_VECTOR__ 1 >> #define __APPLE_ALTIVEC__ 1 >> #define __POWER8_VECTOR__ 1 >> $ gcc-11 -mcpu=power10 -mno-power8-vector -dM -E - < /dev/null | grep -E >> 'VECTOR|VSX|ALTIVEC' >> #define __VSX__ 1 >> #define __ALTIVEC__ 1 >> #define __APPLE_ALTIVEC__ 1 > __VSX__ doesn't mean all of VSX is enabled. IIRC, __VSX__ is the macro you > would use to see whether you have POWER7 VSX support. For POWER8's VSX > support, you'd use __POWER8_VECTOR__, etc. So in your last compile, you > disabled vector support from POWER8 onwards, but that leaves vector support > from POWER7 and earlier, ie, __VSX__ and __ALTIVEC__. If you had used > -mno-vsx, you'd still have __ALTIVEC__ and __APPLE_ALTIVEC__ defined. > Finally, > if you have used -mno-altivec, then you would have disabled all vector > support. > I disagree with that. You should use __VSX__ && _ARCH_PWR9 to check for P9 vector support, etc. The __POWERn_VECTOR__ things really are not great and I wish they had never been added.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #13 from Peter Bergner --- (In reply to Tulio Magno Quites Machado Filho from comment #12) > There is a chance, that my previous comment is wrong with regards the > generation of VSX instructions for Power8. > > I don't know what the second command means: > > $ gcc-11 -mcpu=power10 -dM -E - < /dev/null | grep -E 'VECTOR|VSX|ALTIVEC' > #define __VSX__ 1 > #define __ALTIVEC__ 1 > #define __POWER9_VECTOR__ 1 > #define __APPLE_ALTIVEC__ 1 > #define __POWER8_VECTOR__ 1 > $ gcc-11 -mcpu=power10 -mno-power8-vector -dM -E - < /dev/null | grep -E > 'VECTOR|VSX|ALTIVEC' > #define __VSX__ 1 > #define __ALTIVEC__ 1 > #define __APPLE_ALTIVEC__ 1 __VSX__ doesn't mean all of VSX is enabled. IIRC, __VSX__ is the macro you would use to see whether you have POWER7 VSX support. For POWER8's VSX support, you'd use __POWER8_VECTOR__, etc. So in your last compile, you disabled vector support from POWER8 onwards, but that leaves vector support from POWER7 and earlier, ie, __VSX__ and __ALTIVEC__. If you had used -mno-vsx, you'd still have __ALTIVEC__ and __APPLE_ALTIVEC__ defined. Finally, if you have used -mno-altivec, then you would have disabled all vector support.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #12 from Tulio Magno Quites Machado Filho --- There is a chance, that my previous comment is wrong with regards the generation of VSX instructions for Power8. I don't know what the second command means: $ gcc-11 -mcpu=power10 -dM -E - < /dev/null | grep -E 'VECTOR|VSX|ALTIVEC' #define __VSX__ 1 #define __ALTIVEC__ 1 #define __POWER9_VECTOR__ 1 #define __APPLE_ALTIVEC__ 1 #define __POWER8_VECTOR__ 1 $ gcc-11 -mcpu=power10 -mno-power8-vector -dM -E - < /dev/null | grep -E 'VECTOR|VSX|ALTIVEC' #define __VSX__ 1 #define __ALTIVEC__ 1 #define __APPLE_ALTIVEC__ 1
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #11 from Bill Schmidt --- Thanks, Tulio, exactly right.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #10 from Tulio Magno Quites Machado Filho --- (In reply to HaoChen Gui from comment #9) > For this example, let's suppose that we set mcpu=power8 and mno-vsx in the > command line. Thus, _ARCH_PWR8 should be defined as mcpu=power8. But if the > Power8-specific codes contain VSX codes, could the asm be executed? These macros should only be used to indicate if a code should be generated. In my opinion, in order to generate a VSX instruction available on POWER8, it would be required to test for both _ARCH_PWR8 and __VSX__. For tests at execution time, it's required to validate what the kernel supports, e.g. using __builtin_cpu_supports().
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #9 from HaoChen Gui --- (In reply to Tulio Magno Quites Machado Filho from comment #7) > (In reply to HaoChen Gui from comment #6) > > Does _ARCH_PWR8 impact anything during the compiling? > > I can answer this question from an user point of view. It's used in many > projects to indicate if the target processor supports certain features, e.g. > > #ifdef _ARCH_PWR8 > asm (...); /* Power8-specific code. */ > #else > /* Generic implementation. */ > ... > #endif For this example, let's suppose that we set mcpu=power8 and mno-vsx in the command line. Thus, _ARCH_PWR8 should be defined as mcpu=power8. But if the Power8-specific codes contain VSX codes, could the asm be executed? I think we just use the macro _ARCH_PWR8 here to guard which instructions are available.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #8 from Segher Boessenkool --- (In reply to HaoChen Gui from comment #6) > (In reply to Segher Boessenkool from comment #5) > > (In reply to HaoChen Gui from comment #4) > > > I wonder if it's a Power8 architecture when those 6 options are all > > > disabled. Or it is regressed to Power7? The "_ARCH_PWR8" represents the > > > hardware architecture or the ISA it can be taken? > > > > It says what version of the ISA is effective. It should correspond to the > > -mcpu= used. > > > > Even if it would be possible to use -mcpu=power8 and then other command line > > flags that set everything back to it being just like Power7 (architecturally > > that is, ignoring scheduling etc.), we should still define _ARCH_PWR8. > > Thanks for your comments. If it's architecturally Power7, why we still need > to define _ARCH_PWR8. Does _ARCH_PWR8 impact anything during the compiling? > Could we just use mcpu instead? Seems _ARCH_PWR8 only affects instruction > selection right now. No, it is *not* architecturally a p7. A p8 is a p8, whether you manage to disable everything that makes it differ from a p7 or not. The _ARCH_PWRn predefines are made by the compiler based on the -mcpu= flag it is provided, so that user code can change what it does if it wants, as Tulio says. The define is not used by the compiler itself, it has more direct ways of getting this info (TARGET_* macros for example).
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #7 from Tulio Magno Quites Machado Filho --- (In reply to HaoChen Gui from comment #6) > Does _ARCH_PWR8 impact anything during the compiling? I can answer this question from an user point of view. It's used in many projects to indicate if the target processor supports certain features, e.g. #ifdef _ARCH_PWR8 asm (...); /* Power8-specific code. */ #else /* Generic implementation. */ ... #endif
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #6 from HaoChen Gui --- (In reply to Segher Boessenkool from comment #5) > (In reply to HaoChen Gui from comment #4) > > I wonder if it's a Power8 architecture when those 6 options are all > > disabled. Or it is regressed to Power7? The "_ARCH_PWR8" represents the > > hardware architecture or the ISA it can be taken? > > It says what version of the ISA is effective. It should correspond to the > -mcpu= used. > > Even if it would be possible to use -mcpu=power8 and then other command line > flags that set everything back to it being just like Power7 (architecturally > that is, ignoring scheduling etc.), we should still define _ARCH_PWR8. Thanks for your comments. If it's architecturally Power7, why we still need to define _ARCH_PWR8. Does _ARCH_PWR8 impact anything during the compiling? Could we just use mcpu instead? Seems _ARCH_PWR8 only affects instruction selection right now.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #5 from Segher Boessenkool --- (In reply to HaoChen Gui from comment #4) > I wonder if it's a Power8 architecture when those 6 options are all > disabled. Or it is regressed to Power7? The "_ARCH_PWR8" represents the > hardware architecture or the ISA it can be taken? It says what version of the ISA is effective. It should correspond to the -mcpu= used. Even if it would be possible to use -mcpu=power8 and then other command line flags that set everything back to it being just like Power7 (architecturally that is, ignoring scheduling etc.), we should still define _ARCH_PWR8.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865
--- Comment #4 from HaoChen Gui ---
Codes in rs6000-cpus.def,
#define ISA_2_7_MASKS_SERVER(ISA_2_6_MASKS_SERVER \
| OPTION_MASK_P8_VECTOR\
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DIRECT_MOVE \
| OPTION_MASK_EFFICIENT_UNALIGNED_VSX \
| OPTION_MASK_QUAD_MEMORY \
| OPTION_MASK_QUAD_MEMORY_ATOMIC)
RS6000_CPU ("power7", PROCESSOR_POWER7, MASK_POWERPC64 | ISA_2_6_MASKS_SERVER)
RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER
| OPTION_MASK_HTM)
I wonder if it's a Power8 architecture when those 6 options are all disabled.
Or it is regressed to Power7? The "_ARCH_PWR8" represents the hardware
architecture or the ISA it can be taken?
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #3 from Segher Boessenkool --- The current code reads if ((flags & OPTION_MASK_DIRECT_MOVE) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8"); if ((flags & OPTION_MASK_MODULO) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9"); if ((flags & OPTION_MASK_POWER10) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10"); Only the p10 one here is (maybe?) correct, all the other defines depend on flags that can be (directly or indirectly) disabled. This is not limited to just these three, of course. The reason this showed up for p8 is that it shows up with a reasonable choice of flags.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #2 from Bill Schmidt --- The _ARCH_PWR8 predefine is conditioned on a flag that can be disabled by -mno-vsx or -mno-altivec. That is a Bad Thing. It appears (as David pointed out privately) that this problem is limited to _ARCH_PWR8, as the other _ARCH levels are using stable tests that can't be so easily disabled.
[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 Segher Boessenkool changed: What|Removed |Added Ever confirmed|0 |1 Status|UNCONFIRMED |NEW CC||segher at gcc dot gnu.org Last reconfirmed||2021-08-11 --- Comment #1 from Segher Boessenkool --- Confirmed.
