[Bug target/105981] [10/11/12 regression] Wrong code from gen_cpymem_ldrd_strd() with -mbig-endian

2022-06-16 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105981

Richard Earnshaw  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|NEW |RESOLVED
   Target Milestone|10.5|10.4

--- Comment #7 from Richard Earnshaw  ---
Fixed on all active release branches.

[Bug target/105981] [10/11/12 regression] Wrong code from gen_cpymem_ldrd_strd() with -mbig-endian

2022-06-16 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105981

--- Comment #6 from CVS Commits  ---
The releases/gcc-10 branch has been updated by Richard Earnshaw
:

https://gcc.gnu.org/g:20ece449e06f2d0dd0c50db0203d13b4e4ff2d96

commit r10-10850-g20ece449e06f2d0dd0c50db0203d13b4e4ff2d96
Author: Richard Earnshaw 
Date:   Wed Jun 15 16:07:20 2022 +0100

arm: big-endian issue in gen_cpymem_ldrd_strd [PR105981]

The code in gen_cpymem_ldrd_strd has been incorrect for big-endian
since r230663.  The problem is that we use gen_lowpart, etc. to split
the 64-bit quantity, but fail to account for the fact that these
routines are really dealing with 64-bit /values/ and in big-endian the
ordering of the sub-registers changes.

To fix this, I've renamed the conceptually misnamed low_reg and hi_reg
as first_reg and second_reg, and then used different logic for
big-endian targets to initialize these values.  This makes the logic
clearer than trying to think about high bits and low bits.

gcc/ChangeLog:

PR target/105981
* config/arm/arm.c (gen_cpymem_ldrd_strd): Rename low_reg and
hi_reg
to first_reg and second_reg respectively.  Initialize them
correctly
when generating big-endian code.

(cherry picked from commit 8aaa948059a8b5f0a62ad010d0aa6346b7ac9cd3)

[Bug target/105981] [10/11/12 regression] Wrong code from gen_cpymem_ldrd_strd() with -mbig-endian

2022-06-16 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105981

--- Comment #5 from CVS Commits  ---
The releases/gcc-11 branch has been updated by Richard Earnshaw
:

https://gcc.gnu.org/g:2a9c9ed732d6a7f4565a286bdeb953f08fbe8fb9

commit r11-10074-g2a9c9ed732d6a7f4565a286bdeb953f08fbe8fb9
Author: Richard Earnshaw 
Date:   Wed Jun 15 16:07:20 2022 +0100

arm: big-endian issue in gen_cpymem_ldrd_strd [PR105981]

The code in gen_cpymem_ldrd_strd has been incorrect for big-endian
since r230663.  The problem is that we use gen_lowpart, etc. to split
the 64-bit quantity, but fail to account for the fact that these
routines are really dealing with 64-bit /values/ and in big-endian the
ordering of the sub-registers changes.

To fix this, I've renamed the conceptually misnamed low_reg and hi_reg
as first_reg and second_reg, and then used different logic for
big-endian targets to initialize these values.  This makes the logic
clearer than trying to think about high bits and low bits.

gcc/ChangeLog:

PR target/105981
* config/arm/arm.c (gen_cpymem_ldrd_strd): Rename low_reg and
hi_reg
to first_reg and second_reg respectively.  Initialize them
correctly
when generating big-endian code.

(cherry picked from commit 8aaa948059a8b5f0a62ad010d0aa6346b7ac9cd3)

[Bug target/105981] [10/11/12 regression] Wrong code from gen_cpymem_ldrd_strd() with -mbig-endian

2022-06-16 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105981

--- Comment #4 from CVS Commits  ---
The releases/gcc-12 branch has been updated by Richard Earnshaw
:

https://gcc.gnu.org/g:723c1d6284ca9f79cc35bf7bf49f391417773f83

commit r12-8488-g723c1d6284ca9f79cc35bf7bf49f391417773f83
Author: Richard Earnshaw 
Date:   Wed Jun 15 16:07:20 2022 +0100

arm: big-endian issue in gen_cpymem_ldrd_strd [PR105981]

The code in gen_cpymem_ldrd_strd has been incorrect for big-endian
since r230663.  The problem is that we use gen_lowpart, etc. to split
the 64-bit quantity, but fail to account for the fact that these
routines are really dealing with 64-bit /values/ and in big-endian the
ordering of the sub-registers changes.

To fix this, I've renamed the conceptually misnamed low_reg and hi_reg
as first_reg and second_reg, and then used different logic for
big-endian targets to initialize these values.  This makes the logic
clearer than trying to think about high bits and low bits.

gcc/ChangeLog:

PR target/105981
* config/arm/arm.cc (gen_cpymem_ldrd_strd): Rename low_reg and
hi_reg
to first_reg and second_reg respectively.  Initialize them
correctly
when generating big-endian code.

(cherry picked from commit 8aaa948059a8b5f0a62ad010d0aa6346b7ac9cd3)

[Bug target/105981] [10/11/12 regression] Wrong code from gen_cpymem_ldrd_strd() with -mbig-endian

2022-06-15 Thread rearnsha at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105981

Richard Earnshaw  changed:

   What|Removed |Added

Summary|[10/11/12/13 regression]|[10/11/12 regression] Wrong
   |Wrong code from |code from
   |gen_cpymem_ldrd_strd() with |gen_cpymem_ldrd_strd() with
   |-mbig-endian|-mbig-endian

--- Comment #3 from Richard Earnshaw  ---
Fixed on trunk so far.