[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 --- Comment #11 from CVS Commits --- The master branch has been updated by Kyrylo Tkachov : https://gcc.gnu.org/g:4389a2d2d0cc639cbeeb8453dc20bf315316d4e3 commit r14-1781-g4389a2d2d0cc639cbeeb8453dc20bf315316d4e3 Author: Kyrylo Tkachov Date: Tue Jun 13 10:13:55 2023 +0100 aarch64: Extend -mtp= arguments After discussing the -mtp= option with Arm's LLVM developers we'd like to extend the functionality of the option somewhat. First of all, there is another TPIDR register that can be used to read the thread pointer: TPIDRRO_EL0 (which can also be accessed by AArch32 under another name) so it makes sense to add -mtp=tpidrr0_el0. This makes the existing arguments el0, el1, el2, el3 somewhat inconsistent in their naming so this patch introduces the more "full" names tpidr_el0, tpidr_el1, tpidr_el2, tpidr_el3 and makes the above short names alias of these new ones. Long story short, we preserve backwards compatibility and add a new TPIDR register to access through -mtp that wasn't available previously. There is more relevant discussion of the options at https://reviews.llvm.org/D152433 if you're interested. Bootstrapped and tested on aarch64-none-linux-gnu. gcc/ChangeLog: PR target/108779 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add AARCH64_TPIDRRO_EL0 value. * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define. * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2, tpidr_el3, tpidrro_el3): New accepted values to -mtp=. * doc/invoke.texi (AArch64 Options): Document new -mtp= options. gcc/testsuite/ChangeLog: PR target/108779 * gcc.target/aarch64/mtp_5.c: New test. * gcc.target/aarch64/mtp_6.c: New test. * gcc.target/aarch64/mtp_7.c: New test. * gcc.target/aarch64/mtp_8.c: New test. * gcc.target/aarch64/mtp_9.c: New test.
[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Target Milestone|--- |14.0 Resolution|--- |FIXED --- Comment #10 from ktkachov at gcc dot gnu.org --- Implemented for GCC 14.
[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 --- Comment #9 from CVS Commits --- The master branch has been updated by Kyrylo Tkachov : https://gcc.gnu.org/g:573624ec90c80d1a024ab405e2575785b869a833 commit r14-154-g573624ec90c80d1a024ab405e2575785b869a833 Author: Kyrylo Tkachov Date: Fri Apr 21 19:00:02 2023 +0100 PR target/108779 aarch64: Implement -mtp= option A user has requested that we support the -mtp= option in aarch64 GCC for changing the TPIDR register to read for TLS accesses. I'm not a big fan of the option name, but we already support it in the arm port and Clang supports it for AArch64 already, where it accepts the 'el0', 'el1', 'el2', 'el3' values. This patch implements the same functionality in GCC. Bootstrapped and tested on aarch64-none-linux-gnu. Confirmed with godbolt that the sequences and options are the same as what Clang accepts/generates. gcc/ChangeLog: PR target/108779 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define. * config/aarch64/aarch64-protos.h (aarch64_output_load_tp): Define prototype. * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare. (aarch64_override_options_internal): Handle the above. (aarch64_output_load_tp): New function. * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call aarch64_output_load_tp. * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum. (mtp=): New option. * doc/invoke.texi (AArch64 Options): Document -mtp=. gcc/testsuite/ChangeLog: PR target/108779 * gcc.target/aarch64/mtp.c: New test. * gcc.target/aarch64/mtp_1.c: New test. * gcc.target/aarch64/mtp_2.c: New test. * gcc.target/aarch64/mtp_3.c: New test. * gcc.target/aarch64/mtp_4.c: New test.
[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 --- Comment #8 from zach-gcc at cs dot stanford.edu --- Alright sounds good, thanks.
[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 --- Comment #7 from Andrew Pinski --- (In reply to zach-gcc from comment #6) > Is there any update on when this will be merged? Is this waiting on GCC 13 > to be released first? Correct, it won't be merged until the trunk goes to stage 1 which should be sometime next month or so ...
[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 --- Comment #6 from zach-gcc at cs dot stanford.edu --- Is there any update on when this will be merged? Is this waiting on GCC 13 to be released first?
[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 --- Comment #5 from zach-gcc at cs dot stanford.edu --- Thanks for the quick response, I've tried it out and it looks good to me!
[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 --- Comment #4 from Andrew Pinski --- (In reply to ktkachov from comment #3) > Created attachment 54459 [details] > Candidate patch > > Patch that implements -mtp= similar to clang if you have the capability to > try it out My only comment is for the testcase, don't use .x for the common source. In many other parts of the testsuite, .x is used for dejagnu commands for that file.
[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 --- Comment #3 from ktkachov at gcc dot gnu.org --- Created attachment 54459 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=54459=edit Candidate patch Patch that implements -mtp= similar to clang if you have the capability to try it out
[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 ktkachov at gcc dot gnu.org changed: What|Removed |Added Ever confirmed|0 |1 CC||ktkachov at gcc dot gnu.org Status|UNCONFIRMED |ASSIGNED Assignee|unassigned at gcc dot gnu.org |ktkachov at gcc dot gnu.org Last reconfirmed||2023-02-14 --- Comment #2 from ktkachov at gcc dot gnu.org --- Confirmed. I have a patch I'm testing for it. Since GCC 13 is in stage4 (regression and wrong-code fixes only) this would be GCC 14 material. Would that timeline be okay with you?
[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 Andrew Pinski changed: What|Removed |Added Summary|No option to change |AARCH64 should add an |thread-pointer location on |option to change TLS |AArch64 |register location to ||support EL1/EL2/EL3 system ||registers Target||aarch64-*-linux-gnu ||aarch64-*-elf Severity|normal |enhancement --- Comment #1 from Andrew Pinski --- Windows aarch64 support will even use the system register
