[Bug target/109566] powerpc: unrecognizable insn for -mcpu=e6500, -mcpu=power3, ..., -mcpu=power10
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109566 --- Comment #4 from Sebastian Huber --- (In reply to Sebastian Huber from comment #3) > I get this error also for -mcpu=power3, ..., -mcpu=power10. I get the ICE only in 32-bit mode, the 64-bit mode works: powerpc-rtems6-gcc -O2 -mcpu=power10 -m64 -S test.c -dA -da -dp -o - .file "test.c" .machine power10 .abiversion 2 .section".text" .align 2 .p2align 4,,15 .globl __ieee754_fmod .type __ieee754_fmod, @function __ieee754_fmod: .LFB0: .cfi_startproc .localentry __ieee754_fmod,1 # BLOCK 2, count:118111600 (estimated locally) seq:0 # PRED: ENTRY [always] count:118111600 (estimated locally) (FALLTHRU) mfvsrd 9,1 # 7[c=4 l=4] *movdi_internal64/25 srdi 9,9,32 # 8[c=4 l=4] lshrdi3 rldicr. 9,9,33,10# 49 [c=4 l=4] *rotldi3_mask_dot/0 # SUCC: 4 [50.0% (guessed)] count:59055800 (estimated locally) (CAN_FALLTHRU) 3 [50.0% (guessed)] count:59055800 (estimated locally) (FALLTHRU,CAN_FALLTHRU) beq 0,.L2# 50 [c=4 l=4] *cbranch # BLOCK 3, count:118111600 (estimated locally) seq:1 # PRED: 2 [50.0% (guessed)] count:59055800 (estimated locally) (FALLTHRU,CAN_FALLTHRU) xxlxor 1,1,1 # 22 [c=4 l=4] *movdf_hardfloat64/8 # SUCC: EXIT [always] count:118111600 (estimated locally) blr # 53 [c=4 l=4] simple_return # BLOCK 4, count:0 (estimated locally) seq:2 # PRED: 2 [50.0% (guessed)] count:59055800 (estimated locally) (CAN_FALLTHRU) 4 [always] count:0 (estimated locally) (DFS_BACK,CAN_FALLTHRU) .L2: # SUCC: 4 [always] count:0 (estimated locally) (DFS_BACK,CAN_FALLTHRU) b .L2# 59 [c=4 l=4] jump .long 0 .byte 0,0,0,0,0,0,0,0 .cfi_endproc .LFE0: .size __ieee754_fmod,.-__ieee754_fmod .ident "GCC: (GNU) 13.0.1 20230424 (prerelease) [releases/gcc-13 f743863e09a]" .gnu_attribute 4, 9 .section.note.GNU-stack,"",@progbits
[Bug target/109566] powerpc: unrecognizable insn for -mcpu=e6500, -mcpu=power3, ..., -mcpu=power10
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109566 Sebastian Huber changed: What|Removed |Added Summary|powerpc: unrecognizable |powerpc: unrecognizable |insn for -mcpu=e6500|insn for -mcpu=e6500, ||-mcpu=power3, ..., ||-mcpu=power10 --- Comment #3 from Sebastian Huber --- I get this error also for -mcpu=power3, ..., -mcpu=power10.
[Bug target/109566] powerpc: unrecognizable insn for -mcpu=e6500
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109566 --- Comment #2 from Sebastian Huber --- Sorry for the confusion, the actual bad commit was the follow up commit (NOT d75be7e4343f049176546aa9517d570e5eb67954): commit 6cc3394507a2303a18891d34222c53f679256c37 Author: Andrew MacLeod Date: Wed Oct 5 10:42:07 2022 -0400 propagate partial equivs in the cache. Adjust on-entry cache propagation to look for and propagate both full and partial equivalences. gcc/ PR tree-optimization/102540 PR tree-optimization/102872 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Handle partial equivs. (ranger_cache::range_from_dom): Cleanup dump output. gcc/testsuite/ * gcc.dg/pr102540.c: New. * gcc.dg/pr102872.c: New.
[Bug target/109566] powerpc: unrecognizable insn for -mcpu=e6500
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109566 Sebastian Huber changed: What|Removed |Added Known to work||12.1.0, 12.2.0 --- Comment #1 from Sebastian Huber --- I did a git bisect using. It ended up in this commit: commit d75be7e4343f049176546aa9517d570e5eb67954 Author: Andrew MacLeod Date: Thu Oct 6 15:01:24 2022 -0400 Add partial equivalence recognition to cast and bitwise and. This provides the hooks that will register partial equivalencies for casts and bitwise AND operations with the appropriate bit pattern. * range-op.cc (operator_cast::lhs_op1_relation): New. (operator_bitwise_and::lhs_op1_relation): New. gcc/range-op.cc | 65 + 1 file changed, 65 insertions(+)
