https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109974
Bug ID: 109974 Summary: RISCV: RVV VSETVL Pass ICE in SLP auto-vectorization Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: pan2.li at intel dot com Target Milestone: --- Created attachment 55160 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=55160&action=edit Reproduce source file Given the below example code with build option " -march=rv64gcv_zbb -O3 --param=riscv-autovec-preference=fixed-vlmax". #include <stdint-gcc.h> void __attribute__((noinline, noclone)) func (int8_t *__restrict x, int64_t *__restrict y, int n) { for (int i = 0, j = 0; i < n; i++, j +=2 ) { x[i + 0] += 1; y[j + 0] += 1; y[j + 1] += 2; } } It will trigger one ICE during RTL pass: vsetvl. .file "test.c" .option nopic .attribute arch, "rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_v1p0_zicsr2p0_zifencei2p0_zbb1p0_zve32f1p0_zve32x1p0_zve64d1p0_zve64f1p0_zve64x1p0_zvl128b1p0_zvl32b1p0_zvl64b1p0" .attribute unaligned_access, 0 .attribute stack_align, 16 .text during RTL pass: vsetvl test.c: In function ‘func’: test.c:12:1: internal compiler error: in source_equal_p, at config/riscv/riscv-vsetvl.cc:1141 12 | } | ^ 0x1cd6902 source_equal_p /home/pli/repos/gcc/reference/riscv-gnu-toolchain/gcc/__BUILD_RISC-V/../gcc/config/riscv/riscv-vsetvl.cc:1141 0x1cd7c59 riscv_vector::avl_info::single_source_equal_p(riscv_vector::avl_info const&) const /home/pli/repos/gcc/reference/riscv-gnu-toolchain/gcc/__BUILD_RISC-V/../gcc/config/riscv/riscv-vsetvl.cc:1658 0x1cd7f01 riscv_vector::avl_info::operator==(riscv_vector::avl_info const&) const /home/pli/repos/gcc/reference/riscv-gnu-toolchain/gcc/__BUILD_RISC-V/../gcc/config/riscv/riscv-vsetvl.cc:1722 0x1cd8fe0 riscv_vector::vector_insn_info::compatible_avl_p(riscv_vector::vl_vtype_info const&) const /home/pli/repos/gcc/reference/riscv-gnu-toolchain/gcc/__BUILD_RISC-V/../gcc/config/riscv/riscv-vsetvl.cc:2010 0x1cd6ce4 incompatible_avl_p /home/pli/repos/gcc/reference/riscv-gnu-toolchain/gcc/__BUILD_RISC-V/../gcc/config/riscv/riscv-vsetvl.cc:1199 0x1ce453b riscv_vector::demands_cond::dual_incompatible_p(riscv_vector::vector_insn_info const&, riscv_vector::vector_insn_info const&) const /home/pli/repos/gcc/reference/riscv-gnu-toolchain/gcc/__BUILD_RISC-V/../gcc/config/riscv/riscv-vsetvl.h:491 0x1cd8e36 riscv_vector::vector_insn_info::compatible_p(riscv_vector::vector_insn_info const&) const /home/pli/repos/gcc/reference/riscv-gnu-toolchain/gcc/__BUILD_RISC-V/../gcc/config/riscv/riscv-vsetvl.cc:1983 0x1cdbf13 pass_vsetvl::compute_local_backward_infos(rtl_ssa::bb_info const*) /home/pli/repos/gcc/reference/riscv-gnu-toolchain/gcc/__BUILD_RISC-V/../gcc/config/riscv/riscv-vsetvl.cc:2819 0x1ce188b pass_vsetvl::lazy_vsetvl() /home/pli/repos/gcc/reference/riscv-gnu-toolchain/gcc/__BUILD_RISC-V/../gcc/config/riscv/riscv-vsetvl.cc:4542 0x1ce1b40 pass_vsetvl::execute(function*) /home/pli/repos/gcc/reference/riscv-gnu-toolchain/gcc/__BUILD_RISC-V/../gcc/config/riscv/riscv-vsetvl.cc:4601 Please submit a full bug report, with preprocessed source (by using -freport-bug). Please include the complete backtrace with any bug report. See <https://gcc.gnu.org/bugs/> for instructions.