[Bug target/112538] New: [RISC-V] Failed to disable V-ext autovectorization using the '--param riscv-autovec-preference=none'

[mumuxi_ll at outlook dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112538

            Bug ID: 112538
           Summary: [RISC-V] Failed to disable V-ext autovectorization
                    using the '--param riscv-autovec-preference=none'
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: mumuxi_ll at outlook dot com
  Target Milestone: ---

Here is my test case:

```
#include <string.h>

typedef char    Str_30 [31];

Str_30          Str_2_Loc;

void foo(void)
{
    strcpy(Str_2_Loc, "DHRYSTONE PROGRAM");
}
```

Compiled with riscv64-unknown-elf-gcc -march=rv32imafdc_zve32f -mabi=ilp32d -S
rvv_autovec_bug.c --param riscv-autovec-preference=none

The result is:

        .string "DHRYSTONE PROGRAM"
        .text
        .align  1
        .globl  foo
        .type   foo, @function
foo:
        addi    sp,sp,-16
        sw      ra,12(sp)
        sw      s0,8(sp)
        addi    s0,sp,16
        lui     a5,%hi(Str_2_Loc)
        addi    a3,a5,%lo(Str_2_Loc)
        lui     a5,%hi(.LC0)
        addi    a4,a5,%lo(.LC0)
        mv      a5,a3
        vsetivli        zero,9,e16,m8,ta,ma
        vle16.v v8,0(a4)
        vsetivli        zero,9,e16,m8,ta,ma
        vse16.v v8,0(a5)
        nop
        lw      ra,12(sp)
        lw      s0,8(sp)
        addi    sp,sp,16
        jr      ra

It still generates the v-ext instructions automatically, which seems that the
"--param riscv-autovec-preference=none" did not work.