[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194 Christoph Müllner changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED|RESOLVED --- Comment #8 from Christoph Müllner --- Closing as resolved (the fix has been pushed on master).
[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194 Christoph Müllner changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |cmuellner at gcc dot gnu.org Last reconfirmed||2024-03-21 CC||cmuellner at gcc dot gnu.org Ever confirmed|0 |1 Status|UNCONFIRMED |ASSIGNED Target Milestone|--- |14.0 --- Comment #7 from Christoph Müllner --- Thanks for reporting and providing several minimal reproducers. I can reproduce the issue and have further analyzed it. During the analysis, I've noticed that not only memset-zero (clear-memory) is affected, but all memset expansions (e.g. `memset(p, 3, 15)`). I also have a potential fix that will be sent to the list once the testing run is completed.
[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194 --- Comment #6 from Bruce Hoult --- The ICE also happens with bzero(). The ICE does NOT happen with a constant length of 16 of greater, in which case a function call is made instead of expanding inline. With rv64gv or rv64gcv a series of N `sb` are generated (N < 16) With rv64gc_xtheadvector, N >= 6, and -Os a tail call to memset is generated, no ICE. With N < 6 ... ICE. So the problem is only trying to expand memset() or bzero() inline. Does it try to use a vectorised memset? That doesn't happen with rv64gcv. memcpy() does not ICE for any N. I assume the originally reported C++ code is generating a memset() to initialise one of the classes/structs.
[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194 --- Comment #5 from Bruce Hoult --- oops .. 379 lines .. I grep'd wrong. Anyway... gcc/config/riscv/riscv-vector-switch.def -ENTRY (RVVMF2QI, true, LMUL_F2, 16) -ENTRY (RVVMF4QI, true, LMUL_F4, 32) -ENTRY (RVVMF8QI, TARGET_MIN_VLEN > 32, LMUL_F8, 64) +ENTRY (RVVMF2QI, !TARGET_XTHEADVECTOR, LMUL_F2, 16) +ENTRY (RVVMF4QI, !TARGET_XTHEADVECTOR, LMUL_F4, 32) +ENTRY (RVVMF8QI, TARGET_MIN_VLEN > 32 && !TARGET_XTHEADVECTOR, LMUL_F8, 64) Fractional LMUL (including RVVMF8QI) is removed. Correct, 0.7.1 doesn't have it. But something still tries to use it.
[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194 --- Comment #4 from Bruce Hoult --- I've bisected this and the problem is introduced in 2d7205eb2c3 "RISC-V: Handle differences between XTheadvector and Vector" Fortunately this commit touches only 136 lines of code, unlike the later two xtheadvector commits which are 1119 and 204 touched lines.
[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194
--- Comment #3 from Bruce Hoult ---
Simpler example, found independently.
void *memset();
void a(void *b){ memset(b, 0, 1lu); }
There might be a lot of code that triggers this. Fortunately the source file
this happened in didn't actually use RVV (others did) so I was able to simply
use rv64gc for it.
[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194 Andrew Pinski changed: What|Removed |Added CC||bruce at hoult dot org --- Comment #2 from Andrew Pinski --- *** Bug 114226 has been marked as a duplicate of this bug. ***
[Bug target/114194] ICE when using std::unique_ptr with xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114194
Andrew Pinski changed:
What|Removed |Added
Target||riscv
Keywords||ice-on-valid-code
--- Comment #1 from Andrew Pinski ---
:4:28: error: unrecognizable insn:
4 | void f(S3 &) { S3 x; f(x); }
|^
(insn 6 3 7 2 (set (reg:RVVMF8QI 134)
(unspec:RVVMF8QI [
(const_vector:RVVMF8QI [
(const_int 0 [0])
])
(reg:DI 0 zero)
(const_int 1 [0x1])
(reg:SI 66 vl)
(reg:SI 67 vtype)
] UNSPEC_TH_VWLDST)) "":4:19 -1
(expr_list:REG_EQUAL (const_vector:RVVMF8QI [
(const_int 0 [0])
])
(nil)))
during RTL pass: vregs
