[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-06 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

Jakub Jelinek  changed:

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

--- Comment #11 from Jakub Jelinek  ---
Fixed.

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-06 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

--- Comment #10 from Jakub Jelinek  ---
Author: jakub
Date: Tue Mar  6 20:41:37 2018
New Revision: 258301

URL: https://gcc.gnu.org/viewcvs?rev=258301=gcc=rev
Log:
PR target/84710
* combine.c (try_combine): Use reg_or_subregno instead of handling
just paradoxical SUBREGs and REGs.

* gcc.dg/pr84710.c: New test.

Added:
trunk/gcc/testsuite/gcc.dg/pr84710.c
Modified:
trunk/gcc/ChangeLog
trunk/gcc/combine.c
trunk/gcc/testsuite/ChangeLog

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-06 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

--- Comment #9 from Jakub Jelinek  ---
(In reply to Segher Boessenkool from comment #8)
> Ah right, I had checking disabled.  Need more coffee I guess.

You don't really need to build the checking compiler for this though, it is
enough to put a breakpoint on that REGNO (x) line and debug_rtx (x) first.

> The insns I see are different:
> 
> Trying 19, 20 -> 21:
>19: r106:SI#0=0
>20: r108:SI=zero_extend(r106:SI#0)
>21: r109:SI=r108:SI 0>>0x8
>   REG_DEAD r108:SI
> 
> (see insn 20); maybe the i3 in #c1 is already modified?

Likely, yes.  I've just done up and debug_rtx on the 3 insns passed to
try_combine.

> The #c5 patch is okay for trunk, thanks!

Thanks.

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-06 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

--- Comment #8 from Segher Boessenkool  ---
Ah right, I had checking disabled.  Need more coffee I guess.

The insns I see are different:

Trying 19, 20 -> 21:
   19: r106:SI#0=0
   20: r108:SI=zero_extend(r106:SI#0)
   21: r109:SI=r108:SI 0>>0x8
  REG_DEAD r108:SI

(see insn 20); maybe the i3 in #c1 is already modified?

The #c5 patch is okay for trunk, thanks!

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-06 Thread zsojka at seznam dot cz
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

--- Comment #7 from Zdenek Sojka  ---
Created attachment 43573
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=43573=edit
original testcase

Unreduced testcase; needs additional -fkeep-inline-functions:
$ aarch64-unknown-linux-gnu-gcc -O -fno-forward-propagate
-fkeep-inline-functions xxx.c -w
during RTL pass: combine
xxx.c: In function 'bar2':
xxx.c:81:1: internal compiler error: RTL check: expected code 'reg', have
'subreg' in rhs_regno, at rtl.h:1896
 }
...

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-06 Thread zsojka at seznam dot cz
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

--- Comment #6 from Zdenek Sojka  ---
(In reply to Segher Boessenkool from comment #4)
> The testcase has UB of course (d is undefined).

The original testcase had defined behavior. The uninitialized use is the result
of delta/creduce reduction. There was an ICE with the unreduced testcase as
well.

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-06 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

--- Comment #5 from Jakub Jelinek  ---
(In reply to Segher Boessenkool from comment #4)
> The testcase does not crash for me; does it need more non-default options?
> 
> The testcase has UB of course (d is undefined).

The compiler needs to be configured with --enable-checking=yes,rtl .

--- gcc/combine.c.jj2018-03-05 23:13:26.478215559 +0100
+++ gcc/combine.c   2018-03-06 08:50:17.756288841 +0100
@@ -4283,12 +4283,8 @@ try_combine (rtx_insn *i3, rtx_insn *i2,
   if (GET_CODE (x) == PARALLEL)
x = XVECEXP (newi2pat, 0, 0);

-  /* It can only be a SET of a REG or of a paradoxical SUBREG of a REG. 
*/
-  x = SET_DEST (x);
-  if (paradoxical_subreg_p (x))
-   x = SUBREG_REG (x);
-
-  unsigned int regno = REGNO (x);
+  /* It can only be a SET of a REG or of a SUBREG of a REG.  */
+  unsigned int regno = reg_or_subregno (SET_DEST (x));

   bool done = false;
   for (rtx_insn *insn = NEXT_INSN (i3);

is the combine.c part I'll be testing.  And, the testcase is dg-do compile
only,
so it doesn't matter if there is UB in it or not, we shouldn't ICE on it (and
yes, my attempts to get rid of the uninit use just resulted in the ICE no
longer happening).

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-06 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

--- Comment #4 from Segher Boessenkool  ---
The testcase does not crash for me; does it need more non-default options?

The testcase has UB of course (d is undefined).

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-06 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

--- Comment #3 from Segher Boessenkool  ---
Well, yuck, I missed that part of rtl.texi (or somehow I thought this RTL would
be refused earlier).

Please use reg_or_subregno in the patch though?

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-06 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

Jakub Jelinek  changed:

   What|Removed |Added

 Status|NEW |ASSIGNED
   Assignee|unassigned at gcc dot gnu.org  |jakub at gcc dot gnu.org

--- Comment #2 from Jakub Jelinek  ---
Created attachment 43572
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=43572=edit
gcc8-pr84710.patch

Full untested patch.

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-05 Thread jakub at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

Jakub Jelinek  changed:

   What|Removed |Added

 Status|UNCONFIRMED |NEW
   Last reconfirmed||2018-03-06
 CC||jakub at gcc dot gnu.org,
   ||segher at gcc dot gnu.org
 Ever confirmed|0   |1

--- Comment #1 from Jakub Jelinek  ---
This is on try_combine with
i3:
(insn 21 20 22 2 (set (reg:SI 109)
(const_int 0 [0])) "pr84710.c":8 679 {*aarch64_lshr_sisd_or_int_si3}
 (expr_list:REG_DEAD (reg:SI 108)
(nil)))
i2:
(insn 20 19 21 2 (set (reg:SI 108)
(zero_extend:SI (subreg:HI (reg:SI 106) 0))) "pr84710.c":8 89
{*zero_extendhisi2_aarch64}
 (nil))
i1:
(insn 19 18 20 2 (set (subreg:HI (reg:SI 106) 0)
(const_int 0 [0])) "pr84710.c":8 45 {*movhi_aarch64}
 (nil))
and on:
4286  /* It can only be a SET of a REG or of a paradoxical SUBREG of a
REG.  */
4287  x = SET_DEST (x);
4288  if (paradoxical_subreg_p (x))
4289x = SUBREG_REG (x);
4290
4291  unsigned int regno = REGNO (x);

x is:
(subreg:HI (reg:SI 106) 0)

rtl.texi documents the behavior of SUBREGs as lvalues not just for paradoxical
SUBREGs, but also for normal SUBREGs.

So, we have a proof that the paradoxical_subreg_p guard is insufficient.

I'd go with:
--- gcc/combine.c.jj2018-03-05 23:13:26.478215559 +0100
+++ gcc/combine.c   2018-03-06 08:50:17.756288841 +0100
@@ -4283,9 +4283,9 @@ try_combine (rtx_insn *i3, rtx_insn *i2,
   if (GET_CODE (x) == PARALLEL)
x = XVECEXP (newi2pat, 0, 0);

-  /* It can only be a SET of a REG or of a paradoxical SUBREG of a REG. 
*/
+  /* It can only be a SET of a REG or of a SUBREG of a REG.  */
   x = SET_DEST (x);
-  if (paradoxical_subreg_p (x))
+  if (SUBREG_P (x))
x = SUBREG_REG (x);

   unsigned int regno = REGNO (x);

(until proven otherwise).

[Bug target/84710] [8 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1896 with -O -fno-forward-propagate

2018-03-05 Thread rguenth at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84710

Richard Biener  changed:

   What|Removed |Added

   Priority|P3  |P1
   Target Milestone|--- |8.0