[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 Tamar Christina changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|--- |FIXED --- Comment #8 from Tamar Christina --- I'll open a new ticket for the IRA issue.
[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 --- Comment #7 from Martin Liška --- Tamar: Can you please update Known to work or close it?
[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 Jakub Jelinek changed: What|Removed |Added Target Milestone|8.2 |8.3 --- Comment #6 from Jakub Jelinek --- GCC 8.2 has been released.
[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 --- Comment #5 from Tamar Christina --- Author: tnfchris Date: Wed Jun 27 08:08:48 2018 New Revision: 262178 URL: https://gcc.gnu.org/viewcvs?rev=262178=gcc=rev Log: Add SIMD to REG pattern for movhf without armv8.2-a support for AArch64 This fixes a regression where we don't have an instruction for pre Armv8.2-a to do a move of an fp16 value from a GP reg to a SIMD reg. This patch adds that pattern to movhf_aarch64 using a dup and only selectes it using a very low priority. This fixes an ICE at -O0. gcc/ 2018-06-20 Tamar Christina PR target/85769 * config/aarch64/aarch64.md (*movhf_aarch64): Add dup v0.4h pattern. gcc/testsuite/ 2018-06-20 Tamar Christina PR target/85769 * gcc.target/aarch64/f16_mov_immediate_3.c: New. Added: trunk/gcc/testsuite/gcc.target/aarch64/f16_mov_immediate_3.c Modified: trunk/gcc/ChangeLog trunk/gcc/config/aarch64/aarch64.md trunk/gcc/testsuite/ChangeLog
[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 --- Comment #4 from Tamar Christina --- I have a patch to add the missing case, but that'll just mask the reload bug, so I'm holding up on posting it while looking at reload.
[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #3 from Wilco --- (In reply to Tamar Christina from comment #2) > It's not r250673, That was committed 2017-07-28 and a GCC built 2017-08-17 > does the correct thing for non-Armv8.2-a. It promotes the fp16 values to 32 > bits does the operations and converts them back to fp16. > > somewhere along the line something has decided to no longer do this. I can > fix the ICE by adding the missing pattern explicitly, but it should have not > generated this insn to begin with. Yes it looks like a reload bug - choosing an alternative without checking it is valid.
[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 Tamar Christina changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned at gcc dot gnu.org |tnfchris at gcc dot gnu.org
[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 --- Comment #2 from Tamar Christina --- It's not r250673, That was committed 2017-07-28 and a GCC built 2017-08-17 does the correct thing for non-Armv8.2-a. It promotes the fp16 values to 32 bits does the operations and converts them back to fp16. somewhere along the line something has decided to no longer do this. I can fix the ICE by adding the missing pattern explicitly, but it should have not generated this insn to begin with.
[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 Richard Biener changed: What|Removed |Added Target Milestone|--- |8.2
[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |NEW CC||ktkachov at gcc dot gnu.org, ||tnfchris at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from ktkachov at gcc dot gnu.org --- Looks to me like r250673. The + fmov\\t%h0, %w1 alternative that was added needs Armv8.2-A, which is not present on -mcpu=thunderx
