[Bug target/87815] ICE in DSE with -march=armv8-a+sve while trying to replace load with previously stored value
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87815 Renlin Li changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|--- |FIXED --- Comment #2 from Renlin Li --- Fix by r266033
[Bug target/87815] ICE in DSE with -march=armv8-a+sve while trying to replace load with previously stored value
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87815 --- Comment #1 from Renlin Li --- Author: renlin Date: Mon Nov 12 16:47:24 2018 New Revision: 266033 URL: https://gcc.gnu.org/viewcvs?rev=266033&root=gcc&view=rev Log: [PR87815]Don't generate shift sequence for load replacement in DSE when the mode size is not compile-time constant The patch adds a check if the gap is compile-time constant. This happens when dse decides to replace the load with previous store value. The problem is that, shift sequence could not accept compile-time non-constant mode operand. gcc/ 2018-11-12 Renlin Li PR target/87815 * dse.c (get_stored_val): Add check for compile-time constantness of gap. gcc/testsuite/ 2018-11-12 Renlin Li PR target/87815 * gcc.target/aarch64/sve/pr87815.c: New. Added: trunk/gcc/testsuite/gcc.target/aarch64/sve/pr87815.c Modified: trunk/gcc/ChangeLog trunk/gcc/dse.c trunk/gcc/testsuite/ChangeLog
[Bug target/87815] ICE in DSE with -march=armv8-a+sve while trying to replace load with previously stored value
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87815 Renlin Li changed: What|Removed |Added Keywords||ice-on-valid-code Target||aarch64-none-elf Version|8.0 |9.0 Target Milestone|--- |9.0 Known to fail||9.0
[Bug target/87815] ICE in DSE with -march=armv8-a+sve while trying to replace load with previously stored value
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87815 Renlin Li changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed||2018-10-30 Ever confirmed|0 |1
