[Bug target/88316] numerous big-endian issues with compatibility implementations of vector intrinsics for powerpc

2018-12-20 Thread pc at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88316

pc at gcc dot gnu.org changed:

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |FIXED

--- Comment #7 from pc at gcc dot gnu.org ---
Fixed in trunk, ibm/gcc-8-branch, ibm/gcc-7-branch.

[Bug target/88316] numerous big-endian issues with compatibility implementations of vector intrinsics for powerpc

2018-12-20 Thread pc at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88316

--- Comment #6 from pc at gcc dot gnu.org ---
Author: pc
Date: Thu Dec 20 18:22:24 2018
New Revision: 267309

URL: https://gcc.gnu.org/viewcvs?rev=267309=gcc=rev
Log:
2018-12-20  Paul Clarke  

[gcc]

Backport from trunk

267261
2018-12-19  Paul A. Clarke  

* config/rs6000/tmmintrin.h (_mm_hadds_epi16): Vector lanes swapped.
(_mm_hsub_epi32): Likewise.
(_mm_shuffle_epi8): Fix reversed interpretation of parameters.
(_mm_shuffle_pi8): Likewise.
(_mm_addubs_pi16): Likewise.

266895
2018-12-07  Paul A. Clarke  

PR target/88408
* config/rs6000/mmintrin.h (_mm_packs_pu16): Correctly use "__vector".

266869
2018-12-06  Paul A. Clarke  

PR target/88316
* config/rs6000/smmintrin.h: New file.
* config.gcc: Add smmintrin.h to extra_headers for powerpc*-*-*.

266868
2018-12-03  Paul A. Clarke  

PR target/88316
* config/rs6000/mmintrin.h (_mm_unpackhi_pi8): Fix for big-endian.
(_mm_unpacklo_pi8): Likewise.
(_mm_mulhi_pi16): Likewise.
(_mm_packs_pi16): Fix for big-endian. Use preferred API.
(_mm_packs_pi32): Likewise.
(_mm_packs_pu16): Likewise.
* config/rs6000/xmmintrin.h (_mm_cvtss_si32): Fix for big-endian.
(_mm_cvtss_si64): Likewise.
(_mm_cvtpi32x2_ps): Likewise.
(_mm_shuffle_ps): Likewise.
(_mm_movemask_pi8): Likewise.
(_mm_mulhi_pu16): Likewise.
(_mm_sad_pu8): Likewise.
(_mm_sad_pu8): Likewise.
(_mm_cvtpu16_ps): Fix for big-endian. Use preferred API.
(_mm_cvtpu8_ps): Likewise.
(_mm_movemask_ps): Better #else case for big-endian (no functional
change).
(_mm_shuffle_pi16): Likewise.
* config/rs6000/emmintrin.h (_mm_movemask_pd): Fix for big-endian.
Better #else case for big-endian (no functional change).
(_mm_movemask_epi8): Likewise.
(_mm_shufflehi_epi16): Likewise.
(_mm_shufflelo_epi16): Likewise.
(_mm_shuffle_epi32): Likewise.
(_mm_mul_epu32): Fix for big-endian.
(_mm_bsrli_si128): Likewise.
(_mm_cvtps_pd): Better #else case for big endian.
(_mm_mulhi_epi16): Likewise.
(_mm_mul_epu32): Likewise.
(_mm_slli_si128): Likewise.
(_mm_sll_epi16): Likewise.
(_mm_sll_epi32): Likewise.
(_mm_sra_epi16): Likewise.
(_mm_sra_epi32): Likewise.
(_mm_srl_epi16): Likewise.
(_mm_srl_epi32): Likewise.
(_mm_mulhi_epu16): Likewise.
(_mm_sad_epu8): Likewise.
* config/rs6000/pmmintrin.h (_mm_hadd_ps): Fix for big-endian.
(_mm_sub_ps): Likewise.
* config/rs6000/mmintrin.h (_mm_cmpeq_pi8): Fix for 32-bit mode.
* gcc/config/rs6000/tmmintrin.h (_mm_alignr_epi8): Use ENDIAN
macros consistently (no functional changes).
(_mm_alignr_pi8): Likewise.

265601
2018-10-29  Paul A. Clarke  

* gcc/config/rs6000/mmintrin.h (_mm_packs_pi16, _mm_packs_pi32,
_mm_packs_pu16, _mm_unpackhi_pi8, _mm_unpacklo_pi8, _mm_add_pi8,
_mm_add_pi16, _mm_add_pi32, _mm_sub_pi8, _mm_sub_pi16, _mm_sub_pi32,
_mm_cmpgt_pi8, _mm_cmpeq_pi16, _mm_cmpgt_pi16, _mm_cmpeq_pi32,
_mm_cmpgt_pi32, _mm_adds_pi8, _mm_adds_pi16, _mm_adds_pu8,
_mm_adds_pu16, _mm_subs_pi8, _mm_subs_pi16, _mm_subs_pu8,
_mm_subs_pu16, _mm_madd_pi16, _mm_mulhi_pi16, _mm_mullo_pi16,
_mm_sll_pi16, _mm_sra_pi16, _mm_srl_pi16, _mm_set1_pi16, _mm_set1_pi8):
Change 'vector' to '__vector'.
* gcc/config/rs6000/xmmintrin.h (_mm_cvtps_pi32, _mm_cvttps_pi32,
_mm_cvtps_pi16, _mm_cvtps_pi8, _mm_max_pi16, _mm_max_pu8, _mm_min_pi16,
_mm_min_pu8, _mm_mulhi_pu16, _mm_shuffle_pi16, _mm_avg_pu8,
_mm_avg_pu16): Likewise.  And, whitespace corrections.

265542
2018-10-26  Paul A. Clarke  
* config/rs6000/tmmintrin.h: New file.
* config.gcc (powerpc*-*-*): Add tmmintrin.h to
extra_headers.

265535
2018-10-25  Paul A. Clarke  

* config/rs6000/mmintrin.h: Enable 32bit compilation.
* config/rs6000/xmmintrin.h: Likewise.

265531
2018-10-26  Paul A. Clarke  
* config/rs6000/xmmintrin.h (_mm_extract_pi16): Fix for big-endian.

258988
2018-03-31  Segher Boessenkool  

PR target/83315
* config/rs6000/xmmintrin.h (_mm_set_ps, _mm_max_ps): Handle (quiet)
NaN inputs correctly.

[gcc/testsuite]

Backport from trunk.

267271
2018-12-19  Paul A. Clarke  

* gcc.target/powerpc/ssse3-check.h: Enable tests to run.
* gcc.target/powerpc/ssse3-pabsb.c: Code fixes for strict aliasing
issues.
* gcc.target/powerpc/ssse3-pabsd.c: Likewise.
*

[Bug target/88316] numerous big-endian issues with compatibility implementations of vector intrinsics for powerpc

2018-12-20 Thread pc at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88316

--- Comment #5 from pc at gcc dot gnu.org ---
Author: pc
Date: Thu Dec 20 15:25:15 2018
New Revision: 267301

URL: https://gcc.gnu.org/viewcvs?rev=267301=gcc=rev
Log:
2018-12-20  Paul Clarke  

[gcc]

Backport from trunk

267261
2018-12-19  Paul A. Clarke  

* config/rs6000/tmmintrin.h (_mm_hadds_epi16): Vector lanes swapped.
(_mm_hsub_epi32): Likewise.
(_mm_shuffle_epi8): Fix reversed interpretation of parameters.
(_mm_shuffle_pi8): Likewise.
(_mm_addubs_pi16): Likewise.

266895
2018-12-07  Paul A. Clarke  

PR target/88408
* config/rs6000/mmintrin.h (_mm_packs_pu16): Correctly use "__vector".

266869
2018-12-06  Paul A. Clarke  

PR target/88316
* config/rs6000/smmintrin.h: New file.
* config.gcc: Add smmintrin.h to extra_headers for powerpc*-*-*.

266868
2018-12-03  Paul A. Clarke  

PR target/88316
* config/rs6000/mmintrin.h (_mm_unpackhi_pi8): Fix for big-endian.
(_mm_unpacklo_pi8): Likewise.
(_mm_mulhi_pi16): Likewise.
(_mm_packs_pi16): Fix for big-endian. Use preferred API.
(_mm_packs_pi32): Likewise.
(_mm_packs_pu16): Likewise.
* config/rs6000/xmmintrin.h (_mm_cvtss_si32): Fix for big-endian.
(_mm_cvtss_si64): Likewise.
(_mm_cvtpi32x2_ps): Likewise.
(_mm_shuffle_ps): Likewise.
(_mm_movemask_pi8): Likewise.
(_mm_mulhi_pu16): Likewise.
(_mm_sad_pu8): Likewise.
(_mm_sad_pu8): Likewise.
(_mm_cvtpu16_ps): Fix for big-endian. Use preferred API.
(_mm_cvtpu8_ps): Likewise.
(_mm_movemask_ps): Better #else case for big-endian (no functional
change).
(_mm_shuffle_pi16): Likewise.
* config/rs6000/emmintrin.h (_mm_movemask_pd): Fix for big-endian.
Better #else case for big-endian (no functional change).
(_mm_movemask_epi8): Likewise.
(_mm_shufflehi_epi16): Likewise.
(_mm_shufflelo_epi16): Likewise.
(_mm_shuffle_epi32): Likewise.
(_mm_mul_epu32): Fix for big-endian.
(_mm_bsrli_si128): Likewise.
(_mm_cvtps_pd): Better #else case for big endian.
(_mm_mulhi_epi16): Likewise.
(_mm_mul_epu32): Likewise.
(_mm_slli_si128): Likewise.
(_mm_sll_epi16): Likewise.
(_mm_sll_epi32): Likewise.
(_mm_sra_epi16): Likewise.
(_mm_sra_epi32): Likewise.
(_mm_srl_epi16): Likewise.
(_mm_srl_epi32): Likewise.
(_mm_mulhi_epu16): Likewise.
(_mm_sad_epu8): Likewise.
* config/rs6000/pmmintrin.h (_mm_hadd_ps): Fix for big-endian.
(_mm_sub_ps): Likewise.
* config/rs6000/mmintrin.h (_mm_cmpeq_pi8): Fix for 32-bit mode.
* gcc/config/rs6000/tmmintrin.h (_mm_alignr_epi8): Use ENDIAN
macros consistently (no functional changes).
(_mm_alignr_pi8): Likewise.

265601
2018-10-29  Paul A. Clarke  

* gcc/config/rs6000/mmintrin.h (_mm_packs_pi16, _mm_packs_pi32,
_mm_packs_pu16, _mm_unpackhi_pi8, _mm_unpacklo_pi8, _mm_add_pi8,
_mm_add_pi16, _mm_add_pi32, _mm_sub_pi8, _mm_sub_pi16, _mm_sub_pi32,
_mm_cmpgt_pi8, _mm_cmpeq_pi16, _mm_cmpgt_pi16, _mm_cmpeq_pi32,
_mm_cmpgt_pi32, _mm_adds_pi8, _mm_adds_pi16, _mm_adds_pu8,
_mm_adds_pu16, _mm_subs_pi8, _mm_subs_pi16, _mm_subs_pu8,
_mm_subs_pu16, _mm_madd_pi16, _mm_mulhi_pi16, _mm_mullo_pi16,
_mm_sll_pi16, _mm_sra_pi16, _mm_srl_pi16, _mm_set1_pi16, _mm_set1_pi8):
Change 'vector' to '__vector'.
* gcc/config/rs6000/xmmintrin.h (_mm_cvtps_pi32, _mm_cvttps_pi32,
_mm_cvtps_pi16, _mm_cvtps_pi8, _mm_max_pi16, _mm_max_pu8, _mm_min_pi16,
_mm_min_pu8, _mm_mulhi_pu16, _mm_shuffle_pi16, _mm_avg_pu8,
_mm_avg_pu16): Likewise.  And, whitespace corrections.

265542
2018-10-26  Paul A. Clarke  
* config/rs6000/tmmintrin.h: New file.
* config.gcc (powerpc*-*-*): Add tmmintrin.h to
extra_headers.

265535
2018-10-25  Paul A. Clarke  

* config/rs6000/mmintrin.h: Enable 32bit compilation.
* config/rs6000/xmmintrin.h: Likewise.

265531
2018-10-26  Paul A. Clarke  
* config/rs6000/xmmintrin.h (_mm_extract_pi16): Fix for big-endian.

[gcc/testsuite]

Backport from trunk.

267271
2018-12-19  Paul A. Clarke  

* gcc.target/powerpc/ssse3-check.h: Enable tests to run.
* gcc.target/powerpc/ssse3-pabsb.c: Code fixes for strict aliasing
issues.
* gcc.target/powerpc/ssse3-pabsd.c: Likewise.
* gcc.target/powerpc/ssse3-palignr.c: Likewise.
* gcc.target/powerpc/ssse3-phaddd.c: Likewise.
* gcc.target/powerpc/ssse3-phaddsw.c: Likewise.
* gcc.target/powerpc/ssse3-phaddw.c: Likewise.
*

[Bug target/88316] numerous big-endian issues with compatibility implementations of vector intrinsics for powerpc

2018-12-07 Thread pc at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88316

--- Comment #4 from pc at gcc dot gnu.org ---
SSSE3 is still broken.  Working on it...

[Bug target/88316] numerous big-endian issues with compatibility implementations of vector intrinsics for powerpc

2018-12-06 Thread pc at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88316

--- Comment #3 from pc at gcc dot gnu.org ---
Author: pc
Date: Thu Dec  6 22:14:55 2018
New Revision: 266870

URL: https://gcc.gnu.org/viewcvs?rev=266870=gcc=rev
Log:
[rs6000] Enable x86-compat vector intrinsics testing

The testsuite tests for the compatibility implementations of x86 vector
intrinsics for "powerpc" had been inadvertently made to PASS
without actually running the test code.

This patch removes the code which kept the tests from running the actual
test code.

2018-12-06  Paul A. Clarke  

[gcc/testsuite]

PR target/88316
* gcc.target/powerpc/bmi-check.h: Remove test for
__BUILTIN_CPU_SUPPORTS__, thereby enabling test code to run.
* gcc.target/powerpc/bmi2-check.h: Likewise.
* gcc.target/powerpc/mmx-check.h: Likewise.
* gcc.target/powerpc/sse-check.h: Likewise.
* gcc.target/powerpc/sse2-check.h: Likewise.
* gcc.target/powerpc/sse3-check.h: Likewise.

Modified:
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/gcc.target/powerpc/bmi-check.h
trunk/gcc/testsuite/gcc.target/powerpc/bmi2-check.h
trunk/gcc/testsuite/gcc.target/powerpc/mmx-check.h
trunk/gcc/testsuite/gcc.target/powerpc/sse-check.h
trunk/gcc/testsuite/gcc.target/powerpc/sse2-check.h
trunk/gcc/testsuite/gcc.target/powerpc/sse3-check.h

[Bug target/88316] numerous big-endian issues with compatibility implementations of vector intrinsics for powerpc

2018-12-06 Thread pc at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88316

--- Comment #2 from pc at gcc dot gnu.org ---
Author: pc
Date: Thu Dec  6 22:11:01 2018
New Revision: 266869

URL: https://gcc.gnu.org/viewcvs?rev=266869=gcc=rev
Log:
[rs6000] Fix x86-compat vector intrinsics testcases for BE, 32bit

Fix general endian issues found in the test cases for thecompatibility
implementations of the x86 vector intrinsics.  (The tests had been
inadvertently made to PASS without actually running the test code.
A later patch fixes this issue.)

Additionally, a new  is added, as some of the APIs therein are
now used by the test cases.  It is _not_ a complete implementation of the
SSE4 interfaces, only the few "extract" interfaces uses by the tests.

2018-12-06  Paul A. Clarke  

[gcc]

PR target/88316
* config/rs6000/smmintrin.h: New file.
* config.gcc: Add smmintrin.h to extra_headers for powerpc*-*-*.

[gcc/testsuite]

PR target/88316
* gcc.target/powerpc/mmx-packssdw-1.c: Fixes for big-endian.
* gcc.target/powerpc/mmx-packsswb-1.c: Likewise.
* gcc.target/powerpc/mmx-packuswb-1.c: Likewise.
* gcc.target/powerpc/mmx-pmulhw-1.c: Likewise.
* gcc.target/powerpc/sse-cvtpi32x2ps-1.c: Likewise.
* gcc.target/powerpc/sse-cvtpu16ps-1.c: Likewise.
* gcc.target/powerpc/sse-cvtss2si-1.c: Likewise.
* gcc.target/powerpc/sse-cvtss2si-2.c: Likewise.
* gcc.target/powerpc/sse2-pshufhw-1.c: Likewise.
* gcc.target/powerpc/sse2-pshuflw-1.c: Likewise.



Added:
trunk/gcc/config/rs6000/smmintrin.h
Modified:
trunk/gcc/ChangeLog
trunk/gcc/config.gcc
trunk/gcc/testsuite/ChangeLog
trunk/gcc/testsuite/gcc.target/powerpc/mmx-packssdw-1.c
trunk/gcc/testsuite/gcc.target/powerpc/mmx-packsswb-1.c
trunk/gcc/testsuite/gcc.target/powerpc/mmx-packuswb-1.c
trunk/gcc/testsuite/gcc.target/powerpc/mmx-pmulhw-1.c
trunk/gcc/testsuite/gcc.target/powerpc/sse-cvtpi32x2ps-1.c
trunk/gcc/testsuite/gcc.target/powerpc/sse-cvtpu16ps-1.c
trunk/gcc/testsuite/gcc.target/powerpc/sse-cvtss2si-1.c
trunk/gcc/testsuite/gcc.target/powerpc/sse-cvtss2si-2.c
trunk/gcc/testsuite/gcc.target/powerpc/sse2-pshufhw-1.c
trunk/gcc/testsuite/gcc.target/powerpc/sse2-pshuflw-1.c

[Bug target/88316] numerous big-endian issues with compatibility implementations of vector intrinsics for powerpc

2018-12-06 Thread pc at gcc dot gnu.org 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88316

--- Comment #1 from pc at gcc dot gnu.org ---
Author: pc
Date: Thu Dec  6 22:03:25 2018
New Revision: 266868

URL: https://gcc.gnu.org/viewcvs?rev=266868=gcc=rev
Log:
[rs6000] x86-compat vector intrinsics fixes for BE, 32bit

Fix general endian and 32-bit mode issues found in the
compatibility implementations of the x86 vector intrinsics when running the
associated test suite tests.  (The tests had been inadvertently made to PASS
without actually running the test code.  A later patch fixes this issue.)

2018-12-03  Paul A. Clarke  

PR target/88316
* config/rs6000/mmintrin.h (_mm_unpackhi_pi8): Fix for big-endian.
(_mm_unpacklo_pi8): Likewise.
(_mm_mulhi_pi16): Likewise.
(_mm_packs_pi16): Fix for big-endian. Use preferred API.
(_mm_packs_pi32): Likewise.
(_mm_packs_pu16): Likewise.
* config/rs6000/xmmintrin.h (_mm_cvtss_si32): Fix for big-endian.
(_mm_cvtss_si64): Likewise.
(_mm_cvtpi32x2_ps): Likewise.
(_mm_shuffle_ps): Likewise.
(_mm_movemask_pi8): Likewise.
(_mm_mulhi_pu16): Likewise.
(_mm_sad_pu8): Likewise.
(_mm_sad_pu8): Likewise.
(_mm_cvtpu16_ps): Fix for big-endian. Use preferred API.
(_mm_cvtpu8_ps): Likewise.
(_mm_movemask_ps): Better #else case for big-endian (no functional
change).
(_mm_shuffle_pi16): Likewise.
* config/rs6000/emmintrin.h (_mm_movemask_pd): Fix for big-endian.
Better #else case for big-endian (no functional change).
(_mm_movemask_epi8): Likewise.
(_mm_shufflehi_epi16): Likewise.
(_mm_shufflelo_epi16): Likewise.
(_mm_shuffle_epi32): Likewise.
(_mm_mul_epu32): Fix for big-endian.
(_mm_bsrli_si128): Likewise.
(_mm_cvtps_pd): Better #else case for big endian.
(_mm_mulhi_epi16): Likewise.
(_mm_mul_epu32): Likewise.
(_mm_slli_si128): Likewise.
(_mm_sll_epi16): Likewise.
(_mm_sll_epi32): Likewise.
(_mm_sra_epi16): Likewise.
(_mm_sra_epi32): Likewise.
(_mm_srl_epi16): Likewise.
(_mm_srl_epi32): Likewise.
(_mm_mulhi_epu16): Likewise.
(_mm_sad_epu8): Likewise.
* config/rs6000/pmmintrin.h (_mm_hadd_ps): Fix for big-endian.
(_mm_sub_ps): Likewise.
* config/rs6000/mmintrin.h (_mm_cmpeq_pi8): Fix for 32-bit mode.
* gcc/config/rs6000/tmmintrin.h (_mm_alignr_epi8): Use ENDIAN
macros consistently (no functional changes).
(_mm_alignr_pi8): Likewise.

Modified:
trunk/gcc/ChangeLog
trunk/gcc/config/rs6000/emmintrin.h
trunk/gcc/config/rs6000/mmintrin.h
trunk/gcc/config/rs6000/pmmintrin.h
trunk/gcc/config/rs6000/tmmintrin.h
trunk/gcc/config/rs6000/xmmintrin.h