[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 --- Comment #14 from CVS Commits --- The releases/gcc-8 branch has been updated by Christophe Lyon : https://gcc.gnu.org/g:bcc4f85667c88f9be098f2671b01831d4b8d9f7c commit r8-10957-gbcc4f85667c88f9be098f2671b01831d4b8d9f7c Author: Kyrylo Tkachov Date: Tue Mar 30 14:07:50 2021 +0100 aarch64: Fix gcc.target/aarch64/pr99808.c for ILP32 Fix test for -mabi=ilp32 gcc/testsuite/ChangeLog: PR target/99808 * gcc.target/aarch64/pr99808.c: Use ULL constant suffix.
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 --- Comment #13 from CVS Commits --- The releases/gcc-9 branch has been updated by Christophe Lyon : https://gcc.gnu.org/g:c9c429cf986c885cf90259866186849de44e1e1f commit r9-9520-gc9c429cf986c885cf90259866186849de44e1e1f Author: Kyrylo Tkachov Date: Tue Mar 30 14:07:50 2021 +0100 aarch64: Fix gcc.target/aarch64/pr99808.c for ILP32 Fix test for -mabi=ilp32 gcc/testsuite/ChangeLog: PR target/99808 * gcc.target/aarch64/pr99808.c: Use ULL constant suffix.
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 --- Comment #12 from CVS Commits --- The releases/gcc-8 branch has been updated by Kyrylo Tkachov : https://gcc.gnu.org/g:64b6b1d1bc796a7fea189a4c4b0e290540f51ae3 commit r8-10956-g64b6b1d1bc796a7fea189a4c4b0e290540f51ae3 Author: Kyrylo Tkachov Date: Fri May 7 11:36:54 2021 +0100 aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patterns This patch fixes the RTL representation of the move_lo_quad patterns to use aarch64_simd_or_scalar_imm_zero for the zero part rather than a vec_duplicate of zero or a const_int 0. The expander that generates them is also adjusted so that we use and match the correct const_vector forms throughout. Co-Authored-By: Jakub Jelinek gcc/ChangeLog: PR target/99037 PR target/100441 * config/aarch64/aarch64-simd.md (move_lo_quad_internal_): Use aarch64_simd_or_scalar_imm_zero to match zeroes. Remove pattern matching const_int 0. (move_lo_quad_internal_be_): Likewise. (move_lo_quad_): Update for the above. * config/aarch64/iterators.md (VQ_2E): Delete. gcc/testsuite/ChangeLog: PR target/99808 * gcc.target/aarch64/pr99808.c: New test.
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 --- Comment #11 from CVS Commits --- The releases/gcc-9 branch has been updated by Kyrylo Tkachov : https://gcc.gnu.org/g:3a9504e1f03bc2980062dc62261212e8635bcf93 commit r9-9519-g3a9504e1f03bc2980062dc62261212e8635bcf93 Author: Kyrylo Tkachov Date: Fri May 7 11:35:29 2021 +0100 aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patterns This patch fixes the RTL representation of the move_lo_quad patterns to use aarch64_simd_or_scalar_imm_zero for the zero part rather than a vec_duplicate of zero or a const_int 0. The expander that generates them is also adjusted so that we use and match the correct const_vector forms throughout. Co-Authored-By: Jakub Jelinek gcc/ChangeLog: PR target/99037 PR target/100441 * config/aarch64/aarch64-simd.md (move_lo_quad_internal_): Use aarch64_simd_or_scalar_imm_zero to match zeroes. Remove pattern matching const_int 0. (move_lo_quad_internal_be_): Likewise. (move_lo_quad_): Update for the above. * config/aarch64/iterators.md (VQ_2E): Delete. gcc/testsuite/ChangeLog: PR target/99808 * gcc.target/aarch64/pr99808.c: New test.
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 --- Comment #10 from CVS Commits --- The releases/gcc-10 branch has been updated by Kyrylo Tkachov : https://gcc.gnu.org/g:c611209a3422d2a2dc10bc804986db9bfb80a62e commit r10-9629-gc611209a3422d2a2dc10bc804986db9bfb80a62e Author: Kyrylo Tkachov Date: Tue Mar 30 14:07:50 2021 +0100 aarch64: Fix gcc.target/aarch64/pr99808.c for ILP32 Fix test for -mabi=ilp32 gcc/testsuite/ChangeLog: PR target/99808 * gcc.target/aarch64/pr99808.c: Use ULL constant suffix. (cherry picked from commit 41d57b2a97c44ae7b0a5b01ae703a8f0d0495238)
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 --- Comment #9 from CVS Commits --- The releases/gcc-10 branch has been updated by Kyrylo Tkachov : https://gcc.gnu.org/g:1a92899b08e61d503a2897f2f66b064eb84706bc commit r10-9628-g1a92899b08e61d503a2897f2f66b064eb84706bc Author: Kyrylo Tkachov Date: Mon Mar 29 11:52:24 2021 +0100 aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patterns This patch fixes the RTL representation of the move_lo_quad patterns to use aarch64_simd_or_scalar_imm_zero for the zero part rather than a vec_duplicate of zero or a const_int 0. The expander that generates them is also adjusted so that we use and match the correct const_vector forms throughout. Co-Authored-By: Jakub Jelinek gcc/ChangeLog: PR target/99037 * config/aarch64/aarch64-simd.md (move_lo_quad_internal_): Use aarch64_simd_or_scalar_imm_zero to match zeroes. Remove pattern matching const_int 0. (move_lo_quad_internal_be_): Likewise. (move_lo_quad_): Update for the above. * config/aarch64/iterators.md (VQ_2E): Delete. gcc/testsuite/ChangeLog: PR target/99808 * gcc.target/aarch64/pr99808.c: New test.
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 --- Comment #8 from CVS Commits --- The master branch has been updated by Kyrylo Tkachov : https://gcc.gnu.org/g:41d57b2a97c44ae7b0a5b01ae703a8f0d0495238 commit r11-7907-g41d57b2a97c44ae7b0a5b01ae703a8f0d0495238 Author: Kyrylo Tkachov Date: Tue Mar 30 14:07:50 2021 +0100 aarch64: Fix gcc.target/aarch64/pr99808.c for ILP32 Fix test for -mabi=ilp32 gcc/testsuite/ChangeLog: PR target/99808 * gcc.target/aarch64/pr99808.c: Use ULL constant suffix.
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 --- Comment #7 from CVS Commits --- The master branch has been updated by Kyrylo Tkachov : https://gcc.gnu.org/g:37d9074e12082132ae62c12fbe958c697f638c0a commit r11-7888-g37d9074e12082132ae62c12fbe958c697f638c0a Author: Kyrylo Tkachov Date: Mon Mar 29 11:52:24 2021 +0100 aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patterns This patch fixes the RTL representation of the move_lo_quad patterns to use aarch64_simd_or_scalar_imm_zero for the zero part rather than a vec_duplicate of zero or a const_int 0. The expander that generates them is also adjusted so that we use and match the correct const_vector forms throughout. Co-Authored-By: Jakub Jelinek gcc/ChangeLog: PR target/99037 * config/aarch64/aarch64-simd.md (move_lo_quad_internal_): Use aarch64_simd_or_scalar_imm_zero to match zeroes. Remove pattern matching const_int 0. (move_lo_quad_internal_be_): Likewise. (move_lo_quad_): Update for the above. * config/aarch64/iterators.md (VQ_2E): Delete. gcc/testsuite/ChangeLog: PR target/99808 * gcc.target/aarch64/pr99808.c: New test.
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED CC||ktkachov at gcc dot gnu.org Resolution|--- |DUPLICATE --- Comment #6 from ktkachov at gcc dot gnu.org --- This is a dup of PR 99037 then. I was planning on fixing it in GCC 12 but since there is an ICE reproducer now I can push it in now *** This bug has been marked as a duplicate of bug 99037 ***
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 Jakub Jelinek changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |jakub at gcc dot gnu.org Status|NEW |ASSIGNED --- Comment #5 from Jakub Jelinek --- Created attachment 50482 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=50482=edit gcc11-pr99808.patch Untested fix.
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 --- Comment #4 from Jakub Jelinek --- The bug is clearly on the aarch64 backend side, (insn 7 6 8 (set (reg/v:V2DF 73 [ arg2 ]) (vec_concat:V2DF (reg:DF 75) (const_int 0 [0]))) "pr99808.c":9 -1 (nil)) (insn 8 7 0 (set (reg/v:V2DF 73 [ arg2 ]) (vec_concat:V2DF (vec_select:DF (reg/v:V2DF 73 [ arg2 ]) (parallel:V2DF [ (const_int 0 [0]) ])) (reg:DF 76))) "pr99808.c":9 -1 (nil)) is IMNSHO invalid RTL in both cases. const0_rtx is not valid constant for DFmode.
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org --- Comment #3 from Jakub Jelinek --- Sorry, meant r8-4318-g26895c21eb10cfd6c00285e13e6f13a751d9
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808 --- Comment #2 from Jakub Jelinek --- Started with r7-8376-g726e7a70b911f4676de4a97b19e042552ceedd17
[Bug target/99808] [8/9/10/11 Regression] ICE in as_a, at machmode.h:365
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99808
Richard Biener changed:
What|Removed |Added
Last reconfirmed||2021-03-29
Target Milestone|--- |8.5
Keywords||wrong-code
Component|debug |target
Status|UNCONFIRMED |NEW
Ever confirmed|0 |1
Priority|P3 |P2
--- Comment #1 from Richard Biener ---
Confirmed. We're having a
(note 32 30 31 (var_location arg2 (const_vector:V2DF [
(const_double:DF 0.0 [0x0.0p+0])
(const_int 0 [0])
])) NOTE_INSN_VAR_LOCATION)
note which obviously will fail a scalar_float_mode assessment. This first
appears in CSE1 as
(insn 8 7 9 2 (set (reg/v:V2DF 92 [ arg2 ])
(const_vector:V2DF [
(const_double:DF 0.0 [0x0.0p+0])
(const_int 0 [0])
])) "t.c":9:22 1167 {*aarch64_simd_movv2df}
(expr_list:REG_DEAD (reg:DF 94)
(nil)))
and is likely a backend pattern issue.
