[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240 Kewen Lin changed: What|Removed |Added Resolution|--- |FIXED CC||rsandifo at gcc dot gnu.org Status|NEW |RESOLVED --- Comment #11 from Kewen Lin --- The failures on powerpc should be fixed now. Hi Andre/Richard, for now effective target vect_long_long isn't supported on aarch64-*-*, it looks like an oversight?
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240
--- Comment #10 from CVS Commits ---
The master branch has been updated by Kewen Lin :
https://gcc.gnu.org/g:225f9c8805fb1ba68a877383095f38a9563526ee
commit r13-3535-g225f9c8805fb1ba68a877383095f38a9563526ee
Author: Kewen Lin
Date: Thu Oct 27 22:30:16 2022 -0500
testsuite: Adjust vect-bitfield-read-* with vect_shift and vect_long_long
[PR107240]
The test cases vect-bitfield-read-* requires vector shift
target support, they need one explicit vect_shift effective
target requirement checking. Besides, the vectype for struct
in test cases vect-bitfield-read-{2,4} is vector of long long,
we need to check effective target vect_long_long for them.
This patch can help to fix all remaining vect-bitfield-{read,
write}-* test failures on powerpc.
PR testsuite/107240
gcc/testsuite/ChangeLog:
* gcc.dg/vect/vect-bitfield-read-1.c: Add effective target checking
vect_shift.
* gcc.dg/vect/vect-bitfield-read-3.c: Likewise.
* gcc.dg/vect/vect-bitfield-read-5.c: Likewise.
* gcc.dg/vect/vect-bitfield-read-6.c: Likewise.
* gcc.dg/vect/vect-bitfield-read-7.c: Likewise.
* gcc.dg/vect/vect-bitfield-read-2.c: Add effective target checking
vect_shift and replace vect_int with vect_long_long.
* gcc.dg/vect/vect-bitfield-read-4.c: Likewise.
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240
--- Comment #9 from CVS Commits ---
The master branch has been updated by Kewen Lin :
https://gcc.gnu.org/g:5d6e834ecf212e7fc6f585b154af224d2e38c749
commit r13-3396-g5d6e834ecf212e7fc6f585b154af224d2e38c749
Author: Kewen Lin
Date: Thu Oct 20 04:07:05 2022 -0500
vect: Simplify first for shifted value generation [PR107240]
As PR107240 shows, when both the value to be shifted and the
count used for shifting are constants, it can be simplified
to one constant value, and doesn't actually require to check
if the current target supports vector shift operations or not.
This patch uses a canonical way proposed by Richi to generate
the shifted value, if it can be simplified, the shift operation
would be gone, otherwise it's the same as before.
It can help to fix the failures of vect-bitfield-write-{2,3}.c
on Power.
PR tree-optimization/107240
2022-10-20 Richard Biener
gcc/ChangeLog:
* tree-vect-patterns.cc (vect_recog_bit_insert_pattern): Attempt to
simplify shifted value first.
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240 Richard Biener changed: What|Removed |Added Priority|P3 |P1
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240
--- Comment #8 from Kewen Lin ---
(In reply to Kewen Lin from comment #7)
> Well, it does helps vect-bitfield-write-{2,3}.c, but it doesn't help
> vect-bitfield-write-{2,3,4}.c since they do require vector/vector shift
Oops, typo here, should be vect-bitfield-read-{2,3,4}.c.
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240
--- Comment #7 from Kewen Lin ---
Well, it does helps vect-bitfield-write-{2,3}.c, but it doesn't help
vect-bitfield-write-{2,3,4}.c since they do require vector/vector shift
supports.
I guess it might be a good idea to add the vect_long_long effective target
requirement for these relevant test cases. For now, I don't see we make it
effective for powerpc*-*-*, if no objections I'm going to test
diff --git a/gcc/testsuite/lib/target-supports.exp
b/gcc/testsuite/lib/target-supports.exp
index fdd88e6a516..29d7b4ebd15 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -7059,7 +7059,9 @@ proc check_effective_target_vect_long_long { } {
|| ([istarget mips*-*-*]
&& [et-is-effective-target mips_msa])
|| ([istarget s390*-*-*]
- && [check_effective_target_s390_vx]) }}]
+ && [check_effective_target_s390_vx])
+ || ([istarget powerpc*-*-*]
+ && [check_effective_target_has_arch_pwr8]) }}]
}
Although it's not that accurate, as we can have V2DI vector load/store and some
operations like bitwise on power7, it's only for testing and the missing scope
is very limited.
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240
Kewen Lin changed:
What|Removed |Added
CC||linkw at gcc dot gnu.org
--- Comment #6 from Kewen Lin ---
The reason why it fails on power7 is that power7 misses the vector/vector shift
support for V2DImode (type vector(2) long unsigned int), the support querying
is for the gimple statement:
patt_25 = 5 << 28;
It's expected since vsld is supported till ISA 2.07 (power8) (Note that we have
vslb/vslh/vslw since ISA 2.03).
But you might have noticed that both shifted value and shifting count are
constants for this particular test case, so it doesn't need the actual
vector/vector shift target support here. One tiny enhancement as below can make
us not need to special case this for Power port.
diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc
index 0cc315d3126..01d043a3d18 100644
--- a/gcc/tree-vect-patterns.cc
+++ b/gcc/tree-vect-patterns.cc
@@ -2115,9 +2115,10 @@ vect_recog_bit_insert_pattern (vec_info *vinfo,
stmt_vec_info stmt_info,
tree shifted = value;
if (shift_n)
{
+ tree shifted_value = fold_build2 (LSHIFT_EXPR, container_type, value,
shift);
pattern_stmt
= gimple_build_assign (vect_recog_temp_ssa_var (container_type),
- LSHIFT_EXPR, value, shift);
+ shifted_value);
append_pattern_def_seq (vinfo, stmt_info, pattern_stmt);
shifted = gimple_get_lhs (pattern_stmt);
}
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240
--- Comment #5 from Segher Boessenkool ---
So perhaps this needs instructions new on P8 (which fleshed out the integer
support amongst other things, but that sounds relevant here?) Test that with
{ powerpc*-*-* && has_arch_pwr8 }
or such? But please make sure this is the reason first :-)
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240 --- Comment #4 from avieira at gcc dot gnu.org --- Might be worth posting the output of -fdump-tree-vect-all might be failing to vectorize due to some specific lack of feature that we can test for.
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240 --- Comment #3 from Segher Boessenkool --- (In reply to Peter Bergner from comment #1) > I guess the first question is, is it expected that the > vect-bitfield-write-2.c loop should be vectorized on power7 which only has > Altivec and not VSX? P7 has VSX. It is the first processor with VSX.
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240 Richard Biener changed: What|Removed |Added Keywords||testsuite-fail Target Milestone|--- |13.0
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240
--- Comment #2 from avieira at gcc dot gnu.org ---
Hi Seurer, Peter,
Adding something like: { xfail { powerpc*-*-* && { ! powerpc_vsx_ok } } } }
should xfail all powerpc architectures that don't support this no?
[Bug testsuite/107240] [13 Regression] FAIL: gcc.dg/vect/vect-bitfield-write-2.c since r13-3219-g25413fdb2ac249
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107240 Martin Liška changed: What|Removed |Added Summary|[13 regression] |[13 Regression] FAIL: ||gcc.dg/vect/vect-bitfield-w ||rite-2.c since ||r13-3219-g25413fdb2ac249 Ever confirmed|0 |1 CC||marxin at gcc dot gnu.org Last reconfirmed||2022-10-13 Status|UNCONFIRMED |NEW
