[Bug tree-optimization/102393] Failure to optimize 2 8-bit stores into a single 16-bit store

[rguenth at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102393

--- Comment #4 from Richard Biener  ---
SLSR might come to the rescue eventually but same as the other PR,
store-merging doesn't perform any advanced DR analysis.

[Bug tree-optimization/102393] Failure to optimize 2 8-bit stores into a single 16-bit store

[gabravier at gmail dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102393

--- Comment #3 from Gabriel Ravier  ---
It seems odd that the equivalent 32-bit pattern, i.e. this:

void HeaderWriteU32LE(int offset, uint32_t value, uint8_t *RomHeader)
{
RomHeader[offset] = value;
RomHeader[offset + 1] = value >> 8;
RomHeader[offset + 2] = value >> 16;
RomHeader[offset + 3] = value >> 24;
}

is optimized to a single store, though, even though the 32-bit pattern for PR
102391 doesn't. It's why I made this a separate bug report, as I thought it
indicated a likely difference in the cause of the bug.

[Bug tree-optimization/102393] Failure to optimize 2 8-bit stores into a single 16-bit store

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102393

--- Comment #2 from Andrew Pinski  ---
that is offset = 0; works.

[Bug tree-optimization/102393] Failure to optimize 2 8-bit stores into a single 16-bit store

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102393

Andrew Pinski  changed:

   What|Removed |Added

   Last reconfirmed||2021-09-18
 Ever confirmed|0   |1
 Status|UNCONFIRMED |NEW
   See Also||https://gcc.gnu.org/bugzill
   ||a/show_bug.cgi?id=102391
   Severity|normal  |enhancement

--- Comment #1 from Andrew Pinski  ---
Really the same issue as PR 102391 bug on the store side rather than the load
side.