[Bug tree-optimization/111765] RISC-V: Faild to vectorize gen-vect-34.c

[juzhe.zhong at rivai dot ai via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111765

--- Comment #3 from JuzheZhong  ---
If we specify the vector length to RVV and SVE:

https://godbolt.org/z/njvsqYWhn

Both can vectorize.

ARM SVE: -msve-vector-bits=128

RVV: --param=riscv-autovec-preference=fixed-vlmax

[Bug tree-optimization/111765] RISC-V: Faild to vectorize gen-vect-34.c

[juzhe.zhong at rivai dot ai via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111765

--- Comment #2 from JuzheZhong  ---
(In reply to Andrew Pinski from comment #1)
> For SVE:
> /app/example.cpp:6:18: missed:   missing target support for reduction on
> variable-length vectors.
> 
> I assume it is the same issue for RVV.

Yeah.

So may be we should adjust the dump check:

/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target
vect_masked_load && !vect_variable_length } } } */

?

[Bug tree-optimization/111765] RISC-V: Faild to vectorize gen-vect-34.c

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111765

--- Comment #1 from Andrew Pinski  ---
For SVE:
/app/example.cpp:6:18: missed:   missing target support for reduction on
variable-length vectors.

I assume it is the same issue for RVV.