[committed] TILE-Gx/TILEPro: use pc relative/indirect encoding in eh data
This patch switches eh data to always use pc relative/indirect
encoding, to avoid relocations of unaligned words. Backported to 4.7
and 4.8.
* config/tilegx/tilegx.c (tilegx_asm_preferred_eh_data_format):
Use indirect/pcrel encoding.
* config/tilepro/tilepro.c (tilepro_asm_preferred_eh_data_format):
Ditto.
Index: gcc/config/tilegx/tilegx.c
===
--- gcc/config/tilegx/tilegx.c (revision 197072)
+++ gcc/config/tilegx/tilegx.c (working copy)
@@ -4786,13 +4786,8 @@ tilegx_reorg (void)
int
tilegx_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global)
{
- if (flag_pic)
-{
- int type = TARGET_32BIT ? DW_EH_PE_sdata4 : DW_EH_PE_sdata8;
- return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | type;
-}
- else
-return DW_EH_PE_absptr;
+ int type = TARGET_32BIT ? DW_EH_PE_sdata4 : DW_EH_PE_sdata8;
+ return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | type;
}
Index: gcc/config/tilepro/tilepro.c
===
--- gcc/config/tilepro/tilepro.c(revision 197072)
+++ gcc/config/tilepro/tilepro.c(working copy)
@@ -4338,10 +4338,7 @@ tilepro_reorg (void)
int
tilepro_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global)
{
- if (flag_pic)
-return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4;
- else
-return DW_EH_PE_absptr;
+ return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4;
}
[committed] TILE-Gx: speed up code to synthesize a constant
This patch inlines some tests while searching for the best way to
synthesize a constant, to avoid the need to generate an rtx. This
became expensive for code that generates a lot of constants.
Backported to 4.7 and 4.8.
* config/tilegx/tilegx.c (expand_set_cint64_one_inst): Inline
tests for constraint J, K, N, P.
Index: gcc/config/tilegx/tilegx.c
===
--- gcc/config/tilegx/tilegx.c (revision 197073)
+++ gcc/config/tilegx/tilegx.c (working copy)
@@ -1429,14 +1429,16 @@ expand_set_cint64_one_inst (rtx dest_reg
}
else if (!three_wide_only)
{
- rtx imm_op = GEN_INT (val);
-
- if (satisfies_constraint_J (imm_op)
- || satisfies_constraint_K (imm_op)
- || satisfies_constraint_N (imm_op)
- || satisfies_constraint_P (imm_op))
+ /* Test for the following constraints: J, K, N, P. We avoid
+generating an rtx and using existing predicates because we
+can be testing and rejecting a lot of constants, and GEN_INT
+is O(N). */
+ if ((val = -32768 val = 65535)
+ || ((val == (val 0xFF) * 0x0101010101010101LL))
+ || (val == ((trunc_int_for_mode (val, QImode) 0x)
+ * 0x0001000100010001LL)))
{
- emit_move_insn (dest_reg, imm_op);
+ emit_move_insn (dest_reg, GEN_INT (val));
return true;
}
}
[committed] TILE-Gx: add float conversion patterns.
This patch adds patterns for floatsisf2, floatunssisf2, floatsidf2,
and floatunssidf2.
* config/tilegx/tilegx.md (floatsisf2): New pattern.
(floatunssisf2): New pattern.
(floatsidf2): New pattern.
(floatunssidf2): New pattern.
Index: gcc/config/tilegx/tilegx.md
===
--- gcc/config/tilegx/tilegx.md (revision 197072)
+++ gcc/config/tilegx/tilegx.md (working copy)
@@ -2129,6 +2129,108 @@
rotl\t%0, %r1, %r2)
+;; Integer to floating point conversions
+
+(define_expand floatsisf2
+ [(set (match_operand:SF 0 register_operand )
+ (float:SI (match_operand:SI 1 register_operand )))]
+
+{
+ rtx result = gen_lowpart (DImode, operands[0]);
+ rtx a = operands[1];
+
+ rtx nega = gen_reg_rtx (SImode);
+ rtx exp = gen_reg_rtx (DImode);
+ rtx sign = gen_reg_rtx (DImode);
+ rtx abs = gen_reg_rtx (DImode);
+ rtx flags = gen_reg_rtx (DImode);
+ rtx tmp1 = gen_reg_rtx (DImode);
+ rtx tmp2 = gen_reg_rtx (DImode);
+
+ emit_move_insn (exp, GEN_INT (0x9e));
+
+ emit_insn (gen_negsi2 (nega, a));
+
+ emit_insn (gen_insn_cmplts_sisi (gen_lowpart (SImode, sign), a, const0_rtx));
+ emit_insn (gen_insn_cmoveqz (abs, gen_lowpart (DImode, nega), sign,
+ gen_lowpart (DImode, a)));
+
+ emit_insn (gen_insn_bfins (tmp1, exp, sign, GEN_INT (10), GEN_INT (10)));
+ emit_insn (gen_insn_bfins (tmp2, tmp1, abs, GEN_INT (32), GEN_INT (63)));
+ emit_insn (gen_insn_fsingle_pack1 (flags, tmp2));
+ emit_insn (gen_insn_fsingle_pack2 (result, tmp2, flags));
+ DONE;
+})
+
+(define_expand floatunssisf2
+ [(set (match_operand:SF 0 register_operand )
+ (float:SI (match_operand:SI 1 register_operand )))]
+
+{
+ rtx result = gen_lowpart (DImode, operands[0]);
+ rtx a = operands[1];
+
+ rtx exp = gen_reg_rtx (DImode);
+ rtx flags = gen_reg_rtx (DImode);
+ rtx tmp = gen_reg_rtx (DImode);
+
+ emit_move_insn (exp, GEN_INT (0x9e));
+ emit_insn (gen_insn_bfins (tmp, exp, gen_lowpart (DImode, a),
+ GEN_INT (32), GEN_INT (63)));
+ emit_insn (gen_insn_fsingle_pack1 (flags, tmp));
+ emit_insn (gen_insn_fsingle_pack2 (result, tmp, flags));
+ DONE;
+})
+
+(define_expand floatsidf2
+ [(set (match_operand:DF 0 register_operand )
+ (float:SI (match_operand:SI 1 register_operand )))]
+
+{
+ rtx result = gen_lowpart (DImode, operands[0]);
+ rtx a = gen_lowpart (DImode, operands[1]);
+
+ rtx nega = gen_reg_rtx (DImode);
+ rtx exp = gen_reg_rtx (DImode);
+ rtx sign = gen_reg_rtx (DImode);
+ rtx abs = gen_reg_rtx (DImode);
+ rtx tmp1 = gen_reg_rtx (DImode);
+ rtx tmp2 = gen_reg_rtx (DImode);
+ rtx tmp3 = gen_reg_rtx (DImode);
+
+ emit_move_insn (exp, GEN_INT (0x21b00));
+
+ emit_insn (gen_negdi2 (nega, a));
+
+ emit_insn (gen_insn_cmplts_didi (sign, a, const0_rtx));
+ emit_insn (gen_insn_cmovnez (abs, a, sign, nega));
+
+ emit_insn (gen_ashldi3 (tmp1, abs, GEN_INT (4)));
+ emit_insn (gen_insn_bfins (tmp2, exp, sign, GEN_INT (20), GEN_INT (20)));
+ emit_insn (gen_insn_fdouble_pack1 (tmp3, tmp1, tmp2));
+ emit_insn (gen_insn_fdouble_pack2 (result, tmp3, tmp1, const0_rtx));
+ DONE;
+})
+
+(define_expand floatunssidf2
+ [(set (match_operand:DF 0 register_operand )
+ (float:SI (match_operand:SI 1 register_operand )))]
+
+{
+ rtx result = gen_lowpart (DImode, operands[0]);
+ rtx a = gen_lowpart (DImode, operands[1]);
+
+ rtx exp = gen_reg_rtx (DImode);
+ rtx tmp1 = gen_reg_rtx (DImode);
+ rtx tmp2 = gen_reg_rtx (DImode);
+
+ emit_move_insn (exp, GEN_INT (0x21b00));
+ emit_insn (gen_insn_bfins (tmp1, const0_rtx, a, GEN_INT (4), GEN_INT (35)));
+ emit_insn (gen_insn_fdouble_pack1 (tmp2, tmp1, exp));
+ emit_insn (gen_insn_fdouble_pack2 (result, tmp2, tmp1, const0_rtx));
+ DONE;
+})
+
;;
;; Multiplies
[committed] TILE-Gx: add __insn_shufflebytes1 intrinsic
This patch adds the __insn_shufflebytes1, which takes only one argument.
result = __insn_shufflebytes1(input, select);
is equivalent to:
result = __insn_shufflebytes(result, input, select);
It has the advantage that the compiler will not waste a cycle
initializing result unnecessarily. It is the user's responsibility to
ensure that the select value is only selecting bytes from the second
operand. This has been backported to 4.7 and 4.8.
* config/tilegx/tilegx-builtins.h (enum tilegx_builtin): Add
TILEGX_INSN_SHUFFLEBYTES1.
* config/tilegx/tilegx.c (tilegx_builtin_info): Add entry for
shufflebytes1.
(tilegx_builtins): Ditto.
* config/tilegx/tilegx.md (insn_shufflebytes1): New pattern.
Index: gcc/config/tilegx/tilegx.md
===
--- gcc/config/tilegx/tilegx.md (revision 197079)
+++ gcc/config/tilegx/tilegx.md (working copy)
@@ -3959,6 +3959,15 @@
shufflebytes\t%0, %r2, %r3
[(set_attr type X0)])
+(define_insn insn_shufflebytes1
+ [(set (match_operand:DI 0 register_operand =r)
+(unspec:DI [(match_operand:DI 1 reg_or_0_operand rO)
+(match_operand:DI 2 reg_or_0_operand rO)]
+ UNSPEC_INSN_SHUFFLEBYTES))]
+
+ shufflebytes\t%0, %r1, %r2
+ [(set_attr type X0)])
+
;; stores
(define_expand insn_st
Index: gcc/config/tilegx/tilegx-builtins.h
===
--- gcc/config/tilegx/tilegx-builtins.h (revision 197072)
+++ gcc/config/tilegx/tilegx-builtins.h (working copy)
@@ -193,6 +193,7 @@ enum tilegx_builtin
TILEGX_INSN_SHRU,
TILEGX_INSN_SHRUX,
TILEGX_INSN_SHUFFLEBYTES,
+ TILEGX_INSN_SHUFFLEBYTES1,
TILEGX_INSN_ST,
TILEGX_INSN_ST1,
TILEGX_INSN_ST2,
Index: gcc/config/tilegx/tilegx.c
===
--- gcc/config/tilegx/tilegx.c (revision 197074)
+++ gcc/config/tilegx/tilegx.c (working copy)
@@ -2897,6 +2897,7 @@ static struct tile_builtin_info tilegx_b
{ CODE_FOR_lshrdi3, NULL }, /* shru */
{ CODE_FOR_lshrsi3, NULL }, /* shrux */
{ CODE_FOR_insn_shufflebytes, NULL }, /* shufflebytes */
+ { CODE_FOR_insn_shufflebytes1,NULL }, /* shufflebytes1 */
{ CODE_FOR_insn_st, NULL }, /* st */
{ CODE_FOR_insn_st1, NULL }, /* st1 */
{ CODE_FOR_insn_st2, NULL }, /* st2 */
@@ -3225,6 +3226,7 @@ static const struct tilegx_builtin_def t
{ __insn_shrux, TILEGX_INSN_SHRUX, true, iii
},
{ __insn_shruxi, TILEGX_INSN_SHRUX, true, iii
},
{ __insn_shufflebytes, TILEGX_INSN_SHUFFLEBYTES, true,
},
+ { __insn_shufflebytes1, TILEGX_INSN_SHUFFLEBYTES1, true, lll
},
{ __insn_st, TILEGX_INSN_ST, false, vpl
},
{ __insn_st1,TILEGX_INSN_ST1,false, vpl
},
{ __insn_st2,TILEGX_INSN_ST2,false, vpl
},
[committed] TILE-Gx: add flags to CRTSTUFF_T_CFLAGS_S variable.
This patch adds -fno-asynchronous-unwind-tables -mcmodel=large to CRTSTUFF_T_CFLAGS_S. Backported to 4.8. * config/tilegx/t-crtstuff: Add -fno-asynchronous-unwind-tables -mcmodel=large to CRTSTUFF_T_CFLAGS_S variable. Index: libgcc/config/tilegx/t-crtstuff === --- libgcc/config/tilegx/t-crtstuff (revision 197072) +++ libgcc/config/tilegx/t-crtstuff (working copy) @@ -2,3 +2,7 @@ # because then __FRAME_END__ might not be the last thing in .eh_frame # section. CRTSTUFF_T_CFLAGS += -fno-asynchronous-unwind-tables +CRTSTUFF_T_CFLAGS_S += -fno-asynchronous-unwind-tables + +# Compile crtbeginS.o and crtendS.o with -mcmodel=large +CRTSTUFF_T_CFLAGS_S += -mcmodel=large
[committed] TILE-Gx/TILEPro: define PROFILE_BEFORE_PROLOGUE
This patch puts profiling code before the prologue, to avoid clobbering used registers. Backported to 4.7 and 4.8. * config/tilegx/tilegx.h (PROFILE_BEFORE_PROLOGUE): Define. * config/tilegx/tilepro.h (PROFILE_BEFORE_PROLOGUE): Define. Index: gcc/config/tilegx/tilegx.h === --- gcc/config/tilegx/tilegx.h (revision 197083) +++ gcc/config/tilegx/tilegx.h (working copy) @@ -287,6 +287,8 @@ enum reg_class #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ ((OFFSET) = tilegx_initial_elimination_offset((FROM),(TO))) +#define PROFILE_BEFORE_PROLOGUE 1 + #define FUNCTION_PROFILER(FILE, LABELNO) \ tilegx_function_profiler (FILE, LABELNO) Index: gcc/config/tilepro/tilepro.h === --- gcc/config/tilepro/tilepro.h(revision 197083) +++ gcc/config/tilepro/tilepro.h(working copy) @@ -268,6 +268,8 @@ enum reg_class #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ ((OFFSET) = tilepro_initial_elimination_offset((FROM),(TO))) +#define PROFILE_BEFORE_PROLOGUE 1 + #define FUNCTION_PROFILER(FILE, LABELNO) \ tilepro_function_profiler (FILE, LABELNO)
RE: [PATCH GCC]Relax the probability condition in CE pass when optimizing for code size
-Original Message- From: Joern Rennecke [mailto:joern.renne...@embecosm.com] Sent: Monday, March 25, 2013 8:53 PM To: Bin Cheng Cc: gcc-patches@gcc.gnu.org Subject: Re: [PATCH GCC]Relax the probability condition in CE pass when optimizing for code size Quoting Bin Cheng bin.ch...@arm.com: During the work I observed passes before combine might interfere with CE pass, so this patch is enabled for ce2/ce3 after combination pass. It is tested on x86/thumb2 for both normal and Os. Is it ok for trunk? There are bound to be target and application specific variations on which scaling factors work best. 2013-03-25 Bin Cheng bin.ch...@arm.com * ifcvt.c (ifcvt_after_combine): New static variable. It would make more sense to pass in the scale factor as a an argument to if_convert. And get the respective values from a set of gcc parameters, so they can be tweaked by ports and/or by a user/ML learning framework (e.g. Milepost) supplying the appropriate --param option. I agree it would be more flexible to pass the factor as parameter, but not sure how useful to users it will be because: firstly it has already been target specific by the BRANCH_COST heuristic; for code size, the heuristic should be tuned to achieve an overall good results, I doubt to which extend it depends on specific target/application. Hi Jeff, This is based on your heuristic tuning in ifcvt, would you help us on this issue with some suggestions? Thanks very much.
[PATCH GCC/ARM]Fix rtx cost for Thumb1
Hi,
As reported in PR56102, arm back end returns wrong rtx cost for pattern
SET/ASHIFT/ASHIFTRT/LSHIFTRT/ROTATERT with multi-word mode. This
causes GCC skipping the split process in lower-subreg.c, and generating
bigger constant pool.
This patch fixes the issue. Tested on arm-none-eabi/thumb1/O2/Os, ok for
trunk?
Thanks.
2013-03-26 Bin Cheng bin.ch...@arm.com
PR target/56102
* config/arm/arm.c (thumb1_rtx_costs, thumb1_size_rtx_costs): Fix
rtx costs for SET/ASHIFT/ASHIFTRT/LSHIFTRT/ROTATERT patterns with
mult-word mode.Index: gcc/config/arm/arm.c
===
--- gcc/config/arm/arm.c(revision 195355)
+++ gcc/config/arm/arm.c(working copy)
@@ -7049,7 +7049,7 @@ static inline int
thumb1_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
{
enum machine_mode mode = GET_MODE (x);
- int total;
+ int total, factor;
switch (code)
{
@@ -7057,6 +7057,8 @@ thumb1_rtx_costs (rtx x, enum rtx_code code, enum
case ASHIFTRT:
case LSHIFTRT:
case ROTATERT:
+ return (mode == SImode) ? COSTS_N_INSNS (1) : COSTS_N_INSNS (2);
+
case PLUS:
case MINUS:
case COMPARE:
@@ -7080,7 +7082,13 @@ thumb1_rtx_costs (rtx x, enum rtx_code code, enum
return COSTS_N_INSNS (1) + 16;
case SET:
- return (COSTS_N_INSNS (1)
+ /* A SET doesn't have a mode, so let's look at the SET_DEST to get
+the mode for the factor. */
+ factor = GET_MODE_SIZE (GET_MODE (SET_DEST (x))) / UNITS_PER_WORD;
+ if (factor == 0)
+ factor = 1;
+
+ return (factor * COSTS_N_INSNS (1)
+ 4 * ((MEM_P (SET_SRC (x)))
+ MEM_P (SET_DEST (x;
@@ -,6 +7785,7 @@ static inline int
thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
{
enum machine_mode mode = GET_MODE (x);
+ int factor;
switch (code)
{
@@ -7784,6 +7793,8 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code,
case ASHIFTRT:
case LSHIFTRT:
case ROTATERT:
+ return (mode == SImode) ? COSTS_N_INSNS (1) : COSTS_N_INSNS (2);
+
case PLUS:
case MINUS:
case COMPARE:
@@ -7802,7 +7813,13 @@ thumb1_size_rtx_costs (rtx x, enum rtx_code code,
return COSTS_N_INSNS (1);
case SET:
- return (COSTS_N_INSNS (1)
+ /* A SET doesn't have a mode, so let's look at the SET_DEST to get
+the mode for the factor. */
+ factor = GET_MODE_SIZE (GET_MODE (SET_DEST (x))) / UNITS_PER_WORD;
+ if (factor == 0)
+ factor = 1;
+
+ return (factor * COSTS_N_INSNS (1)
+ 4 * ((MEM_P (SET_SRC (x)))
+ MEM_P (SET_DEST (x;
[PATCH] Cleanup set_mem_attributes_minus_bitpos align handling
This is the cleanup piece that I pushed back for 4.9 when fixing
bitpos handling due to a bug for 4.8.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Richard.
2013-03-26 Richard Biener rguent...@suse.de
* emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
alignment computations and rely on get_object_alignment_1
for the !TYPE_P case.
Commonize DECL/COMPONENT_REF handling in the ARRAY_REF path.
Index: gcc/emit-rtl.c
===
*** gcc/emit-rtl.c.orig 2013-03-25 14:01:13.0 +0100
--- gcc/emit-rtl.c 2013-03-25 14:17:44.587113440 +0100
*** set_mem_attributes_minus_bitpos (rtx ref
*** 1653,1703
if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
- else if (TREE_CODE (t) == MEM_REF)
- {
- tree op0 = TREE_OPERAND (t, 0);
- if (TREE_CODE (op0) == ADDR_EXPR
- (DECL_P (TREE_OPERAND (op0, 0))
- || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0
- {
- if (DECL_P (TREE_OPERAND (op0, 0)))
- attrs.align = DECL_ALIGN (TREE_OPERAND (op0, 0));
- else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
- {
- attrs.align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
- #ifdef CONSTANT_ALIGNMENT
- attrs.align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0),
- attrs.align);
- #endif
- }
- if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
- {
- unsigned HOST_WIDE_INT ioff
- = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
- unsigned HOST_WIDE_INT aoff = (ioff -ioff) * BITS_PER_UNIT;
- attrs.align = MIN (aoff, attrs.align);
- }
- }
- else
- /* ??? This isn't fully correct, we can't set the alignment from the
- type in all cases. */
- attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
- }
-
- else if (TREE_CODE (t) == TARGET_MEM_REF)
- /* ??? This isn't fully correct, we can't set the alignment from the
-type in all cases. */
- attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
-
/* If the size is known, we can set that. */
tree new_size = TYPE_SIZE_UNIT (type);
/* If T is not a type, we may be able to deduce some more information about
the expression. */
if (! TYPE_P (t))
{
tree base;
- bool align_computed = false;
if (TREE_THIS_VOLATILE (t))
MEM_VOLATILE_P (ref) = 1;
--- 1653,1669
if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
/* If the size is known, we can set that. */
tree new_size = TYPE_SIZE_UNIT (type);
+ /* The address-space is that of the type. */
+ as = TYPE_ADDR_SPACE (type);
+
/* If T is not a type, we may be able to deduce some more information about
the expression. */
if (! TYPE_P (t))
{
tree base;
if (TREE_THIS_VOLATILE (t))
MEM_VOLATILE_P (ref) = 1;
*** set_mem_attributes_minus_bitpos (rtx ref
*** 1727,1732
--- 1693,1699
TREE_STATIC (base))
MEM_READONLY_P (ref) = 1;
+ /* Address-space information is on the base object. */
if (TREE_CODE (base) == MEM_REF
|| TREE_CODE (base) == TARGET_MEM_REF)
as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
*** set_mem_attributes_minus_bitpos (rtx ref
*** 1734,1741
else
as = TYPE_ADDR_SPACE (TREE_TYPE (base));
}
- else
- as = TYPE_ADDR_SPACE (type);
/* If this expression uses it's parent's alias set, mark it such
that we won't change it. */
--- 1701,1706
*** set_mem_attributes_minus_bitpos (rtx ref
*** 1750,1768
attrs.offset = 0;
apply_bitpos = bitpos;
new_size = DECL_SIZE_UNIT (t);
- attrs.align = DECL_ALIGN (t);
- align_computed = true;
}
! /* If this is a constant, we know the alignment. */
else if (CONSTANT_CLASS_P (t))
! {
! attrs.align = TYPE_ALIGN (type);
! #ifdef CONSTANT_ALIGNMENT
! attrs.align = CONSTANT_ALIGNMENT (t, attrs.align);
! #endif
! align_computed = true;
! }
/* If this is a field reference, record it. */
else if (TREE_CODE (t) == COMPONENT_REF)
--- 1715,1725
attrs.offset = 0;
apply_bitpos = bitpos;
new_size = DECL_SIZE_UNIT (t);
}
! /* ??? If we end up with a constant here do record a MEM_EXPR. */
else if (CONSTANT_CLASS_P (t))
! ;
/* If this is a field reference, record it. */
else if (TREE_CODE (t) ==
Re: extend fwprop optimization
On Mon, Mar 25, 2013 at 6:33 PM, Wei Mi w...@google.com wrote:
I am trying to figure out a way not to lose the opportunity when shift
truncation is not combined in a bit test pattern. Can we keep the
explicit truncation in RTL, but generate truncation code in assembly?
Then only shift truncation which not combined in a bit test
pattershift truncationn will happen.
(define_insn *shift_insn_andmode
[(set (match_operand:SWI48 0 nonimmediate_operand =rm)
(any_shiftrt:SWI48
(match_operand:SWI48 1 nonimmediate_operand 0)
(subreg:QI
(and:SI
(match_operand:SI 2 nonimmediate_operand c)
(match_operand:SI 3 const_int_operand n)) 0)))
(clobber (reg:CC FLAGS_REG))]
ix86_binary_operator_ok (CODE, MODEmode, operands)
{
if ((INTVAL (operands[3]) (GET_MODE_BITSIZE (MODEmode)-1))
== GET_MODE_BITSIZE (MODEmode)-1)
return and\t{%3, %2|%2, %3}\n\r shift\t{%b2, %0|%0, %b2};
else
shift\t{%2, %0|%0, %2};
}
Sorry, rectify a mistake:
{
if ((INTVAL (operands[3]) (GET_MODE_BITSIZE (MODEmode)-1))
== GET_MODE_BITSIZE (MODEmode)-1)
return shift\t{%2, %0|%0, %2};
else
return and\t{%3, %2|%2, %3}\n\r shift\t{%b2, %0|%0, %b2};
}
I'm not sure the existing patterns are wrong because SHIFT_COUNT_TRUNCATED
is false for x86 AFAIK, exactly because of the bit-test vs. shift instruction
differences. So there is no inconsistency. The i386 backend seems to
try to follow my suggestion as if SHIFT_COUNT_TRUNCATED didn't exist
(well, it's false, so it technically doesn't exist for i386) and recognizes
the shift with truncate with the *shift_insnmode3_mask splitter.
But I'm not sure why it bothers to do it with a splitter instead of just
with a define_insn? Because the split code,
[(parallel [(set (match_dup 0)
(any_shiftrt:SWI48 (match_dup 1) (match_dup 2)))
(clobber (reg:CC FLAGS_REG))])]
is wrong and could be combined into a bit-test instruction. No?
That is, why not have define_insn variants for shift instructions with
explicit truncation?
Richard.
Thanks,
Wei.
Re: [patch] Unified debug dump function names.
On Mon, Mar 25, 2013 at 6:19 PM, Lawrence Crowl cr...@googlers.com wrote: On 3/25/13, Richard Biener richard.guent...@gmail.com wrote: You add a not used new interface. What for? So that people can use it. For use from gdb only? No, for use from both gdb and internally. It is often that folks add dumps in various places while developing/debugging. These functions support that effort without having to hunt down the name. But having both interfaces is bad. As you are unconditionally dumping to stderr using debug () is correct. Sorry that I don't follow each and every proposal - nobody follows up my proposals either. The dump_ namespace is claimed by dumping to dumpfiles and diagnostics. In which case it should be debug (), not dump (). I will use whatever name you wish, but I would have preferred that we addressed naming issues when we published the plan, not after I've done the implementation. What name do you wish? debug (). And I'd like you to remove the alternate debug_ interface that is obsoleted by the overloads. Btw, the overloading will provide extra headache to one of the most used ways to the debug_ routines: (gdb) call debug_tree (fndecl) function_decl 0x76e1b900 foo type function_type 0x76d28c78 type integer_type 0x76d175e8 int public SI size integer_cst 0x76d1a0c0 constant 32 unit size integer_cst 0x76d1a0e0 constant 4 align 32 symtab 0 alias set -1 canonical type 0x76d175e8 precision 32 min integer_cst 0x76d1a060 -2147483648 max integer_cst 0x76d1a080 2147483647 ... (gdb) call debug_tree (0x76d175e8) Cannot resolve function debug_tree to any overloaded instance (gdb) call debug_treetabtab debug_tree(tree_node*) debug_tree_chain(tree_node*) debug_tree_chain(tree_node*)::__FUNCTION__ debug_tree_ssa() debug_tree_ssa_stats() aha! (ok, I know this one is 'tree') (gdb) call debug_tree ((tree_node*)0x76d175e8) integer_type 0x76d175e8 int public SI size integer_cst 0x76d1a0c0 type integer_type 0x76d170a8 bitsizetype constant 32 unit size integer_cst 0x76d1a0e0 type integer_type 0x76d17000 sizetype constant 4 align 32 symtab 0 alias set -1 canonical type 0x76d175e8 precision 32 min integer_cst 0x76d1a060 -2147483648 max integer_cst 0x76d1a080 2147483647 pointer_to_this pointer_type 0x76d1f2a0 but with debug () having overloads to each and every thing we'd ever want to debug the list of possible types I have to cast that literal address I cutpasted will be endless. Any suggestion on how to improve this situation? Yes, it's already bad as with typing debug_tree I know it's a tree I am interested in and (gdb) call debug_tabtab ... endless list of functions and overloads ... is probably as useless as (gdb) call debugtabtab is after your patch. Thanks, Richard. -- Lawrence Crowl
RE: [PING^1] [AArch64] Implement Bitwise AND and Set Flags
Hi, Thanks for reviewing the patch and testcase. There were some doubts regarding the addressing modes supported by these instructions. The only source that could be referred was the AARCH64 assembler. Hence, these modifications are implemented as per the assembler. Please let me know if there should be any modifications. the second set in each pattern should have the =r,rk constraint rather than just =r,r. If the destination operand is stack register, assembler generates error as follows:- Error: operand 1 should be an integer register -- `ands sp,x0,x1' The ands instruction does not support sp in any of the operand as per the assembler. adds and subs instruction can use SP as the first operand. addsx2, sp, 1 - No Assembler error subsx3, sp, #1- No Assembler error addsx2, sp, x1- No Assembler error subsx3, sp, x1- No Assembler error addsx3, sp, x1, lsl 3- No Assembler error subsx3, sp, x1, lsl 3- No Assembler error Hence, their implementations are modified to support stack pointer as the first operand. I've attached a patch that provides more thorough test cases, including execute ones. Thanks for the testcase. They were added in the testsuite and run to check the implementation. However, the testcase had shift operations in them. Hence, the pattern for shift are added in the patch. Testcase have been added for adds and subs instructions similar to the ands testcase submitted by Ian. Please review the same and let me know if there should be any modifications in the patch. Build and tested on aarch64-thunder-elf (using Cavium's internal simulator). Thanks, Naveen gcc/ 2013-03-26 Naveen H.S naveen.hurugalaw...@caviumnetworks.com * config/aarch64/aarch64.md (*addmode3_compare0): Use stack register in constraint of 1st operand along with general registers. (*addsi3_compare0_uxtw): Likewise. (*submode3_compare0): Likewise. (*subsi3_compare0_uxtw): Likewise. (*adds_shift_mode, *adds_shift_si_uxtw): New pattern. (*adds_mul_imm_mode, *adds_mul_imm_si_uxtw): New pattern. (*subs_shift_mode, *subs_shift_si_uxtw): New pattern. (*subs_mul_imm_mode, *subs_mul_imm_si_uxtw): New pattern. (*andmode3_compare0, *andsi3_compare0_si_uxtw): New pattern. (*ands_shift_mode, *ands_shift_si_uxtw): New pattern. gcc/testsuite/ 2013-03-26 Naveen H.S naveen.hurugalaw...@caviumnetworks.com * gcc.target/aarch64/ands.c: New. * gcc.target/aarch64/adds1.c: New. * gcc.target/aarch64/adds2.c: New. * gcc.target/aarch64/subs1.c: New. * gcc.target/aarch64/subs2.c: New.--- gcc/config/aarch64/aarch64.md 2013-03-26 12:51:12.180448029 +0530 +++ gcc/config/aarch64/aarch64.md 2013-03-26 13:38:48.792544909 +0530 @@ -1256,7 +1256,7 @@ (define_insn *addmode3_compare0 [(set (reg:CC_NZ CC_REGNUM) (compare:CC_NZ - (plus:GPI (match_operand:GPI 1 register_operand %r,r) + (plus:GPI (match_operand:GPI 1 register_operand %rk,rk) (match_operand:GPI 2 aarch64_plus_operand rI,J)) (const_int 0))) (set (match_operand:GPI 0 register_operand =r,r) @@ -1273,7 +1273,7 @@ (define_insn *addsi3_compare0_uxtw [(set (reg:CC_NZ CC_REGNUM) (compare:CC_NZ - (plus:SI (match_operand:SI 1 register_operand %r,r) + (plus:SI (match_operand:SI 1 register_operand %rk,rk) (match_operand:SI 2 aarch64_plus_operand rI,J)) (const_int 0))) (set (match_operand:DI 0 register_operand =r,r) @@ -1286,6 +1286,146 @@ (set_attr mode SI)] ) +(define_insn *adds_shift_mode + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (plus:GPI (ASHIFT:GPI + (match_operand:GPI 1 register_operand r) + (match_operand:QI 2 aarch64_shift_imm_mode n)) + (match_operand:GPI 3 register_operand r)) + (const_int 0))) + (set (match_operand:GPI 0 register_operand =r) + (plus:GPI (ASHIFT:GPI (match_dup 1) (match_dup 2)) + (match_dup 3)))] + + adds\\t%w0, %w3, %w1, shift %2 + [(set_attr v8type alu_shift) + (set_attr mode MODE)] +) + +;; zero_extend version of above +(define_insn *adds_shift_si_uxtw + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (plus:SI (ASHIFT:SI + (match_operand:SI 1 register_operand r) + (match_operand:QI 2 aarch64_shift_imm_si n)) + (match_operand:SI 3 register_operand r)) + (const_int 0))) + (set (match_operand:DI 0 register_operand =r) + (zero_extend:DI (plus:SI (ASHIFT:SI (match_dup 1) (match_dup 2)) + (match_dup 3] + + adds\\t%w0, %w3, %w1, shift %2 + [(set_attr v8type alu_shift) + (set_attr mode SI)] +) + +(define_insn *adds_mul_imm_mode + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (plus:GPI (mult:GPI + (match_operand:GPI 1 register_operand r) + (match_operand:QI 2 aarch64_pwr_2_mode n)) + (match_operand:GPI 3 register_operand rk)) + (const_int 0))) + (set (match_operand:GPI 0 register_operand =r) + (plus:GPI
Re: [PING^1] [AArch64] Implement Bitwise AND and Set Flags
On 26/03/13 10:06, Hurugalawadi, Naveen wrote: the second set in each pattern should have the =r,rk constraint rather than just =r,r. If the destination operand is stack register, assembler generates error as follows:- Error: operand 1 should be an integer register -- `ands sp,x0,x1' The ands instruction does not support sp in any of the operand as per the assembler. adds and subs instruction can use SP as the first operand. addsx2, sp, 1 - No Assembler error subsx3, sp, #1- No Assembler error addsx2, sp, x1- No Assembler error subsx3, sp, x1- No Assembler error addsx3, sp, x1, lsl 3- No Assembler error subsx3, sp, x1, lsl 3- No Assembler error Hence, their implementations are modified to support stack pointer as the first operand. Umm, I think Ian meant 'K' rather than 'k', these patterns should be able to deal with constants in the 2nd operand. The SP is irrelevant here. /M
[AArch64] Peepholes to generate ldp and stp instructions
Hi, Please find attached the patch that implements load pair(ldp) and store pair(stp) peephole for aarch64 target. Please review the same and let me know if its okay. Build and tested on aarch64-thunder-elf (using Cavium's internal simulator). No new regressions. Thanks, Naveen gcc/ 2013-03-26 Naveen H.S naveen.hurugalaw...@caviumnetworks.com * config/aarch64/aarch64.md (peephole2s to generate ldp instruction for 2 consecutive loads from memory): New. (peephole2s to generate stp instruction for 2 consecutive stores to memory in integer mode): New. (peephole2s to generate ldp instruction for 2 consecutive loads from memory in floating point mode): New. (peephole2s to generate stp instruction for 2 consecutive stores to memory in floating point mode): New. --- gcc/config/aarch64/aarch64.md 2013-03-14 16:04:19.705897493 +0530 +++ gcc/config/aarch64/aarch64.md 2013-03-19 15:45:49.808730935 +0530 @@ -1013,6 +1013,26 @@ (set_attr mode MODE)] ) +(define_peephole2 + [(set (match_operand:GPI 0 register_operand) + (match_operand:GPI 1 aarch64_mem_pair_operand)) + (set (match_operand:GPI 2 register_operand) + (match_operand:GPI 3 memory_operand))] + GET_CODE (operands[1]) == MEM +GET_CODE (XEXP (operands[1], 0)) == PLUS +GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == REG +GET_CODE (XEXP (XEXP (operands[1], 0), 1)) == CONST_INT +REGNO (operands[0]) != REGNO (operands[2]) +REGNO_REG_CLASS (REGNO (operands[0])) + == REGNO_REG_CLASS (REGNO (operands[2])) +rtx_equal_p (XEXP (operands[3], 0), + plus_constant (Pmode, XEXP (operands[1], 0), + GET_MODE_SIZE (MODEmode))) +optimize_size + [(parallel [(set (match_dup 0) (match_dup 1)) + (set (match_dup 2) (match_dup 3))])] +) + ;; Operands 0 and 2 are tied together by the final condition; so we allow ;; fairly lax checking on the second memory operation. (define_insn store_pairmode @@ -1029,6 +1049,26 @@ (set_attr mode MODE)] ) +(define_peephole2 + [(set (match_operand:GPI 0 aarch64_mem_pair_operand) + (match_operand:GPI 1 register_operand)) + (set (match_operand:GPI 2 memory_operand) + (match_operand:GPI 3 register_operand))] + GET_CODE (operands[0]) == MEM +GET_CODE (XEXP (operands[0], 0)) == PLUS +GET_CODE (XEXP (XEXP (operands[0], 0), 0)) == REG +GET_CODE (XEXP (XEXP (operands[0], 0), 1)) == CONST_INT +REGNO (operands[1]) != REGNO (operands[3]) +REGNO_REG_CLASS (REGNO (operands[1])) + == REGNO_REG_CLASS (REGNO (operands[3])) +rtx_equal_p (XEXP (operands[2], 0), + plus_constant (Pmode, XEXP (operands[0], 0), + GET_MODE_SIZE (MODEmode))) +optimize_size + [(parallel [(set (match_dup 0) (match_dup 1)) + (set (match_dup 2) (match_dup 3))])] +) + ;; Operands 1 and 3 are tied together by the final condition; so we allow ;; fairly lax checking on the second memory operation. (define_insn load_pairmode @@ -1045,6 +1085,27 @@ (set_attr mode MODE)] ) +(define_peephole2 + [(set (match_operand:GPF 0 register_operand) + (match_operand:GPF 1 aarch64_mem_pair_operand)) + (set (match_operand:GPF 2 register_operand) + (match_operand:GPF 3 memory_operand))] + GET_CODE (operands[1]) == MEM +GET_CODE (XEXP (operands[1], 0)) == PLUS +GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == REG +GET_CODE (XEXP (XEXP (operands[1], 0), 1)) == CONST_INT +REGNO (operands[0]) != REGNO (operands[2]) +REGNO (operands[0]) = 32 REGNO (operands[2]) = 32 +REGNO_REG_CLASS (REGNO (operands[0])) + == REGNO_REG_CLASS (REGNO (operands[2])) +rtx_equal_p (XEXP (operands[3], 0), + plus_constant (Pmode, XEXP (operands[1], 0), + GET_MODE_SIZE (MODEmode))) +optimize_size + [(parallel [(set (match_dup 0) (match_dup 1)) + (set (match_dup 2) (match_dup 3))])] +) + ;; Operands 0 and 2 are tied together by the final condition; so we allow ;; fairly lax checking on the second memory operation. (define_insn store_pairmode @@ -1061,6 +1122,27 @@ (set_attr mode MODE)] ) +(define_peephole2 + [(set (match_operand:GPF 0 aarch64_mem_pair_operand) + (match_operand:GPF 1 register_operand)) + (set (match_operand:GPF 2 memory_operand) + (match_operand:GPF 3 register_operand))] + GET_CODE (operands[0]) == MEM +GET_CODE (XEXP (operands[0], 0)) == PLUS +GET_CODE (XEXP (XEXP (operands[0], 0), 0)) == REG +GET_CODE (XEXP (XEXP (operands[0], 0), 1)) == CONST_INT +REGNO (operands[1]) != REGNO (operands[3]) +REGNO (operands[1]) = 32 REGNO (operands[3]) = 32 +REGNO_REG_CLASS (REGNO (operands[1])) + == REGNO_REG_CLASS (REGNO (operands[3])) +rtx_equal_p (XEXP (operands[2], 0), + plus_constant (Pmode, XEXP (operands[0], 0), + GET_MODE_SIZE (MODEmode))) +optimize_size + [(parallel [(set (match_dup 0) (match_dup 1)) + (set (match_dup 2) (match_dup 3))])] +) + ;; Load pair with writeback. This is primarily used in function epilogues
Re: [PATCH] Add -pthread option for RTEMS
Ping. On 01/29/2013 02:43 PM, Sebastian Huber wrote: A lot of things use the -pthread GCC option if they want to use the Pthreads. Examples are various configure scripts and some GCC test cases. RTEMS supports Pthreads. It is convenient to simply add a -pthread option and ignore it for RTEMS. 2013-01-29 Sebastian Huber sebastian.hu...@embedded-brains.de * config/rtems.opt: Add -pthread option. --- gcc/config/rtems.opt |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/gcc/config/rtems.opt b/gcc/config/rtems.opt index d76b7e7..0b1a353 100644 --- a/gcc/config/rtems.opt +++ b/gcc/config/rtems.opt @@ -23,6 +23,9 @@ ; Please try to keep this file in ASCII collating order. +pthread +Ignore + qnolinkcmds Driver -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
Re: [PATCH GCC/ARM]Fix rtx cost for Thumb1
On 26/03/13 08:34, Bin Cheng wrote: Hi, As reported in PR56102, arm back end returns wrong rtx cost for pattern SET/ASHIFT/ASHIFTRT/LSHIFTRT/ROTATERT with multi-word mode. This causes GCC skipping the split process in lower-subreg.c, and generating bigger constant pool. This patch fixes the issue. Tested on arm-none-eabi/thumb1/O2/Os, ok for trunk? Thanks. 2013-03-26 Bin Cheng bin.ch...@arm.com PR target/56102 * config/arm/arm.c (thumb1_rtx_costs, thumb1_size_rtx_costs): Fix rtx costs for SET/ASHIFT/ASHIFTRT/LSHIFTRT/ROTATERT patterns with mult-word mode. OK. R.
Re: [PING^1] [AArch64] Implement Bitwise AND and Set Flags
On 26/03/13 10:17, Marcus Shawcroft wrote: On 26/03/13 10:06, Hurugalawadi, Naveen wrote: the second set in each pattern should have the =r,rk constraint rather than just =r,r. If the destination operand is stack register, assembler generates error as follows:- Error: operand 1 should be an integer register -- `ands sp,x0,x1' The ands instruction does not support sp in any of the operand as per the assembler. adds and subs instruction can use SP as the first operand. addsx2, sp, 1 - No Assembler error subsx3, sp, #1- No Assembler error addsx2, sp, x1- No Assembler error subsx3, sp, x1- No Assembler error addsx3, sp, x1, lsl 3- No Assembler error subsx3, sp, x1, lsl 3- No Assembler error Hence, their implementations are modified to support stack pointer as the first operand. Umm, I think Ian meant 'K' rather than 'k', these patterns should be able to deal with constants in the 2nd operand. The SP is irrelevant here. /M Hi, Ignore my last comment. This patch now has two changes in it, the original 'and' patch with test case and the modification to add/sub patterns with test cases. Can we split them into two different patches please. Just and in one, add/sub in the other. Thanks /Marcus
Re: [PATCH, generic] Support printing of escaped curly braces and vertical bar in assembler output
Thanks for the explanation, now I understand it. I fixed the patch according to your remarks. I removed %| support since we don't actually need it in i386 right now, it was added for the purpose of possible generalization. Updated patch is attached. Ping -- Maxim Kuznetsov curly_braces.patch Description: Binary data
Re: [PATCH] Vtable pointer verification (corruption/attach detection -- new feature
On 02/01/2013 12:42 AM, Caroline Tice wrote: If this data could be emitted in a declarative fashion, it might be possible to emit it by default, in a separate ELF section. This way, it is always there when needed, and it wouldn't have any performance impact if not used. That might be possible; it would need to be carefully organized though. If is not enough to have a list of all vtable addresses; we need to know, for each virtual class (where by virtual class I mean a class for which a vtable might be generated) the set of vtables that is is legal for an object of that class to point to (i.e. for a base class, it can point to its own vtable or to the vtable of any of its descendants in the inheritance hierarchy). At present, you emit calls to the __VLTRegisterPair() function to implement the registration, correct? I wonder if it's possible to list the arguments to the calls instead (possibly in such a way that no relocations are needed). Initialization for verification mode would pick up this data, performing the registration. Outside verification mode, this data would just be ignored (and no ELF constructor needs to be executed). C++ virtual method calls are efficient, but they have their problems. The vtable needs relocation (contributing to startup cost), and we have the fragile base class problem (which severely constrains the evolution of separately-compiled base classes). Assuming that we need the vtable check and it has non-trivial cost, it might make sense to revamp C++ virtual method dispatch altogether, addressing both security and modularity issues. That might be best, but we don't have the authority to unilaterally make a change of this magnitude to the standard. ;-) This would only affect the cross-vendor C++ ABI, not the standard itself. -- Florian Weimer / Red Hat Product Security Team
[Patch, Fortran] PR56649 - do more simplification of MERGE
First, I am woefully aware that there are 7 patches which still have to
be reviewed, three by Thomas, two by Janne, one by Mikael and one by me
(value+optional). I try to find time for reviewing one or two - but
wouldn't mind if others contributed to the deed.
The attached patch fixes one of two issues into which MPICH runs. MERGE
didn't properly simplify valid constant expressions. With this patch,
for scalar constant MERGE, it only looks at the MASK value as more it
not required. For constant-expression arrays, it walks the constructor
and creates a new one, based on the truth value.
Note: The gfc_get_parentheses() is required in some context, e.g.
lbound(merge(i,i, .true.)) shall not not becomes lbound(i) but lbound(
(i) ) otherwise, the result might be wrong. I think there are more such
issues in simplify.c (and possible also in frontend-passes.c).
Build on x86-64-gnu-linux.
OK for the trunk?
Tobias
2013-03-26 Tobias Burnus bur...@net-b.de
PR fortran/56649
* simplify.c (gfc_simplify_merge): Simplify more.
2013-03-26 Tobias Burnus bur...@net-b.de
PR fortran/56649
* gfortran.dg/merge_init_expr_2.f90: New.
* gfortran.dg/merge_char_1.f90: Modify test to
stay a run-time test.
* gfortran.dg/merge_char_3.f90: Ditto.
diff --git a/gcc/fortran/simplify.c b/gcc/fortran/simplify.c
index a0909a3..e1392a5 100644
--- a/gcc/fortran/simplify.c
+++ b/gcc/fortran/simplify.c
@@ -3976,12 +3976,47 @@ gfc_simplify_maskl (gfc_expr *i, gfc_expr *kind_arg)
gfc_expr *
gfc_simplify_merge (gfc_expr *tsource, gfc_expr *fsource, gfc_expr *mask)
{
- if (tsource-expr_type != EXPR_CONSTANT
- || fsource-expr_type != EXPR_CONSTANT
- || mask-expr_type != EXPR_CONSTANT)
+ gfc_expr * result;
+ gfc_constructor *tsource_ctor, *fsource_ctor, *mask_ctor;
+
+ if (mask-expr_type == EXPR_CONSTANT)
+return gfc_get_parentheses (gfc_copy_expr (mask-value.logical
+ ? tsource : fsource));
+
+ if (!mask-rank || !is_constant_array_expr (mask)
+ || !is_constant_array_expr (tsource) || !is_constant_array_expr (fsource))
return NULL;
- return gfc_copy_expr (mask-value.logical ? tsource : fsource);
+ result = gfc_get_array_expr (tsource-ts.type, tsource-ts.kind,
+ tsource-where);
+ if (tsource-ts.type == BT_DERIVED)
+result-ts.u.derived = tsource-ts.u.derived;
+ else if (tsource-ts.type == BT_CHARACTER)
+result-ts.u.cl = tsource-ts.u.cl;
+
+ tsource_ctor = gfc_constructor_first (tsource-value.constructor);
+ fsource_ctor = gfc_constructor_first (fsource-value.constructor);
+ mask_ctor = gfc_constructor_first (mask-value.constructor);
+
+ while (mask_ctor)
+{
+ if (mask_ctor-expr-value.logical)
+ gfc_constructor_append_expr (result-value.constructor,
+ gfc_copy_expr (tsource_ctor-expr),
+ NULL);
+ else
+ gfc_constructor_append_expr (result-value.constructor,
+ gfc_copy_expr (fsource_ctor-expr),
+ NULL);
+ tsource_ctor = gfc_constructor_next (tsource_ctor);
+ fsource_ctor = gfc_constructor_next (fsource_ctor);
+ mask_ctor = gfc_constructor_next (mask_ctor);
+}
+
+ result-shape = gfc_get_shape (1);
+ gfc_array_size (result, result-shape[0]);
+
+ return gfc_get_parentheses (result);
}
diff --git a/gcc/testsuite/gfortran.dg/merge_char_1.f90 b/gcc/testsuite/gfortran.dg/merge_char_1.f90
index 5974e8c..ece939e 100644
--- a/gcc/testsuite/gfortran.dg/merge_char_1.f90
+++ b/gcc/testsuite/gfortran.dg/merge_char_1.f90
@@ -4,6 +4,13 @@
! PR 15327
! The merge intrinsic didn't work for strings
character*2 :: c(2)
+logical :: ll(2)
+
+ll = (/ .TRUE., .FALSE. /)
+c = merge( (/ AA, BB /), (/ CC, DD /), ll )
+if (c(1).ne.AA .or. c(2).ne.DD) call abort ()
+
+c =
c = merge( (/ AA, BB /), (/ CC, DD /), (/ .TRUE., .FALSE. /) )
if (c(1).ne.AA .or. c(2).ne.DD) call abort ()
end
diff --git a/gcc/testsuite/gfortran.dg/merge_char_3.f90 b/gcc/testsuite/gfortran.dg/merge_char_3.f90
index 498e3ec..1142141 100644
--- a/gcc/testsuite/gfortran.dg/merge_char_3.f90
+++ b/gcc/testsuite/gfortran.dg/merge_char_3.f90
@@ -12,7 +12,8 @@ subroutine foo(a)
implicit none
character(len=*) :: a
character(len=3) :: b
-print *, merge(a,b,.true.) ! Unequal character lengths
+logical :: ll = .true.
+print *, merge(a,b,ll) ! Unequal character lengths
end subroutine foo
call foo(ab)
--- /dev/null 2013-03-26 09:17:16.160088642 +0100
+++ gcc/gcc/testsuite/gfortran.dg/merge_init_expr_2.f90 2013-03-26 11:48:40.226193293 +0100
@@ -0,0 +1,58 @@
+! { dg-do compile }
+! { dg-options -fdump-tree-original }
+!
+! PR fortran/56649
+! MERGE was not properly compile-time simplified
+!
+! Contributed by Bill Long
+!
+module m
+ implicit none
+
+ integer, parameter :: int32 = 4
+ type MPI_Datatype
+integer :: i
+ end type MPI_Datatype
+
+ integer,private,parameter :: dik = kind(0)
+ type(MPI_Datatype),parameter,private :: MPIx_I4 = MPI_Datatype( 1275069467)
+ type(MPI_Datatype),parameter,private :: MPIx_I8 = MPI_Datatype(
RFA: RL78: Improve prologues for interrupt handlers
Hi DJ,
I am submitting a patch on behalf of Renesas and KPIT. They found a
way to improve the prologues for interrupt handlers so that only the
registers that actually need to be saved are pushed onto the stack.
The patch has been tested with no regressions in the gcc testsuite for
an rl78-elf toolchain, as well as various different interrupt handler
configurations.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2013-03-26 Kaushik Phatak kaushik.pha...@kpitcummins.com
* config/rl78/rl78.c (need_to_save): Change return type to bool.
For interrupt functions: save call clobbered registers if the
register is used or the handler is not a leaf function.
(rl78_expand_prologue): Always recompute the frame information.
For interrupt functions: only select bank 0 if one of the bank 0
registers is going to be pushed.
Index: gcc/config/rl78/rl78.c
===
--- gcc/config/rl78/rl78.c (revision 197093)
+++ gcc/config/rl78/rl78.c (working copy)
@@ -373,34 +373,43 @@
return true;
}
-/* Returns nonzero if the given register needs to be saved by the
+/* Returns true if the given register needs to be saved by the
current function. */
-static int
-need_to_save (int regno)
+static bool
+need_to_save (unsigned int regno)
{
if (is_interrupt_func (cfun-decl))
{
- if (regno 8)
- return 1; /* don't know what devirt will need */
+ /* We don't need to save registers that have
+ been reserved for interrupt handlers. */
if (regno 23)
- return 0; /* don't need to save interrupt registers */
- if (crtl-is_leaf)
- {
- return df_regs_ever_live_p (regno);
- }
- else
- return 1;
+ return false;
+
+ /* If the handler is a non-leaf function then it may call
+non-interrupt aware routines which will happily clobber
+any call_used registers, so we have to preserve them. */
+ if (!crtl-is_leaf call_used_regs[regno])
+ return true;
+
+ /* Otherwise we only have to save a register, call_used
+or not, if it is used by this handler. */
+ return df_regs_ever_live_p (regno);
}
+
if (regno == FRAME_POINTER_REGNUM frame_pointer_needed)
-return 1;
+return true;
+
if (fixed_regs[regno])
-return 0;
+return false;
+
if (crtl-calls_eh_return)
-return 1;
+return true;
+
if (df_regs_ever_live_p (regno)
!call_used_regs[regno])
-return 1;
- return 0;
+return true;
+
+ return false;
}
/* We use this to wrap all emitted insns in the prologue. */
@@ -833,14 +842,22 @@
rtx sp = gen_rtx_REG (HImode, STACK_POINTER_REGNUM);
int rb = 0;
- if (!cfun-machine-computed)
-rl78_compute_frame_info ();
+ /* Always re-compute the frame info - the
+register usage may have changed. */
+ rl78_compute_frame_info ();
+
if (flag_stack_usage_info)
current_function_static_stack_size = cfun-machine-framesize;
if (is_interrupt_func (cfun-decl))
-emit_insn (gen_sel_rb (GEN_INT (0)));
+for (i = 0; i 4; i++)
+ if (cfun-machine-need_to_push [i])
+ {
+ /* Select Bank 0 if we are using any registers from Bank 0. */
+ emit_insn (gen_sel_rb (GEN_INT (0)));
+ break;
+ }
for (i = 0; i 16; i++)
if (cfun-machine-need_to_push [i])
RE: [PING^1] [AArch64] Implement Bitwise AND and Set Flags
Hi,
Can we split them into two different patches. Just and in one
Thanks for reviewing the patch. I have split the patches for and
separately as per your suggestion.
There were some doubts regarding the addressing modes supported by
these instructions.
The only source that could be referred was the AARCH64 assembler.
Hence, these modifications are implemented as per the assembler.
Please let me know if there should be any modifications.
the second set in each pattern should have the =r,rk constraint
rather than just =r,r.
If the destination operand is stack register, assembler generates error
as follows:-
Error: operand 1 should be an integer register -- `ands sp,x0,x1'
The ands instruction does not support sp in any of the operand as per
the assembler.
I've attached a patch that provides more thorough test cases,
including execute ones.
Thanks for the testcase. They were added in the testsuite and run to
check the implementation. However, the testcase had shift operations in
them. Hence, the pattern for shift are added in the patch.
Please review the same and let me know if there should be any
modifications in the patch.
Build and tested on aarch64-thunder-elf (using Cavium's internal
simulator).
Thanks,
Naveen
gcc/
2013-03-26 Naveen H.S naveen.hurugalaw...@caviumnetworks.com
* config/aarch64/aarch64.md (*andmode3_compare0): New pattern.
(*andsi3_compare0_si_uxtw): New pattern.
(*ands_shift_mode): New pattern.
(*ands_shift_si_uxtw): New pattern.
gcc/testsuite/
2013-03-26 Naveen H.S naveen.hurugalaw...@caviumnetworks.com
* gcc.target/aarch64/ands.c: New.--- gcc/config/aarch64/aarch64.md 2013-03-26 12:51:12.180448029 +0530
+++ gcc/gcc/config/aarch64/aarch64.md 2013-03-26 16:54:28.932943068 +0530
@@ -2433,6 +2433,70 @@
[(set_attr v8type logic,logic_imm)
(set_attr mode SI)])
+(define_insn *andmode3_compare0
+ [(set (reg:CC_NZ CC_REGNUM)
+ (compare:CC_NZ
+ (and:GPI (match_operand:GPI 1 register_operand %r,r)
+ (match_operand:GPI 2 aarch64_logical_operand r,lconst))
+ (const_int 0)))
+ (set (match_operand:GPI 0 register_operand =r,r)
+ (and:GPI (match_dup 1) (match_dup 2)))]
+
+ ands\\t%w0, %w1, %w2
+ [(set_attr v8type logic,logic_imm)
+ (set_attr mode MODE)]
+)
+
+;; zero_extend version of above
+(define_insn *andsi3_compare0_si_uxtw
+ [(set (reg:CC_NZ CC_REGNUM)
+ (compare:CC_NZ
+ (and:SI (match_operand:SI 1 register_operand %r,r)
+ (match_operand:SI 2 aarch64_logical_operand r,K))
+ (const_int 0)))
+ (set (match_operand:DI 0 register_operand =r,r)
+ (zero_extend:DI (and:SI (match_dup 1) (match_dup 2]
+
+ ands\\t%w0, %w1, %w2
+ [(set_attr v8type logic,logic_imm)
+ (set_attr mode SI)]
+)
+
+(define_insn *ands_shift_mode
+ [(set (reg:CC_NZ CC_REGNUM)
+ (compare:CC_NZ
+ (and:GPI (ASHIFT:GPI
+ (match_operand:GPI 1 register_operand r)
+ (match_operand:QI 2 aarch64_shift_imm_mode n))
+ (match_operand:GPI 3 register_operand r))
+ (const_int 0)))
+ (set (match_operand:GPI 0 register_operand =r)
+ (and:GPI (ASHIFT:GPI (match_dup 1) (match_dup 2))
+ (match_dup 3)))]
+
+ ands\\t%w0, %w3, %w1, shift %2
+ [(set_attr v8type logics_shift)
+ (set_attr mode MODE)]
+)
+
+;; zero_extend version of above
+(define_insn *ands_shift_si_uxtw
+ [(set (reg:CC_NZ CC_REGNUM)
+ (compare:CC_NZ
+ (and:SI (ASHIFT:SI
+ (match_operand:SI 1 register_operand r)
+ (match_operand:QI 2 aarch64_shift_imm_si n))
+ (match_operand:SI 3 register_operand r))
+ (const_int 0)))
+ (set (match_operand:DI 0 register_operand =r)
+ (zero_extend:DI (and:SI (ASHIFT:SI (match_dup 1) (match_dup 2))
+(match_dup 3]
+
+ ands\\t%w0, %w3, %w1, shift %2
+ [(set_attr v8type logics_shift)
+ (set_attr mode SI)]
+)
+
(define_insn *LOGICAL:optab_SHIFT:optabmode3
[(set (match_operand:GPI 0 register_operand =r)
(LOGICAL:GPI (SHIFT:GPI
--- gcc/testsuite/gcc.target/aarch64/ands.c 1970-01-01 05:30:00.0 +0530
+++ gcc/testsuite/gcc.target/aarch64/ands.c 2013-03-26 16:52:28.504938984 +0530
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options -O2 } */
+
+int z;
+int
+foo (int x, int y)
+{
+ int l = x y;
+ if (l == 0)
+return 5;
+
+ /* { dg-final { scan-assembler ands\tw\[0-9\] } } */
+ z = l ;
+ return 25;
+}
+
+typedef long long s64;
+
+s64 zz;
+s64
+foo2 (s64 x, s64 y)
+{
+ s64 l = x y;
+ if (l 0)
+return 5;
+
+ /* { dg-final { scan-assembler ands\tx\[0-9\] } } */
+ zz = l ;
+ return 25;
+}
[AArch64] Bitwise adds and subs instructions with shift
Hi, Please find attached the patch that implements adds and subs instructions with shift for aarch64 target. Testcase have been added for adds and subs instructions similar to the and testcase provided by Ian. Please review the same and let me know if there should be any modifications in the patch. Build and tested on aarch64-thunder-elf (using Cavium's internal simulator). No new regressions. Thanks, Naveen gcc/ 2013-03-26 Naveen H.S naveen.hurugalaw...@caviumnetworks.com * config/aarch64/aarch64.md (*addmode3_compare0): Use stack register in constraint of 1st operand along with general registers. (*addsi3_compare0_uxtw): Likewise. (*submode3_compare0): Likewise. (*subsi3_compare0_uxtw): Likewise. (*adds_shift_mode, *adds_shift_si_uxtw): New pattern. (*adds_mul_imm_mode, *adds_mul_imm_si_uxtw): New pattern. (*subs_shift_mode, *subs_shift_si_uxtw): New pattern. (*subs_mul_imm_mode, *subs_mul_imm_si_uxtw): New pattern. gcc/testsuite/ 2013-03-26 Naveen H.S naveen.hurugalaw...@caviumnetworks.com * gcc.target/aarch64/adds1.c: New. * gcc.target/aarch64/adds2.c: New. * gcc.target/aarch64/subs1.c: New. * gcc.target/aarch64/subs2.c: New.--- gcc/config/aarch64/aarch64.md 2013-03-26 12:51:12.180448029 +0530 +++ gcc/config/aarch64/aarch64.md 2013-03-26 16:48:37.256931141 +0530 @@ -1256,7 +1256,7 @@ (define_insn *addmode3_compare0 [(set (reg:CC_NZ CC_REGNUM) (compare:CC_NZ - (plus:GPI (match_operand:GPI 1 register_operand %r,r) + (plus:GPI (match_operand:GPI 1 register_operand %rk,rk) (match_operand:GPI 2 aarch64_plus_operand rI,J)) (const_int 0))) (set (match_operand:GPI 0 register_operand =r,r) @@ -1273,7 +1273,7 @@ (define_insn *addsi3_compare0_uxtw [(set (reg:CC_NZ CC_REGNUM) (compare:CC_NZ - (plus:SI (match_operand:SI 1 register_operand %r,r) + (plus:SI (match_operand:SI 1 register_operand %rk,rk) (match_operand:SI 2 aarch64_plus_operand rI,J)) (const_int 0))) (set (match_operand:DI 0 register_operand =r,r) @@ -1286,6 +1286,146 @@ (set_attr mode SI)] ) +(define_insn *adds_shift_mode + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (plus:GPI (ASHIFT:GPI + (match_operand:GPI 1 register_operand r) + (match_operand:QI 2 aarch64_shift_imm_mode n)) + (match_operand:GPI 3 register_operand r)) + (const_int 0))) + (set (match_operand:GPI 0 register_operand =r) + (plus:GPI (ASHIFT:GPI (match_dup 1) (match_dup 2)) + (match_dup 3)))] + + adds\\t%w0, %w3, %w1, shift %2 + [(set_attr v8type alu_shift) + (set_attr mode MODE)] +) + +;; zero_extend version of above +(define_insn *adds_shift_si_uxtw + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (plus:SI (ASHIFT:SI + (match_operand:SI 1 register_operand r) + (match_operand:QI 2 aarch64_shift_imm_si n)) + (match_operand:SI 3 register_operand r)) + (const_int 0))) + (set (match_operand:DI 0 register_operand =r) + (zero_extend:DI (plus:SI (ASHIFT:SI (match_dup 1) (match_dup 2)) + (match_dup 3] + + adds\\t%w0, %w3, %w1, shift %2 + [(set_attr v8type alu_shift) + (set_attr mode SI)] +) + +(define_insn *adds_mul_imm_mode + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (plus:GPI (mult:GPI + (match_operand:GPI 1 register_operand r) + (match_operand:QI 2 aarch64_pwr_2_mode n)) + (match_operand:GPI 3 register_operand rk)) + (const_int 0))) + (set (match_operand:GPI 0 register_operand =r) + (plus:GPI (mult:GPI (match_dup 1) (match_dup 2)) + (match_dup 3)))] + + adds\\t%w0, %w3, %w1, lsl %p2 + [(set_attr v8type alu_shift) + (set_attr mode MODE)] +) + +;; zero_extend version of above +(define_insn *adds_mul_imm_si_uxtw + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (plus:SI (mult:SI + (match_operand:SI 1 register_operand r) + (match_operand:QI 2 aarch64_pwr_2_si n)) + (match_operand:SI 3 register_operand rk)) + (const_int 0))) + (set (match_operand:DI 0 register_operand =r) + (zero_extend:DI (plus:SI (mult:SI (match_dup 1) (match_dup 2)) + (match_dup 3] + + adds\\t%w0, %w3, %w1, lsl %p2 + [(set_attr v8type alu_shift) + (set_attr mode SI)] +) + +(define_insn *subs_shift_mode + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (minus:GPI (match_operand:GPI 1 register_operand r) + (ASHIFT:GPI + (match_operand:GPI 2 register_operand r) + (match_operand:QI 3 aarch64_shift_imm_mode n))) + (const_int 0))) + (set (match_operand:GPI 0 register_operand =r) + (minus:GPI (match_dup 1) + (ASHIFT:GPI (match_dup 2) (match_dup 3] + + subs\\t%w0, %w1, %w2, shift %3 + [(set_attr v8type alu_shift) + (set_attr mode MODE)] +) + +;; zero_extend version of above +(define_insn *subs_shift_si_uxtw + [(set (reg:CC_NZ CC_REGNUM) + (compare:CC_NZ + (minus:SI (match_operand:SI 1 register_operand r) + (ASHIFT:SI + (match_operand:SI 2 register_operand r) + (match_operand:QI 3
Re: [testsuite] Disabling gcc.dg/cpp/trad/include.c for Android
Hi, Could you please take a look at the attached fixinclude patch that addresses the problem: We have test fail for gcc.dg/cpp/trad/include.c on Android. The reason for that is that -ftraditional-cpp is not expected to work on Android due to variadic macro (like #define __builtin_warning(x, y...)) in standard headers and traditional preprocessor cannot handle them. is it ok for trunk? thanks, Alexander 2013/1/9 Andrew Pinski pins...@gmail.com: On Wed, Jan 9, 2013 at 7:14 AM, Alexander Ivchenko aivch...@gmail.com wrote: Hi, We have test fail for gcc.dg/cpp/trad/include.c on Android. The reason for that is that -ftraditional-cpp is not expected to work on Android due to variadic macro (like #define __builtin_warning(x, y...)) in standard headers and traditional preprocessor cannot handle them. The attached patch disables that test. It sounds like it is better to fix the system headers instead. Via a fixincludes for older headers and have the android folks fix them for newer releases. Thanks, Andrew Pinski trad_cpp_fixincludes_01.patch Description: Binary data
[C++ Patch/RFC] PR 55951
Hi,
in mainline and 4.8, at variance with 4.7, for:
enum { A };
static const char *a[] = {
[A] = a
};
check_array_designated_initializer is called by reshape_init* with
ce-index a CONST_DECL, not an INTEGER_CST. Thus I wondered if in such
cases it's just matter of using integral_constant_value on it, thus
something like the below (which passes testing on x86_64-linux).
Thanks,
Paolo.
//
Index: cp/decl.c
===
--- cp/decl.c (revision 197097)
+++ cp/decl.c (working copy)
@@ -4766,15 +4766,18 @@ check_array_designated_initializer (const construc
/* Designated initializers for array elements are not supported. */
if (ce-index)
{
+ tree ce_index = (TREE_CODE (ce-index) == CONST_DECL
+ ? integral_constant_value (ce-index) : ce-index);
+
/* The parser only allows identifiers as designated
initializers. */
if (ce-index == error_mark_node)
error (name used in a GNU-style designated
initializer for an array);
- else if (TREE_CODE (ce-index) == INTEGER_CST)
+ else if (TREE_CODE (ce_index) == INTEGER_CST)
{
/* A C99 designator is OK if it matches the current index. */
- if (TREE_INT_CST_LOW (ce-index) == index)
+ if (TREE_INT_CST_LOW (ce_index) == index)
return true;
else
sorry (non-trivial designated initializers not supported);
Index: testsuite/g++.dg/ext/desig5.C
===
--- testsuite/g++.dg/ext/desig5.C (revision 0)
+++ testsuite/g++.dg/ext/desig5.C (working copy)
@@ -0,0 +1,7 @@
+// PR c++/55951
+
+enum { A };
+
+static const char *a[] = {
+ [A] = a
+};
Re: [C++ Patch/RFC] PR 55951
On 03/26/2013 08:09 AM, Paolo Carlini wrote: check_array_designated_initializer is called by reshape_init* with ce-index a CONST_DECL, not an INTEGER_CST. Thus I wondered if in such cases it's just matter of using integral_constant_value on it, thus something like the below (which passes testing on x86_64-linux). Any constant-expression can go there, so I think I'd use cxx_constant_value unconditionally. Jason
[PATCH] Avoid a few find_base_term calls in alias.c
We have already computed the base term for some of the arguments
of some calls to base_alias_check. PR39326 shows that find_base_term
is very costly called from RTL PRE at -O2 (it mostly recurses
through the PLUS/MINUS_EXPR case). The following patch avoids
computing find_base_term when not really necessary.
Bootstrapped and tested on x86_64-unknown-linux-gnu.
Richard.
2013-03-26 Richard Biener rguent...@suse.de
* alias.c (find_base_term): Avoid redundant and not used
recursion.
(base_alias_check): Get the initial base term from the
caller.
(true_dependence_1): Compute and pass base terms to base_alias_check.
(write_dependence_p): Likewise.
(may_alias_p): Likewise.
Index: gcc/alias.c
===
--- gcc/alias.c (revision 197095)
+++ gcc/alias.c (working copy)
@@ -148,7 +148,7 @@ typedef struct alias_set_entry_d *alias_
static int rtx_equal_for_memref_p (const_rtx, const_rtx);
static int memrefs_conflict_p (int, rtx, int, rtx, HOST_WIDE_INT);
static void record_set (rtx, const_rtx, void *);
-static int base_alias_check (rtx, rtx, enum machine_mode,
+static int base_alias_check (rtx, rtx, rtx, rtx, enum machine_mode,
enum machine_mode);
static rtx find_base_value (rtx);
static int mems_in_disjoint_alias_sets_p (const_rtx, const_rtx);
@@ -1672,34 +1672,30 @@ find_base_term (rtx x)
if (tmp1 == pic_offset_table_rtx CONSTANT_P (tmp2))
return find_base_term (tmp2);
- /* If either operand is known to be a pointer, then use it
+ /* If either operand is known to be a pointer, then prefer it
to determine the base term. */
if (REG_P (tmp1) REG_POINTER (tmp1))
+ ;
+ else if (REG_P (tmp2) REG_POINTER (tmp2))
{
- rtx base = find_base_term (tmp1);
- if (base)
- return base;
+ rtx tem = tmp1;
+ tmp1 = tmp2;
+ tmp2 = tem;
}
- if (REG_P (tmp2) REG_POINTER (tmp2))
- {
- rtx base = find_base_term (tmp2);
- if (base)
- return base;
- }
-
- /* Neither operand was known to be a pointer. Go ahead and find the
- base term for both operands. */
- tmp1 = find_base_term (tmp1);
- tmp2 = find_base_term (tmp2);
-
- /* If either base term is named object or a special address
+ /* Go ahead and find the base term for both operands. If either base
+ term is from a pointer or is a named object or a special address
(like an argument or stack reference), then use it for the
base term. */
- if (tmp1 != 0 known_base_value_p (tmp1))
+ tmp1 = find_base_term (tmp1);
+ if (tmp1 != NULL_RTX
+((REG_P (tmp1) REG_POINTER (tmp1))
+|| known_base_value_p (tmp1)))
return tmp1;
-
- if (tmp2 != 0 known_base_value_p (tmp2))
+ tmp2 = find_base_term (tmp2);
+ if (tmp2 != NULL_RTX
+((REG_P (tmp2) REG_POINTER (tmp2))
+|| known_base_value_p (tmp2)))
return tmp2;
/* We could not determine which of the two operands was the
@@ -1736,12 +1732,9 @@ may_be_sp_based_p (rtx x)
objects, 1 if they might be pointers to the same object. */
static int
-base_alias_check (rtx x, rtx y, enum machine_mode x_mode,
- enum machine_mode y_mode)
+base_alias_check (rtx x, rtx x_base, rtx y, rtx y_base,
+ enum machine_mode x_mode, enum machine_mode y_mode)
{
- rtx x_base = find_base_term (x);
- rtx y_base = find_base_term (y);
-
/* If the address itself has no known base see if a known equivalent
value has one. If either address still has no known base, nothing
is known about aliasing. */
@@ -2511,7 +2504,9 @@ true_dependence_1 (const_rtx mem, enum m
CONSTANT_POOL_ADDRESS_P (base
return 0;
- if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode))
+ rtx mem_base = find_base_term (mem_addr);
+ if (! base_alias_check (x_addr, base, mem_addr, mem_base,
+ GET_MODE (x), mem_mode))
return 0;
x_addr = canon_rtx (x_addr);
@@ -2603,16 +2598,16 @@ write_dependence_p (const_rtx mem, const
mem_addr = get_addr (mem_addr);
}
- if (! writep)
-{
- base = find_base_term (mem_addr);
- if (base (GET_CODE (base) == LABEL_REF
- || (GET_CODE (base) == SYMBOL_REF
- CONSTANT_POOL_ADDRESS_P (base
- return 0;
-}
+ base = find_base_term (mem_addr);
+ if (! writep
+ base
+ (GET_CODE (base) == LABEL_REF
+ || (GET_CODE (base) == SYMBOL_REF
+ CONSTANT_POOL_ADDRESS_P (base
+return 0;
- if (! base_alias_check (x_addr, mem_addr, GET_MODE (x),
+ rtx x_base = find_base_term (x_addr);
+ if (!
[PATCH 7/n, i386]: Merge *movdfcc_1_rex64 with base pattern using x64 and nox64 isa attribute
Hello!
2013-03-26 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.md (*movdfcc_1): Merge with *movdfcc_1_rex64.
Use x64 and nox64 isa attributes.
Tested on x86_64-pc-linux-gnu {,-m32} and committed to mainline SVN.
Uros.
Index: i386.md
===
--- i386.md (revision 197100)
+++ i386.md (working copy)
@@ -15969,38 +15969,27 @@
[(set_attr type fcmov)
(set_attr mode XF)])
-(define_insn *movdfcc_1_rex64
- [(set (match_operand:DF 0 register_operand =f,f,r,r)
+(define_insn *movdfcc_1
+ [(set (match_operand:DF 0 register_operand =f,f,r,r,r ,r)
(if_then_else:DF (match_operator 1 fcmov_comparison_operator
[(reg FLAGS_REG) (const_int 0)])
- (match_operand:DF 2 nonimmediate_operand f,0,rm,0)
- (match_operand:DF 3 nonimmediate_operand 0,f,0,rm)))]
- TARGET_64BIT TARGET_80387 TARGET_CMOVE
+ (match_operand:DF 2 nonimmediate_operand
+ f ,0,rm,0 ,rm,0)
+ (match_operand:DF 3 nonimmediate_operand
+ 0 ,f,0 ,rm,0, rm)))]
+ TARGET_80387 TARGET_CMOVE
!(MEM_P (operands[2]) MEM_P (operands[3]))
@
fcmov%F1\t{%2, %0|%0, %2}
fcmov%f1\t{%3, %0|%0, %3}
+ #
+ #
cmov%O2%C1\t{%2, %0|%0, %2}
cmov%O2%c1\t{%3, %0|%0, %3}
- [(set_attr type fcmov,fcmov,icmov,icmov)
- (set_attr mode DF,DF,DI,DI)])
+ [(set_attr isa *,*,nox64,nox64,x64,x64)
+ (set_attr type fcmov,fcmov,multi,multi,icmov,icmov)
+ (set_attr mode DF,DF,DI,DI,DI,DI)])
-(define_insn *movdfcc_1
- [(set (match_operand:DF 0 register_operand =f,f,r,r)
- (if_then_else:DF (match_operator 1 fcmov_comparison_operator
- [(reg FLAGS_REG) (const_int 0)])
- (match_operand:DF 2 nonimmediate_operand f,0,rm,0)
- (match_operand:DF 3 nonimmediate_operand 0,f,0,rm)))]
- !TARGET_64BIT TARGET_80387 TARGET_CMOVE
-!(MEM_P (operands[2]) MEM_P (operands[3]))
- @
- fcmov%F1\t{%2, %0|%0, %2}
- fcmov%f1\t{%3, %0|%0, %3}
- #
- #
- [(set_attr type fcmov,fcmov,multi,multi)
- (set_attr mode DF,DF,DI,DI)])
-
(define_split
[(set (match_operand:DF 0 register_and_not_any_fp_reg_operand)
(if_then_else:DF (match_operator 1 fcmov_comparison_operator
Re: [C++ Patch/RFC] PR 55951
Hi,
On 03/26/2013 01:32 PM, Jason Merrill wrote:
On 03/26/2013 08:09 AM, Paolo Carlini wrote:
check_array_designated_initializer is called by reshape_init* with
ce-index a CONST_DECL, not an INTEGER_CST. Thus I wondered if in such
cases it's just matter of using integral_constant_value on it, thus
something like the below (which passes testing on x86_64-linux).
Any constant-expression can go there, so I think I'd use
cxx_constant_value unconditionally.
Ok. There is the slight complication that cxx_eval_constant_expression
cannot cope with identifier nodes (as in desig3.C) and I have to do
something like the below to pass the testsuite. Is it Ok? Alternately I
could even check for identifier_p at the beginning of
cxx_eval_constant_expression.
Thanks,
Paolo.
/
Index: cp/decl.c
===
--- cp/decl.c (revision 197097)
+++ cp/decl.c (working copy)
@@ -4766,25 +4766,31 @@ check_array_designated_initializer (const construc
/* Designated initializers for array elements are not supported. */
if (ce-index)
{
+ if (identifier_p (ce-index))
+ {
+ error (name %qD used in a GNU-style designated
+initializer for an array, ce-index);
+ return false;
+ }
+
+ tree ce_index = cxx_constant_value (ce-index);
+
/* The parser only allows identifiers as designated
initializers. */
if (ce-index == error_mark_node)
error (name used in a GNU-style designated
initializer for an array);
- else if (TREE_CODE (ce-index) == INTEGER_CST)
+ else if (TREE_CODE (ce_index) == INTEGER_CST)
{
/* A C99 designator is OK if it matches the current index. */
- if (TREE_INT_CST_LOW (ce-index) == index)
+ if (TREE_INT_CST_LOW (ce_index) == index)
return true;
else
sorry (non-trivial designated initializers not supported);
}
else
- {
- gcc_assert (identifier_p (ce-index));
- error (name %qD used in a GNU-style designated
-initializer for an array, ce-index);
- }
+ gcc_unreachable ();
+
return false;
}
Index: testsuite/g++.dg/ext/desig5.C
===
--- testsuite/g++.dg/ext/desig5.C (revision 0)
+++ testsuite/g++.dg/ext/desig5.C (working copy)
@@ -0,0 +1,7 @@
+// PR c++/55951
+
+enum { A };
+
+static const char *a[] = {
+ [A] = a
+};
Re: [PATCH][ARM] GCC command line support for Cortex-R7
On Mon, Feb 25, 2013 at 2:23 AM, Terry Guo terry@arm.com wrote: Hi, This patch is to enable GCC to accept new command line option -mcpu=cortex-r7. Is it OK to trunk? BR, Terry 2013-02-25 Terry Guo terry@arm.com * config/arm/arm-cores.def: Added core cortex-r7. * config/arm/arm-tune.md: Regenerated. * config/arm/arm-tables.opt: Regenerated. * doc/invoke.texi: Added entry for core cortex-r7. Ok. regards Ramana
Re: [PATCH,ARM] Peephole individual LDR/STD into LDRD/STRD
On Wed, Feb 13, 2013 at 1:35 PM, Greta Yorsh greta.yo...@arm.com wrote: This patch defines peephole2 patterns that merge two individual LDR instructions into LDRD instruction (resp. STR into STRD) whenever possible using the following transformations: * reorder two memory accesses, * rename registers when storing two constants, and * reorder target registers of a load when they are used by a commutative operation. In ARM mode only, the pair of registers IP and SP is allowed as operands in LDRD/STRD. To handle it, this patch defines a new constraint q to be CORE_REGS in ARM mode and GENERAL_REGS (i.e., equivalent to r) otherwise. Note that in ARM mode q is not equivalent to rk because of the way constraints are matched. The new constraint q is used in place of r for DImode move between register and memory. This is a new version of the patch posted for review a long time ago: http://gcc.gnu.org/ml/gcc-patches/2011-11/msg00914.html All the dependencies mentioned in the previous patch have already been upstreamed. Compared to the previous version, the new patch * handles both ARM and Thumb modes in the same peephole pattern, * does not attempt to generate LDRD/STRD when optimizing for size and non of the LDM/STM patterns match (but it would be easy to add), I think it's worth doing that as a follow-up but remember to handle mfix-cortex-m3-ldrd . * does not include scan-assembly tests specific for cortex-a15 and cortex-a9, because they are not stable and highly sensitive to other optimizations. No regression on qemu for arm-none-eabi with cpu cortex-a15. Bootstrap successful on Cortex-A15 TC2. Spec2k results: Performance: slight improvement in overall scores (less than 1%) in both CINT2000 and CFP2000. For individual benchmarks, there is a slight variation in performance, within less than 1%, which I consider to be just noise. Object size: there is a slight reduction in size in all the benchmarks - overall 0.2% and at most 0.5% for individual benchmarks. Baseline compiler is gcc r194473 from December 2012. Compiled in thumb mode with hardfp. Run on Cortex-A15 hardware. Ok for gcc4.9 stage 1? Ok if no regressions. regards Ramana Thanks, Greta gcc/ 2013-02-13 Greta Yorsh greta.yo...@arm.com * config/arm/constraints.md (q): New constraint. * config/arm/ldrdstrd.md: New file. * config/arm/arm.md (ldrdstrd.md) New include. (arm_movdi): Use q instead of r constraint for double-word memory access. (movdf_soft_insn): Likewise. * config/arm/vfp.md (movdi_vfp): Likewise. * config/arm/t-arm (MD_INCLUDES): Add ldrdstrd.md. * config/arm/arm-protos.h (gen_operands_ldrd_strd): New declaration. * config/arm/arm.c (gen_operands_ldrd_strd): New function. (mem_ok_for_ldrd_strd): Likewise. (output_move_double): Update assertion. gcc/testsuite 2013-02-13 Greta Yorsh greta.yo...@arm.com * gcc.target/arm/peep-ldrd-1.c: New test. * gcc.target/arm/peep-strd-1.c: Likewise.
Re: [PATCH,ARM][3/n] Split various patterns
On Mon, Feb 18, 2013 at 6:38 PM, Greta Yorsh greta.yo...@arm.com wrote:
Convert define_insn into define_insn_and_split for various patterns that
output multiple assembly instructions.
It appears that preparation statements in define_insn_and_split sometimes
are called with which_alternative set to -1 even after reload. Therefore,
preparation statements use conditions on the operands instead of
which_alternative.
gcc/
2013-02-14 Greta Yorsh greta.yo...@arm.com
* config/arm/arm.md (andsi_iorsi3_notsi): Convert define_insn into
define_insn_and_split.
(arm_negdi2,arm_abssi2,arm_neg_abssi2): Likewise.
(arm_cmpdi_insn,arm_cmpdi_unsigned): Likewise.
-(define_insn *arm_neg_abssi2
+(define_insn_and_split *arm_neg_abssi2
[(set (match_operand:SI 0 s_register_operand =r,r)
(neg:SI (abs:SI (match_operand:SI 1 s_register_operand 0,r
(clobber (reg:CC CC_REGNUM))]
TARGET_ARM
- @
- cmp\\t%0, #0\;rsbgt\\t%0, %0, #0
- eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31
+ #
+ {
+ /* if (which_alternative == 0) */
+ if (REGNO(operands[0]) == REGNO(operands[1]))
+ {
+ /* Emit the pattern:
+ cmp\\t%0, #0\;rsblt\\t%0, %0, #0
+ [(set (reg:CC CC_REGNUM)
+ (compare:CC (match_dup 0) (const_int 0)))
+ (cond_exec (lt:CC (reg:CC CC_REGNUM) (const_int 0))
+ (set (match_dup 0) (minus:SI (const_int 0) (match_dup
1]
+ */
+ emit_insn (gen_rtx_SET (VOIDmode,
+ gen_rtx_REG (CCmode, CC_REGNUM),
+ gen_rtx_COMPARE (CCmode, operands[0],
const0_rtx)));
+ emit_insn (gen_rtx_COND_EXEC (VOIDmode,
+(gen_rtx_LT (SImode,
+ gen_rtx_REG (CCmode,
CC_REGNUM),
+ const0_rtx)),
+(gen_rtx_SET (VOIDmode,
+ operands[0],
+ (gen_rtx_MINUS (SImode,
+ const0_rtx,
+
operands[1]));
+ DONE;
+ }
+ else
+ {
+ /* Emit the pattern:
+ alt1: eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31
+ [(set (match_dup 0)
+ (xor:SI (match_dup 1)
+ (ashiftrt:SI (match_dup 1) (const_int 31
+ (set (match_dup 0)
+ (minus:SI (match_dup 0)
+ (ashiftrt:SI (match_dup 1) (const_int 31]
+ */
+ emit_insn (gen_rtx_SET (VOIDmode,
+ operands[0],
+ gen_rtx_XOR (SImode,
+ gen_rtx_ASHIFTRT (SImode,
+ operands[1],
+ GEN_INT (31)),
+ operands[1])));
+ emit_insn (gen_rtx_SET (VOIDmode,
+ operands[0],
+ gen_rtx_MINUS (SImode,
+ operands[0],
+ gen_rtx_ASHIFTRT (SImode,
+ operands[1],
+ GEN_INT
(31);
+ DONE;
+ }
+ }
Sink the DONE to the common part.
Ok with that change.
regards
Ramana
Re: [PATCH,ARM][4/n] Add negdi_extend patterns
On Mon, Feb 18, 2013 at 6:40 PM, Greta Yorsh greta.yo...@arm.com wrote: This patch adds patterns to handle negation of an extended 32-bit value more efficiently. For example, (set (reg:DI r0) (neg:DI (sign_extend:DI (reg:SI r0))) The compiler currently generates mov r1, r0, asr #31 rsbsr0, r0, #0 rsc r1, r1, #0 and after the patch it generates: rsb r0, r0, #0 mov r1, r0, asr #31 (set (reg:DI r0) (neg:DI (zero_extend:DI (reg:SI r0))) The compiler currently generates mov r1, #0 rsbsr0, r0, #0 rsc r1, r1, #0 and after the patch it generates: rsbsr0, r0, #0 sbc r1, r1, r1 The following examples are not affected by the patch: (set (reg:DI r0) (sign_extend:DI (neg:SI (reg:SI r0))) rsb r0, r0, #0 mov r1, r0, asr #31 (set (reg:DI r0) (zero_extend:DI (neg:SI (reg:SI r0))) rsb r0, r0, #0 mov r1, #0 The patch also adds the appropriate test cases. gcc/ 2013-01-10 Greta Yorsh greta.yo...@arm.com * config/arm/arm.md (negdi_extendsidi): New pattern. (negdi_zero_extendsidi): Likewise. gcc/testsuite 2013-01-10 Greta Yorsh greta.yo...@arm.com * gcc.target/arm/negdi-1.c: New test. * gcc.target/arm/negdi-2.c: Likewise. * gcc.target/arm/negdi-3.c: Likewise. * gcc.target/arm/negdi-4.c: Likewise. Ok. Ramana
Re: [PATCH,ARM][5/n] Split shift di patterns
On Mon, Feb 18, 2013 at 6:42 PM, Greta Yorsh greta.yo...@arm.com wrote: Convert define_insn into define_insn_and_split for various DImode shift operations that output multiple assembly instructions. This patch also adds a new pattern for RRX using a new UNSPEC. This pattern matches RTL insns emitted by arm_ashrdi3_1bit and arm_lshrdi3_1bit splitters. This patch also adds a new pattern shiftsi3_compare. gcc/ 2013-02-14 Greta Yorsh greta.yo...@arm.com * config/arm/arm.md (arm_ashldi3_1bit): Convert define_insn into define_insn_and_split. (arm_ashrdi3_1bit,arm_lshrdi3_1bit): Likewise. (shiftsi3_compare): New pattern. (rrx): New pattern. * config/arm/unspecs.md (UNSPEC_RRX): New. Ok. Ramana
Re: [PATCH, ARM, iWMMXT] Fix define_constants for WCGR
On Wed, Mar 20, 2013 at 2:43 AM, Xinyu Qi x...@marvell.com wrote: At 2013-01-22 19:58:43,Ramana Radhakrishnan ramra...@arm.com wrote: On 01/22/13 09:21, Xinyu Qi wrote: Ping, Fix ChangeLog The ChangeLog format includes . date Author's name a...@c.com If you want a patch accepted in the future, please help by creating the Changelog entry in the correct format, i.e. fill in the author's name as well as email address as below. I've created an entry as below. Please remember to do so for every patch you submit - thanks. DATE Xinyu Qi x...@marvell.com * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/iwmmxt.md (WCGR0): Update. (WCGR1, WCGR2, WCGR3): Likewise. The patch by itself is OK but surprisingly I never saw this earlier. Your ping has removed the date from the original post so I couldn't track it down. Anyway, please apply. regards, Ramana Hi Ramana, Since I have no write access, would you mind to help to check in this patch? The patch is attached. ChangeLog 2013-01-31 Xinyu Qi x...@marvell.com * config/arm/arm.h (FIRST_IWMMXT_GR_REGNUM): Add comment. * config/arm/iwmmxt.md (WCGR0): Update. (WCGR1, WCGR2, WCGR3): Likewise. Now applied to trunk .sorry about the delay. Ramana
Re: [PATCH, ARM] Extend uclinux LINK_GCC_C_SEQUENCE_SPEC
On Tue, Mar 19, 2013 at 9:15 AM, Zhenqiang Chen zhenqiang.c...@arm.com wrote:
Hi,
libstdc++ configure will check shl_load. If shared library is disabled in
gcc and uclibc configure, the libstdc++ configure will fail for options like
-mthumb -march=armv7-r. The fail logs like:
.../libgcc.a(unwind-arm.o): In function `unwind_phase2_forced':
unwind-arm.c:(.text+0x282): undefined reference to `memcpy'
unwind-arm.c:(.text+0x2b0): undefined reference to `memcpy'
collect2: error: ld returned 1 exit status
Logs show uclibc depends on __aeabi_unwind_cpp_pr1 from libgcc. And
unwind_phase2_forced from libgcc depends on memcpy from uclibc. So an
additional %L is required for non-static link.
Is it OK for trunk?
Thanks!
-Zhenqiang
2013-03-19 Zhenqiang Chen zhenqiang.c...@arm.com
* config/arm/uclinux-elf.h: Add %L to LINK_GCC_C_SEQUENCE_SPEC for
non- static link
diff --git a/gcc/config/arm/uclinux-elf.h b/gcc/config/arm/uclinux-elf.h
index c1fe9f1..74d63df 100644
--- a/gcc/config/arm/uclinux-elf.h
+++ b/gcc/config/arm/uclinux-elf.h
@@ -65,7 +65,7 @@
#undef LINK_GCC_C_SEQUENCE_SPEC
#define LINK_GCC_C_SEQUENCE_SPEC \
- %{static:--start-group} %G %L %{static:--end-group}%{!static:%G}
+ %{static:--start-group} %G %L %{static:--end-group}%{!static:%G %L}
/* Use --as-needed -lgcc_s for eh support. */ #ifdef HAVE_LD_AS_NEEDED
Ok .
Ramana
Re: [C++ Patch/RFC] PR 55951
On 03/26/2013 09:17 AM, Paolo Carlini wrote:
+ if (identifier_p (ce-index))
+ {
+ error (name %qD used in a GNU-style designated
+initializer for an array, ce-index);
+ return false;
+ }
+
+ tree ce_index = cxx_constant_value (ce-index);
+
/* The parser only allows identifiers as designated
initializers. */
if (ce-index == error_mark_node)
error (name used in a GNU-style designated
initializer for an array);
Let's also combine these two instances of the same error.
Jason
Re: [C++ Patch/RFC] PR 55951
On 03/26/2013 10:14 AM, Jason Merrill wrote:
On 03/26/2013 09:17 AM, Paolo Carlini wrote:
+ if (identifier_p (ce-index))
+{
+ error (name %qD used in a GNU-style designated
+ initializer for an array, ce-index);
+ return false;
+}
+
+ tree ce_index = cxx_constant_value (ce-index);
+
/* The parser only allows identifiers as designated
initializers. */
if (ce-index == error_mark_node)
error (name used in a GNU-style designated
initializer for an array);
Let's also combine these two instances of the same error.
Or at any rate move the error_mark_node case above cxx_constant_value as
well.
Jason
Re: [Patch, Fortran] PR56649 - do more simplification of MERGE
Le 26/03/2013 12:21, Tobias Burnus a écrit : First, I am woefully aware that there are 7 patches which still have to be reviewed (...), one by Mikael If you are referring to http://gcc.gnu.org/ml/fortran/2013-03/msg8.html the patch is now obsolete, so we are now at only 6 patches pending. :-) Note: The gfc_get_parentheses() is required in some context, e.g. lbound(merge(i,i, .true.)) shall not not becomes lbound(i) but lbound( (i) ) otherwise, the result might be wrong. OK, except for the array case which makes sure that tsource and fsource are constant arrays. Build on x86-64-gnu-linux. OK for the trunk? OK with the array gfc_get_parentheses removed. Mikael
Re: [AArch64] Peepholes to generate ldp and stp instructions
On Mar 26, 2013, at 3:27 AM, Hurugalawadi, Naveen naveen.hurugalaw...@caviumnetworks.com wrote: Please find attached the patch that implements load pair(ldp) and store pair(stp) peephole for aarch64 target. Ah, I wish gcc had a better machine independent optimizer for load/store combination.
Re: [PATCH,ARM][6/n] Split min and max patterns
On Mon, Feb 18, 2013 at 6:44 PM, Greta Yorsh greta.yo...@arm.com wrote: Convert define_insn into define_insn_and_split for various min and max patterns that output multiple assembly instructions. Use movsicc to emit RTL. A separate patch will split movsicc. gcc/ 2013-02-14 Greta Yorsh greta.yo...@arm.com * config/arm/arm.md (arm_smax_insn): Convert define_insn into define_insn_and_split. (arm_smin_insn,arm_umaxsi3,arm_uminsi3): Likewise. Ok. regards Ramana
[PATCH] Fix PR37021 (well...)
This enables vectorizing of the complex multiplication testcase
in PR37021 by also allowing strided load support to apply to
REAL/IMAGPART_EXPR wrapped array or pointer loads. This causes
the loop to be vectorized via strided loads.
The testcase requires -fno-tree-pre unless the tree-ssa-structalias.c
hunk is applied because PTA (run as part of PRE) thinks that
COMPLEX_EXPR fn-param, 0.0 may point to global memory. While
technically this is conservatively correct it is too pessimizing,
so the patch makes us assume that we do not transfer pointer values
through floating-point values (similar to how we assume we don't
do that through truth values).
More proper vectorizing of the testcase is underway (using
SLP on groups with unknown gaps with unknown stride and mixed
operations). From that disclaimer you can see it's a lot
harder to do properly.
Cost model issues still disable vectorizing the loop in the testcase:
t.f90:8: note: cost model: the vector iteration cost = 24 divided by the
scalar iteration cost = 12 is greater or equal to the vectorization factor
= 2.
t.f90:8: note: not vectorized: vectorization not profitable.
t.f90:8: note: not vectorized: vector version will never be profitable.
Bootstrap and regtest running on x86_64-unknown-linux-gnu.
Richard.
2013-03-26 Richard Biener rguent...@suse.de
PR tree-optimization/37021
* tree-vect-data-refs.c (vect_check_strided_load): Allow
REALPART/IMAGPART_EXPRs around the supported refs.
* tree-ssa-structalias.c (find_func_aliases): Assume that
floating-point values are not used to transfer pointers.
* gfortran.dg/vect/fast-math-pr37021.f90: New testcase.
Index: gcc/tree-vect-data-refs.c
===
*** gcc/tree-vect-data-refs.c.orig 2013-03-26 14:27:19.0 +0100
--- gcc/tree-vect-data-refs.c 2013-03-26 14:29:21.519094419 +0100
*** vect_check_strided_load (gimple stmt, lo
*** 2798,2803
--- 2798,2807
base = DR_REF (dr);
+ if (TREE_CODE (base) == REALPART_EXPR
+ || TREE_CODE (base) == IMAGPART_EXPR)
+ base = TREE_OPERAND (base, 0);
+
if (TREE_CODE (base) == ARRAY_REF)
{
off = TREE_OPERAND (base, 1);
Index: gcc/testsuite/gfortran.dg/vect/fast-math-pr37021.f90
===
*** /dev/null 1970-01-01 00:00:00.0 +
--- gcc/testsuite/gfortran.dg/vect/fast-math-pr37021.f902013-03-26
14:34:38.546568933 +0100
***
*** 0
--- 1,17
+ ! { dg-do compile }
+
+ subroutine to_product_of(self,a,b,a1,a2)
+ complex(kind=8) :: self (:)
+ complex(kind=8), intent(in) :: a(:,:)
+ complex(kind=8), intent(in) :: b(:)
+ integer a1,a2
+ self = ZERO
+ do i = 1,a1
+ do j = 1,a2
+ self(i) = self(i) + a(i,j)*b(j)
+ end do
+ end do
+ end subroutine
+
+ ! { dg-final { scan-tree-dump vectorized 1 loops vect } }
+ ! { dg-final { cleanup-tree-dump vect } }
Index: gcc/tree-ssa-structalias.c
===
*** gcc/tree-ssa-structalias.c.orig 2013-03-26 15:14:37.0 +0100
--- gcc/tree-ssa-structalias.c 2013-03-26 15:14:45.411861483 +0100
*** find_func_aliases (gimple origt)
*** 4631,4637
get_constraint_for (lhsop, lhsc);
! if (code == POINTER_PLUS_EXPR)
get_constraint_for_ptr_offset (gimple_assign_rhs1 (t),
gimple_assign_rhs2 (t), rhsc);
else if (code == BIT_AND_EXPR
--- 4631,4641
get_constraint_for (lhsop, lhsc);
! if (FLOAT_TYPE_P (TREE_TYPE (lhsop)))
! /* If the operation produces a floating point result then
! assume the value is not produced to transfer a pointer. */
! ;
! else if (code == POINTER_PLUS_EXPR)
get_constraint_for_ptr_offset (gimple_assign_rhs1 (t),
gimple_assign_rhs2 (t), rhsc);
else if (code == BIT_AND_EXPR
Re: [C++ Patch/RFC] PR 55951
Hi,
On 03/26/2013 03:15 PM, Jason Merrill wrote:
On 03/26/2013 10:14 AM, Jason Merrill wrote:
On 03/26/2013 09:17 AM, Paolo Carlini wrote:
+ if (identifier_p (ce-index))
+{
+ error (name %qD used in a GNU-style designated
+ initializer for an array, ce-index);
+ return false;
+}
+
+ tree ce_index = cxx_constant_value (ce-index);
+
/* The parser only allows identifiers as designated
initializers. */
if (ce-index == error_mark_node)
error (name used in a GNU-style designated
initializer for an array);
Let's also combine these two instances of the same error.
Or at any rate move the error_mark_node case above cxx_constant_value
as well.
Indeed. Thus I'm finishing testing the below.
Thanks,
Paolo.
Index: cp/decl.c
===
--- cp/decl.c (revision 197097)
+++ cp/decl.c (working copy)
@@ -4769,22 +4769,31 @@ check_array_designated_initializer (const construc
/* The parser only allows identifiers as designated
initializers. */
if (ce-index == error_mark_node)
- error (name used in a GNU-style designated
- initializer for an array);
- else if (TREE_CODE (ce-index) == INTEGER_CST)
{
+ error (name used in a GNU-style designated
+initializer for an array);
+ return false;
+ }
+ else if (identifier_p (ce-index))
+ {
+ error (name %qD used in a GNU-style designated
+initializer for an array, ce-index);
+ return false;
+ }
+
+ tree ce_index = cxx_constant_value (ce-index);
+
+ if (TREE_CODE (ce_index) == INTEGER_CST)
+ {
/* A C99 designator is OK if it matches the current index. */
- if (TREE_INT_CST_LOW (ce-index) == index)
+ if (TREE_INT_CST_LOW (ce_index) == index)
return true;
else
sorry (non-trivial designated initializers not supported);
}
else
- {
- gcc_assert (identifier_p (ce-index));
- error (name %qD used in a GNU-style designated
-initializer for an array, ce-index);
- }
+ gcc_unreachable ();
+
return false;
}
Index: testsuite/g++.dg/ext/desig5.C
===
--- testsuite/g++.dg/ext/desig5.C (revision 0)
+++ testsuite/g++.dg/ext/desig5.C (working copy)
@@ -0,0 +1,7 @@
+// PR c++/55951
+
+enum { A };
+
+static const char *a[] = {
+ [A] = a
+};
Re: [Patch, fortran] Module loading improvements part 1/3
Le 24/03/2013 22:58, Janne Blomqvist a écrit :
The attached patch takes the crude approach of first sequentially
reading the .mod file into a temporary buffer, then does the actual
parsing from that buffer.
I don't like it much, but knowing how bad module files are currently
handled, it's probably the way to go.
This patch lays the groundwork
for
- zlib compression of .mod files (part 2/3).
This one sounds promising
- Caching module files, a crude implementation of the old module
namespaces idea. E.g. put the uncompressed module contents into a map
keyed by module name. (part 3/3).
But I'm not too fond of that one. Bah, let's see if it improves things.
@@ -1004,7 +1008,7 @@ static void bad_module (const char *)
ATTRIBUTE_NORETURN;
static void
bad_module (const char *msgid)
{
- fclose (module_fp);
+ XDELETEVEC (module_content);
I know this is followed by fatal errors only, but I would feel much
better with an additional 'module_content = NULL;'
OK with that change.
Mikael
Re: [C++ Patch/RFC] PR 55951
On 03/26/2013 11:00 AM, Paolo Carlini wrote:
+ tree ce_index = cxx_constant_value (ce-index);
+
+ if (TREE_CODE (ce_index) == INTEGER_CST)
+ {
/* A C99 designator is OK if it matches the current index. */
- if (TREE_INT_CST_LOW (ce-index) == index)
+ if (TREE_INT_CST_LOW (ce_index) == index)
return true;
Hmm, it occurs to me that we probably want to replace ce-index with the
constant value for the benefit of varasm. I'm surprised that the
testcase passes without doing that.
Jason
Re: [RFC PATCH] Implementing ifunc target hook
Hi,
Since almost three months have passed I feel that I need to recheck the patch
before commiting it. I fixed what Maxim mentioned and also I fixed:
diff --git a/gcc/configure b/gcc/configure
old mode 100755
new mode 100644
index eac96cd..928693a
--- a/gcc/configure
+++ b/gcc/configure
@@ -22055,11 +22055,14 @@ else
enable_gnu_indirect_function=$default_gnu_indirect_function
fi
-if test x$enable_gnu_indirect_function = xyes; then
-$as_echo #define HAVE_GNU_INDIRECT_FUNCTION 1 confdefs.h
+gif=`if test $enable_gnu_indirect_function == yes; then echo 1; else
echo 0; fi`
+
+cat confdefs.h _ACEOF
+#define HAVE_GNU_INDIRECT_FUNCTION $gif
+_ACEOF
+
-fi
if test $in_tree_ld != yes ; then
ld_ver=`$gcc_cv_ld --version 2/dev/null | sed 1q`
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 40a1af7..51d334c 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -2299,10 +2299,11 @@ AC_ARG_ENABLE(gnu-indirect-function,
Valid choices are 'yes' and 'no'.]) ;;
esac],
[enable_gnu_indirect_function=$default_gnu_indirect_function])
-if test x$enable_gnu_indirect_function = xyes; then
- AC_DEFINE(HAVE_GNU_INDIRECT_FUNCTION, 1,
- [Define if your system supports gnu indirect functions.])
-fi
+
+gif=`if test $enable_gnu_indirect_function == yes; then echo 1; else
echo 0; fi`
+AC_DEFINE_UNQUOTED(HAVE_GNU_INDIRECT_FUNCTION, $gif,
+[Define if your system supports gnu indirect functions.])
+
HAVE_GNU_INDIRECT_FUNCTION was not defined on targets that don't have
the support of IFUNC
and the build of compiler could be broken. Now we define
HAVE_GNU_INDIRECT_FUNCTION as 0 in
those cases.
ok for trunk?
thanks,
Alexander
2013/1/15 Maxim Kuvyrkov maxim.kuvyr...@gmail.com:
On 15/01/2013, at 4:55 AM, Alexander Ivchenko wrote:
thank you very much for your review!
I fixed the arm build and all other issues that you raised.
the patch is attached. Bootstrap and tested on x86-64 linux
The patch is OK with the cleanups mentioned below (no need to resubmit for
review). Unfortunately, you will have to wait for Stage 1 to commit your
patch.
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -636,6 +636,11 @@ case ${target} in
native_system_header_dir=/include
;;
esac
+ case $target in
+*linux*)
+ tm_p_file=${tm_p_file} linux-protos.h
+ ;;
+ esac
# glibc / uclibc / bionic switch.
# uclibc and bionic aren't usable for GNU/Hurd and neither for GNU/k*BSD.
case $target in
Can we merge this above hunk into subsequent case $target statement ...
@@ -661,8 +666,10 @@ case ${target} in
# Add Android userspace support to Linux targets.
case $target in
*linux*)
+ tmake_file=${tmake_file} t-linux-android
tm_file=$tm_file linux-android.h
extra_options=$extra_options linux-android.opt
+ extra_objs=$extra_objs linux-android.o
;;
esac
... here?
# Enable compilation for Android by default for *android* targets.
@@ -863,7 +870,9 @@ arm*-*-netbsdelf*)
tmake_file=${tmake_file} arm/t-arm
;;
arm*-*-linux-*) # ARM GNU/Linux with ELF
+ tmake_file=${tmake_file} t-linux-android
Merge this with tmake_file= setting a couple of lines down. Put
t-linux-android last on the line.
tm_file=dbxelf.h elfos.h gnu-user.h linux.h linux-android.h
glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h
+ extra_objs=$extra_objs linux-android.o
Please push extra_objs= setting a couple of lines down so that addition of
t-linux-android and linux-android.o are side-by-side.
case $target in
arm*b-*-linux*)
tm_defines=${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1
diff --git a/gcc/config/linux-android.c b/gcc/config/linux-android.c
new file mode 100644
index 000..f3d82a5
--- /dev/null
+++ b/gcc/config/linux-android.c
@@ -0,0 +1,34 @@
+/* Functions for Linux Android as target machine for GNU C compiler.
+ Copyright (C) 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2010, 2011,
+ 2012, 2013.
Should be Copyright (C) 2013. The copyright dates start with the year in
which a file was added.
Also, for any file that your changes touch please add 2013 to the list of
copyright years. This is an annoying chore that committers have to do at the
beginning of each year.
diff --git a/gcc/config/linux-protos.h b/gcc/config/linux-protos.h
new file mode 100644
index 000..aae1d28
--- /dev/null
+++ b/gcc/config/linux-protos.h
@@ -0,0 +1,22 @@
+/* Prototypes.
+ Copyright (C) 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2010, 2011,
+ 2012, 2013
Copyright (C) 2013.
--- /dev/null
+++ b/gcc/config/t-linux-android
@@ -0,0 +1,23 @@
+# Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
2013
Copyright (C) 2013.
Thanks!
--
Maxim Kuvyrkov
disable_ifunc_for_android.patch
Description: Binary data
Re: [Patch, fortran] Module loading improvements part 1/3
Mikael Morin wrote: Le 24/03/2013 22:58, Janne Blomqvist a écrit : The attached patch takes the crude approach of first sequentially reading the .mod file into a temporary buffer, then does the actual parsing from that buffer. I don't like it much, but knowing how bad module files are currently handled, it's probably the way to go. ... - Caching module files, a crude implementation of the old module namespaces idea. E.g. put the uncompressed module contents into a map keyed by module name. (part 3/3). But I'm not too fond of that one. Bah, let's see if it improves things. I wonder whether one should also do what Joost has proposed:* Changing allocatable to al etc. That reduces both the .mod file size (and thus I/O and improves caching) and the memory consumption of the compiler with the proposed caching scheme. As context-aware compression, it could even have a better ratio than ZIP. (ZIP can still be used on top of it.) Tobias
Re: [Patch, Fortran] PR56649 - do more simplification of MERGE
Mikael Morin wrote: If you are referring to http://gcc.gnu.org/ml/fortran/2013-03/msg8.html the patch is now obsolete, so we are now at only 6 patches pending. :-) Yes, I was thinking of those - as fix for the 4.6?/4.7/4.8 regression. OK with the array gfc_get_parentheses removed. Thanks for the review - and well spotted that the () is pointless for an array constructor. Tobias
Re: [C++ Patch/RFC] PR 55951
Hi,
On 03/26/2013 04:10 PM, Jason Merrill wrote:
On 03/26/2013 11:00 AM, Paolo Carlini wrote:
+ tree ce_index = cxx_constant_value (ce-index);
+
+ if (TREE_CODE (ce_index) == INTEGER_CST)
+{
/* A C99 designator is OK if it matches the current index. */
- if (TREE_INT_CST_LOW (ce-index) == index)
+ if (TREE_INT_CST_LOW (ce_index) == index)
return true;
Hmm, it occurs to me that we probably want to replace ce-index with
the constant value for the benefit of varasm. I'm surprised that the
testcase passes without doing that.
No problem. The below is already past g++.dg/dg.exp.
Paolo.
/
Index: cp/decl.c
===
--- cp/decl.c (revision 197097)
+++ cp/decl.c (working copy)
@@ -4760,7 +4760,7 @@ grok_reference_init (tree decl, tree type, tree in
is valid, i.e., does not have a designated initializer. */
static bool
-check_array_designated_initializer (const constructor_elt *ce,
+check_array_designated_initializer (constructor_elt *ce,
unsigned HOST_WIDE_INT index)
{
/* Designated initializers for array elements are not supported. */
@@ -4769,10 +4769,22 @@ static bool
/* The parser only allows identifiers as designated
initializers. */
if (ce-index == error_mark_node)
- error (name used in a GNU-style designated
- initializer for an array);
- else if (TREE_CODE (ce-index) == INTEGER_CST)
{
+ error (name used in a GNU-style designated
+initializer for an array);
+ return false;
+ }
+ else if (identifier_p (ce-index))
+ {
+ error (name %qD used in a GNU-style designated
+initializer for an array, ce-index);
+ return false;
+ }
+
+ ce-index = cxx_constant_value (ce-index);
+
+ if (TREE_CODE (ce-index) == INTEGER_CST)
+ {
/* A C99 designator is OK if it matches the current index. */
if (TREE_INT_CST_LOW (ce-index) == index)
return true;
@@ -4780,11 +4792,8 @@ static bool
sorry (non-trivial designated initializers not supported);
}
else
- {
- gcc_assert (identifier_p (ce-index));
- error (name %qD used in a GNU-style designated
-initializer for an array, ce-index);
- }
+ gcc_unreachable ();
+
return false;
}
Index: testsuite/g++.dg/ext/desig5.C
===
--- testsuite/g++.dg/ext/desig5.C (revision 0)
+++ testsuite/g++.dg/ext/desig5.C (working copy)
@@ -0,0 +1,7 @@
+// PR c++/55951
+
+enum { A };
+
+static const char *a[] = {
+ [A] = a
+};
Re: [patch, fortran, 4.9] Improve efficiency of array constructor operators
Thomas Koenig wrote: this patch finally makes the idiom if (any([a,b,c] eps)) then equivalent to if (aeps .or. beps .or. ceps) then so that there is no loss in efficiency through generating temporary arrays. I have not yet looked at the patch, but I wonder whether that causes invalid code for if (any([a,b,c] f())) by evaluating f() multiple times. Another question is: Why do we generate a temporary array for ANY/ALL? A scalar should be sufficient, i.e. res = .false. do i = 1, n res = res .or. (array(i) eps) end do if (res) In the scalar case with known array size, the middle-end should also be able to fully unroll the loop. I do not really see in how far such a patch would replace your patch - or whether it should be done additionally. Tobias
Re: [C++ Patch/RFC] PR 55951
OK. Jason
Re: [PATCH] Add -pthread option for RTEMS
I committed this patch which reduces test failures. http://gcc.gnu.org/ml/gcc-patches/2013-01/msg01373.html 2013-01-29 Sebastian Huber sebastian.hu...@embedded-brains.de * config/rtems.opt: Add -pthread option. -- Joel Sherrill, Ph.D. Director of Research Development joel.sherr...@oarcorp.comOn-Line Applications Research Ask me about RTEMS: a free RTOS Huntsville AL 35805 Support Available(256) 722-9985
RE: [patch] cilkplus array notation for C (clean, independent patchset, take 1)
On Fri, 22 Mar 2013, Iyer, Balaji V wrote:
Why the random check for a NULL argument? If a NULL argument is valid
(meaning that it makes the code cleaner to allow such arguments rather than
making sure the function isn't called with them), this should be documented
in
the comment above the function; otherwise, if such an argument isn't valid,
there is no need to check for it.
I always tend to check for a null pointer before I access the fields in
the structure. In this case it is unnecessary. In some cases (e.g.
find_rank) there is a good chance a null pointer will be passed into the
function and we need to check that and reject those.
always tend to check for a null pointer is not good practice.
Sometimes such checks are good, and sometimes they are bad.
Each function should have a defined interface that makes clear the
semantics and valid values of its operands - including whether NULL is
valid, and, if so, what the semantics of a NULL argument are. These
semantics should be clear from the comment above the function.
What the semantics should be in each case depends on a global view of the
relevant code. Based on such a global view you need to determine the
interfaces resulting in the cleanest code - in some cases there may be a
special case, the absence of a datastructure as opposed to its presence,
that is naturally represented by a NULL argument, but in that case it's a
judgement to be made for the code as a whole whether this case should be
checked for in the caller or the callee (or maybe further up or down the
call stack in some cases). Where erroneous input to the compiler is the
cause of NULL arguments, passing error_mark_node may be better in some
cases if it means fewer special-case checks.
If in a particular case it shouldn't be possible for a NULL pointer to be
present in a particular place (function argument, variable, etc.), for any
input to the compiler, it is always wrong to have a check for a NULL
pointer that silently continues compilation. Instead, in such cases where
NULL is invalid you have two options:
* No check, if NULL is present and dereferenced the compiler will crash.
* A check inside a gcc_assert, to verify this precondition of the function
and give a slightly friendlier internal compiler error than a segfault.
(Or any other similar option resulting in an abort with an ICE.)
You need to judge in each case which of the two is appropriate, just as
with any other case where there is some precondition for a function that
you might or might not decide to verify with an assertion, depending on
factors such as:
* how complicated such a check is to write;
* how expensive the check is when the compiler runs;
* how likely the check is to find bugs in the compiler;
* how helpful the check's presence is to people reading the source code
and trying to understand what the data may look like at a particular
point.
Note also that the fact that you observe a NULL pointer being passed to a
function and causing a crash there does not of itself mean that adding a
check for NULL is a valid fix. It's only a valid fix if analysis of the
issue shows that it was indeed correct for NULL to be passed to that
function for the given input to the compiler. Sometimes it may turn out
that NULL shouldn't have been passed to that function at all for that
input and that the proper fix is elsewhere in the compiler.
+ if (TREE_CODE (fn) == CALL_EXPR)
+{
+ fn_arg = CALL_EXPR_ARG (fn, 0);
+ if (really_constant_p (fn_arg))
I don't think really_constant_p is what's wanted;
http://software.intel.com/sites/default/files/m/4/e/7/3/1/40297-
Intel_Cilk_plus_lang_spec_2.htm
says The argument shall be an integer constant expression., and such
expressions always appear in the C front end as INTEGER_CST. So you can
just
check for INTEGER_CST.
What about C++? This function is shared by both C and C++.
This patch seems just to be for C. really_constant_p is wrong for C,
since INTEGER_CSTs wrapped with conversions can be used to represent
values folded to constants that aren't integer constant expressions.
Maybe you need a conditional on the language, but I don't know what the
right check for C++ might be in that case.
+void
+find_rank (tree array, bool ignore_builtin_fn, size_t *rank) {
+ tree ii_tree;
+ size_t current_rank = 0, ii = 0;
+ an_reduce_type dummy_type = REDUCE_UNKNOWN;
+ if (!array)
+return;
As before, avoid random checks for NULL parameters unless there is an actual
reason to allow them and the comments document that they are allowed and
what the semantics are in that case. In general, explain what ARRAY is - an
expression?
This check is necessary. Find rank can get a NULL pointer and that must
be caught and rejected.
Then make sure the comment explaining the semantics of ARRAY includes the
case of a NULL pointer, explaining what the
Re: [PATCH] Fix -Wformat-security warning in arm.c
Committed to trunk. Thanks, Roland
Re: [patch] cilkplus array notation for C (clean, independent patchset, take 1)
On Mon, 25 Mar 2013, Aldy Hernandez wrote: I always tend to check for a null pointer before I access the fields in the structure. In this case it is unnecessary. In some cases (e.g. find_rank) there is a good chance a null pointer will be passed into the function and we need to check that and reject those. I think what Joseph is suggesting is that if NULL is not valid, then the caller should check this. But if NULL is valid, then it should be documented in the function comment at the top. The caller should only check it if it's valid in the caller but not the callee. If it's invalid in the caller as well, neither should check (except maybe in an assertion if felt appropriate in a particular case). -- Joseph S. Myers jos...@codesourcery.com
Re: [patch, fortran, 4.9] Improve efficiency of array constructor operators
Hi Tobias,
I have not yet looked at the patch, but I wonder whether that causes
invalid code for
if (any([a,b,c] f()))
by evaluating f() multiple times.
This is avoided by this part of the patch:
+ if (op2-expr_type == EXPR_CONSTANT)
+scalar = gfc_copy_expr (op2);
+ else
+scalar = create_var (gfc_copy_expr (op2));
which results in code like this:
__var_1 = f ();
if ((a __var_1 || b __var_1) || c __var_1)
{
{
Another question is: Why do we generate a temporary array for ANY/ALL?
The straightforward way of evaluating
if (any([a,b,c] 0.)) then
is to
- create a temporary array [a,b,c]
- to create a second logical array and fill it with the
logical expressions,
- call a library function for ANY on it.
This was the original code and was not really efficient ;-)
Since Mikael's patch some time ago, we
- create a temporary array [a,b,c]
- loop over it, exiting early if a true value was found
With this patch (and my previous patch, which is already in),
with front-end optimization enabled, we now
- convert the expression into if (any[a0, b0, c0])
- convert this into a0 || b0 || c0 (effect of my previous patch)
A
scalar should be sufficient, i.e.
res = .false.
do i = 1, n
res = res .or. (array(i) eps)
end do
if (res)
We have been doing that since Mikael's patch some years ago.
Regards
Thomas
Re: [Patch, fortran] Module loading improvements part 1/3
Am 26.03.2013 16:24, schrieb Tobias Burnus: I wonder whether one should also do what Joost has proposed:* Changing allocatable to al etc. That reduces both the .mod file size (and thus I/O and improves caching) and the memory consumption of the compiler with the proposed caching scheme. As context-aware compression, it could even have a better ratio than ZIP. (ZIP can still be used on top of it.) I have been thinking a little bit about a complete redesign of the module files. Ideally, I would like it to be an extensible binary format, which uses a keyword-value combination and which could be accompanied by a dumper which makes it human-readable. A simple yacc grammar could handle both the reading and making the dumper. If this is designed right, it might not even be necessary to bump the module number for old library files. Thomas
Re: [patch] Unified debug dump function names.
On 3/26/13, Richard Biener richard.guent...@gmail.com wrote: On Mar 25, 2013 Lawrence Crowl cr...@googlers.com wrote: On 3/25/13, Richard Biener richard.guent...@gmail.com wrote: You add a not used new interface. What for? So that people can use it. For use from gdb only? No, for use from both gdb and internally. It is often that folks add dumps in various places while developing/debugging. These functions support that effort without having to hunt down the name. But having both interfaces is bad. As you are unconditionally dumping to stderr using debug () is correct. Sorry that I don't follow each and every proposal - nobody follows up my proposals either. The dump_ namespace is claimed by dumping to dumpfiles and diagnostics. In which case it should be debug (), not dump (). I will use whatever name you wish, but I would have preferred that we addressed naming issues when we published the plan, not after I've done the implementation. What name do you wish? debug (). Okay. And I'd like you to remove the alternate debug_ interface that is obsoleted by the overloads. I'm sure that folks have the old interfaces baked into scripts and dot files. I think it would should not remove the old interface until they have had some time to migrate. Btw, the overloading will provide extra headache to one of the most used ways to the debug_ routines: (gdb) call debug_tree (fndecl) function_decl 0x76e1b900 foo type function_type 0x76d28c78 type integer_type 0x76d175e8 int public SI size integer_cst 0x76d1a0c0 constant 32 unit size integer_cst 0x76d1a0e0 constant 4 align 32 symtab 0 alias set -1 canonical type 0x76d175e8 precision 32 min integer_cst 0x76d1a060 -2147483648 max integer_cst 0x76d1a080 2147483647 ... (gdb) call debug_tree (0x76d175e8) Cannot resolve function debug_tree to any overloaded instance (gdb) call debug_treetabtab debug_tree(tree_node*) debug_tree_chain(tree_node*) debug_tree_chain(tree_node*)::__FUNCTION__ debug_tree_ssa() debug_tree_ssa_stats() aha! (ok, I know this one is 'tree') (gdb) call debug_tree ((tree_node*)0x76d175e8) integer_type 0x76d175e8 int public SI size integer_cst 0x76d1a0c0 type integer_type 0x76d170a8 bitsizetype constant 32 unit size integer_cst 0x76d1a0e0 type integer_type 0x76d17000 sizetype constant 4 align 32 symtab 0 alias set -1 canonical type 0x76d175e8 precision 32 min integer_cst 0x76d1a060 -2147483648 max integer_cst 0x76d1a080 2147483647 pointer_to_this pointer_type 0x76d1f2a0 but with debug () having overloads to each and every thing we'd ever want to debug the list of possible types I have to cast that literal address I cutpasted will be endless. Any suggestion on how to improve this situation? Yes, it's already bad as with typing debug_tree I know it's a tree I am interested in and (gdb) call debug_tabtab ... endless list of functions and overloads ... is probably as useless as (gdb) call debugtabtab is after your patch. I have three suggestions, in increasing order of difficulty. First, modify the dumpers to print the type cast in front of the hex value. The cut and paste is just a bit wider. Second, modify the dumpers to print the access expression (which would then not require the hex value). I'm not actually sure how well this would work in practice. It's a thought. Third, modify gdb to have an interactive data explorer. As a straw man, explorer foo would open up a window with all of foo's elements. Each pointer is clickable and changes your view to its referrent. I've used such a tool, and while it was sometimes at too low a level of abstraction, it was generally quite handy for exploring the data. In retrospect, it would be nice to fold sub-objects (in the editor sense). -- Lawrence Crowl
Re: extend fwprop optimization
On Tue, Mar 26, 2013 at 10:14 AM, Richard Biener
richard.guent...@gmail.com wrote:
I am trying to figure out a way not to lose the opportunity when shift
truncation is not combined in a bit test pattern. Can we keep the
explicit truncation in RTL, but generate truncation code in assembly?
Then only shift truncation which not combined in a bit test
pattershift truncationn will happen.
(define_insn *shift_insn_andmode
[(set (match_operand:SWI48 0 nonimmediate_operand =rm)
(any_shiftrt:SWI48
(match_operand:SWI48 1 nonimmediate_operand 0)
(subreg:QI
(and:SI
(match_operand:SI 2 nonimmediate_operand c)
(match_operand:SI 3 const_int_operand n)) 0)))
(clobber (reg:CC FLAGS_REG))]
ix86_binary_operator_ok (CODE, MODEmode, operands)
{
if ((INTVAL (operands[3]) (GET_MODE_BITSIZE (MODEmode)-1))
== GET_MODE_BITSIZE (MODEmode)-1)
return and\t{%3, %2|%2, %3}\n\r shift\t{%b2, %0|%0, %b2};
else
shift\t{%2, %0|%0, %2};
}
Sorry, rectify a mistake:
{
if ((INTVAL (operands[3]) (GET_MODE_BITSIZE (MODEmode)-1))
== GET_MODE_BITSIZE (MODEmode)-1)
return shift\t{%2, %0|%0, %2};
else
return and\t{%3, %2|%2, %3}\n\r shift\t{%b2, %0|%0, %b2};
}
I'm not sure the existing patterns are wrong because SHIFT_COUNT_TRUNCATED
is false for x86 AFAIK, exactly because of the bit-test vs. shift instruction
differences. So there is no inconsistency. The i386 backend seems to
try to follow my suggestion as if SHIFT_COUNT_TRUNCATED didn't exist
(well, it's false, so it technically doesn't exist for i386) and recognizes
the shift with truncate with the *shift_insnmode3_mask splitter.
But I'm not sure why it bothers to do it with a splitter instead of just
with a define_insn? Because the split code,
[(parallel [(set (match_dup 0)
(any_shiftrt:SWI48 (match_dup 1) (match_dup 2)))
(clobber (reg:CC FLAGS_REG))])]
is wrong and could be combined into a bit-test instruction. No?
That is, why not have define_insn variants for shift instructions with
explicit truncation?
You are right, the split is harmful in this case.
It looks to me, that explicit truncation can be added to split
patterns in the most elegant way using proposed define_subst
infrastructure.
Uros.
[PATCH 8/n, i386]: Merge insns with zero-extracted arguments with corresponding base insns using nox64 isa attribute
Hello!
The problem with insn that use high register parts (%ah,%bh,%ch,%dh)
is, that they can't be encoded with rex64 prefix. This includes
registers, as well as memory operands involving extended registers. To
handle this limitation, 64bit targets avoid memory operands when high
register parts are used.
Attached patch merges definitions of TARGET_64BIT insns that use high
register parts with their corresponding base instructions.
In future, peephole2 may be added in order to merge memory operand,
formed without extended registers, into the insn. However, these
instructions are quite rare, the prototype peephole2 triggered only
once in a full gcc bootstrap, so it is questionable, if peephole2 is
worth adding.
2013-03-26 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.md (*cmpqi_ext_1): Merge with *cmpqi_ext_1_rex64
using nox64 isa attribute. Use nonimmediate_x86nomem_operand as
operand 0 predicate.
(*cmpqi_ext_3): Merge with *cmpqi_ext_3_rex64 using nox64 isa
attribute. Use general_x64nomem_operand as operand 1 predicate.
(*movqi_extv_1): Merge with *movqi_extv_1_rex64 using nox64 isa
attribute. Use nonimmediate_x64nomem_operand as operand 0 predicate.
(*movqi_extzv_2): Merge with *movqi_extzv_2_rex64 using nox64 isa
attribute. Use nonimmediate_x64nomem_operand as operand 0 predicate.
(movmode_insv_1): Remove expander. Merge insn with
movsi_insv_1 using SWI48 mode iterator and nox64 isa attribute.
Use general_x64nomem_operand as operand 1 predicate.
(addqi_ext_1): Merge with *addqi_ext_1_rex64 using nox64 isa attribute.
(*testqi_ext_1): Merge with *testqi_ext_1_rex64 using nox64 isa
attribute. Use nonimmediate_x64nomem_operand as operand 1 predicate.
(*andqi_ext_1): Merge with *andqi_ext_1_rex64 using nox64 isa
attribute. Use nonimmediate_x64nomem_operand as operand 2 predicate.
(*codeqi_ext_1): Merge with *codeqi_ext_1_rex64 using nox64 isa
attribute. Use nonimmediate_x64nomem_operand as operand 1 predicate.
(*xorqi_cc_ext_1): Merge with *xorqi_cc_ext_1_rex64 using nox64
isa attribute. Use general_x64nomem_operand as operand 2 predicate.
* config/i386/predicates.md (nonimmediate_x64nomem_operand): New.
(general_x64nomem_operand): Ditto.
Tested on x86_64-pc-linux-gnu {,-m32} and committed to mainline SVN.
Uros.
Index: config/i386/i386.md
===
--- config/i386/i386.md (revision 197113)
+++ config/i386/i386.md (working copy)
@@ -1032,31 +1032,18 @@
(define_insn *cmpqi_ext_1
[(set (reg FLAGS_REG)
(compare
- (match_operand:QI 0 general_operand Qm)
+ (match_operand:QI 0 nonimmediate_x64nomem_operand Q,m)
(subreg:QI
(zero_extract:SI
- (match_operand 1 ext_register_operand Q)
+ (match_operand 1 ext_register_operand Q,Q)
(const_int 8)
(const_int 8)) 0)))]
- !TARGET_64BIT ix86_match_ccmode (insn, CCmode)
+ ix86_match_ccmode (insn, CCmode)
cmp{b}\t{%h1, %0|%0, %h1}
- [(set_attr type icmp)
+ [(set_attr isa *,nox64)
+ (set_attr type icmp)
(set_attr mode QI)])
-(define_insn *cmpqi_ext_1_rex64
- [(set (reg FLAGS_REG)
- (compare
- (match_operand:QI 0 register_operand Q)
- (subreg:QI
- (zero_extract:SI
- (match_operand 1 ext_register_operand Q)
- (const_int 8)
- (const_int 8)) 0)))]
- TARGET_64BIT ix86_match_ccmode (insn, CCmode)
- cmp{b}\t{%h1, %0|%0, %h1}
- [(set_attr type icmp)
- (set_attr mode QI)])
-
(define_insn *cmpqi_ext_2
[(set (reg FLAGS_REG)
(compare
@@ -1080,38 +1067,24 @@
(match_operand 0 ext_register_operand)
(const_int 8)
(const_int 8)) 0)
- (match_operand:QI 1 immediate_operand)))])
+ (match_operand:QI 1 const_int_operand)))])
-(define_insn *cmpqi_ext_3_insn
+(define_insn *cmpqi_ext_3
[(set (reg FLAGS_REG)
(compare
(subreg:QI
(zero_extract:SI
- (match_operand 0 ext_register_operand Q)
+ (match_operand 0 ext_register_operand Q,Q)
(const_int 8)
(const_int 8)) 0)
- (match_operand:QI 1 general_operand Qmn)))]
- !TARGET_64BIT ix86_match_ccmode (insn, CCmode)
+ (match_operand:QI 1 general_x64nomem_operand Qn,m)))]
+ ix86_match_ccmode (insn, CCmode)
cmp{b}\t{%1, %h0|%h0, %1}
- [(set_attr type icmp)
+ [(set_attr isa *,nox64)
+ (set_attr type icmp)
(set_attr modrm 1)
(set_attr mode QI)])
-(define_insn *cmpqi_ext_3_insn_rex64
- [(set (reg FLAGS_REG)
- (compare
- (subreg:QI
- (zero_extract:SI
- (match_operand 0 ext_register_operand Q)
- (const_int 8)
- (const_int 8)) 0)
- (match_operand:QI 1 nonmemory_operand
C++ PATCH: use VAR_OR_FUNCTION_DECL_P more often
The C++ front-end isn't very systematic in using existing predicates to
test node kinds. This patch makes us use VAR_OR_FUNCTION_DECL_P in
places where we were explicitly testing VAR_DECL || FUNCTION_DECL.
Tested on an x86_64-suse-linux.
Applying to trunk as obvious.
-- Gaby
2013-03-26 Gabriel Dos Reis g...@integrable-solutions.net
* cp-gimplify.c (cp_genericize_r): Use VAR_OR_FUNCTION_DECL_P.
* decl.c (duplicate_decls): Likewise.
(cp_finish_decl): Likewise.
(check_class_member_definition_namespace): Likewise.
* decl2.c (grokfield): Likewise.
(decl_needed_p): Likewise.
(import_export_decl): Likewise.
(mark_used): Likewise.
* name-lookup.c (pushdecl_maybe_friend_1): Likewise.
* pt.c (push_access_scope): Likewise.
(instantiate_decl): Likewise.
* ptree.c (cxx_print_decl): Likewise.
* repo.c (repo_emit_p): Likewise.
* semantics.c (note_decl_for_pch): Likewise.
* tree.c (decl_linkage): Likewise.
Index: cp-gimplify.c
===
--- cp-gimplify.c (revision 196984)
+++ cp-gimplify.c (working copy)
@@ -857,7 +857,7 @@
/* Map block scope extern declarations to visible declarations with the
same name and type in outer scopes if any. */
if (cp_function_chain-extern_decl_map
- (TREE_CODE (stmt) == FUNCTION_DECL || TREE_CODE (stmt) == VAR_DECL)
+ VAR_OR_FUNCTION_DECL_P (stmt)
DECL_EXTERNAL (stmt))
{
struct cxx_int_tree_map *h, in;
Index: decl.c
===
--- decl.c (revision 196984)
+++ decl.c (working copy)
@@ -1620,8 +1620,7 @@
warning_at (DECL_SOURCE_LOCATION (olddecl), 0,
follows non-prototype definition here);
}
- else if ((TREE_CODE (olddecl) == FUNCTION_DECL
- || TREE_CODE (olddecl) == VAR_DECL)
+ else if (VAR_OR_FUNCTION_DECL_P (olddecl)
DECL_LANGUAGE (newdecl) != DECL_LANGUAGE (olddecl))
{
/* [dcl.link]
@@ -6398,8 +6397,7 @@
/* Let the middle end know about variables and functions -- but not
static data members in uninstantiated class templates. */
- if (TREE_CODE (decl) == VAR_DECL
- || TREE_CODE (decl) == FUNCTION_DECL)
+ if (VAR_OR_FUNCTION_DECL_P (decl))
{
if (TREE_CODE (decl) == VAR_DECL)
{
@@ -7220,8 +7218,7 @@
{
/* These checks only apply to member functions and static data
members. */
- gcc_assert (TREE_CODE (decl) == FUNCTION_DECL
- || TREE_CODE (decl) == VAR_DECL);
+ gcc_assert (VAR_OR_FUNCTION_DECL_P (decl));
/* We check for problems with specializations in pt.c in
check_specialization_namespace, where we can issue better
diagnostics. */
Index: decl2.c
===
--- decl2.c (revision 196984)
+++ decl2.c (working copy)
@@ -955,8 +955,7 @@
}
}
- if (processing_template_decl
- (TREE_CODE (value) == VAR_DECL || TREE_CODE (value) == FUNCTION_DECL))
+ if (processing_template_decl VAR_OR_FUNCTION_DECL_P (value))
{
value = push_template_decl (value);
if (error_operand_p (value))
@@ -1799,8 +1798,7 @@
bool
decl_needed_p (tree decl)
{
- gcc_assert (TREE_CODE (decl) == VAR_DECL
- || TREE_CODE (decl) == FUNCTION_DECL);
+ gcc_assert (VAR_OR_FUNCTION_DECL_P (decl));
/* This function should only be called at the end of the translation
unit. We cannot be sure of whether or not something will be
COMDAT until that point. */
@@ -2002,8 +2000,7 @@
STRIP_NOPS (arg);
if (TREE_CODE (arg) == ADDR_EXPR)
arg = TREE_OPERAND (arg, 0);
- if (TREE_CODE (arg) == VAR_DECL
- || TREE_CODE (arg) == FUNCTION_DECL)
+ if (VAR_OR_FUNCTION_DECL_P (arg))
{
if (! TREE_PUBLIC (arg))
vis = VISIBILITY_ANON;
@@ -2419,8 +2416,7 @@
definition available in this translation unit.
The following assertions check these conditions. */
- gcc_assert (TREE_CODE (decl) == FUNCTION_DECL
- || TREE_CODE (decl) == VAR_DECL);
+ gcc_assert (VAR_OR_FUNCTION_DECL_P (decl));
/* Any code that creates entities with TREE_PUBLIC cleared should
also set DECL_INTERFACE_KNOWN. */
gcc_assert (TREE_PUBLIC (decl));
@@ -4528,7 +4524,7 @@
/* We can only check DECL_ODR_USED on variables or functions with
DECL_LANG_SPECIFIC set, and these are also the only decls that we
might need special handling for. */
- if ((TREE_CODE (decl) != VAR_DECL TREE_CODE (decl) != FUNCTION_DECL)
+ if (!VAR_OR_FUNCTION_DECL_P (decl)
|| DECL_LANG_SPECIFIC (decl) == NULL
|| DECL_THUNK_P (decl))
{
@@ -4664,7 +4660,7 @@
/* If this is a synthesized method we don't need to
do the
[ping] Re: [patch] [libffi] do not install libffi library, headers and documentation
[ping, adding the GCJ and Go maintainers] proposed patch at http://gcc.gnu.org/ml/gcc-patches/2013-02/msg00853.html Am 19.02.2013 10:13, schrieb Richard Biener: On Mon, Feb 18, 2013 at 6:02 PM, Matthias Klose d...@ubuntu.com wrote: Am 12.02.2013 13:45, schrieb Richard Biener: On Tue, Feb 12, 2013 at 1:44 PM, Richard Biener richard.guent...@gmail.com wrote: On Tue, Feb 12, 2013 at 1:30 PM, Matthias Klose d...@ubuntu.com wrote: The libffi library, headers and documentation are still installed, although libffi provides separate releases for a long time. So do not install these anymore as part of a GCC install. Tested with a build and an install with go and java enabled (both using libffi_convenience). Ok for the trunk? openSUSE is using the GCC provided libffi, so no, this is not ok (not at this stage anyway). Also proper not-installing libffi would work by disabling the maybe-install-target-libffi at the toplevel, not changing libffi makfiles (which are supposed to be imported from upstream, no?) Thus, add no_install= true; to the libffi target module updated patch attached, checked with a make install that no ffi headers and libraries are installed. If not ok for 4.8, ok for 4.9 when it opens? I'm fine with that variant but I'd like to see another ok. No preference as to whether to target 4.8 or 4.9. Richard. Matthias
Re: [ping] Re: [patch] [libffi] do not install libffi library, headers and documentation
On Tue, Mar 26, 2013 at 1:03 PM, Matthias Klose d...@ubuntu.com wrote: [ping, adding the GCJ and Go maintainers] proposed patch at http://gcc.gnu.org/ml/gcc-patches/2013-02/msg00853.html As far as I know this won't affect Go. So it's fine with me. But I'd rather see this approved by a libffi maintainer. But there is no libffi maintainer listed in MAINTAINERS. Hmmm. Ian Am 19.02.2013 10:13, schrieb Richard Biener: On Mon, Feb 18, 2013 at 6:02 PM, Matthias Klose d...@ubuntu.com wrote: Am 12.02.2013 13:45, schrieb Richard Biener: On Tue, Feb 12, 2013 at 1:44 PM, Richard Biener richard.guent...@gmail.com wrote: On Tue, Feb 12, 2013 at 1:30 PM, Matthias Klose d...@ubuntu.com wrote: The libffi library, headers and documentation are still installed, although libffi provides separate releases for a long time. So do not install these anymore as part of a GCC install. Tested with a build and an install with go and java enabled (both using libffi_convenience). Ok for the trunk? openSUSE is using the GCC provided libffi, so no, this is not ok (not at this stage anyway). Also proper not-installing libffi would work by disabling the maybe-install-target-libffi at the toplevel, not changing libffi makfiles (which are supposed to be imported from upstream, no?) Thus, add no_install= true; to the libffi target module updated patch attached, checked with a make install that no ffi headers and libraries are installed. If not ok for 4.8, ok for 4.9 when it opens? I'm fine with that variant but I'd like to see another ok. No preference as to whether to target 4.8 or 4.9. Richard. Matthias
Re: [ping] Re: [patch] [libffi] do not install libffi library, headers and documentation
For what it's worth, this patch is fine by me. I had originally proposed that GCC not install these bits. As far as maintainers go, I thought that I was once listed in the MAINTAINERS file. Feel free to add Andrew Haley and/or myself. Thanks, Anthony Green On Tue, Mar 26, 2013 at 4:28 PM, Ian Lance Taylor i...@google.com wrote: On Tue, Mar 26, 2013 at 1:03 PM, Matthias Klose d...@ubuntu.com wrote: [ping, adding the GCJ and Go maintainers] proposed patch at http://gcc.gnu.org/ml/gcc-patches/2013-02/msg00853.html As far as I know this won't affect Go. So it's fine with me. But I'd rather see this approved by a libffi maintainer. But there is no libffi maintainer listed in MAINTAINERS. Hmmm. Ian Am 19.02.2013 10:13, schrieb Richard Biener: On Mon, Feb 18, 2013 at 6:02 PM, Matthias Klose d...@ubuntu.com wrote: Am 12.02.2013 13:45, schrieb Richard Biener: On Tue, Feb 12, 2013 at 1:44 PM, Richard Biener richard.guent...@gmail.com wrote: On Tue, Feb 12, 2013 at 1:30 PM, Matthias Klose d...@ubuntu.com wrote: The libffi library, headers and documentation are still installed, although libffi provides separate releases for a long time. So do not install these anymore as part of a GCC install. Tested with a build and an install with go and java enabled (both using libffi_convenience). Ok for the trunk? openSUSE is using the GCC provided libffi, so no, this is not ok (not at this stage anyway). Also proper not-installing libffi would work by disabling the maybe-install-target-libffi at the toplevel, not changing libffi makfiles (which are supposed to be imported from upstream, no?) Thus, add no_install= true; to the libffi target module updated patch attached, checked with a make install that no ffi headers and libraries are installed. If not ok for 4.8, ok for 4.9 when it opens? I'm fine with that variant but I'd like to see another ok. No preference as to whether to target 4.8 or 4.9. Richard. Matthias
BUILD PATCH: Support source file with .cc extension
Hi Paolo, The patchlet below allows uses of source file with .cc extension. This comes out of work being done on the C++ front-end and has merit of its own. OK to apply? Thanks, -- Gaby 2013-03-26 Gabriel Dos Reis g...@integrable-solutions.net * Makefile.in (.SUFFIXES): Add .cc. (.c.o): Apply same recipe for implicit rule .cc.o. Index: Makefile.in === --- Makefile.in (revision 196984) +++ Makefile.in (working copy) @@ -48,7 +48,7 @@ # This must come before the language makefile fragments to allow them to # add suffixes and rules of their own. .SUFFIXES: -.SUFFIXES: .c .o .po .pox .gmo +.SUFFIXES: .c .cc .o .po .pox .gmo # --- # Standard autoconf-set variables @@ -1054,7 +1054,7 @@ $(CPPINC) $(GMPINC) $(DECNUMINC) $(BACKTRACEINC) \ $(CLOOGINC) $(ISLINC) -.c.o: +.cc.o .c.o: $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $ $(OUTPUT_OPTION) #
Re: [RFC PATCH] Implementing ifunc target hook
On 27/03/2013, at 4:14 AM, Alexander Ivchenko wrote: Hi, Since almost three months have passed I feel that I need to recheck the patch before commiting it. I fixed what Maxim mentioned and also I fixed: The patch is OK with 2 changes: 1. s/default_have_ifunc_p/default_has_ifunc_p/ The new target hook is called has_ifunc_p, so has in the name of its default implementation is more appropriate. diff --git a/gcc/configure b/gcc/configure old mode 100755 new mode 100644 index eac96cd..928693a --- a/gcc/configure +++ b/gcc/configure @@ -22055,11 +22055,14 @@ else enable_gnu_indirect_function=$default_gnu_indirect_function fi -if test x$enable_gnu_indirect_function = xyes; then -$as_echo #define HAVE_GNU_INDIRECT_FUNCTION 1 confdefs.h +gif=`if test $enable_gnu_indirect_function == yes; then echo 1; else echo 0; fi` 2. gif=`if test x$enable_gnu_indirect_function = xyes; then echo 1; else echo 0; fi` Note that canonical equality operator of 'test' is =, not ==. The 'x' before the variable is a good practice to handle empty definitions of shell variables (`if test = yes;` will produce an error). Oh, and in the changelog you have a typo linux-androids.h - linux-android.h. Otherwise OK. Thanks, -- Maxim Kuvyrkov KugelWorks
RE: [patch] cilkplus array notation for C (clean, independent patchset, take 1)
Hello Joseph, Aldy et al.,
Attached please find a patch that will fixed the problem below and
another problem you mentioned in a previous email (I had used
really_constant_p(..) and you mentioned that in C we need to check for
INTEGER_CST).
Please let me know if I have missed anything else that you mentioned.
Thanks,
Balaji V. Iyer.
-Original Message-
From: Joseph Myers [mailto:jos...@codesourcery.com]
Sent: Tuesday, March 26, 2013 1:05 PM
To: Aldy Hernandez
Cc: Iyer, Balaji V; gcc-patches@gcc.gnu.org
Subject: Re: [patch] cilkplus array notation for C (clean, independent
patchset,
take 1)
On Mon, 25 Mar 2013, Aldy Hernandez wrote:
I always tend to check for a null pointer before I access the fields
in the structure. In this case it is unnecessary. In some cases
(e.g. find_rank) there is a good chance a null pointer will be
passed into the function and we need to check that and reject those.
I think what Joseph is suggesting is that if NULL is not valid, then
the caller should check this. But if NULL is valid, then it should be
documented in the function comment at the top.
The caller should only check it if it's valid in the caller but not the
callee. If it's
invalid in the caller as well, neither should check (except maybe in an
assertion if
felt appropriate in a particular case).
FIXED!
--
Joseph S. Myers
jos...@codesourcery.com
diff --git a/gcc/c-family/array-notation-common.c
b/gcc/c-family/array-notation-common.c
index b775225..894c02a 100644
--- a/gcc/c-family/array-notation-common.c
+++ b/gcc/c-family/array-notation-common.c
@@ -152,7 +152,7 @@ extract_sec_implicit_index_arg (location_t location, tree
fn)
if (TREE_CODE (fn) == CALL_EXPR)
{
fn_arg = CALL_EXPR_ARG (fn, 0);
- if (really_constant_p (fn_arg))
+ if (TREE_CODE (fn_arg) == INTEGER_CST)
return_int = int_cst_value (fn_arg);
else
{
diff --git a/gcc/c/c-array-notation.c b/gcc/c/c-array-notation.c
index 9ee281e..dd0a1b0 100755
--- a/gcc/c/c-array-notation.c
+++ b/gcc/c/c-array-notation.c
@@ -52,9 +52,7 @@ struct inv_list
/* Set *RANK of expression ARRAY, ignoring array notation specific built-in
functions if IGNORE_BUILTIN_FN is true. The ORIG_EXPR is printed out if an
error occured in the rank calculation. The functions returns false if it
- encounters an error in rank calculation. If ARRAY can be NULL, since it is
- recursively accessing all the fields in a subtree. If so, then just return
- true.
+ encounters an error in rank calculation.
For example, an array notation of A[:][:] or B[0:10][0:5:2] or C[5][:][1:0]
all have a rank of 2. */
@@ -66,10 +64,8 @@ find_rank (location_t loc, tree orig_expr, tree array, bool
ignore_builtin_fn,
tree ii_tree;
size_t ii = 0, current_rank = 0;
an_reduce_type dummy_type = REDUCE_UNKNOWN;
-
- if (!array)
-return true;
- else if (TREE_CODE (array) == ARRAY_NOTATION_REF)
+
+ if (TREE_CODE (array) == ARRAY_NOTATION_REF)
{
for (ii_tree = array;
ii_tree TREE_CODE (ii_tree) == ARRAY_NOTATION_REF;
@@ -111,7 +107,8 @@ find_rank (location_t loc, tree orig_expr, tree array, bool
ignore_builtin_fn,
}
else
for (ii = 0; ii TREE_CODE_LENGTH (TREE_CODE (array)); ii++)
- if (!find_rank (loc, orig_expr, TREE_OPERAND (array, ii),
+ if (TREE_OPERAND (array, ii)
+ !find_rank (loc, orig_expr, TREE_OPERAND (array, ii),
ignore_builtin_fn, rank))
return false;
}
@@ -133,21 +130,22 @@ extract_array_notation_exprs (tree node, bool
ignore_builtin_fn,
size_t ii = 0;
an_reduce_type dummy_type = REDUCE_UNKNOWN;
- if (!node)
-return;
- else if (TREE_CODE (node) == ARRAY_NOTATION_REF)
+ if (TREE_CODE (node) == ARRAY_NOTATION_REF)
{
vec_safe_push (*array_list, node);
return;
}
else if (TREE_CODE (node) == TREE_LIST)
{
- extract_array_notation_exprs (TREE_PURPOSE (node), ignore_builtin_fn,
- array_list);
- extract_array_notation_exprs (TREE_VALUE (node), ignore_builtin_fn,
- array_list);
- extract_array_notation_exprs (TREE_CHAIN (node), ignore_builtin_fn,
- array_list);
+ if (TREE_PURPOSE (node))
+ extract_array_notation_exprs (TREE_PURPOSE (node), ignore_builtin_fn,
+ array_list);
+ if (TREE_VALUE (node))
+ extract_array_notation_exprs (TREE_VALUE (node), ignore_builtin_fn,
+ array_list);
+ if (TREE_CHAIN (node))
+ extract_array_notation_exprs (TREE_CHAIN (node), ignore_builtin_fn,
+ array_list);
}
else if (TREE_CODE (node) == STATEMENT_LIST)
{
@@ -181,8 +179,9 @@ extract_array_notation_exprs (tree node, bool
ignore_builtin_fn,
Re: [patch, fortran] Use memcmp() for string comparison for constant-length kind=1 strings
On Mon, Mar 25, 2013 at 7:00 PM, Thomas Koenig tkoe...@netcologne.de wrote: Hello world, this patch uses memcpy() directly when comparing two kind=1 strings of equal and constant lengths. The test case modification depends on the previous patch at http://gcc.gnu.org/ml/gcc-patches/2013-03/msg00996.html for setting the string lengths for substrings. Regression-tested. No extra test case because the original test cases have to be modified to avoid failure, and test the new feature. OK for trunk after committing the patch above? 2013-03-25 Thomas Koenig tkoe...@gcc.gnu.org * trans-expr.c (build_memcmp_call): New function. (gfc_build_compare_string): If the kind=1 strings to be compared have constant and equal lengths, use memcmp(). 2013-03-25 Thomas Koenig tkoe...@gcc.gnu.org * gfortran.dg/character_comparison_3.f90: Adjust for use of memcmp for constant and equal string lengths. * gfortran.dg/character_comparison_5.f90: Likewise. Ok. I think the same optimization could be done for kind=4 strings as well, but nobody probably uses those anyway.. -- Janne Blomqvist
[SPARC] Remove -mlittle-endian from SPARC options
The ChangeLog says it has been removed in 2011, but it actually hasn't.
Applied on the mainline, 4.8 and 4.7 branches.
2013-03-26 Eric Botcazou ebotca...@adacore.com
* doc/invoke.texi (SPARC options): Remove -mlittle-endian.
--
Eric BotcazouIndex: doc/invoke.texi
===
--- doc/invoke.texi (revision 196816)
+++ doc/invoke.texi (working copy)
@@ -922,7 +922,6 @@ See RS/6000 and PowerPC Options.
-mfaster-structs -mno-faster-structs -mflat -mno-flat @gol
-mfpu -mno-fpu -mhard-float -msoft-float @gol
-mhard-quad-float -msoft-quad-float @gol
--mlittle-endian @gol
-mstack-bias -mno-stack-bias @gol
-munaligned-doubles -mno-unaligned-doubles @gol
-mv8plus -mno-v8plus -mvis -mno-vis @gol
@@ -19291,11 +19290,6 @@ These @samp{-m} options are supported in
on SPARC-V9 processors in 64-bit environments:
@table @gcctabopt
-@item -mlittle-endian
-@opindex mlittle-endian
-Generate code for a processor running in little-endian mode. It is only
-available for a few configurations and most notably not on Solaris and Linux.
-
@item -m32
@itemx -m64
@opindex m32
Re: [PING^5] PR 54805: __gthread_tsd* in vxlib-tls.c
On 25/03/2013, at 10:15 PM, Richard Biener wrote: On Thu, Mar 21, 2013 at 12:22 AM, Maxim Kuvyrkov ma...@kugelworks.com wrote: ... Richard, As release manager, do you have any objections to backporting this patch to 4.8 branch? It affects only VxWorks targets and it is quite harmless (the patch fixes a compilation warning during building GCC for VxWorks targets). It's certainly fine now. Checked in to gcc-4_8-branch. -- Maxim Kuvyrkov KugelWorks
Re: [Patch, fortran] Module loading improvements part 1/3
On Tue, Mar 26, 2013 at 5:08 PM, Mikael Morin mikael.mo...@sfr.fr wrote:
Le 24/03/2013 22:58, Janne Blomqvist a écrit :
The attached patch takes the crude approach of first sequentially
reading the .mod file into a temporary buffer, then does the actual
parsing from that buffer.
I don't like it much, but knowing how bad module files are currently
handled, it's probably the way to go.
I don't like it either, I'd have preferred that my previous efforts to
parse module files sequentially without the tmp buffer would have been
successful. But alas, this is better than what we have now, IMHO.
- Caching module files, a crude implementation of the old module
namespaces idea. E.g. put the uncompressed module contents into a map
keyed by module name. (part 3/3).
But I'm not too fond of that one. Bah, let's see if it improves things.
As of today, I don't think this is useful. But on top of the zlib
patch it would reduce the decompression overhead when the same module
is used repeatedly in the same translation unit. Whether the zlib
overhead is significant enough to be worth bothering about I don't
know; I'm happy to take a wait-and-see approach wrt this.
@@ -1004,7 +1008,7 @@ static void bad_module (const char *)
ATTRIBUTE_NORETURN;
static void
bad_module (const char *msgid)
{
- fclose (module_fp);
+ XDELETEVEC (module_content);
I know this is followed by fatal errors only, but I would feel much
better with an additional 'module_content = NULL;'
OK with that change.
Done. Joost also reported that my original patch didn't pass bootstrap
(I cheated and used --disable-bootstrap). Slightly fixed patch
attached, and committed as r197124.
--
Janne Blomqvist
tmpbuf.diff
Description: Binary data
Re: [Patch, fortran] Module loading improvements part 1/3
On Tue, Mar 26, 2013 at 7:23 PM, Thomas Koenig tkoe...@netcologne.de wrote: Am 26.03.2013 16:24, schrieb Tobias Burnus: I wonder whether one should also do what Joost has proposed:* Changing allocatable to al etc. That reduces both the .mod file size (and thus I/O and improves caching) and the memory consumption of the compiler with the proposed caching scheme. As context-aware compression, it could even have a better ratio than ZIP. (ZIP can still be used on top of it.) I have been thinking a little bit about a complete redesign of the module files. Yes, the more I dig into module.c the more I agree with that sentiment.. :-/ Ideally, I would like it to be an extensible binary format, which uses a keyword-value combination and which could be accompanied by a dumper which makes it human-readable. A simple yacc grammar could handle both the reading and making the dumper. If this is designed right, it might not even be necessary to bump the module number for old library files. I'd suggest not inventing our own wheel but rather using an existing one such as Google's protocol buffers. https://developers.google.com/protocol-buffers/docs/overview -- Janne Blomqvist
Re: Do not disable -fomit-frame-pointer on !ACCUMULATE_OUTGOING_ARGS targets
Heh. We've actually fixed this now -- unwind info generation aware of the cfg is exactly what pass_dwarf2_frame does. So I guess this comment has been out of date since gcc 4.7. I see, thanks. So what do you suggest doing at this point? Entirely remove the block of code? But AFAICS pass_dwarf2_frame isn't always enabled. Apply the patch anyway with the appropriate additional conditions? -- Eric Botcazou
[Patch, Fortran] PR56650/36437 - Add compile-time simplification for (c_)sizeof, storage_size
As the MERGE issue, the lack of compile-time simplification is another
issue affecting the MPICH.
Build and regtested on x86-64-gnu-linux.
OK for the trunk?
Tobias
PS: Early ping for my OPTIONAL+VALUE patch:
http://gcc.gnu.org/ml/fortran/2013-03/msg00102.html
2013-03-26 Tobias Burnus bur...@net-b.de
PR fortran/56650
PR fortran/36437
* check.c (gfc_check_sizeof, gfc_check_c_sizeof,
gfc_check_storage_size): Update checks.
* intrinsic.texi (SIZEOF): Correct class.
* intrinsic.h (gfc_simplify_sizeof,
gfc_simplify_storage_size): New prototypes.
* intrinsic.c (add_functions): Use them.
* simplify.c (gfc_simplify_sizeof,
gfc_simplify_storage_size): New functions.
2013-03-26 Tobias Burnus bur...@net-b.de
PR fortran/56650
PR fortran/36437
* gfortran.dg/sizeof_2.f90: New.
* gfortran.dg/sizeof_3.f90: New.
* gfortran.dg/sizeof_proc.f90: Update dg-error.
diff --git a/gcc/fortran/check.c b/gcc/fortran/check.c
index 0460bf2..99174bc 100644
--- a/gcc/fortran/check.c
+++ b/gcc/fortran/check.c
@@ -3617,11 +3617,31 @@ gfc_check_sizeof (gfc_expr *arg)
{
if (arg-ts.type == BT_PROCEDURE)
{
- gfc_error ('%s' argument of '%s' intrinsic at %L may not be a procedure,
+ gfc_error ('%s' argument of '%s' intrinsic at %L shall not be a procedure,
gfc_current_intrinsic_arg[0]-name, gfc_current_intrinsic,
arg-where);
return FAILURE;
}
+
+ if (arg-ts.type == BT_ASSUMED)
+{
+ gfc_error ('%s' argument of '%s' intrinsic at %L shall not be TYPE(*),
+ gfc_current_intrinsic_arg[0]-name, gfc_current_intrinsic,
+ arg-where);
+ return FAILURE;
+}
+
+ if (arg-rank arg-expr_type == EXPR_VARIABLE
+ arg-symtree-n.sym-as != NULL
+ arg-symtree-n.sym-as-type == AS_ASSUMED_SIZE arg-ref
+ arg-ref-type == REF_ARRAY arg-ref-u.ar.type == AR_FULL)
+{
+ gfc_error ('%s' argument of '%s' intrinsic at %L shall not be an
+ assumed-size array, gfc_current_intrinsic_arg[0]-name,
+ gfc_current_intrinsic, arg-where);
+ return FAILURE;
+}
+
return SUCCESS;
}
@@ -3739,6 +3759,15 @@ gfc_check_c_sizeof (gfc_expr *arg)
return FAILURE;
}
+ if (arg-ts.type == BT_ASSUMED)
+{
+ gfc_error ('%s' argument of '%s' intrinsic at %L shall not be
+ TYPE(*),
+ gfc_current_intrinsic_arg[0]-name, gfc_current_intrinsic,
+ arg-where);
+ return FAILURE;
+}
+
if (arg-rank arg-expr_type == EXPR_VARIABLE
arg-symtree-n.sym-as != NULL
arg-symtree-n.sym-as-type == AS_ASSUMED_SIZE arg-ref
@@ -5593,8 +5622,24 @@ gfc_check_and (gfc_expr *i, gfc_expr *j)
gfc_try
-gfc_check_storage_size (gfc_expr *a ATTRIBUTE_UNUSED, gfc_expr *kind)
+gfc_check_storage_size (gfc_expr *a, gfc_expr *kind)
{
+ if (a-ts.type == BT_ASSUMED)
+{
+ gfc_error ('%s' argument of '%s' intrinsic at %L shall not be TYPE(*),
+ gfc_current_intrinsic_arg[0]-name, gfc_current_intrinsic,
+ a-where);
+ return FAILURE;
+}
+
+ if (a-ts.type == BT_PROCEDURE)
+{
+ gfc_error ('%s' argument of '%s' intrinsic at %L shall not be a
+ procedure, gfc_current_intrinsic_arg[0]-name,
+ gfc_current_intrinsic, a-where);
+ return FAILURE;
+}
+
if (kind == NULL)
return SUCCESS;
diff --git a/gcc/fortran/intrinsic.c b/gcc/fortran/intrinsic.c
index 358c33e..2a51d10 100644
--- a/gcc/fortran/intrinsic.c
+++ b/gcc/fortran/intrinsic.c
@@ -2698,7 +2698,7 @@ add_functions (void)
make_from_module();
add_sym_1 (sizeof, GFC_ISYM_SIZEOF, CLASS_IMPURE, ACTUAL_NO, BT_INTEGER, ii,
- GFC_STD_GNU, gfc_check_sizeof, NULL, NULL,
+ GFC_STD_GNU, gfc_check_sizeof, gfc_simplify_sizeof, NULL,
x, BT_UNKNOWN, 0, REQUIRED);
make_generic (sizeof, GFC_ISYM_SIZEOF, GFC_STD_GNU);
@@ -2724,7 +2724,7 @@ add_functions (void)
add_sym_1 (c_sizeof, GFC_ISYM_C_SIZEOF, CLASS_INQUIRY, ACTUAL_NO,
BT_INTEGER, gfc_index_integer_kind, GFC_STD_F2008,
- gfc_check_c_sizeof, NULL, NULL,
+ gfc_check_c_sizeof, gfc_simplify_sizeof, NULL,
x, BT_UNKNOWN, 0, REQUIRED);
make_from_module();
@@ -2782,7 +2782,8 @@ add_functions (void)
add_sym_2 (storage_size, GFC_ISYM_STORAGE_SIZE, CLASS_INQUIRY, ACTUAL_NO,
BT_INTEGER, di, GFC_STD_F2008,
- gfc_check_storage_size, NULL, gfc_resolve_storage_size,
+ gfc_check_storage_size, gfc_simplify_storage_size,
+ gfc_resolve_storage_size,
a, BT_UNKNOWN, 0, REQUIRED,
kind, BT_INTEGER, di, OPTIONAL);
diff --git a/gcc/fortran/intrinsic.h b/gcc/fortran/intrinsic.h
index 0f9b50c..347d71d 100644
--- a/gcc/fortran/intrinsic.h
+++ b/gcc/fortran/intrinsic.h
@@ -376,6 +376,8 @@ gfc_expr *gfc_simplify_shiftr (gfc_expr *, gfc_expr *);
gfc_expr *gfc_simplify_sin (gfc_expr *);
gfc_expr *gfc_simplify_sinh (gfc_expr *);
gfc_expr *gfc_simplify_size (gfc_expr *, gfc_expr *, gfc_expr *);
+gfc_expr *gfc_simplify_sizeof (gfc_expr *);
+gfc_expr *gfc_simplify_storage_size (gfc_expr *, gfc_expr *);
gfc_expr *gfc_simplify_sngl
Re: [patch] Unified debug dump function names.
On 3/26/13, Lawrence Crowl cr...@googlers.com wrote: On 3/26/13, Richard Biener richard.guent...@gmail.com wrote: On Mar 25, 2013 Lawrence Crowl cr...@googlers.com wrote: On 3/25/13, Richard Biener richard.guent...@gmail.com wrote: You add a not used new interface. What for? So that people can use it. For use from gdb only? No, for use from both gdb and internally. It is often that folks add dumps in various places while developing/debugging. These functions support that effort without having to hunt down the name. But having both interfaces is bad. As you are unconditionally dumping to stderr using debug () is correct. Sorry that I don't follow each and every proposal - nobody follows up my proposals either. The dump_ namespace is claimed by dumping to dumpfiles and diagnostics. In which case it should be debug (), not dump (). I will use whatever name you wish, but I would have preferred that we addressed naming issues when we published the plan, not after I've done the implementation. What name do you wish? debug (). Okay. And I'd like you to remove the alternate debug_ interface that is obsoleted by the overloads. I'm sure that folks have the old interfaces baked into scripts and dot files. I think it would should not remove the old interface until they have had some time to migrate. Btw, the overloading will provide extra headache to one of the most used ways to the debug_ routines: (gdb) call debug_tree (fndecl) function_decl 0x76e1b900 foo type function_type 0x76d28c78 type integer_type 0x76d175e8 int public SI size integer_cst 0x76d1a0c0 constant 32 unit size integer_cst 0x76d1a0e0 constant 4 align 32 symtab 0 alias set -1 canonical type 0x76d175e8 precision 32 min integer_cst 0x76d1a060 -2147483648 max integer_cst 0x76d1a080 2147483647 ... (gdb) call debug_tree (0x76d175e8) Cannot resolve function debug_tree to any overloaded instance (gdb) call debug_treetabtab debug_tree(tree_node*) debug_tree_chain(tree_node*) debug_tree_chain(tree_node*)::__FUNCTION__ debug_tree_ssa() debug_tree_ssa_stats() aha! (ok, I know this one is 'tree') (gdb) call debug_tree ((tree_node*)0x76d175e8) integer_type 0x76d175e8 int public SI size integer_cst 0x76d1a0c0 type integer_type 0x76d170a8 bitsizetype constant 32 unit size integer_cst 0x76d1a0e0 type integer_type 0x76d17000 sizetype constant 4 align 32 symtab 0 alias set -1 canonical type 0x76d175e8 precision 32 min integer_cst 0x76d1a060 -2147483648 max integer_cst 0x76d1a080 2147483647 pointer_to_this pointer_type 0x76d1f2a0 but with debug () having overloads to each and every thing we'd ever want to debug the list of possible types I have to cast that literal address I cutpasted will be endless. Any suggestion on how to improve this situation? Yes, it's already bad as with typing debug_tree I know it's a tree I am interested in and (gdb) call debug_tabtab ... endless list of functions and overloads ... is probably as useless as (gdb) call debugtabtab is after your patch. I have three suggestions, in increasing order of difficulty. First, modify the dumpers to print the type cast in front of the hex value. The cut and paste is just a bit wider. Second, modify the dumpers to print the access expression (which would then not require the hex value). I'm not actually sure how well this would work in practice. It's a thought. Third, modify gdb to have an interactive data explorer. As a straw man, explorer foo would open up a window with all of foo's elements. Each pointer is clickable and changes your view to its referrent. I've used such a tool, and while it was sometimes at too low a level of abstraction, it was generally quite handy for exploring the data. In retrospect, it would be nice to fold sub-objects (in the editor sense). Patch with rename to debug attached. Tested on x86_64. Add uniform debug dump function names. Add some overloaded functions that provide uniform debug dump function names. These names are: debug: the general debug dumper debug_verbose: for more details debug_raw: for the gory details debug_head: for the heads of declarations, e.g. function heads debug_body: for the bodies of declarations, e.g. function bodies Not all types have the last four versions. The debug functions come in two flavors, those that take pointers to the type, and those that take references to the type. The first handles printing of 'nil' for null pointers. The second assumes a valid reference, and prints the content. Example uses are as follows: cp_token t, *p; debug (t); debug (p); From the debugger, use call debug (t) The functions sets implemented are: debug (only) basic_block_def, const bitmap_head_def, cp_binding_level, cp_parser, cp_token, data_reference,
Re: RFA: RL78: Improve prologues for interrupt handlers
The problem is, devirt hasn't happened yet when we compute the frame size, so we *can't* know if bank 0 registers are used yet. Also, I've had problems recomputing the frame size after reload. If the frame size changes for *any* reason between reload and prologue, you get corrupt code, as the elimination offset from AP to SP changes. That's why I avoid recomputing it.
C++ PATCH: use INDIRECT_REF_P more often
Applying to trunk as obvious.
Tested on an x86_64-suse-linux.
-- Gaby
2013-03-26 Gabriel Dos Reis g...@integrable-solutions.net
* call.c (build_new_method_call_1): Use INDIRECT_REF_P.
* cvt.c (convert_to_void): Likewise.
* error.c (dump_expr): Likewise.
* mangle.c (write_expression): Likewise.
* parser.c (cp_parser_template_argument): Likewise.
* pt.c (convert_nontype_argument): Likewise.
(tsubst_copy_and_build): Likewise.
* rtti.c (build_typeid): Likewise.
* semantics.c (finish_call_expr): Likewise.
(finish_decltype_type): Likewise.
(build_data_member_initialization): Likewise.
* tree.c (is_dummy_object): Likewise.
* typeck.c (decay_conversion): Likewise.
(build_class_member_access_expr): Likewise.
(cp_build_addr_expr_1): Likewise.
(unary_complex_lvalue): Likewise.
(check_return_expr): Likewise.
* typeck2.c (cxx_readonly_error): Likewise.
Index: call.c
===
--- call.c (revision 197125)
+++ call.c (working copy)
@@ -7730,7 +7730,7 @@
cast_to_void = true;
call = TREE_OPERAND (call, 0);
}
- if (TREE_CODE (call) == INDIRECT_REF)
+ if (INDIRECT_REF_P (call))
call = TREE_OPERAND (call, 0);
call = (build_min_non_dep_call_vec
(call,
Index: cvt.c
===
--- cvt.c (revision 197125)
+++ cvt.c (working copy)
@@ -916,7 +916,7 @@
exprv = TREE_OPERAND (exprv, 1);
if (DECL_P (exprv)
|| handled_component_p (exprv)
- || TREE_CODE (exprv) == INDIRECT_REF)
+ || INDIRECT_REF_P (exprv))
/* Expr is not being 'used' here, otherwise we whould have
called mark_{rl}value_use use here, which would have in turn
called mark_exp_read. Rather, we call mark_exp_read directly
Index: error.c
===
--- error.c (revision 197125)
+++ error.c (working copy)
@@ -1988,7 +1988,7 @@
case COMPONENT_REF:
{
tree ob = TREE_OPERAND (t, 0);
- if (TREE_CODE (ob) == INDIRECT_REF)
+ if (INDIRECT_REF_P (ob))
{
ob = TREE_OPERAND (ob, 0);
if (TREE_CODE (ob) != PARM_DECL
@@ -2243,7 +2243,7 @@
}
else
{
- if (TREE_CODE (ob) == INDIRECT_REF)
+ if (INDIRECT_REF_P (ob))
{
dump_expr (TREE_OPERAND (ob, 0), flags | TFF_EXPR_IN_PARENS);
pp_cxx_arrow (cxx_pp);
Index: mangle.c
===
--- mangle.c(revision 197125)
+++ mangle.c(working copy)
@@ -2691,7 +2691,7 @@
write_member_name (member);
}
}
- else if (TREE_CODE (expr) == INDIRECT_REF
+ else if (INDIRECT_REF_P (expr)
TREE_TYPE (TREE_OPERAND (expr, 0))
TREE_CODE (TREE_TYPE (TREE_OPERAND (expr, 0))) == REFERENCE_TYPE)
{
Index: parser.c
===
--- parser.c(revision 197125)
+++ parser.c(working copy)
@@ -13274,7 +13274,7 @@
{
tree probe;
- if (TREE_CODE (argument) == INDIRECT_REF)
+ if (INDIRECT_REF_P (argument))
{
gcc_assert (REFERENCE_REF_P (argument));
argument = TREE_OPERAND (argument, 0);
Index: pt.c
===
--- pt.c(revision 197125)
+++ pt.c(working copy)
@@ -5735,7 +5735,7 @@
shall be one of: [...]
-- the address of an object or function with external linkage. */
- if (TREE_CODE (expr) == INDIRECT_REF
+ if (INDIRECT_REF_P (expr)
TYPE_REF_OBJ_P (TREE_TYPE (TREE_OPERAND (expr, 0
{
expr = TREE_OPERAND (expr, 0);
@@ -14013,7 +14013,7 @@
if (unq != function)
{
tree fn = unq;
- if (TREE_CODE (fn) == INDIRECT_REF)
+ if (INDIRECT_REF_P (fn))
fn = TREE_OPERAND (fn, 0);
if (TREE_CODE (fn) == COMPONENT_REF)
fn = TREE_OPERAND (fn, 1);
Index: rtti.c
===
--- rtti.c (revision 197125)
+++ rtti.c (working copy)
@@ -326,7 +326,7 @@
/* FIXME when integrating with c_fully_fold, mark
resolves_to_fixed_type_p case as a non-constant expression. */
- if (TREE_CODE (exp) == INDIRECT_REF
+ if (INDIRECT_REF_P (exp)
TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == POINTER_TYPE
TYPE_POLYMORPHIC_P (TREE_TYPE (exp))
! resolves_to_fixed_type_p (exp, nonnull)
Index: semantics.c
C++ PATCH for c++/52597 (misleading diagnostic for wrong use of member function)
When we see a use of a non-overloaded non-static member function, we
give the resulting expression unknown type so that invalid uses get
errors. But the can't resolve overloading error is wrong in this
case, so we should give the right one.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit fa430ccf08f60e0affd935854fd8b49f547d21a4
Author: Jason Merrill ja...@redhat.com
Date: Tue Mar 26 14:26:29 2013 -0400
PR c++/52597
* typeck.c (invalid_nonstatic_memfn_p): Use get_first_fn. Take tree.
* semantics.c (finish_decltype_type): Check it before type_unknown_p.
* cp-tree.h: Adjust prototype.
diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 4018685..36671d5 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -5988,7 +5988,7 @@ extern tree build_typed_address (tree, tree);
extern tree build_nop(tree, tree);
extern tree non_reference (tree);
extern tree lookup_anon_field (tree, tree);
-extern bool invalid_nonstatic_memfn_p (const_tree, tsubst_flags_t);
+extern bool invalid_nonstatic_memfn_p (tree, tsubst_flags_t);
extern tree convert_member_func_to_ptr (tree, tree, tsubst_flags_t);
extern tree convert_ptrmem (tree, tree, bool, bool,
tsubst_flags_t);
diff --git a/gcc/cp/semantics.c b/gcc/cp/semantics.c
index 127e2da..8cf7886 100644
--- a/gcc/cp/semantics.c
+++ b/gcc/cp/semantics.c
@@ -5276,16 +5276,16 @@ finish_decltype_type (tree expr, bool id_expression_or_member_access_p,
expr = resolve_nondeduced_context (expr);
- if (type_unknown_p (expr))
-{
- if (complain tf_error)
- error (decltype cannot resolve address of overloaded function);
- return error_mark_node;
-}
-
if (invalid_nonstatic_memfn_p (expr, complain))
return error_mark_node;
+ if (type_unknown_p (expr))
+{
+ if (complain tf_error)
+ error (decltype cannot resolve address of overloaded function);
+ return error_mark_node;
+}
+
/* To get the size of a static data member declared as an array of
unknown bound, we need to instantiate it. */
if (TREE_CODE (expr) == VAR_DECL
diff --git a/gcc/cp/typeck.c b/gcc/cp/typeck.c
index 4e42a9d..8778b2c 100644
--- a/gcc/cp/typeck.c
+++ b/gcc/cp/typeck.c
@@ -1766,9 +1766,16 @@ cxx_alignas_expr (tree e)
violates these rules. */
bool
-invalid_nonstatic_memfn_p (const_tree expr, tsubst_flags_t complain)
+invalid_nonstatic_memfn_p (tree expr, tsubst_flags_t complain)
{
- if (expr DECL_NONSTATIC_MEMBER_FUNCTION_P (expr))
+ if (expr == NULL_TREE)
+return false;
+ /* Don't enforce this in MS mode. */
+ if (flag_ms_extensions)
+return false;
+ if (is_overloaded_fn (expr) !really_overloaded_fn (expr))
+expr = get_first_fn (expr);
+ if (DECL_NONSTATIC_MEMBER_FUNCTION_P (expr))
{
if (complain tf_error)
error (invalid use of non-static member function);
diff --git a/gcc/testsuite/g++.dg/cpp0x/decltype50.C b/gcc/testsuite/g++.dg/cpp0x/decltype50.C
new file mode 100644
index 000..dc3332a
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/decltype50.C
@@ -0,0 +1,18 @@
+// PR c++/52597
+// { dg-require-effective-target c++11 }
+
+struct A {
+ int zip();
+
+ decltype(zip) bar0; // { dg-error invalid use of non-static member function }
+ void bar1() {
+ typedef decltype(this-A::zip) x; // { dg-error invalid use of non-static member function }
+ }
+ void bar2() {
+ typedef decltype(A::zip) x; // { dg-error invalid use of non-static member function }
+ }
+};
+
+typedef decltype(A().zip) x; // { dg-error invalid use of non-static member function }
+
+// { dg-prune-output invalid type in declaration }
diff --git a/gcc/testsuite/g++.dg/template/overload6.C b/gcc/testsuite/g++.dg/template/overload6.C
index 5e26c44..8d574e7 100644
--- a/gcc/testsuite/g++.dg/template/overload6.C
+++ b/gcc/testsuite/g++.dg/template/overload6.C
@@ -4,7 +4,7 @@
// PR 21592:ICE
// Origin: Volker Reichelt reich...@gcc.gnu.org
-templatetypename T void unique(T,T); // { dg-message note }
+templatetypename T void unique(T,T);
struct A
{
@@ -13,6 +13,5 @@ struct A
templateint void foo()
{
- unique(A().begin); // { dg-error no matching function }
- // { dg-message candidate candidate note { target *-*-* } 16 }
+ unique(A().begin); // { dg-error invalid use of non-static member function }
}
diff --git a/gcc/testsuite/g++.dg/template/ptrmem4.C b/gcc/testsuite/g++.dg/template/ptrmem4.C
index 14f36d4..0765032 100644
--- a/gcc/testsuite/g++.dg/template/ptrmem4.C
+++ b/gcc/testsuite/g++.dg/template/ptrmem4.C
@@ -6,7 +6,7 @@
// Pointer to member function template argument deduction ICE.
-template class CONT void queryAliases(CONT fill_me); // { dg-message queryAliases|no known conversion }
+template class CONT void queryAliases(CONT fill_me);
struct SpyExample
{
@@ -16,5 +16,5 @@ struct SpyExample
void SpyExample::ready()
{
- queryAliases(inputs); // { dg-error matching|unresolved }
+ queryAliases(inputs); // { dg-error invalid }
}
diff
C++ PATCH for c++/45282 (wrong decltype of .*)
A while back I fixed build_m_component_ref so that a .* with an xvalue
lhs would be an xvalue, but we need to handle class prvalues correctly too.
Tested x86_64-pc-linux-gnu, applying to trunk and 4.8.
commit 7ef69238ed9acd48a12a0bd31307100b41db9f0e
Author: Jason Merrill ja...@redhat.com
Date: Tue Mar 26 14:07:56 2013 -0400
PR c++/45282
* typeck2.c (build_m_component_ref): Handle prvalue object.
diff --git a/gcc/cp/typeck2.c b/gcc/cp/typeck2.c
index ca31610..72dccb4 100644
--- a/gcc/cp/typeck2.c
+++ b/gcc/cp/typeck2.c
@@ -1671,7 +1671,7 @@ build_m_component_ref (tree datum, tree component, tsubst_flags_t complain)
if (TYPE_PTRDATAMEM_P (ptrmem_type))
{
- bool is_lval = real_lvalue_p (datum);
+ cp_lvalue_kind kind = lvalue_kind (datum);
tree ptype;
/* Compute the type of the field, as described in [expr.ref].
@@ -1701,7 +1701,9 @@ build_m_component_ref (tree datum, tree component, tsubst_flags_t complain)
return error_mark_node;
/* If the object expression was an rvalue, return an rvalue. */
- if (!is_lval)
+ if (kind clk_class)
+ datum = rvalue (datum);
+ else if (kind clk_rvalueref)
datum = move (datum);
return datum;
}
diff --git a/gcc/testsuite/g++.dg/cpp0x/decltype49.C b/gcc/testsuite/g++.dg/cpp0x/decltype49.C
new file mode 100644
index 000..c317498
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/decltype49.C
@@ -0,0 +1,10 @@
+// PR c++/45282
+// { dg-require-effective-target c++11 }
+
+struct A { int i; };
+int A::*ipm = A::i;
+
+template class T, class U class assert_same_type;
+template class T class assert_same_typeT,T { };
+
+assert_same_typedecltype(A().*ipm),int x2;
