Re: [ada, build] host/target configuration
Hi! On Thu, 30 May 2013 09:21:12 +0200, Eric Botcazou ebotca...@adacore.com wrote: However, it seems that the first androideabi snippet was dead code. Can you delete it in a follow-up? No, it's not dead code, just broken at the moment, now fixed by: 2013-05-30 Eric Botcazou ebotca...@adacore.com * gcc-interface/Makefile.in (arm% androideabi): Robustify. -ifeq ($(strip $(filter-out arm% linux-androideabi,$(arch) $(osys)-$(word 4,$(targ,) +ifeq ($(strip $(filter-out arm% androideabi,$(arch) $(osys))),) I don't understand this change. This used to match configurations arm*-[vendor]-linux-androideabi; now it only matches arm*-[vendor]-androideabi, which isn't in use (for a Android system is always based on the Linux kernel, in my understanding). Grüße, Thomas pgpfVlaDNVayC.pgp Description: PGP signature
[PATCH] rs6000: Group processor types
Long lines like this define_attr are hard to read, and patches to
them are hard to read and apply.
Bootstrapped and tested on powerpc64-linux --enable-languages=c,c++,fortran
--disable-libsanitizer, -m64,-m32,-m32/-mpowerpc64, no regressions. Okay
to apply?
2013-05-31 Segher Boessenkool seg...@kernel.crashing.org
gcc/
* config/rs6000/rs6000-opts.h (enum processor_type): Reorder.
* config/rs6000/rs6000.md: (cpu): Reorder. Split long line.
Fix comment.
---
gcc/config/rs6000/rs6000-opts.h | 21 +
gcc/config/rs6000/rs6000.md | 10 +++---
2 files changed, 20 insertions(+), 11 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index e143a4c..901cfbe 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -30,12 +30,6 @@
/* Processor type. Order must match cpu attribute in MD file. */
enum processor_type
{
- PROCESSOR_RS64A,
- PROCESSOR_MPCCORE,
- PROCESSOR_PPC403,
- PROCESSOR_PPC405,
- PROCESSOR_PPC440,
- PROCESSOR_PPC476,
PROCESSOR_PPC601,
PROCESSOR_PPC603,
PROCESSOR_PPC604,
@@ -45,6 +39,12 @@ enum processor_type
PROCESSOR_PPC750,
PROCESSOR_PPC7400,
PROCESSOR_PPC7450,
+
+ PROCESSOR_PPC403,
+ PROCESSOR_PPC405,
+ PROCESSOR_PPC440,
+ PROCESSOR_PPC476,
+
PROCESSOR_PPC8540,
PROCESSOR_PPC8548,
PROCESSOR_PPCE300C2,
@@ -53,16 +53,21 @@ enum processor_type
PROCESSOR_PPCE500MC64,
PROCESSOR_PPCE5500,
PROCESSOR_PPCE6500,
+
PROCESSOR_POWER4,
PROCESSOR_POWER5,
PROCESSOR_POWER6,
PROCESSOR_POWER7,
+ PROCESSOR_POWER8,
+
+ PROCESSOR_RS64A,
+ PROCESSOR_MPCCORE,
PROCESSOR_CELL,
PROCESSOR_PPCA2,
- PROCESSOR_TITAN,
- PROCESSOR_POWER8
+ PROCESSOR_TITAN
};
+
/* FP processor type. */
enum fpu_type_t
{
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 013a0e3..7569d3e 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -166,9 +166,13 @@ (define_attr length
(const_int 4)))
;; Processor type -- this attribute must exactly match the processor_type
-;; enumeration in rs6000.h.
-
-(define_attr cpu
rs64a,mpccore,ppc403,ppc405,ppc440,ppc476,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,power4,power5,power6,power7,cell,ppca2,titan,power8
+;; enumeration in rs6000-opts.h.
+(define_attr cpu
+ ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,
+ ppc403,ppc405,ppc440,ppc476,
+ ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500,
+ power4,power5,power6,power7,power8,
+ rs64a,mpccore,cell,ppca2,titan
(const (symbol_ref rs6000_cpu_attr)))
--
1.8.1.4
Re: [ada, build] host/target configuration
I don't understand this change. This used to match configurations arm*-[vendor]-linux-androideabi; now it only matches arm*-[vendor]-androideabi, which isn't in use (for a Android system is always based on the Linux kernel, in my understanding). This is meant to match arm-linux-androideabi, which didn't match anymore after the initial problematic targ change but needs to. -- Eric Botcazou
Re: [Patch, Fortran] Better error messages for type/rank checks
Hi Tobias,
In addition to this, the patch contains a part which concerns the
function 'gfc_terminal_width': Currently this returns a fixed value of
80, which means that all source lines are trimmed to 80 characters in
the error messages. I increased this default value to 132 (in order to
accommodate standard free-format lines), and added a part which tries
to determine the terminal width from the environment variable $COLUMNS
(the corresponding code was borrowed from gcc/opts.c).
I think it is a good idea to use $COLUMNS (which is, e.g. set by the shell
under Unix); however, if the variable is not available, I think one should
keep the value 80.
2013-05-30 Janus Weilja...@gcc.gnu.org
PR fortran/57217
* gfortran. h (gfc_terminal_width): Remove prototype.
Spurious space before h.
-/* Given two symbols that are formal arguments, compare their ranks
- and types. Returns nonzero if they have the same rank and type,
- zero otherwise. */
+static int
+compare_type (gfc_symbol *s1, gfc_symbol *s2)
+{
+ if (s1-attr.ext_attr (1 EXT_ATTR_NO_ARG_CHECK)
+ || s2-attr.ext_attr (1 EXT_ATTR_NO_ARG_CHECK))
+return 1;
+ return gfc_compare_types (s1-ts, s2-ts)
+|| s1-ts.type == BT_ASSUMED || s2-ts.type == BT_ASSUMED;
+}
I admit it is a slightly different issue, but it came up in the same thread:
I believe it should be:
+ if (s2-attr.ext_attr (1 EXT_ATTR_NO_ARG_CHECK))
+return 1;
...
+ return s2-ts.type == BT_ASSUMED || gfc_compare_types (s1-ts, s2-ts);
That should fix the issue with the two of the three test cases at
http://gcc.gnu.org/ml/fortran/2013-05/msg00089.html
-compare_type_rank (gfc_symbol *s1, gfc_symbol *s2)
+compare_rank (gfc_symbol *s1, gfc_symbol *s2)
{
gfc_array_spec *as1, *as2;
int r1, r2;
@@ -533,11 +541,21 @@ static int
(!as2 || as2-type != AS_ASSUMED_RANK))
return 0; /* Ranks differ. */
Ditto here:
if (r1 != r2
(!as1 || as1-type != AS_ASSUMED_RANK)
(!as2 || as2-type != AS_ASSUMED_RANK))
return 0; /* Ranks differ. */
where the !as1 line should be removed, which fixes the third of the three
test cases of the email mentioned above.
Otherwise, the patch looks okay.
Thanks for the review. I have updated the patch according to your
comments and committed as r199475 (including the assumed-type/rank
bits, which also fix PR 54190 by the way).
Cheers,
Janus
Re: [PATCH] PR32219, weak hidden reference segfault
On 13/5/15 8:12 PM, Richard Sandiford wrote:
Chung-Lin Tang clt...@codesourcery.com writes:
On 13/5/10 6:37 PM, Richard Sandiford wrote:
Chung-Lin Tang clt...@codesourcery.com writes:
+case UNSPEC:
+ /* Reach for a contained symbol. */
+ return nonzero_address_p (XVECEXP (x, 0, 0));
I don't think this is safe. UNSPECs really are unspecified :-),
so we can't assume that (unspec X) is nonzero simply because X is.
Attached is a modified patch (not yet tested but just for demonstration)
with a more specific test, hopefully regarded as more safe.
The point is in recognizing (const (unspec [symbol] XYZ)) offsets in PIC
references, which seems quite idiomatic across all targets by now.
I agree this is safer. However, there used to be some ports that
use (plus pic_offset_table_rtx (symbol_ref X)) -- i.e. without an unspec --
to represent a PIC reference to X. That always seemed semantically wrong,
since you're not actually adding the address of X and the PIC register,
but the patch wouldn't handle that case correctly.
Well I can't help those targets then, but at least nothing will be
changed for them by this patch. It will just continue to return 'true'.
An alternative might be to remove the pic_offset_table_rtx case altogether
and rely on targetm.delegitimize_address instead. FWIW, I'd prefer that
if it works, but it's not me you need to convince. :-)
Like we discussed below, I think the direction should be towards making
things more machine-independent, rather then pushing more into the backend.
I would suggest that this probably means there should be a new, more
specific construct in RTL to represent relocation values of this kind,
instead of (const (unspec)) serving an unofficial role; possibly some
real support for reasoning about PIC references could also be considered.
Yeah, maybe we could try to introduce some target-independent knowledge
of certain reloc types, a bit like the generic BFD_RELOC_*s in bfd.
FWIW, I've ran tests on the newer patch on i686-linux, with no
regressions. Testcase has been moved to gcc.dg/torture by recommendation
of Bernhard. If any of the RTL maintainers can give an eye of merciful
approval, this old PR could be resolved :)
Thanks,
Chung-Lin
Index: rtlanal.c
===
--- rtlanal.c (revision 199474)
+++ rtlanal.c (working copy)
@@ -393,7 +393,15 @@ nonzero_address_p (const_rtx x)
/* Handle PIC references. */
if (XEXP (x, 0) == pic_offset_table_rtx
CONSTANT_P (XEXP (x, 1)))
- return true;
+ {
+ rtx offset = XEXP (x, 1);
+ if (GET_CODE (offset) == CONST
+ GET_CODE (XEXP (offset, 0)) == UNSPEC
+ GET_CODE (XVECEXP (XEXP (offset, 0), 0, 0)) == SYMBOL_REF)
+ return nonzero_address_p (XVECEXP (XEXP (offset, 0), 0, 0));
+
+ return true;
+ }
return false;
case PRE_MODIFY:
Index: testsuite/gcc.dg/torture/pr32219.c
===
--- testsuite/gcc.dg/torture/pr32219.c (revision 0)
+++ testsuite/gcc.dg/torture/pr32219.c (revision 0)
@@ -0,0 +1,12 @@
+/* PR target/32219 */
+/* { dg-do run } */
+/* { dg-require-visibility } */
+/* { dg-options -fPIC { target fpic } } */
+
+extern void f() __attribute__((weak,visibility(hidden)));
+int main()
+{
+ if (f)
+f();
+ return 0;
+}
Re: [GOOGLE] More strict checking for call args
Hi Dehao,
On 31/05/13 00:47, Dehao Chen wrote:
This patch makes more strict check of call args to make sure the
number of args match.
Bootstrapped and passed regression tests.
did you thoroughly test Fortran? The Fortran front-end has long had an
unfortunate tendency to eg declare a function as taking 4 int arguments,
but in the call pass it one argument (an array of length 4, consisting
of ints). It would be great if all such nastiness has been fixed. There
are also a few cases in which it declares a builtin as taking, say, an
int,float pair, but passes a float,int pair in the call. I fixed a couple
of instances of this a while back, but I still have one outstanding patch.
Ciao, Duncan.
OK for google branches?
Thanks,
Dehao
Index: gcc/gimple-low.c
===
--- gcc/gimple-low.c (revision 199414)
+++ gcc/gimple-low.c (working copy)
@@ -254,9 +254,13 @@ gimple_check_call_args (gimple stmt, tree fndecl)
!fold_convertible_p (DECL_ARG_TYPE (p), arg)))
return false;
}
+ if (p != NULL)
+ return false;
}
else if (parms)
{
+ if (list_length (parms) - nargs != 1)
+ return false;
for (i = 0, p = parms; i nargs; i++, p = TREE_CHAIN (p))
{
tree arg;
Re: PR57073 - Optimize __builtin_powif (-1.0, k) to k 1 ? -1.0 : 1.0
On Thu, May 30, 2013 at 10:54 PM, Jeff Law l...@redhat.com wrote: On 05/30/2013 02:38 PM, Tobias Burnus wrote: I am a bit lost. The code quoted above is the old code - just moved down a bit. It is supposed to handle powi(x,n) for unknown x with known n - while the new code handles x == -1.0 for unknown n. Thus, gimple_expand_builtin_powi should be unreachable for x == -1. Sorry, I misread the patch.I was focused on the new lines and never looked back up to see if they were just copied from before. If I understood it correctly, you would like to have an additional case before the newly added k == 1, which does something like: result = fold_builtin_powi (loc, NULL_TREE, arg1, arg2, TREE_TYPE (arg1); if (result != NULL_TREE /* Newly added x == -1.0 case. */ Is that what you propose? Don't worry about it.The patch is good as-is. Why sink the !host_integerp check? Please keep it where it is now. Then + if (real_minus_onep (arg0) + TREE_CODE (TREE_TYPE (arg1)) == INTEGER_TYPE this check is redundant, too. Richard. Jeff
Re: PR 57452
On Thu, May 30, 2013 at 11:51 PM, Iyer, Balaji V balaji.v.i...@intel.com wrote: Hello Everyone, One of the test in Cilk Plus array notation execution test for C was wrong. Here is a fixed one: Here is the Change log entry for it: 2013-05-30 Balaji V. Iyer balaji.v.i...@intel.com PR c/57452 * c-c++-common/cilk-plus/AN/if_test.c: Fixed out of bounds issue in test-case. Is this OK for trunk? Ok. Thanks, Richard. Thanks, Balaji V. Iyer.
[PATCH][ARM] PR56315 Improve code generation for DImode IOR
Hi all,
This patch improves code generation for DImode bitwise IOR operations
for arm. The expander can now handle immediate values and the
define_insn is changed to an insn_and_split.
The NEON version is merged with the scalar version.
For code:
unsigned long long or64 (unsigned long long input)
{
return input | 0x20004ULL;
}
we now generate:
orr r0, r0, #4
orr r1, r1, #2
Instead of:
mov r2, #4
mov r3, #2
orr r0, r0, r2
orr r1, r1, r3
Regtested arm-none-eabi on qemu and bootstrapped on a Cortex-A15.
gcc.target/arm/neon-for-64bits-2.c scan-assembler-times vorr 1 starts
failing with this patch because now the compiler chooses not to generate
the NEON version for that testcase.
Previously, it would generate the NEON form because the r constraints
were suppressed explicitly with '?', but we'd prefer to trust the
optimisers to make the correct decision, therefore I didn't
copy over the '?'.
Ok for trunk?
Thanks,
Kyrill
gcc/
2013-05-31 Kyrylo Tkachov kyrylo.tkac...@arm.com
PR target/56315
* config/arm/arm.c (const_ok_for_dimode_op): Handle IOR.
* config/arm/arm.md (*iordi3_insn): Change to insn_and_split.
* config/arm/neon.md (iordi3_neon): Remove.
(neon_vorrmode): Generate iordi3 instead of iordi3_neon.
* config/arm/predicates.md (imm_for_neon_logic_operand):
Move to earlier in the file.
(neon_logic_op2): Likewise.
(arm_iordi_operand_neon): New predicate.
gcc/testsuite/
2013-05-31 Kyrylo Tkachov kyrylo.tkac...@arm.com
PR target/56315
* gcc.target/arm/iordi3-opt.c: New test.
orrdi.patch
Description: Binary data
Re: [Patch, Fortran] Better error messages for type/rank checks
Hi, In addition to this, the patch contains a part which concerns the function 'gfc_terminal_width': Currently this returns a fixed value of 80, which means that all source lines are trimmed to 80 characters in the error messages. I increased this default value to 132 (in order to accommodate standard free-format lines), and added a part which tries to determine the terminal width from the environment variable $COLUMNS (the corresponding code was borrowed from gcc/opts.c). I think it is a good idea to use $COLUMNS (which is, e.g. set by the shell under Unix); however, if the variable is not available, I think one should keep the value 80. well, does the 80-character limit actually have any meaning on current computing platforms? This is basically an artifact from the punchcard era, right? Since the current default line length in free-format source is 132 characters, I thought that might be a more reasonable default. One could also use 132 for free format and 80 for fixed format, or adjust it to the actual values of gfc_option.free_line_length and gfc_option.fixed_line_length. Opinions? Btw, I just noticed that the $COLUMN method does not actually work on my system (the variable seems to be defined, but not exported), but it may still work on other systems. Attached is a small patch with an alternative implementation (borrowed from ada/terminals.c). It is not portable to all systems, but at least it does actually work on my openSUSE box. Is this something we want to have for gfortran? Regarding the error printing: My long standing wish is to ignore ignore trailing comments when trimming the error message, i.e. instead of printing e ! some very long comment line one should rather show print *, some line ! some ver where one cuts of the comment line. I think the issue mostly occurs with %C error printing where the current location is at the end of the line, while for %L the location should be fine. Yes, certainly not a bad idea. I'm not sure how much effort would be needed to accomplish it, though. Anyway, this problem would be mitigated already by a proper determination of the terminal width. (A fullscreen terminal on my MacBook is 180 characters wide, of which 100 are currently wasted.) Cheers, Janus terminal_width.diff Description: Binary data
[PATCH] Fix PRs 57478 / 57453
The following fixes the bug I already fixed more thoroughly.
Tested on x86_64-unknown-linux-gnu, committed as obvious.
Richard.
2013-05-31 Richard Biener rguent...@suse.de
PR tree-optimization/57478
PR tree-optimization/57453
* tree-vect-slp.c (vect_bb_slp_scalar_cost): Uses in PHI nodes
are life as well.
Index: gcc/tree-vect-slp.c
===
--- gcc/tree-vect-slp.c (revision 199403)
+++ gcc/tree-vect-slp.c (working copy)
@@ -1932,7 +1932,8 @@ vect_bb_slp_scalar_cost (basic_block bb,
imm_use_iterator use_iter;
gimple use_stmt;
FOR_EACH_IMM_USE_STMT (use_stmt, use_iter, DEF_FROM_PTR (def_p))
- if (gimple_bb (use_stmt) != bb
+ if (gimple_code (use_stmt) == GIMPLE_PHI
+ || gimple_bb (use_stmt) != bb
|| !STMT_VINFO_VECTORIZABLE (vinfo_for_stmt (use_stmt)))
{
life[i] = true;
Re: PR57073 - Optimize __builtin_powif (-1.0, k) to k 1 ? -1.0 : 1.0
Richard Biener wrote:
Why sink the !host_integerp check? Please keep it where it is now.
Then
+ if (real_minus_onep (arg0)
+ TREE_CODE (TREE_TYPE (arg1)) == INTEGER_TYPE
this check is redundant, too.
Good point - I will commit the patch below after another bootstrap and
regtesting.
Tobias
--- a/gcc/tree-ssa-math-opts.c
+++ b/gcc/tree-ssa-math-opts.c
@@ -1448,7 +1448,9 @@ execute_cse_sincos (void)
loc = gimple_location (stmt);
- if (real_minus_onep (arg0)
- TREE_CODE (TREE_TYPE (arg1)) == INTEGER_TYPE
- !host_integerp (arg1,0))
+ if (!host_integerp (arg1, 0))
+ break;
+
+
+ if (real_minus_onep (arg0))
{
tree t0, t1, cond, one, minus_one;
@@ -1477,7 +1479,4 @@ execute_cse_sincos (void)
else
{
- if (!host_integerp (arg1, 0))
- break;
-
n = TREE_INT_CST_LOW (arg1);
result = gimple_expand_builtin_powi (gsi, loc,
arg0, n);
Re: PR57073 - Optimize __builtin_powif (-1.0, k) to k 1 ? -1.0 : 1.0
On Fri, May 31, 2013 at 10:57 AM, Tobias Burnus bur...@net-b.de wrote:
Richard Biener wrote:
Why sink the !host_integerp check? Please keep it where it is now.
Then
+ if (real_minus_onep (arg0)
+ TREE_CODE (TREE_TYPE (arg1)) == INTEGER_TYPE
this check is redundant, too.
Good point - I will commit the patch below after another bootstrap and
regtesting.
Tobias
--- a/gcc/tree-ssa-math-opts.c
+++ b/gcc/tree-ssa-math-opts.c
@@ -1448,7 +1448,9 @@ execute_cse_sincos (void)
loc = gimple_location (stmt);
- if (real_minus_onep (arg0)
- TREE_CODE (TREE_TYPE (arg1)) == INTEGER_TYPE
- !host_integerp (arg1,0))
+ if (!host_integerp (arg1, 0))
+ break;
+
+
Very too much vertical space here and above.
+ if (real_minus_onep (arg0))
{
tree t0, t1, cond, one, minus_one;
@@ -1477,7 +1479,4 @@ execute_cse_sincos (void)
else
{
- if (!host_integerp (arg1, 0))
- break;
-
n = TREE_INT_CST_LOW (arg1);
result = gimple_expand_builtin_powi (gsi, loc, arg0,
n);
Re: [PATCH][ARM] PR56315 Improve code generation for DImode IOR
On 31/05/13 09:46, Kyrylo Tkachov wrote:
Hi all,
This patch improves code generation for DImode bitwise IOR operations
for arm. The expander can now handle immediate values and the
define_insn is changed to an insn_and_split.
The NEON version is merged with the scalar version.
For code:
unsigned long long or64 (unsigned long long input)
{
return input | 0x20004ULL;
}
we now generate:
orr r0, r0, #4
orr r1, r1, #2
Instead of:
mov r2, #4
mov r3, #2
orr r0, r0, r2
orr r1, r1, r3
Regtested arm-none-eabi on qemu and bootstrapped on a Cortex-A15.
gcc.target/arm/neon-for-64bits-2.c scan-assembler-times vorr 1 starts
failing with this patch because now the compiler chooses not to generate
the NEON version for that testcase.
Previously, it would generate the NEON form because the r constraints
were suppressed explicitly with '?', but we'd prefer to trust the
optimisers to make the correct decision, therefore I didn't
copy over the '?'.
Ok for trunk?
Thanks,
Kyrill
gcc/
2013-05-31 Kyrylo Tkachov kyrylo.tkac...@arm.com
PR target/56315
* config/arm/arm.c (const_ok_for_dimode_op): Handle IOR.
* config/arm/arm.md (*iordi3_insn): Change to insn_and_split.
* config/arm/neon.md (iordi3_neon): Remove.
(neon_vorrmode): Generate iordi3 instead of iordi3_neon.
* config/arm/predicates.md (imm_for_neon_logic_operand):
Move to earlier in the file.
(neon_logic_op2): Likewise.
(arm_iordi_operand_neon): New predicate.
gcc/testsuite/
2013-05-31 Kyrylo Tkachov kyrylo.tkac...@arm.com
PR target/56315
* gcc.target/arm/iordi3-opt.c: New test.
OK.
R.
Re: [Patch, Fortran] PR57456 - Handle ALLOCATE with typespec for CLASS
Currently, ALLOCATE ignores the typespec for arrays. Such that: ALLOCATE (t2 :: var(5)) will allocate as much memory as the base type requires instead of using as much as t2 does. I explicitly exclude characters as it otherwise will fail for allocate_with_typespec_1.f90, which uses: allocate(character :: c1(1)) The problem is that gfc_typenode_for_spec will return an array type and not an element type, hence TYPE_SIZE_UNIT won't work. The current version is fine, except for deferred-length strings. To properly handle it, one has to do it as gfortran currently does for scalars. (Best by consolidating the support. See PR.) As I want to work on other things first, I would like to get this in as band aid - until someone has the time to do it properly. (I found it when trying to write a test case for the already submitted final patch.) Build and regtested on x86-64-gnu-linux. OK for the trunk? Looks good. Thanks for the patch! Cheers, Janus
Re: [PATCH, rs6000] power8 patches, patch #4, new power8 builtins
Ok, I tracked down what the problem is. We never implemented the EQV, ORC, or NAND insns in the GPRs. When I added the power8 vector versions, the split wide types pass tried to do its thing in the GPRs, it creates a bad insn. I originally saw it in the atomic ops, because I was testing all of the combinations provided, but I can reproduce it just by using __int128_t. The boolcmode3_internal1 pattern uses non-canonical RTL for eqv: (xor (not x) y) instead of (not (xor x y)). You'll need to add a correct pattern, or wait for my patch series (which I'll start sending later today) to get in. (There are problems with the dot forms of xor, nand, nor, and eqv as well, but I don't think you will hit that?) Segher
Re: [Patch, Fortran] Better error messages for type/rank checks
Am 31.05.2013 10:47, schrieb Janus Weil:
Attached is a small patch with an alternative implementation (borrowed
from ada/terminals.c). It is not portable to all systems, but at least
it does actually work on my openSUSE box. Is this something we want to
have for gfortran?
# cat term.c EOF
#include sys/ioctl.h
#include stdio.h
int main (void)
{
struct winsize w;
ioctl(0, TIOCGWINSZ, w);
printf (lines %d\n, w.ws_row);
printf (columns %d\n, w.ws_col);
return 0;
}
EOF
# gcc term.c -o term
# at now EOF
term term1.txt
EOF
# cat term1.txt
lines 63152
columns 55767
# at now EOF
term term2.txt
EOF
# cat term2.txt
lines 24448
columns 22759
So this gives meaningless, varying numbers for me when
executing in non-interactive environment.
Perhaps cutting to some sane numbers is needed?
Or, simply leave the line wrapping to the terminal and
remove all this trimming code?
cheers,
Manfred
Re: [Patch, Fortran] Better error messages for type/rank checks
Hi Manfred,
Attached is a small patch with an alternative implementation (borrowed
from ada/terminals.c). It is not portable to all systems, but at least
it does actually work on my openSUSE box. Is this something we want to
have for gfortran?
# cat term.c EOF
#include sys/ioctl.h
#include stdio.h
int main (void)
{
struct winsize w;
ioctl(0, TIOCGWINSZ, w);
printf (lines %d\n, w.ws_row);
printf (columns %d\n, w.ws_col);
return 0;
}
EOF
# gcc term.c -o term
# at now EOF
term term1.txt
EOF
# cat term1.txt
lines 63152
columns 55767
# at now EOF
term term2.txt
EOF
# cat term2.txt
lines 24448
columns 22759
So this gives meaningless, varying numbers for me when
executing in non-interactive environment.
Huh, funny. For me it works nicely. Does this also happen if you if
gate your code by
#ifdef TIOCGWINSZ
as done in my patch? What operating system are you on?
Perhaps cutting to some sane numbers is needed?
Possibly.
Or, simply leave the line wrapping to the terminal and
remove all this trimming code?
This is what we do with the actual error messages. I think the reason
why the trimming is done for the source lines is that it is harder to
follow the locus markers (i.e. ... error at (1) ...) if the source
line is wrapped.
Cheers,
Janus
Re: [Patch, Fortran] Better error messages for type/rank checks
Am 31.05.2013 12:21, schrieb Janus Weil:
Hi Manfred,
Attached is a small patch with an alternative implementation (borrowed
from ada/terminals.c). It is not portable to all systems, but at least
it does actually work on my openSUSE box. Is this something we want to
have for gfortran?
# cat term.c EOF
#include sys/ioctl.h
#include stdio.h
int main (void)
{
struct winsize w;
ioctl(0, TIOCGWINSZ, w);
printf (lines %d\n, w.ws_row);
printf (columns %d\n, w.ws_col);
return 0;
}
EOF
# gcc term.c -o term
# at now EOF
term term1.txt
EOF
# cat term1.txt
lines 63152
columns 55767
# at now EOF
term term2.txt
EOF
# cat term2.txt
lines 24448
columns 22759
So this gives meaningless, varying numbers for me when
executing in non-interactive environment.
Huh, funny. For me it works nicely. Does this also happen if you if
gate your code by
#ifdef TIOCGWINSZ
as done in my patch?
Yes.
As stated, this happens only in non-interactive environment,
executing it in a terminal produces something sane:
# term
lines 60
columns 151
What operating system are you on?
x86_64 OpenSuse 12.1
Perhaps cutting to some sane numbers is needed?
Possibly.
Or, simply leave the line wrapping to the terminal and
remove all this trimming code?
This is what we do with the actual error messages. I think the reason
why the trimming is done for the source lines is that it is harder to
follow the locus markers (i.e. ... error at (1) ...) if the source
line is wrapped.
Cheers,
Janus
Re: [ada, build] host/target configuration
Il 31/05/2013 10:03, Eric Botcazou ha scritto: I don't understand this change. This used to match configurations arm*-[vendor]-linux-androideabi; now it only matches arm*-[vendor]-androideabi, which isn't in use (for a Android system is always based on the Linux kernel, in my understanding). This is meant to match arm-linux-androideabi, which didn't match anymore after the initial problematic targ change but needs to. Do you mean arm-linux-androideabi, or arm-none-linux-androideabi? Paolo
[PATCH] Add testcase for PR57478
This adds a reduced testcase for PR57478.
Regtested on x86_64-linux. Ok for trunk?
2013-05-31 Marek Polacek pola...@redhat.com
PR tree-optimization/57478
PR tree-optimization/57453
* gcc.dg/torture/pr57478.c: New test.
--- gcc/testsuite/gcc.dg/torture/pr57478.c.mp2 2013-05-31 11:31:27.179683480
+0200
+++ gcc/testsuite/gcc.dg/torture/pr57478.c 2013-05-31 11:31:50.239753729
+0200
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+
+typedef struct Node Node;
+
+struct Node
+{
+ Node *Pred, *Suc;
+ Node *SubBestPred;
+ Node *SubBestSuc;
+};
+
+void
+foo (Node *N)
+{
+ do
+{
+ N-SubBestPred = N-Pred;
+ N-SubBestSuc = N-Suc;
+}
+ while (N = N-Suc);
+}
Marek
Re: [PATCH] Add testcase for PR57478
On Fri, 31 May 2013, Marek Polacek wrote:
This adds a reduced testcase for PR57478.
Regtested on x86_64-linux. Ok for trunk?
Ok.
Thanks,
Richard.
2013-05-31 Marek Polacek pola...@redhat.com
PR tree-optimization/57478
PR tree-optimization/57453
* gcc.dg/torture/pr57478.c: New test.
--- gcc/testsuite/gcc.dg/torture/pr57478.c.mp22013-05-31
11:31:27.179683480 +0200
+++ gcc/testsuite/gcc.dg/torture/pr57478.c2013-05-31 11:31:50.239753729
+0200
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+
+typedef struct Node Node;
+
+struct Node
+{
+ Node *Pred, *Suc;
+ Node *SubBestPred;
+ Node *SubBestSuc;
+};
+
+void
+foo (Node *N)
+{
+ do
+{
+ N-SubBestPred = N-Pred;
+ N-SubBestSuc = N-Suc;
+}
+ while (N = N-Suc);
+}
Marek
--
Richard Biener rguent...@suse.de
SUSE / SUSE Labs
SUSE LINUX Products GmbH - Nuernberg - AG Nuernberg - HRB 16746
GF: Jeff Hawn, Jennifer Guild, Felix Imend
[PATCH] Fix failing pr56184.C
Since http://gcc.gnu.org/ml/gcc-patches/2013-05/msg01475.html introduced
a warning for bit field types with width greater than the contained enum
width pr56184.C has failed for arm*-*-* due to the extra diagnostic
emitted. This patch disables short-enums in the test case.
OK?
/M
2013-05-31 Marcus Shawcroft marcus.shawcr...@arm.com
* gcc.target/arm/pr56184.C: Add -fno-short-enums.diff --git a/gcc/testsuite/gcc.target/arm/pr56184.C b/gcc/testsuite/gcc.target/arm/pr56184.C
index db92db1..d44c1b4 100644
--- a/gcc/testsuite/gcc.target/arm/pr56184.C
+++ b/gcc/testsuite/gcc.target/arm/pr56184.C
@@ -1,5 +1,5 @@
/* { dg-do compile } */
-/* { dg-options -O2 -mthumb -march=armv7-a -mfpu=neon -mfloat-abi=softfp -mtune=cortex-a9 -fno-section-anchors } */
+/* { dg-options -fno-short-enums -O2 -mthumb -march=armv7-a -mfpu=neon -mfloat-abi=softfp -mtune=cortex-a9 -fno-section-anchors } */
typedef unsigned int size_t;
__extension__ typedef int __intptr_t;
[PATCH] Fix eb76.C regression for arm*-*-*
Since http://gcc.gnu.org/ml/gcc-patches/2013-05/msg01475.html introduced
a warning for bit field types with width greater than the contained enum
width eb76.C has failed for arm*-*-* due to the extra diagnostic
emitted. This patch disables short-enums in the test case.
OK?
/M
2013-05-31 Marcus Shawcroft marcus.shawcr...@arm.com
* g++.old-deja/g++.robertl/eb76.C: Add -fno-short-enums.diff --git a/gcc/testsuite/g++.old-deja/g++.robertl/eb76.C b/gcc/testsuite/g++.old-deja/g++.robertl/eb76.C
index c74e7bd..3125dc1 100644
--- a/gcc/testsuite/g++.old-deja/g++.robertl/eb76.C
+++ b/gcc/testsuite/g++.old-deja/g++.robertl/eb76.C
@@ -1,4 +1,5 @@
// { dg-do assemble }
+// { dg-options -fno-short-enums }
// the template operator!= interferes. It should be in a namespace.
#include utility
[PATCH] Fix pr54684.C regression for arm*-*-*
Since http://gcc.gnu.org/ml/gcc-patches/2013-05/msg01475.html introduced
a warning for bit field types with width greater than the contained enum
width pr54684.C has failed for arm*-*-* due to the extra diagnostic
emitted. This patch disables short-enums in the test case.
OK?
/M
2013-05-31 Marcus Shawcroft marcus.shawcr...@arm.com
* g++.dg/torture/pr54684.C: Add -fno-short-enums.diff --git a/gcc/testsuite/g++.dg/torture/pr54684.C b/gcc/testsuite/g++.dg/torture/pr54684.C
index 40c47f3..4934011 100644
--- a/gcc/testsuite/g++.dg/torture/pr54684.C
+++ b/gcc/testsuite/g++.dg/torture/pr54684.C
@@ -1,4 +1,5 @@
// { dg-do compile }
+// { dg-options -fno-short-enums }
typedef union tree_node *tree;
typedef union gimple_statement_d *gimple;
Re: [rs6000] Improve FP comparisons with -fno-trapping-math
I'm okay with most of the change, but I have a question: What happened
to the unsigned comparisons and LTGT?
Unsigned comparisons aren't used for FP (the whole block of code is dominated
by a FLOAT_MODE_P (mode) test). LTGT and UNEQ were wrong (but unused) since
they were implemented as NE and EQ respectively and therefore didn't return
the correct result for NaNs. In fact, all the unordered operators were wrong
(but unused) since they were implemented as their ordered counterpart.
I'm not going to insist, but this probably deserves an e500-specific
testcase that it's generating the correct results and not calling
libgcc for unordered comparisons.
Note that, for originally unordered comparisons, there has always been a call
to libgcc as rs6000_cbranch_operator is ordered_comparison_operator on e500
(hence the wrong implementation in rs6000_generate_compare was unused). But,
indeed, we should verify that we don't generate them when the comparisons are
originally ordered, with and without -ftrapping-math.
I have attached 4 testcases:
- e500-ord-1.c: ordered/signaling predicates, -ftrapping-math
- e500-ord-2.c: ordered/signaling predicates, -fno-trapping-math
- e500-unord-1.c: C99 unordered/quiet predicates, -ftrapping-math
- e500-unord-2.c: C99 unordered/quiet predicates, -fno-trapping-math
With the unpatched compiler:
- e500-ord-1.c: no calls to __unordsf2 (optimal)
- e500-ord-2.c: calls to __unordsf2 (the very issue I'm fixing)
- e500-unord-1.c: calls to __unordsf2 (optimal)
- e500-unord-2.c: calls to __unordsf2 (useless since -fno-trapping-math)
With the patched compiler:
- e500-ord-1.c: no calls to __unordsf2 (optimal)
- e500-ord-2.c: no calls to __unordsf2 (optimal)
- e500-unord-1.c: calls to __unordsf2 (optimal)
- e500-unord-2.c: no calls to __unordsf2 (optimal)
2013-05-31 Eric Botcazou ebotca...@adacore.com
* gcc.target/powerpc/e500-ord-1.c: New test.
* gcc.target/powerpc/e500-ord-2.c: Likewise.
* gcc.target/powerpc/e500-unord-1.c: Likewise.
* gcc.target/powerpc/e500-unord-2.c: Likewise.
--
Eric Botcazou/* { dg-do compile { target powerpc*-*-eabi* } } */
/* { dg-options -O -ftrapping-math -fdump-rtl-final } */
int isgreater (float f1, float f2)
{
int r = (f1 f2);
return !r ? -1 : 1;
}
int isgreaterequal (float f1, float f2)
{
int r = (f1 = f2);
return !r ? -1 : 1;
}
int isless (float f1, float f2)
{
int r = (f1 f2);
return !r ? -1 : 1;
}
int islessequal (float f1, float f2)
{
int r = (f1 = f2);
return !r ? -1 : 1;
}
/* { dg-final { scan-rtl-dump-not __unordsf2 final } } */
/* { dg-final { cleanup-rtl-dump final } } *//* { dg-do compile { target powerpc*-*-eabi* } } */
/* { dg-options -O -fno-trapping-math -fdump-rtl-final } */
int isgreater (float f1, float f2)
{
int r = (f1 f2);
return !r ? -1 : 1;
}
int isgreaterequal (float f1, float f2)
{
int r = (f1 = f2);
return !r ? -1 : 1;
}
int isless (float f1, float f2)
{
int r = (f1 f2);
return !r ? -1 : 1;
}
int islessequal (float f1, float f2)
{
int r = (f1 = f2);
return !r ? -1 : 1;
}
/* { dg-final { scan-rtl-dump-not __unordsf2 final } } */
/* { dg-final { cleanup-rtl-dump final } } *//* { dg-do compile { target powerpc*-*-eabi* } } */
/* { dg-options -O -ftrapping-math -fdump-rtl-final } */
int isgreater (float f1, float f2)
{
int r = __builtin_isgreater (f1, f2);
return !r ? -1 : 1;
}
int isgreaterequal (float f1, float f2)
{
int r = __builtin_isgreaterequal (f1, f2);
return !r ? -1 : 1;
}
int isless (float f1, float f2)
{
int r = __builtin_isless (f1, f2);
return !r ? -1 : 1;
}
int islessequal (float f1, float f2)
{
int r = __builtin_islessequal (f1, f2);
return !r ? -1 : 1;
}
/* { dg-final { scan-rtl-dump-times __unordsf2 4 final } } */
/* { dg-final { cleanup-rtl-dump final } } *//* { dg-do compile { target powerpc*-*-eabi* } } */
/* { dg-options -O -fno-trapping-math -fdump-rtl-final } */
int isgreater (float f1, float f2)
{
int r = __builtin_isgreater (f1, f2);
return !r ? -1 : 1;
}
int isgreaterequal (float f1, float f2)
{
int r = __builtin_isgreaterequal (f1, f2);
return !r ? -1 : 1;
}
int isless (float f1, float f2)
{
int r = __builtin_isless (f1, f2);
return !r ? -1 : 1;
}
int islessequal (float f1, float f2)
{
int r = __builtin_islessequal (f1, f2);
return !r ? -1 : 1;
}
/* { dg-final { scan-rtl-dump-not __unordsf2 final } } */
/* { dg-final { cleanup-rtl-dump final } } */
Re: [Patch, Fortran] Better error messages for type/rank checks
On Fri, May 31, 2013 at 1:21 PM, Janus Weil ja...@gcc.gnu.org wrote:
Hi Manfred,
Attached is a small patch with an alternative implementation (borrowed
from ada/terminals.c). It is not portable to all systems, but at least
it does actually work on my openSUSE box. Is this something we want to
have for gfortran?
# cat term.c EOF
#include sys/ioctl.h
#include stdio.h
int main (void)
{
struct winsize w;
ioctl(0, TIOCGWINSZ, w);
printf (lines %d\n, w.ws_row);
printf (columns %d\n, w.ws_col);
return 0;
}
EOF
# gcc term.c -o term
# at now EOF
term term1.txt
EOF
# cat term1.txt
lines 63152
columns 55767
# at now EOF
term term2.txt
EOF
# cat term2.txt
lines 24448
columns 22759
So this gives meaningless, varying numbers for me when
executing in non-interactive environment.
Huh, funny. For me it works nicely. Does this also happen if you if
gate your code by
#ifdef TIOCGWINSZ
as done in my patch? What operating system are you on?
Wouldn't it work to use the TIOCGWINSZ ioctl only if isatty() reports
that we're outputting to a terminal?
Perhaps cutting to some sane numbers is needed?
Possibly.
Or, simply leave the line wrapping to the terminal and
remove all this trimming code?
This is what we do with the actual error messages. I think the reason
why the trimming is done for the source lines is that it is harder to
follow the locus markers (i.e. ... error at (1) ...) if the source
line is wrapped.
Cheers,
Janus
--
Janne Blomqvist
Re: C++ PATCH for c++/52377 (NSDMI and unions)
Jason Merrill ja...@redhat.com writes: sort_mem_initializers was skipping over all fields without a mem-initializer, even ones with an NSDMI. One of the testcases doesn't compile on Solaris 10/x86: output is: /vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.dg/cpp0x/nsdmi-union2.C:4:7: error: multiple fields in union 'A' initialized /vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.dg/cpp0x/nsdmi-union2.C: In constructor 'constexpr A::A()': /vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.dg/cpp0x/nsdmi-union2.C:4:7: error: initializations for multiple members of 'A' /vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.dg/cpp0x/nsdmi-union2.C: At global scope: /vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.dg/cpp0x/nsdmi-union2.C:10:3: note: synthesized method 'constexpr A::A()' first required here /vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.dg/cpp0x/nsdmi-union2.C: In constructor 'B::B()': /vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.dg/cpp0x/nsdmi-union2.C:10:3: note: synthesized method 'constexpr A::A()' first required here /vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.dg/cpp0x/nsdmi-union2.C: In constructor 'B::B()': /vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.dg/cpp0x/nsdmi-union2.C:15:3: error: initializations for multiple members of 'B' and produces a warning: WARNING: g++.dg/cpp0x/nsdmi-union2.C -std=c++11 compilation failed to produce executable Is this really intended to be a run test? Also, both testcases are missing from gcc/testsuite/ChangeLog. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [ada, build] host/target configuration
Do you mean arm-linux-androideabi, or arm-none-linux-androideabi? Thr former, but I guess that we want to support the latter as well. -- Eric Botcazou
Fix gcc.dg/shrink-wrap-alloca.c
The new gcc.dg/shrink-wrap-alloca.c FAILs on 64-bit Solaris 10/x86:
Excess errors:
/vol/gcc/src/hg/trunk/local/gcc/testsuite/gcc.dg/shrink-wrap-alloca.c:4:14:
warning: conflicting types for built-in function 'alloca' [enabled by default]
The following patch fixes it by using __builtin_alloca, as pre-approved
by Jeff.
Tested with the appropriate runtest invocation on i386-pc-solaris2.10
and x86_64-unknown-linux-gnu, installed on mainline.
Rainer
2013-05-31 Rainer Orth r...@cebitec.uni-bielefeld.de
* gcc.dg/shrink-wrap-alloca.c: Use __builtin_alloca.
# HG changeset patch
# Parent aa3c5278ae7a82849942b6f47fc69ee62b244660
Fix gcc.dg/shrink-wrap-alloca.c
diff --git a/gcc/testsuite/gcc.dg/shrink-wrap-alloca.c b/gcc/testsuite/gcc.dg/shrink-wrap-alloca.c
--- a/gcc/testsuite/gcc.dg/shrink-wrap-alloca.c
+++ b/gcc/testsuite/gcc.dg/shrink-wrap-alloca.c
@@ -1,13 +1,11 @@
/* { dg-do compile } */
/* { dg-options -O2 -g } */
-extern int * alloca (int);
-
int *p;
void
test (int a)
{
if (a 0)
-p = alloca (4);
+p = __builtin_alloca (4);
}
--
-
Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [ada, build] host/target configuration
Hi! On Fri, 31 May 2013 13:14:39 +0200, Eric Botcazou ebotca...@adacore.com wrote: Do you mean arm-linux-androideabi, or arm-none-linux-androideabi? Thr former, but I guess that we want to support the latter as well. In my reading, the code supported both these before your recent change, and now supports neither, as I reported this morning. With which configurations exactly have you tested your change? Grüße, Thomas pgpF6mpWfgKPa.pgp Description: PGP signature
Re: [fixincludes] solaris_pow_int_overload should use __cplusplus
Rainer Orth r...@cebitec.uni-bielefeld.de writes: Bruce Korb bk...@gnu.org writes: On 05/16/13 06:41, Rainer Orth wrote: Work is going on to incorporate all applicable fixincludes fixes into the Solaris headers proper. One fix is currently problematic since it uses an G++-internal macro (__GXX_EXPERIMENTAL_CXX0X__) where libstdc++ cmath already switched to testing __cplusplus. The following patch updates the fix to match cmath. Tested by mainline bootstraps on i386-pc-solaris2.11, sparc-sun-solaris2.11 and 4.8 bootstrap on i386-pc-solaris2.10. Ok for mainline and 4.8 branch if they pass? Look good to me. Thanks. Testing completed successfully now on both 4.8 branch and mainline, thus I've installed the patch on mainline. Jakub, may I install on the 4.8 branch now or better wait until 4.8.1 is released? Jakub, with the release of 4.8.1, is the patch ok for the 4.8 branch now? Thanks. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [x86, PATCH 2/2] Enabling of the new Intel microarchitecture Silvermont
We do want to use the same register for float_extend.
On Thu, May 30, 2013 at 9:22 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Thu, May 30, 2013 at 4:25 PM, Yuri Rumyantsev ysrum...@gmail.com wrote:
Hi All
Second patch enables several Silvermont uarch features which improve
performance of the new processor (based on experiments on real SLM
hardware):
1. If using a 2-source or 3-source LEA for non-destructive destination
purposes, or due to wanting ability to use SCALE, the use of LEA is
preferable.
2. Transformation of FP conversion for memory operands into conversion
from register.
3. Couple of improvements for post-reload scheduling:
- increase latency of integer loads and load/store with exact dependence;
- simple re-ordering of the top of ready list - if 2 instructions
at the top of the list have the same priority we consider instruction
which producer(s) were scheduled earlier as the best candidate.
Bootstrapped and tested on x86_64-unknown-linux-gnu, ok for trunk?
2013-05-30 Yuri Rumyantsev yuri.s.rumyant...@intel.com
Igor Zamyatin igor.zamya...@intel.com
Silvermont (SLM) architecture performance tuning.
* config/i386/i386.h (enum ix86_tune_indices): Add
X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS.
(TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS): New define.
* config/i386/i386.c (initial_ix86_tune_features)
X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS: Initialize.
(ix86_lea_outperforms): Handle Silvermont tuning.
(ix86_avoid_lea_for_add): Add new argument to ix86_lea_outperforms
call.
(ix86_use_lea_for_mov): Likewise.
(ix86_avoid_lea_for_addr): Likewise.
(ix86_lea_for_add_ok): Likewise.
(exact_dependency_1): New function.
(exact_store_load_dependency): Likewise.
(ix86_adjust_cost): Handle Silvermont tuning.
(do_reoder_for_imul): Likewise.
(swap_top_of_ready_list): New function.
(ix86_sched_reorder): Changed to handle Silvermont tuning.
* config/i386/i386.md (peepholes that split memory operand in fp
converts): New
@@ -24625,9 +24730,9 @@ ix86_sched_reorder(FILE *dump, int
sched_verbose, rtx *ready, int *pn_ready,
- con = DEP_CON (dep);
- if (!NONDEBUG_INSN_P (con))
-continue;
+ con = DEP_CON (dep);
+ if (!NONDEBUG_INSN_P (con))
+continue;
There are some unnecessary whitespace changes (tabs-spaces) in a
couple of places throughout the patch, such as in the above lines.
+(define_peephole2
+ [(set (match_operand:DF 0 register_operand)
+(float_extend:DF
+ (match_operand:SF 1 memory_operand)))]
+ TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS
+optimize_insn_for_speed_p ()
+SSE_REG_P (operands[0])
+ [(set (match_dup 2) (match_dup 1))
+ (set (match_dup 0) (float_extend:DF (match_dup 2)))]
+{
+ operands[2] = gen_rtx_REG (SFmode, REGNO (operands[0]));
+})
You should use
(match_scratch:SF 2 x)
at the top of the peephole2 pattern, and you will get a free scratch
register (assuming that it is not necessary to use the same register
for input and output operand of the float_extend insn).
Otherwise, the patch looks OK to me.
Uros.
Re: [fixincludes] solaris_pow_int_overload should use __cplusplus
On Fri, May 31, 2013 at 01:35:14PM +0200, Rainer Orth wrote: Jakub, with the release of 4.8.1, is the patch ok for the 4.8 branch now? Ok. Jakub
Re: [x86, PATCH 2/2] Enabling of the new Intel microarchitecture Silvermont
On Fri, May 31, 2013 at 1:38 PM, Igor Zamyatin izamya...@gmail.com wrote:
We do want to use the same register for float_extend.
OK then. Please add a comment for this fact and also, please put
single-line preparation statements inside double-quotes instead of
curved braces.
Uros.
On Thu, May 30, 2013 at 9:22 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Thu, May 30, 2013 at 4:25 PM, Yuri Rumyantsev ysrum...@gmail.com wrote:
Hi All
Second patch enables several Silvermont uarch features which improve
performance of the new processor (based on experiments on real SLM
hardware):
1. If using a 2-source or 3-source LEA for non-destructive destination
purposes, or due to wanting ability to use SCALE, the use of LEA is
preferable.
2. Transformation of FP conversion for memory operands into conversion
from register.
3. Couple of improvements for post-reload scheduling:
- increase latency of integer loads and load/store with exact
dependence;
- simple re-ordering of the top of ready list - if 2 instructions
at the top of the list have the same priority we consider instruction
which producer(s) were scheduled earlier as the best candidate.
Bootstrapped and tested on x86_64-unknown-linux-gnu, ok for trunk?
2013-05-30 Yuri Rumyantsev yuri.s.rumyant...@intel.com
Igor Zamyatin igor.zamya...@intel.com
Silvermont (SLM) architecture performance tuning.
* config/i386/i386.h (enum ix86_tune_indices): Add
X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS.
(TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS): New define.
* config/i386/i386.c (initial_ix86_tune_features)
X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS: Initialize.
(ix86_lea_outperforms): Handle Silvermont tuning.
(ix86_avoid_lea_for_add): Add new argument to ix86_lea_outperforms
call.
(ix86_use_lea_for_mov): Likewise.
(ix86_avoid_lea_for_addr): Likewise.
(ix86_lea_for_add_ok): Likewise.
(exact_dependency_1): New function.
(exact_store_load_dependency): Likewise.
(ix86_adjust_cost): Handle Silvermont tuning.
(do_reoder_for_imul): Likewise.
(swap_top_of_ready_list): New function.
(ix86_sched_reorder): Changed to handle Silvermont tuning.
* config/i386/i386.md (peepholes that split memory operand in fp
converts): New
@@ -24625,9 +24730,9 @@ ix86_sched_reorder(FILE *dump, int
sched_verbose, rtx *ready, int *pn_ready,
- con = DEP_CON (dep);
- if (!NONDEBUG_INSN_P (con))
-continue;
+ con = DEP_CON (dep);
+ if (!NONDEBUG_INSN_P (con))
+continue;
There are some unnecessary whitespace changes (tabs-spaces) in a
couple of places throughout the patch, such as in the above lines.
+(define_peephole2
+ [(set (match_operand:DF 0 register_operand)
+(float_extend:DF
+ (match_operand:SF 1 memory_operand)))]
+ TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS
+optimize_insn_for_speed_p ()
+SSE_REG_P (operands[0])
+ [(set (match_dup 2) (match_dup 1))
+ (set (match_dup 0) (float_extend:DF (match_dup 2)))]
+{
+ operands[2] = gen_rtx_REG (SFmode, REGNO (operands[0]));
+})
You should use
(match_scratch:SF 2 x)
at the top of the peephole2 pattern, and you will get a free scratch
register (assuming that it is not necessary to use the same register
for input and output operand of the float_extend insn).
Otherwise, the patch looks OK to me.
Uros.
[PATCH] Disable no-section-anchors-vect-68.C for aarch64 tiny memory model.
The vect/no-section-anchors-vect-68.C test case results in a binary that
is tool large for the aarch64 tiny memory model. This patch disables
the test case for that memory model.
/Marcus
2013-05-31 Marcus Shawcroft marcus.shawcr...@arm.com
* gcc.dg/vect/no-section-anchors-vect-68.c:
Add dg-skip-if aarch64_tiny.diff --git a/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c b/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c
index 4b61305..7a77651 100644
--- a/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c
+++ b/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c
@@ -1,4 +1,6 @@
-/* { dg-require-effective-target vect_int } */
+/* { dg-require-effective-target vect_int }
+ { dg-skip-if AArch64 tiny code model does not support programs larger than 1MiB {aarch64_tiny} {*} {} }
+ */
#include stdarg.h
#include tree-vect.h
Re: [PATCH] Fix incorrect discriminator assignment.
Dehao Chen de...@google.com writes:
On Thu, May 30, 2013 at 10:41 AM, Cary Coutant ccout...@google.com wrote:
That's weird cause in dwarf2.exp:
# If a testcase doesn't have special options, use these.
global DEFAULT_CFLAGS
if ![info exists DEFAULT_CFLAGS] then {
set DEFAULT_CFLAGS -ansi -pedantic-errors -gdwarf-2
}
But anyway, shall I add the -gdwarf-2 option back to discriminator.c?
I think that gets overridden by dg-options. If you use {
dg-additional-options -O2 } instead, it should still pass -gdwarf-2
(along with the other two).
In the current test, I didn't use dg-options, but dg-additional-options
instead:
/* { dg-additional-options -O0 } */
Indeed, and I see -ansi -pedantic-errors -gdwarf-2 -O0 used for the test
on both x86_64-unknown-linux-gnu and i386-pc-solaris2.10 (if I augment
the target clause).
Something unusual seems to be going on with Andreas' testing. Any
RUNTESTFLAGS or DEJAGNU options in the environment?
Rainer
--
-
Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [PATCH] Fix incorrect discriminator assignment.
Andreas Schwab sch...@linux-m68k.org writes: Rainer Orth r...@cebitec.uni-bielefeld.de writes: And why do you add -gdwarf-2 in dg-options? AFAICS all tests in gcc.dg/debug/dwarf2 are built with -gdwarf-2 anyway. Do they? Not here. Executing on host: /daten/aranym/gcc/gcc-20130530/Build/gcc/xgcc -B/daten/aranym/gcc/gcc-20130530/Build/gcc/ /daten/aranym/gcc/gcc-20130530/gcc/testsuite/gcc.dg/debug/dwarf2/discriminator.c -fno-diagnostics-show-caret -fdiagnostics-color=never -ansi -pedantic-errors -O0 -ffat-lto-objects -ffat-lto-objects -ffat-lto-objects -S -o discriminator.s (timeout = 300) spawn /daten/aranym/gcc/gcc-20130530/Build/gcc/xgcc -B/daten/aranym/gcc/gcc-20130530/Build/gcc/ /daten/aranym/gcc/gcc-20130530/gcc/testsuite/gcc.dg/debug/dwarf2/discriminator.c -fno-diagnostics-show-caret -fdiagnostics-color=never -ansi -pedantic-errors -O0 -ffat-lto-objects -ffat-lto-objects -ffat-lto-objects -S -o discriminator.s PASS: gcc.dg/debug/dwarf2/discriminator.c (test for excess errors) FAIL: gcc.dg/debug/dwarf2/discriminator.c scan-assembler loc [0-9] 11 [0-9]( is_stmt [0-9])?\n FAIL: gcc.dg/debug/dwarf2/discriminator.c scan-assembler loc [0-9] 11 [0-9]( is_stmt [0-9])? discriminator 2\n FAIL: gcc.dg/debug/dwarf2/discriminator.c scan-assembler loc [0-9] 11 [0-9]( is_stmt [0-9])? discriminator 1\n Could you please run just copy site.exp from one of the testsuite/gcc* directories to a new directory and run % runtest --tool gcc dwarf2.exp=discriminator.c there? Maybe this gives a clue. Thanks. Rainer -- - Rainer Orth, Center for Biotechnology, Bielefeld University
Re: [Patch, Fortran] Better error messages for type/rank checks
Wouldn't it work to use the TIOCGWINSZ ioctl only if isatty() reports that we're outputting to a terminal? Good point. Updated patch attached, which imposes no limit if we're not outputting to a terminal (as suggested by Mikael). Ok for trunk, or am I missing anything else? (Testing welcome ...) Cheers, Janus terminal_width_v2.diff Description: Binary data
Re: [x86, PATCH 2/2] Enabling of the new Intel microarchitecture Silvermont
Like this?
On Fri, May 31, 2013 at 3:45 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Fri, May 31, 2013 at 1:38 PM, Igor Zamyatin izamya...@gmail.com wrote:
We do want to use the same register for float_extend.
OK then. Please add a comment for this fact and also, please put
single-line preparation statements inside double-quotes instead of
curved braces.
Uros.
On Thu, May 30, 2013 at 9:22 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Thu, May 30, 2013 at 4:25 PM, Yuri Rumyantsev ysrum...@gmail.com wrote:
Hi All
Second patch enables several Silvermont uarch features which improve
performance of the new processor (based on experiments on real SLM
hardware):
1. If using a 2-source or 3-source LEA for non-destructive destination
purposes, or due to wanting ability to use SCALE, the use of LEA is
preferable.
2. Transformation of FP conversion for memory operands into conversion
from register.
3. Couple of improvements for post-reload scheduling:
- increase latency of integer loads and load/store with exact
dependence;
- simple re-ordering of the top of ready list - if 2 instructions
at the top of the list have the same priority we consider instruction
which producer(s) were scheduled earlier as the best candidate.
Bootstrapped and tested on x86_64-unknown-linux-gnu, ok for trunk?
2013-05-30 Yuri Rumyantsev yuri.s.rumyant...@intel.com
Igor Zamyatin igor.zamya...@intel.com
Silvermont (SLM) architecture performance tuning.
* config/i386/i386.h (enum ix86_tune_indices): Add
X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS.
(TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS): New define.
* config/i386/i386.c (initial_ix86_tune_features)
X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS: Initialize.
(ix86_lea_outperforms): Handle Silvermont tuning.
(ix86_avoid_lea_for_add): Add new argument to ix86_lea_outperforms
call.
(ix86_use_lea_for_mov): Likewise.
(ix86_avoid_lea_for_addr): Likewise.
(ix86_lea_for_add_ok): Likewise.
(exact_dependency_1): New function.
(exact_store_load_dependency): Likewise.
(ix86_adjust_cost): Handle Silvermont tuning.
(do_reoder_for_imul): Likewise.
(swap_top_of_ready_list): New function.
(ix86_sched_reorder): Changed to handle Silvermont tuning.
* config/i386/i386.md (peepholes that split memory operand in fp
converts): New
@@ -24625,9 +24730,9 @@ ix86_sched_reorder(FILE *dump, int
sched_verbose, rtx *ready, int *pn_ready,
- con = DEP_CON (dep);
- if (!NONDEBUG_INSN_P (con))
-continue;
+ con = DEP_CON (dep);
+ if (!NONDEBUG_INSN_P (con))
+continue;
There are some unnecessary whitespace changes (tabs-spaces) in a
couple of places throughout the patch, such as in the above lines.
+(define_peephole2
+ [(set (match_operand:DF 0 register_operand)
+(float_extend:DF
+ (match_operand:SF 1 memory_operand)))]
+ TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS
+optimize_insn_for_speed_p ()
+SSE_REG_P (operands[0])
+ [(set (match_dup 2) (match_dup 1))
+ (set (match_dup 0) (float_extend:DF (match_dup 2)))]
+{
+ operands[2] = gen_rtx_REG (SFmode, REGNO (operands[0]));
+})
You should use
(match_scratch:SF 2 x)
at the top of the peephole2 pattern, and you will get a free scratch
register (assuming that it is not necessary to use the same register
for input and output operand of the float_extend insn).
Otherwise, the patch looks OK to me.
Uros.
gcc_slm_patch2_3_review.patch
Description: Binary data
Re: [x86, PATCH 2/2] Enabling of the new Intel microarchitecture Silvermont
On Fri, May 31, 2013 at 2:56 PM, Igor Zamyatin izamya...@gmail.com wrote:
Like this?
Yes, but put the comment above the peephole2 pattern.
The patch is OK for mainline with the above change.
Thanks,
Uros.
On Fri, May 31, 2013 at 3:45 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Fri, May 31, 2013 at 1:38 PM, Igor Zamyatin izamya...@gmail.com wrote:
We do want to use the same register for float_extend.
OK then. Please add a comment for this fact and also, please put
single-line preparation statements inside double-quotes instead of
curved braces.
Uros.
On Thu, May 30, 2013 at 9:22 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Thu, May 30, 2013 at 4:25 PM, Yuri Rumyantsev ysrum...@gmail.com
wrote:
Hi All
Second patch enables several Silvermont uarch features which improve
performance of the new processor (based on experiments on real SLM
hardware):
1. If using a 2-source or 3-source LEA for non-destructive destination
purposes, or due to wanting ability to use SCALE, the use of LEA is
preferable.
2. Transformation of FP conversion for memory operands into conversion
from register.
3. Couple of improvements for post-reload scheduling:
- increase latency of integer loads and load/store with exact
dependence;
- simple re-ordering of the top of ready list - if 2 instructions
at the top of the list have the same priority we consider instruction
which producer(s) were scheduled earlier as the best candidate.
Bootstrapped and tested on x86_64-unknown-linux-gnu, ok for trunk?
2013-05-30 Yuri Rumyantsev yuri.s.rumyant...@intel.com
Igor Zamyatin igor.zamya...@intel.com
Silvermont (SLM) architecture performance tuning.
* config/i386/i386.h (enum ix86_tune_indices): Add
X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS.
(TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS): New define.
* config/i386/i386.c (initial_ix86_tune_features)
X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS: Initialize.
(ix86_lea_outperforms): Handle Silvermont tuning.
(ix86_avoid_lea_for_add): Add new argument to ix86_lea_outperforms
call.
(ix86_use_lea_for_mov): Likewise.
(ix86_avoid_lea_for_addr): Likewise.
(ix86_lea_for_add_ok): Likewise.
(exact_dependency_1): New function.
(exact_store_load_dependency): Likewise.
(ix86_adjust_cost): Handle Silvermont tuning.
(do_reoder_for_imul): Likewise.
(swap_top_of_ready_list): New function.
(ix86_sched_reorder): Changed to handle Silvermont tuning.
* config/i386/i386.md (peepholes that split memory operand in fp
converts): New
@@ -24625,9 +24730,9 @@ ix86_sched_reorder(FILE *dump, int
sched_verbose, rtx *ready, int *pn_ready,
- con = DEP_CON (dep);
- if (!NONDEBUG_INSN_P (con))
-continue;
+ con = DEP_CON (dep);
+ if (!NONDEBUG_INSN_P (con))
+continue;
There are some unnecessary whitespace changes (tabs-spaces) in a
couple of places throughout the patch, such as in the above lines.
+(define_peephole2
+ [(set (match_operand:DF 0 register_operand)
+(float_extend:DF
+ (match_operand:SF 1 memory_operand)))]
+ TARGET_SPLIT_MEM_OPND_FOR_FP_CONVERTS
+optimize_insn_for_speed_p ()
+SSE_REG_P (operands[0])
+ [(set (match_dup 2) (match_dup 1))
+ (set (match_dup 0) (float_extend:DF (match_dup 2)))]
+{
+ operands[2] = gen_rtx_REG (SFmode, REGNO (operands[0]));
+})
You should use
(match_scratch:SF 2 x)
at the top of the peephole2 pattern, and you will get a free scratch
register (assuming that it is not necessary to use the same register
for input and output operand of the float_extend insn).
Otherwise, the patch looks OK to me.
Uros.
Re: [x86, PATCH 1/2] Enabling of the new Intel microarchitecture Silvermont
Zamyatin, Igor wrote: Several weeks ago Intel announced new microarchitecture named Silvermont (see for example http://newsroom.intel.com/community/intel_newsroom/blog/2013/05/06/intel-launches-low-power-high-performance-silvermont-microarchitecture ). This patch is the first and it enables Silvermont architecture in the GCC compiler (second patch will add some performance related features). * config/i386/i386.md (cpu): Add new value slm. I think you should document the newly supported value in gcc/doc/invoke.texi - and probably also mention it in the GCC 4.9's release notes http://gcc.gnu.org/gcc-4.9/changes.html under New Targets and Target Specific Improvements Tobias
Re: C++ PATCH for c++/52377 (NSDMI and unions)
On 05/31/2013 07:13 AM, Rainer Orth wrote: Is this really intended to be a run test? Oops, no, thanks. Also, both testcases are missing from gcc/testsuite/ChangeLog. I prefer not to mess with logging testcase changes. http://gcc.gnu.org/codingconventions.html#ChangeLogs Jason
Re: [ada, build] host/target configuration
On May 30, 2013, at 23:08 , Olivier Hainque hain...@adacore.com wrote: The idea of the target-target_alias change in gcc-interface/Makefile.in for Ada was to let us still distinguish for the purpose of the Ada RTSes in particular. This happens to be significant in a limited amount of cases only. A very limited number of cases actually. * e500v? canonicalized as powerpc (in our tree), which is a non-issue because the pairs are all identical. * leon vs sparc-leon maybe, I'm not so sure but this should be straightforward to adjust in any case * vxworksmils canonicalized into vxworksae A safe and simple approach to this issue would be to - revert to our former computations, based on target and not target_alias. Revert the subsequent adjustments as well. - Remove the pointless and confusing references to e500, adjusting comments to indicate that e500 is canonicalized into powerpc - Use target_alias explicitly just at the points where we know that we need to depart from the canonical name The proposed idea of using the configure computed names instead of doing our own computations is interesting. It's sort of orthogonal and seems potentially disruptive as well, so I'd defer to a later moment.
[PATCH] pr57457
Hello Everyone,
This patch will fix a bug reported in PR57457. One of the array
notation function was not checking for NULL_TREE before accessing its fields.
This patch should fix that issue. A test case is also added.
Is this OK for trunk?
Here are the ChangeLog Entries:
gcc/c/ChangeLog
2013-05-31 Balaji V. Iyer balaji.v.i...@intel.com
* c-array-notation.c (is_cilkplus_reduce_builtin): Added a check for
NULL_TREE parameter input.
gcc/testsuite/ChangeLog
2013-05-31 Balaji V. Iyer balaji.v.i...@intel.com
PR c/57457
* c-c++-common/cilk-plus/AN/pr57457.c: New testcase.
Thanks,
Balaji V. Iyer.
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 828d7c8..e376276 100755
Binary files a/gcc/c/ChangeLog and b/gcc/c/ChangeLog differ
diff --git a/gcc/c/c-array-notation.c b/gcc/c/c-array-notation.c
index 681e111..8d43fd9 100755
--- a/gcc/c/c-array-notation.c
+++ b/gcc/c/c-array-notation.c
@@ -140,6 +140,8 @@ length_mismatch_in_expr_p (location_t loc, tree **list,
size_t x, size_t y)
enum built_in_function
is_cilkplus_reduce_builtin (tree fndecl)
{
+ if (!fndecl)
+return BUILT_IN_NONE;
if (TREE_CODE (fndecl) == ADDR_EXPR)
fndecl = TREE_OPERAND (fndecl, 0);
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 20bf8b5..e1339db 100755
Binary files a/gcc/testsuite/ChangeLog and b/gcc/testsuite/ChangeLog differ
diff --git a/gcc/testsuite/c-c++-common/cilk-plus/AN/pr57457.c
b/gcc/testsuite/c-c++-common/cilk-plus/AN/pr57457.c
new file mode 100644
index 000..68a1fd8
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/cilk-plus/AN/pr57457.c
@@ -0,0 +1,39 @@
+/* { dg-do compile } */
+/* { dg-options -fcilkplus } */
+
+/* This test has no array notation components in it and thus should compile
+ fine without crashing. */
+
+typedef unsigned int size_t;
+typedef int (*__compar_fn_t) (const void *, const void *);
+extern void *bsearch (const void *__key, const void *__base,
+ size_t __nmemb, size_t __size, __compar_fn_t
+ __compar)
+ __attribute__ ((__nonnull__ (1, 2, 5))) ;
+extern __inline __attribute__ ((__gnu_inline__)) void *
+bsearch (const void *__key, const void *__base, size_t __nmemb, size_t
+__size,
+__compar_fn_t __compar)
+{
+ size_t __l, __u, __idx;
+ const void *__p;
+ int __comparison;
+ __l = 0;
+ __u = __nmemb;
+ while (__l __u)
+{
+ __idx = (__l + __u) / 2;
+ __p = (void *) (((const char *) __base) +
+ (__idx * __size));
+ __comparison = (*__compar) (__key,
+ __p);
+ if (__comparison 0)
+ __u = __idx;
+ else if (__comparison 0)
+ __l = __idx + 1;
+ else
+ return (void *)
+ __p;
+}
+ return ((void *)0);
+}
Re: [Patch, Fortran] Better error messages for type/rank checks
Am 31.05.2013 14:28, schrieb Janus Weil: Wouldn't it work to use the TIOCGWINSZ ioctl only if isatty() reports that we're outputting to a terminal? Good point. Updated patch attached, which imposes no limit if we're not outputting to a terminal (as suggested by Mikael). Ok for trunk, or am I missing anything else? (Testing welcome ...) needs #include unistd.h for isatty(), perhaps. Otherwise looks sane at first glance. Cheers, Manfred Cheers, Janus
RE: [x86, PATCH 1/2] Enabling of the new Intel microarchitecture Silvermont
Yes, I was planning to do it after second patch is in the trunk. Thanks for pointing out exact places! Igor -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On Behalf Of Tobias Burnus Sent: Friday, May 31, 2013 5:24 PM To: Zamyatin, Igor Cc: GCC Patches (gcc-patches@gcc.gnu.org); ubiz...@gmail.com; ysrum...@gmail.com; Melik-adamyan, Areg Subject: Re: [x86, PATCH 1/2] Enabling of the new Intel microarchitecture Silvermont Zamyatin, Igor wrote: Several weeks ago Intel announced new microarchitecture named Silvermont (see for example http://newsroom.intel.com/community/intel_newsroom/blog/2013/05/06/intel-launches-low-power-high-performance-silvermont-microarchitecture ). This patch is the first and it enables Silvermont architecture in the GCC compiler (second patch will add some performance related features). * config/i386/i386.md (cpu): Add new value slm. I think you should document the newly supported value in gcc/doc/invoke.texi - and probably also mention it in the GCC 4.9's release notes http://gcc.gnu.org/gcc-4.9/changes.html under New Targets and Target Specific Improvements Tobias
Implement N3642 - User-defined Literals for Standard Library Types
Greetings,
This patch implements N3642 - User-defined literals for
std::chrono::duration and std::basic_string
and N3660 - User-defined literals for std::complex.
User-defined literals were separated into two papers because of some
controversy about noexcept for complex literals.
If desired, I could split the patch into two bits for the two
proposals. OTOH, I'm pretty sure complex literals will make it in.
The patch includes a utility for compile-time parsing of integers which
is a modified version of that suggested in N3642.
Support for binary literals of the form 0b01010 and support for a digit
separator are added relative to that paper.
The digit parsing is used in the chrono literals.
One bit: I would like someone to look over my treatment of namespace
versioning and tell me if that's OK
and/or whether I need to mess with gnu-versioned-namespace.ver.
Otherwise, this builds and tests clean on x86_64-linux.
Thanks,
Ed
2013-05-30 Ed Smith-Rowland 3dw...@verizon.net
Implement N3642 - User-defined Literals for Standard Library Types
Implement N3660 - User-defined Literals for std::complex,
part 2 of UDL for Standard Library Types
* include/bits/parse_numbers.h: New.
* include/std/chrono: Add duration literal operators.
* include/bits/basic_string.h: Add string literal operators.
* include/std/complex: Add complex literal operators.
* include/Makefile.in: Add parse_numbers.h.
* include/Makefile.am: Ditto.
* testsuite/20_util/duration/literals/values.cc: New.
* testsuite/20_util/duration/literals/types.cc: New.
* testsuite/20_util/duration/requirements/typedefs_neg1.cc: Adjust.
* testsuite/20_util/duration/requirements/typedefs_neg2.cc: Adjust.
* testsuite/20_util/duration/requirements/typedefs_neg3.cc: Adjust.
* testsuite/21_strings/basic_string/literals/values.cc: New.
* testsuite/21_strings/basic_string/literals/types.cc: New.
* testsuite/26_numerics/complex/literals/types.cc: New.
* testsuite/26_numerics/complex/literals/values.cc: New.
* config/abi/pre/gnu.ver: Add literal operator symbols.
Index: include/bits/parse_numbers.h
===
--- include/bits/parse_numbers.h(revision 0)
+++ include/bits/parse_numbers.h(working copy)
@@ -0,0 +1,417 @@
+// Components for compile-time parsing of numbers -*- C++ -*-
+
+// Copyright (C) 2013 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// http://www.gnu.org/licenses/.
+
+/** @file bits/parse_numbers.h
+ * This is an internal header file, included by other library headers.
+ * Do not attempt to use it directly. @headername{chrono}
+ */
+
+#ifndef _PARSE_NUMBERS_H
+#define _PARSE_NUMBERS_H 1
+
+#pragma GCC system_header
+
+// From n3642.pdf except I added binary literals and digit separator '`'.
+
+#if __cplusplus 201103L
+
+namespace std _GLIBCXX_VISIBILITY(default)
+{
+_GLIBCXX_BEGIN_NAMESPACE_VERSION
+
+namespace __parse_int {
+
+ templateunsigned _Base, char _Dig
+struct _Digit;
+
+ templateunsigned _Base
+struct _Digit_Base, '0'
+{
+ static constexpr bool valid{true};
+ static constexpr unsigned value{0};
+};
+
+ templateunsigned _Base
+struct _Digit_Base, '1'
+{
+ static constexpr bool valid{true};
+ static constexpr unsigned value{1};
+};
+
+ templateunsigned _Base
+struct _Digit_Base, '2'
+{
+ static_assert(_Base 2, invalid digit);
+ static constexpr bool valid{true};
+ static constexpr unsigned value{2};
+};
+
+ templateunsigned _Base
+struct _Digit_Base, '3'
+{
+ static_assert(_Base 3, invalid digit);
+ static constexpr bool valid{true};
+ static constexpr unsigned value{3};
+};
+
+ templateunsigned _Base
+struct _Digit_Base, '4'
+{
+ static_assert(_Base 4, invalid digit);
+ static constexpr bool valid{true};
+ static constexpr unsigned
Re: Implement N3642 - User-defined Literals for Standard Library Types
2013/5/31 Ed Smith-Rowland 3dw...@verizon.net: Greetings, This patch implements N3642 - User-defined literals for std::chrono::duration and std::basic_string and N3660 - User-defined literals for std::complex. N3660 was rejected during the Bristol meeting, the main reason being the ugliness of the complex-float literal and giving it some time to find a possible sore language solution. Is there still the idea to add this now? - Daniel
[Patch libsanitizer] merge rev 182922 (helps running under qemu)
Hi, I'd like to backport libsanitizer commit #182922: Index: sanitizer_common/sanitizer_linux.cc === --- sanitizer_common/sanitizer_linux.cc(revision 199453) +++ sanitizer_common/sanitizer_linux.cc(working copy) @@ -410,7 +410,9 @@ bool MemoryMappingLayout::Next(uptr *sta CHECK_EQ(*current_++, ' '); while (IsDecimal(*current_)) current_++; - CHECK_EQ(*current_++, ' '); + // Qemu may lack the trailing space. + // http://code.google.com/p/address-sanitizer/issues/detail?id=160 + // CHECK_EQ(*current_++, ' '); // Skip spaces. while (current_ next_line *current_ == ' ') current_++; It helps handling qemu's output for /proc/self/maps until the corresponding patch in qemu is available to developers (it has been accepted, but not part of a release yet). OK to commit in trunk? Thanks, Christophe
Re: [Patch libsanitizer] merge rev 182922 (helps running under qemu)
On Fri, May 31, 2013 at 04:42:21PM +0200, Christophe Lyon wrote: Hi, I'd like to backport libsanitizer commit #182922: Index: sanitizer_common/sanitizer_linux.cc === --- sanitizer_common/sanitizer_linux.cc(revision 199453) +++ sanitizer_common/sanitizer_linux.cc(working copy) @@ -410,7 +410,9 @@ bool MemoryMappingLayout::Next(uptr *sta CHECK_EQ(*current_++, ' '); while (IsDecimal(*current_)) current_++; - CHECK_EQ(*current_++, ' '); + // Qemu may lack the trailing space. + // http://code.google.com/p/address-sanitizer/issues/detail?id=160 + // CHECK_EQ(*current_++, ' '); // Skip spaces. while (current_ next_line *current_ == ' ') current_++; It helps handling qemu's output for /proc/self/maps until the corresponding patch in qemu is available to developers (it has been accepted, but not part of a release yet). OK to commit in trunk? Christophe, I believe that changes from upstream are generally brought into FSF gcc with a complete merge of libsanitizer rather than just specific patches. We do seem to be long past due for remerge with upstream though. Jack Thanks, Christophe
Re: [Patch libsanitizer] merge rev 182922 (helps running under qemu)
On Fri, May 31, 2013 at 6:49 PM, Jack Howarth howa...@bromo.med.uc.edu wrote: On Fri, May 31, 2013 at 04:42:21PM +0200, Christophe Lyon wrote: Hi, I'd like to backport libsanitizer commit #182922: Index: sanitizer_common/sanitizer_linux.cc === --- sanitizer_common/sanitizer_linux.cc(revision 199453) +++ sanitizer_common/sanitizer_linux.cc(working copy) @@ -410,7 +410,9 @@ bool MemoryMappingLayout::Next(uptr *sta CHECK_EQ(*current_++, ' '); while (IsDecimal(*current_)) current_++; - CHECK_EQ(*current_++, ' '); + // Qemu may lack the trailing space. + // http://code.google.com/p/address-sanitizer/issues/detail?id=160 + // CHECK_EQ(*current_++, ' '); // Skip spaces. while (current_ next_line *current_ == ' ') current_++; It helps handling qemu's output for /proc/self/maps until the corresponding patch in qemu is available to developers (it has been accepted, but not part of a release yet). OK to commit in trunk? Christophe, I believe that changes from upstream are generally brought into FSF gcc with a complete merge of libsanitizer rather than just specific patches. We do seem to be long past due for remerge with upstream though. Jack That's correct, however I specifically asked to commit this patch directly to gcc. The same patch is already in upstream repo. Unless anyone objects, this patch is OK to commit. I am not planing any new merge from upstream to GCC in the nearest couple of months, unless someone has a good reason to do that. Most likely, the next merge will go when we have LeakSanitizer (leak detector) in stable shape. --kcc Thanks, Christophe
Re: PR57073 - Optimize __builtin_powif (-1.0, k) to k 1 ? -1.0 : 1.0
Am 31.05.2013 10:24, schrieb Richard Biener:
On Thu, May 30, 2013 at 10:54 PM, Jeff Law l...@redhat.com wrote:
Don't worry about it. The patch is good as-is.
Why sink the !host_integerp check? Please keep it where it is now.
Answer: Because it doesn't work. And if I had a cup of coffee and didn't
mess up my regtesting (by excluding the newly added test case), I had
also seen that.
The very old code had (assume: powi(x,n)):
if (n is not a constant)
break;
expand powi to n multiplications.
The original patch changed it to:
if (n is a not constant and x == -1)
result = n 1 ? -1.0 : 1.0
else
{
if (n is not a constant)
break;
expand powi to n multiplications.
}
Thus, if one moves up the condition
if (n is not a constant)
break;
the newly added code becomes unreachable.
However, I think the code is more readable if one simply removes the
!host_integerp (arg1,0) from the x==1 case. Due to fold_builtin_powi
having x==-1 and n == const should not happen - and if, the n 1 ?
-1.0 : 1.0 is also not worse than an expanded multiplication (if n is
large). [Alternatively, one can also keep (re-add) the
!host_integerp (arg1,0).]
OK? (After successful bootstrap and regtesting.)
Tobias
diff --git a/gcc/tree-ssa-math-opts.c b/gcc/tree-ssa-math-opts.c
index b4de411..e9c32b3 100644
--- a/gcc/tree-ssa-math-opts.c
+++ b/gcc/tree-ssa-math-opts.c
@@ -1447,9 +1447,6 @@ execute_cse_sincos (void)
arg1 = gimple_call_arg (stmt, 1);
loc = gimple_location (stmt);
- if (!host_integerp (arg1, 0))
- break;
-
if (real_minus_onep (arg0))
{
tree t0, t1, cond, one, minus_one;
@@ -1477,6 +1474,9 @@ execute_cse_sincos (void)
}
else
{
+ if (!host_integerp (arg1, 0))
+ break;
+
n = TREE_INT_CST_LOW (arg1);
result = gimple_expand_builtin_powi (gsi, loc, arg0, n);
}
Re: [rs6000] Improve FP comparisons with -fno-trapping-math
On Fri, May 31, 2013 at 7:04 AM, Eric Botcazou ebotca...@adacore.com wrote: I'm okay with most of the change, but I have a question: What happened to the unsigned comparisons and LTGT? Unsigned comparisons aren't used for FP (the whole block of code is dominated by a FLOAT_MODE_P (mode) test). LTGT and UNEQ were wrong (but unused) since they were implemented as NE and EQ respectively and therefore didn't return the correct result for NaNs. In fact, all the unordered operators were wrong (but unused) since they were implemented as their ordered counterpart. I'm not going to insist, but this probably deserves an e500-specific testcase that it's generating the correct results and not calling libgcc for unordered comparisons. Note that, for originally unordered comparisons, there has always been a call to libgcc as rs6000_cbranch_operator is ordered_comparison_operator on e500 (hence the wrong implementation in rs6000_generate_compare was unused). But, indeed, we should verify that we don't generate them when the comparisons are originally ordered, with and without -ftrapping-math. I have attached 4 testcases: - e500-ord-1.c: ordered/signaling predicates, -ftrapping-math - e500-ord-2.c: ordered/signaling predicates, -fno-trapping-math - e500-unord-1.c: C99 unordered/quiet predicates, -ftrapping-math - e500-unord-2.c: C99 unordered/quiet predicates, -fno-trapping-math With the unpatched compiler: - e500-ord-1.c: no calls to __unordsf2 (optimal) - e500-ord-2.c: calls to __unordsf2 (the very issue I'm fixing) - e500-unord-1.c: calls to __unordsf2 (optimal) - e500-unord-2.c: calls to __unordsf2 (useless since -fno-trapping-math) With the patched compiler: - e500-ord-1.c: no calls to __unordsf2 (optimal) - e500-ord-2.c: no calls to __unordsf2 (optimal) - e500-unord-1.c: calls to __unordsf2 (optimal) - e500-unord-2.c: no calls to __unordsf2 (optimal) 2013-05-31 Eric Botcazou ebotca...@adacore.com * gcc.target/powerpc/e500-ord-1.c: New test. * gcc.target/powerpc/e500-ord-2.c: Likewise. * gcc.target/powerpc/e500-unord-1.c: Likewise. * gcc.target/powerpc/e500-unord-2.c: Likewise. Great! Thanks for the clarification. Just to be clear, the original patch and the new testcases LGTM. Thanks, David
Re: Implement N3642 - User-defined Literals for Standard Library Types
On 05/31/2013 10:41 AM, Daniel Krügler wrote:
2013/5/31 Ed Smith-Rowland 3dw...@verizon.net:
Greetings,
This patch implements N3642 - User-defined literals for
std::chrono::duration and std::basic_string
and N3660 - User-defined literals for std::complex.
N3660 was rejected during the Bristol meeting, the main reason being
the ugliness of the complex-float literal and giving it some time to
find a possible sore language solution. Is there still the idea to add
this now?
- Daniel
I would offer a modification of the lower-case rule for standard literal
operators (I know this is bikeshed but I think such things are important
and obviously prevent ideas from being adopted).
I would say:
1. Put the precision first in upper case. As a matter of style I
prefer 123456L to 123456l for normal literals anyway. Also, the
precision snuggles next to the number - then you modify it. That seems
logical to me. Also, if we involve decimal in this someday, those
literals *have* to be all caps (for the old literals). It seems using
lower case precision indicators for decimal would be inconsistent.
2. Use lower case for the other characters except...
3. If the name derives from a proper name, such as SI unit Farad use
capitals. This will make literal operators for units match SI and the
expectation of users most likely to use such literals.
For complex this gives us:
std::complexfloat
operator Fi(long double imag) noexcept;
std::complexfloat
operator Fi(unsigned long long imag) noexcept;
std::complexdouble
operator i(long double imag) noexcept;
std::complexdouble
operator i(unsigned long long imag) noexcept;
std::complexlong double
operator Li(long double imag) noexcept;
std::complexlong double
operator Li(unsigned long long imag) noexcept;
This avoids the i_f, and seems more logical to me.
For the issue at hand, I split the patch.
Ed
Index: include/bits/parse_numbers.h
===
--- include/bits/parse_numbers.h(revision 0)
+++ include/bits/parse_numbers.h(working copy)
@@ -0,0 +1,417 @@
+// Components for compile-time parsing of numbers -*- C++ -*-
+
+// Copyright (C) 2013 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library. This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+
+// Under Section 7 of GPL version 3, you are granted additional
+// permissions described in the GCC Runtime Library Exception, version
+// 3.1, as published by the Free Software Foundation.
+
+// You should have received a copy of the GNU General Public License and
+// a copy of the GCC Runtime Library Exception along with this program;
+// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+// http://www.gnu.org/licenses/.
+
+/** @file bits/parse_numbers.h
+ * This is an internal header file, included by other library headers.
+ * Do not attempt to use it directly. @headername{chrono}
+ */
+
+#ifndef _PARSE_NUMBERS_H
+#define _PARSE_NUMBERS_H 1
+
+#pragma GCC system_header
+
+// From n3642.pdf except I added binary literals and digit separator '`'.
+
+#if __cplusplus 201103L
+
+namespace std _GLIBCXX_VISIBILITY(default)
+{
+_GLIBCXX_BEGIN_NAMESPACE_VERSION
+
+namespace __parse_int {
+
+ templateunsigned _Base, char _Dig
+struct _Digit;
+
+ templateunsigned _Base
+struct _Digit_Base, '0'
+{
+ static constexpr bool valid{true};
+ static constexpr unsigned value{0};
+};
+
+ templateunsigned _Base
+struct _Digit_Base, '1'
+{
+ static constexpr bool valid{true};
+ static constexpr unsigned value{1};
+};
+
+ templateunsigned _Base
+struct _Digit_Base, '2'
+{
+ static_assert(_Base 2, invalid digit);
+ static constexpr bool valid{true};
+ static constexpr unsigned value{2};
+};
+
+ templateunsigned _Base
+struct _Digit_Base, '3'
+{
+ static_assert(_Base 3, invalid digit);
+ static constexpr bool valid{true};
+ static constexpr unsigned value{3};
+};
+
+ templateunsigned _Base
+struct _Digit_Base, '4'
+{
+ static_assert(_Base 4, invalid digit);
+ static constexpr bool valid{true};
+ static constexpr unsigned value{4};
+};
+
+ templateunsigned _Base
+struct _Digit_Base, '5'
+{
+ static_assert(_Base 5, invalid digit);
+ static constexpr bool valid{true};
+ static constexpr unsigned value{5};
+};
+
+ templateunsigned _Base
+struct _Digit_Base, '6'
+{
+ static_assert(_Base
Re: [PATCH 1/2] handwritten part of patch
On Wed, 2013-05-29 at 10:06 +0200, Richard Biener wrote:
On Tue, May 28, 2013 at 8:04 PM, David Malcolm dmalc...@redhat.com wrote:
On Mon, 2013-05-27 at 15:38 +0200, Richard Biener wrote:
On Sat, May 25, 2013 at 3:02 PM, David Malcolm dmalc...@redhat.com wrote:
Eliminate all direct references to cfun from macros in
basic-block.h and introduce access methods to control_flow_graph
* basic-block.h (control_flow_graph::get_basic_block_by_idx): New
accessor methods.
(control_flow_graph::get_entry_block): New method.
(control_flow_graph::get_exit_block): New method.
(control_flow_graph::get_basic_block_info): New methods.
(control_flow_graph::get_n_basic_blocks): New methods.
(control_flow_graph::get_n_edges): New methods.
(control_flow_graph::get_last_basic_block): New methods.
(control_flow_graph::get_label_to_block_map): New methods.
(control_flow_graph::get_profile_status): New method.
(control_flow_graph::set_profile_status): New method.
(ENTRY_BLOCK_PTR): Eliminate this macro.
(EXIT_BLOCK_PTR): Likewise.
(basic_block_info): Likewise.
(n_basic_blocks): Likewise.
(n_edges): Likewise.
(last_basic_block): Likewise.
(label_to_block_map): Likewise.
(profile_status): Likewise.
(BASIC_BLOCK): Likewise.
(SET_BASIC_BLOCK): Likewise.
(FOR_EACH_BB_FN): Rewrite in terms of...
(FOR_EACH_BB_CFG): New macro
(FOR_EACH_BB): Eliminate this macro
(FOR_EACH_BB_REVERSE_FN): Rewrite in terms of...
(FOR_EACH_BB_REVERSE_FN_CFG): New macro
(FOR_EACH_BB_REVERSE): Eliminate this macro
(FOR_ALL_BB): Likewise.
(FOR_ALL_BB_CFG): New macro
I don't like the mix of _CFG / _FN. It's obvious we are talking about
the CFG of a function in 'FOR_EACH_BB' and friends.
The current status quo is a pair of macros:
#define FOO_FN(FN) ...do something on (FN)-cfg
#define FOO() FOO_FN(cfun)
My patch changed these to be:
#define FOO_CFG(CFG) ...do something on CFG
#define FOO_FN(FN) FOO_CFG((FN)-cfg)
and to get rid of the FOO() with its cfun usage.
So would your preference be for the FOO() to mean the cfg:
#define FOO(CFG) ...do something on cfg
#define FOO_FN(FN) FOO((FN)-cfg)
?
e.g.
#define FOR_EACH_BB(BB, CFG) \
FOR_BB_BETWEEN (BB, (CFG)-x_entry_block_ptr-next_bb,
(CFG)-x_exit_block_ptr, next_bb)
#define FOR_EACH_BB_FN(BB, FN) FOR_EACH_BB_CFG (BB, (FN)-cfg)
I suppose the CFG vs. FN distinction is because there is a
control-flow-graph sub-structure in a function (OTOH there is at most
a single CFG in a FN, so specifying FN is unambiguous).
Yes, the un-suffixed variant (FOO) should be the one with the natural
interface (taking a CFG). People already know about the _FN variant
and if you change all existing uses of FOO (without cfg/fn argument)
then that would be the best change.
Ideally FN or CFG would be handled transparently via overloading
for example (or giving both struct function and struct cfg the same
set of member functions), so
inline basic_block entry_block_ptr (struct function *fn)
{
return fn-cfg-x_entry_block_ptr;
}
inline basic_block entry_block_ptr (struct cfg *)
{
return cfg-x_entry_block_ptr;
}
#define FOR_EACH_BB (BB, CONTEXT) FOR_BB_BETWEEN (BB, entry_block_ptr
(CONTEXT)-next_bb, exit_block_ptr (CONTEXT), next_bb)
and only retain a single macro/function form for context kinds that can
be unambiguously interchanged.
Or do people think that would be too confusing? (I suppose defining an
automatic conversion from struct function * to struct cfg * is also
techincally
possible, but that only works with the non-member-function way and would
avoid the overloading).
That said, I have no strong preference to remove the FOO_FN variants together
with this patch. Using FOO with cfg arguments and FOO_FN with function
arguments is fine for me (eventually as intermediate step).
---
diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index eed320c..3949417 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -276,6 +276,57 @@ enum profile_status_d
fields of this struct are interpreted as the defines for backward
source compatibility following the definition of this struct. */
struct GTY(()) control_flow_graph {
+public:
+ basic_block get_basic_block_by_idx (int idx) const
+ {
+return (*x_basic_block_info)[idx];
+ }
get_basic_block_by_idx is rather long, any reason to not shorten
it to get_block () or get_bb?
Will do. get_bb () then
+ void set_basic_block_by_idx (int idx, basic_block bb)
set_block () or set_bb()
Will do.
+ {
+(*x_basic_block_info)[idx] = bb;
+ }
+
+
Re: [PATCH, rs6000] power8 patches, patch #4, new power8 builtins
On Fri, May 31, 2013 at 11:10:54AM +0200, Segher Boessenkool wrote: Ok, I tracked down what the problem is. We never implemented the EQV, ORC, or NAND insns in the GPRs. When I added the power8 vector versions, the split wide types pass tried to do its thing in the GPRs, it creates a bad insn. I originally saw it in the atomic ops, because I was testing all of the combinations provided, but I can reproduce it just by using __int128_t. The boolcmode3_internal1 pattern uses non-canonical RTL for eqv: (xor (not x) y) instead of (not (xor x y)). You'll need to add a correct pattern, or wait for my patch series (which I'll start sending later today) to get in. (There are problems with the dot forms of xor, nand, nor, and eqv as well, but I don't think you will hit that?) I can probably wait for a bit if you are doing it shortly. For splitting 128-bit types, we won't need the dot form. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460, USA email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Re: [PATCH] rs6000: Group processor types
On Fri, May 31, 2013 at 3:34 AM, Segher Boessenkool seg...@kernel.crashing.org wrote: Long lines like this define_attr are hard to read, and patches to them are hard to read and apply. Bootstrapped and tested on powerpc64-linux --enable-languages=c,c++,fortran --disable-libsanitizer, -m64,-m32,-m32/-mpowerpc64, no regressions. Okay to apply? 2013-05-31 Segher Boessenkool seg...@kernel.crashing.org gcc/ * config/rs6000/rs6000-opts.h (enum processor_type): Reorder. * config/rs6000/rs6000.md: (cpu): Reorder. Split long line. Fix comment. Okay, but if you are going to split the lines and group the processors, I would place Motorola ppc7xx/ppc7xxx on a separate line. +(define_attr cpu + ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630, + ppc750,ppc7400,ppc7450, + ppc403,ppc405,ppc440,ppc476, + ppc8540,ppc8548,ppce300c2,ppce300c3,ppce500mc,ppce500mc64,ppce5500,ppce6500, + power4,power5,power6,power7,power8, + rs64a,mpccore,cell,ppca2,titan I don't have any particularly good grouping for the last 5, although rs64a and ppca2 are IBM while mpccore is Motorola. - David
Re: [PATCH] Fix incorrect discriminator assignment.
Rainer Orth r...@cebitec.uni-bielefeld.de writes: Indeed, and I see -ansi -pedantic-errors -gdwarf-2 -O0 used for the test on both x86_64-unknown-linux-gnu and i386-pc-solaris2.10 (if I augment the target clause). DEFAULT_CFLAGS is set by many *.exp files. dwarf2.exp will not overwrite an existing definition, so using anthing different from -ansi -pedantic-errors will not work. Andreas. -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5 And now for something completely different.
[PATCH, AArch64] -mcmodel=tiny -fPIC use tiny absolute for non binds local.
This change allows -mcmodel=tiny -fPIC to use tiny addressing instead of small for none GOT accesses. Regressed for aarch64-none-elf with -mcmodel=tiny and -mcmodel=tiny -fPIC Applied. /Marcus 2013-05-31 Marcus Shawcroft marcus.shawcr...@arm.com * config/aarch64/aarch64.c (aarch64_classify_symbol): Use SYMBOL_TINY_ABSOLUTE for AARCH64_CMODEL_TINY_PIC.diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index a9e754c..7d975fd 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -5073,6 +5073,10 @@ aarch64_classify_symbol (rtx x, return SYMBOL_SMALL_ABSOLUTE; case AARCH64_CMODEL_TINY_PIC: + if (!aarch64_symbol_binds_local_p (x)) + return SYMBOL_SMALL_GOT; + return SYMBOL_TINY_ABSOLUTE; + case AARCH64_CMODEL_SMALL_PIC: if (!aarch64_symbol_binds_local_p (x)) return SYMBOL_SMALL_GOT;
[PATCH, AArch64] Remove excessive braces..
Remove un-necessary braces. Applied.
/Marcus
2013-05-31 Marcus Shawcroft marcus.shawcr...@arm.com
* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
Remove un-necessary braces.diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 9c77888..f554550 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -532,9 +532,7 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm,
{
rtx tmp_reg = dest;
if (can_create_pseudo_p ())
- {
- tmp_reg = gen_reg_rtx (Pmode);
- }
+ tmp_reg = gen_reg_rtx (Pmode);
emit_move_insn (tmp_reg, gen_rtx_HIGH (Pmode, imm));
emit_insn (gen_ldr_got_small (dest, tmp_reg, imm));
return;
[PATCH] Reduce -fopt-info verbosity
This patch changes the -fopt-info default to optimized instead of all,
since the latter is extremely verbose. This reduced the -fopt-info output by
over 75% in at least one case, since the vectorizer has many messages under
MSG_NOTE (and that should grow as more passes are converted to the new dump
infrastructure). The default now emits high-level optimization success info
(currently for unrolling, inlining and vectorization).
Also changed which vectorization summary messages are emitted under
-fopt-info(=optimized), to be more consistent with the format of the
optimization summary messages emitted by the unroller and inliner,
and fixed the loop vectorization summary message to use dump_printf_loc
instead of manually emitting the location info.
Bootstrapped and tested on x86-64-unknown-linux-gnu. Ok for trunk?
2013-05-31 Teresa Johnson tejohn...@google.com
* dumpfile.c (opt_info_switch_p): Change -fopt-info
default to -fopt-info=optimized instead of all.
* doc/invoke.texi: Ditto.
* tree-vectorizer.c (vectorize_loops): Emit loop vectorization
success under MSG_ALL, and use dump_printf_loc.
(execute_vect_slp): Emit BB vectorization success under
MSG_OPTIMIZED_LOCATIONS.
* tree-vect-slp.c (vect_make_slp_decision): Ditto.
(vect_slp_transform_bb): Change MSG_OPTIMIZED_LOCATIONS
to MSG_NOTE.
* tree-vect-loop.c (vect_transform_loop): Ditto.
Index: tree-vect-loop.c
===
--- tree-vect-loop.c(revision 199423)
+++ tree-vect-loop.c(working copy)
@@ -5801,7 +5801,7 @@ vect_transform_loop (loop_vec_info loop_vinfo)
if (dump_enabled_p ())
{
- dump_printf_loc (MSG_OPTIMIZED_LOCATIONS, vect_location,
+ dump_printf_loc (MSG_NOTE, vect_location,
LOOP VECTORIZED\n);
if (loop-inner)
dump_printf_loc (MSG_NOTE, vect_location,
Index: dumpfile.c
===
--- dumpfile.c (revision 199423)
+++ dumpfile.c (working copy)
@@ -866,7 +866,7 @@ opt_info_switch_p (const char *arg)
file_seen = xstrdup (filename);
if (!flags)
-flags = MSG_ALL;
+flags = MSG_OPTIMIZED_LOCATIONS;
if (!optgroup_flags)
optgroup_flags = OPTGROUP_ALL;
Index: tree-vectorizer.c
===
--- tree-vectorizer.c (revision 199423)
+++ tree-vectorizer.c (working copy)
@@ -118,8 +118,7 @@ vectorize_loops (void)
if (LOCATION_LOCUS (vect_location) != UNKNOWN_LOC
dump_enabled_p ())
- dump_printf (MSG_NOTE, \n\nVectorizing loop at %s:%d\n,
- LOC_FILE (vect_location), LOC_LINE (vect_location));
+ dump_printf_loc (MSG_ALL, vect_location, Vectorized loop\n);
vect_transform_loop (loop_vinfo);
num_vectorized_loops++;
}
@@ -179,7 +178,7 @@ execute_vect_slp (void)
{
vect_slp_transform_bb (bb);
if (dump_enabled_p ())
-dump_printf_loc (MSG_NOTE, vect_location,
+dump_printf_loc (MSG_OPTIMIZED_LOCATIONS, vect_location,
basic block vectorized using SLP\n);
}
}
Index: doc/invoke.texi
===
--- doc/invoke.texi (revision 199423)
+++ doc/invoke.texi (working copy)
@@ -6172,7 +6172,7 @@ Controls optimization dumps from various optimizat
@samp{-@var{options}} form is used, @var{options} is a list of
@samp{-} separated options to select the dump details and
optimizations. If @var{options} is not specified, it defaults to
-@option{all} for details and @option{optall} for optimization
+@option{optimized} for details and @option{optall} for optimization
groups. If the @var{filename} is not specified, it defaults to
@file{stderr}. Note that the output @var{filename} will be overwritten
in case of multiple translation units. If a combined output from
Index: tree-vect-slp.c
===
--- tree-vect-slp.c (revision 199423)
+++ tree-vect-slp.c (working copy)
@@ -1698,8 +1698,8 @@ vect_make_slp_decision (loop_vec_info loop_vinfo)
LOOP_VINFO_SLP_UNROLLING_FACTOR (loop_vinfo) = unrolling_factor;
if (decided_to_slp dump_enabled_p ())
-dump_printf_loc (MSG_NOTE, vect_location,
-Decided to SLP %d instances. Unrolling factor %d,
+dump_printf_loc (MSG_OPTIMIZED_LOCATIONS, vect_location,
+Vectorized %d SLP instances with unroll factor %d,
decided_to_slp, unrolling_factor);
return (decided_to_slp 0);
@@ -3181,7 +3181,7 @@ vect_slp_transform_bb (basic_block bb)
}
if (dump_enabled_p ())
-dump_printf_loc (MSG_OPTIMIZED_LOCATIONS, vect_location,
+dump_printf_loc (MSG_NOTE, vect_location,
BASIC BLOCK
Re: [PATCH] pr57457
On 05/31/2013 07:54 AM, Iyer, Balaji V wrote: Hello Everyone, This patch will fix a bug reported in PR57457. One of the array notation function was not checking for NULL_TREE before accessing its fields. This patch should fix that issue. A test case is also added. Is this OK for trunk? Here are the ChangeLog Entries: gcc/c/ChangeLog 2013-05-31 Balaji V. Iyer balaji.v.i...@intel.com * c-array-notation.c (is_cilkplus_reduce_builtin): Added a check for NULL_TREE parameter input. gcc/testsuite/ChangeLog 2013-05-31 Balaji V. Iyer balaji.v.i...@intel.com PR c/57457 * c-c++-common/cilk-plus/AN/pr57457.c: New testcase. So what you need to do is explain how you got into this function with a NULL fndecl and why that's OK. ie, it's easy to sprinkle tests for NULL pointers in the sources to change behaviour, but it's more important to look at why we're getting a NULL pointer at any particular point and decide if it's valid or not. You've probably already done the analysis, you just need to make sure to include it in the patch submission. That way the reviewer can easily see the change is correct and the analysis is preserved for future reference. Jeff
Re: [PING]RE: [patch] cilkplus: Array notation for C patch
On Thu, May 30, 2013 at 6:10 PM, Iyer, Balaji V balaji.v.i...@intel.com wrote: I think David is getting the correct output but just that dg-error is not catching it correctly. Is there an updated Tcl or runtest pre-req? - David
Re: [google gcc-4_8 commited] Adjust testsuite line numbers for r199468.
On Thu, May 30, 2013 at 10:00 PM, Paul Pluzhnikov ppluzhni...@google.com wrote: I've committed attached patch on google/gcc-4_8 branch to fix testsuite failures broken by r199468. Also applied to google/integration branch. -- Paul Pluzhnikov
Re: [Patch, Fortran] Enable FINALization/poly dealloc for allocatables
And another one: I just realized that the following dead code can be
removed (twice):
+ if (TREE_CODE (array) == ADDR_EXPR
+ POINTER_TYPE_P (TREE_TYPE (TREE_OPERAND (array, 0
+tmp = TREE_OPERAND (array, 0);
As tmp is not used. That's part of gfc_build_final_call,thus, I cannot
easily do it as follow up patch.
Build and regtested on x86-64-gnu-linux.
OK for the trunk?
Tobias
Tobias Burnus wrote:
Another re-diff.
Changes:
- Removed spurious bits of the now-committed patch,
http://gcc.gnu.org/ml/fortran/2013-05/msg00114.html
- Moved gfc_build_final_call up in the file and made it static.
- Removed it from trans.h. Instead, gfc_add_finalizer_call is now
nonstatic.
The reason for the latter change is that I want to use it for
INTENT(OUT) finalization for nonallocatables - and including the
change in this patch makes life easier for me.
OK for the trunk?
Tobias
Tobias Burnus wrote:
Small update of the patch. Changes:
* There was a problem finalizing var(:)%comp, which lead to an
ICE. Thanks to Dominique pointed out. See expr-rank = code added
in gfc_add_finalizer_call. I added the full test case from PR37336
(dg-do compile: finalize_14.f90) to test for this.
* I added a new test case, which ensures that the built-in scalarizer
and packer works correctly (it did), see finalize_13.f90.
[...]
Tobias Burnus wrote:
this patch enables finalization (and polymorphic deallocation) for
allocatables for: end of scope, DEALLOCATE and intent(out).
As a side effect, an allocatable is no longer deallocated at the end
of the main program. (Variables declared in the main program have
automatically SAVE attribute; before finalization, it made no
difference but with finalization it is detectable. And only
finalizing nonfinalizable allocatables seems to be too much effort
for too little gain.)
...
Build and regtested on x86-64-gnu-linux.
OK for the trunk?
Tobias
PS: Fortran requires additional cases where finalization has to
happen; those will be added in follow-up patches.
2013-05-31 Tobias Burnus bur...@net-b.de
PR fortran/37336
* trans.h (gfc_build_final_call): Remove prototype.
(gfc_add_finalizer_call): Add prototype.
* trans-array.c (gfc_trans_dealloc_allocated): Support finalization.
(structure_alloc_comps): Update caller.
(gfc_trans_deferred_array): Call finalizer.
* trans-array.h (gfc_trans_dealloc_allocated): Update prototype.
* trans-decl.c (gfc_trans_deferred_vars): Don't deallocate/finalize
variables of the main program.
* trans-expr.c (gfc_conv_procedure_call): Support finalization.
* trans-openmp.c (gfc_omp_clause_dtor,
gfc_trans_omp_array_reduction): Update calls.
* trans-stmt.c (gfc_trans_deallocate): Avoid double deallocation
of alloc components.
* trans.c (gfc_add_finalizer_call): New function.
(gfc_deallocate_with_status,
gfc_deallocate_scalar_with_status): Call it
(gfc_build_final_call): Fix handling of scalar coarrays,
move up in the file and make static.
2013-05-31 Tobias Burnus bur...@net-b.de
PR fortran/37336
* gfortran.dg/finalize_12.f90: New.
* gfortran.dg/alloc_comp_basics_1.f90: Add BLOCK for
end of scope finalization.
* gfortran.dg/alloc_comp_constructor_1.f90: Ditto.
* gfortran.dg/allocatable_scalar_9.f90: Ditto.
* gfortran.dg/auto_dealloc_2.f90: Ditto.
* gfortran.dg/class_19.f03: Ditto.
* gfortran.dg/coarray_lib_alloc_1.f90: Ditto.
* gfortran.dg/coarray_lib_alloc_2.f90: Ditto.
* gfortran.dg/extends_14.f03: Ditto.
* gfortran.dg/move_alloc_4.f90: Ditto.
* gfortran.dg/typebound_proc_27.f03: Ditto.
diff --git a/gcc/fortran/trans-array.c b/gcc/fortran/trans-array.c
index 8556278..89f26d7 100644
--- a/gcc/fortran/trans-array.c
+++ b/gcc/fortran/trans-array.c
@@ -7247,7 +7247,7 @@ gfc_conv_array_parameter (gfc_se * se, gfc_expr * expr, bool g77,
/* Generate code to deallocate an array, if it is allocated. */
tree
-gfc_trans_dealloc_allocated (tree descriptor, bool coarray)
+gfc_trans_dealloc_allocated (tree descriptor, bool coarray, gfc_expr *expr)
{
tree tmp;
tree var;
@@ -7263,7 +7263,7 @@ gfc_trans_dealloc_allocated (tree descriptor, bool coarray)
are already deallocated are ignored. */
tmp = gfc_deallocate_with_status (coarray ? descriptor : var, NULL_TREE,
NULL_TREE, NULL_TREE, NULL_TREE, true,
-NULL, coarray);
+expr, coarray);
gfc_add_expr_to_block (block, tmp);
/* Zero the data pointer. */
@@ -7552,7 +7552,7 @@ structure_alloc_comps (gfc_symbol * der_type, tree decl,
{
comp = fold_build3_loc (input_location, COMPONENT_REF, ctype,
decl, cdecl, NULL_TREE);
- tmp = gfc_trans_dealloc_allocated (comp, c-attr.codimension);
+ tmp = gfc_trans_dealloc_allocated (comp, c-attr.codimension, NULL);
gfc_add_expr_to_block (tmpblock, tmp);
}
else if (c-attr.allocatable)
@@ -7584,7 +7584,7 @@ structure_alloc_comps (gfc_symbol * der_type, tree decl,
if (GFC_DESCRIPTOR_TYPE_P (TREE_TYPE
[Patch, Fortran] Finalize nonallocatables with INTENT(out)
This patch adds finalization support for INTENT(out) for nonallocatable
dummy arguments.
Additionally, it addresses a missed optimization: The previous code
tried to deallocate allocatable components even if the dummy argument
was already an allocatable. That's a missed optimization as gfortran
deallocates allocatables in the caller.
OK for the trunk?
Note: This patch depends on
http://gcc.gnu.org/ml/fortran/2013-05/msg00134.html
Tobias
PS: There are many more places where finalization should happen, e.g.
intrinsic assignment (LHS + RHS func/constructor finalization),
end-of-scope of nonallocatables. And some issues related coarrays,
elemental+optional, etc.
However, I stop here for the moment as I run out of time - and writing
on-top patches of not reviewed/committed patches starts to become a chore.
2013-05-31 Tobias Burnus bur...@net-b.de
PR fortran/37336
* trans-decl.c (init_intent_out_dt): Call finalizer
when approriate.
2013-05-31 Tobias Burnus bur...@net-b.de
PR fortran/37336
* gfortran.dg/finalize_10.f90: New.
diff --git a/gcc/fortran/trans-decl.c b/gcc/fortran/trans-decl.c
index 100ec18..7521dee 100644
--- a/gcc/fortran/trans-decl.c
+++ b/gcc/fortran/trans-decl.c
@@ -3501,38 +3503,56 @@ init_intent_out_dt (gfc_symbol * proc_sym, gfc_wrapped_block * block)
!f-sym-attr.pointer
f-sym-ts.type == BT_DERIVED)
{
- if (f-sym-ts.u.derived-attr.alloc_comp !f-sym-value)
+ tmp = NULL_TREE;
+
+ /* Note: Allocatables are excluded as they are already handled
+ by the caller. */
+ if (!f-sym-attr.allocatable
+ gfc_is_finalizable (f-sym-ts.u.derived, NULL))
{
- tmp = gfc_deallocate_alloc_comp (f-sym-ts.u.derived,
- f-sym-backend_decl,
- f-sym-as ? f-sym-as-rank : 0);
+ stmtblock_t block;
+ gfc_expr *e;
+
+ f-sym-attr.referenced = 1;
+ e = gfc_lval_expr_from_sym (f-sym);
+ gfc_add_finalizer_call (block, e);
+ gfc_free_expr (e);
+ tmp = gfc_finish_block (block);
+ }
- if (f-sym-attr.optional
- || f-sym-ns-proc_name-attr.entry_master)
- {
- present = gfc_conv_expr_present (f-sym);
- tmp = build3_loc (input_location, COND_EXPR, TREE_TYPE (tmp),
- present, tmp,
- build_empty_stmt (input_location));
- }
+ if (tmp == NULL_TREE !f-sym-attr.allocatable
+ f-sym-ts.u.derived-attr.alloc_comp !f-sym-value)
+ tmp = gfc_deallocate_alloc_comp (f-sym-ts.u.derived,
+ f-sym-backend_decl,
+ f-sym-as ? f-sym-as-rank : 0);
- gfc_add_expr_to_block (init, tmp);
+ if (tmp != NULL_TREE (f-sym-attr.optional
+ || f-sym-ns-proc_name-attr.entry_master))
+ {
+ present = gfc_conv_expr_present (f-sym);
+ tmp = build3_loc (input_location, COND_EXPR, TREE_TYPE (tmp),
+ present, tmp, build_empty_stmt (input_location));
}
- else if (f-sym-value)
+
+ if (tmp != NULL_TREE)
+ gfc_add_expr_to_block (init, tmp);
+ else if (f-sym-value !f-sym-attr.allocatable)
gfc_init_default_dt (f-sym, init, true);
}
else if (f-sym f-sym-attr.intent == INTENT_OUT
f-sym-ts.type == BT_CLASS
!CLASS_DATA (f-sym)-attr.class_pointer
- CLASS_DATA (f-sym)-ts.u.derived-attr.alloc_comp)
+ !CLASS_DATA (f-sym)-attr.allocatable)
{
- tmp = gfc_class_data_get (f-sym-backend_decl);
- if (CLASS_DATA (f-sym)-as == NULL)
- tmp = build_fold_indirect_ref_loc (input_location, tmp);
- tmp = gfc_deallocate_alloc_comp (CLASS_DATA (f-sym)-ts.u.derived,
- tmp,
- CLASS_DATA (f-sym)-as ?
- CLASS_DATA (f-sym)-as-rank : 0);
+ stmtblock_t block;
+ gfc_expr *e;
+
+ gfc_init_block (block);
+ f-sym-attr.referenced = 1;
+ e = gfc_lval_expr_from_sym (f-sym);
+ gfc_add_finalizer_call (block, e);
+ gfc_free_expr (e);
+ tmp = gfc_finish_block (block);
if (f-sym-attr.optional || f-sym-ns-proc_name-attr.entry_master)
{
--- /dev/null 2013-05-31 08:03:29.909107813 +0200
+++ gcc/gcc/testsuite/gfortran.dg/finalize_10.f90 2013-05-31 16:23:06.377019214 +0200
@@ -0,0 +1,39 @@
+! { dg-do compile }
+! { dg-options -fdump-tree-original }
+!
+! PR fortran/37336
+!
+! Finalize nonallocatable INTENT(OUT)
+!
+module m
+ type t
+ end type t
+ type t2
+ contains
+final :: fini
+ end type t2
+contains
+ elemental subroutine fini(var)
+type(t2), intent(inout) :: var
+ end subroutine fini
+end module m
+
+subroutine foo(x,y,aa,bb)
+ use m
+ class(t), intent(out) :: x(:),y
+ type(t2), intent(out) :: aa(:),bb
+end subroutine foo
+
+! Finalize CLASS + set default init
+! { dg-final { scan-tree-dump-times y-_vptr-_final \\(desc.\[0-9\]+, y-_vptr-_size, 0\\); 1 original } }
+! { dg-final { scan-tree-dump-times __builtin_memcpy \\(\\(void .\\) y-_data, \\(void .\\) y-_vptr-_def_init, \\(unsigned long\\) y-_vptr-_size\\); 1 original } }
+! { dg-final { scan-tree-dump-times x-_vptr-_final \\(x-_data, x-_vptr-_size, 0\\); 1 original } }
+! { dg-final { scan-tree-dump-times x-_vptr-_copy \\(x-_vptr-_def_init, x-_data\\); 1 original } }
+
+!
Re: Re: Implement N3642 - User-defined Literals for Standard Library Types
On 05/31/13, Ed Smith-Rowland3dw...@verizon.net wrote: ... 1. Put the precision first in upper case. As a matter of style I prefer 123456L to 123456l for normal literals anyway. Also, the precision snuggles next to the number - then you modify it. That seems logical to me. Also, if we involve decimal in this someday, those literals *have* to be all caps (for the old literals). It seems using lower case precision indicators for decimal would be inconsistent. I must withdraw the comment about decimal literals needing to be all caps. That's wrong. The letters need to be all uppercase *or* all lowercase. You can't have mixed case. I'll shut up now and post this somewhere else. Ed
Re: [PATCH] Fix eb76.C regression for arm*-*-*
On May 31, 2013, at 4:01 AM, Marcus Shawcroft marcus.shawcr...@arm.com wrote: Since http://gcc.gnu.org/ml/gcc-patches/2013-05/msg01475.html introduced a warning for bit field types with width greater than the contained enum width eb76.C has failed for arm*-*-* due to the extra diagnostic emitted. This patch disables short-enums in the test case. OK? Ok.
Re: [PATCH] Fix failing pr56184.C
On May 31, 2013, at 4:01 AM, Marcus Shawcroft marcus.shawcr...@arm.com wrote: Since http://gcc.gnu.org/ml/gcc-patches/2013-05/msg01475.html introduced a warning for bit field types with width greater than the contained enum width pr56184.C has failed for arm*-*-* due to the extra diagnostic emitted. This patch disables short-enums in the test case. OK? Ok.
Re: [PATCH] Fix pr54684.C regression for arm*-*-*
On May 31, 2013, at 4:02 AM, Marcus Shawcroft marcus.shawcr...@arm.com wrote: Since http://gcc.gnu.org/ml/gcc-patches/2013-05/msg01475.html introduced a warning for bit field types with width greater than the contained enum width pr54684.C has failed for arm*-*-* due to the extra diagnostic emitted. This patch disables short-enums in the test case. OK? Ok. These are trivial I think, if you feel confident and don't need the additional review.
Re: Implement N3642 - User-defined Literals for Standard Library Types
On 31 May 2013 15:15, Ed Smith-Rowland wrote:
Greetings,
This patch implements N3642 - User-defined literals for
std::chrono::duration and std::basic_string
and N3660 - User-defined literals for std::complex.
Great, thanks!
User-defined literals were separated into two papers because of some
controversy about noexcept for complex literals.
If desired, I could split the patch into two bits for the two proposals.
OTOH, I'm pretty sure complex literals will make it in.
I'm not so sure, and if they do they might use if as the suffix
rather than i_f, so please split this patch so the non-complex parts
can go in.
I don't think you need to touch config/abi/pre/gnu.ver, al lthe new
functions are inline and not exported from the library, so you don't
need to version symbols that aren't in the library (in fact, you
*can't* version symbols that aren't in the library!)
It looks like the changes to existing headers could be simplified by
not closing and reopening the namespace, i.e. instead of:
namespace std _GLIBCXX_VISIBILITY(default)
{
_GLIBCXX_BEGIN_NAMESPACE_VERSION
[...]
_GLIBCXX_END_NAMESPACE_VERSION
} // namespace
+#if __cplusplus 201103L
+
+namespace std _GLIBCXX_VISIBILITY(default)
+{
+_GLIBCXX_BEGIN_NAMESPACE_VERSION
+
+inline namespace literals {
+inline namespace string_literals {
[...]
Just put the new stuff inside the already open namespace, i.e.
namespace std _GLIBCXX_VISIBILITY(default)
{
_GLIBCXX_BEGIN_NAMESPACE_VERSION
[...]
+#if __cplusplus 201103L
+
+inline namespace literals {
+inline namespace string_literals {
[...]
+} }
+#endif
+
_GLIBCXX_END_NAMESPACE_VERSION
} // namespace
Re: [PATCH 1/2] handwritten part of patch
I like the idea that someone reviews the end destination you want to get to, and the general path you want to use to get there, and then just pre-approve the entire concept. :-) I think I like the end destination; the path you have chosen is slightly different from the one I might have chosen, but the path you've pick has the nice property that you can incrementally get to the end and keep the tree working; so, likely is superior to the path I was thinking about. The path I was thinking about, was to start by forming classes, and hoist the data up into the classes, and get a this parameter passed around, then something like n_basic_blocks in the code, becomes n_basic_blocks in the code, with a implicit reference to the this parameter, or, to cfg-n_basic_blocks, should the type of this not be cfg. Cause the transformations are just identity, the disruption to the code is less (in some ways). However there is a larger disruption in that all the functions quickly become member functions, though, that also lies closer to the end result I had in mind as well.
[ARM] Resurrect VxWorks port
Hi, as diagnosed by Doug, the VxWorks port cannot be built since: 2011-05-18 Joseph Myers jos...@codesourcery.com which reorganized the ARM options and turned arm_fp16_format from a global variable defined in arm.c into an option variable, leading to: In file included from ../../.././gcc/tm.h:20:0, from /home/eric/svn/gcc/libgcc/fp-bit.c:38: /home/eric/svn/gcc/libgcc/fp-bit.c: In function '__pack_f': /home/eric/svn/gcc/libgcc/../gcc/config/arm/arm.h:426:22: error: 'arm_fp16_format' undeclared (first use in this function) ((bits) == 16 arm_fp16_format == ARM_FP16_FORMAT_ALTERNATIVE) ^ /home/eric/svn/gcc/libgcc/fp-bit.c:205:7: note: in expansion of macro 'LARGEST_EXPONENT_IS_NORMAL' if (LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) (isnan (src) || isinf (src))) ^ /home/eric/svn/gcc/libgcc/../gcc/config/arm/arm.h:426:22: note: each undeclared identifier is reported only once for each function it appears in ((bits) == 16 arm_fp16_format == ARM_FP16_FORMAT_ALTERNATIVE) ^ /home/eric/svn/gcc/libgcc/fp-bit.c:205:7: note: in expansion of macro 'LARGEST_EXPONENT_IS_NORMAL' if (LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) (isnan (src) || isinf (src))) ^ make[3]: *** [_pack_sf.o] Error 1 Because fp-bit.c references macro LARGEST_EXPONENT_IS_NORMAL (FRAC_NBITS) which is defined in arm.h and references arm_fp16_format which in turn is now a macro defined in options.h: #define arm_fp16_format global_options.x_arm_fp16_format. Furthermore 2011-08-05 Rainer Orth r...@cebitec.uni-bielefeld.de moved fp-bit.c into libgcc, making it more convoluted to fix it. So we are proposing to switch the VxWorks port over to the soft-fp emulation instead of the fp-bit one, like most of the other ARM ports. Tested on ARM/VxWorks, OK for all active branches (they are all broken)? 2013-05-31 Douglas B Rupp r...@adacore.com * config.host (arm-wrs-vxworks): Configure with other soft float. -- Eric BotcazouIndex: config.host === --- config.host (revision 199343) +++ config.host (working copy) @@ -316,7 +316,7 @@ alpha*-dec-*vms*) md_unwind_header=alpha/vms-unwind.h ;; arm-wrs-vxworks) - tmake_file=$tmake_file arm/t-arm arm/t-vxworks t-fdpbit + tmake_file=$tmake_file arm/t-arm arm/t-vxworks t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp extra_parts=$extra_parts crti.o crtn.o ;; arm*-*-netbsdelf*)
[ARM] Avoid spilling ip for nested APCS frames
The ARM/VxWorks port uses APCS frames and therefore ip to establish frames
with a frame pointer. Now, for nested functions, ip is also the static chain
register so it needs to be preserved when the frame is being established.
There is code to that effect trying to save ip into r3 if the latter register
is available but, unfortunately, it uses df_regs_ever_live_p (3) to detect the
availability and this returns true for any non-toy function.
Fixed by implementing an arm_r3_live_at_start_p modelled on the implementation
of an equivalent predicate for %eax in the x86 back-end.
Tested on ARM/VxWorks, OK for the mainline?
2013-05-31 Eric Botcazou ebotca...@adacore.com
* config/arm/arm.c (arm_r3_live_at_start_p): New predicate.
(arm_compute_static_chain_stack_bytes): Use it. Tidy up.
(arm_expand_prologue): Likewise.
--
Eric BotcazouIndex: config/arm/arm.c
===
--- config/arm/arm.c (revision 199343)
+++ config/arm/arm.c (working copy)
@@ -16135,25 +16135,34 @@ arm_compute_save_reg0_reg12_mask (void)
return save_reg_mask;
}
+/* Return true if r3 is live at the start of the function. */
+
+static bool
+arm_r3_live_at_start_p (void)
+{
+ /* Just look at cfg info, which is still close enough to correct at this
+ point. This gives false positives for broken functions that might use
+ uninitialized data that happens to be allocated in r3, but who cares? */
+ return REGNO_REG_SET_P (df_get_live_out (ENTRY_BLOCK_PTR), 3);
+}
/* Compute the number of bytes used to store the static chain register on the
- stack, above the stack frame. We need to know this accurately to get the
- alignment of the rest of the stack frame correct. */
+ stack, above the stack frame. We need to know this accurately to get the
+ alignment of the rest of the stack frame correct. */
-static int arm_compute_static_chain_stack_bytes (void)
+static int
+arm_compute_static_chain_stack_bytes (void)
{
- unsigned long func_type = arm_current_func_type ();
- int static_chain_stack_bytes = 0;
+ /* See the defining assertion in arm_expand_prologue. */
+ if (TARGET_APCS_FRAME frame_pointer_needed TARGET_ARM
+ IS_NESTED (arm_current_func_type ())
+ arm_r3_live_at_start_p ()
+ crtl-args.pretend_args_size == 0)
+return 4;
- if (TARGET_APCS_FRAME frame_pointer_needed TARGET_ARM
- IS_NESTED (func_type)
- df_regs_ever_live_p (3) crtl-args.pretend_args_size == 0)
-static_chain_stack_bytes = 4;
-
- return static_chain_stack_bytes;
+ return 0;
}
-
/* Compute a bit mask of which registers need to be
saved on the stack for the current function.
This is used by arm_get_frame_offsets, which may add extra registers. */
@@ -18081,16 +18090,16 @@ arm_expand_prologue (void)
}
else if (IS_NESTED (func_type))
{
- /* The Static chain register is the same as the IP register
+ /* The static chain register is the same as the IP register
used as a scratch register during stack frame creation.
To get around this need to find somewhere to store IP
whilst the frame is being created. We try the following
places in order:
- 1. The last argument register.
+ 1. The last argument register r3.
2. A slot on the stack above the frame. (This only
works if the function is not a varargs function).
- 3. Register r3, after pushing the argument registers
+ 3. Register r3 again, after pushing the argument registers
onto the stack.
Note - we only need to tell the dwarf2 backend about the SP
@@ -18098,7 +18107,7 @@ arm_expand_prologue (void)
doesn't need to be unwound, as it doesn't contain a value
inherited from the caller. */
- if (df_regs_ever_live_p (3) == false)
+ if (!arm_r3_live_at_start_p ())
insn = emit_set_insn (gen_rtx_REG (SImode, 3), ip_rtx);
else if (args_to_push == 0)
{
@@ -18239,8 +18248,7 @@ arm_expand_prologue (void)
if (IS_NESTED (func_type))
{
/* Recover the static chain register. */
- if (!df_regs_ever_live_p (3)
- || saved_pretend_args)
+ if (!arm_r3_live_at_start_p () || saved_pretend_args)
insn = gen_rtx_REG (SImode, 3);
else /* if (crtl-args.pretend_args_size == 0) */
{
RE: [PATCH] pr57457
-Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- ow...@gcc.gnu.org] On Behalf Of Jeff Law Sent: Friday, May 31, 2013 11:50 AM To: Iyer, Balaji V Cc: gcc-patches@gcc.gnu.org; Steve Ellcey Subject: Re: [PATCH] pr57457 On 05/31/2013 07:54 AM, Iyer, Balaji V wrote: Hello Everyone, This patch will fix a bug reported in PR57457. One of the array notation function was not checking for NULL_TREE before accessing its fields. This patch should fix that issue. A test case is also added. Is this OK for trunk? Here are the ChangeLog Entries: gcc/c/ChangeLog 2013-05-31 Balaji V. Iyer balaji.v.i...@intel.com * c-array-notation.c (is_cilkplus_reduce_builtin): Added a check for NULL_TREE parameter input. gcc/testsuite/ChangeLog 2013-05-31 Balaji V. Iyer balaji.v.i...@intel.com PR c/57457 * c-c++-common/cilk-plus/AN/pr57457.c: New testcase. So what you need to do is explain how you got into this function with a NULL fndecl and why that's OK. Hi Jeff, I looked into it, and there is another function call called inform_declaration, and that does exactly what I did (i.e. check for NULL fundecl before accessing its fields). From what I can tell, fundecl will be NULL_TREE if a function declaration is a function pointer. Thanks, Balaji V. Iyer. ie, it's easy to sprinkle tests for NULL pointers in the sources to change behaviour, but it's more important to look at why we're getting a NULL pointer at any particular point and decide if it's valid or not. You've probably already done the analysis, you just need to make sure to include it in the patch submission. That way the reviewer can easily see the change is correct and the analysis is preserved for future reference. Jeff
RFA: Switching LRA on for s390
The following patch switches LRA on for s390. The patch introduces
a new option -mlra to use LRA instead of reload. I did not document
the option as I'd like to delete it for gcc4.9. By default, LRA will
be used for s390 instead of reload for better testing LRA for s390.
Changes in s390.md are because of define_splits for the last
alternative *movmem_short, *clrmem_short, *cmpmem_short have guard
TARGET_CPU_ZARCH.
The patch was successfully bootstrapped and tested on s390x.
Any comments?
Is it ok to commit the patch into trunk?
Thanks.
2013-05-31 Vladimir Makarov vmaka...@redhat.com
* config/s390/s390.opt (mlra): New option.
* config/s390/s390.c (s390_decompose_address): Check displacement
for all registers for LRA.
(s390_secondary_reload): Don't used secondary reloads for LRA.
(s390_lra_p): New function.
(TARGET_LRA_P): Define.
* config/s390/s390.md (*movmem_short, *clrmem_short): Change value
of attribute cpu_facility to zarch for the last alternative.
(*cmpmem_short): Ditto.
Index: config/s390/s390.c
===
--- config/s390/s390.c (revision 199453)
+++ config/s390/s390.c (working copy)
@@ -2017,14 +2017,18 @@ s390_decompose_address (rtx addr, struct
Thus we don't check the displacement for validity here. If after
elimination the displacement turns out to be invalid after all,
this is fixed up by reload in any case. */
- if (base != arg_pointer_rtx
- indx != arg_pointer_rtx
- base != return_address_pointer_rtx
- indx != return_address_pointer_rtx
- base != frame_pointer_rtx
- indx != frame_pointer_rtx
- base != virtual_stack_vars_rtx
- indx != virtual_stack_vars_rtx)
+ /* LRA maintains always displacements up to date and we need to
+know the displacement is right during all LRA not only at the
+final elimination. */
+ if (lra_in_progress
+ || (base != arg_pointer_rtx
+ indx != arg_pointer_rtx
+ base != return_address_pointer_rtx
+ indx != return_address_pointer_rtx
+ base != frame_pointer_rtx
+ indx != frame_pointer_rtx
+ base != virtual_stack_vars_rtx
+ indx != virtual_stack_vars_rtx))
if (!DISP_IN_RANGE (offset))
return false;
}
@@ -3189,7 +3193,9 @@ s390_secondary_reload (bool in_p, rtx x,
/* We need a scratch register when loading a PLUS expression which
is not a legitimate operand of the LOAD ADDRESS instruction. */
- if (in_p s390_plus_operand (x, mode))
+ /* LRA can deal with transformation of plus op very well -- so we
+ don't need to prompt LRA in this case. */
+ if (! lra_in_progress in_p s390_plus_operand (x, mode))
sri-icode = (TARGET_64BIT ?
CODE_FOR_reloaddi_plus : CODE_FOR_reloadsi_plus);
@@ -7868,6 +7874,13 @@ s390_class_max_nregs (enum reg_class rcl
return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
}
+/* Return true if we use LRA instead of reload pass. */
+static bool
+s390_lra_p (void)
+{
+ return s390_lra_flag;
+}
+
/* Return true if register FROM can be eliminated via register TO. */
static bool
@@ -11105,6 +8,9 @@ s390_loop_unroll_adjust (unsigned nunrol
#undef TARGET_LEGITIMATE_CONSTANT_P
#define TARGET_LEGITIMATE_CONSTANT_P s390_legitimate_constant_p
+#undef TARGET_LRA_P
+#define TARGET_LRA_P s390_lra_p
+
#undef TARGET_CAN_ELIMINATE
#define TARGET_CAN_ELIMINATE s390_can_eliminate
Index: config/s390/s390.md
===
--- config/s390/s390.md (revision 199453)
+++ config/s390/s390.md (working copy)
@@ -2690,7 +2690,7 @@
(GET_MODE (operands[2]) == Pmode || GET_MODE (operands[2]) == VOIDmode)
#
[(set_attr type cs)
- (set_attr cpu_facility *,*,z10,*)])
+ (set_attr cpu_facility *,*,z10,zarch)])
(define_split
[(set (match_operand:BLK 0 memory_operand )
@@ -2899,7 +2899,7 @@
(GET_MODE (operands[1]) == Pmode || GET_MODE (operands[1]) == VOIDmode)
#
[(set_attr type cs)
- (set_attr cpu_facility *,*,z10,*)])
+ (set_attr cpu_facility *,*,z10,zarch)])
(define_split
[(set (match_operand:BLK 0 memory_operand )
@@ -3075,7 +3075,7 @@
(GET_MODE (operands[2]) == Pmode || GET_MODE (operands[2]) == VOIDmode)
#
[(set_attr type cs)
- (set_attr cpu_facility *,*,z10,*)])
+ (set_attr cpu_facility *,*,z10,zarch)])
(define_split
[(set (reg:CCU CC_REGNUM)
Index: config/s390/s390.opt
===
--- config/s390/s390.opt(revision 199453)
+++ config/s390/s390.opt(working copy)
@@ -149,3 +149,7 @@ Target Report Joined RejectNegative UInt
Set the branch costs for conditional branch instructions. Reasonable
values are small, non-negative integers. The default branch
default_no_named_section bad default
So, on darwin, the new tools don't like FDE information when you have:
__Z24default_no_named_sectionPKcjP9tree_node:
LFB588:
LFE588:
in the object file.
$ dwarfdump --eh-frame --verify varasm.o
--
File: varasm.o (x86_64)
--
Verifying EH Frame... error: FDE row for address 0x58f0 is not in
the FDE address range.
0x20e0: FDE
length: 0x001c
CIE_pointer: 0x
start_addr: 0x58f0 __Z24default_no_named_sectionPKcjP9tree_node
range_size: 0x (end_addr = 0x58f0)
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
Instructions: 0x58f0: CFA=rsp+8 rip=[rsp]
which, well, seems reasonable. This causes the static linker to reject it.
Now, one can prune out the pair, but, I think really, we either need to have a
default of 0 (to crash in a nice way), or an assert (to crash in a nice way).
Just falling off then end into space (the next function in the executable
file), seems wrong.
Ok?
PR57438
* varasm.c (default_no_named_section): Assert instead.
Index: varasm.c
===
--- varasm.c(revision 199270)
+++ varasm.c(working copy)
@@ -6052,7 +6052,7 @@ default_no_named_section (const char *na
{
/* Some object formats don't support named sections at all. The
front-end should already have flagged this as an error. */
- gcc_unreachable ();
+ gcc_assert (0);
}
#ifndef TLS_SECTION_ASM_FLAG
Re: [GOOGLE] More strict checking for call args
Those cases you mentioned may lead to problems in inlining, indirect
target promotion transformations etc too, so it is better to use the
new guard against them.
David
On Fri, May 31, 2013 at 1:15 AM, Duncan Sands baldr...@free.fr wrote:
Hi Dehao,
On 31/05/13 00:47, Dehao Chen wrote:
This patch makes more strict check of call args to make sure the
number of args match.
Bootstrapped and passed regression tests.
did you thoroughly test Fortran? The Fortran front-end has long had an
unfortunate tendency to eg declare a function as taking 4 int arguments,
but in the call pass it one argument (an array of length 4, consisting
of ints). It would be great if all such nastiness has been fixed. There
are also a few cases in which it declares a builtin as taking, say, an
int,float pair, but passes a float,int pair in the call. I fixed a couple
of instances of this a while back, but I still have one outstanding patch.
Ciao, Duncan.
OK for google branches?
Thanks,
Dehao
Index: gcc/gimple-low.c
===
--- gcc/gimple-low.c (revision 199414)
+++ gcc/gimple-low.c (working copy)
@@ -254,9 +254,13 @@ gimple_check_call_args (gimple stmt, tree fndecl)
!fold_convertible_p (DECL_ARG_TYPE (p), arg)))
return false;
}
+ if (p != NULL)
+ return false;
}
else if (parms)
{
+ if (list_length (parms) - nargs != 1)
+ return false;
for (i = 0, p = parms; i nargs; i++, p = TREE_CHAIN (p))
{
tree arg;
[patch] Fix parsing bug in validate_patches.py
The validate_failures.py script in contrib/testsuite-management expects
the first | character in a test summary line to be a delineator
allowing the line to be prefixed by attributes such as flaky. This
causes problems when a test line itself contains | in the message.
We can get around this in the xfail file by prefixing the line with |
to indicate an empty attribute set. However, validate_failures.py uses
the same line-parser for files in the DejaGnu output, and we obviously
can't adjust those -- with the result that the relevant summary line in
the DejaGnu output is ignored.
This patch fixes the problem: If an entire line is a valid summary line,
we don't try to split it.
Ok to commit?
- Brooks
2013-05-31 Brooks Moses bmo...@google.com
* validate_failures.py: Don't split already-valid summary lines.
The validate_failures.py script in contrib/testsuite-management expects the
first | character in a test summary line to be a delineator allowing the
line to be prefixed by attributes such as flaky. This causes problems when
a test line itself contains | in the message.
We can get around this in the xfail file by prefixing the line with | to
indicate an empty attribute set. However, validate_failures.py uses the same
line-parser for files in the DejaGnu output, and we obviously can't adjust
those -- with the result that the relevant summary line in the DejaGnu output
is ignored.
This patch fixes the problem: If an entire line is a valid summary line, we don't
try to split it.
Index: contrib/testsuite-management/validate_failures.py
===
--- contrib/testsuite-management/validate_failures.py (revision 199390)
+++ contrib/testsuite-management/validate_failures.py (working copy)
@@ -120,7 +120,7 @@
def __init__(self, summary_line, ordinal=-1):
try:
self.attrs = ''
- if '|' in summary_line:
+ if '|' in summary_line and not _VALID_TEST_RESULTS_REX.match(summary_line):
(self.attrs, summary_line) = summary_line.split('|', 1)
try:
(self.state,
@@ -210,7 +210,7 @@
def IsInterestingResult(line):
Return True if line is one of the summary lines we care about.
- if '|' in line:
+ if '|' in line and not _VALID_TEST_RESULTS_REX.match(line):
(_, line) = line.split('|', 1)
line = line.strip()
return bool(_VALID_TEST_RESULTS_REX.match(line))
Re: [Solaris] Catch FP exceptions
i386 only, might be related ,.,. CXG2021 ACATS 2.5 13-05-27 17:47:57 CXG2021 Check the accuracy of the complex SIN and COS functions. * CXG2021 Identity_2_Test 3 0: Cos(( 1.60300E+01, 1.6E+01)) imaginary part actual: 1.40623E+06 expected: 1.40622E+06 difference: 4.0E+00 max err: 3.68797E+00 efactor: 1.40623E+06. CXG2021 FAILED . The test fails because the difference (4.0E+00) is larger than the max err (3.68797E+00). I've reduced the testcase to p.adb, which reads in part: package Complex_Type is new Ada.Numerics.Generic_Complex_Types (Float); use Complex_Type; package CEF is new Ada.Numerics.Generic_Complex_Elementary_Functions (Complex_Type); function Sin (X : Complex) return Complex renames CEF.Sin; function Cos (X : Complex) return Complex renames CEF.Cos; Z : Complex; W : constant Complex := (0.0625, 0.0625); ZmW : Complex; Sin_ZmW, Cos_ZmW : Complex; A1, A2 : Complex; Sin_W : constant Complex := (6.2581348413276935585E-2, 6.2418588008436587236E-2); Cos_W_m_1 : constant Complex := (-2.5431314180235545803E-6, -3.9062493377261771826E-3); begin for I in 2 .. 3 loop Z := (16.0 + Float (I) / Float (100), 16.0); ZmW := Z - W; Cos_ZmW := Cos (ZmW); and most of the 4.0E+00 difference for I = 3 in the final result comes from Im (Cos_ZmW), which in turn comes from Re (ZmW). We have at -O1: (gdb) x/f ($esp) 0xce60: 16.037 (gdb) x/f ($esp + 8) 0xce68: 0.0625 (gdb) nexti 0x0804a2e6 2791 zmw := p__complex_type__Osubtract__2 (z, w); (gdb) p/f $eax $1 = 15.9675007= Re (ZmW) and we have at -O2: (gdb) info reg st0 st00.0625 (raw 0x3ffb8000) (gdb) info reg st1 st116.03624500451351651 (raw 0x4003803d70a3d70a3d71) (gdb) nexti 0x0804a231 520 re = left.re - right.re, (gdb) info reg st0 st015.967500624500451351651 (raw 0x4002ff7ae147ae147ae2) (gdb) nexti (gdb) x/f ($ebp - 0x44) 0xce94: 15.9674997= Re (ZmW) with Im (Zmw) the same (15.9375) in both cases. At a result, Im (Cos_ZmW) is 1071153.38 at -O1 and 1071149.5 at -O2, the difference (3.88) being already larger than the max err. IOW most of the difference only comes from: 16.0 + Float (I) / Float (100) - 0.0625 where we truncate to 32-bit at -O1 before doing the subtraction, whereas we keep the Extended Precision at -O2, and then goes through the exponentation, leading to the final 3.88 difference. Fixed thusly, tested on i686-suse-linux, applied on the mainline. 2013-05-31 Eric Botcazou ebotca...@adacore.com * ada/acats/floatstore.lst: New. * ada/acats/run_all.sh: Process it. -- Eric Botcazouwith Text_IO; use Text_IO; with Ada.Numerics.Generic_Complex_Types; with Ada.Numerics.Generic_Complex_Elementary_Functions; procedure P is package Complex_Type is new Ada.Numerics.Generic_Complex_Types (Float); use Complex_Type; package CEF is new Ada.Numerics.Generic_Complex_Elementary_Functions (Complex_Type); function Sin (X : Complex) return Complex renames CEF.Sin; function Cos (X : Complex) return Complex renames CEF.Cos; Z : Complex; W : constant Complex := (0.0625, 0.0625); ZmW : Complex; Sin_ZmW, Cos_ZmW : Complex; A1, A2 : Complex; Sin_W : constant Complex := (6.2581348413276935585E-2, 6.2418588008436587236E-2); Cos_W_m_1 : constant Complex := (-2.5431314180235545803E-6, -3.9062493377261771826E-3); begin for I in 2 .. 3 loop Z := (16.0 + Float (I) / Float (100), 16.0); ZmW := Z - W; Sin_ZmW := Sin (ZmW); Cos_ZmW := Cos (ZmW); A1 := Cos (Z); A2 := Cos_ZmW + (Cos_ZmW * Cos_W_m_1 - Sin_ZmW * Sin_W); Put_Line ( actual: A1.Im'Img | expected: A2.Im'Img); end loop; end; Index: ada/acats/run_all.sh === --- ada/acats/run_all.sh (revision 199343) +++ ada/acats/run_all.sh (working copy) @@ -225,6 +225,10 @@ for chapter in $chapters; do if [ $? -eq 0 ]; then extraflags=$extraflags -gnatE fi + grep $i $testdir/floatstore.lst /dev/null 21 + if [ $? -eq 0 ]; then + extraflags=$extraflags -ffloat-store + fi grep $i $testdir/stackcheck.lst /dev/null 21 if [ $? -eq 0 ]; then extraflags=$extraflags -fstack-check Index: ada/acats/floatstore.lst === --- ada/acats/floatstore.lst (revision 0) +++ ada/acats/floatstore.lst (revision 0) @@ -0,0 +1 @@ +cxg2021
Re: [ada, build] host/target configuration
In my reading, the code supported both these before your recent change, and now supports neither, as I reported this morning. Did you test it? With which configurations exactly have you tested your change? arm-linux-androideabi -- Eric Botcazou
Re: [Patch, Fortran] Better error messages for type/rank checks
On 31 May 2013 15:57:25 Manfred Schwarb manfre...@gmx.ch wrote: Am 31.05.2013 14:28, schrieb Janus Weil: Wouldn't it work to use the TIOCGWINSZ ioctl only if isatty() reports that we're outputting to a terminal? Good point. Updated patch attached, which imposes no limit if we're not outputting to a terminal (as suggested by Mikael). Ok for trunk, or am I missing anything else? (Testing welcome ...) needs #include unistd.h for isatty(), perhaps. Otherwise looks sane at first glance. Perhaps see get_terminal_width_height() for inspiration (works for me).. http://git.busybox.net/busybox/tree/libbb/xfuncs.c#n254 Cheers, Sent with AquaMail for Android http://www.aqua-mail.com
[PATCH] Improve folding of bitwise ops on booleans
This is an implementation to fix a missed optimization pointed out to me
by Kai.
In all these examples, assume a b are single bit types.
~a b -- a b
a ~b -- b a
~a || b -- a = b
a ~b -- b = a
This happens with some regularity in GCC itself, though it's not as
pervasive as some of the other missed optimizations I've run into.
This could have gone into fold-const.c or tree-forwprop. fold-const.c
isn't as useful as would need to see the entire expression as a single
tree node. tree-forwprop.c can follow the use-def links and discover
more opportunities even when the expressions span two source statements
or are exposed by other optimizations.
Bootstrapped and regression tested on x86_64-unknown-linux-gnu.
OK for the trunk?
commit 2b61de6f70576105fe6ada31618db23857f9c902
Author: Jeff Law l...@redhat.com
Date: Fri May 31 14:16:27 2013 -0600
* tree-ssa-forwprop.c (simplify_bitwise_binary_boolean): New
* function.
(simplify_bitwise_binary): Use it to simpify certain binary ops on
booleans.
* gcc.dg/tree-ssa/forwprop-27.c: New test.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 396111e..7f027b0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2013-05-31 Jeff Law l...@redhat.com
+
+ * tree-ssa-forwprop.c (simplify_bitwise_binary_boolean): New function.
+ (simplify_bitwise_binary): Use it to simpify certain binary ops on
+ booleans.
+
2013-05-28 Steve Ellcey sell...@mips.com
* config/mips/mips-cpus.def (mips32r2): Change processor type.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 869371a..6f80afb 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2013-05-31 Jeff Law l...@redhat.com
+
+ * gcc.dg/tree-ssa/forwprop-27.c: New test.
+
2013-05-28 Balaji V. Iyer balaji.v.i...@intel.com
* c-c++-common/cilk-plus/AN/array_test1.c: New test.
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-27.c
b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-27.c
new file mode 100644
index 000..75e935d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-27.c
@@ -0,0 +1,78 @@
+/* { dg-do compile } */
+/* { dg-options -O2 -fdump-tree-forwprop1 } */
+
+extern char * frob (void);
+extern _Bool testit(void);
+
+test (int code)
+{
+ char * temp = frob();;
+ int rotate = (code == 22);
+ if (temp == 0 !rotate)
+ oof();
+}
+
+test_2 (int code)
+{
+ char * temp = frob();
+ int rotate = (code == 22);
+ if (!rotate temp == 0)
+ oof();
+}
+
+
+test_3 (int code)
+{
+ char * temp = frob();
+ int rotate = (code == 22);
+ if (!rotate || temp == 0)
+ oof();
+}
+
+
+test_4 (int code)
+{
+ char * temp = frob();
+ int rotate = (code == 22);
+ if (temp == 0 || !rotate)
+ oof();
+}
+
+
+test_5 (int code)
+{
+ _Bool temp = testit();;
+ _Bool rotate = (code == 22);
+ if (temp == 0 !rotate)
+ oof();
+}
+
+test_6 (int code)
+{
+ _Bool temp = testit();
+ _Bool rotate = (code == 22);
+ if (!rotate temp == 0)
+ oof();
+}
+
+
+test_7 (int code)
+{
+ _Bool temp = testit();
+ _Bool rotate = (code == 22);
+ if (!rotate || temp == 0)
+ oof();
+}
+
+
+test_8 (int code)
+{
+ _Bool temp = testit();
+ _Bool rotate = (code == 22);
+ if (temp == 0 || !rotate)
+ oof();
+}
+
+/* { dg-final { scan-tree-dump-times Replaced 8 forwprop1} } */
+
+
diff --git a/gcc/tree-ssa-forwprop.c b/gcc/tree-ssa-forwprop.c
index 6043d31..8c3f08b 100644
--- a/gcc/tree-ssa-forwprop.c
+++ b/gcc/tree-ssa-forwprop.c
@@ -1870,6 +1870,45 @@ hoist_conversion_for_bitop_p (tree to, tree from)
return false;
}
+/* GSI points to a statement of the form
+
+ result = OP0 CODE OP1
+
+ Where OP0 and OP1 are single bit SSA_NAMEs and CODE is either
+ BIT_AND_EXPR or BIT_IOR_EXPR.
+
+ If OP0 is fed by a bitwise negation of another single bit SSA_NAME,
+ then we can simplify the two statements into a single LT_EXPR or LE_EXPR
+ when code is BIT_AND_EXPR and BIT_IOR_EXPR respectively.
+
+ If a simplification is mode, return TRUE, else return FALSE. */
+static bool
+simplify_bitwise_binary_boolean (gimple_stmt_iterator *gsi,
+enum tree_code code,
+tree op0, tree op1)
+{
+ gimple op0_def_stmt = SSA_NAME_DEF_STMT (op0);
+
+ if (!is_gimple_assign (op0_def_stmt)
+ || (gimple_assign_rhs_code (op0_def_stmt) != BIT_NOT_EXPR))
+return false;
+
+ tree x = gimple_assign_rhs1 (op0_def_stmt);
+ if (TREE_CODE (x) == SSA_NAME
+ INTEGRAL_TYPE_P (TREE_TYPE (x))
+ TYPE_PRECISION (TREE_TYPE (x)) == 1)
+{
+ gimple stmt = gsi_stmt (*gsi);
+ gimple_assign_set_rhs1 (stmt, x);
+ gimple_assign_set_rhs2 (stmt, op1);
+ gimple_assign_set_rhs_code (stmt, code == BIT_AND_EXPR ? LT_EXPR :
LE_EXPR);
+ update_stmt (gsi_stmt (*gsi));
+ return true;
+}
+ return false;
+
+}
+
/* Simplify bitwise binary operations.
Re: [Patch, Fortran] Better error messages for type/rank checks
Wouldn't it work to use the TIOCGWINSZ ioctl only if isatty() reports that we're outputting to a terminal? Good point. Updated patch attached, which imposes no limit if we're not outputting to a terminal (as suggested by Mikael). Ok for trunk, or am I missing anything else? (Testing welcome ...) needs #include unistd.h for isatty(), perhaps. I think it is already included (via system.h). Otherwise looks sane at first glance. Thanks for the feedback! Cheers, Janus
Re: [ada, build] host/target configuration
Hi! On Fri, 31 May 2013 21:54:55 +0200, Eric Botcazou ebotca...@adacore.com wrote: In my reading, the code supported both these before your recent change, and now supports neither, as I reported this morning. Did you test it? I didn't; now I have, and... With which configurations exactly have you tested your change? arm-linux-androideabi ..., you're right that this one works, but it only works by chance: targ:=$(subst -, ,$(subst -gnu, ,$(target_alias))) arch:=$(word 1,$(targ)) ifeq ($(words $(targ)),2) manu:= osys:=$(word 2,$(targ)) else manu:=$(word 2,$(targ)) osys:=$(word 3,$(targ)) endif default: @echo target_alias = »$(target_alias)« @echo targ = »$(targ)« @echo arch = »$(arch)« @echo manu = »$(manu)« @echo osys = »$(osys)« ifeq ($(strip $(filter-out arm% androideabi,$(arch) $(osys))),) @echo matched else @echo not matched endif We get: $ make target_alias=arm-linux-androideabi target_alias = »arm-linux-androideabi« targ = »arm linux androideabi« arch = »arm« manu = »linux« osys = »androideabi« matched So, your case works because the manu/osys parsing wrongly detects/assigns a manufacturer »linux« and an operating system androideabi. Then, the following case fails, which is expected to yield identical results, with complete triplets -- which I took for granted in my reasoning about the Makefile code: $ make target_alias=arm-unknown-linux-androideabi target_alias = »arm-unknown-linux-androideabi« targ = »arm unknown linux androideabi« arch = »arm« manu = »unknown« osys = »linux« not matched My suggested change would make all these work -- however I have not yet had the time to fully digest your other emails with the reasoning that you need configure GCC with non-canonical target and target_alias set differently. Grüße, Thomas pgpJ37CEJQUlN.pgp Description: PGP signature
Re: [Patch, Fortran] Finalize nonallocatables with INTENT(out)
Tobias Burnus wrote:
This patch adds finalization support for INTENT(out) for
nonallocatable dummy arguments.
Attached is an additional test case, which checks that the finalization
wrapper handles strides correctly. The stride handling occurs trice:
- For elemental finalization procedures in the scalarizer
- For array finalization procedures, in the check whether it can be
directly dispatched or it has to be packed
- In the packing itself.
(There is currently no test case which checks whether no
copy-in/copy-out is done unless required. But the wrapper shouldn't do a
copy out for INTENT(IN) and only a copy-in(+copy-out) if the elem_size
is different from the type size - or if the array has strides and the
dummy argument is either CONTIGUOUS or nor assumed shape.)
The test case requires the intent(out) patch for nonallocatables,
http://gcc.gnu.org/ml/fortran/2013-05/msg00135.html
Which in turn requires the finalization patch for allocatables,
http://gcc.gnu.org/ml/fortran/2013-05/msg00134.html
OK for the trunk?
Tobias
! { dg-do run }
!
! PR fortran/37336
!
! Check the scalarizer/array packing with strides
! in the finalization wrapper
!
module m
implicit none
type t1
integer :: i
contains
final :: fini_elem
end type t1
type, extends(t1) :: t1e
integer :: j
contains
final :: fini_elem2
end type t1e
type t2
integer :: i
contains
final :: fini_shape
end type t2
type, extends(t2) :: t2e
integer :: j
contains
final :: fini_shape2
end type t2e
type t3
integer :: i
contains
final :: fini_explicit
end type t3
type, extends(t3) :: t3e
integer :: j
contains
final :: fini_explicit2
end type t3e
integer :: cnt1, cnt1e, cnt2, cnt2e, cnt3, cnt3e
contains
impure elemental subroutine fini_elem(x)
type(t1), intent(inout) :: x
integer :: i, j, i2, j2
if (cnt1e /= 5*4) call abort ()
j = mod (cnt1,5)+1
i = cnt1/5 + 1
i2 = (i-1)*3 + 1
j2 = (j-1)*2 + 1
if (x%i /= j2 + 100*i2) call abort ()
x%i = x%i * (-13)
cnt1 = cnt1 + 1
end subroutine fini_elem
impure elemental subroutine fini_elem2(x)
type(t1e), intent(inout) :: x
integer :: i, j, i2, j2
j = mod (cnt1e,5)+1
i = cnt1e/5 + 1
i2 = (i-1)*3 + 1
j2 = (j-1)*2 + 1
if (x%i /= j2 + 100*i2) call abort ()
if (x%j /= (j2 + 100*i2)*100) call abort ()
x%j = x%j * (-13)
cnt1e = cnt1e + 1
end subroutine fini_elem2
subroutine fini_shape(x)
type(t2) :: x(:,:)
if (cnt2e /= 1 .or. cnt2 /= 0) call abort ()
call check_var_sec(x%i, 1)
x%i = x%i * (-13)
cnt2 = cnt2 + 1
end subroutine fini_shape
subroutine fini_shape2(x)
type(t2e) :: x(:,:)
call check_var_sec(x%i, 1)
call check_var_sec(x%j, 100)
x%j = x%j * (-13)
cnt2e = cnt2e + 1
end subroutine fini_shape2
subroutine fini_explicit(x)
type(t3) :: x(5,4)
if (cnt3e /= 1 .or. cnt3 /= 0) call abort ()
call check_var_sec(x%i, 1)
x%i = x%i * (-13)
cnt3 = cnt3 + 1
end subroutine fini_explicit
subroutine fini_explicit2(x)
type(t3e) :: x(5,4)
call check_var_sec(x%i, 1)
call check_var_sec(x%j, 100)
x%j = x%j * (-13)
cnt3e = cnt3e + 1
end subroutine fini_explicit2
subroutine fin_test_1(x)
class(t1), intent(out) :: x(5,4)
end subroutine fin_test_1
subroutine fin_test_2(x)
class(t2), intent(out) :: x(:,:)
end subroutine fin_test_2
subroutine fin_test_3(x)
class(t3), intent(out) :: x(:,:)
if (any (shape(x) /= [5,4])) call abort ()
end subroutine fin_test_3
subroutine check_var_sec(x, factor)
integer :: x(:,:)
integer, value :: factor
integer :: i, j, i2, j2
do i = 1, 4
i2 = (i-1)*3 + 1
do j = 1, 5
j2 = (j-1)*2 + 1
if (x(j,i) /= (j2 + 100*i2)*factor) call abort ()
end do
end do
end subroutine check_var_sec
end module m
program test
use m
implicit none
class(t1), allocatable :: x(:,:)
class(t2), allocatable :: y(:,:)
class(t3), allocatable :: z(:,:)
integer :: i, j
cnt1 = 0; cnt1e = 0; cnt2 = 0; cnt2e = 0; cnt3 = 0; cnt3e = 0
allocate (t1e :: x(10,10))
allocate (t2e :: y(10,10))
allocate (t3e :: z(10,10))
select type(x)
type is (t1e)
do i = 1, 10
do j = 1, 10
x(j,i)%i = j + 100*i
x(j,i)%j = (j + 100*i)*100
end do
end do
end select
select type(y)
type is (t2e)
do i = 1, 10
do j = 1, 10
y(j,i)%i = j + 100*i
y(j,i)%j = (j + 100*i)*100
end do
end do
end select
select type(z)
type is (t3e)
do i = 1, 10
do j = 1, 10
z(j,i)%i = j + 100*i
z(j,i)%j = (j + 100*i)*100
end do
end do
end select
if (cnt1 + cnt1e + cnt2 + cnt2e + cnt3 + cnt3e /= 0) call abort()
call fin_test_1(x(::2,::3))
if (cnt1 /= 5*4) call abort ()
if (cnt1e /= 5*4) call abort ()
cnt1 = 0; cnt1e = 0
if (cnt2 +
Re: [Patch, Fortran] Better error messages for type/rank checks
Le 31/05/2013 14:28, Janus Weil a écrit :
Wouldn't it work to use the TIOCGWINSZ ioctl only if isatty() reports
that we're outputting to a terminal?
Good point. Updated patch attached, which imposes no limit if we're
not outputting to a terminal (as suggested by Mikael).
Ok for trunk, or am I missing anything else? (Testing welcome ...)
Cheers,
Janus
Index: gcc/fortran/error.c
===
--- gcc/fortran/error.c (revision 199530)
+++ gcc/fortran/error.c (working copy)
@@ -30,6 +30,13 @@ along with GCC; see the file COPYING3. If not see
#include flags.h
#include gfortran.h
+#if !(defined (_WIN32) || defined (VMS) || defined (__vxworks) || \
+ defined (__Lynx__) || defined (__ANDROID__))
We should better use autoconf rather than hard-coding platforms here.
+/* UNIX-like systems */
+#include sys/ioctl.h
+#endif
+
+
static int suppress_errors = 0;
static int warnings_not_errors = 0;
@@ -59,9 +66,24 @@ gfc_pop_suppress_errors (void)
}
+/* Determine terminal width (for trimming source lines in output). */
+
static int
get_terminal_width (void)
{
+ /* Only limit the width if we're outputting to a terminal. */
+ if (!isatty (STDERR_FILENO))
+return INT_MAX;
Guard it with HAVE_UNISTD_H or HAVE_ISATTY ?
+
+ /* Method #1: Use ioctl (not available on all systems). */
+#ifdef TIOCGWINSZ
+ struct winsize w;
+ ioctl (0, TIOCGWINSZ, w);
You should check the ioctl result. I bet it returns non-zero in
Manfred's (pathological) case...
Actually, I have just checked; it does.
The rest looks good.
Mikael
[PATCH 1/6] rs6000: Introducing define_dot_insn
This adds a program (mdm.pl) that does some processing on machine description files. It is careful to keep formatting and comments intact as much as possible, so that its output is well readable. The only transform it does so far is convert a define_dot_insn construct to three define_insns and two define_splits, that together handle a PowerPC GPR instruction and its record-form (dot) variant. The syntax of define_dot_insn is just like that of define_insn, with an extra condition string added after the normal one; the condition used for the record form variant is the conjunction of both those condition strings. The mdm.pl program is only used if the input file (*.mdm) has been touched, so users do not need Perl installed to build GCC unless they have changed the input file. The output file (*.md) is checked into SVN. I hope this is enough to guarantee the timestamps in generated tarballs will be later for the output file, too? This needs Perl 5.14, which is two years old. If that won't do I can rework some of it so it needs only 5.10, which is five years old. As an example this patch moves lshrdi3 over. This causes a minor regression that further patches will fix: no longer a different instruction type attribute is used for the dot form; instead, the dot attribute is set to yes. Hopefully, with many fewer (and more descriptive) possible values for type the scheduling descriptions will be clearer and contain fewer silly bugs. Bootstrapped and tested on powerpc64-linux --enable-languages=c,c++,fortran --disable-libsanitizer, -m64,-m32,-m32/-mpowerpc64, no regressions. Comments, questions, flames? I'm wearing my asbestos suit... Segher 2013-05-31 Segher Boessenkool seg...@kernel.crashing.org gcc/ * config/rs6000/rs6000.md (dot): New. (include integer.md): New. (lshrdi3_internal1, lshrdi3_internal2, lshrdi3_internal3): Delete. * config/rs6000/integer.mdm: New file. * config/rs6000/integer.md: New file, autogenerated. * config/rs6000/mdm.pl: New file. * config/rs6000/t-rs6000 (MD_INCLUDES): Add integer.md. (MDM): New. (%.md: %.mdm): New. --- gcc/config/rs6000/integer.md | 148 + gcc/config/rs6000/integer.mdm | 67 ++ gcc/config/rs6000/mdm.pl | 470 ++ gcc/config/rs6000/rs6000.md | 82 +--- gcc/config/rs6000/t-rs6000| 6 + 5 files changed, 696 insertions(+), 77 deletions(-) create mode 100644 gcc/config/rs6000/integer.md create mode 100644 gcc/config/rs6000/integer.mdm create mode 100755 gcc/config/rs6000/mdm.pl diff --git a/gcc/config/rs6000/integer.md b/gcc/config/rs6000/integer.md new file mode 100644 index 000..0884e0f --- /dev/null +++ b/gcc/config/rs6000/integer.md @@ -0,0 +1,148 @@ +; Generated by mdm.pl; do not edit (edit the .mdm instead). +; vi:ro + + +; Copyright (C) 1990-2013 Free Software Foundation, Inc. +; +; This file is part of GCC. +; +; GCC is free software; you can redistribute it and/or modify it +; under the terms of the GNU General Public License as published +; by the Free Software Foundation; either version 3, or (at your +; option) any later version. +; +; GCC is distributed in the hope that it will be useful, but WITHOUT +; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +; License for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING3. If not see +; http://www.gnu.org/licenses/. + + +; This file describes the integer (GPR-to-GPR) PowerPC instructions. +; Most of these have record-form (dot) variants, and are described +; using define_dot_insn. + + +; -- Rotate and shift instructions: +; rlwinm[.], rlwnm[.], rldicl[.], rldicr[.], rldic[.], rldcl[.], rldcr[.] +; rlwimi[.], rldimi[.] +; slw[.], srw[.], srawi[.], sraw[.], sld[.], srd[.], sradi[.], srad[.] + + +(define_insn lshrdi3 + [(set (match_operand:DI 0 gpc_reg_operand =r,r) + (lshiftrt:DI (match_operand:DI 1 gpc_reg_operand r,r) +(match_operand:SI 2 reg_or_cint_operand r,i)))] + TARGET_POWERPC64 + @ + srd %0,%1,%2 + srdi %0,%1,%H2 + [(set_attr type var_shift_rotate,shift) ; var_delayed_compare,delayed_compare +]) + +(define_insn *lshrdi3_dot + [(set (match_operand:CC 3 cc_reg_operand =x,x,?y,?y) + (compare:CC + (lshiftrt:DI (match_operand:DI 1 gpc_reg_operand r,r,r,r) +(match_operand:SI 2 reg_or_cint_operand r,i,r,i)) + (const_int 0))) + (clobber (match_scratch:DI 0 =r,r,r,r))] + (TARGET_POWERPC64) +(DImode == Pmode rs6000_gen_cell_microcode) + @ + srd. %0,%1,%2 + srdi. %0,%1,%H2 + # + # + [(set_attr length 4,4,8,8) + (set_attr dot yes,yes,no,no) + (set_attr type var_shift_rotate,shift,var_shift_rotate,shift) ; var_delayed_compare,delayed_compare +]) + +(define_split + [(set (match_operand:CC 3
[PATCH 2/6] rs6000: dot for lshrsi3
This moves lshrsi3 over and merges it with lshrdi3. The immediate version is split off since it needs a different condition (and is a separate instruction anyway). Tested as per usual; okay? 2013-05-31 Segher Boessenkool seg...@kernel.crashing.org gcc/ * config/rs6000/rs6000.md (lshrsi3): Delete. * config/rs6000/integer.mdm: (lshrdi3): Delete. (lshrmode3, lshrmode3_imm): New. * config/rs6000/integer.md: Regenerate. --- gcc/config/rs6000/integer.md | 177 +- gcc/config/rs6000/integer.mdm | 28 --- gcc/config/rs6000/rs6000.md | 75 -- 3 files changed, 143 insertions(+), 137 deletions(-) diff --git a/gcc/config/rs6000/integer.md b/gcc/config/rs6000/integer.md index 0884e0f..2be1f35 100644 --- a/gcc/config/rs6000/integer.md +++ b/gcc/config/rs6000/integer.md @@ -32,90 +32,163 @@ ; slw[.], srw[.], srawi[.], sraw[.], sld[.], srd[.], sradi[.], srad[.] -(define_insn lshrdi3 - [(set (match_operand:DI 0 gpc_reg_operand =r,r) - (lshiftrt:DI (match_operand:DI 1 gpc_reg_operand r,r) -(match_operand:SI 2 reg_or_cint_operand r,i)))] - TARGET_POWERPC64 +(define_insn lshrmode3 + [(set (match_operand:GPR 0 gpc_reg_operand =r) + (lshiftrt:GPR (match_operand:GPR 1 gpc_reg_operand r) + (match_operand:SI 2 gpc_reg_operand r)))] + + srwd %0,%1,%2 + [(set_attr type var_shift_rotate) ; var_delayed_compare +]) + +(define_insn *lshrmode3_dot + [(set (match_operand:CC 3 cc_reg_operand =x,?y) + (compare:CC + (lshiftrt:GPR (match_operand:GPR 1 gpc_reg_operand r,r) + (match_operand:SI 2 gpc_reg_operand r,r)) + (const_int 0))) + (clobber (match_scratch:GPR 0 =r,r))] + MODEmode == Pmode rs6000_gen_cell_microcode @ - srd %0,%1,%2 - srdi %0,%1,%H2 - [(set_attr type var_shift_rotate,shift) ; var_delayed_compare,delayed_compare + srwd. %0,%1,%2 + # + [(set_attr length 4,8) + (set_attr dot yes,no) + (set_attr type var_shift_rotate) ; var_delayed_compare +]) + +(define_split + [(set (match_operand:CC 3 cc_reg_not_cr0_operand ) + (compare:CC + (lshiftrt:GPR (match_operand:GPR 1 gpc_reg_operand ) + (match_operand:SI 2 gpc_reg_operand )) + (const_int 0))) + (clobber (match_scratch:GPR 0 ))] + (MODEmode == Pmode rs6000_gen_cell_microcode) +(reload_completed) + [(set (match_dup 0) + (lshiftrt:GPR (match_dup 1) + (match_dup 2))) + (set (match_dup 3) + (compare:CC (match_dup 0) + (const_int 0)))] + ) + +(define_insn *lshrmode3_dot2 + [(set (match_operand:CC 3 cc_reg_operand =x,?y) + (compare:CC + (lshiftrt:GPR (match_operand:GPR 1 gpc_reg_operand r,r) + (match_operand:SI 2 gpc_reg_operand r,r)) + (const_int 0))) + (set (match_operand:GPR 0 gpc_reg_operand =r,r) + (lshiftrt:GPR (match_dup 1) + (match_dup 2)))] + MODEmode == Pmode rs6000_gen_cell_microcode + @ + srwd. %0,%1,%2 + # + [(set_attr length 4,8) + (set_attr dot yes,no) + (set_attr type var_shift_rotate) ; var_delayed_compare +]) + +(define_split + [(set (match_operand:CC 3 cc_reg_not_cr0_operand ) + (compare:CC + (lshiftrt:GPR (match_operand:GPR 1 gpc_reg_operand ) + (match_operand:SI 2 gpc_reg_operand )) + (const_int 0))) + (set (match_operand:GPR 0 gpc_reg_operand ) + (lshiftrt:GPR (match_dup 1) + (match_dup 2)))] + (MODEmode == Pmode rs6000_gen_cell_microcode) +(reload_completed) + [(set (match_dup 0) + (lshiftrt:GPR (match_dup 1) + (match_dup 2))) + (set (match_dup 3) + (compare:CC (match_dup 0) + (const_int 0)))] + ) + +(define_insn *lshrmode3_imm + [(set (match_operand:GPR 0 gpc_reg_operand =r) + (lshiftrt:GPR (match_operand:GPR 1 gpc_reg_operand r) + (match_operand:SI 2 const_int_operand i)))] + UINTVAL (operands[2]) GET_MODE_BITSIZE (MODEmode) + srwdi %0,%1,%2 + [(set_attr type shift) ; delayed_compare ]) -(define_insn *lshrdi3_dot - [(set (match_operand:CC 3 cc_reg_operand =x,x,?y,?y) +(define_insn *lshrmode3_imm_dot + [(set (match_operand:CC 3 cc_reg_operand =x,?y) (compare:CC - (lshiftrt:DI (match_operand:DI 1 gpc_reg_operand r,r,r,r) -(match_operand:SI 2 reg_or_cint_operand r,i,r,i)) + (lshiftrt:GPR (match_operand:GPR 1 gpc_reg_operand r,r) + (match_operand:SI 2 const_int_operand i,i)) (const_int 0))) - (clobber (match_scratch:DI 0 =r,r,r,r))] - (TARGET_POWERPC64) -(DImode == Pmode rs6000_gen_cell_microcode) + (clobber (match_scratch:GPR 0 =r,r))] + (UINTVAL (operands[2]) GET_MODE_BITSIZE (MODEmode)) +(MODEmode == Pmode rs6000_gen_cell_microcode) @ - srd. %0,%1,%2 - srdi. %0,%1,%H2 - # + srwdi. %0,%1,%2 # - [(set_attr length
[PATCH 3/6] rs6000: dot for ashlmode3
Similar to lshr, for ashl. Okay? 2013-05-31 Segher Boessenkool seg...@kernel.crashing.org gcc/ * config/rs6000/rs6000.md (ashlsi3, ashldi3_internal1, ashldi3_internal2, ashldi3_internal3): Delete. * config/rs6000/integer.mdm (ashlmode3, ashlmode3_imm): New. * config/rs6000/integer.md: Regenerate. --- gcc/config/rs6000/integer.md | 162 ++ gcc/config/rs6000/integer.mdm | 20 ++ gcc/config/rs6000/rs6000.md | 147 -- 3 files changed, 182 insertions(+), 147 deletions(-) diff --git a/gcc/config/rs6000/integer.md b/gcc/config/rs6000/integer.md index 2be1f35..e1520bc 100644 --- a/gcc/config/rs6000/integer.md +++ b/gcc/config/rs6000/integer.md @@ -32,6 +32,168 @@ ; slw[.], srw[.], srawi[.], sraw[.], sld[.], srd[.], sradi[.], srad[.] +(define_insn ashlmode3 + [(set (match_operand:GPR 0 gpc_reg_operand =r) + (ashift:GPR (match_operand:GPR 1 gpc_reg_operand r) + (match_operand:SI 2 gpc_reg_operand r)))] + + slwd %0,%1,%2 + [(set_attr type var_shift_rotate) ; var_delayed_compare +]) + +(define_insn *ashlmode3_dot + [(set (match_operand:CC 3 cc_reg_operand =x,?y) + (compare:CC + (ashift:GPR (match_operand:GPR 1 gpc_reg_operand r,r) + (match_operand:SI 2 gpc_reg_operand r,r)) + (const_int 0))) + (clobber (match_scratch:GPR 0 =r,r))] + MODEmode == Pmode rs6000_gen_cell_microcode + @ + slwd. %0,%1,%2 + # + [(set_attr length 4,8) + (set_attr dot yes,no) + (set_attr type var_shift_rotate) ; var_delayed_compare +]) + +(define_split + [(set (match_operand:CC 3 cc_reg_not_cr0_operand ) + (compare:CC + (ashift:GPR (match_operand:GPR 1 gpc_reg_operand ) + (match_operand:SI 2 gpc_reg_operand )) + (const_int 0))) + (clobber (match_scratch:GPR 0 ))] + (MODEmode == Pmode rs6000_gen_cell_microcode) +(reload_completed) + [(set (match_dup 0) + (ashift:GPR (match_dup 1) + (match_dup 2))) + (set (match_dup 3) + (compare:CC (match_dup 0) + (const_int 0)))] + ) + +(define_insn *ashlmode3_dot2 + [(set (match_operand:CC 3 cc_reg_operand =x,?y) + (compare:CC + (ashift:GPR (match_operand:GPR 1 gpc_reg_operand r,r) + (match_operand:SI 2 gpc_reg_operand r,r)) + (const_int 0))) + (set (match_operand:GPR 0 gpc_reg_operand =r,r) + (ashift:GPR (match_dup 1) + (match_dup 2)))] + MODEmode == Pmode rs6000_gen_cell_microcode + @ + slwd. %0,%1,%2 + # + [(set_attr length 4,8) + (set_attr dot yes,no) + (set_attr type var_shift_rotate) ; var_delayed_compare +]) + +(define_split + [(set (match_operand:CC 3 cc_reg_not_cr0_operand ) + (compare:CC + (ashift:GPR (match_operand:GPR 1 gpc_reg_operand ) + (match_operand:SI 2 gpc_reg_operand )) + (const_int 0))) + (set (match_operand:GPR 0 gpc_reg_operand ) + (ashift:GPR (match_dup 1) + (match_dup 2)))] + (MODEmode == Pmode rs6000_gen_cell_microcode) +(reload_completed) + [(set (match_dup 0) + (ashift:GPR (match_dup 1) + (match_dup 2))) + (set (match_dup 3) + (compare:CC (match_dup 0) + (const_int 0)))] + ) + +(define_insn *ashlmode3_imm + [(set (match_operand:GPR 0 gpc_reg_operand =r) + (ashift:GPR (match_operand:GPR 1 gpc_reg_operand r) + (match_operand:SI 2 const_int_operand i)))] + UINTVAL (operands[2]) GET_MODE_BITSIZE (MODEmode) + slwdi %0,%1,%2 + [(set_attr type shift) ; delayed_compare +]) + +(define_insn *ashlmode3_imm_dot + [(set (match_operand:CC 3 cc_reg_operand =x,?y) + (compare:CC + (ashift:GPR (match_operand:GPR 1 gpc_reg_operand r,r) + (match_operand:SI 2 const_int_operand i,i)) + (const_int 0))) + (clobber (match_scratch:GPR 0 =r,r))] + (UINTVAL (operands[2]) GET_MODE_BITSIZE (MODEmode)) +(MODEmode == Pmode rs6000_gen_cell_microcode) + @ + slwdi. %0,%1,%2 + # + [(set_attr length 4,8) + (set_attr dot yes,no) + (set_attr type shift) ; delayed_compare +]) + +(define_split + [(set (match_operand:CC 3 cc_reg_not_cr0_operand ) + (compare:CC + (ashift:GPR (match_operand:GPR 1 gpc_reg_operand ) + (match_operand:SI 2 const_int_operand )) + (const_int 0))) + (clobber (match_scratch:GPR 0 ))] + ((UINTVAL (operands[2]) GET_MODE_BITSIZE (MODEmode)) +(MODEmode == Pmode rs6000_gen_cell_microcode)) +(reload_completed) + [(set (match_dup 0) + (ashift:GPR (match_dup 1) + (match_dup 2))) + (set (match_dup 3) + (compare:CC (match_dup 0) + (const_int 0)))] + ) + +(define_insn *ashlmode3_imm_dot2 + [(set (match_operand:CC 3 cc_reg_operand =x,?y) + (compare:CC + (ashift:GPR (match_operand:GPR 1 gpc_reg_operand r,r) +
[PATCH 4/6] rs6000: dot for var_shift_rotate/var_delayed_compare
This changes all scheduling descriptions to treat insn type var_shift_rotate with dot=yes the same as var_delayed_compare is treated, and to require dot=no for var_shift_rotate that already was handled. 2013-05-31 Segher Boessenkool seg...@kernel.crashing.org gcc/ * config/rs6000/integer.mdm (ashlmode3, lshrmode3): Delete comment. * config/rs6000/integer.md: Regenerate. * config/rs6000/40x.md: Require dot=no for type=var_shift_rotate; where type=var_delayed_compare, also handle type=var_shift_rotate dot=yes. * config/rs6000/440.md: Ditto. * config/rs6000/476.md: Ditto. * config/rs6000/601.md: Ditto. * config/rs6000/603.md: Ditto. * config/rs6000/6xx.md: Ditto. * config/rs6000/7450.md: Ditto. * config/rs6000/7xx.md: Ditto. * config/rs6000/cell.md: Ditto. * config/rs6000/mpc.md: Ditto. * config/rs6000/power4.md: Ditto. * config/rs6000/power5.md: Ditto. * config/rs6000/power6.md: Ditto. * config/rs6000/power7.md: Ditto. * config/rs6000/rs64.md: Ditto. * config/rs6000/titan.md: Ditto. * config/rs6000/rs6000.c (is_cracked_insn): Add missing TYPE_VAR_DELAYED_COMPARE case. Also handle TYPE_VAR_SHIFT_ROTATE. (insn_must_be_first_in_group): Add missing TYPE_VAR_DELAYED_COMPARE case. (insn_must_be_last_in_group): Ditto. --- gcc/config/rs6000/40x.md | 12 gcc/config/rs6000/440.md | 6 -- gcc/config/rs6000/476.md | 10 +++--- gcc/config/rs6000/601.md | 11 +++ gcc/config/rs6000/603.md | 12 gcc/config/rs6000/6xx.md | 12 gcc/config/rs6000/7450.md | 12 gcc/config/rs6000/7xx.md | 12 gcc/config/rs6000/cell.md | 25 +++-- gcc/config/rs6000/integer.md | 12 ++-- gcc/config/rs6000/integer.mdm | 4 ++-- gcc/config/rs6000/mpc.md | 12 gcc/config/rs6000/power4.md | 9 ++--- gcc/config/rs6000/power5.md | 10 +++--- gcc/config/rs6000/power6.md | 5 - gcc/config/rs6000/power7.md | 10 +++--- gcc/config/rs6000/rs6000.c| 5 + gcc/config/rs6000/rs64.md | 12 gcc/config/rs6000/titan.md| 4 +++- 19 files changed, 129 insertions(+), 66 deletions(-) diff --git a/gcc/config/rs6000/40x.md b/gcc/config/rs6000/40x.md index ab0cf06..2054e65 100644 --- a/gcc/config/rs6000/40x.md +++ b/gcc/config/rs6000/40x.md @@ -37,8 +37,10 @@ (define_insn_reservation ppc403-store 2 iu_40x) (define_insn_reservation ppc403-integer 1 - (and (eq_attr type integer,insert_word,insert_dword,shift,trap,\ -var_shift_rotate,cntlz,exts,isel) + (and (ior (eq_attr type integer,insert_word,insert_dword,shift,trap,\ + cntlz,exts,isel) +(and (eq_attr type var_shift_rotate) + (eq_attr dot no))) (eq_attr cpu ppc403,ppc405)) iu_40x) @@ -53,8 +55,10 @@ (define_insn_reservation ppc403-three 1 iu_40x,iu_40x,iu_40x) (define_insn_reservation ppc403-compare 3 - (and (eq_attr type cmp,fast_compare,compare,delayed_compare,\ -var_delayed_compare) + (and (ior (eq_attr type cmp,fast_compare,compare,delayed_compare,\ + var_delayed_compare) +(and (eq_attr type var_shift_rotate) + (eq_attr dot yes))) (eq_attr cpu ppc403,ppc405)) iu_40x,nothing,bpu_40x) diff --git a/gcc/config/rs6000/440.md b/gcc/config/rs6000/440.md index fe70be0..b4abab5 100644 --- a/gcc/config/rs6000/440.md +++ b/gcc/config/rs6000/440.md @@ -54,8 +54,10 @@ (define_insn_reservation ppc440-fpstore 3 ppc440_issue,ppc440_l_pipe) (define_insn_reservation ppc440-integer 1 - (and (eq_attr type integer,insert_word,insert_dword,shift,\ -trap,var_shift_rotate,cntlz,exts,isel) + (and (ior (eq_attr type integer,insert_word,insert_dword,shift,\ + trap,cntlz,exts,isel) +(and (eq_attr type var_shift_rotate) + (eq_attr dot no))) (eq_attr cpu ppc440)) ppc440_issue,ppc440_i_pipe|ppc440_j_pipe) diff --git a/gcc/config/rs6000/476.md b/gcc/config/rs6000/476.md index 4254659..5448ab2 100644 --- a/gcc/config/rs6000/476.md +++ b/gcc/config/rs6000/476.md @@ -64,7 +64,9 @@ (define_insn_reservation ppc476-fpstore 4 ppc476_lj_pipe) (define_insn_reservation ppc476-simple-integer 1 - (and (eq_attr type integer,insert_word,var_shift_rotate,exts,shift) + (and (ior (eq_attr type integer,insert_word,exts,shift) +(and (eq_attr type var_shift_rotate) + (eq_attr dot no))) (eq_attr cpu ppc476)) ppc476_issue,\ ppc476_i_pipe|ppc476_lj_pipe) @@ -76,8 +78,10 @@ (define_insn_reservation ppc476-complex-integer 1 ppc476_i_pipe) (define_insn_reservation ppc476-compare 4
[PATCH 5/6] rs6000: dot for shift/delayed_compare
Similar, but now for shift and delayed_compare. 2013-05-31 Segher Boessenkool seg...@kernel.crashing.org gcc/ * config/rs6000/integer.mdm (ashlmode3_imm, lshrmode3_imm): Delete comment. * config/rs6000/integer.md: Regenerate. * config/rs6000/40x.md: Require dot=no for type=shift; where type=delayed_compare, also handle type=shift dot=yes. * config/rs6000/440.md: Ditto. * config/rs6000/476.md: Ditto. * config/rs6000/601.md: Ditto. * config/rs6000/603.md: Ditto. * config/rs6000/6xx.md: Ditto. * config/rs6000/7450.md: Ditto. * config/rs6000/7xx.md: Ditto. * config/rs6000/cell.md: Ditto. * config/rs6000/mpc.md: Ditto. * config/rs6000/power4.md: Ditto. * config/rs6000/power5.md: Ditto. * config/rs6000/power6.md: Ditto. * config/rs6000/power7.md: Ditto. * config/rs6000/rs64.md: Ditto. * config/rs6000/titan.md: Ditto. * config/rs6000/rs6000.c (rs6000_adjust_cost): Add missing TYPE_DELAYED_COMPARE case, twice. (is_cracked_insn): Handle TYPE_SHIFT. --- gcc/config/rs6000/40x.md | 6 +++--- gcc/config/rs6000/440.md | 4 ++-- gcc/config/rs6000/476.md | 6 +++--- gcc/config/rs6000/601.md | 6 +++--- gcc/config/rs6000/603.md | 6 +++--- gcc/config/rs6000/6xx.md | 6 +++--- gcc/config/rs6000/7450.md | 6 +++--- gcc/config/rs6000/7xx.md | 6 +++--- gcc/config/rs6000/cell.md | 8 gcc/config/rs6000/e500mc64.md | 2 +- gcc/config/rs6000/integer.md | 36 gcc/config/rs6000/integer.mdm | 12 gcc/config/rs6000/mpc.md | 6 +++--- gcc/config/rs6000/power4.md | 6 +++--- gcc/config/rs6000/power5.md | 7 +++ gcc/config/rs6000/power6.md | 5 - gcc/config/rs6000/power7.md | 6 +++--- gcc/config/rs6000/rs6000.c| 5 - gcc/config/rs6000/rs64.md | 8 gcc/config/rs6000/titan.md| 4 ++-- 20 files changed, 70 insertions(+), 81 deletions(-) diff --git a/gcc/config/rs6000/40x.md b/gcc/config/rs6000/40x.md index 2054e65..ddd0c21 100644 --- a/gcc/config/rs6000/40x.md +++ b/gcc/config/rs6000/40x.md @@ -37,9 +37,9 @@ (define_insn_reservation ppc403-store 2 iu_40x) (define_insn_reservation ppc403-integer 1 - (and (ior (eq_attr type integer,insert_word,insert_dword,shift,trap,\ + (and (ior (eq_attr type integer,insert_word,insert_dword,trap,\ cntlz,exts,isel) -(and (eq_attr type var_shift_rotate) +(and (eq_attr type shift,var_shift_rotate) (eq_attr dot no))) (eq_attr cpu ppc403,ppc405)) iu_40x) @@ -57,7 +57,7 @@ (define_insn_reservation ppc403-three 1 (define_insn_reservation ppc403-compare 3 (and (ior (eq_attr type cmp,fast_compare,compare,delayed_compare,\ var_delayed_compare) -(and (eq_attr type var_shift_rotate) +(and (eq_attr type shift,var_shift_rotate) (eq_attr dot yes))) (eq_attr cpu ppc403,ppc405)) iu_40x,nothing,bpu_40x) diff --git a/gcc/config/rs6000/440.md b/gcc/config/rs6000/440.md index b4abab5..8c18cde 100644 --- a/gcc/config/rs6000/440.md +++ b/gcc/config/rs6000/440.md @@ -54,9 +54,9 @@ (define_insn_reservation ppc440-fpstore 3 ppc440_issue,ppc440_l_pipe) (define_insn_reservation ppc440-integer 1 - (and (ior (eq_attr type integer,insert_word,insert_dword,shift,\ + (and (ior (eq_attr type integer,insert_word,insert_dword,\ trap,cntlz,exts,isel) -(and (eq_attr type var_shift_rotate) +(and (eq_attr type shift,var_shift_rotate) (eq_attr dot no))) (eq_attr cpu ppc440)) ppc440_issue,ppc440_i_pipe|ppc440_j_pipe) diff --git a/gcc/config/rs6000/476.md b/gcc/config/rs6000/476.md index 5448ab2..d68f1a4 100644 --- a/gcc/config/rs6000/476.md +++ b/gcc/config/rs6000/476.md @@ -64,8 +64,8 @@ (define_insn_reservation ppc476-fpstore 4 ppc476_lj_pipe) (define_insn_reservation ppc476-simple-integer 1 - (and (ior (eq_attr type integer,insert_word,exts,shift) -(and (eq_attr type var_shift_rotate) + (and (ior (eq_attr type integer,insert_word,exts) +(and (eq_attr type shift,var_shift_rotate) (eq_attr dot no))) (eq_attr cpu ppc476)) ppc476_issue,\ @@ -80,7 +80,7 @@ (define_insn_reservation ppc476-complex-integer 1 (define_insn_reservation ppc476-compare 4 (and (ior (eq_attr type compare,delayed_compare,fast_compare,mfcr,mfcrf,\ mtcr,mfjmpr,mtjmpr,var_delayed_compare) -(and (eq_attr type var_shift_rotate) +(and (eq_attr type shift,var_shift_rotate) (eq_attr dot yes))) (eq_attr cpu ppc476)) ppc476_issue,\ diff --git a/gcc/config/rs6000/601.md b/gcc/config/rs6000/601.md index 4a7dc3f..06b060f
[PATCH 6/6] rs6000: dot for ashiftrt
Last for now: move ashiftrt to integer.mdm. Also allow the dot of lshrsi3_imm in 64-bit mode, if the shift amount is more than 0. 2013-05-31 Segher Boessenkool seg...@kernel.crashing.org gcc/ * config/rs6000/rs6000.md (ashrsi3, ashrdi3_no_power, ashrdisi3_noppc64be, ashrdi3, ashrdi3_internal1, ashrdi3_internal2, ashrdi3_internal3): Delete. * config/rs6000/integer.mdm (lshrmode3_imm): Add extra dot condition. (ashrmode3, ashrmode3_imm): New. * config/rs6000/integer.md: Regenerate. --- gcc/config/rs6000/integer.md | 164 +- gcc/config/rs6000/integer.mdm | 20 - gcc/config/rs6000/rs6000.md | 201 -- 3 files changed, 179 insertions(+), 206 deletions(-) diff --git a/gcc/config/rs6000/integer.md b/gcc/config/rs6000/integer.md index ce2c240..8da09df 100644 --- a/gcc/config/rs6000/integer.md +++ b/gcc/config/rs6000/integer.md @@ -280,7 +280,7 @@ (define_insn *lshrmode3_imm_dot (const_int 0))) (clobber (match_scratch:GPR 0 =r,r))] (UINTVAL (operands[2]) GET_MODE_BITSIZE (MODEmode)) -(MODEmode == Pmode rs6000_gen_cell_microcode) +((MODEmode == Pmode || UINTVAL (operands[2])) rs6000_gen_cell_microcode) @ srwdi. %0,%1,%2 # @@ -296,7 +296,7 @@ (define_split (const_int 0))) (clobber (match_scratch:GPR 0 ))] ((UINTVAL (operands[2]) GET_MODE_BITSIZE (MODEmode)) -(MODEmode == Pmode rs6000_gen_cell_microcode)) +((MODEmode == Pmode || UINTVAL (operands[2])) rs6000_gen_cell_microcode)) (reload_completed) [(set (match_dup 0) (lshiftrt:GPR (match_dup 1) @@ -316,7 +316,7 @@ (define_insn *lshrmode3_imm_dot2 (lshiftrt:GPR (match_dup 1) (match_dup 2)))] (UINTVAL (operands[2]) GET_MODE_BITSIZE (MODEmode)) -(MODEmode == Pmode rs6000_gen_cell_microcode) +((MODEmode == Pmode || UINTVAL (operands[2])) rs6000_gen_cell_microcode) @ srwdi. %0,%1,%2 # @@ -334,7 +334,7 @@ (define_split (lshiftrt:GPR (match_dup 1) (match_dup 2)))] ((UINTVAL (operands[2]) GET_MODE_BITSIZE (MODEmode)) -(MODEmode == Pmode rs6000_gen_cell_microcode)) +((MODEmode == Pmode || UINTVAL (operands[2])) rs6000_gen_cell_microcode)) (reload_completed) [(set (match_dup 0) (lshiftrt:GPR (match_dup 1) @@ -344,6 +344,162 @@ (define_split (const_int 0)))] ) +(define_insn ashrmode3 + [(set (match_operand:GPR 0 gpc_reg_operand =r) + (ashiftrt:GPR (match_operand:GPR 1 gpc_reg_operand r) + (match_operand:SI 2 gpc_reg_operand r)))] + + srawd %0,%1,%2 + [(set_attr type var_shift_rotate)]) + +(define_insn *ashrmode3_dot + [(set (match_operand:CC 3 cc_reg_operand =x,?y) + (compare:CC + (ashiftrt:GPR (match_operand:GPR 1 gpc_reg_operand r,r) + (match_operand:SI 2 gpc_reg_operand r,r)) + (const_int 0))) + (clobber (match_scratch:GPR 0 =r,r))] + rs6000_gen_cell_microcode + @ + srawd. %0,%1,%2 + # + [(set_attr length 4,8) + (set_attr dot yes,no) + (set_attr type var_shift_rotate)]) + +(define_split + [(set (match_operand:CC 3 cc_reg_not_cr0_operand ) + (compare:CC + (ashiftrt:GPR (match_operand:GPR 1 gpc_reg_operand ) + (match_operand:SI 2 gpc_reg_operand )) + (const_int 0))) + (clobber (match_scratch:GPR 0 ))] + (rs6000_gen_cell_microcode) +(reload_completed) + [(set (match_dup 0) + (ashiftrt:GPR (match_dup 1) + (match_dup 2))) + (set (match_dup 3) + (compare:CC (match_dup 0) + (const_int 0)))] + ) + +(define_insn *ashrmode3_dot2 + [(set (match_operand:CC 3 cc_reg_operand =x,?y) + (compare:CC + (ashiftrt:GPR (match_operand:GPR 1 gpc_reg_operand r,r) + (match_operand:SI 2 gpc_reg_operand r,r)) + (const_int 0))) + (set (match_operand:GPR 0 gpc_reg_operand =r,r) + (ashiftrt:GPR (match_dup 1) + (match_dup 2)))] + rs6000_gen_cell_microcode + @ + srawd. %0,%1,%2 + # + [(set_attr length 4,8) + (set_attr dot yes,no) + (set_attr type var_shift_rotate)]) + +(define_split + [(set (match_operand:CC 3 cc_reg_not_cr0_operand ) + (compare:CC + (ashiftrt:GPR (match_operand:GPR 1 gpc_reg_operand ) + (match_operand:SI 2 gpc_reg_operand )) + (const_int 0))) + (set (match_operand:GPR 0 gpc_reg_operand ) + (ashiftrt:GPR (match_dup 1) + (match_dup 2)))] + (rs6000_gen_cell_microcode) +(reload_completed) + [(set (match_dup 0) + (ashiftrt:GPR (match_dup 1) + (match_dup 2))) + (set (match_dup 3) + (compare:CC (match_dup 0) + (const_int 0)))] + ) + +(define_insn *ashrmode3_imm + [(set (match_operand:GPR 0 gpc_reg_operand =r) + (ashiftrt:GPR (match_operand:GPR 1
Re: default_no_named_section bad default
On May 31, 2013, at 11:13 AM, Mike Stump mikest...@comcast.net wrote:
I think really, we either need to have a default of 0 (to crash in a nice way)
The previous patch does not fix it. I think we need to use 0 instead:
Ok?
New idea:
Index: target.def
===
--- target.def (revision 199270)
+++ target.def (working copy)
@@ -225,7 +225,7 @@ DEFHOOK
(named_section,
,
void, (const char *name, unsigned int flags, tree decl),
- default_no_named_section)
+ 0)
/* Return preferred text (sub)section for function DECL.
Main purpose of this function is to separate cold, normal and hot
Index: varasm.c
===
--- varasm.c(revision 199270)
+++ varasm.c(working copy)
@@ -6042,19 +6042,6 @@ have_global_bss_p (void)
return bss_noswitch_section || targetm.have_switchable_bss_sections;
}
-/* Output assembly to switch to section NAME with attribute FLAGS.
- Four variants for common object file formats. */
-
-void
-default_no_named_section (const char *name ATTRIBUTE_UNUSED,
- unsigned int flags ATTRIBUTE_UNUSED,
- tree decl ATTRIBUTE_UNUSED)
-{
- /* Some object formats don't support named sections at all. The
- front-end should already have flagged this as an error. */
- gcc_unreachable ();
-}
-
Re: default_no_named_section bad default
On Fri, May 31, 2013 at 11:13 AM, Mike Stump mikest...@comcast.net wrote:
So, on darwin, the new tools don't like FDE information when you have:
__Z24default_no_named_sectionPKcjP9tree_node:
LFB588:
LFE588:
in the object file.
$ dwarfdump --eh-frame --verify varasm.o
--
File: varasm.o (x86_64)
--
Verifying EH Frame... error: FDE row for address 0x58f0 is not in
the FDE address range.
0x20e0: FDE
length: 0x001c
CIE_pointer: 0x
start_addr: 0x58f0
__Z24default_no_named_sectionPKcjP9tree_node
range_size: 0x (end_addr = 0x58f0)
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
Instructions: 0x58f0: CFA=rsp+8 rip=[rsp]
which, well, seems reasonable. This causes the static linker to reject it.
Now, one can prune out the pair, but, I think really, we either need to have
a default of 0 (to crash in a nice way), or an assert (to crash in a nice
way). Just falling off then end into space (the next function in the
executable file), seems wrong.
Ok?
PR57438
* varasm.c (default_no_named_section): Assert instead.
This will only fix the GCC source but not other sources which does:
void f(void)
{
__builtin_unreachable();
}
Thanks,
Andrew
Index: varasm.c
===
--- varasm.c(revision 199270)
+++ varasm.c(working copy)
@@ -6052,7 +6052,7 @@ default_no_named_section (const char *na
{
/* Some object formats don't support named sections at all. The
front-end should already have flagged this as an error. */
- gcc_unreachable ();
+ gcc_assert (0);
}
#ifndef TLS_SECTION_ASM_FLAG
RE: [PATCH] pr57457
HI Jeff et al., Forgot to ask in my previous email... Is this Ok for trunk? -Balaji V. Iyer. -Original Message- From: Iyer, Balaji V Sent: Friday, May 31, 2013 2:02 PM To: 'Jeff Law' Cc: gcc-patches@gcc.gnu.org; Steve Ellcey Subject: RE: [PATCH] pr57457 -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- ow...@gcc.gnu.org] On Behalf Of Jeff Law Sent: Friday, May 31, 2013 11:50 AM To: Iyer, Balaji V Cc: gcc-patches@gcc.gnu.org; Steve Ellcey Subject: Re: [PATCH] pr57457 On 05/31/2013 07:54 AM, Iyer, Balaji V wrote: Hello Everyone, This patch will fix a bug reported in PR57457. One of the array notation function was not checking for NULL_TREE before accessing its fields. This patch should fix that issue. A test case is also added. Is this OK for trunk? Here are the ChangeLog Entries: gcc/c/ChangeLog 2013-05-31 Balaji V. Iyer balaji.v.i...@intel.com * c-array-notation.c (is_cilkplus_reduce_builtin): Added a check for NULL_TREE parameter input. gcc/testsuite/ChangeLog 2013-05-31 Balaji V. Iyer balaji.v.i...@intel.com PR c/57457 * c-c++-common/cilk-plus/AN/pr57457.c: New testcase. So what you need to do is explain how you got into this function with a NULL fndecl and why that's OK. Hi Jeff, I looked into it, and there is another function call called inform_declaration, and that does exactly what I did (i.e. check for NULL fundecl before accessing its fields). From what I can tell, fundecl will be NULL_TREE if a function declaration is a function pointer. Thanks, Balaji V. Iyer. ie, it's easy to sprinkle tests for NULL pointers in the sources to change behaviour, but it's more important to look at why we're getting a NULL pointer at any particular point and decide if it's valid or not. You've probably already done the analysis, you just need to make sure to include it in the patch submission. That way the reviewer can easily see the change is correct and the analysis is preserved for future reference. Jeff
Re: default_no_named_section bad default
On May 31, 2013, at 2:56 PM, Andrew Pinski pins...@gmail.com wrote:
This will only fix the GCC source but not other sources which does:
void f(void)
{
__builtin_unreachable();
}
Yes. Speaking of which, so how should this be handled? Imagine we have asm(#
no bytes) before the unreachable. The compiler can't know the size (though,
the linker can), and yet, a good solution handles this as well. Hopefully a
dwarf person can weigh in, as engineering a bad solution is worse than leaving
it broken in my book.
[wwwdocs] correct GFDL spelling
Noticed this typo when doing the 4.8.1 docs. I'd removed this in the top-level file before, and that's fine, but these release-versioned files were wrong. -benjamin2013-05-31 Benjamin Kosnik b...@redhat.com * htdocs/onlinedocs/4.8.0/index.html: Correct to GFDL. * htdocs/onlinedocs/4.8.1/index.html: Same. Index: htdocs/onlinedocs/4.8.0/index.html === RCS file: /cvs/gcc/wwwdocs/htdocs/onlinedocs/4.8.0/index.html,v retrieving revision 1.2 diff -c -p -r1.2 index.html *** htdocs/onlinedocs/4.8.0/index.html 22 Mar 2013 20:21:26 - 1.2 --- htdocs/onlinedocs/4.8.0/index.html 31 May 2013 23:50:48 - *** *** 63,69 in PDF/a or a href=http://gcc.gnu.org/onlinedocs/gcc-4.8.0/libstdc++-api.xml.gz;XML GPL/a or a ! href=http://gcc.gnu.org/onlinedocs/gcc-4.8.0/libstdc++-api-gdl.xml.gz;XML GDL/a or a href=http://gcc.gnu.org/onlinedocs/gcc-4.8.0/libstdc++-api-html.tar.gz;an HTML tarball/a)/li lia href=http://gcc.gnu.org/onlinedocs/gcc-4.8.0/gccgo/;GCCGO 4.8.0 Manual/a (a --- 63,69 in PDF/a or a href=http://gcc.gnu.org/onlinedocs/gcc-4.8.0/libstdc++-api.xml.gz;XML GPL/a or a ! href=http://gcc.gnu.org/onlinedocs/gcc-4.8.0/libstdc++-api-gfdl.xml.gz;XML GFDL/a or a href=http://gcc.gnu.org/onlinedocs/gcc-4.8.0/libstdc++-api-html.tar.gz;an HTML tarball/a)/li lia href=http://gcc.gnu.org/onlinedocs/gcc-4.8.0/gccgo/;GCCGO 4.8.0 Manual/a (a Index: htdocs/onlinedocs/4.8.1/index.html === RCS file: /cvs/gcc/wwwdocs/htdocs/onlinedocs/4.8.1/index.html,v retrieving revision 1.1 diff -c -p -r1.1 index.html *** htdocs/onlinedocs/4.8.1/index.html 31 May 2013 11:04:35 - 1.1 --- htdocs/onlinedocs/4.8.1/index.html 31 May 2013 23:50:57 - *** *** 63,69 in PDF/a or a href=http://gcc.gnu.org/onlinedocs/gcc-4.8.1/libstdc++-api.xml.gz;XML GPL/a or a ! href=http://gcc.gnu.org/onlinedocs/gcc-4.8.1/libstdc++-api-gdl.xml.gz;XML GDL/a or a href=http://gcc.gnu.org/onlinedocs/gcc-4.8.1/libstdc++-api-html.tar.gz;an HTML tarball/a)/li lia href=http://gcc.gnu.org/onlinedocs/gcc-4.8.1/gccgo/;GCCGO 4.8.1 Manual/a (a --- 63,69 in PDF/a or a href=http://gcc.gnu.org/onlinedocs/gcc-4.8.1/libstdc++-api.xml.gz;XML GPL/a or a ! href=http://gcc.gnu.org/onlinedocs/gcc-4.8.1/libstdc++-api-gfdl.xml.gz;XML GFDL/a or a href=http://gcc.gnu.org/onlinedocs/gcc-4.8.1/libstdc++-api-html.tar.gz;an HTML tarball/a)/li lia href=http://gcc.gnu.org/onlinedocs/gcc-4.8.1/gccgo/;GCCGO 4.8.1 Manual/a (a
Re: [Patch] Fix PR56780: --disable-install-libiberty still installs libiberty.a
On Thu, May 30, 2013 at 2:45 PM, Matt Burgess matt...@linuxfromscratch.org wrote: Thanks, Ian. Another step in the contributing guidelines I seem to have missed is to inform you that I don't have write access to the GCC repo. If you could commit this for me please, I'd appreciate it. Committed. Ian
