[PATCH, i386]: Fix PR 60017 Struct not returned correctly
Hello!
There is off-by-one error in classify_argument, when processing
integer atomic types. When bit_offset is 64, two X86_64_INTEGER CLASS
registers should be used.
Attached patch fixes this off-by-one error, so we won't use size = 0
when bit_offset = 64.
2014-02-02 Uros Bizjak ubiz...@gmail.com
PR target/60017
* config/i386/i386.c (classify_argument): Fix handling of bit_offset
when calculating size of integer atomic types.
testsuite/ChangeLog:
2014-02-02 Uros Bizjak ubiz...@gmail.com
PR target/60017
* gcc.c-torture/execute/pr60017.c: New test.
Tested on x86_64-linux-gnu, committed to mainline SVN.
Patch will be backported to other release branches in a couple of days.
Uros.
Index: config/i386/i386.c
===
--- config/i386/i386.c (revision 207393)
+++ config/i386/i386.c (working copy)
@@ -6627,25 +6627,28 @@ classify_argument (enum machine_mode mode, const_t
case CHImode:
case CQImode:
{
- int size = (bit_offset % 64)+ (int) GET_MODE_BITSIZE (mode);
+ int size = bit_offset + (int) GET_MODE_BITSIZE (mode);
- if (size = 32)
+ /* Analyze last 128 bits only. */
+ size = (size - 1) 0x7f;
+
+ if (size 32)
{
classes[0] = X86_64_INTEGERSI_CLASS;
return 1;
}
- else if (size = 64)
+ else if (size 64)
{
classes[0] = X86_64_INTEGER_CLASS;
return 1;
}
- else if (size = 64+32)
+ else if (size 64+32)
{
classes[0] = X86_64_INTEGER_CLASS;
classes[1] = X86_64_INTEGERSI_CLASS;
return 2;
}
- else if (size = 64+64)
+ else if (size 64+64)
{
classes[0] = classes[1] = X86_64_INTEGER_CLASS;
return 2;
Index: testsuite/gcc.c-torture/execute/pr60017.c
===
--- testsuite/gcc.c-torture/execute/pr60017.c (revision 0)
+++ testsuite/gcc.c-torture/execute/pr60017.c (working copy)
@@ -0,0 +1,33 @@
+/* PR target/60017 */
+
+extern void abort (void);
+
+struct S0
+{
+ short m0;
+ short m1;
+};
+
+struct S1
+{
+ unsigned m0:1;
+ char m1[2][2];
+ struct S0 m2[2];
+};
+
+struct S1 x = { 1, {{2, 3}, {4, 5}}, {{6, 7}, {8, 9}} };
+
+struct S1 func (void)
+{
+ return x;
+}
+
+int main (void)
+{
+ struct S1 ret = func ();
+
+ if (ret.m2[1].m1 != 9)
+abort ();
+
+ return 0;
+}
[MIPS] Generalise __mips16_rdhwr handling
This patch generalises the code used to handle __mips16_rdhwr stubs so
that it can be reused in the next patch. I also threw in a couple of
#undefs for macros in surrounding code.
Tested on mips64-linux-gnu and mipsisa64-sde-elf. Applied.
Thanks,
Richard
gcc/
* config/mips/mips.c (mips_one_only_stub): New class.
(mips_need_mips16_rdhwr_p): Replace with...
(mips16_rdhwr_stub): ...this new variable.
(mips16_stub_call_address): New function.
(mips16_rdhwr_one_only_stub): New class.
(mips_expand_thread_pointer): Use mips16_stub_call_address.
(mips_output_mips16_rdhwr): Delete.
(mips_finish_stub): New function.
(mips_code_end): Use it to handle rdhwr stubs.
Index: gcc/config/mips/mips.c
===
--- gcc/config/mips/mips.c 2014-02-02 15:50:25.896853693 +
+++ gcc/config/mips/mips.c 2014-02-02 15:56:14.313401402 +
@@ -275,12 +275,27 @@ #define DECLARE_MIPS_COND(X) MIPS_FP_CON
enum mips_fp_condition {
MIPS_FP_CONDITIONS (DECLARE_MIPS_COND)
};
+#undef DECLARE_MIPS_COND
/* Index X provides the string representation of MIPS_FP_COND_X. */
#define STRINGIFY(X) #X
static const char *const mips_fp_conditions[] = {
MIPS_FP_CONDITIONS (STRINGIFY)
};
+#undef STRINGIFY
+
+/* A class used to control a comdat-style stub that we output in each
+ translation unit that needs it. */
+class mips_one_only_stub {
+public:
+ virtual ~mips_one_only_stub () {}
+
+ /* Return the name of the stub. */
+ virtual const char *get_name () = 0;
+
+ /* Output the body of the function to asm_out_file. */
+ virtual void output_body () = 0;
+};
/* Tuning information that is automatically derived from other sources
(such as the scheduler). */
@@ -626,8 +641,8 @@ struct target_globals *mips16_globals;
and returned from mips_sched_reorder2. */
static int cached_can_issue_more;
-/* True if the output uses __mips16_rdhwr. */
-static bool mips_need_mips16_rdhwr_p;
+/* The stub for __mips16_rdhwr, if used. */
+static mips_one_only_stub *mips16_rdhwr_stub;
/* Index R is the smallest register class that contains register R. */
const enum reg_class mips_regno_to_class[FIRST_PSEUDO_REGISTER] = {
@@ -1606,6 +1621,45 @@ mips16_stub_function (const char *name)
SYMBOL_REF_FLAGS (x) |= (SYMBOL_FLAG_EXTERNAL | SYMBOL_FLAG_FUNCTION);
return x;
}
+
+/* Return a legitimate call address for STUB, given that STUB is a MIPS16
+ support function. */
+
+static rtx
+mips16_stub_call_address (mips_one_only_stub *stub)
+{
+ rtx fn = mips16_stub_function (stub-get_name ());
+ SYMBOL_REF_FLAGS (fn) |= SYMBOL_FLAG_LOCAL;
+ if (!call_insn_operand (fn, VOIDmode))
+fn = force_reg (Pmode, fn);
+ return fn;
+}
+
+/* A stub for moving the thread pointer into TLS_GET_TP_REGNUM. */
+
+class mips16_rdhwr_one_only_stub : public mips_one_only_stub
+{
+ virtual const char *get_name ();
+ virtual void output_body ();
+};
+
+const char *
+mips16_rdhwr_one_only_stub::get_name ()
+{
+ return __mips16_rdhwr;
+}
+
+void
+mips16_rdhwr_one_only_stub::output_body ()
+{
+ fprintf (asm_out_file,
+ \t.set\tpush\n
+ \t.set\tmips32r2\n
+ \t.set\tnoreorder\n
+ \trdhwr\t$3,$29\n
+ \t.set\tpop\n
+ \tj\t$31\n);
+}
/* Return true if symbols of type TYPE require a GOT access. */
@@ -3070,11 +3124,9 @@ mips_expand_thread_pointer (rtx tp)
if (TARGET_MIPS16)
{
- mips_need_mips16_rdhwr_p = true;
- fn = mips16_stub_function (__mips16_rdhwr);
- SYMBOL_REF_FLAGS (fn) |= SYMBOL_FLAG_LOCAL;
- if (!call_insn_operand (fn, VOIDmode))
- fn = force_reg (Pmode, fn);
+ if (!mips16_rdhwr_stub)
+ mips16_rdhwr_stub = new mips16_rdhwr_one_only_stub ();
+ fn = mips16_stub_call_address (mips16_rdhwr_stub);
emit_insn (PMODE_INSN (gen_tls_get_tp_mips16, (tp, fn)));
}
else
@@ -6204,25 +6256,24 @@ mips_end_function_definition (const char
fputs (\n, asm_out_file);
}
}
-
-/* Output a definition of the __mips16_rdhwr function. */
+
+/* If *STUB_PTR points to a stub, output a comdat-style definition for it,
+ then free *STUB_PTR. */
static void
-mips_output_mips16_rdhwr (void)
+mips_finish_stub (mips_one_only_stub **stub_ptr)
{
- const char *name;
+ mips_one_only_stub *stub = *stub_ptr;
+ if (!stub)
+return;
- name = __mips16_rdhwr;
+ const char *name = stub-get_name ();
mips_start_unique_function (name);
mips_start_function_definition (name, false);
- fprintf (asm_out_file,
- \t.set\tpush\n
- \t.set\tmips32r2\n
- \t.set\tnoreorder\n
- \trdhwr\t$3,$29\n
- \t.set\tpop\n
- \tj\t$31\n);
+ stub-output_body ();
mips_end_function_definition (name);
+ delete stub;
+ *stub_ptr = 0;
}
/* Return true if calls to X can use R_MIPS_CALL* relocations. */
@@ -8906,8 +8957,7 @@ mips_file_start (void)
[MIPS] Add __builtin_mips_{get,set}_fcsr
This patch adds built-in functions for getting and setting the value of
the FPU's FCSR. Unlike any of the existing built-in functions, these two
can be used in both MIPS16 and non-MIPS16 code.
The functions are needed for the two patches that I'm about to post,
which fix c11-atomic-exec-5.c for mips64-linux-gnu.
Tested on mips64-linux-gnu and mipsisa64-sde-elf. Applied.
Thanks,
Richard
gcc/
* doc/extend.texi (__builtin_mips_get_fcsr): Document.
(__builtin_mips_set_fcsr): Likewise.
* config/mips/mips-ftypes.def: Add MIPS_VOID_FTYPE_USI and
MIPS_USI_FTYPE_VOID.
* config/mips/mips-protos.h (mips16_expand_get_fcsr): Declare
(mips16_expand_set_fcsr): Likewise.
* config/mips/mips.c (mips16_get_fcsr_stub): New variable.
(mips16_set_fcsr_stub): Likewise.
(mips16_get_fcsr_one_only_stub): New class.
(mips16_set_fcsr_one_only_stub): Likewise.
(mips16_expand_get_fcsr, mips16_expand_set_fcsr): New functions.
(mips_code_end): Output the get_fcsr and set_fcsr stubs, if needed.
(BUILTIN_AVAIL_MIPS16, AVAIL_ALL): New macros.
(hard_float): New availability predicate.
(mips_builtins): Add get_fcsr and set_fcsr.
(mips_expand_builtin): Check BUILTIN_AVAIL_MIPS16.
* config/mips/mips.md (UNSPEC_GET_FCSR, UNSPEC_SET_FCSR): New unspecs.
(GET_FCSR_REGNUM, SET_FCSR_REGNUM): New constants.
(mips_get_fcsr, *mips_get_fcsr, mips_get_fcsr_mips16_mode)
(mips_set_fcsr, *mips_set_fcsr, mips_set_fcsr_mips16_mode): New
patterns.
gcc/testsuite/
* gcc.target/mips/get-fcsr-1.c, gcc.target/mips/get-fcsr-2.c,
gcc.target/mips/set-fcsr-1.c, gcc.target/mips/set-fcsr-2.c: New tests.
Index: gcc/doc/extend.texi
===
--- gcc/doc/extend.texi 2014-02-01 09:13:22.748607746 +
+++ gcc/doc/extend.texi 2014-02-02 14:55:41.179416791 +
@@ -12617,6 +12617,15 @@ GCC provides other MIPS-specific built-i
Insert a @samp{cache} instruction with operands @var{op} and @var{addr}.
GCC defines the preprocessor macro @code{___GCC_HAVE_BUILTIN_MIPS_CACHE}
when this function is available.
+
+@item unsigned int __builtin_mips_get_fcsr (void)
+@itemx void __builtin_mips_set_fcsr (unsigned int @var{value})
+Get and set the contents of the floating-point control and status register
+(FPU control register 31). These functions are only available in hard-float
+code but can be called in both MIPS16 and non-MIPS16 contexts.
+
+@code{__builtin_mips_set_fcsr} can be used to change any bit of the
+register except the condition codes, which GCC assumes are preserved.
@end table
@node MSP430 Built-in Functions
Index: gcc/config/mips/mips-ftypes.def
===
--- gcc/config/mips/mips-ftypes.def 2014-02-02 14:33:33.587385903 +
+++ gcc/config/mips/mips-ftypes.def 2014-02-02 14:40:21.504714501 +
@@ -69,6 +69,8 @@ DEF_MIPS_FTYPE (1, (SF, V2SF))
DEF_MIPS_FTYPE (2, (UDI, UDI, UDI))
DEF_MIPS_FTYPE (2, (UDI, UV2SI, UV2SI))
+DEF_MIPS_FTYPE (1, (USI, VOID))
+
DEF_MIPS_FTYPE (2, (UV2SI, UV2SI, UQI))
DEF_MIPS_FTYPE (2, (UV2SI, UV2SI, UV2SI))
@@ -122,5 +124,6 @@ DEF_MIPS_FTYPE (2, (V8QI, V8QI, V8QI))
DEF_MIPS_FTYPE (2, (VOID, SI, CVPOINTER))
DEF_MIPS_FTYPE (2, (VOID, SI, SI))
+DEF_MIPS_FTYPE (1, (VOID, USI))
DEF_MIPS_FTYPE (2, (VOID, V2HI, V2HI))
DEF_MIPS_FTYPE (2, (VOID, V4QI, V4QI))
Index: gcc/config/mips/mips-protos.h
===
--- gcc/config/mips/mips-protos.h 2014-02-02 14:33:33.587385903 +
+++ gcc/config/mips/mips-protos.h 2014-02-02 14:40:21.498714452 +
@@ -345,6 +345,8 @@ extern bool lwsp_swsp_address_p (rtx, en
extern bool m16_based_address_p (rtx, enum machine_mode,
int (*)(rtx_def*, machine_mode));
extern rtx mips_expand_thread_pointer (rtx);
+extern void mips16_expand_get_fcsr (rtx);
+extern void mips16_expand_set_fcsr (rtx);
extern bool mips_eh_uses (unsigned int);
extern bool mips_epilogue_uses (unsigned int);
Index: gcc/config/mips/mips.c
===
--- gcc/config/mips/mips.c 2014-02-02 14:38:14.311668731 +
+++ gcc/config/mips/mips.c 2014-02-02 14:40:21.502714485 +
@@ -641,8 +641,10 @@ struct target_globals *mips16_globals;
and returned from mips_sched_reorder2. */
static int cached_can_issue_more;
-/* The stub for __mips16_rdhwr, if used. */
+/* The stubs for various MIPS16 support functions, if used. */
static mips_one_only_stub *mips16_rdhwr_stub;
+static mips_one_only_stub *mips16_get_fcsr_stub;
+static mips_one_only_stub *mips16_set_fcsr_stub;
/* Index R is the smallest register class that contains register R. */
const enum reg_class mips_regno_to_class[FIRST_PSEUDO_REGISTER] = {
@@ -1660,6 +1662,48 @@
[MIPS] Implement TARGET_ATOMIC_ASSIGN_EXPAND_FENV
This patch implements TARGET_ATOMIC_ASSIGN_EXPAND_FENV for MIPS,
along the lines of the SSE handling.
The #defines aren't very elegant. I might try to do something better
for 4.10, such as add a .def file.
Tested on mips64-linux-gnu and mipsisa64-sde-elf. It fixes the
c11-atomic-exec-5.c failures for o32 on mips64-linux-gnu. n32 and n64
still fail because long double operations don't raise exceptions,
but the next patch fixes that. Applied.
Thanks,
Richard
gcc/
* config/mips/mips.c (MIPS_GET_FCSR, MIPS_SET_FCSR): New macros.
(mips_atomic_assign_expand_fenv): New function.
(TARGET_ATOMIC_ASSIGN_EXPAND_FENV): Define.
Index: gcc/config/mips/mips.c
===
--- gcc/config/mips/mips.c 2014-02-02 14:40:21.502714485 +
+++ gcc/config/mips/mips.c 2014-02-02 14:57:17.700235051 +
@@ -13938,7 +13938,9 @@ #define CODE_FOR_loongson_psubush CODE_F
#define CODE_FOR_loongson_psubusb CODE_FOR_ussubv8qi3
static const struct mips_builtin_description mips_builtins[] = {
+#define MIPS_GET_FCSR 0
DIRECT_BUILTIN (get_fcsr, MIPS_USI_FTYPE_VOID, hard_float),
+#define MIPS_SET_FCSR 1
DIRECT_NO_TARGET_BUILTIN (set_fcsr, MIPS_VOID_FTYPE_USI, hard_float),
DIRECT_BUILTIN (pll_ps, MIPS_V2SF_FTYPE_V2SF_V2SF, paired_single),
@@ -18844,6 +18846,49 @@ mips_case_values_threshold (void)
else
return default_case_values_threshold ();
}
+
+/* Implement TARGET_ATOMIC_ASSIGN_EXPAND_FENV. */
+
+static void
+mips_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
+{
+ if (!TARGET_HARD_FLOAT_ABI)
+return;
+ tree exceptions_var = create_tmp_var (MIPS_ATYPE_USI, NULL);
+ tree fcsr_orig_var = create_tmp_var (MIPS_ATYPE_USI, NULL);
+ tree fcsr_mod_var = create_tmp_var (MIPS_ATYPE_USI, NULL);
+ tree get_fcsr = mips_builtin_decls[MIPS_GET_FCSR];
+ tree set_fcsr = mips_builtin_decls[MIPS_SET_FCSR];
+ tree get_fcsr_hold_call = build_call_expr (get_fcsr, 0);
+ tree hold_assign_orig = build2 (MODIFY_EXPR, MIPS_ATYPE_USI,
+ fcsr_orig_var, get_fcsr_hold_call);
+ tree hold_mod_val = build2 (BIT_AND_EXPR, MIPS_ATYPE_USI, fcsr_orig_var,
+ build_int_cst (MIPS_ATYPE_USI, 0xf003));
+ tree hold_assign_mod = build2 (MODIFY_EXPR, MIPS_ATYPE_USI,
+fcsr_mod_var, hold_mod_val);
+ tree set_fcsr_hold_call = build_call_expr (set_fcsr, 1, fcsr_mod_var);
+ tree hold_all = build2 (COMPOUND_EXPR, MIPS_ATYPE_USI,
+ hold_assign_orig, hold_assign_mod);
+ *hold = build2 (COMPOUND_EXPR, void_type_node, hold_all,
+ set_fcsr_hold_call);
+
+ *clear = build_call_expr (set_fcsr, 1, fcsr_mod_var);
+
+ tree get_fcsr_update_call = build_call_expr (get_fcsr, 0);
+ *update = build2 (MODIFY_EXPR, MIPS_ATYPE_USI,
+ exceptions_var, get_fcsr_update_call);
+ tree set_fcsr_update_call = build_call_expr (set_fcsr, 1, fcsr_orig_var);
+ *update = build2 (COMPOUND_EXPR, void_type_node, *update,
+ set_fcsr_update_call);
+ tree atomic_feraiseexcept
+= builtin_decl_implicit (BUILT_IN_ATOMIC_FERAISEEXCEPT);
+ tree int_exceptions_var = fold_convert (integer_type_node,
+ exceptions_var);
+ tree atomic_feraiseexcept_call = build_call_expr (atomic_feraiseexcept,
+ 1, int_exceptions_var);
+ *update = build2 (COMPOUND_EXPR, void_type_node, *update,
+ atomic_feraiseexcept_call);
+}
/* Initialize the GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
@@ -19078,6 +19123,9 @@ #define TARGET_VECTORIZE_VEC_PERM_CONST_
#undef TARGET_CASE_VALUES_THRESHOLD
#define TARGET_CASE_VALUES_THRESHOLD mips_case_values_threshold
+#undef TARGET_ATOMIC_ASSIGN_EXPAND_FENV
+#define TARGET_ATOMIC_ASSIGN_EXPAND_FENV mips_atomic_assign_expand_fenv
+
struct gcc_target targetm = TARGET_INITIALIZER;
#include gt-mips.h
[MIPS] Use soft-fp for libgcc floating-point routines
This patch (finally!) moves MIPS over to the soft-fp routines. The main
advantage is that we now handle 128-bit long-double exceptions properly
on hard-float targets.
This also removes the last use of TPBIT in libgcc. It might be worth
removing support for that at some point -- including the associated
libgcc2.c routines -- but probably not at this stage of 4.9.
Tested on mips64-linux-gnu and mipsisa64-sde-elf. It fixes the
c11-atomic-exec-5.c failures for n32 and n64. I also checked that
the exported libgcc.so symbols were unchanged for all 3 GNU/Linux ABIs,
just to be sure. I also did some spot checking of FCSR values after
long-double operations, as well as checking that SIGFPE was raised
for long-double operations when the associated enable bit was set.
Applied.
Thanks,
Richard
libgcc/
* configure.ac: Check __mips64 when setting host_address.
* configure: Regenerate.
* config.host (mips*-*-*): Add t-softfp-sfdf, mips/t-softfp-tf,
mips/t-mips64 and t-softfp.
(mips*-*-linux*): Don't add mips/t-tpbit.
* config/mips/t-mips (LIB2_SIDITI_CONV_FUNCS, FPBIT, FPBIT_CFLAGS)
(DPBIT, DPBIT_CFLAGS): Delete.
* config/mips/sfp-machine.h: New file.
* config/mips/t-mips64: Likewise.
* config/mips/t-softfp-tf: Likewise.
* config/mips/t-tpbit: Delete.
Index: libgcc/configure.ac
===
--- libgcc/configure.ac 2014-02-02 08:29:06.963467177 +
+++ libgcc/configure.ac 2014-02-02 08:37:35.15815 +
@@ -279,9 +279,11 @@ AC_CACHE_CHECK([whether assembler suppor
[libgcc_cv_cfi=yes],
[libgcc_cv_cfi=no])])
-# Check 32bit or 64bit
+# Check 32bit or 64bit. In the case of MIPS, this really determines the
+# word size rather than the address size.
cat conftest.c EOF
-#if defined(__x86_64__) || (!defined(__i386__) defined(__LP64__))
+#if defined(__x86_64__) || (!defined(__i386__) defined(__LP64__)) \
+|| defined(__mips64)
host_address=64
#else
host_address=32
Index: libgcc/config.host
===
--- libgcc/config.host 2014-02-02 08:29:06.963467177 +
+++ libgcc/config.host 2014-02-02 08:37:35.130153075 +
@@ -140,8 +140,16 @@ microblaze*-*-*)
cpu_type=microblaze
;;
mips*-*-*)
+ # All MIPS targets provide a full set of FP routines.
cpu_type=mips
- tmake_file=mips/t-mips
+ tmake_file=mips/t-mips t-softfp-sfdf
+ if test ${ac_cv_sizeof_long_double} = 16; then
+ tmake_file=${tmake_file} mips/t-softfp-tf
+ fi
+ if test ${host_address} = 64; then
+ tmake_file=${tmake_file} mips/t-mips64
+ fi
+ tmake_file=${tmake_file} t-softfp
;;
nds32*-*)
cpu_type=nds32
@@ -776,9 +784,6 @@ mips*-*-linux*) # Linux MIPS,
either
;;
esac
md_unwind_header=mips/linux-unwind.h
- if test ${ac_cv_sizeof_long_double} = 16; then
- tmake_file=${tmake_file} mips/t-tpbit
- fi
;;
mips*-sde-elf*)
tmake_file=$tmake_file mips/t-crtstuff mips/t-mips16
Index: libgcc/config/mips/t-mips
===
--- libgcc/config/mips/t-mips 2014-02-02 08:29:06.963467177 +
+++ libgcc/config/mips/t-mips 2014-02-02 08:37:35.138153148 +
@@ -1,8 +1,1 @@
-LIB2_SIDITI_CONV_FUNCS = yes
-
-FPBIT = true
-FPBIT_CFLAGS = -DQUIET_NAN_NEGATED
-DPBIT = true
-DPBIT_CFLAGS = -DQUIET_NAN_NEGATED
-
LIB2ADD_ST += $(srcdir)/config/mips/lib2funcs.c
Index: libgcc/config/mips/sfp-machine.h
===
--- /dev/null 2014-01-30 08:06:21.701666182 +
+++ libgcc/config/mips/sfp-machine.h2014-02-02 08:57:55.358362947 +
@@ -0,0 +1,178 @@
+/* softfp machine description for MIPS.
+ Copyright (C) 2009-2014 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+http://www.gnu.org/licenses/. */
+
+#ifdef __mips64
+#define _FP_W_TYPE_SIZE64
+#define _FP_W_TYPE
Re: PR ipa/59831 (ipa-cp devirt issues)
Hi,
since we hit can of worms here, I decided to decompose the changes into minimal
patches.
This is first one fixing small bug introduced last July in Martin's change to
add
a flags to passthrough about the type preservation. This does not affect
gcc-4.8
Bootstrapped/regtested x86_64-linux, will comit it shortly.
* ipa-prop.c (update_jump_functions_after_inlining): When type is not
preserverd by passthrough, do not propagate the type.
Index: ipa-prop.c
===
--- ipa-prop.c (revision 207393)
+++ ipa-prop.c (working copy)
@@ -2359,10 +2359,13 @@ update_jump_functions_after_inlining (st
dst-type = IPA_JF_UNKNOWN;
break;
case IPA_JF_KNOWN_TYPE:
- ipa_set_jf_known_type (dst,
-ipa_get_jf_known_type_offset (src),
-ipa_get_jf_known_type_base_type (src),
-ipa_get_jf_known_type_base_type (src));
+ if (ipa_get_jf_pass_through_type_preserved (dst))
+ ipa_set_jf_known_type (dst,
+ ipa_get_jf_known_type_offset (src),
+ ipa_get_jf_known_type_base_type
(src),
+ ipa_get_jf_known_type_base_type
(src));
+ else
+ dst-type = IPA_JF_UNKNOWN;
break;
case IPA_JF_CONST:
ipa_set_jf_cst_copy (dst, src);
Index: testsuite/g++.dg/ipa/devirt-21.C
===
--- testsuite/g++.dg/ipa/devirt-21.C(revision 0)
+++ testsuite/g++.dg/ipa/devirt-21.C(revision 0)
@@ -0,0 +1,41 @@
+/* { dg-do run} */
+/* { dg-options -O3 -fno-early-inlining -fno-ipa-sra -fdump-ipa-cp } */
+/* Main purpose is to verify that we do not produce wrong devirtualization to
+ C::m_fn1. We currently devirtualize to B::m_fn1, so check that. */
+#include stdlib.h
+class A {
+public:
+ unsigned length;
+};
+class B {};
+class MultiTermDocs : public virtual B {
+protected:
+ A readerTermDocs;
+ A subReaders;
+ virtual B *m_fn1(int *) {}
+ virtual inline ~MultiTermDocs();
+ void wrap(void)
+ {
+ m_fn1(NULL);
+ }
+};
+class C : MultiTermDocs {
+ B *m_fn1(int *);
+};
+MultiTermDocs::~MultiTermDocs() {
+ wrap ();
+ if (readerTermDocs) {
+B *a;
+for (unsigned i = 0; i subReaders.length; i++)
+ (a != 0);
+ }
+}
+
+B *C::m_fn1(int *) { abort (); }
+
+main()
+{
+ class C c;
+}
+/* { dg-final { scan-ipa-dump Discovered a virtual call to cp } } */
+/* { dg-final { cleanup-ipa-dump cp } } */
Re: [PATCH, i386]: Fix PR 60017 Struct not returned correctly
On Sun, Feb 02, 2014 at 04:31:35PM +0100, Uros Bizjak wrote: There is off-by-one error in classify_argument, when processing integer atomic types. When bit_offset is 64, two X86_64_INTEGER CLASS registers should be used. Attached patch fixes this off-by-one error, so we won't use size = 0 when bit_offset = 64. 2014-02-02 Uros Bizjak ubiz...@gmail.com PR target/60017 * config/i386/i386.c (classify_argument): Fix handling of bit_offset when calculating size of integer atomic types. testsuite/ChangeLog: 2014-02-02 Uros Bizjak ubiz...@gmail.com PR target/60017 * gcc.c-torture/execute/pr60017.c: New test. Tested on x86_64-linux-gnu, committed to mainline SVN. Isn't it something for -Wpsabi warning, or is purely a bug, where the affected structures just aren't passed correctly that way at all (arguments/return values?), meaning that the value passed by caller doesn't match the value seen by callee or vice versa? Does it affect passing of following arguments? If yes, that could still be worthwhile to warn about, say for programs that pass such structures and something after that as parameters, but don't actually look at the problematic structure argument or only look at the first few bytes from it, just care about the next argument. Jakub
Re: [PATCH, i386]: Fix PR 60017 Struct not returned correctly
On Sun, Feb 2, 2014 at 5:35 PM, Jakub Jelinek ja...@redhat.com wrote: On Sun, Feb 02, 2014 at 04:31:35PM +0100, Uros Bizjak wrote: There is off-by-one error in classify_argument, when processing integer atomic types. When bit_offset is 64, two X86_64_INTEGER CLASS registers should be used. Attached patch fixes this off-by-one error, so we won't use size = 0 when bit_offset = 64. 2014-02-02 Uros Bizjak ubiz...@gmail.com PR target/60017 * config/i386/i386.c (classify_argument): Fix handling of bit_offset when calculating size of integer atomic types. testsuite/ChangeLog: 2014-02-02 Uros Bizjak ubiz...@gmail.com PR target/60017 * gcc.c-torture/execute/pr60017.c: New test. Tested on x86_64-linux-gnu, committed to mainline SVN. Isn't it something for -Wpsabi warning, or is purely a bug, where the affected structures just aren't passed correctly that way at all (arguments/return values?), meaning that the value passed by caller doesn't match the value seen by callee or vice versa? Does it affect passing of following arguments? If yes, that could still be worthwhile to warn about, say for programs that pass such structures and something after that as parameters, but don't actually look at the problematic structure argument or only look at the first few bytes from it, just care about the next argument. It is purely a bug. We expect the value in a 32bit register, so in effect, top 32bits are stripped from the 64bit return reg in the calling function. As can be seen from the testcase, the value value is still loaded in 64bit register in the called function. Uros.
PATCH: PR middle-end/60013: [4.9 Regression] Build of 176.gcc from CPU2000 loops in cc1 starting with r207231
Hi,
Before r207231, we generate:
;; basic block 12, loop depth 0
;; Invalid sum of incoming frequencies 8210, should be 4809
;;pred: 4
;;13
;;5
;;6
;;7
;;10
;;11
_33 = _setjmp (float_error);
if (_33 != 0)
goto bb 13;
else
goto bb 9;
;;succ: 13
;;9
;; basic block 13, loop depth 0
;;pred: 12
copy_node (arg1_7(D));
goto bb 9;
;;succ: 12
;;9
;; basic block 14, loop depth 0
;;pred: 5
;;11
;;7
;;9
;;3
;;6
;;4
# _2 = PHI t_26(5), arg2_11(D)(11), t_28(7), 0B(9), t_15(D)(3), _19(6),
t_23(4)
L21:
return _2;
;;succ: EXIT
}
After r207231, we have
;; basic block 12, loop depth 0
;;pred: 11
;;13
_34 = _setjmp (float_error);
if (_34 != 0)
goto bb 14;
else
goto bb 9;
;;succ: 14
;;9
;; basic block 13, loop depth 0
;;pred: 4
;;14
;;5
;;6
;;7
;;10
ABNORMAL_DISPATCHER (0);
;;succ: 12
;; basic block 14, loop depth 0
;;pred: 12
copy_node (arg1_8(D));
goto bb 9;
;;succ: 9
;;13
;; basic block 15, loop depth 0
;;pred: 5
;;11
;;7
;;9
;;3
;;6
;;4
# _2 = PHI t_27(5), arg2_12(D)(11), t_29(7), 0B(9), t_16(D)(3), _20(6),
t_24(4)
L21:
return _2;
;;succ: EXIT
}
basic block 13 only contains
ABNORMAL_DISPATCHER (0);
which is an internal function and will be expanded to empty block:
;; Generating RTL for gimple basic block 13
;; ABNORMAL_DISPATCHER (0);
(nil)
compute_bb_predicates goes into an infinite loop due to
;; basic block 13, loop depth 0
;;pred: 4
;;14
;;5
;;6
;;7
;;10
ABNORMAL_DISPATCHER (0);
;;succ: 12
This patch changes compute_bb_predicates to skip basic blocks containing
IFN_ABNORMAL_DISPATCHER and updates estimate_function_body_sizes to use
Use false predicate if aux is NULL.
Tested on Linux/x86-64 with:
--enable-languages=c,c++,fortran,java,lto,objc,ada,obj-c++,go
and make check RUNTESTFLAGS=--target_board='unix{-m32,}'. OK for
trunk?
Thanks.
H.J.
--
gcc/
2014-02-02 H.J. Lu hongjiu...@intel.com
PR middle-end/60013
* basic-block.h (bb_has_abnormal_dispatcher): New prototype.
* ipa-inline-analysis.c (compute_bb_predicates): Skip basic block
containing IFN_ABNORMAL_DISPATCHER when computing predicate.
(estimate_function_body_sizes): Use false predicate if aux is
NULL.
* tree-cfg.c (bb_has_abnormal_dispatcher): New functiom.
gcc/testsuite/
2014-02-02 H.J. Lu hongjiu...@intel.com
PR middle-end/60013
* gcc.dg/torture/pr60013.c: New test.
diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 82729b4..4cb0238 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -942,6 +942,9 @@ extern void default_rtl_profile (void);
typedef struct gcov_working_set_info gcov_working_set_t;
extern gcov_working_set_t *find_working_set (unsigned pct_times_10);
+/* In tree-cfg.c. */
+extern bool bb_has_abnormal_dispatcher (basic_block bb);
+
/* Check tha probability is sane. */
static inline void
diff --git a/gcc/ipa-inline-analysis.c b/gcc/ipa-inline-analysis.c
index ffb8264..dc3ebe1 100644
--- a/gcc/ipa-inline-analysis.c
+++ b/gcc/ipa-inline-analysis.c
@@ -1860,21 +1860,24 @@ compute_bb_predicates (struct cgraph_node *node,
struct predicate p = false_predicate ();
edge e;
edge_iterator ei;
- FOR_EACH_EDGE (e, ei, bb-preds)
- {
- if (e-src-aux)
- {
- struct predicate this_bb_predicate
- = *(struct predicate *) e-src-aux;
- if (e-aux)
- this_bb_predicate
- = and_predicates (summary-conds, this_bb_predicate,
- (struct predicate *) e-aux);
- p = or_predicates (summary-conds, p, this_bb_predicate);
- if (true_predicate_p (p))
- break;
- }
- }
+ if (!bb_has_abnormal_dispatcher (bb))
+ FOR_EACH_EDGE (e, ei, bb-preds)
+ {
+ if (e-src-aux)
+ {
+ struct predicate this_bb_predicate
+ = *(struct predicate *) e-src-aux;
+ if (e-aux)
+ this_bb_predicate
+ = and_predicates (summary-conds,
+ this_bb_predicate,
+
Re: [C,C++] integer constants in attribute arguments
On Sat, 1 Feb 2014, Marc Glisse wrote: Ping http://gcc.gnu.org/ml/gcc-patches/2014-01/msg01168.html As I understand it, this is only relevant to C++ (in C you should have an INTEGER_CST here, and if you don't then default_conversion won't give you one), so would best be reviewed by Jason not me. -- Joseph S. Myers jos...@codesourcery.com
Re: [C,C++] integer constants in attribute arguments
On Sun, 2 Feb 2014, Joseph S. Myers wrote: On Sat, 1 Feb 2014, Marc Glisse wrote: Ping http://gcc.gnu.org/ml/gcc-patches/2014-01/msg01168.html As I understand it, this is only relevant to C++ (in C you should have an INTEGER_CST here, and if you don't then default_conversion won't give you one), so would best be reviewed by Jason not me. I agree, I just wanted to make sure you weren't opposed to using default_conversion in C as well and were ok with my explanation of why I was testing FUNCTION_DECL for some attributes (in C++, default_conversion will accept anything, so I am doing that for the sake of C). An alternative could be to have a helper function that does nothing in C and calls default_conversion in C++. Or make the C version of default_conversion return its argument unchanged instead of asserting when it sees an unexpected tree. I'll wait for Jason, thanks. -- Marc Glisse
[PATCH][AARCH64]Resolves testsuite/gcc.target/aarch64/aapcs64/ret-func-1.c regression
Hi all,
This is a simple patch which resolves
testsuite/gcc.target/aarch64/aapcs64/ret-func-1.c regression.
Basically, no special operations are needed for vector type i32in128 or
f32in64 in big-endian mode any more due the aarch64 back-end change.
Okay for trunk?
Kind regards,
Renlin Li
diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/validate_memory.h b/gcc/testsuite/gcc.target/aarch64/aapcs64/validate_memory.h
index ac94625..24431c6 100644
--- a/gcc/testsuite/gcc.target/aarch64/aapcs64/validate_memory.h
+++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/validate_memory.h
@@ -60,8 +60,6 @@ validate_memory (void *mem1, char *mem2, size_t size, enum structure_type type)
case i8in64:
case i16in64:
case i32in64:
-case f32in64:
-case i32in128:
for (i = 0; i size; i += element_size[type])
{
if (memcmp (cmem1 + i,
@@ -72,6 +70,8 @@ validate_memory (void *mem1, char *mem2, size_t size, enum structure_type type)
return 0;
break;
#endif
+case f32in64:
+case i32in128:
default:
break;
}
Re: [MIPS] Use soft-fp for libgcc floating-point routines
On Sun, 2 Feb 2014, Richard Sandiford wrote: This patch (finally!) moves MIPS over to the soft-fp routines. The main advantage is that we now handle 128-bit long-double exceptions properly on hard-float targets. Thanks for doing this. At some point I intend to add soft-fp support for after-rounding tininess detection, so this can then get underflow exceptions exactly right (per IEEE 754, all binary floating-point operations need to detect tininess in the same way, and MIPS is an after-rounding architecture, and soft-fp only does before-rounding at present - this is also wrong for x86 __float128, as x86 is also after-rounding). I'll also update glibc (ports/sysdeps/mips/math-tests.h) to know that exceptions and rounding modes for long double are supported for MIPS with GCC = 4.9 (once I've done the after-rounding support, otherwise some fma tests will fail). I note that you're not using t-softfp-excl. Logically, it's best to use the libgcc2.c functions in the cases where hardware floating point is involved (when they are providing conversions to/from DImode/TImode, and to/from unsigned, based on conversions to/from a narrower type or to/from signed, and the floating-point type involved is a hardware type), because that will be more efficient than a fully software implementation. But when building for a soft-float multilib, and in any case when TFmode is involved, it's best to use the soft-fp functions rather than the libgcc2.c versions. Thus: * For soft-float, what you have seems optimal. * For hard-float o32, using t-softfp-excl would be best. * For hard-float n32 and n64, what's optimal would be a hybrid the makefile code doesn't yet support, so would need custom handling in MIPS fragments; see above, and the t-softfp comment This list is taken from mklibgcc.in and doesn't presently allow for 64-bit targets where si should become di and di should become ti.. How much this matters (and indeed how much it matters for hard-float o32) depends on which of the conversions involving SFmode / DFmode do actually end up using a libgcc function (for which the libgcc2.c version would be better than the soft-fp version). Obviously any change to this would best be tested including comparisons of the libgcc_s.so exported symbols before and after the patch, like you did for the present patch. -- Joseph S. Myers jos...@codesourcery.com
Re: [C,C++] integer constants in attribute arguments
On Sun, 2 Feb 2014, Marc Glisse wrote: An alternative could be to have a helper function that does nothing in C and calls default_conversion in C++. Or make the C version of default_conversion return its argument unchanged instead of asserting when it sees an unexpected tree. Well, in principle I'm dubious about the cases where different implementations of functions with the same name are used in c-family code; I'd prefer an actual C/C++ set of langhooks, with clearly defined semantics based on what the c-family users need, where the hook used (c_family_lang_hooks.convert_attribute_argument or whatever) would indeed do nothing for C. But more than just default_conversion is involved there, and default_conversion is already used from c-family code, so this isn't an objection to this patch. -- Joseph S. Myers jos...@codesourcery.com
Re: PATCH: PR middle-end/60013: [4.9 Regression] Build of 176.gcc from CPU2000 loops in cc1 starting with r207231
basic block 13 only contains
ABNORMAL_DISPATCHER (0);
which is an internal function and will be expanded to empty block:
;; Generating RTL for gimple basic block 13
;; ABNORMAL_DISPATCHER (0);
(nil)
compute_bb_predicates goes into an infinite loop due to
OK, how does it make compute_bb_predicates to go into an infinite loop?
I do not see why we would need to specifically ignore BBs with the dispatcher
here, bug it looks like some big in the termination of dataflow perhaps related
to internal function?
I will try to check.
Honza
;; basic block 13, loop depth 0
;;pred: 4
;;14
;;5
;;6
;;7
;;10
ABNORMAL_DISPATCHER (0);
;;succ: 12
This patch changes compute_bb_predicates to skip basic blocks containing
IFN_ABNORMAL_DISPATCHER and updates estimate_function_body_sizes to use
Use false predicate if aux is NULL.
Tested on Linux/x86-64 with:
--enable-languages=c,c++,fortran,java,lto,objc,ada,obj-c++,go
and make check RUNTESTFLAGS=--target_board='unix{-m32,}'. OK for
trunk?
Thanks.
H.J.
--
gcc/
2014-02-02 H.J. Lu hongjiu...@intel.com
PR middle-end/60013
* basic-block.h (bb_has_abnormal_dispatcher): New prototype.
* ipa-inline-analysis.c (compute_bb_predicates): Skip basic block
containing IFN_ABNORMAL_DISPATCHER when computing predicate.
(estimate_function_body_sizes): Use false predicate if aux is
NULL.
* tree-cfg.c (bb_has_abnormal_dispatcher): New functiom.
gcc/testsuite/
2014-02-02 H.J. Lu hongjiu...@intel.com
PR middle-end/60013
* gcc.dg/torture/pr60013.c: New test.
diff --git a/gcc/basic-block.h b/gcc/basic-block.h
index 82729b4..4cb0238 100644
--- a/gcc/basic-block.h
+++ b/gcc/basic-block.h
@@ -942,6 +942,9 @@ extern void default_rtl_profile (void);
typedef struct gcov_working_set_info gcov_working_set_t;
extern gcov_working_set_t *find_working_set (unsigned pct_times_10);
+/* In tree-cfg.c. */
+extern bool bb_has_abnormal_dispatcher (basic_block bb);
+
/* Check tha probability is sane. */
static inline void
diff --git a/gcc/ipa-inline-analysis.c b/gcc/ipa-inline-analysis.c
index ffb8264..dc3ebe1 100644
--- a/gcc/ipa-inline-analysis.c
+++ b/gcc/ipa-inline-analysis.c
@@ -1860,21 +1860,24 @@ compute_bb_predicates (struct cgraph_node *node,
struct predicate p = false_predicate ();
edge e;
edge_iterator ei;
- FOR_EACH_EDGE (e, ei, bb-preds)
- {
- if (e-src-aux)
- {
- struct predicate this_bb_predicate
- = *(struct predicate *) e-src-aux;
- if (e-aux)
- this_bb_predicate
- = and_predicates (summary-conds, this_bb_predicate,
- (struct predicate *) e-aux);
- p = or_predicates (summary-conds, p, this_bb_predicate);
- if (true_predicate_p (p))
- break;
- }
- }
+ if (!bb_has_abnormal_dispatcher (bb))
+ FOR_EACH_EDGE (e, ei, bb-preds)
+ {
+ if (e-src-aux)
+ {
+ struct predicate this_bb_predicate
+ = *(struct predicate *) e-src-aux;
+ if (e-aux)
+ this_bb_predicate
+ = and_predicates (summary-conds,
+ this_bb_predicate,
+ (struct predicate *) e-aux);
+ p = or_predicates (summary-conds, p,
+this_bb_predicate);
+ if (true_predicate_p (p))
+ break;
+ }
+ }
if (false_predicate_p (p))
gcc_assert (!bb-aux);
else
@@ -2703,7 +2706,10 @@ estimate_function_body_sizes (struct cgraph_node
*node, bool early)
for (i = 0; i loop-num_nodes; i++)
{
gimple_stmt_iterator gsi;
- bb_predicate = *(struct predicate *) body[i]-aux;
+ if (body[i]-aux)
+ bb_predicate = *(struct predicate *) body[i]-aux;
+ else
+ bb_predicate = false_predicate ();
for (gsi = gsi_start_bb (body[i]); !gsi_end_p (gsi);
gsi_next (gsi))
{
diff --git a/gcc/testsuite/gcc.dg/torture/pr60013.c
b/gcc/testsuite/gcc.dg/torture/pr60013.c
new file mode 100644
index 000..e9d7c4e
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr60013.c
@@ -0,0 +1,102 @@
+/* { dg-do compile } */
+
+#include setjmp.h
+
+enum tree_code {
+ INTEGER_CST,
+ REAL_CST,
+ CEIL_MOD_EXPR,
+ FLOOR_MOD_EXPR,
+ EXACT_DIV_EXPR,
+ CEIL_DIV_EXPR,
+ FLOOR_DIV_EXPR,
+ PLUS_EXPR,
+ BIT_IOR_EXPR
+};
+typedef union tree_node *tree;
+struct tree_common
[4.7 PATCH]: Backport 'gcc_update explicit use of svn'
Hello!
Attached patch backports 'gcc_update explicit use of svn' patch [1]
to 4.7 branch.
Without this patch, contrib/gcc_update command produces corrupted
gcc/REVISION on my F20 system.
2014-02-02 Uros Bizjak ubiz...@gmail.com
Backport from mainline
2012-05-09 David Edelsohn dje@gmail.com
* gcc_update: Use $GCC_SVN to retrieve branch and revision.
Bootstrapped on x86_64-pc-linux-gnu and committed to 4.7 branch.
[1] http://gcc.gnu.org/ml/gcc-patches/2012-05/msg00675.html
Uros.
Index: gcc_update
===
--- gcc_update (revision 207405)
+++ gcc_update (working copy)
@@ -367,8 +367,8 @@
exit 1
fi
- revision=`svn info | awk '/Revision:/ { print $2 }'`
- branch=`svn info | sed -ne /URL:/ {
+ revision=`$GCC_SVN info | awk '/Revision:/ { print $2 }'`
+ branch=`$GCC_SVN info | sed -ne /^URL:/ {
s,.*/trunk,trunk,
s,.*/branches/,,
s,.*/tags/,,
[Patch, Fortran, 4.7 Regression] PR 59941: ICE with polymorphic types
Hi all,
the attached patch fixes an OOP-related 4.7-only regression. Pretty
much straightforward, for details see PR.
Regtested on x86_64-unknown-linux-gnu. Ok for 4.7?
Cheers,
Janus
2014-02-02 Janus Weil ja...@gcc.gnu.org
PR fortran/59941
* expr.c (replace_comp): Check for isym to avoid ICE.
2014-02-02 Janus Weil ja...@gcc.gnu.org
PR fortran/59941
* gfortran.dg/typebound_proc_26.f90: New.
Index: gcc/fortran/expr.c
===
--- gcc/fortran/expr.c (revision 207395)
+++ gcc/fortran/expr.c (working copy)
@@ -4195,7 +4195,7 @@ replace_comp (gfc_expr *expr, gfc_symbol *sym, int
gfc_component *comp;
comp = (gfc_component *)sym;
if ((expr-expr_type == EXPR_VARIABLE
- || (expr-expr_type == EXPR_FUNCTION
+ || (expr-expr_type == EXPR_FUNCTION !expr-value.function.isym
!gfc_is_intrinsic (expr-symtree-n.sym, 0, expr-where)))
expr-symtree-n.sym-ns == comp-ts.interface-formal_ns)
{
! { dg-do compile }
!
! PR 59941: [4.7 Regression] [OOP] ICE with polymorphic types
!
! Contributed by Jürgen Reuter juergen.reu...@desy.de
module tao_random_numbers
integer, dimension(10), private :: s_buffer
integer, private :: s_buffer_end = size (s_buffer)
end module
module beam_structures
private
type :: beam_structure_t
integer, dimension(:), allocatable :: smatrix
contains
procedure :: get_smatrix
end type
contains
function get_smatrix (beam_structure) result (matrix)
class(beam_structure_t), intent(in) :: beam_structure
integer, dimension (size (beam_structure%smatrix)) :: matrix
end function
end module
program p
use tao_random_numbers
use beam_structures
end
! { dg-final { cleanup-modules tao_random_numbers beam_structures } }
Re: [Patch, Fortran, 4.7 Regression] PR 59941: ICE with polymorphic types
Le 02/02/2014 21:31, Janus Weil a écrit : Hi all, the attached patch fixes an OOP-related 4.7-only regression. Pretty much straightforward, for details see PR. Regtested on x86_64-unknown-linux-gnu. Ok for 4.7? Yes, thanks. Mikael
[patch, committed] Nios II GOT pointer initialization
The initial commit of the Nios II GCC backend has an ABI conformance bug
in that it initializes the GOT pointer from _GLOBAL_OFFSET_TABLE_ rather
than _gp_got, as specified in the ABI. As a consequence of this,
GCC-generated code can only address 32K of GOT rather than 64K as
documented in the ABI. This patch fixes that.
This patch depends on the binutils patch I posted earlier today:
https://sourceware.org/ml/binutils/2014-02/msg9.html
as the linker was not previously defining the _gp_got symbol specified
in the ABI document. There's a potential compatibility issue here with
old versions of the linker, but we'd rather have the first official
release of GCC for Nios II implement this correctly.
-Sandra
2014-02-02 Sandra Loosemore san...@codesourcery.com
gcc/
* config/nios2/nios2.md (load_got_register): Initialize GOT
pointer from _gp_got instead of _GLOBAL_OFFSET_TABLE_.
* config/nios2/nios2.c (nios2_function_profiler): Likewise.
libgcc/
* config/nios2/crti.S (_init): Initialize GOT pointer from
_gp_got instead of _GLOBAL_OFFSET_TABLE_.
Index: gcc/config/nios2/nios2.md
===
--- gcc/config/nios2/nios2.md (revision 207406)
+++ gcc/config/nios2/nios2.md (working copy)
@@ -1015,8 +1015,8 @@
nextpc\\t%0
\\t1:
-\\tmovhi\\t%1, %%hiadj(_GLOBAL_OFFSET_TABLE_ - 1b)
-\\taddi\\t%1, %1, %%lo(_GLOBAL_OFFSET_TABLE_ - 1b)
+\\tmovhi\\t%1, %%hiadj(_gp_got - 1b)
+\\taddi\\t%1, %1, %%lo(_gp_got - 1b)
[(set_attr length 12)])
;; Read thread pointer register
Index: gcc/config/nios2/nios2.c
===
--- gcc/config/nios2/nios2.c (revision 207406)
+++ gcc/config/nios2/nios2.c (working copy)
@@ -667,8 +667,8 @@ nios2_function_profiler (FILE *file, int
if (flag_pic)
{
fprintf (file, \tnextpc\tr2\n);
- fprintf (file, \t1: movhi\tr3, %%hiadj(_GLOBAL_OFFSET_TABLE_ - 1b)\n);
- fprintf (file, \taddi\tr3, r3, %%lo(_GLOBAL_OFFSET_TABLE_ - 1b)\n);
+ fprintf (file, \t1: movhi\tr3, %%hiadj(_gp_got - 1b)\n);
+ fprintf (file, \taddi\tr3, r3, %%lo(_gp_got - 1b)\n);
fprintf (file, \tadd\tr2, r2, r3\n);
fprintf (file, \tldw\tr2, %%call(_mcount)(r2)\n);
fprintf (file, \tcallr\tr2\n);
Index: libgcc/config/nios2/crti.S
===
--- libgcc/config/nios2/crti.S (revision 207406)
+++ libgcc/config/nios2/crti.S (working copy)
@@ -56,8 +56,8 @@ _init:
addi fp, sp, 8
#ifdef linux
nextpc r22
-1: movhi r2, %hiadj(_GLOBAL_OFFSET_TABLE_ - 1b)
- addi r2, r2, %lo(_GLOBAL_OFFSET_TABLE_ - 1b)
+1: movhi r2, %hiadj(_gp_got - 1b)
+ addi r2, r2, %lo(_gp_got - 1b)
add r22, r22, r2
#endif
@@ -80,8 +80,8 @@ _fini:
addi fp, sp, 8
#ifdef linux
nextpc r22
-1: movhi r2, %hiadj(_GLOBAL_OFFSET_TABLE_ - 1b)
- addi r2, r2, %lo(_GLOBAL_OFFSET_TABLE_ - 1b)
+1: movhi r2, %hiadj(_gp_got - 1b)
+ addi r2, r2, %lo(_gp_got - 1b)
add r22, r22, r2
#endif
Re: PR ipa/59831 (ipa-cp devirt issues)
Hi,
this patch fixes the bug in extr_type_from_vtbl_ptr_store that made it to
consider store of construction virtual table or virtual table of virtual base
as store of type's virtual table.
In the testcase we have after early inlining:
virtual C::~C() (struct C * const this)
{
unsigned int i;
struct MultiTermDocs * _4;
struct A * _7;
unsigned int _10;
bb 2:
this_2(D)-D.2980._vptr.MultiTermDocs = MEM[(void *)_ZTV1C + 24B];
_4 = this_2(D)-D.2980;
MEM[(struct MultiTermDocs *)this_2(D)]._vptr.MultiTermDocs = MEM[(void
*)_ZTC1C0_13MultiTermDocs + 24B];
MultiTermDocs::wrap (_4);
_ZTC1C0_13MultiTermDocs is the construction vtable, while its context is
structure C and we thus assume that it is initialized to _ZTV1C + 16B in the
rest of code.
This leads to wrong jump function:
Jump functions of caller virtual C::~C()/29:
callsite virtual C::~C()/29 - MultiTermDocs::~MultiTermDocs()/10 :
param 0: KNOWN TYPE: base struct C, offset 0, component struct
MultiTermDocs
param 1: CONST: MEM[(void *)_ZTT1C + 8B]
This is wrong, since type of _4 at call of WRAP is really construction of C.
With the patch we get:
Jump functions of caller virtual C::~C()/29:
callsite virtual C::~C()/29 - void MultiTermDocs::wrap()/8 :
param 0: ANCESTOR: 0, offset 0, struct MultiTermDocs
It looks bit confusing, but the ANCESTOR has no type_preserved flag,
so it is basically just PASS_THROUGH in a funny representation.
The patch adds code to look into bases of the type obtained from DECL_CONTEXT
of the vtable store and try to lookup BINFO that links precisely the given
vtable at given offset.
With current patch we just give up on both cases mentioned above now. With
virtual tables since we do not have binfo to return and for virtual base
because extr_type_from_vtbl_ptr_store should really work on
polynmorphic_call_context that is something I plan for next stage1.
The bug exists in gcc-4.8 and the patch is bacportable with code from
ipa-devirt.c relocated to ipa-prop. I will do this with a week of delay or so.
Bootstrapped/regtested x86_64-linux, will commit it shortly.
* ipa-devirt.c (subbinfo_with_vtable_at_offset,
vtable_pointer_value_to_binfo): New functions.
* ipa-utils.h (vtable_pointer_value_to_binfo): Declare.
* ipa-prop.c (extr_type_from_vtbl_ptr_store): Use it.
* g++.dg/ipa/devirt-23.C: New testcase.
* g++.dg/ipa/devirt-20.C: Fix template.
Index: ipa-devirt.c
===
*** ipa-devirt.c(revision 207393)
--- ipa-devirt.c(working copy)
*** contains_type_p (tree outer_type, HOST_W
*** 972,977
--- 972,1041
return get_class_context (context, otr_type);
}
+ /* Lookup base of BINFO that has virtual table VTABLE with OFFSET. */
+
+ static tree
+ subbinfo_with_vtable_at_offset (tree binfo, tree offset, tree vtable)
+ {
+ tree v = BINFO_VTABLE (binfo);
+ int i;
+ tree base_binfo;
+
+ gcc_assert (!v || TREE_CODE (v) == POINTER_PLUS_EXPR);
+
+ if (v tree_int_cst_equal (TREE_OPERAND (v, 1), offset)
+TREE_OPERAND (TREE_OPERAND (v, 0), 0) == vtable)
+ return binfo;
+ for (i = 0; BINFO_BASE_ITERATE (binfo, i, base_binfo); i++)
+ if (polymorphic_type_binfo_p (base_binfo))
+ {
+ base_binfo = subbinfo_with_vtable_at_offset (base_binfo, offset,
vtable);
+ if (base_binfo)
+ return base_binfo;
+ }
+ return NULL;
+ }
+
+ /* T is known constant value of virtual table pointer. Return BINFO of the
+instance type. */
+
+ tree
+ vtable_pointer_value_to_binfo (tree t)
+ {
+ /* We expect MEM[(void *)virtual_table + 16B].
+ We obtain object's BINFO from the context of the virtual table.
+ This one contains pointer to virtual table represented via
+ POINTER_PLUS_EXPR. Verify that this pointer match to what
+ we propagated through.
+
+ In the case of virtual inheritance, the virtual tables may
+ be nested, i.e. the offset may be different from 16 and we may
+ need to dive into the type representation. */
+ if (t TREE_CODE (t) == ADDR_EXPR
+TREE_CODE (TREE_OPERAND (t, 0)) == MEM_REF
+TREE_CODE (TREE_OPERAND (TREE_OPERAND (t, 0), 0)) == ADDR_EXPR
+TREE_CODE (TREE_OPERAND (TREE_OPERAND (t, 0), 1)) == INTEGER_CST
+(TREE_CODE (TREE_OPERAND (TREE_OPERAND (TREE_OPERAND (t, 0), 0), 0))
+ == VAR_DECL)
+DECL_VIRTUAL_P (TREE_OPERAND (TREE_OPERAND
+(TREE_OPERAND (t, 0), 0), 0)))
+ {
+ tree vtable = TREE_OPERAND (TREE_OPERAND (TREE_OPERAND (t, 0), 0), 0);
+ tree offset = TREE_OPERAND (TREE_OPERAND (t, 0), 1);
+ tree binfo = TYPE_BINFO (DECL_CONTEXT (vtable));
+
+ binfo = subbinfo_with_vtable_at_offset (binfo, offset, vtable);
+
+ /* FIXME: for stores of construction vtables we return NULL,
+because we do not have
Re: [MIPS] Use soft-fp for libgcc floating-point routines
On Sun, 2 Feb 2014, Joseph S. Myers wrote: On Sun, 2 Feb 2014, Richard Sandiford wrote: This patch (finally!) moves MIPS over to the soft-fp routines. The main advantage is that we now handle 128-bit long-double exceptions properly on hard-float targets. Thanks for doing this. At some point I intend to add soft-fp support for after-rounding tininess detection, so this can then get underflow Now submitted: https://sourceware.org/ml/libc-alpha/2014-02/msg00068.html. -- Joseph S. Myers jos...@codesourcery.com
[ARM][PATCH] Vectorizer generates unaligned access when -mno-unaligned-access is enabled
With the 2013-09-21 version of trunk, attached test case results in bus
error when simultaneously enabling both -mno-unaligned-access and
-ftree-vectorize.
The error is caused by unaligned vector load via two vldr instructions:
vldr d16, [r3, #-16]
vldr d17, [r3, #-8]
Cause for this error is, even when -mno-unaligned-access is enabled,
backend will inform vectorizer that it supports misaligned accesses
via TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
Attached patch fixes this. Is this OK for trunk?
Thanks,
Kugan
+2014-02-03 Yury Gribov tetra2...@gmail.com
+Kugan Vivekanandarajah kug...@linaro.org
+
+ * config/arm/arm.c (arm_vector_alignment_reachable): Check
+ unaligned_access.
+ * config/arm/arm.c (arm_builtin_support_vector_misalignment): Likewise.
+
+2014-02-03 Yury Gribov tetra2...@gmail.com
+Kugan Vivekanandarajah kug...@linaro.org
+
+ * gcc.target/arm/vect-noalign.c: New file.
+
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 39d23cc..d7e74de 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -29521,7 +29521,7 @@ arm_vector_alignment_reachable (const_tree type, bool
is_packed)
{
/* Vectors which aren't in packed structures will not be less aligned than
the natural alignment of their element type, so this is safe. */
- if (TARGET_NEON !BYTES_BIG_ENDIAN)
+ if (TARGET_NEON !BYTES_BIG_ENDIAN unaligned_access)
return !is_packed;
return default_builtin_vector_alignment_reachable (type, is_packed);
@@ -29532,7 +29532,7 @@ arm_builtin_support_vector_misalignment (enum
machine_mode mode,
const_tree type, int misalignment,
bool is_packed)
{
- if (TARGET_NEON !BYTES_BIG_ENDIAN)
+ if (TARGET_NEON !BYTES_BIG_ENDIAN unaligned_access)
{
HOST_WIDE_INT align = TYPE_ALIGN_UNIT (type);
diff --git a/gcc/testsuite/gcc.target/arm/vect-noalign.c
b/gcc/testsuite/gcc.target/arm/vect-noalign.c
index e69de29..a934233 100644
--- a/gcc/testsuite/gcc.target/arm/vect-noalign.c
+++ b/gcc/testsuite/gcc.target/arm/vect-noalign.c
@@ -0,0 +1,20 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_neon_hw } */
+/* { dg-options -mfpu=neon -ffast-math -ftree-vectorize -fno-common -O2
-mno-unaligned-access } */
+
+
+/* Test for-mno-unaligned-access and -ftree-vectorize and results bus error.
*/
+#define N 128
+
+char ia[N];
+char ib[N+1];
+
+int main() {
+ int i;
+ for(i = 0; i N; ++i) {
+ia[i] = ib[i + 1];
+ }
+
+ return 0;
+}
+
