Re: Fix firefox FDO build
On Mon, Aug 18, 2014 at 5:15 PM, Jan Hubicka hubi...@ucw.cz wrote:
Hi,
Firefox FDO build fails with undefined reference to __builtin_unreachable.
THis is caused by a bug
in gimple-fold that introduces the refernece in the cases it hits impossible
devirtualization.
We use __builtin_unreachable in the case we update call, but when updating
reference, we need
to use something else. This patch uses NULL - the program is undefined at
this point and NULL
seems to fit the bill well (moreover this path is currently executed only for
FDO or speculative
devirt code. No one introduces GIMPLE_ASSIGN with OBJ_TYPE_REF).
Bootstrapped/regtsted x86_64-linux, will commit it shortly.
Err - you end up building the address of integer_zero_node. That's
certainly totally bogus. I think you want to do val = build_int_cst
(TREE_TYPE (val), 0)); instead
Please fix.
Thanks,
Richard.
* gimple-fold.c (fold_gimple_assign): Do not intorudce referneces
to BUILT_IN_UNREACHABLE.
Index: gimple-fold.c
===
--- gimple-fold.c (revision 213860)
+++ gimple-fold.c (working copy)
@@ -385,7 +385,9 @@ fold_gimple_assign (gimple_stmt_iterator
if (targets.length () == 1)
fndecl = targets[0]-decl;
else
- fndecl = builtin_decl_implicit (BUILT_IN_UNREACHABLE);
+ /* We can not use __builtin_unreachable here because it
+can not have address taken. */
+ fndecl = integer_zero_node;
if (dump_enabled_p ())
{
location_t loc = gimple_location_safe (stmt);
Re: [PATCH v2] Add strict aliasing warning when inlining function.
On Tue, Aug 19, 2014 at 7:20 AM, lin zuojian manjian2...@gmail.com wrote:
Hi,
Here patch v2. Move the function as Andrew instructed.
* tree-inline.c (setup_one_parameter): Add strict aliasing check.
* c-family/c-common.c (strict_aliasing_warning): Move to alias.c.
* c-family/c-common.h (strict_aliasing_warning): Move to tree.h.
* alias.c (strict_aliasing_warning): New function moved from
c-family/c-common.c.
* tree.h (strict_aliasing_warning): New function declaration moved from
c-family/c-common.h.
* testsuite/gcc.dg/Wstrict-aliasing-inline.C: New test.
Generally I don't think we want to expand the use of the IMHO broken
strict_aliasing_warning code.
We should be able to do better after some constant/forward propagation,
scanning for MEM_REFs operating on decls and accessing those with
an alias set that is not a subset of the set of the decl. Like simply
warn as part of the tree-ssa-forwprop.c sweep (maybe only for those
MEM_REFs we simplified to avoid duplicates, but then also watch
for CCP doing the same).
Richard.
---
gcc/ChangeLog | 11 +++
gcc/alias.c| 78
++
gcc/c-family/c-common.c| 78
--
gcc/c-family/c-common.h| 1 -
.../gcc.dg/Wstrict-aliasing-inline-parameter.C | 42
gcc/tree-inline.c | 4 ++
gcc/tree.h | 2 +
7 files changed, 137 insertions(+), 79 deletions(-)
create mode 100644 gcc/testsuite/gcc.dg/Wstrict-aliasing-inline-parameter.C
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8ccdde2..6514313 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2014-08-19 Lin Zuojian manjian2...@gmail.com
+
+ * tree-inline.c (setup_one_parameter): Add strict aliasing check.
+ * c-family/c-common.c (strict_aliasing_warning): Move to alias.c.
+ * c-family/c-common.h (strict_aliasing_warning): Move to tree.h.
+ * alias.c (strict_aliasing_warning): New function moved from
+ c-family/c-common.c.
+ * tree.h (strict_aliasing_warning): New function declaration moved
from
+ c-family/c-common.h.
+ * testsuite/gcc.dg/Wstrict-aliasing-inline.C: New test.
+
2014-08-19 David Malcolm dmalc...@redhat.com
* basic-block.h (BB_HEAD): Convert to a function. Strengthen the
diff --git a/gcc/alias.c b/gcc/alias.c
index 39df09b..8496435 100644
--- a/gcc/alias.c
+++ b/gcc/alias.c
@@ -3044,4 +3044,82 @@ end_alias_analysis (void)
sbitmap_free (reg_known_equiv_p);
}
+/* Print a warning about casts that might indicate violation
+ of strict aliasing rules if -Wstrict-aliasing is used and
+ strict aliasing mode is in effect. OTYPE is the original
+ TREE_TYPE of EXPR, and TYPE the type we're casting to. */
+
+bool
+strict_aliasing_warning (tree otype, tree type, tree expr)
+{
+ /* Strip pointer conversion chains and get to the correct original type.
*/
+ STRIP_NOPS (expr);
+ otype = TREE_TYPE (expr);
+
+ if (!(flag_strict_aliasing
+POINTER_TYPE_P (type)
+POINTER_TYPE_P (otype)
+!VOID_TYPE_P (TREE_TYPE (type)))
+ /* If the type we are casting to is a ref-all pointer
+ dereferencing it is always valid. */
+ || TYPE_REF_CAN_ALIAS_ALL (type))
+return false;
+
+ if ((warn_strict_aliasing 1) TREE_CODE (expr) == ADDR_EXPR
+ (DECL_P (TREE_OPERAND (expr, 0))
+ || handled_component_p (TREE_OPERAND (expr, 0
+{
+ /* Casting the address of an object to non void pointer. Warn
+ if the cast breaks type based aliasing. */
+ if (!COMPLETE_TYPE_P (TREE_TYPE (type)) warn_strict_aliasing == 2)
+ {
+ warning (OPT_Wstrict_aliasing, type-punning to incomplete type
+ might break strict-aliasing rules);
+ return true;
+ }
+ else
+{
+ /* warn_strict_aliasing = 3. This includes the default (3).
+ Only warn if the cast is dereferenced immediately. */
+ alias_set_type set1 =
+ get_alias_set (TREE_TYPE (TREE_OPERAND (expr, 0)));
+ alias_set_type set2 = get_alias_set (TREE_TYPE (type));
+
+ if (set1 != set2 set2 != 0
+ (set1 == 0 || !alias_sets_conflict_p (set1, set2)))
+ {
+ warning (OPT_Wstrict_aliasing, dereferencing type-punned
+ pointer will break strict-aliasing rules);
+ return true;
+ }
+ else if (warn_strict_aliasing == 2
+ !alias_sets_must_conflict_p (set1, set2))
+ {
+ warning (OPT_Wstrict_aliasing, dereferencing type-punned
+ pointer might break strict-aliasing rules);
+ return true;
+
Re: [PATH] Intel offload library
Hello, On 12 Aug 10:58, Andrey Turetskiy wrote: All remarks from https://gcc.gnu.org/ml/gcc-patches/2014-06/msg02166.html are fixed. Updated version of liboffloadmic you can find in GIT branch kyukhin/gomp4-offload: https://gcc.gnu.org/git/?p=gcc.git;a=shortlog;h=refs/heads/kyukhin/gomp4-offload. Commit: HEAD~3 (Add liboffloadmic with offloading emulator). Is it ok for trunk now? -- Thanks, K
Re: [PATCH v2] Add strict aliasing warning when inlining function.
Hi Richard, Generally I don't think we want to expand the use of the IMHO broken strict_aliasing_warning code. If you have read my test code, you must understand it is the programmer who responsible for this undefined behavior, instead of the compiler. Like PR 60546 concluded. And I doubt if limiting the compiler behavior is a good choice. We should be able to do better after some constant/forward propagation, scanning for MEM_REFs operating on decls and accessing those with an alias set that is not a subset of the set of the decl. Like simply warn as part of the tree-ssa-forwprop.c sweep (maybe only for those MEM_REFs we simplified to avoid duplicates, but then also watch for CCP doing the same). That's a more generalize solution. But it have a defection: at that point, the compiler have no idea who generates these code. That make it difficult to debug. --- Lin Zuojian
Re: [C/C++ PATCH] Implement -Wbool-compare (PR c++/62153)
On 19 August 2014 06:58, Marek Polacek pola...@redhat.com wrote:
On Mon, Aug 18, 2014 at 10:57:58PM +0200, Manuel López-Ibáñez wrote:
On 18 August 2014 22:04, Marek Polacek pola...@redhat.com wrote:
+void
+maybe_warn_bool_compare (location_t loc, enum tree_code code, tree op0,
+tree op1)
+{
+ if (TREE_CODE_CLASS (code) != tcc_comparison)
+return;
+
+ /* boolean CMP cst */
+ if (TREE_CODE (op1) == INTEGER_CST
+ !integer_zerop (op1)
+ !integer_onep (op1))
+{
+ if (code == EQ_EXPR
+ || ((code == GT_EXPR || code == GE_EXPR)
+ tree_int_cst_sgn (op1) == 1)
+ || ((code == LT_EXPR || code == LE_EXPR)
+ tree_int_cst_sgn (op1) == -1))
+ warning_at (loc, OPT_Wbool_compare, comparison of constant %qE
+ with boolean expression is always false, op1);
+ else
+ warning_at (loc, OPT_Wbool_compare, comparison of constant %qE
+ with boolean expression is always true, op1);
+}
+ /* cst CMP boolean */
+ else if (TREE_CODE (op0) == INTEGER_CST
+ !integer_zerop (op0)
+ !integer_onep (op0))
+{
+ if (code == EQ_EXPR
+ || ((code == GT_EXPR || code == GE_EXPR)
+ tree_int_cst_sgn (op0) == -1)
+ || ((code == LT_EXPR || code == LE_EXPR)
+ tree_int_cst_sgn (op0) == 1))
+ warning_at (loc, OPT_Wbool_compare, comparison of constant %qE
+ with boolean expression is always false, op0);
+ else
+ warning_at (loc, OPT_Wbool_compare, comparison of constant %qE
+ with boolean expression is always true, op0);
+}
Perhaps you can save some repetition by doing first:
tree op = (TREE_CODE (op1) == INTEGER_CST) ? op1 : op0;
if (TREE_CODE (op) == INTEGER_CST
!integer_zerop (op)
Not sure about that: it matters whether the CST is a LHS or a RHS
- because we want to say if the comparison is always true or false.
I tried to introduce some bool flag, but that didn't really help
readability IMHO. (The tree_int_cst_sgn is compared to 1 and -1, or
to -1 and 1.)
Oh, yes. I missed that. Sorry. What about?
tree op = (TREE_CODE (op0) == INTEGER_CST) ? op0
: (TREE_CODE (op1) == INTEGER_CST) ? op1 : NULL_TREE;
if (op == NULL_TREE)
return;
if (!integer_zerop (op) !integer_onep(op))
{
int sign = (TREE_CODE (op0) == INTEGER_CST)
? tree_int_cst_sgn (op) : -tree_int_cst_sgn (op);
if (code == EQ_EXPR
|| ((code == GT_EXPR || code == GE_EXPR)
sign 0)
|| ((code == LT_EXPR || code == LE_EXPR)
sign 0))
or some variation of the above could work, no?
Cheers,
Manuel.
Re: [PATCH v2] Add strict aliasing warning when inlining function.
Here is the warning after my patch: 1.cpp: In function 'int foo(int, int, int)': 1.cpp:29:70: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] return hash2(static_castconst unsigned short*(change1), len / 2); ^ 1.cpp:29:70: warning: during inlining function int hash2(const short unsigned int*, int) into function int foo(int, int, int) [-Wstrict-aliasing] It is clear what is going on. On Tue, Aug 19, 2014 at 04:49:57PM +0800, lin zuojian wrote: Hi Richard, Generally I don't think we want to expand the use of the IMHO broken strict_aliasing_warning code. If you have read my test code, you must understand it is the programmer who responsible for this undefined behavior, instead of the compiler. Like PR 60546 concluded. And I doubt if limiting the compiler behavior is a good choice. We should be able to do better after some constant/forward propagation, scanning for MEM_REFs operating on decls and accessing those with an alias set that is not a subset of the set of the decl. Like simply warn as part of the tree-ssa-forwprop.c sweep (maybe only for those MEM_REFs we simplified to avoid duplicates, but then also watch for CCP doing the same). That's a more generalize solution. But it have a defection: at that point, the compiler have no idea who generates these code. That make it difficult to debug. --- Lin Zuojian
Re: [PATCH, Fortan] fix initialization of flag_errno_math and flag_associative_math
On Mon, Aug 18, 2014 at 6:48 PM, VandeVondele Joost joost.vandevond...@mat.ethz.ch wrote: ping ? https://gcc.gnu.org/ml/fortran/2014-05/msg00162.html Ok, again. If Dominique comes up with some reason why the patch should be modified, it can be done then. AFAICT your patch is better than the status quo. -- Janne Blomqvist
RE: [PATCH, Fortan] fix initialization of flag_errno_math and flag_associative_math
Thanks, can somebody with svn write access commit ?
Re: Does anyone use Ada on Alpha?
Unfortunately the Alpha box I used last time is no longer available and so I've
not been able to try the linker fix. I've not had any responses from anyone
saying they use Ada on Alpha (let alone on VMS - where the original bug was
reported - and Ada/VMS support has now been retired). If none of you folk are
able to build+test the patch (below) for Ada on Alpha: is this really reason for
us to want to hold this up?
--Alan
Alan Lawrence wrote:
...as I've not managed to build such a gcc. If so, is there any chance you could
please test check-ada with the following patch (in gcc/ directory), which rolls
back r76965:
Index: combine.c
===
--- combine.c (revision 212523)
+++ combine.c (working copy)
@@ -10218,9 +10218,6 @@
if (CONST_INT_P (XEXP (varop, 1))
/* We can't do this if we have (ashiftrt (xor)) and the
constant has its sign bit set in shift_mode. */
- !(code == ASHIFTRT GET_CODE (varop) == XOR
- 0 trunc_int_for_mode (INTVAL (XEXP (varop, 1)),
- shift_mode))
(new_rtx = simplify_const_binary_operation
(code, result_mode,
gen_int_mode (INTVAL (XEXP (varop, 1)), result_mode),
@@ -10237,10 +10234,7 @@
logical expression, make a new logical expression, and apply
the inverse distributive law. This also can't be done
for some (ashiftrt (xor)). */
- if (CONST_INT_P (XEXP (varop, 1))
- !(code == ASHIFTRT GET_CODE (varop) == XOR
- 0 trunc_int_for_mode (INTVAL (XEXP (varop, 1)),
-shift_mode)))
+ if (CONST_INT_P (XEXP (varop, 1)))
{
rtx lhs = simplify_shift_const (NULL_RTX, code, shift_mode,
XEXP (varop, 0), count);
Many thanks if so!
--Alan
Re: Does anyone use Ada on Alpha?
Unfortunately the Alpha box I used last time is no longer available and so I've not been able to try the linker fix. I've not had any responses from anyone saying they use Ada on Alpha (let alone on VMS - where the original bug was reported - and Ada/VMS support has now been retired). If none of you folk are able to build+test the patch (below) for Ada on Alpha: is this really reason for us to want to hold this up? FWIW, AdaCore has stopped supporting/building/testing Ada on alpha several years ago already, so no reason as far as we are concerned to worry about this combination for GCC trunk, as long as your change doesn't break Ada on other platforms. Arno
[PATCH] Fix thinko in handle_alias_pairs (PR c/61271)
handle_alias_pairs contains the following thinko.
I believe it should be not a virtual function.
Bootstrapped/regtested on x86_64-linux, ok for trunk?
2014-08-19 Marek Polacek pola...@redhat.com
PR c/61271
* cgraphunit.c (handle_alias_pairs): Fix condition.
diff --git gcc/cgraphunit.c gcc/cgraphunit.c
index d9acc65..2c2006b 100644
--- gcc/cgraphunit.c
+++ gcc/cgraphunit.c
@@ -1171,7 +1171,7 @@ handle_alias_pairs (void)
/* We use local aliases for C++ thunks to force the tailcall
to bind locally. This is a hack - to keep it working do
the following (which is not strictly correct). */
- (! TREE_CODE (target_node-decl) == FUNCTION_DECL
+ (TREE_CODE (target_node-decl) != FUNCTION_DECL
|| ! DECL_VIRTUAL_P (target_node-decl))
! lookup_attribute (weakref, DECL_ATTRIBUTES (p-decl)))
{
Marek
Re: [PATCH, Fortan] fix initialization of flag_errno_math and flag_associative_math
On Tue, Aug 19, 2014 at 1:07 PM, VandeVondele Joost joost.vandevond...@mat.ethz.ch wrote: Thanks, can somebody with svn write access commit ? Please get yourself write-after-approval access per instructions at https://gcc.gnu.org/svnwrite.html . You can use me as your sponsor. Thanks. -- Janne Blomqvist
Re: [gomp4] Add tables generation
On 18 Aug 18:24, Bernd Schmidt wrote: I think I'd be happier if the function was called init_offload_table and also collected functions, rather than leaving that to expand_omp_target. I think the patch would be ok with that change. For the functions it's not so easy to identify which of them to add into the table, e.g.: #pragma omp target #pragma omp parallel x++; Here 2 functions with omp declare target attribute are created. But only the outer must be added to the table. So I believe that expand_omp_target is better place for the functions. -- Ilya
[PATCH AArch64 1/2] Improve codegen of vector compares inc. tst instruction
Vector comparisons are sometimes generated with needless 'not' instructions, and
'cmtst' is generally not output at all. This patch makes
gen_aarch64_vcond_internal more intelligent with regard to swapping the operands
to both the comparison and the conditional move, such that not is avoided when
possible. Also update the 'tst' pattern to reflect that RTX (ne ...) is no
longer generated [and (neg (not (eq ...))) is simplify_rtx'd to (plus (eq ...) -1)].
New tests are in terms of the Neon intrinsics - so not 100% exhaustive, but
second patch will rewrite the Neon intrinsics in terms of a more comprehensive
set of gcc-vector-extension comparisons.
Bootstrapped on aarch64-none-linux-gnu and cross-tested check-gcc on
aarch64-none-elf and aarch64_be-none-elf.
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.c (aarch64_types_cmtst_qualifiers,
TYPES_TST): Define.
(aarch64_fold_builtin): Update pattern for cmtst.
* config/aarch64/aarch64-protos.h (aarch64_const_vec_all_same_int_p):
Declare.
* config/aarch64/aarch64-simd-builtins.def (cmtst): Update qualifiers.
* config/aarch64/aarch64-simd.md (aarch64_vcond_internalmodemode):
Switch operands, separate out more cases, refactor.
(aarch64_cmtstmode): Rewrite pattern to match (plus ... -1).
* config/aarch64.c (aarch64_const_vec_all_same_int_p): Take single
argument; rename old version to...
(aarch64_const_vec_all_same_in_range_p): ...this.
(aarch64_print_operand, aarch64_simd_shift_imm_p): Follow renaming.
* config/aarch64/predicates.md (aarch64_simd_imm_minus_one): Define.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/simd/int_comparisons.x: New file.
* gcc.target/aarch64/simd/int_comparisons_1.c: New test.
* gcc.target/aarch64/simd/int_comparisons_2.c: Ditto.diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index 5217f4a..4fb8ec0 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -146,6 +146,11 @@ aarch64_types_binop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_none, qualifier_none, qualifier_maybe_immediate };
#define TYPES_BINOP (aarch64_types_binop_qualifiers)
static enum aarch64_type_qualifiers
+aarch64_types_cmtst_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ = { qualifier_none, qualifier_none, qualifier_none,
+ qualifier_internal, qualifier_internal };
+#define TYPES_TST (aarch64_types_cmtst_qualifiers)
+static enum aarch64_type_qualifiers
aarch64_types_binopv_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_void, qualifier_none, qualifier_none };
#define TYPES_BINOPV (aarch64_types_binopv_qualifiers)
@@ -1297,7 +1302,7 @@ aarch64_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *args,
BUILTIN_VALLDI (BINOP, cmeq, 0)
return fold_build2 (EQ_EXPR, type, args[0], args[1]);
break;
- BUILTIN_VSDQ_I_DI (BINOP, cmtst, 0)
+ BUILTIN_VSDQ_I_DI (TST, cmtst, 0)
{
tree and_node = fold_build2 (BIT_AND_EXPR, type, args[0], args[1]);
tree vec_zero_node = build_zero_cst (type);
diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index cca3bc9..5c8013d 100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -179,6 +179,7 @@ bool aarch64_cannot_change_mode_class (enum machine_mode,
enum reg_class);
enum aarch64_symbol_type
aarch64_classify_symbolic_expression (rtx, enum aarch64_symbol_context);
+bool aarch64_const_vec_all_same_int_p (rtx, HOST_WIDE_INT);
bool aarch64_constant_address_p (rtx);
bool aarch64_expand_movmem (rtx *);
bool aarch64_float_const_zero_rtx_p (rtx);
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index 4f3bd12..6aa45b6 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -246,7 +246,7 @@
/* Implemented by aarch64_cmcmpmode. */
BUILTIN_VSDQ_I_DI (BINOP, cmgeu, 0)
BUILTIN_VSDQ_I_DI (BINOP, cmgtu, 0)
- BUILTIN_VSDQ_I_DI (BINOP, cmtst, 0)
+ BUILTIN_VSDQ_I_DI (TST, cmtst, 0)
/* Implemented by reduc_surplus_mode. */
BUILTIN_VALL (UNOP, reduc_splus_, 10)
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index f5fa4ae..4d5d840 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -1871,58 +1871,94 @@
(match_operand:VDQ 2 nonmemory_operand)))]
TARGET_SIMD
{
- int inverse = 0, has_zero_imm_form = 0;
rtx op1 = operands[1];
rtx op2 = operands[2];
rtx mask = gen_reg_rtx (MODEmode);
+ enum rtx_code code = GET_CODE (operands[3]);
+
+ /* Switching OP1 and OP2 is necessary for NE (to output a cmeq insn),
+ and desirable for other comparisons if it results in FOO ? -1 : 0
+ (this allows direct use of the comparison result without a bsl). */
+ if (code == NE
+
[PING PATCH] demangler, only access valid fields for DEMANGLE_COMPONENT_FIXED_TYPE.
Hi all,
I just retested this patch. The crash it fixes is still there,
and the patch still fixes it. Is this ok to commit?
Cheers,
Gary
Andrew Burgess wrote:
In two places when a struct demangle_component is of type
DEMANGLE_COMPONENT_FIXED_TYPE we fall back to accessing the default
s_binary member of the union rather than the s_fixed member. This
is incorrect and can cause the demangler to crash.
In d_dump I've changed the code to only access the s_fixed member of
the union, and also added printing of the remaining parts of the
s_fixed struct, this felt like the most useful thing to do.
I've added a new test, this causes a SIGSEGV for me before the
patch, and is fine afterwords, however, this undefined, so might not
cause a crash on all platforms.
If this is approved then please could someone commit it for me, I
don't have gcc write access.
Thanks,
Andrew
libiberty/ChangeLog:
* cp-demangle.c (d_dump): Only access field from s_fixed part of
the union for DEMANGLE_COMPONENT_FIXED_TYPE.
(d_count_templates_scopes): Likewise.
* testsuite/demangle-expected: New test case.
---
libiberty/cp-demangle.c | 10 +-
libiberty/testsuite/demangle-expected | 6 ++
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/libiberty/cp-demangle.c b/libiberty/cp-demangle.c
index 68d8ee1..a31dad4 100644
--- a/libiberty/cp-demangle.c
+++ b/libiberty/cp-demangle.c
@@ -710,7 +710,9 @@ d_dump (struct demangle_component *dc, int indent)
printf (pointer to member type\n);
break;
case DEMANGLE_COMPONENT_FIXED_TYPE:
- printf (fixed-point type\n);
+ printf (fixed-point type, accum? %d, sat? %d\n,
+ dc-u.s_fixed.accum, dc-u.s_fixed.sat);
+ d_dump (dc-u.s_fixed.length, indent + 2)
break;
case DEMANGLE_COMPONENT_ARGLIST:
printf (argument list\n);
@@ -3869,7 +3871,13 @@ d_count_templates_scopes (int *num_templates, int
*num_scopes,
case DEMANGLE_COMPONENT_FUNCTION_TYPE:
case DEMANGLE_COMPONENT_ARRAY_TYPE:
case DEMANGLE_COMPONENT_PTRMEM_TYPE:
+ goto recurse_left_right;
+
case DEMANGLE_COMPONENT_FIXED_TYPE:
+ d_count_templates_scopes (num_templates, num_scopes,
+dc-u.s_fixed.length);
+ break;
+
case DEMANGLE_COMPONENT_VECTOR_TYPE:
case DEMANGLE_COMPONENT_ARGLIST:
case DEMANGLE_COMPONENT_TEMPLATE_ARGLIST:
diff --git a/libiberty/testsuite/demangle-expected
b/libiberty/testsuite/demangle-expected
index 453f9a3..0e2bb12 100644
--- a/libiberty/testsuite/demangle-expected
+++ b/libiberty/testsuite/demangle-expected
@@ -4343,3 +4343,9 @@
cereal::detail::InputBindingMapcereal::JSONInputArchive::Serializers
cereal::p
--format=gnu-v3
_ZNSt9_Any_data9_M_accessIPZ4postISt8functionIFvvEEEvOT_EUlvE_EERS5_v
void poststd::functionvoid () (std::functionvoid ())::{lambda()#1}*
std::_Any_data::_M_accessvoid poststd::functionvoid () (void
poststd::functionvoid () (std::functionvoid
())::{lambda()#1}*)::{lambda()#1}*()
+# The following input symbol was found during random, it caused a fault
+# within the demangler, it's not a symbol we'd expect in the real world.
+--format=auto --no-params
+_Z3xxxDFyuVb
+xxx(unsigned long long _Fract, bool volatile)
+xxx
--
1.8.1.3
Re: [wwwdocs] Re: gcc.gnu.org/simtest-howto.html (was: Question for ARM person re asm_fprintf)(
On Mon, 18 Aug 2014, Oleg Endo wrote: On Mon, 2014-08-18 at 16:57 -0400, Hans-Peter Nilsson wrote: On Mon, 18 Aug 2014, Oleg Endo wrote: On Sun, 2014-08-17 at 16:56 -0400, Hans-Peter Nilsson wrote: On Fri, 15 Aug 2014, Oleg Endo wrote: How about the attached .html as a replacement for the current one? I removed the requirement of setting up a combined tree, as I believe it makes things much more easy. At least it's been working for me that way. Is this helpful / OK to commit? Maybe a patch is better in this case, instead of the whole .html. hm no likey, this is simply changing too much and making it SH-specific. Also, /usr/local is the default. I thought the it would work for other targets by replacing sh-elf with $TARGET. However, I can't test all of those. Maybe maintainers/users of other targets can comment on the applicability beyond SH. I'm afraid that's all I can do for now. I'll pick this up. After all, I'm supposedly the maintainer of that page... thanks. BTW, I've just noticed that I've duplicated the 'Passing options and running multiple testsuites' section mentioned on https://gcc.gnu.org/install/test.html . Maybe the sim-test page could be simply integrated into the test.html page in a stripped down form. There's certainly an unexpected disconnect but I think a link would be better than inlining. Most parts of my description have actually nothing to do with sim-testing, but are just one way of setting up a newlib based cross toolchain. Maybe that can be put as a cross toolchain example somewhere else on the wwwdocs, like https://gcc.gnu.org/install/build.html Sounds like a good idea. BTW, to check out the web pages to generate patches, see http://gcc.gnu.org/about.html#cvs. brgds, H-P
Re: [PATCH] Add guality [p]type test.
On Mon, 2014-07-07 at 11:57 +0200, Richard Biener wrote: Btw, why doesn't it succeed with LTO? I suspect it's because we drop the unused variables - try adding __attribute__((used)) to them. You are right, this makes the whole new test PASS also with LTO: 2014-08-19 Mark Wielaard m...@redhat.com * gcc.dg/guality/const-volatile.c: Add `used' attribute to pi. OK to commit? Thanks, Mark diff --git a/gcc/testsuite/gcc.dg/guality/const-volatile.c b/gcc/testsuite/gcc.dg/guality/const-volatile.c index 6c2b617..86460e4 100644 --- a/gcc/testsuite/gcc.dg/guality/const-volatile.c +++ b/gcc/testsuite/gcc.dg/guality/const-volatile.c @@ -7,7 +7,7 @@ const int ci; volatile int vi; const volatile int cvi; -int *pi; +int *pi __attribute__((used)); const int *pci; volatile int *pvi; const volatile int *pcvi;
[PATCH] Fix devirt to NULL
This fixes Honzas previous commit to not build integer_zero_node (what?).
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2014-08-19 Richard Biener rguent...@suse.de
* gimple-fold.c (fold_gimple_assign): Properly build a
null-pointer constant when devirtualizing addresses.
Index: gcc/gimple-fold.c
===
--- gcc/gimple-fold.c (revision 214135)
+++ gcc/gimple-fold.c (working copy)
@@ -319,14 +319,6 @@ fold_gimple_assign (gimple_stmt_iterator
= possible_polymorphic_call_targets (rhs, stmt, final);
if (final targets.length () = 1 dbg_cnt (devirt))
{
- tree fndecl;
-
- if (targets.length () == 1)
- fndecl = targets[0]-decl;
- else
- /* We can not use __builtin_unreachable here because it
-can not have address taken. */
- fndecl = integer_zero_node;
if (dump_enabled_p ())
{
location_t loc = gimple_location_safe (stmt);
@@ -335,11 +327,19 @@ fold_gimple_assign (gimple_stmt_iterator
reference to function %s\n,
targets.length () == 1
? targets[0]-name ()
-: __builtin_unreachable);
+: NULL);
+ }
+ if (targets.length () == 1)
+ {
+ val = fold_convert (TREE_TYPE (val),
+ build_fold_addr_expr_loc
+ (loc, targets[0]-decl));
+ STRIP_USELESS_TYPE_CONVERSION (val);
}
- val = fold_convert (TREE_TYPE (val),
- build_fold_addr_expr_loc (loc, fndecl));
- STRIP_USELESS_TYPE_CONVERSION (val);
+ else
+ /* We can not use __builtin_unreachable here because it
+can not have address taken. */
+ val = build_int_cst (TREE_TYPE (val), 0);
return val;
}
}
Re: [PATCH] Fix thinko in handle_alias_pairs (PR c/61271)
On Tue, Aug 19, 2014 at 12:25 PM, Marek Polacek pola...@redhat.com wrote:
handle_alias_pairs contains the following thinko.
I believe it should be not a virtual function.
Bootstrapped/regtested on x86_64-linux, ok for trunk?
Ok. Is only trunk affected?
Thanks,
Richard.
2014-08-19 Marek Polacek pola...@redhat.com
PR c/61271
* cgraphunit.c (handle_alias_pairs): Fix condition.
diff --git gcc/cgraphunit.c gcc/cgraphunit.c
index d9acc65..2c2006b 100644
--- gcc/cgraphunit.c
+++ gcc/cgraphunit.c
@@ -1171,7 +1171,7 @@ handle_alias_pairs (void)
/* We use local aliases for C++ thunks to force the tailcall
to bind locally. This is a hack - to keep it working do
the following (which is not strictly correct). */
- (! TREE_CODE (target_node-decl) == FUNCTION_DECL
+ (TREE_CODE (target_node-decl) != FUNCTION_DECL
|| ! DECL_VIRTUAL_P (target_node-decl))
! lookup_attribute (weakref, DECL_ATTRIBUTES (p-decl)))
{
Marek
Re: [PATCH] Add guality [p]type test.
On Tue, Aug 19, 2014 at 1:05 PM, Mark Wielaard m...@redhat.com wrote: On Mon, 2014-07-07 at 11:57 +0200, Richard Biener wrote: Btw, why doesn't it succeed with LTO? I suspect it's because we drop the unused variables - try adding __attribute__((used)) to them. You are right, this makes the whole new test PASS also with LTO: 2014-08-19 Mark Wielaard m...@redhat.com * gcc.dg/guality/const-volatile.c: Add `used' attribute to pi. OK to commit? Ok. Thanks, Richard. Thanks, Mark diff --git a/gcc/testsuite/gcc.dg/guality/const-volatile.c b/gcc/testsuite/gcc.dg/guality/const-volatile.c index 6c2b617..86460e4 100644 --- a/gcc/testsuite/gcc.dg/guality/const-volatile.c +++ b/gcc/testsuite/gcc.dg/guality/const-volatile.c @@ -7,7 +7,7 @@ const int ci; volatile int vi; const volatile int cvi; -int *pi; +int *pi __attribute__((used)); const int *pci; volatile int *pvi; const volatile int *pcvi;
Re: [PATCH] Fix thinko in handle_alias_pairs (PR c/61271)
On Tue, Aug 19, 2014 at 01:22:20PM +0200, Richard Biener wrote: On Tue, Aug 19, 2014 at 12:25 PM, Marek Polacek pola...@redhat.com wrote: handle_alias_pairs contains the following thinko. I believe it should be not a virtual function. Bootstrapped/regtested on x86_64-linux, ok for trunk? Ok. Is only trunk affected? I see the same code in 4.9 and 4.8 as well - can I backport the patch there? Marek
Re: [PATCH] Fix thinko in handle_alias_pairs (PR c/61271)
On Tue, Aug 19, 2014 at 1:31 PM, Marek Polacek pola...@redhat.com wrote: On Tue, Aug 19, 2014 at 01:22:20PM +0200, Richard Biener wrote: On Tue, Aug 19, 2014 at 12:25 PM, Marek Polacek pola...@redhat.com wrote: handle_alias_pairs contains the following thinko. I believe it should be not a virtual function. Bootstrapped/regtested on x86_64-linux, ok for trunk? Ok. Is only trunk affected? I see the same code in 4.9 and 4.8 as well - can I backport the patch there? Yes, I suggest to leave it on trunk for a while to catch fallout (you never know...) Thanks, Richard. Marek
Re: [PATCH] Fix for PR/62089 (enable missing Asan checks)
Makes sense, I've attached new patch (retested as usual). Well, you probably did not test with -m32: Running target unix/-m32 FAIL: c-c++-common/asan/pr62089.c -O0 output pattern test, is = FAIL: c-c++-common/asan/pr62089.c -O1 output pattern test, is = FAIL: c-c++-common/asan/pr62089.c -O2 output pattern test, is = FAIL: c-c++-common/asan/pr62089.c -O3 -fomit-frame-pointer output pattern test, is = FAIL: c-c++-common/asan/pr62089.c -O3 -g output pattern test, is = FAIL: c-c++-common/asan/pr62089.c -O2 -flto -fno-use-linker-plugin -flto-partition=none output pattern test, is = FAIL: c-c++-common/asan/pr62089.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects output pattern test, is = for gcc and g++, see e.g. https://gcc.gnu.org/ml/gcc-testresults/2014-08/msg01873.html Dominique
Re: [PATCH, Fortran] PR61234: -Wuse-no-only
So the negative version is -Wno-use-no-only? That sounds weird.
What about -Wuse-without-only?
I can also confirm that the test succeeds without the ' ! { dg-bogus has no
ONLY qualifier }'.
Dominique
RE: [PATCH, Fortran] PR61234: -Wuse-no-only
So the negative version is -Wno-use-no-only? That sounds weird. What about -Wuse-without-only? Would be fine with me. Approved with this change ?
Re: [PATCH] Fix thinko in handle_alias_pairs (PR c/61271)
On Tue, Aug 19, 2014 at 01:35:20PM +0200, Richard Biener wrote: On Tue, Aug 19, 2014 at 1:31 PM, Marek Polacek pola...@redhat.com wrote: On Tue, Aug 19, 2014 at 01:22:20PM +0200, Richard Biener wrote: On Tue, Aug 19, 2014 at 12:25 PM, Marek Polacek pola...@redhat.com wrote: handle_alias_pairs contains the following thinko. I believe it should be not a virtual function. Bootstrapped/regtested on x86_64-linux, ok for trunk? Ok. Is only trunk affected? I see the same code in 4.9 and 4.8 as well - can I backport the patch there? Yes, I suggest to leave it on trunk for a while to catch fallout (you never know...) Sure, especially in the cgraph code... I'll wait until next week or so, thanks. Marek
Re: [gomp4] Add tables generation
On 08/19/2014 12:41 PM, Ilya Verbin wrote: On 18 Aug 18:24, Bernd Schmidt wrote: I think I'd be happier if the function was called init_offload_table and also collected functions, rather than leaving that to expand_omp_target. I think the patch would be ok with that change. For the functions it's not so easy to identify which of them to add into the table, e.g.: #pragma omp target #pragma omp parallel x++; Here 2 functions with omp declare target attribute are created. But only the outer must be added to the table. So I believe that expand_omp_target is better place for the functions. Hmm, ok. Can you elaborate how this happens and why only one must be added to the table? In any case, I think let's get this checked in for now and iterate later. Bernd
Re: [PATCH] Add guality [p]type test.
On Tue, 2014-08-19 at 13:22 +0200, Richard Biener wrote:
On Tue, Aug 19, 2014 at 1:05 PM, Mark Wielaard m...@redhat.com wrote:
On Mon, 2014-07-07 at 11:57 +0200, Richard Biener wrote:
Btw, why doesn't it succeed with LTO? I suspect it's because
we drop the unused variables - try adding __attribute__((used)) to
them.
You are right, this makes the whole new test PASS also with LTO:
2014-08-19 Mark Wielaard m...@redhat.com
* gcc.dg/guality/const-volatile.c: Add `used' attribute to pi.
OK to commit?
Ok.
Here is the same for the new restrict.c testcase.
gcc/testsuite/ChangeLog
2014-08-19 Mark Wielaard m...@redhat.com
* gcc.dg/guality/restrict.c: Add `used' attribute to all variables.
(cpy): Change type of last argument to int.
That last change is necessary to succeed with LTO. Otherwise the type of
the function:
static __attribute__((noclone, noinline)) void *
cpy (void * restrict s1, const void * restrict s2, unsigned int n)
comes out as:
void *(void * restrict, const void * restrict, __unknown__)
That seems a genuine bug. Should I commit the cpy function type change
to make the test PASS with LTO? Or leave it as is so it FAILs and
someone else can look into it?
Thanks,
Mark
diff --git a/gcc/testsuite/gcc.dg/guality/restrict.c
b/gcc/testsuite/gcc.dg/guality/restrict.c
index e31224b..43a4ede 100644
--- a/gcc/testsuite/gcc.dg/guality/restrict.c
+++ b/gcc/testsuite/gcc.dg/guality/restrict.c
@@ -2,19 +2,19 @@
/* { dg-do run } */
/* { dg-options -std=c99 -gdwarf-3 } */
-int *ip;
-const int *cip;
-int * restrict irp;
-int * const icp;
-const int * restrict cirp;
-int * const restrict icrp;
-const int * const restrict cicrp;
+int *ip __attribute__((used));
+const int *cip __attribute__((used));
+int * restrict irp __attribute__((used));
+int * const icp __attribute__((used));
+const int * restrict cirp __attribute__((used));
+int * const restrict icrp __attribute__((used));
+const int * const restrict cicrp __attribute__((used));
-int * const volatile restrict cvirp;
-const volatile int * restrict pcvir;
+int * const volatile restrict cvirp __attribute__((used));
+const volatile int * restrict pcvir __attribute__((used));
static __attribute__((noclone, noinline)) void *
-cpy (void * restrict s1, const void * restrict s2, unsigned int n)
+cpy (void * restrict s1, const void * restrict s2, int n)
{
char *t1 = s1;
const char *t2 = s2;
@@ -45,4 +45,4 @@ main (int argc, char **argv)
/* { dg-final { gdb-test 30 type:pcvir const volatile int * restrict } } */
/* { dg-final { gdb-test 30 type:main int (int, char **) } } */
-/* { dg-final { gdb-test 30 type:cpy void *(void * restrict, const void *
restrict, unsigned int) } } */
+/* { dg-final { gdb-test 30 type:cpy void *(void * restrict, const void *
restrict, int) } } */
Re: [PATCH] Add guality [p]type test.
On Tue, Aug 19, 2014 at 2:10 PM, Mark Wielaard m...@redhat.com wrote:
On Tue, 2014-08-19 at 13:22 +0200, Richard Biener wrote:
On Tue, Aug 19, 2014 at 1:05 PM, Mark Wielaard m...@redhat.com wrote:
On Mon, 2014-07-07 at 11:57 +0200, Richard Biener wrote:
Btw, why doesn't it succeed with LTO? I suspect it's because
we drop the unused variables - try adding __attribute__((used)) to
them.
You are right, this makes the whole new test PASS also with LTO:
2014-08-19 Mark Wielaard m...@redhat.com
* gcc.dg/guality/const-volatile.c: Add `used' attribute to pi.
OK to commit?
Ok.
Here is the same for the new restrict.c testcase.
gcc/testsuite/ChangeLog
2014-08-19 Mark Wielaard m...@redhat.com
* gcc.dg/guality/restrict.c: Add `used' attribute to all variables.
(cpy): Change type of last argument to int.
That last change is necessary to succeed with LTO. Otherwise the type of
the function:
static __attribute__((noclone, noinline)) void *
cpy (void * restrict s1, const void * restrict s2, unsigned int n)
comes out as:
void *(void * restrict, const void * restrict, __unknown__)
That seems a genuine bug. Should I commit the cpy function type change
to make the test PASS with LTO? Or leave it as is so it FAILs and
someone else can look into it?
Yeah, that's a genuine bug. Not sure why it happens. If you file a bug
I can have a look later.
Thanks,
Richard.
Thanks,
Mark
diff --git a/gcc/testsuite/gcc.dg/guality/restrict.c
b/gcc/testsuite/gcc.dg/guality/restrict.c
index e31224b..43a4ede 100644
--- a/gcc/testsuite/gcc.dg/guality/restrict.c
+++ b/gcc/testsuite/gcc.dg/guality/restrict.c
@@ -2,19 +2,19 @@
/* { dg-do run } */
/* { dg-options -std=c99 -gdwarf-3 } */
-int *ip;
-const int *cip;
-int * restrict irp;
-int * const icp;
-const int * restrict cirp;
-int * const restrict icrp;
-const int * const restrict cicrp;
+int *ip __attribute__((used));
+const int *cip __attribute__((used));
+int * restrict irp __attribute__((used));
+int * const icp __attribute__((used));
+const int * restrict cirp __attribute__((used));
+int * const restrict icrp __attribute__((used));
+const int * const restrict cicrp __attribute__((used));
-int * const volatile restrict cvirp;
-const volatile int * restrict pcvir;
+int * const volatile restrict cvirp __attribute__((used));
+const volatile int * restrict pcvir __attribute__((used));
static __attribute__((noclone, noinline)) void *
-cpy (void * restrict s1, const void * restrict s2, unsigned int n)
+cpy (void * restrict s1, const void * restrict s2, int n)
{
char *t1 = s1;
const char *t2 = s2;
@@ -45,4 +45,4 @@ main (int argc, char **argv)
/* { dg-final { gdb-test 30 type:pcvir const volatile int * restrict } }
*/
/* { dg-final { gdb-test 30 type:main int (int, char **) } } */
-/* { dg-final { gdb-test 30 type:cpy void *(void * restrict, const void *
restrict, unsigned int) } } */
+/* { dg-final { gdb-test 30 type:cpy void *(void * restrict, const void *
restrict, int) } } */
[C++ Patch] Add default arguments to cp_parser_assignment_expression and cp_parser_constant_expression
Hi,
two more functions. Tested x86_64-linux.
Thanks,
Paolo.
///
2014-08-19 Paolo Carlini paolo.carl...@oracle.com
* parser.c (cp_parser_assignment_expression,
cp_parser_constant_expression): Add default arguments.
(cp_parser_primary_expression,
cp_parser_postfix_open_square_expression,
cp_parser_parenthesized_expression_list,
cp_parser_question_colon_clause,
cp_parser_expression, cp_parser_constant_expression,
cp_parser_label_for_labeled_statement, cp_parser_static_assert,
cp_parser_template_argument, cp_parser_enumerator_definition,
cp_parser_member_declaration, cp_parser_constant_initializer,
cp_parser_noexcept_specification_opt, cp_parser_throw_expression,
cp_parser_std_attribute_spec, cp_parser_objc_message_args,
cp_parser_objc_class_ivars, cp_parser_omp_clause_collapse,
cp_parser_omp_clause_aligned, cp_parser_omp_clause_safelen,
cp_parser_omp_clause_simdlen, cp_parser_omp_clause_dist_schedule,
cp_parser_omp_for_incr, cp_parser_omp_for_loop_init,
cp_parser_cilk_simd_vectorlength, cp_parser_cilk_simd_linear): Adjust.
Index: parser.c
===
--- parser.c(revision 214138)
+++ parser.c(working copy)
@@ -1959,13 +1959,13 @@ static tree cp_parser_binary_expression
static tree cp_parser_question_colon_clause
(cp_parser *, tree);
static tree cp_parser_assignment_expression
- (cp_parser *, bool, cp_id_kind *);
+ (cp_parser *, cp_id_kind * = NULL, bool = false, bool = false);
static enum tree_code cp_parser_assignment_operator_opt
(cp_parser *);
static tree cp_parser_expression
(cp_parser *, cp_id_kind * = NULL, bool = false, bool = false);
static tree cp_parser_constant_expression
- (cp_parser *, bool, bool *);
+ (cp_parser *, bool = false, bool * = NULL);
static tree cp_parser_builtin_offsetof
(cp_parser *);
static tree cp_parser_lambda_expression
@@ -4446,8 +4446,7 @@ cp_parser_primary_expression (cp_parser *parser,
/* Look for the opening `('. */
cp_parser_require (parser, CPP_OPEN_PAREN, RT_OPEN_PAREN);
/* Now, parse the assignment-expression. */
- expression = cp_parser_assignment_expression (parser,
- /*cast_p=*/false,
NULL);
+ expression = cp_parser_assignment_expression (parser);
/* Look for the `,'. */
cp_parser_require (parser, CPP_COMMA, RT_COMMA);
type_location = cp_lexer_peek_token (parser-lexer)-location;
@@ -6415,7 +6411,7 @@ cp_parser_postfix_open_square_expression (cp_parse
Rather than open the barn door too wide right away, allow only integer
constant expressions here. */
if (for_offsetof)
-index = cp_parser_constant_expression (parser, false, NULL);
+index = cp_parser_constant_expression (parser);
else
{
if (cp_lexer_next_token_is (parser-lexer, CPP_OPEN_BRACE))
@@ -6798,8 +6794,8 @@ cp_parser_parenthesized_expression_list (cp_parser
break;
}
if (expr == NULL_TREE)
- expr = cp_parser_assignment_expression (parser, cast_p,
- NULL);
+ expr = cp_parser_assignment_expression (parser, /*pidk=*/NULL,
+ cast_p);
}
if (fold_expr_p)
@@ -8229,7 +8220,7 @@ cp_parser_question_colon_clause (cp_parser* parser
/* The next token should be a `:'. */
cp_parser_require (parser, CPP_COLON, RT_COLON);
/* Parse the assignment-expression. */
- assignment_expr = cp_parser_assignment_expression (parser, /*cast_p=*/false,
NULL);
+ assignment_expr = cp_parser_assignment_expression (parser);
c_inhibit_evaluation_warnings -= logical_or_expr == truthvalue_true_node;
/* Build the conditional-expression. */
@@ -8252,8 +8243,8 @@ cp_parser_question_colon_clause (cp_parser* parser
Returns a representation for the expression. */
static tree
-cp_parser_assignment_expression (cp_parser* parser, bool cast_p,
-bool decltype_p, cp_id_kind * pidk)
+cp_parser_assignment_expression (cp_parser* parser, cp_id_kind * pidk,
+bool cast_p, bool decltype_p)
{
tree expr;
@@ -8313,14 +8304,6 @@ static tree
return expr;
}
-static tree
-cp_parser_assignment_expression (cp_parser* parser, bool cast_p,
-cp_id_kind * pidk)
-{
- return cp_parser_assignment_expression (parser, cast_p,
- /*decltype*/false, pidk);
-}
-
/* Parse an (optional) assignment-operator.
assignment-operator: one of
@@ -8430,7 +8413,7 @@ cp_parser_expression (cp_parser* parser, cp_id_kin
/* Parse the next assignment-expression.
Re: [gomp4] Add tables generation
On 19 Aug 13:55, Bernd Schmidt wrote:
On 08/19/2014 12:41 PM, Ilya Verbin wrote:
For the functions it's not so easy to identify which of them to add into the
table, e.g.:
#pragma omp target
#pragma omp parallel
x++;
Here 2 functions with omp declare target attribute are created. But only
the outer must be added to the table.
So I believe that expand_omp_target is better place for the functions.
Hmm, ok. Can you elaborate how this happens and why only one must be
added to the table?
Here is gimple for this testcase:
foo ()
{
/* prepare data */
__builtin_GOMP_target (-1, foo._omp_fn.0, /* data */);
}
foo._omp_fn.0 (struct .omp_data_t.0 * .omp_data_i)
{
/* prepare data */
__builtin_GOMP_parallel (foo._omp_fn.1, /* data */);
}
foo._omp_fn.1 (struct .omp_data_s.1 * .omp_data_i)
{
_3 = .omp_data_i_2(D)-x;
_4 = _3 + 1;
.omp_data_i_2(D)-x = _4;
}
Both fn.0 and fn.1 can be executed on host and on target, therefore they have
omp declare target attribute. And there are 2 alternatives during runtime:
1. GOMP_target calls fn.0 on host, which calls fn.1 on host.
2. GOMP_target offloads fn.0 and fn.1, and runs fn.0 on target, which calls
fn.1.
So, there is only one entry point for GOMP_target - fn.0, and GOMP_target
can't run fn.1 on target directly, that's why only fn.0 must be added to the
table.
-- Ilya
Re: [PATCH] Fix for PR/62089 (enable missing Asan checks)
On 08/19/2014 03:37 PM, Dominique Dhumieres wrote: Makes sense, I've attached new patch (retested as usual). Well, you probably did not test with -m32: Right, I only did plain make check until now. Thanks for reporting, I'll check this tomorrow. -Y
[PATCH][match-and-simplify] Allow zero-operand operators as predicates
This makes us accept
(plus @0 INTEGER_CST)
and parse it as (plus @0 (INTEGER_CST)), that is, handle operator
names in predicate position as expression with zero operands.
This makes those leafs better integrate with the decision tree
and also removes the need to define all those INTEGER_CST_P
predicates.
For now gobble in all tcc_constant tree codes for this as well.
Note that doing
(for x in INTEGER_CST VECTOR_CST
(simplify
(plus @1 x)
...
does not (yet) work ('x' parses as predicate here).
Tested on x86_64-unknown-linux-gnu, applied.
Richard.
2014-08-19 Richard Biener rguent...@suse.de
* genmatch.c (is_a_helper): Provide specializations for
fn_id and operator_id.
(add_operator): Collect tcc_constant codes.
(commutate): Special-case zero-operand expressions.
(dt_node::get_expr_code): Likewise.
(parse_op): When parsing an id allow zero-operand operators
as predicates, parsing as expression, and disallow any other
operator names.
* gimple-match-head.c (INTEGER_CST_P): Remove.
(REAL_CST_P): Likewise.
* match-bitwise.pd: Use INTEGER_CST instead of INTEGER_CST_P
and REAL_CST instead of REAL_CST_P.
* match-builtin.pd: Likewise.
* match-plusminus.pd: Likewise.
* match-rotate.pd: Likewise.
* match.pd: Likewise.
* match-comparison: Likewise.
Index: gcc/genmatch.c
===
*** gcc/genmatch.c.orig 2014-08-19 14:11:18.791879827 +0200
--- gcc/genmatch.c 2014-08-19 14:27:52.127811437 +0200
*** struct fn_id : public id_base
*** 174,179
--- 174,194
enum built_in_function fn;
};
+ template
+ template
+ inline bool
+ is_a_helper fn_id *::test (id_base *id)
+ {
+ return id-kind == id_base::FN;
+ }
+
+ template
+ template
+ inline bool
+ is_a_helper operator_id *::test (id_base *id)
+ {
+ return id-kind == id_base::CODE;
+ }
static void
add_operator (enum tree_code code, const char *id,
*** add_operator (enum tree_code code, const
*** 184,190
strcmp (tcc, tcc_comparison) != 0
strcmp (tcc, tcc_expression) != 0
/* For {REAL,IMAG}PART_EXPR and VIEW_CONVERT_EXPR. */
!strcmp (tcc, tcc_reference) != 0)
return;
operator_id *op = new operator_id (code, id, nargs);
id_base **slot = operators-find_slot_with_hash (op, op-hashval, INSERT);
--- 199,207
strcmp (tcc, tcc_comparison) != 0
strcmp (tcc, tcc_expression) != 0
/* For {REAL,IMAG}PART_EXPR and VIEW_CONVERT_EXPR. */
!strcmp (tcc, tcc_reference) != 0
! /* To have INTEGER_CST and friends as predicate operators. */
!strcmp (tcc, tcc_constant) != 0)
return;
operator_id *op = new operator_id (code, id, nargs);
id_base **slot = operators-find_slot_with_hash (op, op-hashval, INSERT);
*** commutate (operand *op)
*** 580,585
--- 597,607
}
expr *e = static_castexpr * (op);
+ if (e-ops.length () == 0)
+ {
+ ret.safe_push (e);
+ return ret;
+ }
vec vecoperand * ops_vector = vNULL;
for (unsigned i = 0; i e-ops.length (); ++i)
*** dt_node::get_expr_code (enum tree_code
*** 1391,1396
--- 1413,1421
return false;
operator_id *opr = static_castoperator_id * (e-operation-op);
+ if (opr-nargs == 0)
+ return false;
+
code = opr-code;
return true;
}
*** parse_op (cpp_reader *r)
*** 2272,2278
/* Remaining ops are either empty or predicates */
if (token-type == CPP_NAME)
{
! op = new predicate (get_ident (r));
token = peek (r);
if (token-flags PREV_WHITE)
return op;
--- 2297,2320
/* Remaining ops are either empty or predicates */
if (token-type == CPP_NAME)
{
! const char *id = get_ident (r);
! /* We support zero-operand operator names as predicates. */
! id_base *opr = get_operator (id);
! if (opr)
! {
! if (operator_id *code = dyn_cast operator_id * (opr))
! {
! if (code-nargs != 0)
! fatal_at (token, using an operator with operands as
predicate);
! /* Parse the zero-operand operator predicates as
!expression. */
! op = new expr (new e_operation (id));
! }
! else
! fatal_at (token, using an unsupported operator as predicate);
! }
! else
! op = new predicate (id);
token = peek (r);
if (token-flags PREV_WHITE)
return op;
Index: gcc/match-bitwise.pd
===
*** gcc/match-bitwise.pd.orig 2014-08-19 14:08:08.825892906 +0200
--- gcc/match-bitwise.pd2014-08-19
[PATCH][match-and-simplify] Split out common code for c_expr codegen
Applied.
Richard.
2014-08-19 Richard Biener rguent...@suse.de
* genmatch.c (c_expr::output_code): New method.
(c_expr::gen_transform): Call it.
(outline_c_exprs): Likewise.
Index: gcc/genmatch.c
===
--- gcc/genmatch.c (revision 214146)
+++ gcc/genmatch.c (working copy)
@@ -287,6 +287,7 @@ struct c_expr : public operand
vecid_tab ids;
virtual void gen_transform (FILE *f, const char *, bool, int);
+ void output_code (FILE *f, bool);
};
struct capture : public operand
@@ -916,21 +917,9 @@ expr::gen_transform (FILE *f, const char
}
void
-c_expr::gen_transform (FILE *f, const char *dest, bool, int)
+c_expr::output_code (FILE *f, bool for_fn)
{
- /* If this expression has an outlined function variant, call it. */
- if (fname)
-{
- fprintf (f, %s = %s (type, captures);\n, dest, fname);
- return;
-}
-
- /* All multi-stmt expressions should have been outlined. */
- gcc_assert (nr_stmts = 1);
-
- if (nr_stmts == 1)
-fprintf (f, %s = , dest);
-
+ unsigned stmt_nr = 1;
for (unsigned i = 0; i code.length (); ++i)
{
const cpp_token *token = code[i];
@@ -972,10 +961,37 @@ c_expr::gen_transform (FILE *f, const ch
/* Output the token as string. */
char *tk = (char *)cpp_token_as_text (r, token);
fputs (tk, f);
+
+ if (token-type == CPP_SEMICOLON)
+ {
+ stmt_nr++;
+ if (for_fn stmt_nr == nr_stmts)
+ fputs (\n return , f);
+ else
+ fputc ('\n', f);
+ }
+}
+}
+
+
+void
+c_expr::gen_transform (FILE *f, const char *dest, bool, int)
+{
+ /* If this expression has an outlined function variant, call it. */
+ if (fname)
+{
+ fprintf (f, %s = %s (type, captures);\n, dest, fname);
+ return;
}
+ /* All multi-stmt expressions should have been outlined. Expressions
+ with nr_stmts == 0 are used for if-expressions. */
+ gcc_assert (nr_stmts = 1);
+
if (nr_stmts == 1)
-fprintf (f, \n);
+fprintf (f, %s = , dest);
+
+ output_code (f, false);
}
void
@@ -1949,60 +1965,7 @@ outline_c_exprs (FILE *f, struct operand
fprintf (f, \nstatic tree\ncexprfn%d (tree type, tree *captures)\n,
fnnr);
fprintf (f, {\n);
- unsigned stmt_nr = 1;
- for (unsigned i = 0; i e-code.length (); ++i)
- {
- const cpp_token *token = e-code[i];
-
- /* Replace captures for code-gen. */
- if (token-type == CPP_ATSIGN)
- {
- const cpp_token *n = e-code[i+1];
- if (n-type == CPP_NUMBER
- !(n-flags PREV_WHITE))
- {
- if (token-flags PREV_WHITE)
- fputc (' ', f);
- fprintf (f, captures[%s], n-val.str.text);
- ++i;
- continue;
- }
- }
-
- if (token-flags PREV_WHITE)
- fputc (' ', f);
-
- if (token-type == CPP_NAME)
- {
- const char *id = (const char *) NODE_NAME
(token-val.node.node);
- unsigned j;
-
- for (j = 0; j e-ids.length (); ++j)
- {
- if (strcmp (id, e-ids[j].id) == 0)
- {
- fprintf (f, %s, e-ids[j].oper);
- break;
- }
- }
-
- if (j e-ids.length ())
- continue;
- }
-
- /* Output the token as string. */
- char *tk = (char *)cpp_token_as_text (e-r, token);
- fputs (tk, f);
-
- if (token-type == CPP_SEMICOLON)
- {
- stmt_nr++;
- if (stmt_nr == e-nr_stmts)
- fputs (\n return , f);
- else
- fputc ('\n', f);
- }
- }
+ e-output_code (f, true);
fprintf (f, }\n);
fnnr++;
}
Re: [PATCH][AArch64][tests]Skip graphite tests that don't fit -mcmodel=tiny
On 11/08/14 18:34, Mike Stump wrote:
On Aug 11, 2014, at 2:06 AM, Richard Earnshaw rearn...@arm.com wrote:
Not quite, read the subject line again.
Doh. I did miss that entirely. The solutions I gave were for other cases than
the case at hand.
I'm not sure what the correct change to the testsuite is here.
The below is close, let me refine it a little.
Perhaps the best solution would be something like marking the test as
large in some way and for large tests the linker would handle
relocation truncated to fit errors from the linker through some target
hook that had a better understanding of whether size related options
were being used and could decide between error and unsupported.
How about a target tiny in supports.exp and any target that is tiny, we handle
overflows in relocs as always unsupported. Works for all tiny targets, and
uniformly works for all languages and all test cases of all time. Doesn’t
depend upon guessing a size (how many bytes is tiny, is it code or data, and
exactly how many bytes were generated on the target for the test case) nor
guessing which test case are large. If you test the entire test suite with the
tiny flag or if that flag is the default, then supports will say that the
target is tiny. If you don’t give that flag and it isn’t the default, that
same target is large. A person that only has tiny, can just say I’m tiny, and
be forever done with it. An advanced ports with relaxation can then remove the
I’m tiny, and then test relaxation.
I think that offers little code to do this (5-10 lines), handles most
situations nicely, retains as much testing as possible generally speaking.
If one wants to handle mcmodel options on test cases seamlessly, one can use
check-flags I think as well, see check_effective_target_arm_fp16_ok_nocache for
example.
Something like:
proc ${tool}_check_unsupported_p { output } {
if [regexp (^|\n)\[^\n\]*: region \[^\n\]* is full $output] {
return memory full”
+if { [regexp (^|\n)\[^\n\]*: relocation truncated to fit $output]
[check_effective_target_tiny] } {
return memory full”
}
proc check_effective_target_tiny { } {
if { [istarget blabla-*-*]
return 1
}
return 0
}
if the choice is static for the target. Slightly more complex is check-flags
is used. I’ll leave that as an exercise for the reader. :-)
So how about this?
We add a check_effective_target_tiny (and define it for aarch64) and
when find a relocation truncated message we say it's unsupported only
when check_effective_target_tiny holds.
Kyrill
2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com
* lib/gcc-defs.exp (${tool}_check_unsupported_p):
Return memory full when we have a tiny target and relocation
truncation occurs.
* lib/gcc-dg.exp (gcc-dg-prune): Likewise.
* lib/objc.exp (${tool}_check_unsupported_p): Likewise.
* lib/target-supports.exp (check_effective_target_tiny): New function.
diff --git a/gcc/testsuite/lib/gcc-defs.exp b/gcc/testsuite/lib/gcc-defs.exp
index 69a5971..1ea7028 100644
--- a/gcc/testsuite/lib/gcc-defs.exp
+++ b/gcc/testsuite/lib/gcc-defs.exp
@@ -157,6 +157,11 @@ proc ${tool}_check_unsupported_p { output } {
if [regexp (^|\n)\[^\n\]*: region \[^\n\]* is full $output] {
return memory full
}
+if { [regexp (^|\n)\[^\n\]*: relocation truncated to fit $output]
+ [check_effective_target_tiny] } {
+return memory full
+ }
+
if { [istarget spu-*-*] \
[string match *exceeds local store* $output] } {
return memory full
diff --git a/gcc/testsuite/lib/gcc-dg.exp b/gcc/testsuite/lib/gcc-dg.exp
index 3390caa..dfdb257 100644
--- a/gcc/testsuite/lib/gcc-dg.exp
+++ b/gcc/testsuite/lib/gcc-dg.exp
@@ -233,6 +233,11 @@ proc gcc-dg-prune { system text } {
return ::unsupported::memory full
}
+if { [regexp (^|\n)\[^\n\]*: relocation truncated to fit $text]
+ [check_effective_target_tiny] } {
+return ::unsupported::memory full
+}
+
# Likewise, if we see .text exceeds local store range or
# similar.
if {[string match spu-* $system] \
diff --git a/gcc/testsuite/lib/objc.exp b/gcc/testsuite/lib/objc.exp
index 5ecefa9..e19b264 100644
--- a/gcc/testsuite/lib/objc.exp
+++ b/gcc/testsuite/lib/objc.exp
@@ -357,6 +357,10 @@ proc ${tool}_check_unsupported_p { output } {
if [regexp (^|\n)\[^\n\]*: region \[^\n\]* is full $output] {
return memory full
}
+if { [regexp (^|\n)\[^\n\]*: relocation truncated to fit $output]
+ [check_effective_target_tiny] } {
+return memory full
+}
return
}
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index c03370d..9eed181 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5950,6 +5950,14 @@ proc check_effective_target_fenv_exceptions {} {
} [add_options_for_ieee -std=gnu99]]
}
+proc
RE: [PATCH, Fortran] PR61234: -Wuse-no-only
VandeVondele Joost wrote:
So the negative version is -Wno-use-no-only? That sounds weird.
What about -Wuse-without-only?
Would be fine with me. Approved with this change ?
That would be the patch: https://gcc.gnu.org/ml/fortran/2014-06/msg00114.html
+Warn if a use statement has no only qualifier and thus implicitly imports
+all public entities of the used module.
I would use USE statement or even @code{USE} statement.
OK with the documentation change and with the re-named option. Please
also update the name in the code.
Regarding
+ USE foo, ONLY: bar ! { dg-bogus has no ONLY qualifier }
+ END SUBROUTINE
+ SUBROUTINE S3
+ USE ISO_C_BINDING ! { dg-warning has no ONLY qualifier }
+ END SUBROUTINE S3
+END MODULE
+! { dg-final { cleanup-modules foo testmod } }
The cleanup module shouldn't be needed as most of the time that
now happens automatically. And dg-bogus is also not really needed
as the code checks for excess errors and warnings. On the other hand,
it shouldn't do much harm either.
Thanks for the patch!
Regards,
Tobias
Re: [gomp4] Add tables generation
On 19 Aug 13:55, Bernd Schmidt wrote: In any case, I think let's get this checked in for now and iterate later. Committed revision 214148. -- Ilya
Re: [PATCH][AArch64] Use CC_Z and CC_NZ with csinc and similar instructions
On 18/08/14 19:52, Richard Henderson wrote: On 08/18/2014 05:24 AM, Kyrill Tkachov wrote: -(define_insn *csinc2mode_insn +(define_insn *csinc2mode_CC_ZERO:mode_insn [(set (match_operand:GPI 0 register_operand =r) (plus:GPI (match_operator:GPI 2 aarch64_comparison_operator - [(match_operand:CC 3 cc_register ) (const_int 0)]) + [(match_operand:CC_ZERO 3 cc_register ) (const_int 0)]) Rather than create 3 patterns that only vary in this mode, it would be better to use (match_operand 3 cc_register_zero). Where the predicate is defined with define_special_predicate so that you move the mode check inside the predicate. Like this? I define in a similar way to cc_register, but add an extra ior for the CC_Z and CC_NZmode. Kyrill 2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com * config/aarch64/predicates.md (cc_register_zero): New special predicate. * config/aarch64/aarch64.md (*csinc2mode_insn): Use cc_register_zero predicate instead of cc_register. (csinc3mode_insn): Likewise. (*csinv3mode_insn): Likewise. (*csneg3mode_insn): Likewise. r~ commit 6481f4befaadd67d4124e80db4514cf3fd9dbfa6 Author: Kyrylo Tkachov kyrylo.tkac...@arm.com Date: Mon Aug 4 16:49:24 2014 +0100 [AArch64] Use CC_NZ in csinc pattern diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 3c51fd3..f172d56 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -2599,7 +2599,7 @@ (define_insn aarch64_crc_variant (define_insn *csinc2mode_insn [(set (match_operand:GPI 0 register_operand =r) (plus:GPI (match_operator:GPI 2 aarch64_comparison_operator - [(match_operand:CC 3 cc_register ) (const_int 0)]) + [(match_operand 3 cc_register_zero ) (const_int 0)]) (match_operand:GPI 1 register_operand r)))] csinc\\t%w0, %w1, %w1, %M2 @@ -2610,7 +2610,7 @@ (define_insn csinc3mode_insn [(set (match_operand:GPI 0 register_operand =r) (if_then_else:GPI (match_operator:GPI 1 aarch64_comparison_operator - [(match_operand:CC 2 cc_register ) (const_int 0)]) + [(match_operand 2 cc_register_zero ) (const_int 0)]) (plus:GPI (match_operand:GPI 3 register_operand r) (const_int 1)) (match_operand:GPI 4 aarch64_reg_or_zero rZ)))] @@ -2623,7 +2623,7 @@ (define_insn *csinv3mode_insn [(set (match_operand:GPI 0 register_operand =r) (if_then_else:GPI (match_operator:GPI 1 aarch64_comparison_operator - [(match_operand:CC 2 cc_register ) (const_int 0)]) + [(match_operand 2 cc_register_zero ) (const_int 0)]) (not:GPI (match_operand:GPI 3 register_operand r)) (match_operand:GPI 4 aarch64_reg_or_zero rZ)))] @@ -2635,7 +2635,7 @@ (define_insn *csneg3mode_insn [(set (match_operand:GPI 0 register_operand =r) (if_then_else:GPI (match_operator:GPI 1 aarch64_comparison_operator - [(match_operand:CC 2 cc_register ) (const_int 0)]) + [(match_operand 2 cc_register_zero ) (const_int 0)]) (neg:GPI (match_operand:GPI 3 register_operand r)) (match_operand:GPI 4 aarch64_reg_or_zero rZ)))] diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md index 3dd83ca..8c218df 100644 --- a/gcc/config/aarch64/predicates.md +++ b/gcc/config/aarch64/predicates.md @@ -26,6 +26,16 @@ (define_special_predicate cc_register GET_MODE_CLASS (GET_MODE (op)) == MODE_CC ) +(define_special_predicate cc_register_zero + (and (match_code reg) + (and (match_test REGNO (op) == CC_REGNUM) + (ior (match_test mode == GET_MODE (op)) + (ior (match_test mode == VOIDmode + GET_MODE_CLASS (GET_MODE (op)) == MODE_CC) + (match_test mode == CCmode || mode == CC_Zmode + || mode == CC_NZmode) +) + (define_predicate aarch64_call_insn_operand (ior (match_code symbol_ref) (match_operand 0 register_operand)))
Re: DSE calls to builtins (memset, etc)
On Sat, Aug 16, 2014 at 11:21 PM, Marc Glisse marc.gli...@inria.fr wrote:
Hello,
here is a patch extending DSE to handle calls to memset, memcpy and memmove.
A number of alias functions didn't have a version taking an ao_ref*, so I
added those. Instead of naming things _1, _2, etc I took advantage of C++
and overloaded. I kept ref_maybe_used_by_call_p so we are still updating the
stats, but I am not sure how reliable they are, for instance there are a
number of direct calls to refs_may_alias_p_1 that skip the stats in
refs_may_alias_p (so I didn't add counters to the new refs_may_alias_p
overload).
The piece of code I removed from dse_optimize_stmt was dead, the test has
already been done in dse_possible_dead_store_p (and I ran
bootstrap+testsuite with an assertion to confirm).
I only listed 3 builtins, but it should be easy to add more. The condition
about the third argument is unnecessary for now, but copied from
tree-ssa-alias.c to make it easier to add more builtins like strcpy.
Bootstrap+testsuite (really all languages) on x86_64-linux-gnu.
Comments below
2014-08-18 Marc Glisse marc.gli...@inria.fr
PR tree-optimization/62112
gcc/
tree-ssa-alias.c (ref_may_alias_global_p, refs_may_alias_p,
ref_maybe_used_by_stmt_p): New overloads.
(ref_maybe_used_by_call_p): Take ao_ref* instead of tree.
(stmt_kills_ref_p_1): Rename...
(stmt_kills_ref_p): ... to this.
tree-ssa-alias.h (ref_may_alias_global_p, ref_maybe_used_by_stmt_p,
stmt_kills_ref_p): Declare.
tree-ssa-dse.c (dse_possible_dead_store_p): New argument, use it.
Move the self-assignment case...
(dse_optimize_stmt): ... here. Handle builtin calls. Remove dead
code.
gcc/testsuite/
gcc.dg/tree-ssa/pr62112-1.c: New file.
gcc.dg/tree-ssa/pr62112-2.c: Likewise.
--
Marc Glisse
Index: gcc/testsuite/gcc.dg/tree-ssa/pr62112-1.c
===
--- gcc/testsuite/gcc.dg/tree-ssa/pr62112-1.c (revision 0)
+++ gcc/testsuite/gcc.dg/tree-ssa/pr62112-1.c (working copy)
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options -O1 -fdump-tree-dse1-details } */
+
+void f(){
+ char*p=__builtin_malloc(42);
+ __builtin_memset(p,3,10);
+ __builtin_memset(p,7,33);
+}
+char*g;
+void h(){
+ char*p=__builtin_malloc(42);
+ g=__builtin_memset(p,3,10);
+ __builtin_free(p);
+}
+char*i(){
+ char*p=__builtin_malloc(42);
+ __builtin_memset(p,3,10);
+ __builtin_memset(p,7,33);
+ return p;
+}
+
+/* { dg-final { scan-tree-dump-times Deleted dead store 4 dse1 } } */
+/* { dg-final { cleanup-tree-dump dse1 } } */
Index: gcc/testsuite/gcc.dg/tree-ssa/pr62112-2.c
===
--- gcc/testsuite/gcc.dg/tree-ssa/pr62112-2.c (revision 0)
+++ gcc/testsuite/gcc.dg/tree-ssa/pr62112-2.c (working copy)
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options -O1 -fdump-tree-dse1-details } */
+
+char*g;
+char* f(){
+ char*p=__builtin_malloc(42);
+ __builtin_memset(p,3,33);
+ __builtin_memset(p,7,10);
+ return p;
+}
+void h(){
+ char*p=__builtin_malloc(42);
+ g=__builtin_memset(p,3,10);
+}
+
+/* { dg-final { scan-tree-dump-not Deleted dead store dse1 } } */
+/* { dg-final { cleanup-tree-dump dse1 } } */
Index: gcc/tree-ssa-alias.c
===
--- gcc/tree-ssa-alias.c(revision 214066)
+++ gcc/tree-ssa-alias.c(working copy)
@@ -326,31 +326,39 @@ ptr_deref_may_alias_ref_p_1 (tree ptr, a
return ptr_derefs_may_alias_p (ptr, TREE_OPERAND (base, 0));
else if (DECL_P (base))
return ptr_deref_may_alias_decl_p (ptr, base);
return true;
}
/* Return true whether REF may refer to global memory. */
bool
-ref_may_alias_global_p (tree ref)
+ref_may_alias_global_p (ao_ref *ref)
{
- tree base = get_base_address (ref);
+ tree base = ao_ref_base (ref);
if (DECL_P (base))
return is_global_var (base);
else if (TREE_CODE (base) == MEM_REF
|| TREE_CODE (base) == TARGET_MEM_REF)
return ptr_deref_may_alias_global_p (TREE_OPERAND (base, 0));
return true;
}
+bool
+ref_may_alias_global_p (tree ref)
+{
+ ao_ref r;
+ ao_ref_init (r, ref);
+ return ref_may_alias_global_p (r);
+}
+
I'd do two wrapers then since get_base_address is way cheaper
than doing ao_ref_base. Thus, split out the code doing the
actual job into a static ref_may_alias_global_1?
/* Return true whether STMT may clobber global memory. */
bool
stmt_may_clobber_global_p (gimple stmt)
{
tree lhs;
if (!gimple_vdef (stmt))
return false;
@@ -1406,20 +1414,28 @@ refs_may_alias_p_1 (ao_ref *ref1, ao_ref
tbaa_p);
/* We really do not want to end up here, but returning true is safe. */
#ifdef ENABLE_CHECKING
Re: [PATCH] Fix devirt to NULL
This fixes Honzas previous commit to not build integer_zero_node (what?).
Oops, thanks!
Honza
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2014-08-19 Richard Biener rguent...@suse.de
* gimple-fold.c (fold_gimple_assign): Properly build a
null-pointer constant when devirtualizing addresses.
Index: gcc/gimple-fold.c
===
--- gcc/gimple-fold.c (revision 214135)
+++ gcc/gimple-fold.c (working copy)
@@ -319,14 +319,6 @@ fold_gimple_assign (gimple_stmt_iterator
= possible_polymorphic_call_targets (rhs, stmt, final);
if (final targets.length () = 1 dbg_cnt (devirt))
{
- tree fndecl;
-
- if (targets.length () == 1)
- fndecl = targets[0]-decl;
- else
- /* We can not use __builtin_unreachable here because it
- can not have address taken. */
- fndecl = integer_zero_node;
if (dump_enabled_p ())
{
location_t loc = gimple_location_safe (stmt);
@@ -335,11 +327,19 @@ fold_gimple_assign (gimple_stmt_iterator
reference to function %s\n,
targets.length () == 1
? targets[0]-name ()
- : __builtin_unreachable);
+ : NULL);
+ }
+ if (targets.length () == 1)
+ {
+ val = fold_convert (TREE_TYPE (val),
+ build_fold_addr_expr_loc
+ (loc, targets[0]-decl));
+ STRIP_USELESS_TYPE_CONVERSION (val);
}
- val = fold_convert (TREE_TYPE (val),
- build_fold_addr_expr_loc (loc, fndecl));
- STRIP_USELESS_TYPE_CONVERSION (val);
+ else
+ /* We can not use __builtin_unreachable here because it
+ can not have address taken. */
+ val = build_int_cst (TREE_TYPE (val), 0);
return val;
}
}
[PATCH AArch64 2/2] Remove vector compare/tst __builtins
The vector compare intrinsics (vc[gl][et]z, vceqz, vtst) were written using
__builtin functions as (IIUC) at the time gcc vector extensions did not support
comparison ops across both C and C++ frontends. These have since been updated.
Following the first patch, we now get equal/better code generation from using
gcc vector extensions (specifically, TST instructions are generated again, and
all NOTs are eliminated), so we can remove a bunch of code and builtins :).
Tested with check-gcc and check-g++ on aarch64-none-elf, aarch64.exp+simd.exp on
aarch64_be-none-elf.
gcc/ChangeLog:
* config/aarch64/aarch64-builtins.c (aarch64_fold_builtin): Remove code
handling cmge, cmgt, cmeq, cmtst.
* config/aarch64/aarch64-simd-builtins.def (cmeq, cmge, cmgt, cmle,
cmlt, cmgeu, cmgtu, cmtst): Remove.
* config/aarch64/arm_neon.h (vceq_*, vceqq_*, vceqz_*, vceqzq_*,
vcge_*, vcgeq_*, vcgez_*, vcgezq_*, vcgt_*, vcgtq_*, vcgtz_*,
vcgtzq_*, vcle_*, vcleq_*, vclez_*, vclezq_*, vclt_*, vcltq_*,
vcltz_*, vcltzq_*, vtst_*, vtstq_*): Use gcc vector extensions.
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index c3df73e..aa2c40c 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -1215,22 +1215,6 @@ aarch64_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *args,
BUILTIN_VALLDI (UNOP, abs, 2)
return fold_build1 (ABS_EXPR, type, args[0]);
break;
- BUILTIN_VALLDI (BINOP, cmge, 0)
- return fold_build2 (GE_EXPR, type, args[0], args[1]);
- break;
- BUILTIN_VALLDI (BINOP, cmgt, 0)
- return fold_build2 (GT_EXPR, type, args[0], args[1]);
- break;
- BUILTIN_VALLDI (BINOP, cmeq, 0)
- return fold_build2 (EQ_EXPR, type, args[0], args[1]);
- break;
- BUILTIN_VSDQ_I_DI (TST, cmtst, 0)
- {
- tree and_node = fold_build2 (BIT_AND_EXPR, type, args[0], args[1]);
- tree vec_zero_node = build_zero_cst (type);
- return fold_build2 (NE_EXPR, type, and_node, vec_zero_node);
- break;
- }
VAR1 (REINTERP_SS, reinterpretdi, 0, df)
VAR1 (REINTERP_SS, reinterpretv8qi, 0, df)
VAR1 (REINTERP_SS, reinterpretv4hi, 0, df)
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index ae52469..9320e99 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -240,17 +240,6 @@
BUILTIN_VSDQ_I (SHIFTIMM, sqshl_n, 0)
BUILTIN_VSDQ_I (SHIFTIMM, uqshl_n, 0)
- /* Implemented by aarch64_cmcmpmode. */
- BUILTIN_VALLDI (BINOP, cmeq, 0)
- BUILTIN_VALLDI (BINOP, cmge, 0)
- BUILTIN_VALLDI (BINOP, cmgt, 0)
- BUILTIN_VALLDI (BINOP, cmle, 0)
- BUILTIN_VALLDI (BINOP, cmlt, 0)
- /* Implemented by aarch64_cmcmpmode. */
- BUILTIN_VSDQ_I_DI (BINOP, cmgeu, 0)
- BUILTIN_VSDQ_I_DI (BINOP, cmgtu, 0)
- BUILTIN_VSDQ_I_DI (TST, cmtst, 0)
-
/* Implemented by reduc_surplus_mode. */
BUILTIN_VALL (UNOP, reduc_splus_, 10)
BUILTIN_VDQ (UNOP, reduc_uplus_, 10)
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index e7485f0..ea56b82 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -14632,7 +14632,7 @@ vcaltq_f64 (float64x2_t __a, float64x2_t __b)
__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
vceq_f32 (float32x2_t __a, float32x2_t __b)
{
- return (uint32x2_t) __builtin_aarch64_cmeqv2sf (__a, __b);
+ return (uint32x2_t) (__a == __b);
}
__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
@@ -14644,26 +14644,25 @@ vceq_f64 (float64x1_t __a, float64x1_t __b)
__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
vceq_p8 (poly8x8_t __a, poly8x8_t __b)
{
- return (uint8x8_t) __builtin_aarch64_cmeqv8qi ((int8x8_t) __a,
- (int8x8_t) __b);
+ return (uint8x8_t) (__a == __b);
}
__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
vceq_s8 (int8x8_t __a, int8x8_t __b)
{
- return (uint8x8_t) __builtin_aarch64_cmeqv8qi (__a, __b);
+ return (uint8x8_t) (__a == __b);
}
__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__))
vceq_s16 (int16x4_t __a, int16x4_t __b)
{
- return (uint16x4_t) __builtin_aarch64_cmeqv4hi (__a, __b);
+ return (uint16x4_t) (__a == __b);
}
__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
vceq_s32 (int32x2_t __a, int32x2_t __b)
{
- return (uint32x2_t) __builtin_aarch64_cmeqv2si (__a, __b);
+ return (uint32x2_t) (__a == __b);
}
__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
@@ -14675,22 +14674,19 @@ vceq_s64 (int64x1_t __a, int64x1_t __b)
__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
vceq_u8 (uint8x8_t __a, uint8x8_t __b)
{
- return (uint8x8_t) __builtin_aarch64_cmeqv8qi ((int8x8_t) __a,
- (int8x8_t) __b);
+ return
[PATCH][match-and-simplify] Use a switch (code) for the GIMPLE code gen
on the outermost level.
Committed.
Richard.
2014-08-19 Richard Biener rguent...@suse.de
* genmatch.c (decision_tree::gen_gimple): Use a switch statement
for the outermost level.
* gimple-match.h (code_helper::get_rep): New method.
Index: gcc/genmatch.c
===
--- gcc/genmatch.c (revision 214147)
+++ gcc/genmatch.c (working copy)
@@ -1869,7 +1869,8 @@ decision_tree::gen_gimple (FILE *f)
fprintf (f, )\n);
fprintf (f, {\n);
- bool first = true;
+ fprintf (f, switch (code.get_rep())\n
+ {\n);
for (unsigned i = 0; i root-kids.length (); i++)
{
dt_operand *dop = static_castdt_operand *(root-kids[i]);
@@ -1877,15 +1878,20 @@ decision_tree::gen_gimple (FILE *f)
if (e-ops.length () != n)
continue;
- if (!first)
- fprintf (f, else );
- fprintf (f, if (code == %s)\n, e-operation-op-id);
+ if (*e-operation-op == CONVERT_EXPR
+ || *e-operation-op == NOP_EXPR)
+ fprintf (f, CASE_CONVERT:\n);
+ else
+ fprintf (f, case %s%s:\n,
+is_a fn_id * (e-operation-op) ? - : ,
+e-operation-op-id);
fprintf (f, {\n);
dop-gen_gimple_kids (f);
+ fprintf (f, break;\n);
fprintf (f, }\n);
-
- first = false;
}
+ fprintf (f, default:;\n
+ }\n);
fprintf (f, return false;\n);
fprintf (f, }\n);
Index: gcc/gimple-match.h
===
--- gcc/gimple-match.h (revision 214097)
+++ gcc/gimple-match.h (working copy)
@@ -35,6 +35,7 @@ public:
operator built_in_function () const { return (built_in_function) -rep; }
bool is_tree_code () const { return rep 0; }
bool is_fn_code () const { return rep 0; }
+ int get_rep () const { return rep; }
private:
int rep;
};
Fwd: [PATCH] Add patch for debugging compiler ICEs.
Ping.
-Maxim
Original Message
Subject:[PATCH] Add patch for debugging compiler ICEs.
Date: Mon, 04 Aug 2014 21:03:22 +0400
From: Maxim Ostapenko m.ostape...@partner.samsung.com
To: GCC Patches gcc-patches@gcc.gnu.org
CC: Jeff Law l...@redhat.com, Jakub Jelinek ja...@redhat.com,
tsaund...@mozilla.com, Yury Gribov y.gri...@samsung.com, Slava
Garbuzov v.garbu...@samsung.com
Hi,
A years ago there was a discussion
(https://gcc.gnu.org/ml/gcc-patches/2004-01/msg02437.html) about
debugging compiler ICEs that resulted in a patch from Jakub, which dumps
useful information into temporary file, but for some reasons this patch
wasn't applied to trunk.
This is the resurrected patch with added GCC version information into
generated repro file.
I've updated the patch that I've posted earlier
(https://gcc.gnu.org/ml/gcc-patches/2014-07/msg01649.html ) according to
recent upstream discussion
(https://gcc.gnu.org/ml/gcc-patches/2014-08/msg00020.html).
The debugging functionality is disabled by default and can be enabled
with adding -freport-bug into compile options. It can be also enabled by
default with
--with-spec during GCC build.
There are several directions in which this can be improved e.g:
1) more user-friendly ways to report bugs (autosubmitting to Bugzilla, etc.)
2) generate repro in case of segfault.
but having basic functionality (autogenerating reprocase in temprorary
file) already seems quite useful.
-Maxim
2014-08-04 Jakub Jelinek ja...@redhat.com
Max Ostapenko m.ostape...@partner.samsung.com
* common.opt: New option.
* doc/invoke.texi: Describe new option.
* diagnostic.c (diagnostic_action_after_output): Exit with
ICE_EXIT_CODE instead of FATAL_EXIT_CODE.
* gcc.c (execute): Don't free first string early, but at the end
of the function. Call retry_ice if compiler exited with
ICE_EXIT_CODE.
(main): Factor out common code.
(print_configuration): New function.
(try_fork): Likewise.
(redirect_stdout_stderr): Likewise.
(files_equal_p): Likewise.
(check_repro): Likewise.
(run_attempt): Likewise.
(do_report_bug): Likewise.
(append_text): Likewise.
(try_generate_repro): Likewise
diff --git a/gcc/common.opt b/gcc/common.opt
index 0c4f86b..aa79250 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -1120,6 +1120,11 @@ fdump-noaddr
Common Report Var(flag_dump_noaddr)
Suppress output of addresses in debugging dumps
+freport-bug
+Common Driver Var(flag_report_bug)
+Collect and dump debug information into temporary file if ICE in C/C++
+compiler occured.
+
fdump-passes
Common Var(flag_dump_passes) Init(0)
Dump optimization passes
diff --git a/gcc/diagnostic.c b/gcc/diagnostic.c
index 0cc7593..67b8c5b 100644
--- a/gcc/diagnostic.c
+++ b/gcc/diagnostic.c
@@ -492,7 +492,7 @@ diagnostic_action_after_output (diagnostic_context *context,
real_abort ();
diagnostic_finish (context);
fnotice (stderr, compilation terminated.\n);
- exit (FATAL_EXIT_CODE);
+ exit (ICE_EXIT_CODE);
default:
gcc_unreachable ();
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 4f327df..dafb573 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -6271,6 +6271,11 @@ feasible to use diff on debugging dumps for compiler invocations with
different compiler binaries and/or different
text / bss / data / heap / stack / dso start locations.
+@item -freport-bug
+@opindex freport-bug
+Collect and dump debug information into temporary file if ICE in C/C++
+compiler occured.
+
@item -fdump-unnumbered
@opindex fdump-unnumbered
When doing debugging dumps, suppress instruction numbers and address output.
diff --git a/gcc/gcc.c b/gcc/gcc.c
index 44d0416..f7a56d1 100644
--- a/gcc/gcc.c
+++ b/gcc/gcc.c
@@ -43,6 +43,13 @@ compilation is specified by a string called a spec. */
#include params.h
#include vec.h
#include filenames.h
+#ifdef HAVE_UNISTD_H
+#include unistd.h
+#endif
+
+#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS))
+#define RETRY_ICE_SUPPORTED
+#endif
/* By default there is no special suffix for target executables. */
/* FIXME: when autoconf is fixed, remove the host check - dj */
@@ -253,6 +260,9 @@ static void init_gcc_specs (struct obstack *, const char *, const char *,
static const char *convert_filename (const char *, int, int);
#endif
+#ifdef RETRY_ICE_SUPPORTED
+static void try_generate_repro (const char *prog, const char **argv);
+#endif
static const char *getenv_spec_function (int, const char **);
static const char *if_exists_spec_function (int, const char **);
static const char *if_exists_else_spec_function (int, const char **);
@@ -2849,7 +2859,7 @@ execute (void)
}
}
- if (string != commands[i].prog)
+ if (i string != commands[i].prog)
free (CONST_CAST (char *, string));
}
@@ -2902,6 +2912,17 @@ execute (void)
else if (WIFEXITED (status)
WEXITSTATUS (status) = MIN_FATAL_STATUS)
{
+#ifdef RETRY_ICE_SUPPORTED
+ /* For ICEs
Re: [PATCH] Fix comment typo in ira.c
On 08/18/2014 10:51 AM, Kito Cheng wrote: Hi Vladimir: Here is a tiny typo in comment, allono - allocno. ChangLog 2014-08-18 Kito Cheng k...@0xlab.org * ira.c: Fix typo in comment. Thanks, Kito. Of course, the patch is ok. You can commit it if it is not committed yet.
Re: [C/C++ PATCH] Implement -Wbool-compare (PR c++/62153)
On Tue, Aug 19, 2014 at 11:08:39AM +0200, Manuel López-Ibáñez wrote:
Not sure about that: it matters whether the CST is a LHS or a RHS
- because we want to say if the comparison is always true or false.
I tried to introduce some bool flag, but that didn't really help
readability IMHO. (The tree_int_cst_sgn is compared to 1 and -1, or
to -1 and 1.)
Oh, yes. I missed that. Sorry. What about?
tree op = (TREE_CODE (op0) == INTEGER_CST) ? op0
: (TREE_CODE (op1) == INTEGER_CST) ? op1 : NULL_TREE;
if (op == NULL_TREE)
return;
if (!integer_zerop (op) !integer_onep(op))
{
int sign = (TREE_CODE (op0) == INTEGER_CST)
? tree_int_cst_sgn (op) : -tree_int_cst_sgn (op);
if (code == EQ_EXPR
|| ((code == GT_EXPR || code == GE_EXPR)
sign 0)
|| ((code == LT_EXPR || code == LE_EXPR)
sign 0))
or some variation of the above could work, no?
Ok, I don't feel strongly about it, so I tweaked the code according to
the above. I'll post it later today. Thanks,
Marek
[PATCH] Quash Wbool-compare warning in optabs.c
On some archs, C[TL]Z_DEFINED_VALUE_AT_ZERO macros return only
true/false, so -Wbool-compare would warn. But on e.g. mips or
aarch64 they might yield 2. This patch casts the value to int
to quash that warning. Dropping the == 2 would be prettier,
but I don't want to break other archs.
The point is that -Wbool-compare should be enabled by -Wall,
and this is the last thing that prevents it.
Bootstrapped/regtested on x86_64-linux, ok for trunk?
2014-08-19 Marek Polacek pola...@redhat.com
* optabs.c (expand_ffs): Cast C[TL]Z_DEFINED_VALUE_AT_ZERO macros
to int.
diff --git gcc/optabs.c gcc/optabs.c
index 60228d3..26b5603 100644
--- gcc/optabs.c
+++ gcc/optabs.c
@@ -2827,7 +2827,7 @@ expand_ffs (enum machine_mode mode, rtx op0, rtx target)
if (!temp)
goto fail;
- defined_at_zero = (CTZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2);
+ defined_at_zero = ((int) CTZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2);
}
else if (optab_handler (clz_optab, mode) != CODE_FOR_nothing)
{
@@ -2836,7 +2836,7 @@ expand_ffs (enum machine_mode mode, rtx op0, rtx target)
if (!temp)
goto fail;
- if (CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2)
+ if ((int) CLZ_DEFINED_VALUE_AT_ZERO (mode, val) == 2)
{
defined_at_zero = true;
val = (GET_MODE_PRECISION (mode) - 1) - val;
Marek
Re: DSE calls to builtins (memset, etc)
On Tue, 19 Aug 2014, Richard Biener wrote:
/* Return true whether REF may refer to global memory. */
bool
-ref_may_alias_global_p (tree ref)
+ref_may_alias_global_p (ao_ref *ref)
{
- tree base = get_base_address (ref);
+ tree base = ao_ref_base (ref);
if (DECL_P (base))
return is_global_var (base);
else if (TREE_CODE (base) == MEM_REF
|| TREE_CODE (base) == TARGET_MEM_REF)
return ptr_deref_may_alias_global_p (TREE_OPERAND (base, 0));
return true;
}
+bool
+ref_may_alias_global_p (tree ref)
+{
+ ao_ref r;
+ ao_ref_init (r, ref);
+ return ref_may_alias_global_p (r);
+}
+
I'd do two wrapers then since get_base_address is way cheaper
than doing ao_ref_base. Thus, split out the code doing the
actual job into a static ref_may_alias_global_1?
Ok, for this function the extra precision in ao_ref_base is indeed
useless.
+ /* We know we have virtual definitions. We can handle assignments and
+ some builtin calls. */
+ if (is_gimple_call (stmt))
if (gimple_call_builtin_p (stmt, BUILT_IN_NORMAL))
which also does argument verification
Good point, then I can remove the test 'nargs 2' below.
+{
+ tree callee = gimple_call_fndecl (stmt);
+ if (!callee || DECL_BUILT_IN_CLASS (callee) != BUILT_IN_NORMAL)
+ return;
+ switch (DECL_FUNCTION_CODE (callee))
+ {
+ case BUILT_IN_MEMCPY:
+ case BUILT_IN_MEMMOVE:
+ case BUILT_IN_MEMSET:
+ {
+ gimple use_stmt;
+ ao_ref ref;
+ tree size = NULL_TREE;
+ int nargs = gimple_call_num_args (stmt);
+ if (nargs 2)
+ return;
+ if (nargs == 3)
+ size = gimple_call_arg (stmt, 2);
+ tree ptr = gimple_call_arg (stmt, 0);
+ ao_ref_init_from_ptr_and_size (ref, ptr, size);
+ if (!dse_possible_dead_store_p (ref, stmt, use_stmt))
+ return;
+
+ if (dump_file (dump_flags TDF_DETAILS))
+ {
+ fprintf (dump_file, Deleted dead store ');
dead call
+ print_gimple_stmt (dump_file, gsi_stmt (*gsi), dump_flags,
0);
+ fprintf (dump_file, '\n);
+ }
+
+ tree lhs = gimple_call_lhs (stmt);
+ if (lhs)
+ {
+ gimple new_stmt = gimple_build_assign (lhs, ptr);
+ unlink_stmt_vdef (stmt);
+ gsi_replace (gsi, new_stmt, true);
You may need eh cleanup here as well.
Cleanup is one of the most mysterious parts of gcc, I am never sure what
to release/update/unlink/purge/etc :-(
Bonus points if you make gsi_replace return whether
maybe_clean_or_replace_eh_stmt returned true.
Ok, that seems trivial.
- basic_block bb;
-
- /* If use_stmt is or might be a nop assignment, e.g. for
- struct { ... } S a, b, *p; ...
- b = a; b = b;
-or
- b = a; b = *p; where p might be b,
-or
- *p = a; *p = b; where p might be b,
-or
- *p = *u; *p = *v; where p might be v, then USE_STMT
- acts as a use as well as definition, so store in STMT
- is not dead. */
- if (stmt != use_stmt
- ref_maybe_used_by_stmt_p (use_stmt, gimple_assign_lhs (stmt)))
- return;
-
I don't see how you can remove this code?
dse_possible_dead_store_p already tests ref_maybe_used_by_stmt_p and
thus cannot return true with such a use_stmt, as far as I can see. As I
said, bootstrap+testsuite with an assert instead of 'return' didn't turn
up anything. I could keep it as a gcc_checking_assert (with a slight
update to the comment) if you like. Or did I miss a path in
dse_possible_dead_store_p?
Thanks,
--
Marc Glisse
Re: [PATCH] C frontend: cast-expressions sometimes retain type qualifiers
On Mon, Aug 18, 2014 at 2:07 PM, Joseph S. Myers jos...@codesourcery.com wrote: On Sat, 16 Aug 2014, Patrick Palka wrote: 2014-08-17 Patrick Palka ppa...@gcc.gnu.org * c-typeck.c (build_c_cast): Do a conversion even when the TYPE_MAIN_VARIANTs are the same. 2014-08-17 Patrick Palka ppa...@gcc.gnu.org * gcc.dg/pr13519-1.c: Adjust. OK, although there's the question of whether typeof and __auto_type should remove all qualifiers even from lvalue arguments (at present they do this only if the argument is _Atomic-qualified). (The _Generic implementation takes care to remove all qualifiers, although DR#423 has yet to be resolved. But the intended committee direction appears to be along the lines you implement - the cast always yields a value of unqualified type. We may need to wait for a resolution of the DR to see exactly what's needed regarding functions returning qualified types.) This issue is much hairier than I thought. But since the patch is in line with the direction of the committee, and since the patch fixes an inconsistency with the current implementation, I suppose that's enough reason to go through with it. Committed as r214151. Hope I didn't inadvertently break anything... GCC doesn't increase the size of a type when an _Atomic qualifier is added, so the presence or absence of qualifiers on the type of an rvalue doesn't affect sizeof (although it can affect the GNU extension of applying alignof to an expression, I suppose). -- Joseph S. Myers jos...@codesourcery.com
Re: [PATCH] Remove CALLER_SAVE_PROFITABLE since nobody use it now
Hi Richard:
Hmm, I'm not sure about this. It might not be used at present, but on:
AArch64, with more call-clobbered registers than call-saved registers, I
would expect this ought to be a win. The fact that it isn't on today
may say more about the way it works than the concept that it's the wrong
thing to do in principle.
In my view, calculate cost/profit should be done by register allocator instead
of a target hook/marco is more reasonable since register allocator can
have more globe view to it, and IRA do it now.
And as Joseph say, no code calling it, so I think it's time to remove it.
thanks for your comment :)
Hi Joseph:
Nothing uses it - not just no targets defining it, but no code calling it.
If you have a use in future for a target hook doing something suggested by
the name of this macro, by all means add one - but there's no point at all
in keeping the macro until then. (It should of course be poisoned in
system.h when removing it, as standard when removing target macros.)
Thanks, I add poison for CALLER_SAVE_PROFITABLE to system.h,
updated patch attached.
thanks for your review :)
ChangLog
2014-08-19 Kito Cheng k...@0xlab.org
* system.h (CALLER_SAVE_PROFITABLE): Poison.
* doc/tm.texi.in (CALLER_SAVE_PROFITABLE): Remove.
* gcc/doc/tm.texi: Regenerate.
* gcc/regs.h (CALLER_SAVE_PROFITABLE): Remove.
On Tue, Aug 19, 2014 at 4:26 AM, Joseph S. Myers
jos...@codesourcery.com wrote:
On Mon, 18 Aug 2014, Richard Earnshaw wrote:
Hmm, I'm not sure about this. It might not be used at present, but on
AArch64, with more call-clobbered registers than call-saved registers, I
would expect this ought to be a win. The fact that it isn't on today
may say more about the way it works than the concept that it's the wrong
thing to do in principle.
Nothing uses it - not just no targets defining it, but no code calling it.
If you have a use in future for a target hook doing something suggested by
the name of this macro, by all means add one - but there's no point at all
in keeping the macro until then. (It should of course be poisoned in
system.h when removing it, as standard when removing target macros.)
--
Joseph S. Myers
jos...@codesourcery.com
From 6a99f77eb6785c8d471329bda4bc67885f35909a Mon Sep 17 00:00:00 2001
From: Kito Cheng k...@0xlab.org
Date: Tue, 19 Aug 2014 22:10:47 +0800
Subject: [PATCH] Remove CALLER_SAVE_PROFITABLE since nobody use it now.
---
gcc/doc/tm.texi| 10 --
gcc/doc/tm.texi.in | 10 --
gcc/regs.h | 8
gcc/system.h | 3 ++-
4 files changed, 2 insertions(+), 29 deletions(-)
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index 9dd8d68..4d6492b 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -4528,16 +4528,6 @@ If you enable it, GCC can save registers around function calls. This
makes it possible to use call-clobbered registers to hold variables that
must live across calls.
-@defmac CALLER_SAVE_PROFITABLE (@var{refs}, @var{calls})
-A C expression to determine whether it is worthwhile to consider placing
-a pseudo-register in a call-clobbered hard register and saving and
-restoring it around each function call. The expression should be 1 when
-this is worth doing, and 0 otherwise.
-
-If you don't define this macro, a default is used which is good on most
-machines: @code{4 * @var{calls} @var{refs}}.
-@end defmac
-
@defmac HARD_REGNO_CALLER_SAVE_MODE (@var{regno}, @var{nregs})
A C expression specifying which mode is required for saving @var{nregs}
of a pseudo-register in call-clobbered hard register @var{regno}. If
diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index dd72b98..7a63353 100644
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -3683,16 +3683,6 @@ If you enable it, GCC can save registers around function calls. This
makes it possible to use call-clobbered registers to hold variables that
must live across calls.
-@defmac CALLER_SAVE_PROFITABLE (@var{refs}, @var{calls})
-A C expression to determine whether it is worthwhile to consider placing
-a pseudo-register in a call-clobbered hard register and saving and
-restoring it around each function call. The expression should be 1 when
-this is worth doing, and 0 otherwise.
-
-If you don't define this macro, a default is used which is good on most
-machines: @code{4 * @var{calls} @var{refs}}.
-@end defmac
-
@defmac HARD_REGNO_CALLER_SAVE_MODE (@var{regno}, @var{nregs})
A C expression specifying which mode is required for saving @var{nregs}
of a pseudo-register in call-clobbered hard register @var{regno}. If
diff --git a/gcc/regs.h b/gcc/regs.h
index be81db4..36e803d 100644
--- a/gcc/regs.h
+++ b/gcc/regs.h
@@ -214,14 +214,6 @@ extern short *reg_renumber;
extern int caller_save_needed;
-/* Predicate to decide whether to give a hard reg to a pseudo which
- is referenced REFS times and would need to be saved and restored
- around a call CALLS times. */
-
-#ifndef CALLER_SAVE_PROFITABLE
Re: [PATCH] fix FTBFS with --target=i686-pc-cygwin
Applied for you at rev. 214153. Kai 2014-08-12 20:37 GMT+02:00 Kai Tietz ktiet...@googlemail.com: 2014-08-12 20:34 GMT+02:00 Yaakov Selkowitz yselk...@redhat.com: There is a syntax error in r213009 causing a FTBFS in trunk with --target=i686-pc-cygwin. Patch attached, with which trunk now builds for said target. -- Yaakov Selkowitz Associate Software Engineer, ARM Red Hat, Inc. Patch is ok. Please apply. Thanks, Kai
Re: [PATCH] Quash Wbool-compare warning in optabs.c
On 08/19/2014 07:12 AM, Marek Polacek wrote: On some archs, C[TL]Z_DEFINED_VALUE_AT_ZERO macros return only true/false, so -Wbool-compare would warn. Then we should fix them to return 0/1 instead. r~
[PATCH][match-and-simplify] Avoid excessive bracesin code-gen
Committed.
Richard.
2014-08-19 Richard Biener rguent...@suse.de
* genmatch.c (dt_operand::gen_gimple): Remove excessive
braces.
(dt_operand::gen_generic): Likewise.
Index: gcc/genmatch.c
===
--- gcc/genmatch.c (revision 214150)
+++ gcc/genmatch.c (working copy)
@@ -1543,8 +1543,6 @@ dt_operand::gen_gimple (FILE *f)
char opname[20];
get_name (opname);
- fprintf (f, {\n);
-
unsigned n_braces = 0;
if (type == DT_OPERAND)
@@ -1577,8 +1575,6 @@ dt_operand::gen_gimple (FILE *f)
for (unsigned i = 0; i n_braces; ++i)
fprintf (f, }\n);
-
- fprintf (f, }\n);
}
@@ -1588,8 +1584,6 @@ dt_operand::gen_generic (FILE *f)
char opname[20];
get_name (opname);
- fprintf (f, {\n);
-
unsigned n_braces = 0;
if (type == DT_OPERAND)
@@ -1619,8 +1613,6 @@ dt_operand::gen_generic (FILE *f)
for (i = 0; i n_braces; ++i)
fprintf (f, }\n);
-
- fprintf (f, }\n);
}
void
Re: [Patch] Enable libatomic for cygwin targets
Applied for you at revision 214154. Kai
Re: [PATCH 011/236] Replace PREV_INSN et al macros with functions
On Tue, 2014-08-12 at 15:20 -0600, Jeff Law wrote:
On 08/06/14 11:19, David Malcolm wrote:
Yet more scaffolding: convert the NEXT_INSN/PREV_INSN macros
and their SET_* variants into functions.
Convert the rvalue-style functions into returning
rtx_insn * rather than plain rtx.
For now, this is done by adding a checked cast, but I hope this can
eventually become a field lookup. The lvalue forms for now return an rtx
to allow in-place modification.
gcc/
* rtl.h (PREV_INSN): Convert to an inline function. Strengthen
the return type from rtx to rtx_insn *, which will enable various
conversions in followup patches. For now this is is done by a
checked cast.
(NEXT_INSN): Likewise.
(SET_PREV_INSN): Convert to an inilne function. This is intended
for use as an lvalue, and so returns an rtx to allow in-place
modification.
(SET_NEXT_INSN): Likewise.
OK.
Thanks
Fixed up the as_a_nullable to safe_as_a, and committed to trunk as
r214152, having verified bootstrapregrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone.
Am attaching what I committed.
Should I add a blanket skip for rtl.h to gdbinit.in, or special-case the
individual inline functions
FWIW, I do think that after this series is done that we should look very
closely at moving those fields out of the rtunion array and just have
them first class fields in their classes.
I can see a day where I say foo-uid or foo-next/prev and be
exceedingly happy. And if we keep rtx_real_insn as a concept, then
foo.pattern ;-)
(nods)
[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html
Index: gcc/ChangeLog
===
--- gcc/ChangeLog (revision 214151)
+++ gcc/ChangeLog (revision 214152)
@@ -1,3 +1,15 @@
+2014-08-19 David Malcolm dmalc...@redhat.com
+
+ * rtl.h (PREV_INSN): Convert to an inline function. Strengthen
+ the return type from rtx to rtx_insn *, which will enable various
+ conversions in followup patches. For now this is is done by a
+ checked cast.
+ (NEXT_INSN): Likewise.
+ (SET_PREV_INSN): Convert to an inline function. This is intended
+ for use as an lvalue, and so returns an rtx to allow in-place
+ modification.
+ (SET_NEXT_INSN): Likewise.
+
2014-07-08 Mark Wielaard m...@redhat.com
PR debug/59051
Index: gcc/rtl.h
===
--- gcc/rtl.h (revision 214151)
+++ gcc/rtl.h (revision 214152)
@@ -972,16 +972,34 @@
(RTL_INSN_CHAIN_FLAG_CHECK (INSN_UID, (INSN))-u2.insn_uid)
/* Chain insns together in sequence. */
+
/* For now these are split in two: an rvalue form:
PREV_INSN/NEXT_INSN
and an lvalue form:
SET_NEXT_INSN/SET_PREV_INSN. */
-#define PREV_INSN(INSN) XEXP ((const_rtx)(INSN), 0)
-#define SET_PREV_INSN(INSN) XEXP (INSN, 0)
-#define NEXT_INSN(INSN) XEXP ((const_rtx)(INSN), 1)
-#define SET_NEXT_INSN(INSN) XEXP (INSN, 1)
+inline rtx_insn *PREV_INSN (const_rtx insn)
+{
+ rtx prev = XEXP (insn, 0);
+ return safe_as_a rtx_insn * (prev);
+}
+inline rtx SET_PREV_INSN (rtx insn)
+{
+ return XEXP (insn, 0);
+}
+
+inline rtx_insn *NEXT_INSN (const_rtx insn)
+{
+ rtx next = XEXP (insn, 1);
+ return safe_as_a rtx_insn * (next);
+}
+
+inline rtx SET_NEXT_INSN (rtx insn)
+{
+ return XEXP (insn, 1);
+}
+
#define BLOCK_FOR_INSN(INSN) XBBDEF (INSN, 2)
/* The body of an insn. */
Re: [PATCH] Fix cygwin-stdint.h
Applied for you at revision 214156. Kai
[PATCH][0/7][ARM] Convert VFP mnemonics to UAL
Hi all, This patch series converts the arm backend to output unified assembly syntax for the VFP instructions. This makes it more readable since most UAL mnemonics also include various type suffixes such as .f32 and .f64 that quickly allow to identify the data types being operated on. Each patch is independent of the rest and can be applied in any order. Bootstrapped and tested on arm-none-linux-gnueabihf with gas from binutils 2.22 and newer. Compiled various floating point benchmarks to make sure the binaries are identical. Ok for trunk? Thanks, Kyrill gcc/config/arm/arm-protos.h |2 +- gcc/config/arm/arm.c | 12 - gcc/config/arm/arm.md|2 +- gcc/config/arm/vfp.md| 91 ++ gcc/testsuite/gcc.target/arm/vfp-1.c | 68 - 5 files changed, 93 insertions(+), 82 deletions(-)
Re: [PATCH] cygwin: fix --tsaware, add --large-address-aware
Applied for you at revision 214158. Kai
[PATCH][ARM][3/7] Convert FP mnemonics to UAL | mul+add patterns
Hi all, This patch switches over the FP mul+add, mul+neg+add etc patterns. Mixing some of the mnemonics up is a danger but the ARM ARM has a handy section that maps each mnemonic to its UAL equivalent. Ok for trunk? Thanks, Kyrill 2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com * config/arm/vfp.md (*mulsf3_vfp): Use UAL assembly syntax. (*muldf3_vfp): Likewise. (*mulsf3negsf_vfp): Likewise. (*muldf3negdf_vfp): Likewise. (*mulsf3addsf_vfp): Likewise. (*muldf3adddf_vfp): Likewise. (*mulsf3subsf_vfp): Likewise. (*muldf3subdf_vfp): Likewise. (*mulsf3negsfaddsf_vfp): Likewise. (*fmuldf3negdfadddf_vfp): Likewise. (*mulsf3negsfsubsf_vfp): Likewise. (*muldf3negdfsubdf_vfp): Likewise. 2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com * gcc.target/arm/vfp-1.c: Updated expected assembly.commit f15edff842bafd42b4484067b45121d3d8667057 Author: Kyrylo Tkachov kyrylo.tkac...@arm.com Date: Thu Jul 17 09:50:59 2014 +0100 [ARM][3/n] Convert FP mnemonics to UAL | mul+add patterns diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index 975f5ae..f740e26 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -749,7 +749,7 @@ (mult:SF (match_operand:SF 1 s_register_operand t) (match_operand:SF 2 s_register_operand t)))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP - fmuls%?\\t%0, %1, %2 + vmul%?.f32\\t%0, %1, %2 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmuls)] @@ -760,7 +760,7 @@ (mult:DF (match_operand:DF 1 s_register_operand w) (match_operand:DF 2 s_register_operand w)))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE - fmuld%?\\t%P0, %P1, %P2 + vmul%?.f64\\t%P0, %P1, %P2 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmuld)] @@ -771,7 +771,7 @@ (mult:SF (neg:SF (match_operand:SF 1 s_register_operand t)) (match_operand:SF 2 s_register_operand t)))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP - fnmuls%?\\t%0, %1, %2 + vnmul%?.f32\\t%0, %1, %2 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmuls)] @@ -782,7 +782,7 @@ (mult:DF (neg:DF (match_operand:DF 1 s_register_operand w)) (match_operand:DF 2 s_register_operand w)))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE - fnmuld%?\\t%P0, %P1, %P2 + vnmul%?.f64\\t%P0, %P1, %P2 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmuld)] @@ -798,7 +798,7 @@ (match_operand:SF 3 s_register_operand t)) (match_operand:SF 1 s_register_operand 0)))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP - fmacs%?\\t%0, %2, %3 + vmla%?.f32\\t%0, %2, %3 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmacs)] @@ -810,7 +810,7 @@ (match_operand:DF 3 s_register_operand w)) (match_operand:DF 1 s_register_operand 0)))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE - fmacd%?\\t%P0, %P2, %P3 + vmla%?.f64\\t%P0, %P2, %P3 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmacd)] @@ -823,7 +823,7 @@ (match_operand:SF 3 s_register_operand t)) (match_operand:SF 1 s_register_operand 0)))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP - fmscs%?\\t%0, %2, %3 + vnmls%?.f32\\t%0, %2, %3 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmacs)] @@ -835,7 +835,7 @@ (match_operand:DF 3 s_register_operand w)) (match_operand:DF 1 s_register_operand 0)))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE - fmscd%?\\t%P0, %P2, %P3 + vnmls%?.f64\\t%P0, %P2, %P3 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmacd)] @@ -848,7 +848,7 @@ (mult:SF (match_operand:SF 2 s_register_operand t) (match_operand:SF 3 s_register_operand t] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP - fnmacs%?\\t%0, %2, %3 + vmls%?.f32\\t%0, %2, %3 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmacs)] @@ -860,7 +860,7 @@ (mult:DF (match_operand:DF 2 s_register_operand w) (match_operand:DF 3 s_register_operand w] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE - fnmacd%?\\t%P0, %P2, %P3 + vmls%?.f64\\t%P0, %P2, %P3 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmacd)] @@ -875,7 +875,7 @@ (match_operand:SF 3 s_register_operand t)) (match_operand:SF 1 s_register_operand 0)))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP - fnmscs%?\\t%0, %2, %3 + vnmla%?.f32\\t%0, %2, %3 [(set_attr predicable yes) (set_attr predicable_short_it no) (set_attr type fmacs)] @@ -888,7 +888,7 @@ (match_operand:DF 3 s_register_operand w)) (match_operand:DF 1 s_register_operand 0)))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE - fnmscd%?\\t%P0,
[PATCH][ARM][4/7] Convert FP mnemonics to UAL | vcvt patterns
Hi all,
These are the fp-fp and int-fp convert patterns. IMHO these are much
more readable than the pre-UAL ones because they use two suffixes to
indicate which data types are being converted to and from.
Ok for trunk?
Thanks,
Kyrill
2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com
* config/arm/vfp.md (*extendsfdf2_vfp): Use UAL assembly syntax.
(*truncdfsf2_vfp): Likewise.
(*truncsisf2_vfp): Likewise.
(*truncsidf2_vfp): Likewise.
(fixuns_truncsfsi2): Likewise.
(fixuns_truncdfsi2): Likewise.
(*floatsisf2_vfp): Likewise.
(*floatsidf2_vfp): Likewise.
(floatunssisf2): Likewise.
(floatunssidf2): Likewise.
2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com
* gcc.target/arm/vfp-1.c: Updated expected assembly.commit ab03987e668c014c3649c0dd142cdc6072715965
Author: Kyrylo Tkachov kyrylo.tkac...@arm.com
Date: Thu Jul 17 09:57:19 2014 +0100
[ARM][4/n] Convert FP mnemonics to UAL | vcvt patterns.
diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index f740e26..afb009e 100644
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -953,7 +953,7 @@
[(set (match_operand:DF 0 s_register_operand =w)
(float_extend:DF (match_operand:SF 1 s_register_operand t)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- fcvtds%?\\t%P0, %1
+ vcvt%?.f64.f32\\t%P0, %1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type f_cvt)]
@@ -963,7 +963,7 @@
[(set (match_operand:SF 0 s_register_operand =t)
(float_truncate:SF (match_operand:DF 1 s_register_operand w)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- fcvtsd%?\\t%0, %P1
+ vcvt%?.f32.f64\\t%0, %P1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type f_cvt)]
@@ -993,7 +993,7 @@
[(set (match_operand:SI 0 s_register_operand =t)
(fix:SI (fix:SF (match_operand:SF 1 s_register_operand t]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
- ftosizs%?\\t%0, %1
+ vcvt%?.s32.f32\\t%0, %1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type f_cvtf2i)]
@@ -1003,7 +1003,7 @@
[(set (match_operand:SI 0 s_register_operand =t)
(fix:SI (fix:DF (match_operand:DF 1 s_register_operand w]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- ftosizd%?\\t%0, %P1
+ vcvt%?.s32.f64\\t%0, %P1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type f_cvtf2i)]
@@ -1014,7 +1014,7 @@
[(set (match_operand:SI 0 s_register_operand =t)
(unsigned_fix:SI (fix:SF (match_operand:SF 1 s_register_operand t]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
- ftouizs%?\\t%0, %1
+ vcvt%?.u32.f32\\t%0, %1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type f_cvtf2i)]
@@ -1024,7 +1024,7 @@
[(set (match_operand:SI 0 s_register_operand =t)
(unsigned_fix:SI (fix:DF (match_operand:DF 1 s_register_operand t]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- ftouizd%?\\t%0, %P1
+ vcvt%?.u32.f64\\t%0, %P1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type f_cvtf2i)]
@@ -1035,7 +1035,7 @@
[(set (match_operand:SF 0 s_register_operand =t)
(float:SF (match_operand:SI 1 s_register_operand t)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
- fsitos%?\\t%0, %1
+ vcvt%?.f32.s32\\t%0, %1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type f_cvti2f)]
@@ -1045,7 +1045,7 @@
[(set (match_operand:DF 0 s_register_operand =w)
(float:DF (match_operand:SI 1 s_register_operand t)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- fsitod%?\\t%P0, %1
+ vcvt%?.f64.s32\\t%P0, %1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type f_cvti2f)]
@@ -1056,7 +1056,7 @@
[(set (match_operand:SF 0 s_register_operand =t)
(unsigned_float:SF (match_operand:SI 1 s_register_operand t)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
- fuitos%?\\t%0, %1
+ vcvt%?.f32.u32\\t%0, %1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type f_cvti2f)]
@@ -1066,7 +1066,7 @@
[(set (match_operand:DF 0 s_register_operand =w)
(unsigned_float:DF (match_operand:SI 1 s_register_operand t)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- fuitod%?\\t%P0, %1
+ vcvt%?.f64.u32\\t%P0, %1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type f_cvti2f)]
diff --git a/gcc/testsuite/gcc.target/arm/vfp-1.c b/gcc/testsuite/gcc.target/arm/vfp-1.c
index 43495ae..1a970a7 100644
--- a/gcc/testsuite/gcc.target/arm/vfp-1.c
+++ b/gcc/testsuite/gcc.target/arm/vfp-1.c
@@ -94,34 +94,34 @@ volatile unsigned int u1;
void test_convert () {
/* extendsfdf2_vfp */
- /* { dg-final { scan-assembler fcvtds } } */
+ /* { dg-final { scan-assembler vcvt.f64.f32 } } */
d1 = f1;
/* truncdfsf2_vfp */
- /* { dg-final { scan-assembler fcvtsd } } */
[PATCH][ARM][5/7] Convert FP mnemonics to UAL | sqrt and FP compare patterns
Hi all,
The sqrt and floating point compare patterns.
For the case when we compare with floating-point 0 the ARM ARM uses the
syntax 'vcmp {s,d}n, #0.0'
but current gas has a bug and doesn't accept that form, only 'vcmp
{s,d}n, #0'
There is a gas patch in review on the binutils mailing list but in the
meantime we output #0
Testing binutils didn't complain.
Ok for trunk?
Thanks,
Kyrill
2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com
* config/arm/vfp.md (*sqrtsf2_vfp): Use UAL assembly syntax.
(*sqrtdf2_vfp): Likewise.
(*cmpsf_vfp): Likewise.
(*cmpsf_trap_vfp): Likewise.
(*cmpdf_vfp): Likewise.
(*cmpdf_trap_vfp): Likewise.
2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com
* gcc.target/arm/vfp-1.c: Updated expected assembly.commit ce05645f530212265b5792b8881f4fd4ef60c7bc
Author: Kyrylo Tkachov kyrylo.tkac...@arm.com
Date: Thu Jul 17 10:05:17 2014 +0100
[ARM][5/n] Convert FP mnemonics to UAL | sqrt and FP compare patterns
diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index d872a6e..1dc1cc2 100644
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -1082,7 +1082,7 @@ (define_insn *sqrtsf2_vfp
[(set (match_operand:SF 0 s_register_operand =t,t)
(sqrt:SF (match_operand:SF 1 s_register_operand t,t)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
- fsqrts%?\\t%0, %1
+ vsqrt%?.f32\\t%0, %1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr arch *,armv6_or_vfpv3)
@@ -1093,7 +1093,7 @@ (define_insn *sqrtdf2_vfp
[(set (match_operand:DF 0 s_register_operand =w,w)
(sqrt:DF (match_operand:DF 1 s_register_operand w,w)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- fsqrtd%?\\t%P0, %P1
+ vsqrt%?.f64\\t%P0, %P1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr arch *,armv6_or_vfpv3)
@@ -1175,14 +1175,17 @@ (define_insn_and_split *cmpdf_trap_split_vfp
;; Comparison patterns
+;; In the compare with FP zero case the ARM Architecture Reference Manual
+;; specifies the immediate to be #0.0. However, some buggy assemblers only
+;; accept #0. We don't want to autodetect broken assemblers, so output #0.
(define_insn *cmpsf_vfp
[(set (reg:CCFP VFPCC_REGNUM)
(compare:CCFP (match_operand:SF 0 s_register_operand t,t)
(match_operand:SF 1 vfp_compare_operand t,G)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
@
- fcmps%?\\t%0, %1
- fcmpzs%?\\t%0
+ vcmp%?.f32\\t%0, %1
+ vcmp%?.f32\\t%0, #0
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type fcmps)]
@@ -1194,8 +1197,8 @@ (define_insn *cmpsf_trap_vfp
(match_operand:SF 1 vfp_compare_operand t,G)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
@
- fcmpes%?\\t%0, %1
- fcmpezs%?\\t%0
+ vcmpe%?.f32\\t%0, %1
+ vcmpe%?.f32\\t%0, #0
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type fcmps)]
@@ -1207,8 +1210,8 @@ (define_insn *cmpdf_vfp
(match_operand:DF 1 vfp_compare_operand w,G)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
@
- fcmpd%?\\t%P0, %P1
- fcmpzd%?\\t%P0
+ vcmp%?.f64\\t%P0, %P1
+ vcmp%?.f64\\t%P0, #0
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type fcmpd)]
@@ -1220,8 +1223,8 @@ (define_insn *cmpdf_trap_vfp
(match_operand:DF 1 vfp_compare_operand w,G)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
@
- fcmped%?\\t%P0, %P1
- fcmpezd%?\\t%P0
+ vcmpe%?.f64\\t%P0, %P1
+ vcmpe%?.f64\\t%P0, #0
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type fcmpd)]
diff --git a/gcc/testsuite/gcc.target/arm/vfp-1.c b/gcc/testsuite/gcc.target/arm/vfp-1.c
index 1a970a7..8ceef2b 100644
--- a/gcc/testsuite/gcc.target/arm/vfp-1.c
+++ b/gcc/testsuite/gcc.target/arm/vfp-1.c
@@ -44,7 +44,7 @@ void test_sf() {
/* { dg-final { scan-assembler vnmla.f32 } } */
f1 = -f2 * f3 - f1;
/* sqrtsf2_vfp */
- /* { dg-final { scan-assembler fsqrts } } */
+ /* { dg-final { scan-assembler vsqrt.f32 } } */
f1 = sqrtf (f1);
}
@@ -85,7 +85,7 @@ void test_df() {
/* { dg-final { scan-assembler vnmla.f64 } } */
d1 = -d2 * d3 - d1;
/* sqrtdf2_vfp */
- /* { dg-final { scan-assembler fsqrtd } } */
+ /* { dg-final { scan-assembler vsqrt.f64 } } */
d1 = sqrt (d1);
}
[PATCH][ARM][6/7] Convert FP mnemonics to UAL | movcc_vfp (fmstat)
Hi all, The ARM ARM explicitly says that fmstat is translated into 'vmrs APSR_nzcvm, FPSCR' in UAL syntax so this patch does that. Ok for trunk? Thanks, Kyrill 2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com * config/arm/vfp.md (*movcc_vfp): Use UAL syntax.commit f33bf477f1e30e1125250838843343facb2a7716 Author: Kyrylo Tkachov kyrylo.tkac...@arm.com Date: Thu Jul 17 10:08:56 2014 +0100 [ARM][6/n] Convert FP mnemonics to UAL | movcc_vfp (fmstat) diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index 53929a7..863d4a9 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -1107,7 +1107,7 @@ [(set (reg CC_REGNUM) (reg VFPCC_REGNUM))] TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP - fmstat%? + vmrs%?\\tAPSR_nzcv, FPSCR [(set_attr conds set) (set_attr type f_flag)] )
[PATCH][ARM][7/7] Convert FP mnemonics to UAL | f{ld,st}m - v{ld,st}m
Hi all,
This patch updates some FP load/store multiple patterns and in the
vfp_output_vstmd case when the instruction is used as a push to sp it
now emits a vpush mnemonic instead of vstmdb.
Ok for trunk?
Thanks,
Kyrill
2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com
* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use vldm
mnemonic instead of fldmfdd.
* config/arm/arm.c (vfp_output_fstmd): Rename to...
(vfp_output_vstmd): ... This. Convert output to UAL syntax.
Output vpush when address register is SP.
* config/arm/arm-protos.h (vfp_output_fstmd): Rename to...
(vfp_output_vstmd): ... This.
* config/arm/vfp.md (push_multi_vfp): Update call to
vfp_output_vstmd.commit f1493ae37ea8bcae83f5d71d0456b69042ef9fb5
Author: Kyrylo Tkachov kyrylo.tkac...@arm.com
Date: Thu Jul 17 10:48:27 2014 +0100
[ARM][7/n] Convert FP mnemonics to UAL | f{ld,st}m - vldm
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 5d45015..23add40 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -150,7 +150,7 @@ extern bool arm_is_long_call_p (tree);
extern intarm_emit_vector_const (FILE *, rtx);
extern void arm_emit_fp16_const (rtx c);
extern const char * arm_output_load_gr (rtx *);
-extern const char *vfp_output_fstmd (rtx *);
+extern const char *vfp_output_vstmd (rtx *);
extern void arm_output_multireg_pop (rtx *, bool, rtx, bool, bool);
extern void arm_set_return_address (rtx, rtx);
extern int arm_eliminable_register (rtx);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index f952ace..666da58 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -17668,14 +17668,22 @@ arm_output_multireg_pop (rtx *operands, bool return_pc, rtx cond, bool reverse,
/* Output the assembly for a store multiple. */
const char *
-vfp_output_fstmd (rtx * operands)
+vfp_output_vstmd (rtx * operands)
{
char pattern[100];
int p;
int base;
int i;
+ rtx addr_reg = REG_P (XEXP (operands[0], 0))
+ ? XEXP (operands[0], 0)
+ : XEXP (XEXP (operands[0], 0), 0);
+ bool push_p = REGNO (addr_reg) == SP_REGNUM;
+
+ if (push_p)
+strcpy (pattern, vpush%?.64\t{%P1);
+ else
+strcpy (pattern, vstmdb%?.64\t%m0!, {%P1);
- strcpy (pattern, fstmfdd%?\t%m0!, {%P1);
p = strlen (pattern);
gcc_assert (REG_P (operands[1]));
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 35a49c6..0fe8f22 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -10528,7 +10528,7 @@
int num_regs = XVECLEN (operands[0], 0);
char pattern[100];
rtx op_list[2];
-strcpy (pattern, \fldmfdd\\t\);
+strcpy (pattern, \vldm\\t\);
strcat (pattern, reg_names[REGNO (SET_DEST (XVECEXP (operands[0], 0, 0)))]);
strcat (pattern, \!, {\);
op_list[0] = XEXP (XVECEXP (operands[0], 0, 1), 0);
diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index 863d4a9..94e82e1 100644
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -1284,7 +1284,7 @@
(unspec:BLK [(match_operand:DF 1 vfp_register_operand )]
UNSPEC_PUSH_MULT))])]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
- * return vfp_output_fstmd (operands);
+ * return vfp_output_vstmd (operands);
[(set_attr type f_stored)]
)
Re: [PATCH] Move caret printing to diagnostics_finalizer
Manuel López-Ibáñez lopeziba...@gmail.com writes: This patch is in preparation for further patches moving the Fortran FE to use the common diagnostics machinery. Fortran has its own way of printing the caret information, so we need a way to override the default in the diagnostics machinery. A simple way is to move the printing of the caret (plus the destruction of the prefix and printing a newline at the end) to the diagnostic_finalizer, so Fortran can override the whole thing with its own finalizer. This means that the c-family finalizer needs to invoke the caret explicitly. The C++ finalizer was destroying the prefix even thought this was done by the common code anyway. Thus now there is only one finalizer for both C and C++. gcc/ChangeLog: 2014-08-16 Manuel López-Ibáñez manu.gnu.org * diagnostic.c (default_diagnostic_finalizer): Move caret printing to here ... (diagnostic_report_diagnostic): ... from here. * toplev.c (general_init): Move code to c-family. gcc/cp/ChangeLog: 2014-08-16 Manuel López-Ibáñez manu.gnu.org * error.c (cp_diagnostic_finalizer): Delete. (init_error): Do not set diagnostic_finalizer here. gcc/c-family/ChangeLog: 2014-08-16 Manuel López-Ibáñez manu.gnu.org * c-opts.c: Include tree-diagnostics.h. (c_diagnostic_finalizer): New. (c_common_initialize_diagnostics): Use it. Bootstrapped and regression tested on x86-64-linux. OK? This is OK for me. Please commit it if nobody objects in the next 48 hours. Thank you :-) Cheers. -- Dodji
[COMMITTED] Add myself to MAINTAINERS (Write After Approval)
Committed revision 214159. 2014-08-19 Joost VandeVondele vond...@gcc.gnu.org * MAINTAINERS (Write After Approval): Add myself. Index: MAINTAINERS === --- MAINTAINERS (revision 214158) +++ MAINTAINERS (working copy) @@ -561,6 +561,7 @@ Markus Trippelsdorf markus@trippelsdo David Ung dav...@mips.com Neil Vachharajani nvach...@gmail.com Kris Van Hees kris.van.h...@oracle.com +Joost VandeVondele joost.vandevond...@mat.ethz.ch Ilya Verbiniver...@gmail.com Kugan Vivekanandarajah kug...@linaro.org Tom de Vries t...@codesourcery.com
[PATCH][ARM][2/7] Convert FP mnemonics to UAL | add/sub/div/abs patterns
Hi all,
Nothing too controversial here, convert the concerned patterns to UAL.
The size of the data types in the operation is expressed in the .f32 or
.f64 suffix.
Ok for trunk?
Thanks,
Kyrill
2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com
* config/arm/vfp.md (*abssf2_vfp): Use UAL assembly syntax.
(*absdf2_vfp): Likewise.
(*negsf2_vfp): Likewise.
(*negdf2_vfp): Likewise.
(*addsf3_vfp): Likewise.
(*adddf3_vfp): Likewise.
(*subsf3_vfp): Likewise.
(*subdf3_vfp): Likewise.
(*divsf3_vfp): Likewise.
(*divdf3_vfp): Likewise.
2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com
* gcc.target/arm/vfp-1.c: Updated expected assembly.
commit 271c9401d309e887bcedcae7743139741f6fe9a2
Author: Kyrylo Tkachov kyrylo.tkac...@arm.com
Date: Thu Jul 17 09:47:15 2014 +0100
[ARM][2/n] Convert FP mnemonics to UAL | add/sub/div/abs patterns
diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index d25505c..975f5ae 100644
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -588,7 +588,7 @@
[(set (match_operand:SF 0 s_register_operand =t)
(abs:SF (match_operand:SF 1 s_register_operand t)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
- fabss%?\\t%0, %1
+ vabs%?.f32\\t%0, %1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type ffariths)]
@@ -598,7 +598,7 @@
[(set (match_operand:DF 0 s_register_operand =w)
(abs:DF (match_operand:DF 1 s_register_operand w)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- fabsd%?\\t%P0, %P1
+ vabs%?.f64\\t%P0, %P1
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type ffarithd)]
@@ -609,7 +609,7 @@
(neg:SF (match_operand:SF 1 s_register_operand t,r)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
@
- fnegs%?\\t%0, %1
+ vneg%?.f32\\t%0, %1
eor%?\\t%0, %1, #-2147483648
[(set_attr predicable yes)
(set_attr predicable_short_it no)
@@ -621,7 +621,7 @@
(neg:DF (match_operand:DF 1 s_register_operand w,0,r)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
@
- fnegd%?\\t%P0, %P1
+ vneg%?.f64\\t%P0, %P1
#
#
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE reload_completed
@@ -671,7 +671,7 @@
(plus:SF (match_operand:SF 1 s_register_operand t)
(match_operand:SF 2 s_register_operand t)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
- fadds%?\\t%0, %1, %2
+ vadd%?.f32\\t%0, %1, %2
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type fadds)]
@@ -682,7 +682,7 @@
(plus:DF (match_operand:DF 1 s_register_operand w)
(match_operand:DF 2 s_register_operand w)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- faddd%?\\t%P0, %P1, %P2
+ vadd%?.f64\\t%P0, %P1, %P2
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type faddd)]
@@ -694,7 +694,7 @@
(minus:SF (match_operand:SF 1 s_register_operand t)
(match_operand:SF 2 s_register_operand t)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
- fsubs%?\\t%0, %1, %2
+ vsub%?.f32\\t%0, %1, %2
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type fadds)]
@@ -705,7 +705,7 @@
(minus:DF (match_operand:DF 1 s_register_operand w)
(match_operand:DF 2 s_register_operand w)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- fsubd%?\\t%P0, %P1, %P2
+ vsub%?.f64\\t%P0, %P1, %P2
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr type faddd)]
@@ -722,7 +722,7 @@
(div:SF (match_operand:SF 1 s_register_operand t,t)
(match_operand:SF 2 s_register_operand t,t)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP
- fdivs%?\\t%0, %1, %2
+ vdiv%?.f32\\t%0, %1, %2
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr arch *,armv6_or_vfpv3)
@@ -734,7 +734,7 @@
(div:DF (match_operand:DF 1 s_register_operand w,w)
(match_operand:DF 2 s_register_operand w,w)))]
TARGET_32BIT TARGET_HARD_FLOAT TARGET_VFP_DOUBLE
- fdivd%?\\t%P0, %P1, %P2
+ vdiv%?.f64\\t%P0, %P1, %P2
[(set_attr predicable yes)
(set_attr predicable_short_it no)
(set_attr arch *,armv6_or_vfpv3)
diff --git a/gcc/testsuite/gcc.target/arm/vfp-1.c b/gcc/testsuite/gcc.target/arm/vfp-1.c
index 2355b4d..3027f10 100644
--- a/gcc/testsuite/gcc.target/arm/vfp-1.c
+++ b/gcc/testsuite/gcc.target/arm/vfp-1.c
@@ -11,19 +11,19 @@ volatile float f1, f2, f3;
void test_sf() {
/* abssf2_vfp */
- /* { dg-final { scan-assembler fabss } } */
+ /* { dg-final { scan-assembler vabs.f32 } } */
f1 = fabsf (f1);
/* negsf2_vfp */
- /* { dg-final { scan-assembler fnegs } } */
+ /* { dg-final { scan-assembler vneg.f32 } } */
f1 = -f1;
/* addsf3_vfp */
- /* { dg-final { scan-assembler fadds } } */
+ /* { dg-final { scan-assembler vadd.f32 } } */
f1 = f2 + f3;
/* subsf3_vfp */
- /* { dg-final { scan-assembler fsubs } } */
+ /* { dg-final { scan-assembler vsub.f32 } } */
f1 = f2 -
Re: [PATCH 012/236] Convert DF_REF_INSN to a function for now
On Tue, 2014-08-12 at 15:20 -0600, Jeff Law wrote:
On 08/06/14 11:19, David Malcolm wrote:
DF_REF_INSN looks up the insn field of the referenced df_insn_info.
This will eventually be an rtx_insn *, but for now is just an rtx.
As further scaffolding: for now, convert DF_REF_INSN to a function,
adding a checked downcast to rtx_insn *. This can eventually be
converted back to macro when the field is an rtx_insn *.
gcc/
* df-core.c (DF_REF_INSN): New, using a checked cast for now.
* df.h (DF_REF_INSN): Convert from a macro to a function, so
that we can return an rtx_insn *.
/
* rtx-classes-status.txt: Add DF_REF_INSN.
OK.
Thanks.
Fixed up the as_a_nullable to safe_as_a, and committed to trunk as
r214160, having verified bootstrapregrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone for 9 targets.
Am attaching what I committed.
Dave
[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html
Index: ChangeLog
===
--- ChangeLog (revision 214159)
+++ ChangeLog (revision 214160)
@@ -1,3 +1,7 @@
+2014-08-19 David Malcolm dmalc...@redhat.com
+
+ * rtx-classes-status.txt (TODO): Add DF_REF_INSN.
+
2014-08-19 Joost VandeVondele vond...@gcc.gnu.org
* MAINTAINERS (Write After Approval): Add myself.
Index: rtx-classes-status.txt
===
--- rtx-classes-status.txt (revision 214159)
+++ rtx-classes-status.txt (revision 214160)
@@ -14,5 +14,6 @@
TODO: Scaffolding to be removed
=
+* DF_REF_INSN
* SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
* SET_NEXT_INSN, SET_PREV_INSN
Index: gcc/ChangeLog
===
--- gcc/ChangeLog (revision 214159)
+++ gcc/ChangeLog (revision 214160)
@@ -1,3 +1,9 @@
+2014-08-19 David Malcolm dmalc...@redhat.com
+
+ * df-core.c (DF_REF_INSN): New, using a checked cast for now.
+ * df.h (DF_REF_INSN): Convert from a macro to a function, so
+ that we can return an rtx_insn *.
+
2014-08-19 Yaakov Selkowitz yselk...@redhat.com
* config/i386/cygwin.h (LINK_SPEC): Pass --tsaware flag only
Index: gcc/df-core.c
===
--- gcc/df-core.c (revision 214159)
+++ gcc/df-core.c (revision 214160)
@@ -2502,3 +2502,9 @@
df_chain_dump (link, stderr);
fputc ('\n', stderr);
}
+
+rtx_insn *DF_REF_INSN (df_ref ref)
+{
+ rtx insn = ref-base.insn_info-insn;
+ return safe_as_a rtx_insn * (insn);
+}
Index: gcc/df.h
===
--- gcc/df.h (revision 214159)
+++ gcc/df.h (revision 214160)
@@ -649,7 +649,7 @@
: BLOCK_FOR_INSN (DF_REF_INSN (REF)))
#define DF_REF_BBNO(REF) (DF_REF_BB (REF)-index)
#define DF_REF_INSN_INFO(REF) ((REF)-base.insn_info)
-#define DF_REF_INSN(REF) ((REF)-base.insn_info-insn)
+extern rtx_insn *DF_REF_INSN (df_ref ref);
#define DF_REF_INSN_UID(REF) (INSN_UID (DF_REF_INSN(REF)))
#define DF_REF_CLASS(REF) ((REF)-base.cl)
#define DF_REF_TYPE(REF) ((REF)-base.type)
[PATCH][ARM][1/7] Convert FP mnemonics to UAL | mov patterns
Hi all,
In this patch the move patterns are updated.
For the fconst case where the constant is encoded in a decimal
representation before going into the immediate field of the assembly
instruction UAL syntax allows for the real operand to be output directly
and leaves the assembler to do the encoding.
This simplifies the logic in arm_print_operand a bit.
fp_immediate_constant is deleted and it seems that the function was not
meant to be used anyway (it returned 0 for all inputs!)
Ok for trunk?
Thanks,
Kyrill
2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com
* config/arm/arm.c (output_move_vfp): Use UAL syntax for load/store
multiple.
(arm_print_operand): Don't convert real values to decimal
representation in default case.
(fp_immediate_constant): Delete.
* config/arm/arm-protos.h (fp_immediate_constant): Likewise.
* config/arm/vfp.md (*arm_movsi_vfp): Convert to VFP moves to UAL
syntax.
(*thumb2_movsi_vfp): Likewise.
(*movdi_vfp): Likewise.
(*movdi_vfp_cortexa8): Likewise.
(*movhf_vfp_neon): Likewise.
(*movhf_vfp): Likewise.
(*movsf_vfp): Likewise.
(*thumb2_movsf_vfp): Likewise.
(*movdf_vfp): Likewise.
(*thumb2_movdf_vfp): Likewise.
(*movsfcc_vfp): Likewise.
(*thumb2_movsfcc_vfp): Likewise.
(*movdfcc_vfp): Likewise.
(*thumb2_movdfcc_vfp): Likewise.
2014-08-19 Kyrylo Tkachov kyrylo.tkac...@arm.com
* gcc.target/arm/pr51835.c: Update expected assembly.
* gcc.target/arm/vfp-1.c: Likewise.
* gcc.target/arm/vfp-ldmdbd.c: Likewise.
* gcc.target/arm/vfp-ldmdbs.c: Likewise.
* gcc.target/arm/vfp-ldmiad.c: Likewise.
* gcc.target/arm/vfp-ldmias.c: Likewise.
* gcc.target/arm/vfp-stmdbd.c: Likewise.
* gcc.target/arm/vfp-stmdbs.c: Likewise.
* gcc.target/arm/vfp-stmiad.c: Likewise.
* gcc.target/arm/vfp-stmias.c: Likewise.
commit d4f1dd4f8198c8e6134019adfae3730737360946
Author: Kyrylo Tkachov kyrylo.tkac...@arm.com
Date: Thu Jul 17 09:44:06 2014 +0100
[ARM][1/n] Convert FP mnemonics to UAL | mov patterns
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index 1c887aa..8d9f359 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -126,7 +126,6 @@ extern int arm_max_const_double_inline_cost (void);
extern int arm_const_double_inline_cost (rtx);
extern bool arm_const_double_by_parts (rtx);
extern bool arm_const_double_by_immediates (rtx);
-extern const char *fp_immediate_constant (rtx);
extern void arm_emit_call_insn (rtx, rtx, bool);
extern const char *output_call (rtx *);
extern const char *output_call_mem (rtx *);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index ffa91eb..61e4adb 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -17534,24 +17534,7 @@ arm_reorg (void)
/* Routines to output assembly language. */
-/* If the rtx is the correct value then return the string of the number.
- In this way we can ensure that valid double constants are generated even
- when cross compiling. */
-const char *
-fp_immediate_constant (rtx x)
-{
- REAL_VALUE_TYPE r;
-
- if (!fp_consts_inited)
-init_fp_table ();
-
- REAL_VALUE_FROM_CONST_DOUBLE (r, x);
-
- gcc_assert (REAL_VALUES_EQUAL (r, value_fp0));
- return 0;
-}
-
-/* As for fp_immediate_constant, but value is passed directly, not in rtx. */
+/* Return string representation of passed in real value. */
static const char *
fp_const_from_val (REAL_VALUE_TYPE *r)
{
@@ -18467,19 +18450,19 @@ output_move_vfp (rtx *operands)
switch (GET_CODE (addr))
{
case PRE_DEC:
- templ = f%smdb%c%%?\t%%0!, {%%%s1}%s;
+ templ = v%smdb%%?.%s\t%%0!, {%%%s1}%s;
ops[0] = XEXP (addr, 0);
ops[1] = reg;
break;
case POST_INC:
- templ = f%smia%c%%?\t%%0!, {%%%s1}%s;
+ templ = v%smia%%?.%s\t%%0!, {%%%s1}%s;
ops[0] = XEXP (addr, 0);
ops[1] = reg;
break;
default:
- templ = f%s%c%%?\t%%%s0, %%1%s;
+ templ = v%sr%%?.%s\t%%%s0, %%1%s;
ops[0] = reg;
ops[1] = mem;
break;
@@ -18487,7 +18470,7 @@ output_move_vfp (rtx *operands)
sprintf (buff, templ,
load ? ld : st,
- dp ? 'd' : 's',
+ dp ? 64 : 32,
dp ? P : ,
integer_p ? \t%@ int : );
output_asm_insn (buff, ops);
@@ -22132,15 +22115,12 @@ arm_print_operand (FILE *stream, rtx x, int code)
break;
case CONST_DOUBLE:
- if (TARGET_NEON)
-{
- char fpstr[20];
- real_to_decimal (fpstr, CONST_DOUBLE_REAL_VALUE (x),
- sizeof (fpstr), 0, 1);
- fprintf (stream, #%s, fpstr);
-}
- else
- fprintf (stream, #%s, fp_immediate_constant (x));
+ {
+char fpstr[20];
+real_to_decimal (fpstr, CONST_DOUBLE_REAL_VALUE (x),
+ sizeof (fpstr), 0, 1);
+fprintf (stream, #%s, fpstr);
+ }
break;
default:
diff --git
Re: [PATCH][AArch64] Use CC_Z and CC_NZ with csinc and similar instructions
On 08/19/2014 06:29 AM, Kyrill Tkachov wrote:
+(define_special_predicate cc_register_zero
+ (and (match_code reg)
+ (and (match_test REGNO (op) == CC_REGNUM)
+ (ior (match_test mode == GET_MODE (op))
+ (ior (match_test mode == VOIDmode
+ GET_MODE_CLASS (GET_MODE (op)) ==
MODE_CC)
+ (match_test mode == CCmode || mode == CC_Zmode
+|| mode == CC_NZmode)
+)
Well, you're being too liberal with the modes you're accepting, since 'mode'
will always be VOIDmode.
And personally I find those match_tests quite ugly. Better as:
(define_special_predicate cc_register_zero
(match_code reg)
{
return (REGNO (op) == CC_REGNUM
(GET_MODE (op) == CCmode
|| GET_MODE (op) == CC_Zmode
|| GET_MODE (op) == CC_NZmode));
})
r~
Re: [PATCH] cygwin: __cxa_atexit support
Patch is ok. Applied this patch at revision 214162 together with your followup-patch at revision 214161. Thanks, Kai
Re: [PATCH] cygwin: accept -pthread
Patch is ok. Applied this patch at revision 214161 together with your followup-patch at revision 214162. Thanks, Kai
Re: [PATCH] _cxa_thread_atexit fixes for Cygwin/MinGW-w64
Applied at revision 214163. Thanks, Kai
Re: [PATCH 013/236] DEP_PRO/DEP_CON scaffolding
On Tue, 2014-08-12 at 15:21 -0600, Jeff Law wrote:
On 08/06/14 11:19, David Malcolm wrote:
For now, convert DEP_PRO and DEP_CON into functions. We will eventually
change them back to macros once the relevant fields are of type
rtx_insn *.
gcc/
* sched-int.h (DEP_PRO): struct _dep's pro and con fields will
eventually be rtx_insn *, but to help with transition, for now,
convert from an access macro into a pair of functions: DEP_PRO
returning an rtx_insn * and...
(SET_DEP_PRO): New function, for use where DEP_PRO is used as an
lvalue, returning an rtx.
(DEP_CON): Analogous changes to DEP_PRO above.
(SET_DEP_CON): Likewise.
* haifa-sched.c (create_check_block_twin): Replace DEP_CON used as
an lvalue to SET_DEP_CON.
* sched-deps.c (init_dep_1): Likewise for DEP_PRO and DEP_CON.
(sd_copy_back_deps): Likewise for DEP_CON.
(DEP_PRO): New function, adding a checked cast for now.
(DEP_CON): Likewise.
(SET_DEP_PRO): New function.
(SET_DEP_CON): Likewise.
OK.
Thanks.
Fixed up the two as_a_nullable to safe_as_a, and committed to trunk as
r214164, having verified bootstrapregrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone with 9 targets.
Am attaching what I committed.
FWIW these function becomes macros again in patch #175.
Index: ChangeLog
===
--- ChangeLog (revision 214163)
+++ ChangeLog (revision 214164)
@@ -1,5 +1,9 @@
2014-08-19 David Malcolm dmalc...@redhat.com
+ * rtx-classes-status.txt (TODO): Add SET_DEP_PRO, SET_DEP_CON.
+
+2014-08-19 David Malcolm dmalc...@redhat.com
+
* rtx-classes-status.txt (TODO): Add DF_REF_INSN.
2014-08-19 Joost VandeVondele vond...@gcc.gnu.org
Index: rtx-classes-status.txt
===
--- rtx-classes-status.txt (revision 214163)
+++ rtx-classes-status.txt (revision 214164)
@@ -16,4 +16,5 @@
=
* DF_REF_INSN
* SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
+* SET_DEP_PRO, SET_DEP_CON
* SET_NEXT_INSN, SET_PREV_INSN
Index: gcc/ChangeLog
===
--- gcc/ChangeLog (revision 214163)
+++ gcc/ChangeLog (revision 214164)
@@ -1,3 +1,23 @@
+2014-08-19 David Malcolm dmalc...@redhat.com
+
+ * sched-int.h (DEP_PRO): struct _dep's pro and con fields will
+ eventually be rtx_insn *, but to help with transition, for now,
+ convert from an access macro into a pair of functions: DEP_PRO
+ returning an rtx_insn * and...
+ (SET_DEP_PRO): New function, for use where DEP_PRO is used as an
+ lvalue, returning an rtx.
+ (DEP_CON): Analogous changes to DEP_PRO above.
+ (SET_DEP_CON): Likewise.
+
+ * haifa-sched.c (create_check_block_twin): Replace DEP_CON used as
+ an lvalue to SET_DEP_CON.
+ * sched-deps.c (init_dep_1): Likewise for DEP_PRO and DEP_CON.
+ (sd_copy_back_deps): Likewise for DEP_CON.
+ (DEP_PRO): New function, adding a checked cast for now.
+ (DEP_CON): Likewise.
+ (SET_DEP_PRO): New function.
+ (SET_DEP_CON): Likewise.
+
2014-08-19 Yaakov Selkowitz yselk...@redhat.com
* config.gcc (*-*-cygwin*): Use __cxa_atexit by default.
Index: gcc/haifa-sched.c
===
--- gcc/haifa-sched.c (revision 214163)
+++ gcc/haifa-sched.c (revision 214164)
@@ -7947,7 +7947,7 @@
if (rec != EXIT_BLOCK_PTR_FOR_FN (cfun))
{
- DEP_CON (new_dep) = twin;
+ SET_DEP_CON (new_dep) = twin;
sd_add_dep (new_dep, false);
}
}
Index: gcc/sched-deps.c
===
--- gcc/sched-deps.c (revision 214163)
+++ gcc/sched-deps.c (revision 214164)
@@ -103,8 +103,8 @@
void
init_dep_1 (dep_t dep, rtx pro, rtx con, enum reg_note type, ds_t ds)
{
- DEP_PRO (dep) = pro;
- DEP_CON (dep) = con;
+ SET_DEP_PRO (dep) = pro;
+ SET_DEP_CON (dep) = con;
DEP_TYPE (dep) = type;
DEP_STATUS (dep) = ds;
DEP_COST (dep) = UNKNOWN_DEP_COST;
@@ -1416,7 +1416,7 @@
dep_def _new_dep, *new_dep = _new_dep;
copy_dep (new_dep, dep);
- DEP_CON (new_dep) = to;
+ SET_DEP_CON (new_dep) = to;
sd_add_dep (new_dep, resolved_p);
}
}
@@ -4915,4 +4915,24 @@
success_in_block);
}
+rtx_insn *DEP_PRO (dep_t dep)
+{
+ return safe_as_a rtx_insn * (dep-pro);
+}
+
+rtx_insn *DEP_CON (dep_t dep)
+{
+ return safe_as_a rtx_insn * (dep-con);
+}
+
+rtx SET_DEP_PRO (dep_t dep)
+{
+ return dep-pro;
+}
+
+rtx SET_DEP_CON (dep_t dep)
+{
+ return dep-con;
+}
+
#endif /* INSN_SCHEDULING */
Index: gcc/sched-int.h
===
--- gcc/sched-int.h (revision 214163)
+++ gcc/sched-int.h (revision 214164)
@@ -250,8 +250,10 @@
typedef struct _dep dep_def;
typedef dep_def *dep_t;
-#define DEP_PRO(D)
Re: [PATCH] gcc/c/c-aux-info.c: Resize 'buff' from 10 to 14 bytes
Excuse me, I did not finish in time. At present, I shall be mainly focus
on testsuite. Before I finish it, I can do nothing (I should do nothing)
for this patch.
Originally:
- I get a PC (not buy), it is low quality which cause reboot after run
several hours with full cpu used, I wasted much free time resources
on it.
- And I also run testsuite under my mac book, but related configuration
is always incorrect (although can pass building).
- And I also run under my x86_64 ubuntu 12 laptop, it is very slow, and
it is also my work machine, so can not build during my working time,
or it has much negative effect with my work.
Tomorrow I will get a new PC (buy myself) with enough quality (buy from
Lenovo speciality stores), and will install fedora 19 or 20 on it. Then
hope I can finish testsuite within this month (2014-08-31).
By the way, also sorry for another patch which related with microblaze,
I have to delay, too. Hope I can finish within next month (2014-09-30).
Welcome any ideas, suggestions, or completions.
Thanks.
On 08/17/2014 07:04 PM, Chen Gang wrote:
And sorry, I did not finish make check at the time point. I wasted my
time resources (of my free time) on constructing PC environments and my
x86_64 laptop environments.
- x86_64 laptop under ubuntu: try to update 'libc6' package to install
'autogen'. At last, I succeed: overwrite libc6 package files under
individual living system, and then modify dpkg config file manually.
- PC environments: I failed, the reason is my PC hardware is not stable
enough (low quality). After building several hours, the machine will
reboot automatically (tried several times, each needs several hours).
And I shall try to finish as soon as possible (may tomorrow or the day
after tomorrow, under Mac book; and within a week under x86_64 laptop).
At present, the related patch v2 is below, if possible, please check.
Thanks.
-patch begin
gcc/c/c-aux-info.c: Resize 'buff' from 10 to 23 bytes
int_size_in_bytes() returns HOST_WIDE_INT (64-bit), theoretically, the
maximized size is 23 -- it is sizeof([-9223372036854775808]) for
0x8000LL.
It may not cause real world issue, but if another issues occur, it may
lead things worse.
2014-08-17 Chen Gang gang.chen.5...@gmail.com
* c/c-aux-info.c (gen_type): Resize 'buff' from 10 to 23 bytes.
---
gcc/c/c-aux-info.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/gcc/c/c-aux-info.c b/gcc/c/c-aux-info.c
index 4b6b2d0..878807b 100644
--- a/gcc/c/c-aux-info.c
+++ b/gcc/c/c-aux-info.c
@@ -310,9 +310,10 @@ gen_type (const char *ret_val, tree t, formals_style
style)
TREE_TYPE (t), style);
else
{
- int size = (int_size_in_bytes (t) / int_size_in_bytes (TREE_TYPE
(t)));
- char buff[10];
- sprintf (buff, [%d], size);
+ char buff[23];
+ sprintf (buff, [HOST_WIDE_INT_PRINT_DEC],
+int_size_in_bytes (t)
+/ int_size_in_bytes (TREE_TYPE (t)));
ret_val = gen_type (concat (ret_val, buff, NULL),
TREE_TYPE (t), style);
}
-patch end--
On 8/12/14 11:41, Chen Gang wrote:
On 8/12/14 7:38, Mike Stump wrote:
On Aug 11, 2014, at 2:27 PM, Chen Gang gang.chen.5...@gmail.com wrote:
Welcome additional disccusions or completions, and if no any additional
reply within 1 week, I shall send patch v2 for it (still use sprintf).
So, my take is it is easier for a maintainer to re-review if you do it
without additional delay. I’d recommend addressing the review points and
posting without waiting a week in this case. Waiting is useful if a review
point is contentious.
OK, thanks. What you said sounds reasonable to me.
But excuse me, I have no enough time resource on it, and also, I am
still not quite familiar with building and checking (especially it needs
a long time to build and check which has negative effect for analyzing).
So, excuse me again, I have to need more time period on it. But I should
try send patch v2 for it within this week (2014-08-17).
And still welcome additional ideas, suggestions or completions.
Thanks.
--
Chen Gang
Open share and attitude like air water and life which God blessed
Re: [PATCH 014/236] VINSN_INSN_RTX scaffolding
On Tue, 2014-08-12 at 15:21 -0600, Jeff Law wrote:
On 08/06/14 11:19, David Malcolm wrote:
For now, convert into VINSN_INSN_RTX a pair of functions. We will
eventually change them back to a macro once the relevant field is of type
rtx_insn *.
gcc/
* sel-sched-ir.h (VINSN_INSN_RTX): struct vinsn_def's insn_rtx
field will eventually be an rtx_insn *. To help with transition,
for now, convert from an access macro into a pair of functions:
VINSN_INSN_RTX, returning an rtx_insn *, and...
(SET_VINSN_INSN_RTX): New function, for use where VINSN_INSN_RTX
is used as an lvalue.
* sel-sched-ir.c (vinsn_init): Replace VINSN_INSN_RTX with
SET_VINSN_INSN_RTX where it's used as an lvalue.
(VINSN_INSN_RTX): New function.
(SET_VINSN_INSN_RTX): New function.
/
* rtx-classes-status.txt: Add SET_VINSN_INSN_RTX.
OK.
Thanks.
Fixed up the as_a_nullable to safe_as_a, and committed to trunk as
r214165, having verified bootstrapregrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone with 9 targets.
Am attaching what I committed.
FWIW these functions becomes a macro again in patch #174.
Index: ChangeLog
===
--- ChangeLog (revision 214164)
+++ ChangeLog (revision 214165)
@@ -1,5 +1,9 @@
2014-08-19 David Malcolm dmalc...@redhat.com
+ * rtx-classes-status.txt (TODO): Add SET_VINSN_INSN_RTX.
+
+2014-08-19 David Malcolm dmalc...@redhat.com
+
* rtx-classes-status.txt (TODO): Add SET_DEP_PRO, SET_DEP_CON.
2014-08-19 David Malcolm dmalc...@redhat.com
Index: rtx-classes-status.txt
===
--- rtx-classes-status.txt (revision 214164)
+++ rtx-classes-status.txt (revision 214165)
@@ -18,3 +18,4 @@
* SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
* SET_DEP_PRO, SET_DEP_CON
* SET_NEXT_INSN, SET_PREV_INSN
+* SET_VINSN_INSN_RTX
Index: gcc/ChangeLog
===
--- gcc/ChangeLog (revision 214164)
+++ gcc/ChangeLog (revision 214165)
@@ -1,5 +1,19 @@
2014-08-19 David Malcolm dmalc...@redhat.com
+ * sel-sched-ir.h (VINSN_INSN_RTX): struct vinsn_def's insn_rtx
+ field will eventually be an rtx_insn *. To help with transition,
+ for now, convert from an access macro into a pair of functions:
+ VINSN_INSN_RTX, returning an rtx_insn *, and...
+ (SET_VINSN_INSN_RTX): New function, for use where VINSN_INSN_RTX
+ is used as an lvalue.
+
+ * sel-sched-ir.c (vinsn_init): Replace VINSN_INSN_RTX with
+ SET_VINSN_INSN_RTX where it's used as an lvalue.
+ (VINSN_INSN_RTX): New function.
+ (SET_VINSN_INSN_RTX): New function.
+
+2014-08-19 David Malcolm dmalc...@redhat.com
+
* sched-int.h (DEP_PRO): struct _dep's pro and con fields will
eventually be rtx_insn *, but to help with transition, for now,
convert from an access macro into a pair of functions: DEP_PRO
Index: gcc/sel-sched-ir.c
===
--- gcc/sel-sched-ir.c (revision 214164)
+++ gcc/sel-sched-ir.c (revision 214165)
@@ -1179,7 +1179,7 @@
hash_rtx_callback_function hrcf;
int insn_class;
- VINSN_INSN_RTX (vi) = insn;
+ SET_VINSN_INSN_RTX (vi) = insn;
VINSN_COUNT (vi) = 0;
vi-cost = -1;
@@ -6441,4 +6441,15 @@
SET_LOOP_PREHEADER_BLOCKS (loop_outer (current_loop_nest),
preheader_blocks);
}
+
+rtx_insn *VINSN_INSN_RTX (vinsn_t vi)
+{
+ return safe_as_a rtx_insn * (vi-insn_rtx);
+}
+
+rtx SET_VINSN_INSN_RTX (vinsn_t vi)
+{
+ return vi-insn_rtx;
+}
+
#endif
Index: gcc/sel-sched-ir.h
===
--- gcc/sel-sched-ir.h (revision 214164)
+++ gcc/sel-sched-ir.h (revision 214165)
@@ -645,7 +645,8 @@
bool may_trap_p;
};
-#define VINSN_INSN_RTX(VI) ((VI)-insn_rtx)
+extern rtx_insn *VINSN_INSN_RTX (vinsn_t);
+extern rtx SET_VINSN_INSN_RTX (vinsn_t);
#define VINSN_PATTERN(VI) (PATTERN (VINSN_INSN_RTX (VI)))
#define VINSN_ID(VI) (((VI)-id))
[committed] Fix typo in diagnostics
I noticed a typo in a diagnostic message. No test needs
adjusting.
Bootstrapped/regtested on x86_64-linux, applying to trunk.
2014-08-19 Marek Polacek pola...@redhat.com
* lex.c (_cpp_lex_direct): Fix a typo.
diff --git gcc/lex.c gcc/lex.c
index 0713f65..827cfb0 100644
--- gcc/lex.c
+++ gcc/lex.c
@@ -2341,7 +2341,7 @@ _cpp_lex_direct (cpp_reader *pfile)
! buffer-warned_cplusplus_comments)
{
cpp_error (pfile, CPP_DL_WARNING,
-C++ style comments are are incompatible with C90);
+C++ style comments are incompatible with C90);
cpp_error (pfile, CPP_DL_WARNING,
(this will be reported only once per input file));
buffer-warned_cplusplus_comments = 1;
Marek
Re: [PATCH][AArch64] Use CC_Z and CC_NZ with csinc and similar instructions
On 19/08/14 16:25, Richard Henderson wrote:
On 08/19/2014 06:29 AM, Kyrill Tkachov wrote:
+(define_special_predicate cc_register_zero
+ (and (match_code reg)
+ (and (match_test REGNO (op) == CC_REGNUM)
+ (ior (match_test mode == GET_MODE (op))
+(ior (match_test mode == VOIDmode
+ GET_MODE_CLASS (GET_MODE (op)) ==
MODE_CC)
+ (match_test mode == CCmode || mode == CC_Zmode
+ || mode == CC_NZmode)
+)
Well, you're being too liberal with the modes you're accepting, since 'mode'
will always be VOIDmode.
And personally I find those match_tests quite ugly. Better as:
(define_special_predicate cc_register_zero
(match_code reg)
{
return (REGNO (op) == CC_REGNUM
(GET_MODE (op) == CCmode
|| GET_MODE (op) == CC_Zmode
|| GET_MODE (op) == CC_NZmode));
})
Hi Richard,
Like this? I wasn't particularly confident on the difference between
'mode' and GET_MODE (op).
If 'mode' is always going to be VOIDmode, shall I fix up cc_register
above it similarly to this?
Kyrill
r~
commit f466fa0e61bf1475a925abe7031debc66c21e584
Author: Kyrylo Tkachov kyrylo.tkac...@arm.com
Date: Mon Aug 4 16:49:24 2014 +0100
[AArch64] Use CC_NZ in csinc pattern
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 3c51fd3..f172d56 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -2599,7 +2599,7 @@ (define_insn aarch64_crc_variant
(define_insn *csinc2mode_insn
[(set (match_operand:GPI 0 register_operand =r)
(plus:GPI (match_operator:GPI 2 aarch64_comparison_operator
- [(match_operand:CC 3 cc_register ) (const_int 0)])
+ [(match_operand 3 cc_register_zero ) (const_int 0)])
(match_operand:GPI 1 register_operand r)))]
csinc\\t%w0, %w1, %w1, %M2
@@ -2610,7 +2610,7 @@ (define_insn csinc3mode_insn
[(set (match_operand:GPI 0 register_operand =r)
(if_then_else:GPI
(match_operator:GPI 1 aarch64_comparison_operator
- [(match_operand:CC 2 cc_register ) (const_int 0)])
+ [(match_operand 2 cc_register_zero ) (const_int 0)])
(plus:GPI (match_operand:GPI 3 register_operand r)
(const_int 1))
(match_operand:GPI 4 aarch64_reg_or_zero rZ)))]
@@ -2623,7 +2623,7 @@ (define_insn *csinv3mode_insn
[(set (match_operand:GPI 0 register_operand =r)
(if_then_else:GPI
(match_operator:GPI 1 aarch64_comparison_operator
- [(match_operand:CC 2 cc_register ) (const_int 0)])
+ [(match_operand 2 cc_register_zero ) (const_int 0)])
(not:GPI (match_operand:GPI 3 register_operand r))
(match_operand:GPI 4 aarch64_reg_or_zero rZ)))]
@@ -2635,7 +2635,7 @@ (define_insn *csneg3mode_insn
[(set (match_operand:GPI 0 register_operand =r)
(if_then_else:GPI
(match_operator:GPI 1 aarch64_comparison_operator
- [(match_operand:CC 2 cc_register ) (const_int 0)])
+ [(match_operand 2 cc_register_zero ) (const_int 0)])
(neg:GPI (match_operand:GPI 3 register_operand r))
(match_operand:GPI 4 aarch64_reg_or_zero rZ)))]
diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index 3dd83ca..a2f9bd1 100644
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -26,6 +26,15 @@ (define_special_predicate cc_register
GET_MODE_CLASS (GET_MODE (op)) == MODE_CC
)
+(define_special_predicate cc_register_zero
+ (match_code reg)
+{
+ return (REGNO (op) == CC_REGNUM
+ (GET_MODE (op) == CCmode
+ || GET_MODE (op) == CC_Zmode
+ || GET_MODE (op) == CC_NZmode));
+})
+
(define_predicate aarch64_call_insn_operand
(ior (match_code symbol_ref)
(match_operand 0 register_operand)))
[COMMITTED] Remove myself from MAINTAINERS
Committed as revision 214157. 2014-08-19 Christopher Faylor me@cgf.cx * MAINTAINERS: Remove myself Index: MAINTAINERS === --- MAINTAINERS (revision 214153) +++ MAINTAINERS (working copy) @@ -136,7 +136,6 @@ VMSDouglas Ruppr...@gnat.com VMSTristan Gingold ging...@adacore.com VxWorks ports Nathan Sidwell nat...@codesourcery.com -windows, cygwin, mingw Christopher Faylor c...@gcc.gnu.org windows, cygwin, mingw Kai Tietz kti...@redhat.com windows, cygwin, mingw Dave Korn dave.korn.cyg...@gmail.com
Re: [PATCH] Quash Wbool-compare warning in optabs.c
On 08/19/2014 08:54 AM, Marek Polacek wrote: Works as well. So is the following ok once the regtest finishes? Bootstrapped on x86_64-linux. 2014-08-19 Marek Polacek pola...@redhat.com * config/alpha/alpha.h (CLZ_DEFINED_VALUE_AT_ZERO, CTZ_DEFINED_VALUE_AT_ZERO): Return 0/1 rather than bool. * config/i386/i386.h (CLZ_DEFINED_VALUE_AT_ZERO, CTZ_DEFINED_VALUE_AT_ZERO): Return 0/1 rather than bool. Ok. r~
Re: [PATCH 015/236] BB_NOTE_LIST scaffolding
On Tue, 2014-08-12 at 15:22 -0600, Jeff Law wrote:
On 08/06/14 11:19, David Malcolm wrote:
gcc/
* sel-sched-ir.h (BB_NOTE_LIST): struct sel_region_bb_info_def's
note_list field will eventually be an rtx_insn *. To help with
transition, for now, convert from an access macro into a pair of
functions: BB_NOTE_LIST, returning an rtx_insn *, and...
(SET_BB_NOTE_LIST): New function, for use where BB_NOTE_LIST is
used as an lvalue.
* sel-sched.c (create_block_for_bookkeeping): Update lvalue usage
of BB_NOTE_LIST to SET_BB_NOTE_LIST.
* sel-sched-ir.c (init_bb): Likewise.
(sel_restore_notes): Likewise.
(move_bb_info): Likewise.
(BB_NOTE_LIST): New function, adding a checked cast to rtx_insn *.
(SET_BB_NOTE_LIST): New function.
/
* rtx-classes-status.txt: Add SET_BB_NOTE_LIST.
OK.
Thanks.
Fixed up the as_a_nullable to safe_as_a, and committed to trunk as
r214167, having verified bootstrapregrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone with 9 targets.
Am attaching what I committed.
FWIW these functions becomes a macro again in patch #170.
Dave
[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html
Index: ChangeLog
===
--- ChangeLog (revision 214166)
+++ ChangeLog (revision 214167)
@@ -1,5 +1,9 @@
2014-08-19 David Malcolm dmalc...@redhat.com
+ * rtx-classes-status.txt (TODO): Add SET_BB_NOTE_LIST.
+
+2014-08-19 David Malcolm dmalc...@redhat.com
+
* rtx-classes-status.txt (TODO): Add SET_VINSN_INSN_RTX.
2014-08-19 David Malcolm dmalc...@redhat.com
Index: rtx-classes-status.txt
===
--- rtx-classes-status.txt (revision 214166)
+++ rtx-classes-status.txt (revision 214167)
@@ -16,6 +16,7 @@
=
* DF_REF_INSN
* SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
+* SET_BB_NOTE_LIST
* SET_DEP_PRO, SET_DEP_CON
* SET_NEXT_INSN, SET_PREV_INSN
* SET_VINSN_INSN_RTX
Index: gcc/ChangeLog
===
--- gcc/ChangeLog (revision 214166)
+++ gcc/ChangeLog (revision 214167)
@@ -1,5 +1,23 @@
2014-08-19 David Malcolm dmalc...@redhat.com
+ * sel-sched-ir.h (BB_NOTE_LIST): struct sel_region_bb_info_def's
+ note_list field will eventually be an rtx_insn *. To help with
+ transition, for now, convert from an access macro into a pair of
+ functions: BB_NOTE_LIST, returning an rtx_insn *, and...
+ (SET_BB_NOTE_LIST): New function, for use where BB_NOTE_LIST is
+ used as an lvalue.
+
+ * sel-sched.c (create_block_for_bookkeeping): Update lvalue usage
+ of BB_NOTE_LIST to SET_BB_NOTE_LIST.
+
+ * sel-sched-ir.c (init_bb): Likewise.
+ (sel_restore_notes): Likewise.
+ (move_bb_info): Likewise.
+ (BB_NOTE_LIST): New function, adding a checked cast to rtx_insn *.
+ (SET_BB_NOTE_LIST): New function.
+
+2014-08-19 David Malcolm dmalc...@redhat.com
+
* sel-sched-ir.h (VINSN_INSN_RTX): struct vinsn_def's insn_rtx
field will eventually be an rtx_insn *. To help with transition,
for now, convert from an access macro into a pair of functions:
Index: gcc/sel-sched.c
===
--- gcc/sel-sched.c (revision 214166)
+++ gcc/sel-sched.c (revision 214167)
@@ -4585,8 +4585,8 @@
/* Move note_list from the upper bb. */
gcc_assert (BB_NOTE_LIST (new_bb) == NULL_RTX);
- BB_NOTE_LIST (new_bb) = BB_NOTE_LIST (bb);
- BB_NOTE_LIST (bb) = NULL_RTX;
+ SET_BB_NOTE_LIST (new_bb) = BB_NOTE_LIST (bb);
+ SET_BB_NOTE_LIST (bb) = NULL_RTX;
gcc_assert (e2-dest == bb);
Index: gcc/sel-sched-ir.c
===
--- gcc/sel-sched-ir.c (revision 214166)
+++ gcc/sel-sched-ir.c (revision 214167)
@@ -4620,7 +4620,7 @@
init_bb (basic_block bb)
{
remove_notes (bb_note (bb), BB_END (bb));
- BB_NOTE_LIST (bb) = note_list;
+ SET_BB_NOTE_LIST (bb) = note_list;
}
void
@@ -4655,7 +4655,7 @@
{
note_list = BB_NOTE_LIST (first);
restore_other_notes (NULL, first);
- BB_NOTE_LIST (first) = NULL_RTX;
+ SET_BB_NOTE_LIST (first) = NULL_RTX;
FOR_BB_INSNS (first, insn)
if (NONDEBUG_INSN_P (insn))
@@ -5263,8 +5263,8 @@
{
if (in_current_region_p (merge_bb))
concat_note_lists (BB_NOTE_LIST (empty_bb),
- BB_NOTE_LIST (merge_bb));
- BB_NOTE_LIST (empty_bb) = NULL_RTX;
+ SET_BB_NOTE_LIST (merge_bb));
+ SET_BB_NOTE_LIST (empty_bb) = NULL_RTX;
}
@@ -6452,4 +6452,15 @@
return vi-insn_rtx;
}
+rtx_insn *BB_NOTE_LIST (basic_block bb)
+{
+ rtx note_list = SEL_REGION_BB_INFO (bb)-note_list;
+ return safe_as_a rtx_insn * (note_list);
+}
+
+rtx SET_BB_NOTE_LIST (basic_block bb)
+{
+ return SEL_REGION_BB_INFO (bb)-note_list;
+}
+
#endif
Index: gcc/sel-sched-ir.h
Re: [PATCH][AArch64] Use CC_Z and CC_NZ with csinc and similar instructions
(define_special_predicate cc_register_zero
(match_code reg)
{
return (REGNO (op) == CC_REGNUM
(GET_MODE (op) == CCmode
|| GET_MODE (op) == CC_Zmode
|| GET_MODE (op) == CC_NZmode));
})
... and now that I read the backend more closely, I see _zero was a bad name.
But more importantly, I see no connection between the comparison used and the
CCmode being accepted. And if we fix that, why are you restricting to just Z
and NZ? What's wrong with e.g. CFPmode?
In the i386 backend, we check comparison+mode correspondence like
(match_operator 4 ix86_carry_flag_operator
[(match_operand 3 flags_reg_operand) (const_int 0)])
I think you'll want something similar. In the case of CSINC, we can accept all
conditions, so let's start with the most general:
(match_operator:GPI 2 aarch64_comparison_operation
[(reg CC_REGNUM) (const_int 0)]
or even
(match_operand:GPI 2 aarch64_comparison_operation )
with
(define_predicate aarch64_comparison_operation
(match_code eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,
unordered,ordered,unlt,unle,unge,ungt)
{
if (XEXP (op, 1) != const0_rtx)
return false;
rtx op0 = XEXP (op, 0);
if (!REG_P (op0) || REGNO (op0) != CC_REGNUM)
return false;
return aarch64_get_condition_code (op) = 0;
})
where aarch64_get_condition_code is
(1) exported
(2) adjusted to return int not unsigned
(3) adjusted to not abort, but return -1 for invalid combinations.
and the two existing users of aarch64_get_condition_code are adjusted to
gcc_assert that the return value is valid.
r~
Re: [PATCH] Quash Wbool-compare warning in optabs.c
On Tue, Aug 19, 2014 at 07:52:33AM -0700, Richard Henderson wrote:
On 08/19/2014 07:12 AM, Marek Polacek wrote:
On some archs, C[TL]Z_DEFINED_VALUE_AT_ZERO macros return only
true/false, so -Wbool-compare would warn.
Then we should fix them to return 0/1 instead.
Works as well. So is the following ok once the regtest finishes?
Bootstrapped on x86_64-linux.
2014-08-19 Marek Polacek pola...@redhat.com
* config/alpha/alpha.h (CLZ_DEFINED_VALUE_AT_ZERO,
CTZ_DEFINED_VALUE_AT_ZERO): Return 0/1 rather than bool.
* config/i386/i386.h (CLZ_DEFINED_VALUE_AT_ZERO,
CTZ_DEFINED_VALUE_AT_ZERO): Return 0/1 rather than bool.
diff --git gcc/config/alpha/alpha.h gcc/config/alpha/alpha.h
index 0ff793f..88816f3 100644
--- gcc/config/alpha/alpha.h
+++ gcc/config/alpha/alpha.h
@@ -912,8 +912,10 @@ do {
\
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
/* The CIX ctlz and cttz instructions return 64 for zero. */
-#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
-#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
+#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, \
+ TARGET_CIX ? 1 : 0)
+#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, \
+ TARGET_CIX ? 1 : 0)
/* Define the value returned by a floating-point comparison instruction. */
diff --git gcc/config/i386/i386.h gcc/config/i386/i386.h
index ec6ed25..2c64162 100644
--- gcc/config/i386/i386.h
+++ gcc/config/i386/i386.h
@@ -2498,9 +2498,9 @@ extern void debug_dispatch_window (int);
/* The value at zero is only defined for the BMI instructions
LZCNT and TZCNT, not the BSR/BSF insns in the original isa. */
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
- ((VALUE) = GET_MODE_BITSIZE (MODE), TARGET_BMI)
+ ((VALUE) = GET_MODE_BITSIZE (MODE), TARGET_BMI ? 1 : 0)
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
- ((VALUE) = GET_MODE_BITSIZE (MODE), TARGET_LZCNT)
+ ((VALUE) = GET_MODE_BITSIZE (MODE), TARGET_LZCNT ? 1 : 0)
/* Flags returned by ix86_get_callcvt (). */
Marek
Re: PATCH: PR other/62168: error in configure: line 21572: test: =: unary operator expected
On Mon, Aug 18, 2014 at 08:51:35AM -0700, H.J. Lu wrote:
When --enable-gold=no is used to configure gcc, we will see
configure: line 21572: test: =: unary operator expected
I checked in this patch to set install_gold_as_default to no for
--enable-gold=no. Tested on Linux/x86-64.
The previous patch doesn't handle --enable-gold=yes when gold isn't
the default. I am checking in this patch to set install_gold_as_default
to no first. It will be set to yes only for --enable-gold=default or
--enable-gold=yes --enable-ld=no.
H.J.
---
Index: ChangeLog
===
--- ChangeLog (revision 214167)
+++ ChangeLog (working copy)
@@ -1,3 +1,9 @@
+2014-08-19 H.J. Lu hongjiu...@intel.com
+
+ PR other/62168
+ * configure.ac: Set install_gold_as_default to no first.
+* configure: Regenerated.
+
2014-08-19 David Malcolm dmalc...@redhat.com
* sel-sched-ir.h (BB_NOTE_LIST): struct sel_region_bb_info_def's
Index: configure
===
--- configure (revision 214167)
+++ configure (working copy)
@@ -21528,6 +21528,7 @@ if test ${enable_ld+set} = set; then :
fi
+install_gold_as_default=no
# Check whether --enable-gold was given.
if test ${enable_gold+set} = set; then :
enableval=$enable_gold; case ${enableval} in
@@ -21540,14 +21541,11 @@ if test ${enable_gold+set} = set; then
fi
;;
no)
- install_gold_as_default=no
;;
*)
as_fn_error invalid --enable-gold argument $LINENO 5
;;
esac
-else
- install_gold_as_default=no
fi
Index: configure.ac
===
--- configure.ac(revision 214167)
+++ configure.ac(working copy)
@@ -2082,6 +2082,7 @@ AC_ARG_ENABLE(ld,
;;
esac])
+install_gold_as_default=no
AC_ARG_ENABLE(gold,
[[ --enable-gold[=ARG] build gold [ARG={default,yes,no}]]],
[case ${enableval} in
@@ -2094,13 +2095,11 @@ AC_ARG_ENABLE(gold,
fi
;;
no)
- install_gold_as_default=no
;;
*)
AC_MSG_ERROR([invalid --enable-gold argument])
;;
- esac],
-[install_gold_as_default=no])
+ esac])
# Identify the linker which will work hand-in-glove with the newly
# built GCC, so that we can examine its features. This is the linker
Re: [PATCH, i386]: Fix PR62011, False data dependency in popcnt instruction
On Mon, Aug 18, 2014 at 12:29 PM, Uros Bizjak ubiz...@gmail.com wrote:
On Mon, Aug 18, 2014 at 9:16 PM, H.J. Lu hjl.to...@gmail.com wrote:
Attached patch fixes the problem with false data dependency on output
register for popcnt, lzcnt and tzcnt insns on sandybridge and haswell
targets.
The new insn pattern shadows existing one, and after reload, the
clearing isns is split out of the insn. This way the clearing insn can
be scheduled by postreload scheduler. The new pattern takes care to
avoid live registers, so the compiler is always able to clear output
reg.
The testcase from the PR, compiled with -O3 -march=corei7 improves on
Ivybridge from:
unsigned209717363.21002 sec 16.3329 GB/s
uint64_t209717364.06517 sec 12.8971 GB/s
to (-O3 -march=corei7 -mtune-ctrl=avoid_false_dep_for_bmi):
unsigned209717363.14541 sec 16.6683 GB/s
uint64_t209717362.3663 sec 22.1564 GB/s
Due to high impact, the new tune flag is enabled by default for Intel
tunes and generic:
m_SANDYBRIDGE | m_HASWELL | m_INTEL | m_GENERIC
2014-08-16 Uros Bizjak ubiz...@gmail.com
PR target/62011
* config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
New tune flag.
* config/i386/i386.h (TARGET_AVOID_FALSE_DEP_FOR_BMI): New define.
* config/i386/i386.md (unspec) UNSPEC_INSN_FALSE_DEP: New unspec.
(ffsmode2): Do not expand with tzcnt for
TARGET_AVOID_FALSE_DEP_FOR_BMI.
(ffssi2_no_cmove): Ditto.
(*tzcntmode_1): Disable for TARGET_AVOID_FALSE_DEP_FOR_BMI.
(ctzmode2): New expander.
(*ctzmode2_falsedep_1): New insn_and_split pattern.
(*ctzmode2_falsedep): New insn.
(*ctzmode2): Rename from ctzmode2.
(clzmode2_lzcnt): New expander.
(*clzmode2_lzcnt_falsedep_1): New insn_and_split pattern.
(*clzmode2_lzcnt_falsedep): New insn.
(*clzmode2): Rename from ctzmode2.
(popcountmode2): New expander.
(*popcountmode2_falsedep_1): New insn_and_split pattern.
(*popcountmode2_falsedep): New insn.
(*popcountmode2): Rename from ctzmode2.
(*popcountmode2_cmp): Remove.
(*popcountsi2_cmp_zext): Ditto.
The patch was bootstrapped and regression tested on
x86_64-pc-linux-gnu {,-m32} and will be committed to mainline SVN
after a couple of days. The patch will be also backported to 4.9
branch.
Uros.
False dependency happens when destination is only updated by tcnt,
lzcnt or popcnt. There is no false dependency when destination is
also used in source. This patch avoids xor when destination is used
That fact is a (good) news to me.
in source. The difference is
@@ -91,15 +91,12 @@ main:
.p2align 3
.L23:
leal 1(%rdx), %ecx
- xorl %r9d, %r9d
- xorl %r10d, %r10d
- popcntq (%rbx,%rax,8), %r10
- popcntq (%rbx,%rcx,8), %r9
+ popcntq (%rbx,%rax,8), %rax
leal 2(%rdx), %r8d
- movq %r9, %rcx
+ popcntq (%rbx,%rcx,8), %rcx
+ addq %rax, %rcx
xorl %eax, %eax
leal 3(%rdx), %esi
- addq %r10, %rcx
popcntq (%rbx,%r8,8), %rax
addq %rax, %rcx
xorl %eax, %eax
and I got
unsigned 4195936 0.456816 sec 22.954 GB/s
uint64_t 4195936 0.408019 sec 25.6992 GB/s
vs
unsigned 4195936 0.531386 sec 19.7328 GB/s
uint64_t 4195936 0.408081 sec 25.6953 GB/s
on Haswell. OK for trunk?
2014-08-18 H.J. Lu hongjiu...@intel.com
* config/i386/i386.md (*ctzmode2_falsedep_1): Don't clear
destination if it is used in source.
(*clzmode2_lzcnt_falsedep_1): Likewise.
(*popcountmode2_falsedep_1): Likewise.
OK with a small nit below, if bootstrapped and regression tested
properly (you didn't state that).
+; False dependency happens when destination is only updated by tcnt,
tzcnt
+; lzcnt or popcnt. There is no false dependency when destination is
There is no regression on Haswell. This is what I checked in.
Thanks.
--
H.J.
2014-08-18 H.J. Lu hongjiu...@intel.com
* config/i386/i386.md (*ctzmode2_falsedep_1): Don't clear
destination if it is used in source.
(*clzmode2_lzcnt_falsedep_1): Likewise.
(*popcountmode2_falsedep_1): Likewise.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 4749b74..8e74eab 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -12269,8 +12269,11 @@
(match_operand:SWI248 1 nonimmediate_operand)))
(clobber (reg:CC FLAGS_REG))])])
+; False dependency happens when destination is only updated by tzcnt,
+; lzcnt or popcnt. There is no false dependency when destination is
+; also used in source.
(define_insn_and_split *ctzmode2_falsedep_1
- [(set (match_operand:SWI48 0 register_operand =r)
+ [(set (match_operand:SWI48 0 register_operand =r)
(ctz:SWI48
(match_operand:SWI48 1 nonimmediate_operand rm)))
(clobber (reg:CC FLAGS_REG))]
@@ -12283,7 +12286,10 @@
(ctz:SWI48 (match_dup 1)))
(unspec [(match_dup 0)] UNSPEC_INSN_FALSE_DEP)
(clobber (reg:CC FLAGS_REG))])]
- ix86_expand_clear (operands[0]);)
Re: [PATCH][AArch64][tests]Skip graphite tests that don't fit -mcmodel=tiny
On Aug 19, 2014, at 6:12 AM, Kyrill Tkachov kyrylo.tkac...@arm.com wrote: So how about this? Ok. Thanks.
Re: [PATCH 016/236] BND_TO scaffolding
On Tue, 2014-08-12 at 15:22 -0600, Jeff Law wrote:
On 08/06/14 11:19, David Malcolm wrote:
gcc/
* sel-sched-ir.h (BND_TO): insn_t will eventually be an
rtx_insn *. To help with transition, for now, convert from an
access macro into a pair of functions: BND_TO, returning an
rtx_insn *, and...
(SET_BND_TO): New function, for use where BND_TO is used as an
lvalue.
* sel-sched-ir.c (blist_add): Update lvalue usage of BND_TO to
SET_BND_TO.
(BND_TO): New function, adding a checked cast.
(SET_BND_TO): New function.
* sel-sched.c (move_cond_jump): Update lvalue usage of BND_TO to
SET_BND_TO.
(compute_av_set_on_boundaries): Likewise.
/
* rtx-classes-status.txt: Add SET_BND_TO
OK.
Thanks.
Fixed up the as_a_nullable to safe_as_a, and committed to trunk as
r214170, having verified bootstrapregrtest on x86_64-unknown-linux-gnu
(Fedora 20) albeit in combination with patches 9-29 [1], and verified
that it builds standalone with 9 targets.
Am attaching what I committed.
FWIW these functions become a macro again in patch #173.
Dave
[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html
Index: ChangeLog
===
--- ChangeLog (revision 214169)
+++ ChangeLog (revision 214170)
@@ -1,5 +1,9 @@
2014-08-19 David Malcolm dmalc...@redhat.com
+ * rtx-classes-status.txt (TODO): Add SET_BND_TO
+
+2014-08-19 David Malcolm dmalc...@redhat.com
+
* rtx-classes-status.txt (TODO): Add SET_BB_NOTE_LIST.
2014-08-19 David Malcolm dmalc...@redhat.com
Index: rtx-classes-status.txt
===
--- rtx-classes-status.txt (revision 214169)
+++ rtx-classes-status.txt (revision 214170)
@@ -17,6 +17,7 @@
* DF_REF_INSN
* SET_BB_HEAD, SET_BB_END, SET_BB_HEADER, SET_BB_FOOTER
* SET_BB_NOTE_LIST
+* SET_BND_TO
* SET_DEP_PRO, SET_DEP_CON
* SET_NEXT_INSN, SET_PREV_INSN
* SET_VINSN_INSN_RTX
Index: gcc/ChangeLog
===
--- gcc/ChangeLog (revision 214169)
+++ gcc/ChangeLog (revision 214170)
@@ -1,3 +1,21 @@
+2014-08-19 David Malcolm dmalc...@redhat.com
+
+ * sel-sched-ir.h (BND_TO): insn_t will eventually be an
+ rtx_insn *. To help with transition, for now, convert from an
+ access macro into a pair of functions: BND_TO, returning an
+ rtx_insn *, and...
+ (SET_BND_TO): New function, for use where BND_TO is used as an
+ lvalue.
+
+ * sel-sched-ir.c (blist_add): Update lvalue usage of BND_TO to
+ SET_BND_TO.
+ (BND_TO): New function, adding a checked cast.
+ (SET_BND_TO): New function.
+
+ * sel-sched.c (move_cond_jump): Update lvalue usage of BND_TO to
+ SET_BND_TO.
+ (compute_av_set_on_boundaries): Likewise.
+
2014-08-19 H.J. Lu hongjiu...@intel.com
* config/i386/i386.md (*ctzmode2_falsedep_1): Don't clear
Index: gcc/sel-sched.c
===
--- gcc/sel-sched.c (revision 214169)
+++ gcc/sel-sched.c (revision 214170)
@@ -4954,7 +4954,7 @@
/* Jump is moved to the boundary. */
next = PREV_INSN (insn);
- BND_TO (bnd) = insn;
+ SET_BND_TO (bnd) = insn;
ft_edge = find_fallthru_edge_from (block_from);
block_next = ft_edge-dest;
@@ -5095,7 +5095,7 @@
{
gcc_assert (FENCE_INSN (fence) == BND_TO (bnd));
FENCE_INSN (fence) = bnd_to;
- BND_TO (bnd) = bnd_to;
+ SET_BND_TO (bnd) = bnd_to;
}
av_set_clear (BND_AV (bnd));
Index: gcc/sel-sched-ir.c
===
--- gcc/sel-sched-ir.c (revision 214169)
+++ gcc/sel-sched-ir.c (revision 214170)
@@ -207,7 +207,7 @@
_list_add (lp);
bnd = BLIST_BND (*lp);
- BND_TO (bnd) = to;
+ SET_BND_TO (bnd) = to;
BND_PTR (bnd) = ptr;
BND_AV (bnd) = NULL;
BND_AV1 (bnd) = NULL;
@@ -6463,4 +6463,14 @@
return SEL_REGION_BB_INFO (bb)-note_list;
}
+rtx_insn *BND_TO (bnd_t bnd)
+{
+ return safe_as_a rtx_insn * (bnd-to);
+}
+
+insn_t SET_BND_TO (bnd_t bnd)
+{
+ return bnd-to;
+}
+
#endif
Index: gcc/sel-sched-ir.h
===
--- gcc/sel-sched-ir.h (revision 214169)
+++ gcc/sel-sched-ir.h (revision 214170)
@@ -233,7 +233,8 @@
deps_t dc;
};
typedef struct _bnd *bnd_t;
-#define BND_TO(B) ((B)-to)
+extern rtx_insn *BND_TO (bnd_t bnd);
+extern insn_t SET_BND_TO (bnd_t bnd);
/* PTR stands not for pointer as you might think, but as a Path To Root of the
current instruction group from boundary B. */
Re: [PATCH][AArch64] Use CC_Z and CC_NZ with csinc and similar instructions
On 19/08/14 17:09, Richard Henderson wrote:
(define_special_predicate cc_register_zero
(match_code reg)
{
return (REGNO (op) == CC_REGNUM
(GET_MODE (op) == CCmode
|| GET_MODE (op) == CC_Zmode
|| GET_MODE (op) == CC_NZmode));
})
... and now that I read the backend more closely, I see _zero was a bad name.
But more importantly, I see no connection between the comparison used and the
CCmode being accepted. And if we fix that, why are you restricting to just Z
and NZ? What's wrong with e.g. CFPmode?
In the i386 backend, we check comparison+mode correspondence like
(match_operator 4 ix86_carry_flag_operator
[(match_operand 3 flags_reg_operand) (const_int 0)])
I think you'll want something similar. In the case of CSINC, we can accept all
conditions, so let's start with the most general:
(match_operator:GPI 2 aarch64_comparison_operation
[(reg CC_REGNUM) (const_int 0)]
or even
(match_operand:GPI 2 aarch64_comparison_operation )
with
(define_predicate aarch64_comparison_operation
(match_code eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,
unordered,ordered,unlt,unle,unge,ungt)
{
if (XEXP (op, 1) != const0_rtx)
return false;
rtx op0 = XEXP (op, 0);
if (!REG_P (op0) || REGNO (op0) != CC_REGNUM)
return false;
return aarch64_get_condition_code (op) = 0;
})
where aarch64_get_condition_code is
(1) exported
(2) adjusted to return int not unsigned
(3) adjusted to not abort, but return -1 for invalid combinations.
and the two existing users of aarch64_get_condition_code are adjusted to
gcc_assert that the return value is valid.
Hmm, when I do that combine refuses to match the csinc patterns:
Failed to match this instruction:
(set (reg:SI 73 [ D.2564 ])
(if_then_else:SI (ne (reg:CC 66 cc)
(const_int 0 [0]))
(plus:SI (reg:SI 74 [ D.2565 ])
(const_int 1 [0x1]))
(const_int 0 [0])))
I probably mistyped something, I'll look into it...
Thanks for the help,
Kyrill
r~
Re: [C/C++ PATCH] Implement -Wbool-compare (PR c++/62153)
On Mon, Aug 18, 2014 at 10:23:49PM +0200, Marek Polacek wrote:
On Mon, Aug 18, 2014 at 04:10:49PM -0400, Jason Merrill wrote:
On 08/18/2014 04:04 PM, Marek Polacek wrote:
Unfortunately, this warning cannot be enabled by -Wall yet, because
of a few blunders we have in the codebase. But we really should iron out
that soon.
Can you take care of that as well?
Yea - I actually meant to do that, but then I saw this weirdo code in
optabs.c and got cold feet.
The patch looks good to me, but if it should be part of -Wall I want there
to be a plan beyond someone should fix it. :)
Okay, I'll ping this patch when it's ready for -Wall.
I've fixed a few issues that -Wbool-compare found, so it can be
enabled by -Wall now. This patch is pretty much the same as the
last version except that
a) the warning is enabled by -Wall,
b) maybe_warn_bool_compare was slightly revamped as per Manuel's
suggestion (the semantics is the same).
Bootstrapped/regtested on x86_64-linux, ok for trunk?
2014-08-19 Marek Polacek pola...@redhat.com
PR c++/62153
* doc/invoke.texi: Document -Wbool-compare.
c-family/
* c-common.c (maybe_warn_bool_compare): New function.
* c-common.h (maybe_warn_bool_compare): Declare.
* c.opt (Wbool-compare): New option.
c/
* c-typeck.c (build_binary_op): If either operand of a comparison
is a boolean expression, call maybe_warn_bool_compare.
cp/
* call.c (build_new_op_1): Remember the type of arguments for
a comparison. If either operand of a comparison is a boolean
expression, call maybe_warn_bool_compare.
testsuite/
* c-c++-common/Wbool-compare-1.c: New test.
diff --git gcc/c-family/c-common.c gcc/c-family/c-common.c
index acc9a20..c69ab3e 100644
--- gcc/c-family/c-common.c
+++ gcc/c-family/c-common.c
@@ -11612,6 +11612,39 @@ maybe_warn_unused_local_typedefs (void)
vec_free (l-local_typedefs);
}
+/* Warn about boolean expression compared with an integer value different
+ from true/false. Warns also e.g. about (i1 == i2) == 2.
+ LOC is the location of the comparison, CODE is its code, OP0 and OP1
+ are the operands of the comparison. The caller must ensure that
+ either operand is a boolean expression. */
+
+void
+maybe_warn_bool_compare (location_t loc, enum tree_code code, tree op0,
+tree op1)
+{
+ if (TREE_CODE_CLASS (code) != tcc_comparison)
+return;
+
+ tree cst = TREE_CODE (op0) == INTEGER_CST
+? op0 : TREE_CODE (op1) == INTEGER_CST ? op1 : NULL_TREE;
+ if (!cst)
+return;
+
+ if (!integer_zerop (cst) !integer_onep (cst))
+{
+ int sign = TREE_CODE (op0) == INTEGER_CST
+? tree_int_cst_sgn (cst) : -tree_int_cst_sgn (cst);
+ if (code == EQ_EXPR
+ || ((code == GT_EXPR || code == GE_EXPR) sign 0)
+ || ((code == LT_EXPR || code == LE_EXPR) sign 0))
+ warning_at (loc, OPT_Wbool_compare, comparison of constant %qE
+ with boolean expression is always false, cst);
+ else
+ warning_at (loc, OPT_Wbool_compare, comparison of constant %qE
+ with boolean expression is always true, cst);
+}
+}
+
/* The C and C++ parsers both use vectors to hold function arguments.
For efficiency, we keep a cache of unused vectors. This is the
cache. */
diff --git gcc/c-family/c-common.h gcc/c-family/c-common.h
index 26aaee2..995bc8c 100644
--- gcc/c-family/c-common.h
+++ gcc/c-family/c-common.h
@@ -1015,6 +1015,7 @@ extern void record_types_used_by_current_var_decl (tree);
extern void record_locally_defined_typedef (tree);
extern void maybe_record_typedef_use (tree);
extern void maybe_warn_unused_local_typedefs (void);
+extern void maybe_warn_bool_compare (location_t, enum tree_code, tree, tree);
extern vectree, va_gc *make_tree_vector (void);
extern void release_tree_vector (vectree, va_gc *);
extern vectree, va_gc *make_tree_vector_single (tree);
diff --git gcc/c-family/c.opt gcc/c-family/c.opt
index 4848399..f97a11a 100644
--- gcc/c-family/c.opt
+++ gcc/c-family/c.opt
@@ -287,6 +287,10 @@ Wbad-function-cast
C ObjC Var(warn_bad_function_cast) Warning
Warn about casting functions to incompatible types
+Wbool-compare
+C ObjC C++ ObjC++ Var(warn_bool_compare) Warning LangEnabledBy(C ObjC C++
ObjC++,Wall)
+Warn about boolean expression compared with an integer value different from
true/false
+
Wbuiltin-macro-redefined
C ObjC C++ ObjC++ Warning
Warn when a built-in preprocessor macro is undefined or redefined
diff --git gcc/c/c-typeck.c gcc/c/c-typeck.c
index b1eac34..91c900d 100644
--- gcc/c/c-typeck.c
+++ gcc/c/c-typeck.c
@@ -10676,6 +10676,11 @@ build_binary_op (location_t location, enum tree_code
code,
result_type = type1;
pedwarn (location, 0, comparison between pointer and integer);
}
+ if ((TREE_CODE (TREE_TYPE (orig_op0)) == BOOLEAN_TYPE
+ || truth_value_p (TREE_CODE
Re: [PATCH] PowerPC: Implement TARGET_ATOMIC_ASSIGN_EXPAND_FENV
Ping.
On 06-08-2014 17:21, Adhemerval Zanella wrote:
On 01-08-2014 12:31, Joseph S. Myers wrote:
On Thu, 31 Jul 2014, David Edelsohn wrote:
Thanks for implementing the FENV support. The patch generally looks
good to me.
My one concern is a detail in the implementation of update. I do not
have enough experience with GENERIC to verify the details and it seems
like it is missing building an outer COMPOUND_EXPR containing
update_mffs and the CALL_EXPR for update mtfsf.
I suppose what's actually odd there is that you have
+ tree update_mffs = build2 (MODIFY_EXPR, void_type_node, old_fenv,
call_mffs);
+
+ tree old_llu = build1 (VIEW_CONVERT_EXPR, uint64_type_node, update_mffs);
so you build a MODIFY_EXPR in void_type_node but then convert it with a
VIEW_CONVERT_EXPR. If you'd built the MODIFY_EXPR in double_type_node
then the VIEW_CONVERT_EXPR would be meaningful (the value of an assignment
a = b being the new value of a), but reinterpreting a void value doesn't
make sense. Or you could probably just use call_mffs directly in the
VIEW_CONVERT_EXPR without explicitly creating the old_fenv variable.
Thanks for the review Josephm. I have changed to avoid the void
reinterpretation
and use call_mffs directly. I have also removed the the mask generation in
'clear'
from your previous message, it is now reusing the mas used in feholdexcept.
The
testcase patch is the same as before.
Checked on both linux-powerpc64/powerpc64le and no regressions found.
--
2014-08-06 Adhemerval Zanella azane...@linux.vnet.ibm.com
gcc:
* config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): New
function.
gcc/testsuite:
* gcc.dg/atomic/c11-atomic-exec-5.c
(test_main_long_double_add_overflow): Define and run only for
LDBL_MANT_DIG != 106.
(test_main_complex_long_double_add_overflow): Likewise.
(test_main_long_double_sub_overflow): Likewise.
(test_main_complex_long_double_sub_overflow): Likewise.
---
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index d088ff6..7d66eb1 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1631,6 +1631,9 @@ static const struct attribute_spec
rs6000_attribute_table[] =
#undef TARGET_CAN_USE_DOLOOP_P
#define TARGET_CAN_USE_DOLOOP_P can_use_doloop_if_innermost
+
+#undef TARGET_ATOMIC_ASSIGN_EXPAND_FENV
+#define TARGET_ATOMIC_ASSIGN_EXPAND_FENV rs6000_atomic_assign_expand_fenv
/* Processor table. */
@@ -7,6 +33340,80 @@ emit_fusion_gpr_load (rtx *operands)
return ;
}
+/* Implement TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook. */
+
+static void
+rs6000_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
+{
+ if (!TARGET_HARD_FLOAT || !TARGET_FPRS)
+return;
+
+ tree mffs = rs6000_builtin_decls[RS6000_BUILTIN_MFFS];
+ tree mtfsf = rs6000_builtin_decls[RS6000_BUILTIN_MTFSF];
+ tree call_mffs = build_call_expr (mffs, 0);
+
+ /* Generates the equivalent of feholdexcept (fenv_var)
+
+ *fenv_var = __builtin_mffs ();
+ double fenv_hold;
+ *(uint64_t*)fenv_hold = *(uint64_t*)fenv_var 0x0007LL;
+ __builtin_mtfsf (0xff, fenv_hold); */
+
+ /* Mask to clear everything except for the rounding modes and non-IEEE
+ arithmetic flag. */
+ const unsigned HOST_WIDE_INT hold_exception_mask =
+HOST_WIDE_INT_UC (0x0007);
+
+ tree fenv_var = create_tmp_var (double_type_node, NULL);
+
+ tree hold_mffs = build2 (MODIFY_EXPR, void_type_node, fenv_var, call_mffs);
+
+ tree fenv_llu = build1 (VIEW_CONVERT_EXPR, uint64_type_node, fenv_var);
+ tree fenv_llu_and = build2 (BIT_AND_EXPR, uint64_type_node, fenv_llu,
+build_int_cst (uint64_type_node, hold_exception_mask));
+
+ tree fenv_mtfsf = build1 (VIEW_CONVERT_EXPR, double_type_node,
fenv_llu_and);
+
+ tree hold_mtfsf = build_call_expr (mtfsf, 2,
+build_int_cst (unsigned_type_node, 0xff), fenv_mtfsf);
+
+ *hold = build2 (COMPOUND_EXPR, void_type_node, hold_mffs, hold_mtfsf);
+
+ /* Reload the value of fenv_hold to clear the exceptions. */
+
+ *clear = build_call_expr (mtfsf, 2,
+build_int_cst (unsigned_type_node, 0xff), fenv_mtfsf);
+
+ /* Generates the equivalent of feupdateenv (fenv_var)
+
+ double old_fenv = __builtin_mffs ();
+ double fenv_update;
+ *(uint64_t*)fenv_update = (*(uint64_t*)old 0x1f00LL) |
+(*(uint64_t*)fenv_var 0x1ff80fff);
+ __builtin_mtfsf (0xff, fenv_update); */
+
+ const unsigned HOST_WIDE_INT update_exception_mask =
+HOST_WIDE_INT_UC (0x1f00);
+ const unsigned HOST_WIDE_INT new_exception_mask =
+HOST_WIDE_INT_UC (0x1ff80fff);
+
+ tree old_llu = build1 (VIEW_CONVERT_EXPR, uint64_type_node, call_mffs);
+ tree old_llu_and = build2 (BIT_AND_EXPR, uint64_type_node,
+old_llu, build_int_cst (uint64_type_node, update_exception_mask));
Re: [PATCH 017/236] Add subclasses for the various kinds of instruction
On Tue, 2014-08-12 at 21:07 -0600, Jeff Law wrote: On 08/06/14 11:19, David Malcolm wrote: gcc/ * coretypes.h (class rtx_real_insn): Add forward declaration. (class rtx_debug_insn): Likewise. (class rtx_nonjump_insn): Likewise. (class rtx_jump_insn): Likewise. (class rtx_call_insn): Likewise. (class rtx_jump_table_data): Likewise. (class rtx_barrier): Likewise. (class rtx_code_label): Likewise. (class rtx_note): Likewise. * rtl.h (class rtx_real_insn): New, a subclass of rtx_insn, adding the invariant INSN_P (X). (class rtx_debug_insn): New, a subclass of rtx_real_insn, adding the invariant DEBUG_INSN_P (X). (class rtx_nonjump_insn): New, a subclass of rtx_real_insn, adding the invariant NONJUMP_INSN_P (X). (class rtx_jump_insn): New, a subclass of rtx_real_insn, adding the invariant JUMP_P (X). (class rtx_call_insn): New, a subclass of rtx_real_insn, adding the invariant CALL_P (X). (class rtx_jump_table): New, a subclass of rtx_insn, adding the invariant JUMP_TABLE_DATA_P (X). (class rtx_barrier): New, a subclass of rtx_insn, adding the invariant BARRIER_P (X). (class rtx_code_label): New, a subclass of rtx_real_insn, adding the invariant LABEL_P (X). (class rtx_note): New, a subclass of rtx_real_insn, adding the invariant NOTE_P(X). (is_a_helper rtx_real_insn *::test): New. (is_a_helper rtx_debug_insn *::test): New. (is_a_helper rtx_nonjump_insn *::test): New. (is_a_helper rtx_jump_insn *::test): New. (is_a_helper rtx_call_insn *::test): New. (is_a_helper rtx_jump_table_data *::test): New functions, overloaded for both rtx and rtx_insn *. (is_a_helper rtx_barrier *::test): New. (is_a_helper rtx_code_label *::test): New functions, overloaded for both rtx and rtx_insn *. (is_a_helper rtx_note *::test): New. Sounds like the direction we're going right now is to drop rtx_real_insn and squish one level of inheritance out. OK with the obvious changes around that. I probably won't call out any rtx_real_insn stuff for future patches as I'll assume you will take care of that as you do your bootstrap builds prior to installation. Thanks. Removed class rtx_real_insn, and committed to trunk as r214172, having verified bootstrapregrtest on x86_64-unknown-linux-gnu (Fedora 20) albeit in combination with patches 9-29 [1], and verified that it builds standalone with 9 targets. Am attaching what I committed. Dave [1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html Index: gcc/ChangeLog === --- gcc/ChangeLog (revision 214171) +++ gcc/ChangeLog (revision 214172) @@ -1,3 +1,41 @@ +2014-08-19 David Malcolm dmalc...@redhat.com + + * coretypes.h (class rtx_debug_insn): Add forward declaration. + (class rtx_nonjump_insn): Likewise. + (class rtx_jump_insn): Likewise. + (class rtx_call_insn): Likewise. + (class rtx_jump_table_data): Likewise. + (class rtx_barrier): Likewise. + (class rtx_code_label): Likewise. + (class rtx_note): Likewise. + + * rtl.h (class rtx_debug_insn): New, a subclass of rtx_insn, + adding the invariant DEBUG_INSN_P (X). + (class rtx_nonjump_insn): New, a subclass of rtx_insn, adding + the invariant NONJUMP_INSN_P (X). + (class rtx_jump_insn): New, a subclass of rtx_insn, adding + the invariant JUMP_P (X). + (class rtx_call_insn): New, a subclass of rtx_insn, adding + the invariant CALL_P (X). + (class rtx_jump_table): New, a subclass of rtx_insn, adding the + invariant JUMP_TABLE_DATA_P (X). + (class rtx_barrier): New, a subclass of rtx_insn, adding the + invariant BARRIER_P (X). + (class rtx_code_label): New, a subclass of rtx_insn, adding + the invariant LABEL_P (X). + (class rtx_note): New, a subclass of rtx_insn, adding + the invariant NOTE_P(X). + (is_a_helper rtx_debug_insn *::test): New. + (is_a_helper rtx_nonjump_insn *::test): New. + (is_a_helper rtx_jump_insn *::test): New. + (is_a_helper rtx_call_insn *::test): New. + (is_a_helper rtx_jump_table_data *::test): New functions, + overloaded for both rtx and rtx_insn *. + (is_a_helper rtx_barrier *::test): New. + (is_a_helper rtx_code_label *::test): New functions, overloaded + for both rtx and rtx_insn *. + (is_a_helper rtx_note *::test): New. + 2014-08-19 Marek Polacek pola...@redhat.com * config/alpha/alpha.h (CLZ_DEFINED_VALUE_AT_ZERO, Index: gcc/coretypes.h === --- gcc/coretypes.h (revision 214171) +++ gcc/coretypes.h (revision 214172) @@ -57,10 +57,18 @@ typedef const struct rtx_def *const_rtx; /* Subclasses of rtx_def, using indentation to show the class - hierarchy. + hierarchy, along with the relevant invariant. Where possible, keep this list in the same order as in rtl.def. */ class rtx_def; class rtx_insn; +class
[PATCH AArch64] Add a builtin for rbit(q?)_p8; add intrinsics and tests.
This patch adds the missing vrbit_p8 and vrbitq_p8 intrinsics to arm_neon.h, and
implements all the vrbit(q?)_[psu]8 intrinsics using a new builtin, rather than
the previous temporary asm. Also adds a testcase checking (a) execution results
and (b) that we output rbit vXX.8b,vYY.8b or corresponding with .16b.
Tested on aarch64-none-elf and aarch64_be-none-elf.
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md (aarch64_rbitmode): New pattern.
* config/aarch64/aarch64-simd-builtins.def (rbit): New builtin.
* config/aarch64/arm_neon.h (vrbit_s8, vrbit_u8, vrbitq_s8, vrbitq_u8):
Replace temporary asm with call to builtin.
(vrbit_p8, vrbitq_p8): New functions.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/simd/vrbit_1.c: New test.
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def
index 268432cc117b7027ee9472fc5a4f9b1ea13bea0f..3b985b3176ff8bc50bd60105e8a2b1a983d54982 100644
--- a/gcc/config/aarch64/aarch64-simd-builtins.def
+++ b/gcc/config/aarch64/aarch64-simd-builtins.def
@@ -347,6 +347,8 @@
VAR5 (UNOPU, bswap, 10, v4hi, v8hi, v2si, v4si, v2di)
+ BUILTIN_VB (UNOP, rbit, 0)
+
/* Implemented by
aarch64_PERMUTE:perm_insnPERMUTE:perm_hilomode. */
BUILTIN_VALL (BINOP, zip1, 0)
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 1c32f0c4efa0e9b8e8bc06af726798f6aaecf39f..9997cdf8fd0269a0447edd8ce30515730d73d301 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -294,6 +294,15 @@
[(set_attr type neon_revq)]
)
+(define_insn aarch64_rbitmode
+ [(set (match_operand:VB 0 register_operand =w)
+ (unspec:VB [(match_operand:VB 1 register_operand w)]
+ UNSPEC_RBIT))]
+ TARGET_SIMD
+ rbit\\t%0.Vbtype, %1.Vbtype
+ [(set_attr type neon_rbit)]
+)
+
(define_insn *aarch64_mul3_eltmode
[(set (match_operand:VMUL 0 register_operand =w)
(mult:VMUL
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index d5d8c23acd75b6f2a4e8cd6cc4daca418372f883..626f418f1e6e49d4969119f43fd620d78b2c055a 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -10477,50 +10477,6 @@ vqrdmulhq_n_s32 (int32x4_t a, int32_t b)
result; \
})
-__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
-vrbit_s8 (int8x8_t a)
-{
- int8x8_t result;
- __asm__ (rbit %0.8b,%1.8b
- : =w(result)
- : w(a)
- : /* No clobbers */);
- return result;
-}
-
-__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
-vrbit_u8 (uint8x8_t a)
-{
- uint8x8_t result;
- __asm__ (rbit %0.8b,%1.8b
- : =w(result)
- : w(a)
- : /* No clobbers */);
- return result;
-}
-
-__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
-vrbitq_s8 (int8x16_t a)
-{
- int8x16_t result;
- __asm__ (rbit %0.16b,%1.16b
- : =w(result)
- : w(a)
- : /* No clobbers */);
- return result;
-}
-
-__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
-vrbitq_u8 (uint8x16_t a)
-{
- uint8x16_t result;
- __asm__ (rbit %0.16b,%1.16b
- : =w(result)
- : w(a)
- : /* No clobbers */);
- return result;
-}
-
__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
vrecpe_u32 (uint32x2_t a)
{
@@ -20632,6 +20588,44 @@ vqsubd_u64 (uint64_t __a, uint64_t __b)
return __builtin_aarch64_uqsubdi_uuu (__a, __b);
}
+/* vrbit */
+
+__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+vrbit_p8 (poly8x8_t __a)
+{
+ return (poly8x8_t) __builtin_aarch64_rbitv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline int8x8_t __attribute__ ((__always_inline__))
+vrbit_s8 (int8x8_t __a)
+{
+ return __builtin_aarch64_rbitv8qi (__a);
+}
+
+__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+vrbit_u8 (uint8x8_t __a)
+{
+ return (uint8x8_t) __builtin_aarch64_rbitv8qi ((int8x8_t) __a);
+}
+
+__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__))
+vrbitq_p8 (poly8x16_t __a)
+{
+ return (poly8x16_t) __builtin_aarch64_rbitv16qi ((int8x16_t)__a);
+}
+
+__extension__ static __inline int8x16_t __attribute__ ((__always_inline__))
+vrbitq_s8 (int8x16_t __a)
+{
+ return __builtin_aarch64_rbitv16qi (__a);
+}
+
+__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
+vrbitq_u8 (uint8x16_t __a)
+{
+ return (uint8x16_t) __builtin_aarch64_rbitv16qi ((int8x16_t) __a);
+}
+
/* vrecpe */
__extension__ static __inline float32_t __attribute__ ((__always_inline__))
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vrbit_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vrbit_1.c
new file mode 100644
index
[PATCH] Fix bootstrap on ppc64
My recent patch broke bootstrap on ppc64, because, by default,
char on ppc defaults to be an unsigned char. But the code relied
on char being signed by default.
Furthermore, the compat warning about // comments shouldn't be issued
in C++ mode at all.
Sorry about that.
Bootstrapped on ppc64-linux, ok for trunk?
2014-08-19 Marek Polacek pola...@redhat.com
* include/cpplib.h (cpp_options): Use signed char.
* lex.c (_cpp_lex_direct): Don't warn in C++ mode.
diff --git gcc/include/cpplib.h gcc/include/cpplib.h
index b89ba20..9f87ff8 100644
--- gcc/include/cpplib.h
+++ gcc/include/cpplib.h
@@ -467,7 +467,7 @@ struct cpp_options
bool restore_pch_deps;
/* True if warn about differences between C90 and C99. */
- char cpp_warn_c90_c99_compat;
+ signed char cpp_warn_c90_c99_compat;
/* Dependency generation. */
struct
diff --git gcc/lex.c gcc/lex.c
index 827cfb0..5366dad 100644
--- gcc/lex.c
+++ gcc/lex.c
@@ -2338,6 +2338,7 @@ _cpp_lex_direct (cpp_reader *pfile)
}
/* Or if specifically desired via -Wc90-c99-compat. */
else if (CPP_OPTION (pfile, cpp_warn_c90_c99_compat) 0
+ ! CPP_OPTION (pfile, cplusplus)
! buffer-warned_cplusplus_comments)
{
cpp_error (pfile, CPP_DL_WARNING,
Marek
Re: C++ PATCH to set DECL_COMDAT on undefined inlines/templates
Another needed tweak, applying to trunk.
commit aac24a75af315fb6aa6099a159c6bce339706bc1
Author: Jason Merrill ja...@redhat.com
Date: Mon Aug 18 21:34:12 2014 -0400
PR lto/53808
PR c++/61659
* decl.c (maybe_commonize_var): Don't use DECL_COMDAT to trigger
comdat_linkage.
diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c
index 92a6dbc..cc54cca 100644
--- a/gcc/cp/decl.c
+++ b/gcc/cp/decl.c
@@ -5099,10 +5099,6 @@ maybe_commonize_var (tree decl)
}
}
}
- else if (DECL_LANG_SPECIFIC (decl) DECL_COMDAT (decl))
-/* Set it up again; we might have set DECL_INITIAL since the last
- time. */
-comdat_linkage (decl);
}
/* Issue an error message if DECL is an uninitialized const variable. */
diff --git a/gcc/testsuite/g++.dg/abi/spec1.C b/gcc/testsuite/g++.dg/abi/spec1.C
new file mode 100644
index 000..153c0cf
--- /dev/null
+++ b/gcc/testsuite/g++.dg/abi/spec1.C
@@ -0,0 +1,4 @@
+// { dg-final { scan-assembler-not weak } }
+
+template class T struct A { static int i; };
+template int Aint::i = 42;
[c++-concepts] normalization checks
This patch adds checks for user-defined logical operators during
constraint normalization and ensures that all atomics can be converted
to bool.
2014-08-14 Andrew Sutton andrew.n.sut...@gmail.com
Implement normalization checks.
* gcc/cp/constraint.cc (normalize_expr): Delegate cast and
atomic nodes to a dedicated function.
(check_logical): Check that an or || does not resolve to a
user-defined function.
(normalize_logical): Check operators and save the locaiton of
the new expression.
(normalize_call, normalize_var): Remove spurios error messages.
(normalize_cast): New, delegates to normalize atom.
(normalize_atom): Check that instantiated expressions can be
converted to bool
(tsubst_constraint_info): Re-normalize the associated constraints
to check for post-substitution restrictions.
* gcc/cp/cp-tree.h (xvalue_result_type): Add to header.
Andrew Sutton
Index: gcc/cp/constraint.cc
===
--- gcc/cp/constraint.cc (revision 213924)
+++ gcc/cp/constraint.cc (working copy)
@@ -264,6 +264,8 @@ tree normalize_nested_req (tree);
tree normalize_var (tree);
tree normalize_template_id (tree);
tree normalize_stmt_list (tree);
+tree normalize_cast (tree);
+tree normalize_atom (tree);
// Reduce the requirement T into a logical formula written in terms of
// atomic propositions.
@@ -328,7 +330,7 @@ normalize_expr (tree t)
return normalize_template_id (t);
case CAST_EXPR:
- return normalize_node (TREE_VALUE (TREE_OPERAND (t, 0)));
+ return normalize_cast (t);
case BIND_EXPR:
return normalize_node (BIND_EXPR_BODY (t));
@@ -339,7 +341,7 @@ normalize_expr (tree t)
// Everything else is atomic.
default:
- return t;
+ return normalize_atom (t);
}
}
@@ -402,6 +404,34 @@ normalize_misc (tree t)
return NULL_TREE;
}
+// Check that the logical expression is not a user-defined operator.
+bool
+check_logical (tree t)
+{
+ // We can't do much for type dependent expressions.
+ if (type_dependent_expression_p (t) || value_dependent_expression_p (t))
+return true;
+
+ // Resolve the logical operator. Note that template processing is
+ // disabled so we get the actual call or target expression back.
+ // not_processing_template_sentinel sentinel;
+ tree arg1 = TREE_OPERAND (t, 0);
+ tree arg2 = TREE_OPERAND (t, 1);
+
+ tree ovl = NULL_TREE;
+ tree expr = build_new_op (input_location, TREE_CODE (t), LOOKUP_NORMAL,
+arg1, arg2, /*arg3*/NULL_TREE,
+ovl, tf_none);
+ if (TREE_CODE (expr) != TREE_CODE (t))
+{
+ error (user-defined operator %qs in constraint %qE,
+ operator_name_info[TREE_CODE (t)].name, t);
+ ;
+ return false;
+}
+ return true;
+}
+
// Reduction rules for the binary logical expression T ( and ||).
//
// Generate a new expression from the reduced operands. If either operand
@@ -409,14 +439,18 @@ normalize_misc (tree t)
tree
normalize_logical (tree t)
{
+ if (!check_logical (t))
+return NULL_TREE;
+
tree l = normalize_expr (TREE_OPERAND (t, 0));
tree r = normalize_expr (TREE_OPERAND (t, 1));
if (l r)
{
- t = copy_node (t);
- TREE_OPERAND (t, 0) = l;
- TREE_OPERAND (t, 1) = r;
- return t;
+ tree result = copy_node (t);
+ SET_EXPR_LOCATION (result, EXPR_LOCATION (t));
+ TREE_OPERAND (result, 0) = l;
+ TREE_OPERAND (result, 1) = r;
+ return result;
}
else
return NULL_TREE;
@@ -440,18 +474,13 @@ normalize_call (tree t)
// Reduce the body of the function into the constriants language.
tree body = normalize_constraints (DECL_SAVED_TREE (fn));
if (!body)
-{
- error (could not inline requirements from %qD, fn);
- return error_mark_node;
-}
+return error_mark_node;
// Instantiate the reduced results using the deduced args.
tree result = tsubst_constraint_expr (body, args, false);
if (result == error_mark_node)
-{
- error (could not instantiate requirements from %qD, fn);
- return error_mark_node;
-}
+return error_mark_node;
+
return result;
}
@@ -469,18 +498,12 @@ normalize_var (tree t)
// Reduce the initializer of the variable into the constriants language.
tree body = normalize_constraints (DECL_INITIAL (decl));
if (!body)
- {
- error (could not inline requirements from %qD, decl);
- return error_mark_node;
- }
+return error_mark_node;
// Instantiate the reduced results.
tree result = tsubst_constraint_expr (body, TREE_OPERAND (t, 1), false);
if (result == error_mark_node)
-{
- error (could not instantiate requirements from %qD, decl);
- return error_mark_node;
-}
+return error_mark_node;
return result;
}
@@ -574,6 +597,29 @@ normalize_stmt_list
Re: [PATCH 018/236] Strengthen return types of various {next|prev}_*insn from rtx to rtx_insn *
On Tue, 2014-08-12 at 15:59 -0600, Jeff Law wrote:
On 08/06/14 11:19, David Malcolm wrote:
These should all eventually require an rtx_insn * as an argument,
but we'll save that for a later patch.
gcc/
* rtl.h (previous_insn): Strengthen return type from rtx to
rtx_insn *.
(next_insn): Likewise.
(prev_nonnote_insn): Likewise.
(prev_nonnote_insn_bb): Likewise.
(next_nonnote_insn): Likewise.
(next_nonnote_insn_bb): Likewise.
(prev_nondebug_insn): Likewise.
(next_nondebug_insn): Likewise.
(prev_nonnote_nondebug_insn): Likewise.
(next_nonnote_nondebug_insn): Likewise.
(prev_real_insn): Likewise.
(next_real_insn): Likewise.
(prev_active_insn): Likewise.
(next_active_insn): Likewise.
* emit-rtl.c (next_insn): Strengthen return type from rtx to
rtx_insn *, adding a checked cast.
(previous_insn): Likewise.
(next_nonnote_insn): Likewise.
(next_nonnote_insn_bb): Likewise.
(prev_nonnote_insn): Likewise.
(prev_nonnote_insn_bb): Likewise.
(next_nondebug_insn): Likewise.
(prev_nondebug_insn): Likewise.
(next_nonnote_nondebug_insn): Likewise.
(prev_nonnote_nondebug_insn): Likewise.
(next_real_insn): Likewise.
(prev_real_insn): Likewise.
(next_active_insn): Likewise.
(prev_active_insn): Likewise.
* config/sh/sh-protos.h (sh_find_set_of_reg): Convert function ptr
param stepfunc so that it returns an rtx_insn * rather than an
rtx, to track the change to prev_nonnote_insn_bb, which is the
only function this is called with.
* config/sh/sh.c (sh_find_set_of_reg): Likewise.
OK.
Thanks.
I fixed up the various as_a_nullable to safe_as_a, and committed to
trunk as r214178, having verified bootstrapregrtest on
x86_64-unknown-linux-gnu (Fedora 20) albeit in combination with patches
9-29 [1], and verified that it builds standalone with 10 targets,
including sh-elf.
Am attaching what I committed.
Dave
[1] as per https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01420.html
Index: gcc/ChangeLog
===
--- gcc/ChangeLog (revision 214177)
+++ gcc/ChangeLog (revision 214178)
@@ -1,3 +1,43 @@
+2014-08-19 David Malcolm dmalc...@redhat.com
+
+ * rtl.h (previous_insn): Strengthen return type from rtx to
+ rtx_insn *.
+ (next_insn): Likewise.
+ (prev_nonnote_insn): Likewise.
+ (prev_nonnote_insn_bb): Likewise.
+ (next_nonnote_insn): Likewise.
+ (next_nonnote_insn_bb): Likewise.
+ (prev_nondebug_insn): Likewise.
+ (next_nondebug_insn): Likewise.
+ (prev_nonnote_nondebug_insn): Likewise.
+ (next_nonnote_nondebug_insn): Likewise.
+ (prev_real_insn): Likewise.
+ (next_real_insn): Likewise.
+ (prev_active_insn): Likewise.
+ (next_active_insn): Likewise.
+
+ * emit-rtl.c (next_insn): Strengthen return type from rtx to
+ rtx_insn *, adding a checked cast.
+ (previous_insn): Likewise.
+ (next_nonnote_insn): Likewise.
+ (next_nonnote_insn_bb): Likewise.
+ (prev_nonnote_insn): Likewise.
+ (prev_nonnote_insn_bb): Likewise.
+ (next_nondebug_insn): Likewise.
+ (prev_nondebug_insn): Likewise.
+ (next_nonnote_nondebug_insn): Likewise.
+ (prev_nonnote_nondebug_insn): Likewise.
+ (next_real_insn): Likewise.
+ (prev_real_insn): Likewise.
+ (next_active_insn): Likewise.
+ (prev_active_insn): Likewise.
+
+ * config/sh/sh-protos.h (sh_find_set_of_reg): Convert function ptr
+ param stepfunc so that it returns an rtx_insn * rather than an
+ rtx, to track the change to prev_nonnote_insn_bb, which is the
+ only function this is called with.
+ * config/sh/sh.c (sh_find_set_of_reg): Likewise.
+
2014-08-19 Jan Hubicka hubi...@ucw.cz
* ipa-visibility.c (update_visibility_by_resolution_info): Fix
Index: gcc/emit-rtl.c
===
--- gcc/emit-rtl.c (revision 214177)
+++ gcc/emit-rtl.c (revision 214178)
@@ -3179,7 +3179,7 @@
/* Return the next insn. If it is a SEQUENCE, return the first insn
of the sequence. */
-rtx
+rtx_insn *
next_insn (rtx insn)
{
if (insn)
@@ -3190,13 +3190,13 @@
insn = XVECEXP (PATTERN (insn), 0, 0);
}
- return insn;
+ return safe_as_a rtx_insn * (insn);
}
/* Return the previous insn. If it is a SEQUENCE, return the last insn
of the sequence. */
-rtx
+rtx_insn *
previous_insn (rtx insn)
{
if (insn)
@@ -3207,13 +3207,13 @@
insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
}
- return insn;
+ return safe_as_a rtx_insn * (insn);
}
/* Return the next insn after INSN that is not a NOTE. This routine does not
look inside SEQUENCEs. */
-rtx
+rtx_insn *
next_nonnote_insn (rtx insn)
{
while (insn)
@@ -3223,7 +3223,7 @@
break;
}
- return insn;
+ return safe_as_a rtx_insn * (insn);
}
/* Return the next insn after INSN that is not a NOTE, but stop the
@@ -3230,7 +3230,7 @@
search before we enter another basic
Re: [C/C++ PATCH] Implement -Wbool-compare (PR c++/62153)
On 08/19/2014 12:52 PM, Marek Polacek wrote: + tree cst = TREE_CODE (op0) == INTEGER_CST +? op0 : TREE_CODE (op1) == INTEGER_CST ? op1 : NULL_TREE; This indentation won't survive Emacs auto-indent; please add parentheses. + int sign = TREE_CODE (op0) == INTEGER_CST +? tree_int_cst_sgn (cst) : -tree_int_cst_sgn (cst); Likewise. OK with those fixed. Jason
Re: [PATCH] Add guality [p]type test.
On Tue, 2014-08-19 at 14:16 +0200, Richard Biener wrote: On Tue, Aug 19, 2014 at 2:10 PM, Mark Wielaard m...@redhat.com wrote: gcc/testsuite/ChangeLog 2014-08-19 Mark Wielaard m...@redhat.com * gcc.dg/guality/restrict.c: Add `used' attribute to all variables. (cpy): Change type of last argument to int. That last change is necessary to succeed with LTO. Otherwise the type of the function: static __attribute__((noclone, noinline)) void * cpy (void * restrict s1, const void * restrict s2, unsigned int n) comes out as: void *(void * restrict, const void * restrict, __unknown__) That seems a genuine bug. Should I commit the cpy function type change to make the test PASS with LTO? Or leave it as is so it FAILs and someone else can look into it? Yeah, that's a genuine bug. Not sure why it happens. If you file a bug I can have a look later. Filed as https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62190 LTO DWARF produces __unknown__ type for unsigned int function argument type. I included a smaller testcase in the bug that can just be dropped into gcc/testsuite/gcc.dg/guality/ to show the issue. Shall I just commit the change to the restrict.c testcase, so at least that one always PASSes for now? Cheers, Mark
[PATCH/PR c/59304] #pragma diagnostic pop after warning fails for options unspecified in the command-line and disabled by default
The idea is that when we see a change of classification, and the
option was originally unspecified, we record the command-line status.
This way, when doing pop later, we already check if the option was
reclassified so we get the command-line status. This also works with
-Wall, since all dependent options go through set_option and call
diagnostic_classify_diagnostic. But we have to call it before changing
the option status.
Bootstrapped and regression tested on x86_64-linux-gnu.
OK?
gcc/ChangeLog:
2014-08-19 Manuel López-Ibáñez m...@gcc.gnu.org
PR c/59304
* opts-common.c (set_option): Call diagnostic_classify_diagnostic
before setting the option.
* diagnostic.c (diagnostic_classify_diagnostic): Record
command-line status.
gcc/testsuite/ChangeLog:
2014-08-19 Manuel López-Ibáñez m...@gcc.gnu.org
PR c/59304
* gcc.dg/pr59304.c: New test.
Index: gcc/opts-common.c
===
--- gcc/opts-common.c (revision 214136)
+++ gcc/opts-common.c (working copy)
@@ -1117,10 +1117,13 @@ set_option (struct gcc_options *opts, st
void *set_flag_var = NULL;
if (!flag_var)
return;
+ if ((diagnostic_t) kind != DK_UNSPECIFIED dc != NULL)
+diagnostic_classify_diagnostic (dc, opt_index, (diagnostic_t) kind, loc);
+
if (opts_set != NULL)
set_flag_var = option_flag_var (opt_index, opts_set);
switch (option-var_type)
{
@@ -1196,14 +1199,10 @@ set_option (struct gcc_options *opts, st
if (set_flag_var)
*(void **) set_flag_var = v;
}
break;
}
-
- if ((diagnostic_t) kind != DK_UNSPECIFIED
- dc != NULL)
-diagnostic_classify_diagnostic (dc, opt_index, (diagnostic_t) kind, loc);
}
/* Return the address of the flag variable for option OPT_INDEX in
options structure OPTS, or NULL if there is no flag variable. */
Index: gcc/diagnostic.c
===
--- gcc/diagnostic.c(revision 214136)
+++ gcc/diagnostic.c(working copy)
@@ -582,10 +582,19 @@ diagnostic_classify_diagnostic (diagnost
the pragmas were. */
if (where != UNKNOWN_LOCATION)
{
int i;
+ /* Record the command-line status, so we can reset it back on DK_POP. */
+ if (old_kind == DK_UNSPECIFIED)
+ {
+ old_kind = context-option_enabled (option_index,
+ context-option_state)
+ ? DK_WARNING : DK_IGNORED;
+ context-classify_diagnostic[option_index] = old_kind;
+ }
+
for (i = context-n_classification_history - 1; i = 0; i --)
if (context-classification_history[i].option == option_index)
{
old_kind = context-classification_history[i].kind;
break;
Index: gcc/testsuite/gcc.dg/pr59304.c
===
--- gcc/testsuite/gcc.dg/pr59304.c (revision 0)
+++ gcc/testsuite/gcc.dg/pr59304.c (revision 0)
@@ -0,0 +1,40 @@
+/* { dg-do compile } */
+enum EE
+ {
+ONE, TWO, THREE
+ };
+
+int f (enum EE e)
+{
+ int r = 0;
+
+#pragma GCC diagnostic push
+#pragma GCC diagnostic error -Wswitch-enum
+
+ switch (e)
+{
+case ONE:
+ r = 1;
+ break;
+case TWO:
+ r = 2;
+ break;
+case THREE:
+ r = 3;
+ break;
+}
+
+#pragma GCC diagnostic pop
+
+ switch (e)
+{
+case ONE:
+ r = 1;
+ break;
+case TWO:
+ r = 2;
+ break;
+}
+
+ return r;
+}
Re: [PATCH 003/236] config/mn10300: Fix missing PATTERN in PARALLEL handling
On 08/06/2014 10:19 AM, David Malcolm wrote: @@ -2772,11 +2772,11 @@ mn10300_adjust_sched_cost (rtx insn, rtx link, rtx dep, int cost) if (!TARGET_AM33) return 1; - if (GET_CODE (insn) == PARALLEL) -insn = XVECEXP (insn, 0, 0); + if (GET_CODE (PATTERN (insn)) == PARALLEL) +insn = XVECEXP (PATTERN (insn), 0, 0); - if (GET_CODE (dep) == PARALLEL) -dep = XVECEXP (dep, 0, 0); + if (GET_CODE (PATTERN (dep)) == PARALLEL) +dep = XVECEXP (PATTERN (dep), 0, 0); I think these tests are simply wrong and should be removed. Certainly one can't expect to extract the first element of an insn's pattern and then a few lines later test the pattern vs JUMP_P. r~
Re: [PATCH 019/236] Strengthen return type of gen_label_rtx
On Tue, 2014-08-12 at 16:00 -0600, Jeff Law wrote: On 08/06/14 11:19, David Malcolm wrote: gcc/ * rtl.h (gen_label_rtx): Strengthen return type from rtx to rtx_code_label *. * emit-rtl.c (gen_label_rtx): Likewise. Presumably at some point we'll look at the gen_XXX and split out those which return items for the chain vs everything else. OK. Thanks; committed to trunk as r214179, having verified bootstrapregrtest on x86_64-unknown-linux-gnu (Fedora 20) albeit in combination with patches 9-29 [1], and verified that it builds standalone with 10 targets. Dave
Re: [C/C++ PATCH] Implement -Wbool-compare (PR c++/62153)
On Tue, Aug 19, 2014 at 01:41:44PM -0400, Jason Merrill wrote: On 08/19/2014 12:52 PM, Marek Polacek wrote: + tree cst = TREE_CODE (op0) == INTEGER_CST + ? op0 : TREE_CODE (op1) == INTEGER_CST ? op1 : NULL_TREE; This indentation won't survive Emacs auto-indent; please add parentheses. + int sign = TREE_CODE (op0) == INTEGER_CST + ? tree_int_cst_sgn (cst) : -tree_int_cst_sgn (cst); Likewise. All right, will fix 'em. OK with those fixed. Thanks! Marek
