[PATCH 1/2] Allow REG_EQUAL for ZERO_EXTRACT
This patch allows setting REG_EQUAL for ZERO_EXTRACT and handle that in
cse (where the src for the ZERO_EXTRACT needs to be calculated)
Thanks,
Kugan
2015-06-26 Kugan Vivekanandarajah kug...@linaro.org
* cse.c (cse_insn): Calculate src_eqv for ZERO_EXTRACT.
* emit-rtl.c (set_for_reg_notes): Allow ZERO_EXTRACT to set
REG_EQUAL note.
From 75e746e559ffd21b25542b3db627e3b318118569 Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah kugan.vivekanandara...@linaro.org
Date: Fri, 26 Jun 2015 17:12:07 +1000
Subject: [PATCH 1/2] Allow adding REG_EQUAL for ZERO_EXTRACT
---
gcc/ChangeLog | 6 ++
gcc/cse.c | 41 -
gcc/emit-rtl.c | 3 ++-
3 files changed, 48 insertions(+), 2 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 080aa39..d4a73d6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-06-26 Kugan Vivekanandarajah kug...@linaro.org
+
+ * cse.c (cse_insn): Calculate src_eqv for ZERO_EXTRACT.
+ * emit-rtl.c (set_for_reg_notes): Allow ZERO_EXTRACT to set
+ REG_EQUAL note.
+
2015-06-25 H.J. Lu hongjiu...@intel.com
* gentarget-def.c (def_target_insn): Cast return of strtol to
diff --git a/gcc/cse.c b/gcc/cse.c
index 100c9c8..8add651 100644
--- a/gcc/cse.c
+++ b/gcc/cse.c
@@ -4531,8 +4531,47 @@ cse_insn (rtx_insn *insn)
if (n_sets == 1 REG_NOTES (insn) != 0
(tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
(! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
+ || GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT
|| GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
-src_eqv = copy_rtx (XEXP (tem, 0));
+{
+ src_eqv = copy_rtx (XEXP (tem, 0));
+
+ /* If DEST is of the form ZERO_EXTACT, as in:
+ (set (zero_extract:SI (reg:SI 119)
+ (const_int 16 [0x10])
+ (const_int 16 [0x10]))
+ (const_int 51154 [0xc7d2]))
+ REG_EQUAL note will specify the value of register (reg:SI 119) at this
+ point. Note that this is different from SRC_EQV. We can however
+ calculate SRC_EQV with the position and width of ZERO_EXTRACT. */
+ if (GET_CODE (SET_DEST (sets[0].rtl)) == ZERO_EXTRACT)
+ {
+ if (CONST_INT_P (src_eqv)
+ CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 1))
+ CONST_INT_P (XEXP (SET_DEST (sets[0].rtl), 2)))
+ {
+ rtx dest_reg = XEXP (SET_DEST (sets[0].rtl), 0);
+ rtx width = XEXP (SET_DEST (sets[0].rtl), 1);
+ rtx pos = XEXP (SET_DEST (sets[0].rtl), 2);
+ HOST_WIDE_INT val = INTVAL (src_eqv);
+ HOST_WIDE_INT mask;
+ unsigned int shift;
+ if (BITS_BIG_ENDIAN)
+ shift = GET_MODE_PRECISION (GET_MODE (dest_reg))
+ - INTVAL (pos) - INTVAL (width);
+ else
+ shift = INTVAL (pos);
+ if (INTVAL (width) == HOST_BITS_PER_WIDE_INT)
+ mask = ~(HOST_WIDE_INT) 0;
+ else
+ mask = ((HOST_WIDE_INT) 1 INTVAL (width)) - 1;
+ val = (val shift) mask;
+ src_eqv = GEN_INT (val);
+ }
+ else
+ src_eqv = 0;
+ }
+}
/* Set sets[i].src_elt to the class each source belongs to.
Detect assignments from or to volatile things
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index e7f7eab..cb891b1 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -5228,7 +5228,8 @@ set_for_reg_notes (rtx insn)
reg = SET_DEST (pat);
/* Notes apply to the contents of a STRICT_LOW_PART. */
- if (GET_CODE (reg) == STRICT_LOW_PART)
+ if (GET_CODE (reg) == STRICT_LOW_PART
+ || GET_CODE (reg) == ZERO_EXTRACT)
reg = XEXP (reg, 0);
/* Check that we have a register. */
--
1.9.1
[PATCH 2/2] Set REG_EQUAL
This patch sets REG_EQUAL when emitting arm_emit_movpair.
Thanks,
Kugan
gcc/testsuite/ChangeLog:
2015-06-26 Kugan Vivekanandarajah kug...@linaro.org
* gcc.target/arm/reg_equal_test.c: New test.
gcc.
2015-06-26 Kugan Vivekanandarajah kug...@linaro.org
* config/arm/arm.c (arm_emit_movpair): Add REG_EQUAL notes to
instruction.
From e90feaca4d7dfc893cb2a0142e1888655c9ffa1f Mon Sep 17 00:00:00 2001
From: Kugan Vivekanandarajah kugan.vivekanandara...@linaro.org
Date: Fri, 26 Jun 2015 17:22:22 +1000
Subject: [PATCH 2/2] Add REG_EQUAL note for arm_emit_movpair
---
gcc/config/arm/arm.c | 14 +++---
gcc/testsuite/ChangeLog | 4
gcc/testsuite/gcc.target/arm/reg_equal_test.c | 24
3 files changed, 39 insertions(+), 3 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/arm/reg_equal_test.c
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 83f3269..8a47c72 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -17884,19 +17884,27 @@ output_mov_long_double_arm_from_arm (rtx *operands)
void
arm_emit_movpair (rtx dest, rtx src)
{
+ rtx insn;
+
/* If the src is an immediate, simplify it. */
if (CONST_INT_P (src))
{
HOST_WIDE_INT val = INTVAL (src);
emit_set_insn (dest, GEN_INT (val 0x));
if ((val 16) 0x)
-emit_set_insn (gen_rtx_ZERO_EXTRACT (SImode, dest, GEN_INT (16),
- GEN_INT (16)),
- GEN_INT ((val 16) 0x));
+ {
+ emit_set_insn (gen_rtx_ZERO_EXTRACT (SImode, dest, GEN_INT (16),
+ GEN_INT (16)),
+ GEN_INT ((val 16) 0x));
+ insn = get_last_insn ();
+ set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
+ }
return;
}
emit_set_insn (dest, gen_rtx_HIGH (SImode, src));
emit_set_insn (dest, gen_rtx_LO_SUM (SImode, dest, src));
+ insn = get_last_insn ();
+ set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
}
/* Output a move between double words. It must be REG-MEM
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b6486ac..8edb484 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2015-06-26 Kugan Vivekanandarajah kug...@linaro.org
+
+ * gcc.target/arm/reg_equal_test.c: New test.
+
2015-06-25 Richard Biener rguent...@suse.de
* gcc.dg/tree-ssa/pr52631.c: Disable forwprop.
diff --git a/gcc/testsuite/gcc.target/arm/reg_equal_test.c b/gcc/testsuite/gcc.target/arm/reg_equal_test.c
new file mode 100644
index 000..58fa9dd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/reg_equal_test.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options -O1 -fdump-rtl-expand } */
+
+extern void abort (void);
+unsigned int a = 1;
+
+int
+main (void)
+{
+ unsigned int b, c, d;
+
+ if (sizeof (int) != 4 || (int) 0xc7d24b5e 0)
+return 0;
+
+ c = 0xc7d24b5e;
+ d = a | -2;
+ b = (d == 0) ? c : (c % d);
+ if (b != c)
+abort ();
+
+ return 0;
+}
+
+/* { dg-final { scan-rtl-dump expr_list:REG_EQUAL \\(const_int -942519458 expand } } */
--
1.9.1
Re: Remove redundant AND from count reduction loop
On Fri, 26 Jun 2015, Richard Biener wrote:
OK. The reason I was being paranoid was that I couldn't see anywhere
where we enforced that the vector condition in a VEC_COND had to have
the same element width as the values being selected.
We don't require that indeed.
tree-cfg.c
only checks that rhs2 and rhs3 are compatible with the result.
There doesn't seem to be any checking of rhs1 vs. the other types.
So I wasn't sure whether anything stopped us from, e.g., comparing two
V4HIs and using the result to select between two V4SIs.
Nothing does (or should).
The documentation patch you approved in
https://gcc.gnu.org/ml/gcc-patches/2012-10/msg01109.html says something
different. If it is really wrong, could you fix it?
Hmm, that simplifies things.
On the other hand, vectors of bools could be (I haven't thought about it
much) nice to have, especially for avx512 (and at least one other arch,
maybe sparc).
It would be nice if these constraints would also be checked in the
gimple verifier...
This passed bootstrap+testsuite on powerpc64le-unknown-linux-gnu.
2015-06-29 Marc Glisse marc.gli...@inria.fr
* tree-cfg.c (verify_gimple_assign_ternary) VEC_COND_EXPR: Check
the first argument.
--
Marc GlisseIndex: gcc/tree-cfg.c
===
--- gcc/tree-cfg.c (revision 225104)
+++ gcc/tree-cfg.c (working copy)
@@ -4001,8 +4001,22 @@
}
break;
+case VEC_COND_EXPR:
+ if (!VECTOR_INTEGER_TYPE_P (rhs1_type)
+ || TYPE_SIGN (rhs1_type) != SIGNED
+ || TYPE_SIZE (rhs1_type) != TYPE_SIZE (lhs_type)
+ || TYPE_VECTOR_SUBPARTS (rhs1_type)
+!= TYPE_VECTOR_SUBPARTS (lhs_type))
+ {
+ error (the first argument of a VEC_COND_EXPR must be of a signed
+integral vector type of the same size and number of
+elements as the result);
+ debug_generic_expr (lhs_type);
+ debug_generic_expr (rhs1_type);
+ return true;
+ }
+ /* Fallthrough. */
case COND_EXPR:
-case VEC_COND_EXPR:
if (!useless_type_conversion_p (lhs_type, rhs2_type)
|| !useless_type_conversion_p (lhs_type, rhs3_type))
{
[PATCH 0/2] Set REG_EQUAL when emitting arm_emit_movpair
When we split constants with the arm_emit_movpair, we are not setting the REG_EQUAL note. This patch attempts to do that. Fist patch allow setting REG_EQUAL for ZERO_EXTRACT and handle that in cse (where the src for the ZERO_EXTRACT needs to be calculated) Second patch sets REG_EQUAL when emitting arm_emit_movpair. Bootstrapped and regression tested on arm-none-linux (Chromebook) and x86-64-linux-gnu with no new regression. Is this OK for trunk, Thanks, Kugan
New Swedish PO file for 'gcc' (version 5.1.0)
Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Swedish team of translators. The file is available at: http://translationproject.org/latest/gcc/sv.po (This file, 'gcc-5.1.0.sv.po', has just now been sent to you in a separate email.) All other PO files for your package are available in: http://translationproject.org/latest/gcc/ Please consider including all of these in your next release, whether official or a pretest. Whenever you have a new distribution with a new version number ready, containing a newer POT file, please send the URL of that distribution tarball to the address below. The tarball may be just a pretest or a snapshot, it does not even have to compile. It is just used by the translators when they need some extra translation context. The following HTML page has been updated: http://translationproject.org/domain/gcc.html If any question arises, please contact the translation coordinator. Thank you for all your work, The Translation Project robot, in the name of your translation coordinator. coordina...@translationproject.org
Re: [PATCH] Use PIE_SPEC/NO_PIE_SPEC for crtend.o/crtendS.o
On Thu, Jun 25, 2015 at 04:37:29AM -0700, H.J. Lu wrote:
On Wed, Jun 10, 2015 at 6:20 AM, Rainer Orth
r...@cebitec.uni-bielefeld.de wrote:
H.J. Lu hjl.to...@gmail.com writes:
On Tue, May 19, 2015 at 8:33 AM, Joseph Myers jos...@codesourcery.com
wrote:
On Tue, 19 May 2015, H.J. Lu wrote:
I think the whole thing should be posted as one patch, with both the
target-independent changes and the target-specific changes for all
targets.
That is what makes me concerned. I have some simple target-specified
patches which weren't reviewed for years. What will happen if no one
For any unreviewed patch, keep pinging weekly.
reviews some simple target-specified changes due to
1. Reviewers don't have access to those targets.
2. Target maintainers aren't review them.
3. There are no clear maintainers for those targets.
I've already said in
https://gcc.gnu.org/ml/gcc-patches/2015-05/msg00593.html that, given
target maintainers CC:ed, I might be inclined to approve the patch on the
basis of allowing them a week to test their target changes.
Here is the complete patch. Tested on Linux/x86-64. It is also
available on hjl/pie/master branch in git mirror.
I just noticed that with --enable-default-pie, while crtbeginS.o is
linked into the executable, crtend.o is used, while with an explicit
-pie, crtendS.o is taken. Shouldn't GNU_USER_TARGET_ENDFILE_SPEC have
the same treatment as GNU_USER_TARGET_STARTFILE_SPEC already did?
* config/gnu-user.h (GNU_USER_TARGET_STARTFILE_SPEC): Use
PIE_SPEC and NO_PIE_SPEC if HAVE_LD_PIE is defined.
Here is a patch. OK for trunk?
Thanks.
I'd like to check in this patch. Any comments, objections?
Thanks.
H.J.
From 50bebf531193c18efb0982ac119694aa9f650e44 Mon Sep 17 00:00:00 2001
From: H.J. Lu hjl.to...@gmail.com
Date: Thu, 25 Jun 2015 03:04:56 -0700
Subject: [PATCH 1/2] Use PIE_SPEC/NO_PIE_SPEC for crtend.o/crtendS.o
We need to link with crtend.o and crtendS.o properly for GCC configured
to generate PIE by default.
* config/gnu-user.h (GNU_USER_TARGET_ENDFILE_SPEC): Use
PIE_SPEC and NO_PIE_SPEC if HAVE_LD_PIE is defined.
---
gcc/config/gnu-user.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/gcc/config/gnu-user.h b/gcc/config/gnu-user.h
index 2fcb55d..5b3576b 100644
--- a/gcc/config/gnu-user.h
+++ b/gcc/config/gnu-user.h
@@ -67,11 +67,20 @@ see the files COPYING3 and COPYING.RUNTIME respectively.
If not, see
object constructed before entering `main', followed by a normal
GNU userspace finalizer file, `crtn.o'. */
+#if defined HAVE_LD_PIE
+#define GNU_USER_TARGET_ENDFILE_SPEC \
+ %{fvtable-verify=none:%s; \
+ fvtable-verify=preinit:vtv_end_preinit.o%s; \
+ fvtable-verify=std:vtv_end.o%s} \
+ %{shared:crtendS.o%s;: %{ PIE_SPEC :crtendS.o%s} \
+ %{ NO_PIE_SPEC :crtend.o%s}} crtn.o%s
+#else
#define GNU_USER_TARGET_ENDFILE_SPEC \
%{fvtable-verify=none:%s; \
fvtable-verify=preinit:vtv_end_preinit.o%s; \
fvtable-verify=std:vtv_end.o%s} \
%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s
+#endif
#undef ENDFILE_SPEC
#define ENDFILE_SPEC GNU_USER_TARGET_ENDFILE_SPEC
--
2.1.0
[PATCH] config/bfin/bfin.c (hwloop_optimize): Use return false instead of gcc_assert for checking jump_insn.
For bfin looping optimization, after lsetup optimization, it can have
the correct lsetup related insns which causes gcc_assert for jump_insn.
The related bug is Bug 66620.
2015-06-28 Chen Gang gang.chen.5...@gmail.com
* config/bfin/bfin.c (hwloop_optimize): Use return false instead
of gcc_assert for checking jump_insn.
---
gcc/config/bfin/bfin.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index 3b4b54e..91866dd 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -3520,7 +3520,13 @@ hwloop_optimize (hwloop_info loop)
if (vec_safe_length (loop-incoming) 1
|| !(loop-incoming-last ()-flags EDGE_FALLTHRU))
{
- gcc_assert (JUMP_P (insn));
+ if (!JUMP_P (insn))
+ {
+ if (dump_file)
+ fprintf (dump_file, ;; loop %d lsetup may already inserted\n,
+loop-loop_no);
+ return false;
+ }
insn = PREV_INSN (insn);
}
--
1.9.3
[wwwdocs] move a link to https in java/done.html
Applied. Gerald 2015-06-27 Gerald Pfeifer ger...@pfeifer.com * done.html: www.pdflabs.com now uses https. Index: done.html === RCS file: /cvs/gcc/wwwdocs/htdocs/java/done.html,v retrieving revision 1.53 diff -u -r1.53 done.html --- done.html 31 Mar 2013 15:06:15 - 1.53 +++ done.html 27 Jun 2015 21:50:47 - @@ -229,7 +229,7 @@ !-- pdftk -- tr valign=top -tdba href=http://www.pdflabs.com/tools/pdftk-the-pdf-toolkit/;pdftk/a/b/td +tdba href=https://www.pdflabs.com/tools/pdftk-the-pdf-toolkit/;pdftk/a/b/td tdpIf PDF is electronic paper, then pdftk is an electronic staple-remover, hole-punch, binder, secret-decoder-ring, and
[wwwdocs] Fix link from about.html to contribute.html
A little embarrassing to have such a broken link on this page. Fixed. Gerald Index: about.html === RCS file: /cvs/gcc/wwwdocs/htdocs/about.html,v retrieving revision 1.25 diff -u -r1.25 about.html --- about.html 1 Feb 2015 19:38:35 - 1.25 +++ about.html 28 Jun 2015 15:16:38 - @@ -9,7 +9,7 @@ h1GCC: About/h1 pThese pages are maintained by the GCC team and it's easy to -a href=../contribute.html#webchangescontribute/a./p +a href=contribute.html#webchangescontribute/a./p pThe web effort was originally led by Jeff Law. For the last decade or so Gerald Pfeifer has been leading the effort, but there are
[wwwdocs] Link maintenance for projects/cli.html
Applied. Gerald Index: projects/cli.html === RCS file: /cvs/gcc/wwwdocs/htdocs/projects/cli.html,v retrieving revision 1.26 diff -u -r1.26 cli.html --- projects/cli.html 30 Jun 2014 22:07:35 - 1.26 +++ projects/cli.html 28 Jun 2015 14:56:43 - @@ -105,7 +105,7 @@ /p p In 2007 to explore the potential of .NET as a deployment file format, in -collaboration with a href=http://www.hipeac.net/;HiPEAC/a, we +collaboration with a href=https://www.hipeac.net/;HiPEAC/a, we developped also a CIL front end (always using GCC). /p @@ -413,7 +413,7 @@ h3Implementation overview/h3 piGcccil/i does not implement its own CLR metadata parser. -Instead, it uses a href=http://www.mono-project.com/Main_Page;Mono/a +Instead, it uses a href=http://www.mono-project.com/;Mono/a to parse the input assembly. That is, Mono is used to load the assembly and parse the metadata and types. The frontend only has to parse the actual CIL code of each method. Mono provides a comprehensive API to
[doc] invoke.texi: -mno-fancy-math-387 and FreeBSD
Now that Andreas is on board, time to dust off some older issues
of mine. :-)
I verified that current GCC HEAD generates fsincos on FreeBSD/i386
with -ffastmath (and no options otherwise), and generates a call
to a sin() function otherwise.
So, okay to apply this patch? And if so, okay to push back to
GCC 5 and 4.9 as well?
Gerald
On Wed, 16 Feb 2011, Gerald Pfeifer wrote:
The documentation indicates that -mno-fancy-math-387 is the default
on FreeBSD, yet I do not see any code actually implementing that, and
I verified that the following
#include math.h
double f(double d) {
return __builtin_sin(d);
}
did generate fsin with -ffast-math as the only option.
Richard, http://gcc.gnu.org/ml/gcc-patches/2002-03/msg02001.html was
the last time someone really made changes in this area, though the
reference to FreeBSD predates your patch where you added OpenBSD and
NetBSD for both of which I _do_ see code in config/i386 to that extent,
unlike FreeBSD.
Am I missing something obvious, or is the patch below okay?
Gerald
2011-02-16 Gerald Pfeifer ger...@pfeifer.com
PR target/37072
* doc/invoke.texi (i386 and x86-64 Options): -mno-fancy-math-387
is not actually the default on FreeBSD.
Uppercase CPU.
Index: doc/invoke.texi
===
--- doc/invoke.texi (revision 170120)
+++ doc/invoke.texi (working copy)
@@ -12273,9 +12273,9 @@
@opindex mno-fancy-math-387
Some 387 emulators do not support the @code{sin}, @code{cos} and
@code{sqrt} instructions for the 387. Specify this option to avoid
-generating those instructions. This option is the default on FreeBSD,
+generating those instructions. This option is the default on
OpenBSD and NetBSD@. This option is overridden when @option{-march}
-indicates that the target cpu will always have an FPU and so the
+indicates that the target CPU will always have an FPU and so the
instruction will not need emulation. As of revision 2.6.1, these
instructions are not generated unless you also use the
@option{-funsafe-math-optimizations} switch.
Re: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math
On Jun 25, 2015, at 9:44 AM, Kumar, Venkataramanan venkataramanan.ku...@amd.com wrote: I got around ~12% gain with -Ofast -mcpu=cortex-a57. I get around 11/12% on thunderX with the patch and the decreasing the iterations change (1/2) compared to without the patch. Thanks, Andrew Regards, Venkat. -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- ow...@gcc.gnu.org] On Behalf Of Dr. Philipp Tomsich Sent: Thursday, June 25, 2015 9:13 PM To: Kumar, Venkataramanan Cc: Benedikt Huber; pins...@gmail.com; gcc-patches@gcc.gnu.org Subject: Re: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math Kumar, what is the relative gain that you see on Cortex-A57? Thanks, Philipp. On 25 Jun 2015, at 17:35, Kumar, Venkataramanan venkataramanan.ku...@amd.com wrote: Changing to 1 step for float and 2 steps for double gives better gains now for gromacs on cortex-a57. Regards, Venkat. -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- ow...@gcc.gnu.org] On Behalf Of Benedikt Huber Sent: Thursday, June 25, 2015 4:09 PM To: pins...@gmail.com Cc: gcc-patches@gcc.gnu.org; philipp.toms...@theobroma-systems.com Subject: Re: [PATCH] [aarch64] Implemented reciprocal square root (rsqrt) estimation in -ffast-math Andrew, This is NOT a win on thunderX at least for single precision because you have to do the divide and sqrt in the same time as it takes 5 multiples (estimate and step are multiplies in the thunderX pipeline). Doubles is 10 multiplies which is just the same as what the patch does (but it is really slightly less than 10, I rounded up). So in the end this is NOT a win at all for thunderX unless we do one less step for both single and double. Yes, the expected benefit from rsqrt estimation is implementation specific. If one has a better initial rsqrte or an application that can trade precision for execution time, we could offer a command line option to do only 2 steps for doulbe and 1 step for float; similar to - mrecip-precision for PowerPC. What are your thoughts on that? Best regards, Benedikt
Re: [wwwdocs] 4.9/changes.html: Mention -Wopenmp-simd/-fsimd-cost-model; Fortran update
No feedback, so I now went ahead and applied this. Tobias, if you have any suggestions, please advise. Gerald On Sun, 12 Apr 2015, Gerald Pfeifer wrote: [ Tobias, your bur...@net-b.de account just bounced with mailbox full! ] On Tue, 18 Feb 2014, Tobias Burnus wrote: is the wording okay - and/or do you have further suggestions? Here are some suggestions on top of the existing text. Remove a comma and break a long sentence in the SIMD section. Use least significant instead of last significant when refering to rounding and simplify a sentence in the Fortran section. I have not committed this yet since the sentence on rounding really feels rather weird. Should there be something like whereas compatible would round... (as opposed to rounds)? Gerald Index: changes.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.9/changes.html,v retrieving revision 1.85 diff -u -r1.85 changes.html --- changes.html 8 Apr 2015 10:33:06 - 1.85 +++ changes.html 12 Apr 2015 21:47:26 - @@ -127,11 +127,11 @@ OpenMP specification/a is now supported in the C and C++ compilers and starting with the 4.9.1 release also in the Fortran compiler. The new code-fopenmp-simd/code option can be used to enable OpenMP's - SIMD directives, while ignoring other OpenMP directives. The new a + SIMD directives while ignoring other OpenMP directives. The new a href=https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/Optimize-Options.html#index-fsimd-cost-model-908; code-fsimd-cost-model=/code/a option permits to tune the vectorization cost model for loops annotated with OpenMP and Cilk - Plus codesimd/code directives; code-Wopenmp-simd/code warns when + Plus codesimd/code directives. code-Wopenmp-simd/code warns when the current cost model overrides simd directives set by the user./li liThe code-Wdate-time/code option has been added for the C, C++ and Fortran compilers, which warns when the code__DATE__/code, @@ -459,9 +459,9 @@ codestrtod/code honours the rounding mode. (For output, rounding is supported since GCC 4.5.) Note that for input, the codecompatible/code rounding mode is handled as codenearest/code -(i.e., for a tie, rounding to an even last significant -[cf. IEC 60559:1989] ndash; while codecompatible/code rounds away -from zero for a tie)./li +(i.e., rounding to an even least significant [cf. IEC 60559:1989] +for a tie, while codecompatible/code rounds away from zero in +that case)./li /ul/li /ul
[wwwdocs] Adjust URL of StarPU in extensions.html
Applied. Gerald Index: extensions.html === RCS file: /cvs/gcc/wwwdocs/htdocs/extensions.html,v retrieving revision 1.55 diff -u -r1.55 extensions.html --- extensions.html 21 Apr 2015 10:11:35 - 1.55 +++ extensions.html 28 Jun 2015 16:01:52 - @@ -41,7 +41,7 @@ and inspect the abstract syntax tree of a translation unit./p -h2a href=http://runtime.bordeaux.inria.fr/StarPU/;StarPU/a/h2 +h2a href=http://starpu.gforge.inria.fr/;StarPU/a/h2 pStarPU is a GCC extension and run-time support library for hybrid CPU/GPU task programming. Its GCC plug-in allows programmers to
Re: [wwwdocs] The C++ ABI specification has moved again
On Sat, 27 Jun 2015, Gerald Pfeifer wrote: ...so adjust all the links. Applied. Plus one I missed yesterday. Gerald Index: gcc-3.2/c++-abi.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-3.2/c++-abi.html,v retrieving revision 1.7 diff -u -r1.7 c++-abi.html --- gcc-3.2/c++-abi.html26 Aug 2012 10:40:09 - 1.7 +++ gcc-3.2/c++-abi.html28 Jun 2015 14:43:23 - @@ -10,7 +10,7 @@ The main point of the GCC 3.2 release is to have a relatively stable and common C++ ABI for GNU/Linux and BSD usage, following the documentation at -a href=http://mentorembedded.github.com/cxx-abi/;http://sourcery.mentor.com/public/cxx-abi//a. +a href=http://mentorembedded.github.io/cxx-abi/;http://sourcery.mentor.com/public/cxx-abi//a. Unfortunately this means that GCC 3.2 is incompatible with GCC 3.0 and GCC 3.1 releases./p
[wwwdocs] debian.org has moved to https
Applied. Gerald Index: gcc-4.6/porting_to.html === RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.6/porting_to.html,v retrieving revision 1.7 diff -u -r1.7 porting_to.html --- gcc-4.6/porting_to.html 28 Jun 2014 22:44:29 - 1.7 +++ gcc-4.6/porting_to.html 28 Jun 2015 14:53:30 - @@ -115,7 +115,7 @@ p Matthias Klose, -a href=http://lists.debian.org/debian-devel-announce/2011/02/msg00012.html;prepare +a href=https://lists.debian.org/debian-devel-announce/2011/02/msg00012.html;prepare to fix build failures with new GCC versions/a /p
Re: [Patch wwwdocs] Document caveat with guard initializations for C++ on architectures without barrier instructions.
On Fri, 26 Jun 2015, Ramana Radhakrishnan wrote: OK ? One sence has will ... either ... or would where I think using will in both cases may be better? Apart from this it looks good to me. Plus, as maintainer you don't need approval for contributions like this. :-) Gerald
Re: [patch] fix regrename pass to ensure renamings produce valid insns
On 06/24/2015 09:46 PM, Jeff Law wrote:
On 06/23/2015 07:00 PM, Sandra Loosemore wrote:
On 06/18/2015 11:32 AM, Eric Botcazou wrote:
The attached patch teaches regrename to validate insns affected by each
register renaming before making the change. I can see at least two
other ways to handle this -- earlier, by rejecting renamings that
result
in invalid instructions when it's searching for the best renaming; or
later, by validating the entire set of renamings as a group instead of
incrementally for each one -- but doing it all in regname_do_replace
seems least disruptive and risky in terms of the existing code.
OK, but the patch looks incomplete, rename_chains should be adjusted
as well,
i.e. regrename_do_replace should now return a boolean.
Like this? I tested this on nios2 and x86_64-linux-gnu, as before, plus
built for aarch64-linux-gnu and ran the gcc testsuite.
The c6x back end also calls regrename_do_replace. I am not set up to
build or test on that target, and Bernd told me off-list that it would
never fail on that target anyway so I have left that code alone.
-Sandra
regrename-2.log
2015-06-23 Chung-Lin Tangclt...@codesourcery.com
Sandra Loosemoresan...@codesourcery.com
gcc/
* regrename.h (regrename_do_replace): Change to return bool.
* regrename.c (rename_chains): Check return value of
regname_do_replace.
(regrename_do_replace): Re-validate the modified insns and
return bool status.
* config/aarch64/cortex-a57-fma-steering.c (rename_single_chain):
Update to match rename_chains changes.
As Eric mentioned, please put an assert to verify that the call from the
c6x backend never fails.
The regrename and ARM bits are fine.
Do you have a testcase that you can add to the suite? If so it'd be
appreciated if you could include that too.
Approved with the c6x assert if a testcase isn't available or
exceedingly difficult to produce.
Thanks. I've committed the attached version.
Re the testcase, this fixed 16 FAILs on existing tests in the gcc
testsuite with the forthcoming nios2 load/store multiple instruction
support, all assembler errors due to the bad instructions being
generated. There's nothing I can do on nios2 for a testcase until I get
those patches committed (I'm still trying to re-test and tidy them up
for submission), plus I think the failures are rather fragile --
depending on the register allocator choosing an initial register
numbering that allows peephole optimizers to trigger, etc. But, I will
revisit this later and see what I can do.
-Sandra
2015-06-28 Chung-Lin Tang clt...@codesourcery.com
Sandra Loosemore san...@codesourcery.com
gcc/
* regrename.h (regrename_do_replace): Change to return bool.
* regrename.c (rename_chains): Check return value of
regname_do_replace.
(regrename_do_replace): Re-validate the modified insns and
return bool status.
* config/aarch64/cortex-a57-fma-steering.c (rename_single_chain):
Update to match rename_chains changes.
* config/c6x/c6x.c (try_rename_operands): Assert that
regrename_do_replace returns true.
Index: gcc/regrename.c
===
--- gcc/regrename.c (revision 225104)
+++ gcc/regrename.c (working copy)
@@ -496,12 +496,20 @@ rename_chains (void)
continue;
}
- if (dump_file)
- fprintf (dump_file, , renamed as %s\n, reg_names[best_new_reg]);
-
- regrename_do_replace (this_head, best_new_reg);
- tick[best_new_reg] = ++this_tick;
- df_set_regs_ever_live (best_new_reg, true);
+ if (regrename_do_replace (this_head, best_new_reg))
+ {
+ if (dump_file)
+ fprintf (dump_file, , renamed as %s\n, reg_names[best_new_reg]);
+ tick[best_new_reg] = ++this_tick;
+ df_set_regs_ever_live (best_new_reg, true);
+ }
+ else
+ {
+ if (dump_file)
+ fprintf (dump_file, , renaming as %s failed\n,
+ reg_names[best_new_reg]);
+ tick[reg] = ++this_tick;
+ }
}
}
@@ -927,7 +935,13 @@ regrename_analyze (bitmap bb_mask)
bb-aux = NULL;
}
-void
+/* Attempt to replace all uses of the register in the chain beginning with
+ HEAD with REG. Returns true on success and false if the replacement is
+ rejected because the insns would not validate. The latter can happen
+ e.g. if a match_parallel predicate enforces restrictions on register
+ numbering in its subpatterns. */
+
+bool
regrename_do_replace (struct du_head *head, int reg)
{
struct du_chain *chain;
@@ -941,22 +955,26 @@ regrename_do_replace (struct du_head *he
int reg_ptr = REG_POINTER (*chain-loc);
if (DEBUG_INSN_P (chain-insn) REGNO (*chain-loc) != base_regno)
- INSN_VAR_LOCATION_LOC (chain-insn) = gen_rtx_UNKNOWN_VAR_LOC ();
+ validate_change (chain-insn, (INSN_VAR_LOCATION_LOC (chain-insn)),
+ gen_rtx_UNKNOWN_VAR_LOC (), true);
else
{
- *chain-loc = gen_raw_REG (GET_MODE (*chain-loc), reg);
+ validate_change (chain-insn, chain-loc,
+ gen_raw_REG (GET_MODE
[PATCH, i386]: Clean-up MPX patterns a bit
Hello!
Attached patch cleans MPX patterns a bit. Additionally, it moves a
couple of checks out from the expander to the call site and uses a
couple of helper functions.
There are no functional changes in the patch.
2015-06-28 Uros Bizjak ubiz...@gmail.com
* config/i386/i386.md (mode_ldx): Do not zero-extend non-Pmode
operand 2 here. Use copy_addr_to_reg to copy non-index
register operand 2 to a temporary.
(mode_stx): Ditto for operand 1.
(*mode_ldx, *mode_stx): Remove enclosing parallel.
* config/i386/i386.c (ix86_load_bounds): Zero-extend non-Pmode ptr here.
(ix86_store_bounds): Ditto.
Patch was tested on x86_64-linux-gnu and committed to mainline SVN.
Uros.
Index: config/i386/i386.c
===
--- config/i386/i386.c (revision 225104)
+++ config/i386/i386.c (working copy)
@@ -8886,9 +8886,8 @@ ix86_setup_incoming_vararg_bounds (cumulative_args
for (i = cum-regno; i max; i++)
{
rtx addr = plus_constant (Pmode, save_area, i * UNITS_PER_WORD);
- rtx reg = gen_rtx_REG (DImode,
+ rtx ptr = gen_rtx_REG (Pmode,
x86_64_int_parameter_registers[i]);
- rtx ptr = reg;
rtx bounds;
if (bnd_reg = LAST_BND_REG)
@@ -40344,6 +40343,9 @@ ix86_load_bounds (rtx slot, rtx ptr, rtx slot_no)
ptr = copy_addr_to_reg (slot);
}
+ if (!register_operand (ptr, Pmode))
+ptr = ix86_zero_extend_to_Pmode (ptr);
+
emit_insn (BNDmode == BND64mode
? gen_bnd64_ldx (reg, addr, ptr)
: gen_bnd32_ldx (reg, addr, ptr));
@@ -40378,6 +40380,9 @@ ix86_store_bounds (rtx ptr, rtx slot, rtx bounds,
ptr = copy_addr_to_reg (slot);
}
+ if (!register_operand (ptr, Pmode))
+ptr = ix86_zero_extend_to_Pmode (ptr);
+
gcc_assert (POINTER_BOUNDS_MODE_P (GET_MODE (bounds)));
if (!register_operand (bounds, BNDmode))
bounds = copy_to_mode_reg (BNDmode, bounds);
Index: config/i386/i386.md
===
--- config/i386/i386.md (revision 225104)
+++ config/i386/i386.md (working copy)
@@ -18950,28 +18950,28 @@
(define_expand mode_mk
[(set (match_operand:BND 0 register_operand)
-(unspec:BND
- [(mem:bnd_ptr
- (match_par_dup 3
-[(match_operand:bnd_ptr 1 register_operand)
-(match_operand:bnd_ptr 2 address_mpx_no_base_operand)]))]
- UNSPEC_BNDMK))]
+ (unspec:BND
+ [(mem:bnd_ptr
+ (match_par_dup 3
+[(match_operand:bnd_ptr 1 register_operand)
+ (match_operand:bnd_ptr 2 address_mpx_no_base_operand)]))]
+ UNSPEC_BNDMK))]
TARGET_MPX
{
operands[3] = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, operands[1],
operands[2]),
-UNSPEC_BNDMK_ADDR);
+ UNSPEC_BNDMK_ADDR);
})
(define_insn *mode_mk
[(set (match_operand:BND 0 register_operand =w)
-(unspec:BND
- [(match_operator:bnd_ptr 3 bnd_mem_operator
-[(unspec:bnd_ptr
- [(match_operand:bnd_ptr 1 register_operand r)
-(match_operand:bnd_ptr 2 address_mpx_no_base_operand Tb)]
- UNSPEC_BNDMK_ADDR)])]
- UNSPEC_BNDMK))]
+ (unspec:BND
+ [(match_operator:bnd_ptr 3 bnd_mem_operator
+[(unspec:bnd_ptr
+ [(match_operand:bnd_ptr 1 register_operand r)
+(match_operand:bnd_ptr 2 address_mpx_no_base_operand Tb)]
+ UNSPEC_BNDMK_ADDR)])]
+ UNSPEC_BNDMK))]
TARGET_MPX
bndmk\t{%3, %0|%0, %3}
[(set_attr type mpxmk)])
@@ -18978,24 +18978,24 @@
(define_expand movmode
[(set (match_operand:BND 0 general_operand)
-(match_operand:BND 1 general_operand))]
+ (match_operand:BND 1 general_operand))]
TARGET_MPX
-{
- ix86_expand_move (MODEmode, operands);DONE;
-})
+ ix86_expand_move (MODEmode, operands); DONE;)
(define_insn *movmode_internal_mpx
[(set (match_operand:BND 0 nonimmediate_operand =w,m)
-(match_operand:BND 1 general_operand wm,w))]
+ (match_operand:BND 1 general_operand wm,w))]
TARGET_MPX
bndmov\t{%1, %0|%0, %1}
[(set_attr type mpxmov)])
(define_expand mode_bndcheck
- [(parallel [(unspec [(match_operand:BND 0 register_operand)
- (match_operand:bnd_ptr 1 address_no_seg_operand)]
BNDCHECK)
- (set (match_dup 2)
- (unspec:BLK [(match_dup 2)] UNSPEC_MPX_FENCE))])]
+ [(parallel
+ [(unspec
+ [(match_operand:BND 0 register_operand)
+(match_operand:bnd_ptr 1 address_no_seg_operand)] BNDCHECK)
+ (set (match_dup 2)
+ (unspec:BLK [(match_dup 2)] UNSPEC_MPX_FENCE))])]
TARGET_MPX
{
operands[2] = gen_rtx_MEM (BLKmode, operands[1]);
@@ -19003,84 +19003,69 @@
})
(define_insn *mode_bndcheck
- [(parallel [(unspec [(match_operand:BND 0 register_operand w)
-
Re: Move ABS detection from fold-const.c to match.pd
(this message looks like it was lost in my draft folder...) On Tue, 26 May 2015, Richard Biener wrote: +(match zerop integer_zerop) +(match zerop real_zerop) Would it also include fixed_zerop? Probably, yes. The main issue is that I know next to nothing about fixed-point types, so I am always unsure how to handle them (when I don't forget them completely). For instance, in the recently added -A CMP -B, we could probably replace (if (FLOAT_TYPE_P (TREE_TYPE (@0)) || (ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0)) TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (@0 with (if (FLOAT_TYPE_P (TREE_TYPE (@0)) || TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (@0))) Note that with inlining implemented it would duplicate the pattern for each match variant thus in this case adding a tree.[ch] function zerop () might be better. Ah... I actually thought we might end up moving things like integer_zerop from tree.c to match.pd, especially since predicates are not declared 'static'... Ok, reverse gear. Note that inlining does not seem necessary to implement more advanced predicates like negated_value_for_comparison in the parent message. + (simplify +(cnd (cmp @0 zerop) (convert?@2 @0) (negate@1 @2)) +(if (cmp == EQ_EXPR || cmp == UNEQ_EXPR) + @1) +(if (cmp == NE_EXPR || cmp == LTGT_EXPR) + (non_lvalue @2)) +(if (TYPE_SIGN (TREE_TYPE (@0)) == SIGNED /* implicit */ + TYPE_SIGN (type) == SIGNED + element_precision (type) = element_precision (TREE_TYPE (@0))) + (if (cmp == GE_EXPR || cmp == GT_EXPR + || (!flag_trapping_math (cmp == UNGE_EXPR || cmp == UNGT_EXPR))) + (abs @2)) + (if (cmp == LE_EXPR || cmp == LT_EXPR + || (!flag_trapping_math (cmp == UNLE_EXPR || cmp == UNLT_EXPR))) + (negate (abs @2) + /* Now with the branches swapped. */ + (simplify +(cnd (cmp @0 zerop) (negate@1 (convert?@2 @0)) @2) not obvious from a quick look - but would you be able to remove the swapped branch vairant if (cnd:c (cmp @0 zerop) X Y) would work by swapping X and Y? Hmm. How do I test if I am currently in the original or commuted version of the simplification? I could add a with block that defines truecmp as either cmp or invert_tree_comparison (cmp) and test that. Otherwise, I would need a test before each return as swapped versions don't return the same thing. It might make a slight difference on the handling of flag_trapping_math, but that handling already seems strange to me... The fold-const.c code doesn't seem to handle as many variants (esp. the swapping?), The fold-const.c function is called twice, once on regular operands, once with inverted comparison and swapped operands. I really don't think I am handling more cases (except maybe the silly a?a:0 is extended to unsigned). so maybe you can add a testcase that exercises some of the above on GIMPLE? So mostly the VEC_COND_EXPR version? We don't seem to have that much COND_EXPR left in gimple. -- Marc Glisse
Re: [VRP] Improve value ranges for unsigned division
On 26/06/15 04:27, Jeff Law wrote: On 06/24/2015 12:36 AM, Kugan wrote: On 23/06/15 01:09, Richard Biener wrote: On Sat, Jun 20, 2015 at 9:12 AM, Kugan kugan.vivekanandara...@linaro.org wrote: As discussed in PR64130, this patch improves the VRP value ranges for unsigned division. Bootstrapped and regression tested on x86_64-linux-gnu and regression tested on arm-none-linux-gnu with no new regression. Is this OK for trunk? Hum, the patch is at least incomplete not covering the cmp == -1 case in the max value computation, no? Thanks for the review. Attached patch adds this as well. Please add a testcase for the cmp == -1 case too. With that addition this is OK for the trunk. Committed as r225108 with the updated test-case after fresh bootstrap and regression testing for x86_64-linux-gnu. Thanks, Kugan jeff
Re: [PATCH] c/66516 - missing diagnostic on taking the address of a builtin function
Attached is a rewrite of the patch to enforce that GCC builtin
functions with no library equivalents are only used to make
calls or cast to void (or in sizeof and _Alignof expressions
as a GCC extension). This version of the patch also addresses
the requests made in responses to the first patch.
Bootstrapped and tested on x86_64-unknown-linux-gnu.
Martin
2015-06-28 Martin Sebor mse...@redhat.com
pr c/66516
* tree.h (DECL_IS_GCC_BUILTIN): New macro.
* doc/extend.texi (Other Builtins): Document when the address of
a builtin function can be taken.
2015-06-28 Martin Sebor mse...@redhat.com
pr c/66516
* c-tree.h (c_validate_addressable): New function.
* c-typeck.c (convert_arguments, parser_build_unary_op): Call it.
(build_conditional_expr, c_cast_expr, convert_for_assignment): Same.
(build_binary_op, c_objc_common_truthvalue_conversion): Same.
(c_validate_addressable): Define function.
2015-06-28 Martin Sebor mse...@redhat.com
pr c/66516
* call.c (build_conditional_expr_1): Call c_validate_addressable.
(convert_arg_to_ellipsis, convert_for_arg_passing): Same.
* cp-tree.h (cp_validate_addressable): New function.
* pt.c (convert_template_argument): Call it.
* typeck.c (cp_build_binary_op, cp_build_addr_expr_strict): Same.
(cp_build_unary_op, build_static_cast_1, build_reinterpret_cast_1):
Same.
(cp_build_c_cast, convert_for_assignment, convert_for_initialization):
Same.
(cp_validate_addressable): Define function.
2015-06-28 Martin Sebor mse...@redhat.com
pr c/66516
* g++.dg/addr_builtin-1.C: New test.
* gcc.dg/addr_builtin-1.c: New test.
* gcc.dg/lto/pr54702_1.c: Add a missing include directive.
diff --git a/gcc/c/c-tree.h b/gcc/c/c-tree.h
index 28b58c6..4219129 100644
--- a/gcc/c/c-tree.h
+++ b/gcc/c/c-tree.h
@@ -655,6 +655,7 @@ extern tree c_finish_transaction (location_t, tree, int);
extern bool c_tree_equal (tree, tree);
extern tree c_build_function_call_vec (location_t, veclocation_t, tree,
vectree, va_gc *, vectree, va_gc *);
+extern bool c_validate_addressable (const_tree, location_t = UNKNOWN_LOCATION);
/* Set to 0 at beginning of a function definition, set to 1 if
a return statement that specifies a return value is seen. */
diff --git a/gcc/c/c-typeck.c b/gcc/c/c-typeck.c
index 8e2696a..5fd3669 100644
--- a/gcc/c/c-typeck.c
+++ b/gcc/c/c-typeck.c
@@ -3340,6 +3340,10 @@ convert_arguments (location_t loc, veclocation_t arg_loc, tree typelist,
error (invalid_func_diag);
return -1;
}
+ else if (TREE_CODE (val) == ADDR_EXPR !c_validate_addressable (val))
+ {
+ return -1;
+ }
else
/* Convert `short' and `char' to full-size `int'. */
parmval = default_conversion (val);
@@ -3376,13 +3380,18 @@ struct c_expr
parser_build_unary_op (location_t loc, enum tree_code code, struct c_expr arg)
{
struct c_expr result;
-
- result.value = build_unary_op (loc, code, arg.value, 0);
result.original_code = code;
result.original_type = NULL;
+ if (c_validate_addressable (arg.value))
+{
+ result.value = build_unary_op (loc, code, arg.value, 0);
+
if (TREE_OVERFLOW_P (result.value) !TREE_OVERFLOW_P (arg.value))
overflow_warning (loc, result.value);
+}
+ else
+ result.value = error_mark_node;
return result;
}
@@ -4477,11 +4486,22 @@ build_conditional_expr (location_t colon_loc, tree ifexp, bool ifexp_bcp,
|| TREE_CODE (TREE_TYPE (op2)) == ERROR_MARK)
return error_mark_node;
+ if (TREE_CODE (TREE_TYPE (ifexp)) == POINTER_TYPE
+ !c_validate_addressable (ifexp,
+ EXPR_LOCATION (TREE_OPERAND (ifexp, 0
+return error_mark_node;
+
type1 = TREE_TYPE (op1);
code1 = TREE_CODE (type1);
type2 = TREE_TYPE (op2);
code2 = TREE_CODE (type2);
+ if (code1 == POINTER_TYPE !c_validate_addressable (op1))
+return error_mark_node;
+
+ if (code2 == POINTER_TYPE !c_validate_addressable (op2))
+return error_mark_node;
+
/* C90 does not permit non-lvalue arrays in conditional expressions.
In C99 they will be pointers by now. */
if (code1 == ARRAY_TYPE || code2 == ARRAY_TYPE)
@@ -5220,6 +5240,10 @@ c_cast_expr (location_t loc, struct c_type_name *type_name, tree expr)
type = groktypename (type_name, type_expr, type_expr_const);
warn_strict_prototypes = saved_wsp;
+ if (TREE_CODE (expr) == ADDR_EXPR !VOID_TYPE_P (type)
+ !c_validate_addressable (expr))
+return error_mark_node;
+
ret = build_c_cast (loc, type, expr);
if (type_expr)
{
@@ -5859,6 +5883,10 @@ convert_for_assignment (location_t location, location_t expr_loc, tree type,
rhs = require_complete_type (rhs);
if (rhs == error_mark_node)
return error_mark_node;
+
+ if (coder == POINTER_TYPE !c_validate_addressable (rhs))
+return error_mark_node;
+
/* A non-reference type can convert to a reference. This handles
va_start, va_copy and possibly port built-ins. */
if (codel == REFERENCE_TYPE coder != REFERENCE_TYPE)
@@ -10336,6
