[patch] libiberty/78584

[DJ Delorie]

While the root solution for the bug is "don't do that", we should at
least try to detect the obviously wrong case more gracefully.
Committed.

* argv.c (expandargv): Check for directories passed as @-files.

Index: argv.c
===
--- argv.c  (revision 243279)
+++ argv.c  (working copy)
@@ -32,12 +32,19 @@ Boston, MA 02110-1301, USA.  */
 /*  Routines imported from standard C runtime libraries. */
 
 #include 
 #include 
 #include 
 #include 
+#include 
+#ifdef HAVE_UNISTD_H
+#include 
+#endif
+#if HAVE_SYS_STAT_H
+#include 
+#endif
 
 #ifndef NULL
 #define NULL 0
 #endif
 
 #ifndef EOS
@@ -384,22 +391,34 @@ expandargv (int *argcp, char ***argvp)
   char *buffer;
   /* Dynamically allocated storage for the options read from the
 response file.  */
   char **file_argv;
   /* The number of options read from the response file, if any.  */
   size_t file_argc;
+#ifdef S_ISDIR
+  struct stat sb;
+#endif
   /* We are only interested in options of the form "@file".  */
   filename = (*argvp)[i];
   if (filename[0] != '@')
continue;
   /* If we have iterated too many times then stop.  */
   if (-- iteration_limit == 0)
{
  fprintf (stderr, "%s: error: too many @-files encountered\n", 
(*argvp)[0]);
  xexit (1);
}
+#ifdef S_ISDIR
+  if (stat (filename+1, &sb) < 0)
+   continue;
+  if (S_ISDIR(sb.st_mode))
+   {
+ fprintf (stderr, "%s: error: @-file refers to a directory\n", 
(*argvp)[0]);
+ xexit (1);
+   }
+#endif
   /* Read the contents of the file.  */
   f = fopen (++filename, "r");
   if (!f)
continue;
   if (fseek (f, 0L, SEEK_END) == -1)
goto error;

[PING][PATCH] [AArch64] Fix PR71112

[Hurugalawadi, Naveen]

Hi,

Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.

https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02305.html

Thanks,
Naveen

[PING][PATCH] [AArch64] Fix PR78382

[Hurugalawadi, Naveen]

Hi,

Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.

https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02078.html

Thanks,
Naveen

[PING] [PATCH] [AArch64] Fix PR71727

[Hurugalawadi, Naveen]

Hi,

Please consider this as a personal reminder to review the patch
at following link and let me know your comments on the same.

https://gcc.gnu.org/ml/gcc-patches/2016-11/msg00697.html

Thanks,
Naveen  

Re: [PATCH v2,rs6000] Add built-in function support for Power9 byte instructions.

[David Edelsohn]

Kelvin,

This version shows a lot of improvement.

(cmprb): New expansion.
(*cmprb): New insn.
(*setb): New insn.
(cmprb2): New expansion.
(*cmprb2): New insn.
(cmpeqb): New expansion.
(*cmpeqb): New insn.

The named and un-named patterns should have different names.
Technically, the names don't have to be unique, but the precedent is
for different names, often "foo" and "*foo_internal".

Thanks, David

Re: [PR middle-end/78566] Fix uninit regressions caused by previous -Wmaybe-uninit change

[Jeff Law]

On 11/29/2016 09:33 AM, Aldy Hernandez wrote:

This fixes the gcc.dg/uninit-pred-6* failures I seem to have caused on
some non x86 platforms. Sorry for the delay.

The problem is that my fix for PR61409 had the logic backwards.  I was
proving that all the uses of a PHI are invalidated by any one undefined
PHI path, whereas what we want is to prove that EVERY uninitialized path
is invalidated by some facor in the PHI use.

The attached patch fixes this without causing any regressions on x86-64
Linux.  I also verified that at least on [arm-none-linux-gnueabihf
--with-cpu=cortex-a5 --with-fpu=vfpv3-d16-fp16], there are no
gcc.dg/*uninit* regressions.

There is still one regression at large involving a double free in
PR78548 which I will look at next/independently.

OK for trunk?
Aldy

curr


commit 469f4c38a48bc284c268b40f5d5511f015844ea2
Author: Aldy Hernandez 
Date:   Tue Nov 29 05:59:53 2016 -0500

PR middle-end/78566
* tree-ssa-uninit.c (can_one_predicate_be_invalidated_p): Change
argument type to a pred_chain.
(can_chain_union_be_invalidated_p): Use pred_chain instead of a
worklist.
(flatten_out_predicate_chains): Remove.
(uninit_uses_cannot_happen): Rename from
uninit_ops_invalidate_phi_use.
Change logic so that we are checking that the PHI use will
invalidate _ALL_ possibly uninitialized operands.
(is_use_properly_guarded): Rename call to
uninit_ops_invalidate_phi_use into uninit_uses_cannot_happen.
This walk through is mostly for the historical record as I suspect we'll 
be in here again in the future...  And it helps me organize my own 
thoughts as I walk through the code.  I can't keep it all in my head :-)



Anyway, so you have a set of PHI args that are potentially undefined. 
Those args (of course) are associated with control paths through the CFG.


You also have a set of uses of the PHI which are themselves associated 
with control paths through the CFG.


If none of the uninitialized PHI arguments can flow to the PHI uses, 
then no warning needs to be emitted as the path in question can not 
occur at runtime (and one might argue we want to mark that path for 
potential isolation/optimization or for other "may-be" analysis).


find_uninit_use iterates over the uses of the PHI result and calls 
is_use_properly_guarded for each.


is_use_properly_guarded will call uninit_uses_cannot_happen to see if 
the given use can or can not be reached by paths including the 
uninitialized PHI arguments.


uninit_uses_cannot_happen builds the predicate for each uninitialized 
PHI argument then uses can_chain_union_be_invalidated to see if the 
argument's predicate ensures the use can not be reached.  If that is 
true for all the PHI args, then we return true, false otherwise.


can_chain_union_be_invalidated invalidates things one predicate at a 
time using can_one_predicate_be_invalidated.  If all can be invalidated, 
then it returns true, false otherwise.




OK.

jeff

Re: Ping 4 [PATCH] enhance buffer overflow warnings (and c/53562)

[Martin Sebor]

I lost track of this patch among all the others but I don't see
a reply to it in the archives.

  https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02173.html

The only controversial part about this one that I recall was whether
object size type 0 or 1 should be used for raw memory functions like
memcpy.  The last patch uses type-0 to resolve the concern.

On 11/21/2016 05:18 PM, Martin Sebor wrote:

Ping: https://gcc.gnu.org/ml/gcc-patches/2016-11/msg00896.html

On 11/16/2016 08:58 AM, Martin Sebor wrote:

I'm still looking for a review of the patch below, first posted
on 10/28 and last updated/pinged last Wednesday:

  https://gcc.gnu.org/ml/gcc-patches/2016-11/msg00896.html

Thanks

On 11/09/2016 03:49 PM, Martin Sebor wrote:

The attached minor update to the patch also resolves bug 77784 that
points out that -Wformat-length issues a warning also issued during
the expansion of some of the __builtin___sprintf_chk intrinsics.

Martin

On 11/04/2016 02:16 PM, Martin Sebor wrote:

Attached is an update to the patch that takes into consideration
the feedback I got.  It goes back to adding just one option,
-Wstringop-overflow, as in the original, while keeping the Object
Size type as an argument.  It uses type-1 as the default setting
for string functions (strcpy et al.) and, unconditionally, type-0
for raw memory functions (memcpy, etc.)

I retested Binutils 2.27 and the Linux kernel again with this patch
and also added Glibc, and it doesn't complain about anything (both
Binutils and the kernel also build cleanly with an unpatched GCC
with_FORTIFY_SOURCE=2 or its rough equivalent for the kernel).
The emit-rtl.c warning (bug 78174) has also been suppressed by
the change to bos type-0 for memcpy.

While the patch doesn't trigger any false positives (AFAIK) it is
subject to a fair number of false negatives due to the limitations
of the tree-object-size pass, and due to transformations done by
other passes that prevent it from detecting some otherwise obvious
overflows.  Although unfortunate, I believe the warnings that are
emitted are useful as the first line of defense in software that
doesn't use _FORTIFY_SOURCE (such as GCC itself).   And this can
of course be improved if some of the limitations are removed over
time.

Martin

[PATCH v2,rs6000] Add built-in function support for Power9 byte instructions.

[Kelvin Nilsen]

This patch adds built-in function support for the new setb, cmprb, and
cmpeqb Power9 instructions.  This second version of the patch differs
from the first in the following ways:

1. Removed the UNSPEC_SETB new unspec value.  Rewrote these patterns to
describe semantics in terms of primitive RTL.

2. Changed the names of the cmprb_p, cmprb2_p, and cmpeqb_p define_insn
patterns to cmprb, cmprb2, and cmpeqb respectively.

3. Fixed two typos in the ChangeLog file.

4. Fixed comments that describe the cmprb and cmprb2 define_expand
patterns.

5. Fixed comments that describe the *cmprb, *setb, and *cmprb2
define_insn patterns.

6. Removed trailing space in description of the cmpeqb define_expand
pattern.

The patch has been bootstrapped and tested on
powerpc64le-unknown-linux and powerpc-unknown-linux (big-endian, with
both -m32 and -m64 target options) with no regressions.

Is this ok for the trunk?

gcc/testsuite/ChangeLog:

2016-12-05  Kelvin Nilsen  

* gcc.target/powerpc/byte-in-either-range-0.c: New test.
* gcc.target/powerpc/byte-in-either-range-1.c: New test.
* gcc.target/powerpc/byte-in-range-0.c: New test.
* gcc.target/powerpc/byte-in-range-1.c: New test.
* gcc.target/powerpc/byte-in-set-0.c: New test.
* gcc.target/powerpc/byte-in-set-1.c: New test.
* gcc.target/powerpc/byte-in-set-2.c: New test.


gcc/ChangeLog:

2016-12-05  Kelvin Nilsen  

* config/rs6000/altivec.md (UNSPEC_CMPRB): New unspec value.
(UNSPEC_CMPRB2): New unspec value.
(UNSPEC_CMPEQB): New unspec value.
(cmprb): New expansion.
(*cmprb): New insn.
(*setb): New insn.
(cmprb2): New expansion.
(*cmprb2): New insn.
(cmpeqb): New expansion.
(*cmpeqb): New insn.
* config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_AV_2): New macro.
(BU_P9_OVERLOAD_2): Likewise.
(CMPRB): Add byte-in-range built-in function.
(CMBRB2): Add byte-in-either-range built-in function.
(CMPEQB): Add byte-in-set built-in function.
(CMPRB): Add overload support for byte-in-range function.
(CMPRB2): Add overload support for byte-in-either-range function.
(CMPEQB): Add overload support for byte-in-set built-in function.
* config/rs6000/rs6000-c.c (P9V_BUILTIN_SCALAR_CMPRB): Macro
expansion to define argument types for new builtin.
(P9V_BUILTIN_SCALAR_CMPRB2): Likewise.
(P9V_BUILTIN_SCALAR_CMPEQB): Likewise.
* doc/extend.texi (PowerPC AltiVec Built-in Functions): Rearrange
the order of presentation for certain built-in functions
(scalar_extract_exp, scalar_extract_sig, scalar_insert_exp)
(scalar_cmp_exp_gt, scalar_cmp_exp_lt, scalar_cmp_exp_eq)
(scalar_cmp_exp_unordered, scalar_test_data_class)
(scalar_test_neg) to improve locality and flow.  Document
the new __builtin_scalar_byte_in_set,
__builtin_scalar_byte_in_range, and
__builtin_scalar_byte_in_either_range functions.


Index: gcc/config/rs6000/altivec.md
===
--- gcc/config/rs6000/altivec.md(revision 241245)
+++ gcc/config/rs6000/altivec.md(working copy)
@@ -153,6 +153,9 @@
UNSPEC_BCDADD
UNSPEC_BCDSUB
UNSPEC_BCD_OVERFLOW
+   UNSPEC_CMPRB
+   UNSPEC_CMPRB2
+   UNSPEC_CMPEQB
 ])
 
 (define_c_enum "unspecv"
@@ -3709,6 +3712,138 @@
   "darn %0,1"
   [(set_attr "type" "integer")])
 
+;; Predicate: test byte within range.
+;; Return in target register operand 0 a value of 1 if the byte
+;; held in bits 24:31 of operand 1 is within the inclusive range
+;; bounded above by operand 2's bits 0:7 and below by operand 2's
+;; bits 8:15.  Otherwise, set register operand 0 to 0.
+(define_expand "cmprb"
+  [(set (match_dup 3)
+   (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
+   (match_operand:SI 2 "gpc_reg_operand" "r")]
+UNSPEC_CMPRB))
+   (set (match_operand:SI 0 "gpc_reg_operand" "=r")
+   (if_then_else:SI (lt (match_dup 3)
+(const_int 0))
+(const_int -1)
+(if_then_else (gt (match_dup 3)
+  (const_int 0))
+  (const_int 1)
+  (const_int 0]
+  "TARGET_P9_MISC"
+{
+  operands[3] = gen_reg_rtx (CCmode);
+})
+
+;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 iff the
+;; byte found in bits 24:31 of register operand 1 is within the
+;; inclusive range bounded above by operand 2's bits 0:7 and below by
+;; operand 2's bits 8:15.  The other 3 bits of the target CR register
+;; are set to 0.
+(define_insn "*cmprb"
+  [(set (match_operand:CC 0 "cc_reg_operand" "=y")
+   (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r")
+   (match_operand:SI 2 "gpc_reg_operand" "r")]
+UNSPEC_CMPRB

Re: [PATCH] detect null sprintf pointers (PR 78519)

[Martin Sebor]

On 12/05/2016 11:21 AM, Jeff Law wrote:

On 12/04/2016 04:55 PM, Martin Sebor wrote:

Bug 78519 points out that while the -Wformat warning flags a small
subset of sprintf calls with a null pointer argument to a %s directive
(those where the pointer is a constant) it misses the much bigger
set where the pointer is not a constant but instead is determined
to be null as a result of optimization.  This is because -Wformat
runs too early, before any of the optimization passes that make it
possible to detect that non-constant pointers are null.

With the -Wformat-length warning running much later than -Wformat,
it's trivial to detect and diagnose these types of bugs with it.
The attached patch adds this warning, along with the ability to
detect a null destination pointer when it's required to be non-null
(this is in all of the {v,}sprintf functions and in {v,}snprintf
when the size argument is not zero).

Ultimately, the destination pointer argument (but not the format
string) to the {v,}sprintf functions needs to be declared nonnull
(pursuant to bug 78673) and the null-checking moved elsewhere.
I'm testing a follow-on patch that does just that but I post this
fix in the meantime since its main focus is the null %s argument.

Martin


gcc-78519.diff


PR middle-end/78519 - missing warning for sprintf %s with null pointer

gcc/ChangeLog:

PR middle-end/78519
* gimple-ssa-sprintf.c (format_string): Handle null pointers.
(format_directive): Diagnose null pointer arguments.
(pass_sprintf_length::handle_gimple_call): Diagnose null destination
pointers.  Correct location of null format string in diagnostics.

gcc/testsuite/ChangeLog:

PR middle-end/78519
* gcc.dg/tree-ssa/builtin-sprintf-warn-7.c: New test.

diff --git a/gcc/gimple-ssa-sprintf.c b/gcc/gimple-ssa-sprintf.c
index e86c4dc..7004f09 100644
--- a/gcc/gimple-ssa-sprintf.c
+++ b/gcc/gimple-ssa-sprintf.c
@@ -433,7 +433,7 @@ struct result_range
 struct fmtresult
 {
   fmtresult ()
-  : argmin (), argmax (), knownrange (), bounded (), constant ()
+  : argmin (), argmax (), knownrange (), bounded (), constant (),
nullp ()
   {
 range.min = range.max = HOST_WIDE_INT_MAX;
   }
@@ -461,6 +461,9 @@ struct fmtresult
  are also constant (such as determined by constant propagation,
  though not value range propagation).  */
   bool constant;
+
+  /* True when the argument is a null pointer.  */
+  bool nullp;
 };

 /* Description of a conversion specification.  */
@@ -1624,6 +1627,20 @@ format_string (const conversion_spec &spec,
tree arg)
   res.range.min = 0;
 }
 }
+  else if (arg && integer_zerop (arg))
+{
+  /* Handle null pointer argument.  */
+
+  fmtresult res;
+  /* Set the range based on Glibc "(null)" output but leave
+ all other members at default to indicate that the range
+ isn't trustworthy.  This allows the rest of the format
+ string to be checked for problems.  */

By not trustworthy, I guess you mean it's only used to issue "may be"
style warnings, right?  What benefit do you gain by encoding the
glib-ism vs using HOST_WIDE_INT_MAX?  Presumably once you use
HOST_WIDE_INT_MAX nothing else is going to be checked?


By not trustworthy I mean that the result  can't be used for any
sort of optimization, including setting the range on the return
value. That's the case whenever the pass finds anything wrong,
including unspecified or implementation-defined behavior.

I suppose setting a range seemed better than giving up.  Then again,
since with this patch GCC will warn on null %s pointers there may
not be much point in trying to see if there's also some other
problem after that, except perhaps in code that deliberately relies
on the Glibc feature.  I'd be fine with just stopping at this point
if you prefer.

Martin

Re: [PATCH] handle integer overflow/wrapping in printf directives (PR 78622)

[Martin Sebor]

On 12/05/2016 01:26 PM, Jakub Jelinek wrote:

Hi!

On Thu, Dec 01, 2016 at 07:31:18PM -0700, Martin Sebor wrote:

+static bool
+adjust_range_for_overflow (tree dirtype, tree *argmin, tree *argmax)
+{
+  if (TYPE_UNSIGNED (dirtype))
+{
+  *argmin = dirmin;
+  *argmax = dirmax;
+}
+  else
+{
+  *argmin = integer_zero_node;
+  *argmax = dirmin;
+}


I still don't really like this mixing of ranges of values and picking of values
which result in shortest and longest representation, it is confusing and
will be a maintainance nightmare.

IMHO much cleaner is first figure out the range the argument (in argtype)
has.  I.e. look at VR_RANGE and if it is missing, perhaps find out another
argtype and in any case, use TYPE_{MIN,MAX}_VALUE (argtype) as the range.
I think that should probably be the range presented to the user in
diagnostics (i.e. res.arg{min,max}).

Next step is to adjust this range for the case where dirtype is different
from argtype.  This should be done regardless of what way you get the first
range from (whether from VR_RANGE or VR_VARYING etc.).  The result of this
still should be a range of values in dirtype.

And the last step should be to pick the values from that range which
has shortest and longest representation.  For unsigned dirtype
that are the bounds of the range from earlier step, for signed dirtype
something different (if both bounds are >= 0, then also just those bounds,
if both bounds are < 0, then the bounds swapped, otherwise 0 as minimum,
then e.g. try both bounds what has longer representation, or take some short
path e.g. if abs of the negative bound is >= the positive bound, then use
the negative bound as longest, otherwise try both).


I take this as your confirmation that the function does do the right
thing.  If not, or if you can't confirm that, it would be helpful if
you could let me know so that I can ask Richard to look it over.

The pass already does pretty much what you describe but I was able
to simplify the format_integer function somewhat and also arrange
for the informational note mentioning the range of argument values
to more closely reflect what I think you suggest.

With the attached patch the following example produces the output
below.  In the first function, because the pass uses the actual
argument range unchanged, the warning prints the exact byte count
and the note the original range.  In the second function, the range
must be adjusted to that of the directive's type, and the warning
prints a range of bytes and the note says "using the range [0, -128]"
to indicate that it used a different range than the range of
the actual argument.  It might be possible to change the note to
say something like "using the range of type 'signed char' or
something like that, to make it even clearer that the whole range
of the type is being used.  But these further tweaks should be made
independently of this patch, perhaps as part bug 77696 if and when
I get to it.

Martin

$ cat b.c && /build/gcc-78622/gcc/xgcc -B /build/gcc-78622/gcc -O2 -S 
-Wall -Wextra -Wpedantic b.c

char d[1];

void f (int i)
{
  if (i < 1024 || 1033 < i) i = 1024;

  __builtin_sprintf (d + 1, "%hhi", i);
}

void g (int i)
{
  if (i < 1024 || 3456 < i) i = 1024;

  __builtin_sprintf (d + 1, "%hhi", i);
}

b.c: In function ‘f’:
b.c:7:30: warning: ‘%hhi’ directive writing 1 byte into a region of size 
0 [-Wformat-length=]

   __builtin_sprintf (d + 1, "%hhi", i);
  ^~~~
b.c:7:29: note: directive argument in the range [1024, 1033]
   __builtin_sprintf (d + 1, "%hhi", i);
 ^~
b.c:7:3: note: format output 2 bytes into a destination of size 0
   __builtin_sprintf (d + 1, "%hhi", i);
   ^~~~
b.c: In function ‘g’:
b.c:14:30: warning: ‘%hhi’ directive writing between 1 and 4 bytes into 
a region of size 0 [-Wformat-length=]

   __builtin_sprintf (d + 1, "%hhi", i);
  ^~~~
b.c:14:29: note: using the range [0, -128] for directive argument
   __builtin_sprintf (d + 1, "%hhi", i);
 ^~
b.c:14:3: note: format output between 2 and 5 bytes into a destination 
of size 0

   __builtin_sprintf (d + 1, "%hhi", i);
   ^~~~

PR middle-end/78622 - [7 Regression] -Wformat-length/-fprintf-return-value incorrect with overflow/wrapping

gcc/ChangeLog:

	PR middle-end/78622
	* gimple-ssa-sprintf.c (min_bytes_remaining): Use res.knownrange
	rather than res.bounded.
	(adjust_range_for_overflow): New function.
	(format_integer): Always set res.bounded to true unless either
	precision or width is specified and unknown.
	Call adjust_range_for_overflow.
	(format_directive): Remove vestigial quoting.  Always inform of
	argument value or range when it's available.
	(add_bytes): Correct the computation of boundrange used to
	decide whether a warning is of a "maybe" or "defnitely" kind.

gcc/testsuite/ChangeLog:

	PR middle-end

Re: [RFC] Assert DECL_ABSTRACT_ORIGIN is different from the decl itself

[Jeff Law]

On 12/01/2016 09:10 AM, Martin Jambor wrote:

Hello,

On Wed, Nov 30, 2016 at 02:09:19PM +0100, Martin Jambor wrote:

On Tue, Nov 29, 2016 at 10:17:02AM -0700, Jeff Law wrote:


...

So it seems that rather than an assert that we should just not walk down a
self-referencing DECL_ABSTRACT_ORIGIN.



...

So I wonder what the options are... perhaps it seems that we can call
dump_function_name which starts with code handling
!DECL_LANG_SPECIFIC(t) cases, even instead of the weird 
thing?


The following patch does that, it works as expected on my small
testcases, brings g++ in line with what gcc does with clones when it
comes to OpenMP outline functions and obviously prevents the infinite
recursion.

It passes bootstrap and testing on x86_64-linux.  OK for trunk?

Thanks,


2016-11-30  Martin Jambor  

PR c++/78589
* error.c (dump_decl): Use dump_function_name to dump
!DECL_LANG_SPECIFIC function decls with no or self-referencing
abstract origin.

OK.
jeff

[patch, fortran] [F03] Spurious "requires DTIO" reported against namelist statement

[Jerry DeLisle]

The attached patch removes one error message and updates several test cases.

I split alloc_comp_constraint_1.f90 into two cases with the addition of 
alloc_comp_constraint_7.f90. One gets different error messages depending on 
which standard is invoked, f95 or f2003.


I will do an appropriate Changelog for testsuite.

Regression tested on linux-x86_64, OK for trunk?

Regards,

Jerry

2016-12-05  Jerry DeLisle  

PR fortran/78659
* resolve.c (resolve_fl_namelist): Remove unneeded error.
diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c
index 7bc9f5f5..e4ea10f2 100644
--- a/gcc/fortran/resolve.c
+++ b/gcc/fortran/resolve.c
@@ -13900,15 +13900,7 @@ resolve_fl_namelist (gfc_symbol *sym)
 			   "or POINTER components", nl->sym->name,
 			   sym->name, &sym->declared_at))
 	return false;
-
-	  if (!dtio)
-	{
-	  gfc_error ("NAMELIST object %qs in namelist %qs at %L has "
-			"ALLOCATABLE or POINTER components and thus requires "
-			"a defined input/output procedure", nl->sym->name,
-			sym->name, &sym->declared_at);
-	  return false;
-	}
+	  return true;
 	}
 }
 
diff --git a/gcc/testsuite/gfortran.dg/alloc_comp_constraint_1.f90 b/gcc/testsuite/gfortran.dg/alloc_comp_constraint_1.f90
index eb1b1058..e1715256 100644
--- a/gcc/testsuite/gfortran.dg/alloc_comp_constraint_1.f90
+++ b/gcc/testsuite/gfortran.dg/alloc_comp_constraint_1.f90
@@ -1,5 +1,6 @@
 ! { dg-do compile }
-! Check that we don't allow IO or NAMELISTs with types with allocatable
+! { dg-options -std=f2003 }
+! Check that we don't allow IO of NAMELISTs with types with allocatable
 ! components (PR 20541)
 program main
 
@@ -13,8 +14,8 @@ program main
 
 type(foo) :: a
 type(bar) :: b
-namelist /blah/ a ! { dg-error "has ALLOCATABLE or POINTER components and thus requires a defined input/output" }
-
+namelist /blah/ a  ! This is allowed under F2003, but not F95
+! The following require User Defined Derived Type I/O procedures.
 write (*, *) a  ! { dg-error "cannot have ALLOCATABLE components" }
 
 read (*, *) b  ! { dg-error "cannot have ALLOCATABLE components" }
diff --git a/gcc/testsuite/gfortran.dg/alloc_comp_constraint_7.f90 b/gcc/testsuite/gfortran.dg/alloc_comp_constraint_7.f90
new file mode 100644
index ..35b8e1f0
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/alloc_comp_constraint_7.f90
@@ -0,0 +1,19 @@
+! { dg-do compile }
+! { dg-options -std=f95 }
+! Check that we don't allow types with allocatable
+program main
+
+type :: foo
+integer :: k
+integer, allocatable :: x(:) ! { dg-error "Fortran 2003: ALLOCATABLE" }
+end type foo
+
+type :: bar
+type(foo) :: x
+end type bar
+
+type(foo) :: a
+type(bar) :: b
+namelist /blah/ a
+
+end program main
diff --git a/gcc/testsuite/gfortran.dg/namelist_34.f90 b/gcc/testsuite/gfortran.dg/namelist_34.f90
index 94327710..be8f49f7 100644
--- a/gcc/testsuite/gfortran.dg/namelist_34.f90
+++ b/gcc/testsuite/gfortran.dg/namelist_34.f90
@@ -1,7 +1,7 @@
 ! { dg-do compile }
-!
+! { dg-options -std=f95 }
 ! PR fortran/32905 - accepts types with ultimate POINTER components
-!
+! updated for PR78659
 MODULE types
   type :: tp3
 real :: x
@@ -22,7 +22,7 @@ MODULE nml
 USE types
type(tp1) :: t1
type(tp3) :: t3
-
-   namelist /a/ t1! { dg-error "has ALLOCATABLE or POINTER components and thus requires a defined input/output" }
-   namelist /b/ t3! { dg-error "has ALLOCATABLE or POINTER components and thus requires a defined input/output" }
+! The following are allowed under f2003.
+   namelist /a/ t1! { dg-error "with ALLOCATABLE or POINTER components" }
+   namelist /b/ t3! { dg-error "with ALLOCATABLE or POINTER components" }
 END MODULE
diff --git a/gcc/testsuite/gfortran.dg/namelist_63.f90 b/gcc/testsuite/gfortran.dg/namelist_63.f90
index 02101740..de27b82d 100644
--- a/gcc/testsuite/gfortran.dg/namelist_63.f90
+++ b/gcc/testsuite/gfortran.dg/namelist_63.f90
@@ -1,6 +1,6 @@
 ! { dg-do compile }
-!
-! PR fortran/45530
+! { dg-options -std=f95 }
+! PR fortran/45530, updated for PR78659
 !
 ! Contributed by david.sa...@gmail.com
 !
@@ -24,5 +24,6 @@ type region_struct
 end type
 
 type (c_struct) curve(10)
-namelist / params / curve ! { dg-error "ALLOCATABLE or POINTER components and thus requires a defined input/output" }
+! The following is allowed with f2003.
+namelist / params / curve ! { dg-error "ALLOCATABLE or POINTER components" }
 end program

[PATCH], Committed, PR target/78688, fix PowerPC bootstrap issue

[Michael Meissner]

A recent change to enable signed vs. unsigned comparisons to be flagged as an
error broke the PowerPC bootstrap.

The issue was with the FUNCTION_VALUE_REGNO_P macro.  I changed it and the
FUNCTION_ARG_REGNO_P to both use IN_RANGE instead of doing a subtraction of the
first value and comparing it to the second value minus the first value plus 1.

I committed this patch as obvious to get the PowerPC bootstrapping once again.
Segher, if you want me to reformat it let me know.

2016-12-05  Michael Meissner  

PR target/78688
* config/rs6000/rs6000.h (FUNCTION_VALUE_REGNO_P): Use IN_RANGE
instead of ((N) >= (X) && (N) <= (Y-X)) to silence warnings about
comparing signed to unsigned values.
(FUNCTION_ARG_REGNO_P): Likewise.

Index: gcc/config/rs6000/rs6000.h
===
--- gcc/config/rs6000/rs6000.h  (revision 243270)
+++ gcc/config/rs6000/rs6000.h  (working copy)
@@ -1866,19 +1866,19 @@ extern enum reg_class rs6000_constraints
On RS/6000, this is r3, fp1, and v2 (for AltiVec).  */
 #define FUNCTION_VALUE_REGNO_P(N)  \
   ((N) == GP_ARG_RETURN
\
-   || ((N) >= FP_ARG_RETURN && (N) <= FP_ARG_MAX_RETURN
\
+   || (IN_RANGE ((N), FP_ARG_RETURN, FP_ARG_MAX_RETURN)
\
&& TARGET_HARD_FLOAT && TARGET_FPRS)\
-   || ((N) >= ALTIVEC_ARG_RETURN && (N) <= ALTIVEC_ARG_MAX_RETURN  \
+   || (IN_RANGE ((N), ALTIVEC_ARG_RETURN, ALTIVEC_ARG_MAX_RETURN)  \
&& TARGET_ALTIVEC && TARGET_ALTIVEC_ABI))
 
 /* 1 if N is a possible register number for function argument passing.
On RS/6000, these are r3-r10 and fp1-fp13.
On AltiVec, v2 - v13 are used for passing vectors.  */
 #define FUNCTION_ARG_REGNO_P(N)
\
-  ((unsigned) (N) - GP_ARG_MIN_REG < GP_ARG_NUM_REG\
-   || ((unsigned) (N) - ALTIVEC_ARG_MIN_REG < ALTIVEC_ARG_NUM_REG  \
+  (IN_RANGE ((N), GP_ARG_MIN_REG, GP_ARG_MAX_REG)  \
+   || (IN_RANGE ((N), ALTIVEC_ARG_MIN_REG, ALTIVEC_ARG_MAX_REG)
\
&& TARGET_ALTIVEC && TARGET_ALTIVEC_ABI)
\
-   || ((unsigned) (N) - FP_ARG_MIN_REG < FP_ARG_NUM_REG
\
+   || (IN_RANGE ((N), FP_ARG_MIN_REG, FP_ARG_MAX_REG)  \
&& TARGET_HARD_FLOAT && TARGET_FPRS))
 
 /* Define a data type for recording info about an argument list

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797

[Aarch64][PATCH] Fix gcc.dg/zero_bits_compound-2.c for aarch64

[Michael Collison]

This patches fixes a regression in gcc.dg/zero_bits_compound-2.c. A recent 
patch (https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02392.html)
to the aarch64 backend improved generation for 'and' instructions with 
constants. The patch changed the number of 'and' instruction generated
 at the assembly level causing the test case to fail. This patch fixes the test 
case for aarch64 by verifies the 'and' insns at the rtl level instead at 
assembly time.

A 'make check' was successfully completed aarch64-linux-gnu and 
x86_64-linux-gnu.

Okay for trunk?



2016-12-5  Michael Collison  

* gcc.dg/zero_bits_compound-2.c: Fix test for aarch64.


gnutools-7077.patch
Description: gnutools-7077.patch

[PATCH] add missing attribute nonnull to stdio functions (PR 78673 and 17308)

[Martin Sebor]

The new -Wformat-length warning pass detects and diagnoses non-
constant null format strings.  This is in addition to (but not
in conflict with) -Wformat which is limited to detecting only
null constants.

A recently posted patch of mine also adds the detection of null
pointer arguments to the %s directive, and null destination
pointers:

  https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00304.html

After I put that patch together and tested it I realized that
detecting null pointers is the business of the -Wnonnull warning
and would be better handled more generally for all functions
decorated with attribute nonnull.  I set out to look for a better
place to issue the non-constant null pointer format string (and
other sprintf-related) warnings.  In the process I discovered that
some of the sprintf functions (quite a few in fact) are missing
this attribute on some of their arguments.

The attached patch adds the nonnull attribute missing from some
of the stdio functions.  To achieve parity with -Wformat-length,
and to also resolve the ancient request in bug 17308 for more
useful nonnull warnings, the patch also adds the attribute nonnull
handling to the middle end so that all known null pointers can be
detected and diagnosed, not just constants.

To avoid duplicating warnings issued by the front and middle ends
I made the warning conditional on optimization in both (the front
end issues its diagnostics when not optimizing, the middle end
when optimizing).  I did this so as not to suppress warnings that
GCC issues only without optimization (e.g., for memcpy(0, 0, 0)).
Since these calls are eliminated I don't think thee warnings for
them are terribly important so if there's a preference for issuing
the warning just in the middle end I'm open to removing the front
end code.

Martin
PR c/78673 - sprintf missing attribute nonnull on destination argument
PR c/17308 - nonnull attribute not as useful as it could be

gcc/ChangeLog:

	PR c/78673
	PR c/17308
	* builtin-attrs.def (ATTR_NONNULL_1_1, ATTR_NONNULL_1_2): Defined.
	(ATTR_NONNULL_1_3, ATTR_NONNULL_1_4, ATTR_NONNULL_1_5): Same.
	(ATTR_NOTHROW_NONNULL_1_1, ATTR_NOTHROW_NONNULL_1_2): Same.
	(ATTR_NOTHROW_NONNULL_1_3, ATTR_NOTHROW_NONNULL_1_4): Same.
	(ATTR_NOTHROW_NONNULL_1_5): Same.
	(ATTR_NONNULL_1_FORMAT_PRINTF_1_2): Same.
	(ATTR_NONNULL_1_FORMAT_PRINTF_2_0): Same.
	(ATTR_NONNULL_1_FORMAT_PRINTF_2_3): Same.
	(ATTR_NONNULL_1_FORMAT_PRINTF_3_0): Same.
	(ATTR_NONNULL_1_FORMAT_PRINTF_3_4): Same.
	(ATTR_NONNULL_1_FORMAT_PRINTF_4_0): Same.
	(ATTR_NONNULL_1_FORMAT_PRINTF_4_5): Same.
	* builtins.c (validate_arg): Add argument.  Treat null pointers
	passed to nonnull arguments as invalid.
	(validate_arglist): Same.
	* builtins.def (fprintf, fprintf_unlocked): Add nonnull attribute.
	(printf, printf_unlocked, sprintf. vfprintf, vsprintf): Same.
	(__sprintf_chk, __vsprintf_chk, __fprintf_chk, __vfprintf_chk): Same.
	* calls.c (get_nonnull_ags, maybe_warn_null_arg): New functions.
	(initialize_argument_information): Diagnose null pointers passed to
	arguments declared nonnull.
	* calls.h (get_nonnull_args): Declared.

gcc/c-family/ChangeLog:

	PR c/78673
	PR c/17308
	* c-common.c (check_nonnull_arg): Disable when optimization
	is enabled.

gcc/testsuite/ChangeLog:

	PR c/78673
	PR c/17308
	* gcc.dg/builtins-nonnull.c: New test.

diff --git a/gcc/builtin-attrs.def b/gcc/builtin-attrs.def
index 1520d15..c55523e 100644
--- a/gcc/builtin-attrs.def
+++ b/gcc/builtin-attrs.def
@@ -72,6 +72,9 @@ DEF_ATTR_FOR_STRING (STR1, "1")
 		  ATTR_##VALUE1, ATTR_LIST_##VALUE2)
 DEF_LIST_INT_INT (1,0)
 DEF_LIST_INT_INT (1,2)
+DEF_LIST_INT_INT (1,3)
+DEF_LIST_INT_INT (1,4)
+DEF_LIST_INT_INT (1,5)
 DEF_LIST_INT_INT (2,0)
 DEF_LIST_INT_INT (2,3)
 DEF_LIST_INT_INT (3,0)
@@ -205,6 +208,40 @@ DEF_ATTR_TREE_LIST (ATTR_NOTHROW_NONNULL_4, ATTR_NONNULL, ATTR_LIST_4, \
 /* Nothrow functions whose fifth parameter is a nonnull pointer.  */
 DEF_ATTR_TREE_LIST (ATTR_NOTHROW_NONNULL_5, ATTR_NONNULL, ATTR_LIST_5, \
 			ATTR_NOTHROW_LIST)
+
+/* Same as ATTR_NONNULL_1.  */
+DEF_ATTR_TREE_LIST (ATTR_NONNULL_1_1, ATTR_NONNULL, ATTR_LIST_1, ATTR_NULL)
+/* Functions like {v,}fprintf whose first and second parameters are
+   nonnull pointers.  As cancellation points the functions are not
+   nothrow.  */
+DEF_ATTR_TREE_LIST (ATTR_NONNULL_1_2, ATTR_NONNULL, ATTR_LIST_1_2, ATTR_NULL)
+/* The following don't have {v,}fprintf forms.  They exist only to
+   make it possible to declare {v,}{f,s}printf attributes using
+   the same macro.  */
+DEF_ATTR_TREE_LIST (ATTR_NONNULL_1_3, ATTR_NONNULL, ATTR_LIST_1_3, ATTR_NULL)
+DEF_ATTR_TREE_LIST (ATTR_NONNULL_1_4, ATTR_NONNULL, ATTR_LIST_1_4, ATTR_NULL)
+DEF_ATTR_TREE_LIST (ATTR_NONNULL_1_5, ATTR_NONNULL, ATTR_LIST_1_5, ATTR_NULL)
+
+/* Same as ATTR_NOTHROW_NONNULL_1.  */
+DEF_ATTR_TREE_LIST (ATTR_NOTHROW_NONNULL_1_1, ATTR_NONNULL, ATTR_LIST_1,
+		ATTR_NOTHROW_LIST)
+/* Nothrow functions like {v,}sprintf whose first and second parameters
+   are nonnull pointers.  */

Re: [patch] Fix PR middle-end/78642

[Jeff Law]

On 12/05/2016 03:46 PM, Eric Botcazou wrote:

Hi,

this fixes the regressions introduced on SPARC by the newly reenabled RTL
sharing verification.  They come from the special treatment for CLOBBERs:

case CLOBBER:
   /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
 clobbers or clobbers of hard registers that originated as pseudos.
 This is needed to allow safe register renaming.  */
  if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
  && ORIGINAL_REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 0)))
return;

in verify_rtx_sharing, copy_rtx_if_shared_1 and copy_insn_1.  The problem is
that the property ORIGINAL_REGNO == REGNO is not invariant for hard registers,
because e.g. the leaf register optimization can change the REGNO.

Therefore the attached patch only checks what's documented in the comment.

Tested on x86-64/Linux and SPARC/Solaris, OK for the mainline?


2016-12-05  Eric Botcazou  

PR middle-end/78642
* emit-rtl.c (verify_rtx_sharing) : Relax condition.
(copy_rtx_if_shared_1) : Likewise.
(copy_insn_1) : Likewise.

OK.
jeff

Re: [tree-tailcall] Check if function returns it's argument

[Jeff Law]

On 12/02/2016 01:33 AM, Richard Biener wrote:

The LHS on the assignment makes it easier to identify when a tail call is
possible.  It's not needed for correctness.  Not having the LHS on the
assignment just means we won't get an optimized tail call.

Under what circumstances would the LHS possibly be removed?  We know the
return statement references the LHS, so it's not going to be something that
DCE will do.


Well, I thought Prathamesh added the optimization to copy-propagate
the lhs from the returned argument.  So we'd have both transforms here.
That seems like a mistake -- the fact that we can copy propagate the LHS 
from the returned argument is interesting, but in practice I've found it 
to not be useful to do so.


The problem is it makes the value look live across a the call and we're 
then dependent upon the register allocator to know the trick about the 
returned argument value and apply it consistently -- which it does not 
last I checked.


I think we're better off leaving the call in the form of LHS = call () 
if the return value is used.  That's going to be more palatable to tail 
calling.




Of course as always the user could have written the code in this way.

If the LHS is not required for correctness then I don't think we need
to put it there - Pratamesh verified the call is tail-called already
if marked by the tailcall pass, even if the LHS is not present.
But if the function returns the value from the tail call, then going 
through an LHS is the right thing to do.  Using the magic "argX will be 
the return value" seems clever, but actually hurts in practice.

jeff

[patch] Fix PR middle-end/78642

[Eric Botcazou]

Hi,

this fixes the regressions introduced on SPARC by the newly reenabled RTL 
sharing verification.  They come from the special treatment for CLOBBERs:

case CLOBBER:
   /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
 clobbers or clobbers of hard registers that originated as pseudos.
 This is needed to allow safe register renaming.  */
  if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
  && ORIGINAL_REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 0)))
return;

in verify_rtx_sharing, copy_rtx_if_shared_1 and copy_insn_1.  The problem is 
that the property ORIGINAL_REGNO == REGNO is not invariant for hard registers, 
because e.g. the leaf register optimization can change the REGNO.

Therefore the attached patch only checks what's documented in the comment.

Tested on x86-64/Linux and SPARC/Solaris, OK for the mainline?


2016-12-05  Eric Botcazou  

PR middle-end/78642
* emit-rtl.c (verify_rtx_sharing) : Relax condition.
(copy_rtx_if_shared_1) : Likewise.
(copy_insn_1) : Likewise.

-- 
Eric BotcazouIndex: emit-rtl.c
===
--- emit-rtl.c	(revision 243245)
+++ emit-rtl.c	(working copy)
@@ -2718,8 +2718,9 @@ verify_rtx_sharing (rtx orig, rtx insn)
   /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
  clobbers or clobbers of hard registers that originated as pseudos.
  This is needed to allow safe register renaming.  */
-  if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
-	  && ORIGINAL_REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 0)))
+  if (REG_P (XEXP (x, 0))
+	  && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
+	  && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0
 	return;
   break;
 
@@ -2970,8 +2971,9 @@ repeat:
   /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
  clobbers or clobbers of hard registers that originated as pseudos.
  This is needed to allow safe register renaming.  */
-  if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
-	  && ORIGINAL_REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 0)))
+  if (REG_P (XEXP (x, 0))
+	  && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
+	  && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0
 	return;
   break;
 
@@ -5521,8 +5523,9 @@ copy_insn_1 (rtx orig)
   /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
  clobbers or clobbers of hard registers that originated as pseudos.
  This is needed to allow safe register renaming.  */
-  if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER
-	  && ORIGINAL_REGNO (XEXP (orig, 0)) == REGNO (XEXP (orig, 0)))
+  if (REG_P (XEXP (orig, 0))
+	  && HARD_REGISTER_NUM_P (REGNO (XEXP (orig, 0)))
+	  && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (orig, 0
 	return orig;
   break;
 

Re: [patch v2] Get rid of stack trampolines for nested functions (1/4)

[Ian Lance Taylor]

On Mon, Dec 5, 2016 at 1:29 PM, Lynn A. Boger
 wrote:
> I think you mean https://github.com/golang/go/issues/18200.

Yes, thanks, I meant to write https://golang.org/issue/18200.

Ian

> On 12/05/2016 02:52 PM, Ian Lance Taylor wrote:
>>
>> On Sun, Sep 4, 2016 at 1:10 PM, Eric Botcazou 
>> wrote:
>>>
>>> 2016-07-04  Eric Botcazou  
>>>
>>>  PR ada/37139
>>>  PR ada/67205
>>>  * common.opt (-ftrampolines): New option.
>>>  * doc/invoke.texi (Code Gen Options): Document it.
>>>  * doc/tm.texi.in (Trampolines):
>>> AddTARGET_CUSTOM_FUNCTION_DESCRIPTORS
>>>  * doc/tm.texi: Regenerate.
>>>  * builtins.def: Add init_descriptor and adjust_descriptor.
>>>  * builtins.c (expand_builtin_init_trampoline): Do not issue a
>>> warning
>>>  on platforms with descriptors.
>>>  (expand_builtin_init_descriptor): New function.
>>>  (expand_builtin_adjust_descriptor): Likewise.
>>>  (expand_builtin) : New case.
>>>  : Likewise.
>>>  * calls.c (prepare_call_address): Remove SIBCALLP parameter and
>>> add
>>>  FLAGS parameter.  Deal with indirect calls by descriptor and
>>> adjust.
>>>  Set STATIC_CHAIN_REG_P on the static chain register, if any.
>>>  (call_expr_flags): Set ECF_BY_DESCRIPTOR for calls by
>>> descriptor.
>>>  (expand_call): Likewise.  Move around call to
>>> prepare_call_address
>>>  and pass all flags to it.
>>>  * cfgexpand.c (expand_call_stmt): Reinstate
>>> CALL_EXPR_BY_DESCRIPTOR.
>>>  * gimple.h (enum gf_mask): New GF_CALL_BY_DESCRIPTOR value.
>>>  (gimple_call_set_by_descriptor): New setter.
>>>  (gimple_call_by_descriptor_p): New getter.
>>>  * gimple.c (gimple_build_call_from_tree):
>>> SetCALL_EXPR_BY_DESCRIPTOR.
>>>  (gimple_call_flags): Deal with GF_CALL_BY_DESCRIPTOR.
>>>  * langhooks.h (struct lang_hooks): Add
>>> custom_function_descriptors.
>>>  * langhooks-def.h (LANG_HOOKS_CUSTOM_FUNCTION_DESCRIPTORS):
>>> Define.
>>>  (LANG_HOOKS_INITIALIZER): Add
>>> LANG_HOOKS_CUSTOM_FUNCTION_DESCRIPTORS.
>>>  * rtl.h (STATIC_CHAIN_REG_P): New macro.
>>>  * rtlanal.c (find_first_parameter_load): Skip static chain
>>> registers.
>>>  * target.def (custom_function_descriptors): New POD hook.
>>>  * tree.h (FUNC_ADDR_BY_DESCRIPTOR): New flag on ADDR_EXPR.
>>>  (CALL_EXPR_BY_DESCRIPTOR): New flag on CALL_EXPR.
>>>  * tree-core.h (ECF_BY_DESCRIPTOR): New mask.
>>>  Document FUNC_ADDR_BY_DESCRIPTOR and CALL_EXPR_BY_DESCRIPTOR.
>>>  * tree.c (make_node_stat) : Use
>>> FUNCTION_ALIGNMENT.
>>>  (build_common_builtin_nodes): Initialize init_descriptor and
>>>  adjust_descriptor.
>>>  * tree-nested.c: Include target.h.
>>>  (struct nesting_info): Add 'any_descr_created' field.
>>>  (get_descriptor_type): New function.
>>>  (lookup_element_for_decl): New function extracted from...
>>>  (create_field_for_decl): Likewise.
>>>  (lookup_tramp_for_decl): ...here.  Adjust.
>>>  (lookup_descr_for_decl): New function.
>>>  (convert_tramp_reference_op): Deal with descriptors.
>>>  (build_init_call_stmt): New function extracted from...
>>>  (finalize_nesting_tree_1): ...here.  Adjust and deal
>>> withdescriptors.
>>>  * defaults.h (FUNCTION_ALIGNMENT): Define.
>>>  (TRAMPOLINE_ALIGNMENT): Set to above instead of
>>> FUNCTION_BOUNDARY.
>>
>> According to https://golang.org/cl/18200, this change broke Go on PPC64le.
>>
>> I haven't investigated myself and I don't know why.  Go does not use
>> stack trampolines for function closures.  It does use function
>> closures, but they are built on the heap.  It also uses closures
>> mediated by libffi.  The Go frontend does not enable custom function
>> descriptors.
>>
>> It should be possible to recreate the problem by configuring with
>> --enable-languages=go and running `make
>> RUNTESTFLAGS="go-test.exp=recover.go" check-gcc-go`.
>>
>> Ian
>>
>>
>

Re: [patch v2] Get rid of stack trampolines for nested functions (1/4)

[Eric Botcazou]

> According to https://golang.org/cl/18200, this change broke Go on PPC64le.

Any other platform where this also happened?

> I haven't investigated myself and I don't know why.  Go does not use
> stack trampolines for function closures.  It does use function
> closures, but they are built on the heap.  It also uses closures
> mediated by libffi.  The Go frontend does not enable custom function
> descriptors.

There are a couple of changes to the RTL expander for calls; they are supposed 
to be transparent but they might have tripped on a latent issue.

> It should be possible to recreate the problem by configuring with
> --enable-languages=go and running `make
> RUNTESTFLAGS="go-test.exp=recover.go" check-gcc-go`.

Thanks, I'll try to reproduce tomorrow.

-- 
Eric Botcazou

[PATCH] Fix PR78646

[Bill Schmidt]

Hi,

PR78646 identifies a case where the base expression for a strength-reduced
memory reference gets a type of insufficient alignment.  This pointed out
the fact that we should use the type of the candidate expression for the
new base expression in all cases.  Patch by Stefan M. Freudenberger.

Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no regressions.
Tested with a powerpc64le->x86_64 cross to verify the correct type is now
chosen.  Committed.

Thanks,
Bill


2016-12-05  Bill Schmidt  
Stefan Freudenberger  

PR tree-optimization/78646
* gimple-ssa-strength-reduction.c (replace_ref): The pointer
addition used for the memory base expression should have the type
of the candidate.


Index: gcc/gimple-ssa-strength-reduction.c
===
--- gcc/gimple-ssa-strength-reduction.c (revision 243264)
+++ gcc/gimple-ssa-strength-reduction.c (working copy)
@@ -1921,7 +1921,7 @@ replace_ref (tree *expr, slsr_cand_t c)
   if (align < TYPE_ALIGN (acc_type))
 acc_type = build_aligned_type (acc_type, align);
 
-  add_expr = fold_build2 (POINTER_PLUS_EXPR, TREE_TYPE (c->base_expr),
+  add_expr = fold_build2 (POINTER_PLUS_EXPR, c->cand_type,
  c->base_expr, c->stride);
   mem_ref = fold_build2 (MEM_REF, acc_type, add_expr,
 wide_int_to_tree (c->cand_type, c->index));

Re: [Patch][i386] PR 70118: Fix ubsan warning on SSE2 loadl_epi64 and storel_epi64

[Allan Sandfeld Jensen]

Trying again, this time with changelog.

gcc/

2016-11-30  Allan Sandfeld Jensen  

PR target/70118
* gcc/config/i386/mmintrin.h (__m64_u): New type
* gcc/config/i386/emmintrin.h (_mm_loadl_epi64, _mm_storel_epi64):
   Make the allowed unaligned memory access explicit.
Index: gcc/config/i386/emmintrin.h
===
--- gcc/config/i386/emmintrin.h	(revision 242892)
+++ gcc/config/i386/emmintrin.h	(working copy)
@@ -703,9 +703,9 @@
 }
 
 extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
-_mm_loadl_epi64 (__m128i const *__P)
+_mm_loadl_epi64 (__m128i_u const *__P)
 {
-  return _mm_set_epi64 ((__m64)0LL, *(__m64 *)__P);
+  return _mm_set_epi64 ((__m64)0LL, *(__m64_u *)__P);
 }
 
 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
@@ -721,9 +721,9 @@
 }
 
 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
-_mm_storel_epi64 (__m128i *__P, __m128i __B)
+_mm_storel_epi64 (__m128i_u *__P, __m128i __B)
 {
-  *(long long *)__P = ((__v2di)__B)[0];
+  *(__m64_u *)__P = (__m64) ((__v2di)__B)[0];
 }
 
 extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
Index: gcc/config/i386/mmintrin.h
===
--- gcc/config/i386/mmintrin.h	(revision 242892)
+++ gcc/config/i386/mmintrin.h	(working copy)
@@ -37,6 +37,9 @@
vector types, and their scalar components.  */
 typedef int __m64 __attribute__ ((__vector_size__ (8), __may_alias__));
 
+/* Unaligned version of the same type  */
+typedef int __m64_u __attribute__ ((__vector_size__ (8), __may_alias__, __aligned__ (1)));
+
 /* Internal data types for implementing the intrinsics.  */
 typedef int __v2si __attribute__ ((__vector_size__ (8)));
 typedef short __v4hi __attribute__ ((__vector_size__ (8)));

[PATCH] Added noexcept on constructors

[Aditya Kumar]

Thanks for the feedback. Updated patch is below.


The noexcept on definition and the declaration of constructors
_Sp_locker do not match.

ChangeLog
2016-12-05  Aditya Kumar  
* src/c++11/shared_ptr.cc (_Sp_locker::_Sp_locker(const void* p)): Added
noexcept on constructors.
_Sp_locker::_Sp_locker(const void* p1, const void* p2): Same
---
 libstdc++-v3/src/c++11/shared_ptr.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/libstdc++-v3/src/c++11/shared_ptr.cc 
b/libstdc++-v3/src/c++11/shared_ptr.cc
index 9028040..b4addd0 100644
--- a/libstdc++-v3/src/c++11/shared_ptr.cc
+++ b/libstdc++-v3/src/c++11/shared_ptr.cc
@@ -56,7 +56,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 { return _Hash_impl::hash(addr) & __gnu_internal::mask; }
   }
 
-  _Sp_locker::_Sp_locker(const void* p)
+  _Sp_locker::_Sp_locker(const void* p) noexcept
   {
 if (__gthread_active_p())
   {
@@ -67,7 +67,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   _M_key1 = _M_key2 = __gnu_internal::invalid;
   }
 
-  _Sp_locker::_Sp_locker(const void* p1, const void* p2)
+  _Sp_locker::_Sp_locker(const void* p1, const void* p2) noexcept
   {
 if (__gthread_active_p())
   {
-- 
2.6.3

Re: [patch v2] Get rid of stack trampolines for nested functions (1/4)

[Lynn A. Boger]

I think you mean https://github.com/golang/go/issues/18200.

- Lynn

On 12/05/2016 02:52 PM, Ian Lance Taylor wrote:

On Sun, Sep 4, 2016 at 1:10 PM, Eric Botcazou  wrote:

2016-07-04  Eric Botcazou  

 PR ada/37139
 PR ada/67205
 * common.opt (-ftrampolines): New option.
 * doc/invoke.texi (Code Gen Options): Document it.
 * doc/tm.texi.in (Trampolines): AddTARGET_CUSTOM_FUNCTION_DESCRIPTORS
 * doc/tm.texi: Regenerate.
 * builtins.def: Add init_descriptor and adjust_descriptor.
 * builtins.c (expand_builtin_init_trampoline): Do not issue a warning
 on platforms with descriptors.
 (expand_builtin_init_descriptor): New function.
 (expand_builtin_adjust_descriptor): Likewise.
 (expand_builtin) : New case.
 : Likewise.
 * calls.c (prepare_call_address): Remove SIBCALLP parameter and add
 FLAGS parameter.  Deal with indirect calls by descriptor and adjust.
 Set STATIC_CHAIN_REG_P on the static chain register, if any.
 (call_expr_flags): Set ECF_BY_DESCRIPTOR for calls by descriptor.
 (expand_call): Likewise.  Move around call to prepare_call_address
 and pass all flags to it.
 * cfgexpand.c (expand_call_stmt): Reinstate CALL_EXPR_BY_DESCRIPTOR.
 * gimple.h (enum gf_mask): New GF_CALL_BY_DESCRIPTOR value.
 (gimple_call_set_by_descriptor): New setter.
 (gimple_call_by_descriptor_p): New getter.
 * gimple.c (gimple_build_call_from_tree): SetCALL_EXPR_BY_DESCRIPTOR.
 (gimple_call_flags): Deal with GF_CALL_BY_DESCRIPTOR.
 * langhooks.h (struct lang_hooks): Add custom_function_descriptors.
 * langhooks-def.h (LANG_HOOKS_CUSTOM_FUNCTION_DESCRIPTORS): Define.
 (LANG_HOOKS_INITIALIZER): Add LANG_HOOKS_CUSTOM_FUNCTION_DESCRIPTORS.
 * rtl.h (STATIC_CHAIN_REG_P): New macro.
 * rtlanal.c (find_first_parameter_load): Skip static chain registers.
 * target.def (custom_function_descriptors): New POD hook.
 * tree.h (FUNC_ADDR_BY_DESCRIPTOR): New flag on ADDR_EXPR.
 (CALL_EXPR_BY_DESCRIPTOR): New flag on CALL_EXPR.
 * tree-core.h (ECF_BY_DESCRIPTOR): New mask.
 Document FUNC_ADDR_BY_DESCRIPTOR and CALL_EXPR_BY_DESCRIPTOR.
 * tree.c (make_node_stat) : Use FUNCTION_ALIGNMENT.
 (build_common_builtin_nodes): Initialize init_descriptor and
 adjust_descriptor.
 * tree-nested.c: Include target.h.
 (struct nesting_info): Add 'any_descr_created' field.
 (get_descriptor_type): New function.
 (lookup_element_for_decl): New function extracted from...
 (create_field_for_decl): Likewise.
 (lookup_tramp_for_decl): ...here.  Adjust.
 (lookup_descr_for_decl): New function.
 (convert_tramp_reference_op): Deal with descriptors.
 (build_init_call_stmt): New function extracted from...
 (finalize_nesting_tree_1): ...here.  Adjust and deal withdescriptors.
 * defaults.h (FUNCTION_ALIGNMENT): Define.
 (TRAMPOLINE_ALIGNMENT): Set to above instead of FUNCTION_BOUNDARY.

According to https://golang.org/cl/18200, this change broke Go on PPC64le.

I haven't investigated myself and I don't know why.  Go does not use
stack trampolines for function closures.  It does use function
closures, but they are built on the heap.  It also uses closures
mediated by libffi.  The Go frontend does not enable custom function
descriptors.

It should be possible to recreate the problem by configuring with
--enable-languages=go and running `make
RUNTESTFLAGS="go-test.exp=recover.go" check-gcc-go`.

Ian

[PATCH] Fix ICE due to IPA-VRP (PR tree-optimization/78681)

[Jakub Jelinek]

Hi!

As shown on the testcase, with K&R definitions and fn prototypes with
promoted types, we can end up computing caller's value ranges in wider
type than the parameter actually has in the function.
The problem with that is that wide_int_storage::from can actually wrap
around, so either as in the testcase we end up with invalid range (minimum
larger than maximum), or just with a range that doesn't cover all the values
the parameter can have.
The patch punts if the range bounds cast to type aren't equal to the
original values.  Similarly (just theoretical), for pointers it only
optimizes if the caller's precision as at most as wide as the pointer,
if it would be wider, even ~[0, 0] range could actually be a NULL pointer
(some multiple of ~(uintptr_t)0 + (uintmax_t) 1).

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2016-12-05  Jakub Jelinek  

PR tree-optimization/78681
* ipa-prop.c (ipcp_update_vr): Punt if vr[i].min precision is bigger
then type's precision and vr[i].min or vr[i].max in type would wrap.

* gcc.c-torture/compile/pr78681.c: New test.

--- gcc/ipa-prop.c.jj   2016-11-25 18:11:05.0 +0100
+++ gcc/ipa-prop.c  2016-12-05 18:48:48.853882864 +0100
@@ -5709,8 +5709,23 @@ ipcp_update_vr (struct cgraph_node *node
{
  tree type = TREE_TYPE (ddef);
  unsigned prec = TYPE_PRECISION (type);
+ unsigned mprec = wi::get_precision (vr[i].min);
+ gcc_assert (mprec == wi::get_precision (vr[i].max));
  if (INTEGRAL_TYPE_P (TREE_TYPE (ddef)))
{
+ if (prec < mprec)
+   {
+ /* If there is a disagreement between callers and callee
+on the argument type, e.g. when using K&R function
+definitions, punt if vr[i].min or vr[i].max are outside
+of type's precision.  */
+ wide_int m = wi::ext (vr[i].min, prec, TYPE_SIGN (type));
+ if (m != vr[i].min)
+   continue;
+ m = wi::ext (vr[i].max, prec, TYPE_SIGN (type));
+ if (m != vr[i].max)
+   continue;
+   }
  if (dump_file)
{
  fprintf (dump_file, "Setting value range of param %u ", i);
@@ -5729,6 +5744,7 @@ ipcp_update_vr (struct cgraph_node *node
}
  else if (POINTER_TYPE_P (TREE_TYPE (ddef))
   && vr[i].type == VR_ANTI_RANGE
+  && mprec <= prec
   && wi::eq_p (vr[i].min, 0)
   && wi::eq_p (vr[i].max, 0))
{
--- gcc/testsuite/gcc.c-torture/compile/pr78681.c.jj2016-12-05 
19:51:15.353646309 +0100
+++ gcc/testsuite/gcc.c-torture/compile/pr78681.c   2016-12-05 
19:50:57.0 +0100
@@ -0,0 +1,27 @@
+/* PR tree-optimization/78681 */
+
+struct S { char b; };
+char d, e, f, l, m;
+struct S n;
+int bar (char, char);
+static void foo (struct S *, int, int, int, int);
+
+static void
+foo (x, g, h, i, j)
+  struct S *x;
+  char g, h, i, j;
+{
+  char k;
+  for (k = 0; k <= j; k++)
+if (bar (g, k))
+  for (; i; k++)
+   if (d)
+ x->b = g;
+}
+
+void
+baz (int q)
+{
+  foo (&n, m, l, f, 1);
+  foo (&n, m, e, f, e - 1);
+}

Jakub

Re: [patch v2] Get rid of stack trampolines for nested functions (1/4)

[Ian Lance Taylor]

On Sun, Sep 4, 2016 at 1:10 PM, Eric Botcazou  wrote:
>
> 2016-07-04  Eric Botcazou  
>
> PR ada/37139
> PR ada/67205
> * common.opt (-ftrampolines): New option.
> * doc/invoke.texi (Code Gen Options): Document it.
> * doc/tm.texi.in (Trampolines): AddTARGET_CUSTOM_FUNCTION_DESCRIPTORS
> * doc/tm.texi: Regenerate.
> * builtins.def: Add init_descriptor and adjust_descriptor.
> * builtins.c (expand_builtin_init_trampoline): Do not issue a warning
> on platforms with descriptors.
> (expand_builtin_init_descriptor): New function.
> (expand_builtin_adjust_descriptor): Likewise.
> (expand_builtin) : New case.
> : Likewise.
> * calls.c (prepare_call_address): Remove SIBCALLP parameter and add
> FLAGS parameter.  Deal with indirect calls by descriptor and adjust.
> Set STATIC_CHAIN_REG_P on the static chain register, if any.
> (call_expr_flags): Set ECF_BY_DESCRIPTOR for calls by descriptor.
> (expand_call): Likewise.  Move around call to prepare_call_address
> and pass all flags to it.
> * cfgexpand.c (expand_call_stmt): Reinstate CALL_EXPR_BY_DESCRIPTOR.
> * gimple.h (enum gf_mask): New GF_CALL_BY_DESCRIPTOR value.
> (gimple_call_set_by_descriptor): New setter.
> (gimple_call_by_descriptor_p): New getter.
> * gimple.c (gimple_build_call_from_tree): SetCALL_EXPR_BY_DESCRIPTOR.
> (gimple_call_flags): Deal with GF_CALL_BY_DESCRIPTOR.
> * langhooks.h (struct lang_hooks): Add custom_function_descriptors.
> * langhooks-def.h (LANG_HOOKS_CUSTOM_FUNCTION_DESCRIPTORS): Define.
> (LANG_HOOKS_INITIALIZER): Add LANG_HOOKS_CUSTOM_FUNCTION_DESCRIPTORS.
> * rtl.h (STATIC_CHAIN_REG_P): New macro.
> * rtlanal.c (find_first_parameter_load): Skip static chain registers.
> * target.def (custom_function_descriptors): New POD hook.
> * tree.h (FUNC_ADDR_BY_DESCRIPTOR): New flag on ADDR_EXPR.
> (CALL_EXPR_BY_DESCRIPTOR): New flag on CALL_EXPR.
> * tree-core.h (ECF_BY_DESCRIPTOR): New mask.
> Document FUNC_ADDR_BY_DESCRIPTOR and CALL_EXPR_BY_DESCRIPTOR.
> * tree.c (make_node_stat) : Use FUNCTION_ALIGNMENT.
> (build_common_builtin_nodes): Initialize init_descriptor and
> adjust_descriptor.
> * tree-nested.c: Include target.h.
> (struct nesting_info): Add 'any_descr_created' field.
> (get_descriptor_type): New function.
> (lookup_element_for_decl): New function extracted from...
> (create_field_for_decl): Likewise.
> (lookup_tramp_for_decl): ...here.  Adjust.
> (lookup_descr_for_decl): New function.
> (convert_tramp_reference_op): Deal with descriptors.
> (build_init_call_stmt): New function extracted from...
> (finalize_nesting_tree_1): ...here.  Adjust and deal withdescriptors.
> * defaults.h (FUNCTION_ALIGNMENT): Define.
> (TRAMPOLINE_ALIGNMENT): Set to above instead of FUNCTION_BOUNDARY.

According to https://golang.org/cl/18200, this change broke Go on PPC64le.

I haven't investigated myself and I don't know why.  Go does not use
stack trampolines for function closures.  It does use function
closures, but they are built on the heap.  It also uses closures
mediated by libffi.  The Go frontend does not enable custom function
descriptors.

It should be possible to recreate the problem by configuring with
--enable-languages=go and running `make
RUNTESTFLAGS="go-test.exp=recover.go" check-gcc-go`.

Ian

Re: [PATCH, rs6000] Fold vector addition built-ins in GIMPLE

[Bill Schmidt]

What's your target triple?

> On Dec 4, 2016, at 6:36 AM, Andreas Schwab  wrote:
> 
> On Nov 01 2016, Bill Schmidt  wrote:
> 
>>  * gcc.target/powerpc/fold-vec-add-7.c: New.
> 
> spawn -ignore SIGHUP /daten/gcc/gcc-20161203/Build/gcc/xgcc 
> -B/daten/gcc/gcc-20161203/Build/gcc/ 
> /daten/gcc/gcc-20161203/gcc/testsuite/gcc.target/powerpc/fold-vec-add-7.c 
> -m32 -fno-diagnostics-show-caret -fdiagnostics-color=never -maltivec -mvsx 
> -mpower8-vector -ffat-lto-objects -S -o fold-vec-add-7.s.
> /daten/gcc/gcc-20161203/gcc/testsuite/gcc.target/powerpc/fold-vec-add-7.c:11:15:
>  error: '__int128' is not supported on this target.
> /daten/gcc/gcc-20161203/gcc/testsuite/gcc.target/powerpc/fold-vec-add-7.c:12:22:
>  error: '__int128' is not supported on this target.
> /daten/gcc/gcc-20161203/gcc/testsuite/gcc.target/powerpc/fold-vec-add-7.c:12:48:
>  error: '__int128' is not supported on this target.
> /daten/gcc/gcc-20161203/gcc/testsuite/gcc.target/powerpc/fold-vec-add-7.c:17:17:
>  error: '__int128' is not supported on this target.
> /daten/gcc/gcc-20161203/gcc/testsuite/gcc.target/powerpc/fold-vec-add-7.c:18:24:
>  error: '__int128' is not supported on this target.
> /daten/gcc/gcc-20161203/gcc/testsuite/gcc.target/powerpc/fold-vec-add-7.c:18:52:
>  error: '__int128' is not supported on this target.
> compiler exited with status 1
> FAIL: gcc.target/powerpc/fold-vec-add-7.c (test for excess errors)
> 
> Andreas.
> 
> -- 
> Andreas Schwab, sch...@linux-m68k.org
> GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
> "And now for something completely different."
> 

C++ PATCH for c++/78647 (ICE-on-invalid with attribute_fallthrough_p)

[Marek Polacek]

We were crashing on this invalid test because cp_parser_std_attribute_spec_seq
in cp_parser_statement returned error_mark_node, but the subsequent
attribute_fallthrough_p wasn't prepared for that.

Bootstrapped/regtested on x86_64-linux, ok for trunk?

2016-12-05  Marek Polacek  

PR c++/78647
* c-family/c-common.c (attribute_fallthrough_p): Return false for
error_mark_node.

* g++.dg/parse/error58.C: New.

diff --git gcc/c-family/c-common.c gcc/c-family/c-common.c
index 0749361..c8e1f0d 100644
--- gcc/c-family/c-common.c
+++ gcc/c-family/c-common.c
@@ -5558,6 +5558,8 @@ parse_optimize_options (tree args, bool attr_p)
 bool
 attribute_fallthrough_p (tree attr)
 {
+  if (attr == error_mark_node)
+   return false;
   tree t = lookup_attribute ("fallthrough", attr);
   if (t == NULL_TREE)
 return false;
diff --git gcc/testsuite/g++.dg/parse/error58.C 
gcc/testsuite/g++.dg/parse/error58.C
index e69de29..5ed6e1e 100644
--- gcc/testsuite/g++.dg/parse/error58.C
+++ gcc/testsuite/g++.dg/parse/error58.C
@@ -0,0 +1,7 @@
+// PR c++/78647
+// { dg-do compile { target c++11 } }
+// { dg-options "-w" }
+
+struct A;
+void foo ();
+void f() { alignas (foo (A)); } // { dg-error "expected" "" }

Marek

Re: [PATCH] handle integer overflow/wrapping in printf directives (PR 78622)

[Jakub Jelinek]

Hi!

On Thu, Dec 01, 2016 at 07:31:18PM -0700, Martin Sebor wrote:
> +static bool
> +adjust_range_for_overflow (tree dirtype, tree *argmin, tree *argmax)
> +{
> +  if (TYPE_UNSIGNED (dirtype))
> +{
> +  *argmin = dirmin;
> +  *argmax = dirmax;
> +}
> +  else
> +{
> +  *argmin = integer_zero_node;
> +  *argmax = dirmin;
> +}

I still don't really like this mixing of ranges of values and picking of values
which result in shortest and longest representation, it is confusing and
will be a maintainance nightmare.

IMHO much cleaner is first figure out the range the argument (in argtype)
has.  I.e. look at VR_RANGE and if it is missing, perhaps find out another
argtype and in any case, use TYPE_{MIN,MAX}_VALUE (argtype) as the range.
I think that should probably be the range presented to the user in
diagnostics (i.e. res.arg{min,max}).

Next step is to adjust this range for the case where dirtype is different
from argtype.  This should be done regardless of what way you get the first
range from (whether from VR_RANGE or VR_VARYING etc.).  The result of this
still should be a range of values in dirtype.

And the last step should be to pick the values from that range which
has shortest and longest representation.  For unsigned dirtype
that are the bounds of the range from earlier step, for signed dirtype
something different (if both bounds are >= 0, then also just those bounds,
if both bounds are < 0, then the bounds swapped, otherwise 0 as minimum,
then e.g. try both bounds what has longer representation, or take some short
path e.g. if abs of the negative bound is >= the positive bound, then use
the negative bound as longest, otherwise try both).

Jakub

[Patch, fortran] PR77903 - [F08] gfortran 6.1.0/7.0.0 accept invalid code with conflicting module/submodule interfaces

[Paul Richard Thomas]

Dear All,

It took me an excessively long time to realise that processing the
typespec for an explicitly typed module procedure was wiping out the
interface symbol and so preventing the comparison of characteristics
between the interface and the separate module procedure. Transferring
the module interface symbol to the tlink field, rather than the
interface, fixed the problem without doing anything else.

Note the comment in the gfortran.h about the use of the tlink field.
It has been a while since this was used for change management. If it
is preferred, I could introduce a union between tlink and some other
suitable name; eg mod_proc_interface.

Bootstraps and regtests on FC21/x86_64.

OK for trunk and, after a decent interval, 6-branch?

Paul

2016-12-06  Paul Thomas  

PR fortran/77903
* decl.c (get_proc_name): Use the symbol tlink field instead of
the typespec interface field.
(gfc_match_function_decl, gfc_match_submod_proc): Ditto.
* gfortran.h : Since the symbol tlink field is no longer used
by the frontend for change management, change the comment to
reflect its current uses.
* parse.c (get_modproc_result): Same as decl.c changes.
* resolve.c (resolve_fl_procedure): Ditto.

2016-12-06  Paul Thomas  

PR fortran/77903
* gfortran.dg/submodule_20.f08: New test.
Index: gcc/fortran/decl.c
===
*** gcc/fortran/decl.c  (revision 243235)
--- gcc/fortran/decl.c  (working copy)
*** get_proc_name (const char *name, gfc_sym
*** 1119,1130 
  {
/* Create a partially populated interface symbol to carry the
 characteristics of the procedure and the result.  */
!   sym->ts.interface = gfc_new_symbol (name, sym->ns);
!   gfc_add_type (sym->ts.interface, &(sym->ts),
&gfc_current_locus);
!   gfc_copy_attr (&sym->ts.interface->attr, &sym->attr, NULL);
if (sym->attr.dimension)
!   sym->ts.interface->as = gfc_copy_array_spec (sym->as);
  
/* Ideally, at this point, a copy would be made of the formal
 arguments and their namespace. However, this does not appear
--- 1119,1130 
  {
/* Create a partially populated interface symbol to carry the
 characteristics of the procedure and the result.  */
!   sym->tlink = gfc_new_symbol (name, sym->ns);
!   gfc_add_type (sym->tlink, &(sym->ts),
&gfc_current_locus);
!   gfc_copy_attr (&sym->tlink->attr, &sym->attr, NULL);
if (sym->attr.dimension)
!   sym->tlink->as = gfc_copy_array_spec (sym->as);
  
/* Ideally, at this point, a copy would be made of the formal
 arguments and their namespace. However, this does not appear
*** get_proc_name (const char *name, gfc_sym
*** 1133,1144 
  
if (sym->result && sym->result != sym)
{
! sym->ts.interface->result = sym->result;
  sym->result = NULL;
}
else if (sym->result)
{
! sym->ts.interface->result = sym->ts.interface;
}
  }
else if (sym && !sym->gfc_new
--- 1133,1144 
  
if (sym->result && sym->result != sym)
{
! sym->tlink->result = sym->result;
  sym->result = NULL;
}
else if (sym->result)
{
! sym->tlink->result = sym->tlink;
}
  }
else if (sym && !sym->gfc_new
*** gfc_match_function_decl (void)
*** 6063,6069 
  sym->result = result;
}
  
- 
/* Warn if this procedure has the same name as an intrinsic.  */
do_warn_intrinsic_shadow (sym, true);
  
--- 6063,6068 
*** gfc_match_submod_proc (void)
*** 8254,8264 
  
/* Make sure that the result field is appropriately filled, even though
   the result symbol will be replaced later on.  */
!   if (sym->ts.interface && sym->ts.interface->attr.function)
  {
!   if (sym->ts.interface->result
! && sym->ts.interface->result != sym->ts.interface)
!   sym->result= sym->ts.interface->result;
else
sym->result = sym;
  }
--- 8253,8263 
  
/* Make sure that the result field is appropriately filled, even though
   the result symbol will be replaced later on.  */
!   if (sym->tlink && sym->tlink->attr.function)
  {
!   if (sym->tlink->result
! && sym->tlink->result != sym->tlink)
!   sym->result= sym->tlink->result;
else
sym->result = sym;
  }
Index: gcc/fortran/gfortran.h
===
*** gcc/fortran/gfortran.h  (revision 243235)
--- gcc/fortran/gfortran.h  (working copy)
*** typedef struct gfc_symbol
*** 1532,1545 
gfc_namelist *namelist, *namelist_tail;
  
/* Change management fields.  Symbols that might be modified by the
!  current statement have the mark member nonzero and are kept in a
! 

Re: [C++] trailing array hack

[Martin Sebor]

On 12/05/2016 11:09 AM, Nathan Sidwell wrote:

Jason, Martin.
looking at pr78635, I find it related to Martin's patch of 15-12-2015
dealing with flexible array members.

Martin's patch makes the following ill-formed:

struct Base {int m; char ary[];};  // ends in flexible array - OK
struct Derived : Base {};  // base ends in flexible array - Bad

The testcase fo pr78635 is similar, except that we have an array of Base
objects and are trying to initialize them:

struct Base ary[2] = {{1, 'b'}, {2}};

ISTM that we should reject the type 'Base []', rather than
make the above ill-formed solely because of the initializer.  The array
elements must overlap eachother, which I'm sure will break various alias
optimizations, regardless of the initializer question.

I.e. do we want:
  struct Base ary[2] = {{1}, {2}};
to be well formed or not?  (I'm lobbying for 'no', if that's not clear)


The array definition is rejected in C mode so I agree that it should
be diagnosed in C++ as well.  That it isn't is being tracked in bug
68489.

FWIW, most of the decisions I made in my work with flexible array
members in G++ were based on what GCC does.  We wanted to allow C11
constructs for compatibility, accommodate safe GCC extensions, and
reject any unsafe code (e.g., overlapping members).

Since G++ accepted all kinds of questionable code, safe or not, I
tried to be careful not to outright reject it only because it looked
wrong, just as long as it was (or could be) safe.  I didn't want to
break programs that happened to rely on it.  So I made an effort to
only issue warnings for such code (again, as long as it was safe).
To that end there's some non-trivial logic that handles some of
these cases (e.g., flexible array members in virtual bases).

Martin

Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

[Martin Sebor]

On 12/05/2016 11:25 AM, Jeff Law wrote:

On 12/05/2016 08:50 AM, Martin Sebor wrote:

On 12/02/2016 08:52 AM, Martin Sebor wrote:

On 12/02/2016 01:31 AM, Rainer Orth wrote:

Hi Martin,


PR 78521 notes that the gimple-ssa-sprintf pass doesn't do the right
thing (i.e., the -Wformat-length and -fprintf-return-value options
behave incorrectly) when a conversion specification includes a width
or precision with a non-constant value.  The code treats such cases
as if they were not provided which is incorrect and results in
the wrong bytes counts in warning messages and in the wrong ranges
being generated for such calls (or in the case sprintf(0, 0, ...)
for some such calls being eliminated).

The attached patch corrects the handling of these cases, plus a couple
of other edge cases in the same area: it adjusts the parser to accept
precision in the form of just a period with no asterisk or decimal
digits after it (this sets the precision to zero), and corrects the
handling of zero precision and zero argument in integer directives
to produce no bytes on output.

Finally, the patch also tightens up the constraint on the upper bound
of bounded functions like snprintf to be INT_MAX.  The functions
cannot
produce output in excess of INT_MAX + 1 bytes and some implementations
(e.g., Solaris) fail with EINVAL when the bound is INT_MAX or more.
This is the subject of PR 78520.


this patch broke Solaris bootstrap:

/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c: In function
'void {anonymous}::get_width_and_precision(const
{anonymous}::conversion_spec&, long long int*, long long int*)':
/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c:777:45: error:
call of overloaded 'abs(long long int)' is ambiguous
  width = abs (tree_to_shwi (spec.star_width));
 ^
/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c:777:45: note:
candidates are:
In file included from /usr/include/stdlib.h:12:0,
 from /vol/gcc/src/hg/trunk/local/gcc/system.h:258,
 from
/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c:49:
/usr/include/iso/stdlib_iso.h:205:16: note: long int std::abs(long int)
  inline long   abs(long _l) { return labs(_l); }
^
/usr/include/iso/stdlib_iso.h:160:12: note: int std::abs(int)
 extern int abs(int);
^

The following patch fixed this for me, but I've no idea if it's right.
It bootstrapped successfully on sparc-sun-solaris2.12,
i386-pc-solaris2.12, and x86_64-pc-linux-gnu.


Thanks for the heads up!  I just looked at that code yesterday while
analyzing bug 78608, wondering if it was safe.  Now I know it isn't.
I think it might be best to simply hand code the expression instead
of taking a chance on abs.  Let me take care of it today along with
78608.


I posted a bigger patch to fix this and other related problems on
Friday (https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00262.html).
In hindsight, I should have probably committed the fix for this
on its own.  Please let me know if this is blocking you and I'll
commit this fix by itself today so you don't have to wait for
the bigger patch to get reviewed and approved.

What's the concern with using std::abs?


My concern, when I wrote the reply n Friday, was that not all C++98
implementations may get std::abs right, declare it in the right header,
avoid defining the abs macro, or put it in namespace std.  (IIRC,
the standard itself wasn't quite right.)

I also need to avoid calling abs with a TYPE_MIN argument because
that's undefined and flagged by ubsan (as per the bug in the subject,
though it was not a result of calling abs but rather that of negating
it).

Besides avoiding the undefined behavior in the compiler I also need
diagnose it (in the program).  The test case for it goes like this:

  int n = sprintf (0, 0, "%*i", INT_MIN, 0);

where the INT_MIN is interpreted as the left justification flag
followed by a positive width of -(unsigned long)INT_MIN.  The
problem is that the function (declared to return int0 is being
asked to return INT_MAX + 1 which is undefined (in the program).

Martin

Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

[Jakub Jelinek]

On Mon, Dec 05, 2016 at 11:37:23AM -0700, Jeff Law wrote:
> On 12/05/2016 11:30 AM, Marek Polacek wrote:
> >On Mon, Dec 05, 2016 at 11:25:02AM -0700, Jeff Law wrote:
> >>We're already using std::min std::max, std::swap and others.
> >
> >Note we're not using std::min nor std::max.  I gave this a shot a while ago,
> >but it didn't pan out:
> >https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00886.html
> >
> > Marek
> >
> tree-ssa-phiprop.c uses std::min and std::max

If you mean the
std::max(std::min(a0, c), std::min(std::max(a1, c), b))
line, that is in a comment.

Jakub

Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

[Jeff Law]

On 12/05/2016 11:30 AM, Marek Polacek wrote:

On Mon, Dec 05, 2016 at 11:25:02AM -0700, Jeff Law wrote:

We're already using std::min std::max, std::swap and others.


Note we're not using std::min nor std::max.  I gave this a shot a while ago,
but it didn't pan out:
https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00886.html

Marek


tree-ssa-phiprop.c uses std::min and std::max
Jeff

Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

[Jakub Jelinek]

On Mon, Dec 05, 2016 at 11:25:02AM -0700, Jeff Law wrote:
> >>
> >>Thanks for the heads up!  I just looked at that code yesterday while
> >>analyzing bug 78608, wondering if it was safe.  Now I know it isn't.
> >>I think it might be best to simply hand code the expression instead
> >>of taking a chance on abs.  Let me take care of it today along with
> >>78608.
> >
> >I posted a bigger patch to fix this and other related problems on
> >Friday (https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00262.html).
> >In hindsight, I should have probably committed the fix for this
> >on its own.  Please let me know if this is blocking you and I'll
> >commit this fix by itself today so you don't have to wait for
> >the bigger patch to get reviewed and approved.
> What's the concern with using std::abs?

We already have abs_hwi and absu_hwi where you choose the semantics you
want.  std::abs might not even have the right overload for HWI.

Jakub

Re: [ARM][PATCH] Fix failing poly64 tests on ARM

[Christophe Lyon]

Hi Tamar,


On 5 December 2016 at 16:32, Kyrill Tkachov  wrote:
>
> On 05/12/16 10:39, Tamar Christina wrote:
>>
>> Hi All,
>>
>> This patch fixes test failures on arm-none-eabi.
>> Poly64 was being used by files that were not supposed
>> to be testing poly64 types.
>>
>> I have added a new MACRO that must be defined in addition
>> to having CRYPTO available before use of Poly64 types are
>> allowed in the header arm-neon-ref.h.
>>
>> Ok for trunk?
>>
>> gcc/testsuite/
>> 2016-12-01  Tamar Christina  
>>
>> * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h: Gate use
>> of Poly64 on USE_CRYPTO_TYPES.
>> * gcc.target/aarch64/advsimd-intrinsics/p64_p128.c: Define
>> USE_CRYPTO_TYPES.
>> * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c:
>> Likewise.
>> * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c:
>> Likewise.
>
>
> Ok, but please make sure the line length in the ChangeLog doesn't go over 80
> characters.
> Kyrill

Since 'expected_poly64x[12]' isn't used, there is no need to declare it,
and the attached patch seems to work (tested only on arm-none-linux-gnueabihf
--target-board=-mthumb/-march=armv8-a/-mfpu=crypto-neon-fp-armv8/-mfloat-abi=hard

All the tests for poly64 use dedicated output buffers, at least for the moment.

Does my patch break aarch64?

Christophe
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
index beaf6ac..4728639 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
@@ -99,13 +99,6 @@ extern size_t strlen(const char *);
 fprintf(stderr, "CHECKED %s %s\n", STR(VECT_TYPE(T, W, N)), MSG);	\
   }
 
-#if defined (__ARM_FEATURE_CRYPTO)
-#define CHECK_CRYPTO(MSG,T,W,N,FMT,EXPECTED,COMMENT) \
-	   CHECK(MSG,T,W,N,FMT,EXPECTED,COMMENT)
-#else
-#define CHECK_CRYPTO(MSG,T,W,N,FMT,EXPECTED,COMMENT)
-#endif
-
 /* Floating-point variant.  */
 #define CHECK_FP(MSG,T,W,N,FMT,EXPECTED,COMMENT)			\
   {	\
@@ -198,9 +191,6 @@ extern ARRAY(expected, uint, 32, 2);
 extern ARRAY(expected, uint, 64, 1);
 extern ARRAY(expected, poly, 8, 8);
 extern ARRAY(expected, poly, 16, 4);
-#if defined (__ARM_FEATURE_CRYPTO)
-extern ARRAY(expected, poly, 64, 1);
-#endif
 extern ARRAY(expected, hfloat, 16, 4);
 extern ARRAY(expected, hfloat, 32, 2);
 extern ARRAY(expected, hfloat, 64, 1);
@@ -214,9 +204,6 @@ extern ARRAY(expected, uint, 32, 4);
 extern ARRAY(expected, uint, 64, 2);
 extern ARRAY(expected, poly, 8, 16);
 extern ARRAY(expected, poly, 16, 8);
-#if defined (__ARM_FEATURE_CRYPTO)
-extern ARRAY(expected, poly, 64, 2);
-#endif
 extern ARRAY(expected, hfloat, 16, 8);
 extern ARRAY(expected, hfloat, 32, 4);
 extern ARRAY(expected, hfloat, 64, 2);
@@ -233,7 +220,6 @@ extern ARRAY(expected, hfloat, 64, 2);
 CHECK(test_name, uint, 64, 1, PRIx64, EXPECTED, comment);		\
 CHECK(test_name, poly, 8, 8, PRIx8, EXPECTED, comment);		\
 CHECK(test_name, poly, 16, 4, PRIx16, EXPECTED, comment);		\
-CHECK_CRYPTO(test_name, poly, 64, 1, PRIx64, EXPECTED, comment);	\
 CHECK_FP(test_name, float, 32, 2, PRIx32, EXPECTED, comment);	\
 	\
 CHECK(test_name, int, 8, 16, PRIx8, EXPECTED, comment);		\
@@ -246,7 +232,6 @@ extern ARRAY(expected, hfloat, 64, 2);
 CHECK(test_name, uint, 64, 2, PRIx64, EXPECTED, comment);		\
 CHECK(test_name, poly, 8, 16, PRIx8, EXPECTED, comment);		\
 CHECK(test_name, poly, 16, 8, PRIx16, EXPECTED, comment);		\
-CHECK_CRYPTO(test_name, poly, 64, 2, PRIx64, EXPECTED, comment);	\
 CHECK_FP(test_name, float, 32, 4, PRIx32, EXPECTED, comment);	\
   }	\
 

Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

[Marek Polacek]

On Mon, Dec 05, 2016 at 11:25:02AM -0700, Jeff Law wrote:
> We're already using std::min std::max, std::swap and others.

Note we're not using std::min nor std::max.  I gave this a shot a while ago,
but it didn't pan out:
https://gcc.gnu.org/ml/gcc-patches/2015-07/msg00886.html

Marek

Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

[Jeff Law]

On 12/05/2016 08:50 AM, Martin Sebor wrote:

On 12/02/2016 08:52 AM, Martin Sebor wrote:

On 12/02/2016 01:31 AM, Rainer Orth wrote:

Hi Martin,


PR 78521 notes that the gimple-ssa-sprintf pass doesn't do the right
thing (i.e., the -Wformat-length and -fprintf-return-value options
behave incorrectly) when a conversion specification includes a width
or precision with a non-constant value.  The code treats such cases
as if they were not provided which is incorrect and results in
the wrong bytes counts in warning messages and in the wrong ranges
being generated for such calls (or in the case sprintf(0, 0, ...)
for some such calls being eliminated).

The attached patch corrects the handling of these cases, plus a couple
of other edge cases in the same area: it adjusts the parser to accept
precision in the form of just a period with no asterisk or decimal
digits after it (this sets the precision to zero), and corrects the
handling of zero precision and zero argument in integer directives
to produce no bytes on output.

Finally, the patch also tightens up the constraint on the upper bound
of bounded functions like snprintf to be INT_MAX.  The functions cannot
produce output in excess of INT_MAX + 1 bytes and some implementations
(e.g., Solaris) fail with EINVAL when the bound is INT_MAX or more.
This is the subject of PR 78520.


this patch broke Solaris bootstrap:

/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c: In function
'void {anonymous}::get_width_and_precision(const
{anonymous}::conversion_spec&, long long int*, long long int*)':
/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c:777:45: error:
call of overloaded 'abs(long long int)' is ambiguous
  width = abs (tree_to_shwi (spec.star_width));
 ^
/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c:777:45: note:
candidates are:
In file included from /usr/include/stdlib.h:12:0,
 from /vol/gcc/src/hg/trunk/local/gcc/system.h:258,
 from
/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c:49:
/usr/include/iso/stdlib_iso.h:205:16: note: long int std::abs(long int)
  inline long   abs(long _l) { return labs(_l); }
^
/usr/include/iso/stdlib_iso.h:160:12: note: int std::abs(int)
 extern int abs(int);
^

The following patch fixed this for me, but I've no idea if it's right.
It bootstrapped successfully on sparc-sun-solaris2.12,
i386-pc-solaris2.12, and x86_64-pc-linux-gnu.


Thanks for the heads up!  I just looked at that code yesterday while
analyzing bug 78608, wondering if it was safe.  Now I know it isn't.
I think it might be best to simply hand code the expression instead
of taking a chance on abs.  Let me take care of it today along with
78608.


I posted a bigger patch to fix this and other related problems on
Friday (https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00262.html).
In hindsight, I should have probably committed the fix for this
on its own.  Please let me know if this is blocking you and I'll
commit this fix by itself today so you don't have to wait for
the bigger patch to get reviewed and approved.

What's the concern with using std::abs?

We're already using std::min std::max, std::swap and others.

jeff

Re: [PATCH] detect null sprintf pointers (PR 78519)

[Jeff Law]

On 12/04/2016 04:55 PM, Martin Sebor wrote:

Bug 78519 points out that while the -Wformat warning flags a small
subset of sprintf calls with a null pointer argument to a %s directive
(those where the pointer is a constant) it misses the much bigger
set where the pointer is not a constant but instead is determined
to be null as a result of optimization.  This is because -Wformat
runs too early, before any of the optimization passes that make it
possible to detect that non-constant pointers are null.

With the -Wformat-length warning running much later than -Wformat,
it's trivial to detect and diagnose these types of bugs with it.
The attached patch adds this warning, along with the ability to
detect a null destination pointer when it's required to be non-null
(this is in all of the {v,}sprintf functions and in {v,}snprintf
when the size argument is not zero).

Ultimately, the destination pointer argument (but not the format
string) to the {v,}sprintf functions needs to be declared nonnull
(pursuant to bug 78673) and the null-checking moved elsewhere.
I'm testing a follow-on patch that does just that but I post this
fix in the meantime since its main focus is the null %s argument.

Martin


gcc-78519.diff


PR middle-end/78519 - missing warning for sprintf %s with null pointer

gcc/ChangeLog:

PR middle-end/78519
* gimple-ssa-sprintf.c (format_string): Handle null pointers.
(format_directive): Diagnose null pointer arguments.
(pass_sprintf_length::handle_gimple_call): Diagnose null destination
pointers.  Correct location of null format string in diagnostics.

gcc/testsuite/ChangeLog:

PR middle-end/78519
* gcc.dg/tree-ssa/builtin-sprintf-warn-7.c: New test.

diff --git a/gcc/gimple-ssa-sprintf.c b/gcc/gimple-ssa-sprintf.c
index e86c4dc..7004f09 100644
--- a/gcc/gimple-ssa-sprintf.c
+++ b/gcc/gimple-ssa-sprintf.c
@@ -433,7 +433,7 @@ struct result_range
 struct fmtresult
 {
   fmtresult ()
-  : argmin (), argmax (), knownrange (), bounded (), constant ()
+  : argmin (), argmax (), knownrange (), bounded (), constant (), nullp ()
   {
 range.min = range.max = HOST_WIDE_INT_MAX;
   }
@@ -461,6 +461,9 @@ struct fmtresult
  are also constant (such as determined by constant propagation,
  though not value range propagation).  */
   bool constant;
+
+  /* True when the argument is a null pointer.  */
+  bool nullp;
 };

 /* Description of a conversion specification.  */
@@ -1624,6 +1627,20 @@ format_string (const conversion_spec &spec, tree arg)
  res.range.min = 0;
}
}
+  else if (arg && integer_zerop (arg))
+   {
+ /* Handle null pointer argument.  */
+
+ fmtresult res;
+ /* Set the range based on Glibc "(null)" output but leave
+all other members at default to indicate that the range
+isn't trustworthy.  This allows the rest of the format
+string to be checked for problems.  */
By not trustworthy, I guess you mean it's only used to issue "may be" 
style warnings, right?  What benefit do you gain by encoding the 
glib-ism vs using HOST_WIDE_INT_MAX?  Presumably once you use 
HOST_WIDE_INT_MAX nothing else is going to be checked?


Jeff

Re: Fold strstr (s, t) eq/ne s to strcmp (s, t) eq/ne 0 if strlen (t) is known

[Jakub Jelinek]

On Mon, Dec 05, 2016 at 11:32:15PM +0530, Prathamesh Kulkarni wrote:
> So I had to check if SSA_NAME_DEF_STMT (rhs2) was call to strstr
> rather than rhs1.

Then you need to test both whether it is strstr (s, t) == s or
s == strstr (s, t).

> +   gassign *ga = gimple_build_assign (lhs, code,
> + strcmp_lhs, zero);

The formatting is wrong here.

> +   gsi_replace (&gsi, ga, false);
> + }
> + }
> + }
> + }
> + }
> + }
>else if (TREE_CODE (lhs) != SSA_NAME && !TREE_SIDE_EFFECTS (lhs))
>   {
> tree type = TREE_TYPE (lhs);
> @@ -2505,7 +2554,7 @@ const pass_data pass_data_strlen =
>0, /* properties_provided */
>0, /* properties_destroyed */
>0, /* todo_flags_start */
> -  0, /* todo_flags_finish */
> +  TODO_update_ssa, /* todo_flags_finish */

No, please don't.  Just make sure to build proper SSA right away.

Jakub

Re: Fold strstr (s, t) eq/ne s to strcmp (s, t) eq/ne 0 if strlen (t) is known

[Prathamesh Kulkarni]

On 5 December 2016 at 23:40, Prathamesh Kulkarni
 wrote:
> On 5 December 2016 at 23:38, Bernd Schmidt  wrote:
>> On 12/05/2016 07:02 PM, Prathamesh Kulkarni wrote:
>>>
>>> This patch folds strstr (s, t) eq/ne s to strcmp (s, t) eq/ne 0 if
>>> strlen (t) is known.
>>
>>
>> That's not the same thing, is it?
>>
>> s = "hello world", t = "hello":
>>   strstr (s, t) == s, but not strcmp (s, t) == 0.
>>
>> I think you'd want memcmp (s, t, strlen (t)) == 0.
> Ah indeed! Dunno why I thought strstr (s, t) == strcmp (s, t) :(
Err, I meant strstr(s, t) == s to strcmp(s, t) == 0.
I will send a patch to fold strstr (s, t) to memcmp (s, t, strlen (t)) == 0.
Thanks for the suggestions.

Regards,
Prathamesh
> Thanks for pointing out!
>>
>>
>> Bernd
>>

Re: Fold strstr (s, t) eq/ne s to strcmp (s, t) eq/ne 0 if strlen (t) is known

[Prathamesh Kulkarni]

On 5 December 2016 at 23:38, Bernd Schmidt  wrote:
> On 12/05/2016 07:02 PM, Prathamesh Kulkarni wrote:
>>
>> This patch folds strstr (s, t) eq/ne s to strcmp (s, t) eq/ne 0 if
>> strlen (t) is known.
>
>
> That's not the same thing, is it?
>
> s = "hello world", t = "hello":
>   strstr (s, t) == s, but not strcmp (s, t) == 0.
>
> I think you'd want memcmp (s, t, strlen (t)) == 0.
Ah indeed! Dunno why I thought strstr (s, t) == strcmp (s, t) :(
Thanks for pointing out!
>
>
> Bernd
>

[C++] trailing array hack

[Nathan Sidwell]

Jason, Martin.
looking at pr78635, I find it related to Martin's patch of 15-12-2015 
dealing with flexible array members.


Martin's patch makes the following ill-formed:

struct Base {int m; char ary[];};  // ends in flexible array - OK
struct Derived : Base {};  // base ends in flexible array - Bad

The testcase fo pr78635 is similar, except that we have an array of Base 
objects and are trying to initialize them:


struct Base ary[2] = {{1, 'b'}, {2}};

ISTM that we should reject the type 'Base []', rather than 
make the above ill-formed solely because of the initializer.  The array 
elements must overlap eachother, which I'm sure will break various alias 
optimizations, regardless of the initializer question.


I.e. do we want:
  struct Base ary[2] = {{1}, {2}};
to be well formed or not?  (I'm lobbying for 'no', if that's not clear)

nathan

--
Nathan Sidwell

Re: [PATCH] Fix BIT_FIELD_REF type on vectorizable_live_operation created BFR (PR tree-optimization/78675)

[Jeff Law]

On 12/05/2016 09:52 AM, Jakub Jelinek wrote:

Hi!

For VECTOR_BOOLEAN_TYPE_P vectype the element type can have different
precision from TYPE_SIZE, which is what we use for the bitsize.
The following patch uses then some other integral type of that precision
before it is actually converted to lhs_type (boolean_type_node).

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2016-12-05  Jakub Jelinek  

PR tree-optimization/78675
* tree-vect-loop.c (vectorizable_live_operation): For
VECTOR_BOOLEAN_TYPE_P vectype use integral type with bitsize precision
instead of TREE_TYPE (vectype) for the BIT_FIELD_REF.

* gcc.target/i386/pr78675-1.c: New test.
* gcc.target/i386/pr78675-2.c: New test.

OK.
jeff

Re: Fold strstr (s, t) eq/ne s to strcmp (s, t) eq/ne 0 if strlen (t) is known

[Bernd Schmidt]

On 12/05/2016 07:02 PM, Prathamesh Kulkarni wrote:

This patch folds strstr (s, t) eq/ne s to strcmp (s, t) eq/ne 0 if
strlen (t) is known.


That's not the same thing, is it?

s = "hello world", t = "hello":
  strstr (s, t) == s, but not strcmp (s, t) == 0.

I think you'd want memcmp (s, t, strlen (t)) == 0.


Bernd

Re: [PATCH] Improve fold_compare (PR c++/71537)

[Jeff Law]

On 12/05/2016 10:00 AM, Jakub Jelinek wrote:

Hi!

As the testcase shows, we also want to fold "abcd" + 3 != NULL
at constant time.  The following patch fixes that.
Additionally, I think if !indirect_base0 then we basically want to compare
whether the base0's value rather than address is non-NULL, which we can't
optimize.  All we can optimize is when indirect_base0 is true, i.e. we
want to ask whether base0's address + some constant offset is non-NULL.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2016-12-05  Jakub Jelinek  

PR c++/71537
* fold-const.c (fold_comparison): Assume CONSTANT_CLASS_P (base0)
plus offset is non-zero.  For maybe_nonzero_address decl base0,
require indirect_base0.

* g++.dg/cpp0x/constexpr-71537.C: New test.

OK.
jeff

Re: [PATCH] Readd strchr constant folding (PR c++/71537)

[Jeff Law]

On 12/05/2016 10:59 AM, Jakub Jelinek wrote:

On Mon, Dec 05, 2016 at 10:55:05AM -0700, Jeff Law wrote:

On 12/05/2016 09:54 AM, Jakub Jelinek wrote:

The recent changes to move strchr folding from builtins.c to gimple-fold.c
broke constexpr handling with __builtin_strchr etc. (which the libstdc++
folks want to use).

Fixed by handling it also in fold-const-call.c.  Bootstrapped/regtested on
x86_64-linux and i686-linux, ok for trunk?

2016-12-05  Jakub Jelinek  

PR c++/71537
* fold-const-call.c (fold_const_call): Handle
CFN_BUILT_IN_{INDEX,STRCHR,RINDEX,STRRCHR}.

* g++.dg/cpp0x/constexpr-strchr.C: New test.

Thoughts on moving this into match.pd?  I don't see any string builtins
there, so perhaps leave it in fold-const-call for now, then move them as a
group later?


At least my understanding has been that such stuff goes into
fold-const-call.c in the new world.  The GIMPLE optimizers for these functions
have also been added to gimple-fold.c, not to match.pd.

Good enough for me...

OK for the trunk, if I wasn't clear about that..

jeff

Fold strstr (s, t) eq/ne s to strcmp (s, t) eq/ne 0 if strlen (t) is known

[Prathamesh Kulkarni]

Hi,
This patch folds strstr (s, t) eq/ne s to strcmp (s, t) eq/ne 0 if
strlen (t) is known.
One issue I came across was forwprop1 reverses the order of operands
in eq_expr below:

eg test-case:
_Bool f(char *s, int cond)
{
  char *t1 = __builtin_strstr (s, "hello");
  _Bool t2 = (t1 == s);
  return t2;
}

forwprop1 dump:
f (char * s, int cond)
{
  _Bool t2;
  char * t1;

   [0.0%]:
  t1_3 = __builtin_strstr (s_2(D), "hello");
  t2_4 = s_2(D) == t1_3;
  return t2_4;

}

So I had to check if SSA_NAME_DEF_STMT (rhs2) was call to strstr
rather than rhs1.
I suppose that's OK ?

clang unconditionally transforms
strstr (s, t) == s to strncmp (s, t, strlen (t))
However I am not sure what algorithm glibc's strstr uses, so didn't
attempt to transform
if strlen (t) is unknown. Should we do the transform even if strlen
(t) is unknown ?

Thanks,
Prathamesh
2016-12-05  Prathamesh Kulkarni  

* tree-ssa-strlen.c (strlen_optimize_stmt): Fold strstr(s, t) == s to
strcmp (s, t) == 0.
(pass_data_strlen): Set todo_flags_finish to TODO_update_ssa.

testsuite/
* gcc.dg/strlenopt-30.c: New test-case.
diff --git a/gcc/testsuite/gcc.dg/strlenopt-30.c 
b/gcc/testsuite/gcc.dg/strlenopt-30.c
new file mode 100644
index 000..737f37d
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/strlenopt-30.c
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-strlen" } */
+
+_Bool f1(char *s)
+{
+  char *t = "hello";
+  char *t1 = __builtin_strstr (s, t);
+  _Bool t2 = (t1 == s);
+  return t2;
+}
+
+_Bool f2(char *s)
+{
+  char *t = "hello";
+  char *t1 = __builtin_strstr (s, t);
+  _Bool t2 = (t1 != s);
+  return t2;
+}
+
+_Bool f3(char *s, char *t)
+{
+  char *t1 = __builtin_strstr (s, t);
+  _Bool t2 = (t1 == s);
+  return t2;
+}
+
+/* { dg-final { scan-tree-dump-times "__builtin_strcmp" 2 "strlen" } } */
diff --git a/gcc/tree-ssa-strlen.c b/gcc/tree-ssa-strlen.c
index 339812e..8977e80 100644
--- a/gcc/tree-ssa-strlen.c
+++ b/gcc/tree-ssa-strlen.c
@@ -2302,6 +2302,55 @@ strlen_optimize_stmt (gimple_stmt_iterator *gsi)
  else if (gimple_assign_rhs_code (stmt) == POINTER_PLUS_EXPR)
handle_pointer_plus (gsi);
}
+
+  /* Fold strstr (s, t) == s to strcmp (s, t) == 0.  if strlen (t)
+is known.  */
+  else if (TREE_CODE (lhs) == SSA_NAME && INTEGRAL_TYPE_P (TREE_TYPE 
(lhs)))
+   {
+ enum tree_code code = gimple_assign_rhs_code (stmt);
+ if (code == EQ_EXPR || code == NE_EXPR)
+   {
+ tree rhs1 = gimple_assign_rhs1 (stmt);
+ tree rhs2 = gimple_assign_rhs2 (stmt);
+ if (TREE_CODE (rhs2) == SSA_NAME)
+   {
+ gcall *call_stmt = dyn_cast (SSA_NAME_DEF_STMT 
(rhs2));
+ if (call_stmt
+ && gimple_call_builtin_p (call_stmt, BUILT_IN_STRSTR))
+   {
+ tree arg0 = gimple_call_arg (call_stmt, 0);
+ if (operand_equal_p (arg0, rhs1, 0))
+   {
+ /* Check if strlen(arg1) is known.  */
+ tree arg1 = gimple_call_arg (call_stmt, 1);
+ int idx = get_stridx (arg1);
+ strinfo *si = NULL;
+ if (idx)
+   si = get_strinfo (idx);
+ if ((idx < 0)
+ || (si && (get_string_length (si) != NULL_TREE)))
+   {
+ gimple_stmt_iterator gsi = gsi_for_stmt 
(call_stmt);
+ tree strcmp_decl = builtin_decl_explicit 
(BUILT_IN_STRCMP);
+ gcall *strcmp_call = gimple_build_call 
(strcmp_decl, 2,
+ arg0, 
arg1);
+ tree strcmp_lhs = make_ssa_name 
(integer_type_node);
+ gimple_call_set_lhs (strcmp_call, strcmp_lhs);
+ update_stmt (strcmp_call);
+ gsi_remove (&gsi, true);
+ gsi_insert_before (&gsi, strcmp_call, 
GSI_SAME_STMT);
+
+ gsi = gsi_for_stmt (stmt);
+ tree zero = build_zero_cst (TREE_TYPE 
(strcmp_lhs));
+ gassign *ga = gimple_build_assign (lhs, code,
+   strcmp_lhs, zero);
+ gsi_replace (&gsi, ga, false);
+   }
+   }
+   }
+   }
+   }
+   }
   else if (TREE_CODE (lhs) != SSA_NAME && !TREE_SIDE_EFFECTS (lhs))
{
  tree type = TREE_TYPE (lhs);
@@ -2505,7 +2554,7 @@ const pass_data pass_data_strlen =
   0, /* properties_provided */
   0, /* properties_destroyed */
   0, /* todo_flags_start */
-  0, /* todo_flags_finish */
+  TODO_upda

Re: [PATCH] Readd strchr constant folding (PR c++/71537)

[Jakub Jelinek]

On Mon, Dec 05, 2016 at 10:55:05AM -0700, Jeff Law wrote:
> On 12/05/2016 09:54 AM, Jakub Jelinek wrote:
> >The recent changes to move strchr folding from builtins.c to gimple-fold.c
> >broke constexpr handling with __builtin_strchr etc. (which the libstdc++
> >folks want to use).
> >
> >Fixed by handling it also in fold-const-call.c.  Bootstrapped/regtested on
> >x86_64-linux and i686-linux, ok for trunk?
> >
> >2016-12-05  Jakub Jelinek  
> >
> > PR c++/71537
> > * fold-const-call.c (fold_const_call): Handle
> > CFN_BUILT_IN_{INDEX,STRCHR,RINDEX,STRRCHR}.
> >
> > * g++.dg/cpp0x/constexpr-strchr.C: New test.
> Thoughts on moving this into match.pd?  I don't see any string builtins
> there, so perhaps leave it in fold-const-call for now, then move them as a
> group later?

At least my understanding has been that such stuff goes into
fold-const-call.c in the new world.  The GIMPLE optimizers for these functions
have also been added to gimple-fold.c, not to match.pd.

Jakub

Re: [PATCH] Readd memchr constant folding (PR c++/71537)

[Jeff Law]

On 12/05/2016 09:57 AM, Jakub Jelinek wrote:

Hi!

The slightly less recent but also post-6 changes to move memchr
folding from builtins.c to gimple-fold.c and fold-const-call.c also broke
the constexpr handling, it now only constant folds calls that return NULL,
while previously it also handled returning first argument + constant offset.

This patch moves the misplaced memchr handling from fold_const_call_1 to
fold_const_call where similar functions are already handled, fixes
formatting etc. and also handles the case when argument + constant offset
should be returned.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2016-12-05  Jakub Jelinek  

* fold-const-call.c (fold_const_call_1): Remove memchr handling here.
(fold_const_call) : Formatting improvements.
(fold_const_call) : Likewise.  If s2 is 0
and arguments have no side-effects, return 0.
(fold_const_call): Handle CFN_BUILT_IN_MEMCHR.

* g++.dg/cpp0x/constexpr-memchr.C: New test.

OK.
jeff

Re: [PATCH] Readd strchr constant folding (PR c++/71537)

[Jeff Law]

On 12/05/2016 09:54 AM, Jakub Jelinek wrote:

Hi!

The recent changes to move strchr folding from builtins.c to gimple-fold.c
broke constexpr handling with __builtin_strchr etc. (which the libstdc++
folks want to use).

Fixed by handling it also in fold-const-call.c.  Bootstrapped/regtested on
x86_64-linux and i686-linux, ok for trunk?

2016-12-05  Jakub Jelinek  

PR c++/71537
* fold-const-call.c (fold_const_call): Handle
CFN_BUILT_IN_{INDEX,STRCHR,RINDEX,STRRCHR}.

* g++.dg/cpp0x/constexpr-strchr.C: New test.
Thoughts on moving this into match.pd?  I don't see any string builtins 
there, so perhaps leave it in fold-const-call for now, then move them as 
a group later?



jeff

Re: [PATCH] fix PR71721

[Jeff Law]

On 12/01/2016 10:14 PM, Waldemar Brodkorb wrote:

Hi,

it would be nice if uclinux targets are allowed to enable posix threads.
Together with uClibc-ng/uClibc you can build m68k-nommu toolchain and enable
old Linuxthreads instead of NPTL/TLS. With following change it is possible to 
build
boost, which checks if gcc is build with threads enabled.

Tested with a simple boost application on qemu-system-m68k emulating a coldfire
board without MMU. Other noMMU targets as cortex-m3/cortex-m4 will benefit from
this change, too.

The patch is used in Buildroot for a while without causing issues.

2016-12-02  Waldemar Brodkorb 

   gcc/
   * gcc/config.gcc: Enable posix threads.

THanks.  Installed.

jeff

[arm-embedded][committed] PR71607: New approach to arm_disable_literal_pool

[Andre Vieira (lists)]

On 29/11/16 09:45, Andre Vieira (lists) wrote:
> On 17/11/16 10:00, Ramana Radhakrishnan wrote:
>> On Thu, Oct 6, 2016 at 2:57 PM, Andre Vieira (lists)
>>  wrote:
>>> Hello,
>>>
>>> This patch tackles the issue reported in PR71607. This patch takes a
>>> different approach for disabling the creation of literal pools. Instead
>>> of disabling the patterns that would normally transform the rtl into
>>> actual literal pools, it disables the creation of this literal pool rtl
>>> by making the target hook TARGET_CANNOT_FORCE_CONST_MEM return true if
>>> arm_disable_literal_pool is true. I added patterns to split floating
>>> point constants for both SF and DFmode. A pattern to handle the
>>> addressing of label_refs had to be included as well since all
>>> "memory_operand" patterns are disabled when
>>> TARGET_CANNOT_FORCE_CONST_MEM returns true. Also the pattern for
>>> splitting 32-bit immediates had to be changed, it was not accepting
>>> unsigned 32-bit unsigned integers with the MSB set. I believe
>>> const_int_operand expects the mode of the operand to be set to VOIDmode
>>> and not SImode. I have only changed it in the patterns that were
>>> affecting this code, though I suggest looking into changing it in the
>>> rest of the ARM backend.
>>>
>>> I added more test cases. No regressions for arm-none-eabi with
>>> Cortex-M0, Cortex-M3 and Cortex-M7.
>>>
>>> Is this OK for trunk?
>>
>> Including -mslow-flash-data in your multilib flags ? If no regressions
>> with that ok .
>>
>>
>> regards
>> Ramana
>>
>>>
> 
> Hello,
> 
> I found some new ICE's with the -mslow-flash-data testing so I had to
> rework this patch. I took the opportunity to rebase it as well.
> 
> The problem was with the way the old version of the patch handled label
> references.  After some digging I found I wasn't using the right target
> hook and so I implemented the 'TARGET_USE_BLOCKS_FOR_CONSTANT_P' for
> ARM.  This target hook determines whether a literal pool ends up in an
> 'object_block' structure. So I reverted the changes made in the old
> version of the patch to the ARM implementation of the
> 'TARGET_CANNOT_FORCE_CONST_MEM' hook and rely on
> 'TARGET_USE_BLOCKS_FOR_CONSTANT_P' instead. This patch adds an ARM
> implementation for this hook that returns false if
> 'arm_disable_literal_pool' is set to true and true otherwise.
> 
> This version of the patch also reverts back to using the check for
> 'SYMBOL_REF' in 'thumb2_legitimate_address_p' that was removed in the
> last version, this code is required to place the label references in
> rodata sections.
> 
> Another thing this patch does is revert the changes made to the 32-bit
> constant split in arm.md. The reason this was needed before was because
> 'real_to_target' returns a long array and does not sign-extend values in
> it, which would make sense on hosts with 64-bit longs. To fix this the
> value is now casted to 'int' first.  It would probably be a good idea to
> change the 'real_to_target' function to return an array with
> 'HOST_WIDE_INT' elements instead and either use all 64-bits or
> sign-extend them.  Something for the future?
> 
> I added more test cases in this patch and reran regression tests for:
> Cortex-M0, Cortex-M4 with and without -mslow-flash-data. Also did a
> bootstrap+regressions on arm-none-linux-gnueabihf.
> 
> Is this OK for trunk?
> 
> Cheers,
> Andre
> 
> gcc/ChangeLog:
> 
> 2016-11-29  Andre Vieira  
> 
> PR target/71607
> * config/arm/arm.md (use_literal_pool): Removes.
> (64-bit immediate split): No longer takes cost into consideration
> if 'arm_disable_literal_pool' is enabled.
> * config/arm/arm.c (arm_use_blocks_for_constant_p): New.
> (TARGET_USE_BLOCKS_FOR_CONSTANT_P): Define.
> (arm_max_const_double_inline_cost): Remove use of
> arm_disable_literal_pool.
> * config/arm/vfp.md (no_literal_pool_df_immediate): New.
> (no_literal_pool_sf_immediate): New.
> 
> 
> gcc/testsuite/ChangeLog:
> 
> 2016-11-29  Andre Vieira  
> Thomas Preud'homme  
> 
> PR target/71607
> * gcc.target/arm/thumb2-slow-flash-data.c: Renamed to ...
> * gcc.target/arm/thumb2-slow-flash-data-1.c: ... this.
> * gcc.target/arm/thumb2-slow-flash-data-2.c: New.
> * gcc.target/arm/thumb2-slow-flash-data-3.c: New.
> * gcc.target/arm/thumb2-slow-flash-data-4.c: New.
> * gcc.target/arm/thumb2-slow-flash-data-5.c: New.
> 

Hi,

I committed this patch to the embedded-6-branch in revision r243266.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

PR target/71607
* config/arm/arm.md (use_literal_pool): Removes.
(64-bit immediate split): No longer takes cost into consideration
if 'arm_disable_literal_pool' is enabled.
* config/arm/arm.c (arm_use_blocks_for_constant_p): New.
(TARGET_USE_BLOCKS_FOR_CONSTANT_P): Define.
(arm_max_const_double_inline_cost): Remove use of
arm_disable_literal_pool.
* config/arm/vfp.md (no_literal_pool_

Re: [PATCH] Add AVX512 k-mask intrinsics

[H.J. Lu]

On Mon, Dec 5, 2016 at 6:59 AM, Andrew Senkevich
 wrote:
> 2016-12-02 21:31 GMT+03:00 Uros Bizjak :
>> On Fri, Dec 2, 2016 at 6:44 PM, Andrew Senkevich
>>  wrote:
>>> 2016-11-11 22:14 GMT+03:00 Uros Bizjak :
 On Fri, Nov 11, 2016 at 7:23 PM, Andrew Senkevich
  wrote:
> 2016-11-11 20:56 GMT+03:00 Uros Bizjak :
>> On Fri, Nov 11, 2016 at 6:50 PM, Uros Bizjak  wrote:
>>> On Fri, Nov 11, 2016 at 6:38 PM, Andrew Senkevich
>>>  wrote:
 2016-11-11 17:34 GMT+03:00 Uros Bizjak :
> Some quick remarks:
>
> +(define_insn "kmovb"
> +  [(set (match_operand:QI 0 "nonimmediate_operand" "=k,k")
> + (unspec:QI
> +  [(match_operand:QI 1 "nonimmediate_operand" "r,km")]
> +  UNSPEC_KMOV))]
> +  "!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512DQ"
> +  "@
> +   kmovb\t{%k1, %0|%0, %k1}
> +   kmovb\t{%1, %0|%0, %1}";
> +  [(set_attr "mode" "QI")
> +   (set_attr "type" "mskmov")
> +   (set_attr "prefix" "vex")])
> +
> +(define_insn "kmovd"
> +  [(set (match_operand:SI 0 "nonimmediate_operand" "=k,k")
> + (unspec:SI
> +  [(match_operand:SI 1 "nonimmediate_operand" "r,km")]
> +  UNSPEC_KMOV))]
> +  "!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512BW"
> +  "@
> +   kmovd\t{%k1, %0|%0, %k1}
> +   kmovd\t{%1, %0|%0, %1}";
> +  [(set_attr "mode" "SI")
> +   (set_attr "type" "mskmov")
> +   (set_attr "prefix" "vex")])
> +
> +(define_insn "kmovq"
> +  [(set (match_operand:DI 0 "nonimmediate_operand" "=k,k,km")
> + (unspec:DI
> +  [(match_operand:DI 1 "nonimmediate_operand" "r,km,k")]
> +  UNSPEC_KMOV))]
> +  "!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512BW"
> +  "@
> +   kmovq\t{%k1, %0|%0, %k1}
> +   kmovq\t{%1, %0|%0, %1}
> +   kmovq\t{%1, %0|%0, %1}";
> +  [(set_attr "mode" "DI")
> +   (set_attr "type" "mskmov")
> +   (set_attr "prefix" "vex")])
>
> - kmovd (and existing kmovw) should be using register_operand for
> opreand 0. In this case, there is no need for MEM_P checks at all.
> - In the insn constraint, pease check TARGET_AVX before checking 
> MEM_P.
> - please put these definitions above corresponding *mov??_internal 
> patterns.

 Do you mean put below *mov??_internal patterns? Attached corrected 
 such way.
>>>
>>> No, please put kmovq near *movdi_internal, kmovd near *movsi_internal,
>>> etc. It doesn't matter if they are above or below their respective
>>> *mov??_internal patterns, as long as they are positioned in some
>>> consistent way. IOW, new patterns shouldn't be grouped together, as is
>>> the case with your patch.
>>
>> +(define_insn "kmovb"
>> +  [(set (match_operand:QI 0 "register_operand" "=k,k")
>> +(unspec:QI
>> +  [(match_operand:QI 1 "nonimmediate_operand" "r,km")]
>> +  UNSPEC_KMOV))]
>> +  "TARGET_AVX512DQ && !MEM_P (operands[1])"
>>
>> There is no need for !MEM_P, this will prevent memory operand, which
>> is allowed by constraint "m".
>>
>> +(define_insn "kmovq"
>> +  [(set (match_operand:DI 0 "register_operand" "=k,k,km")
>> +(unspec:DI
>> +  [(match_operand:DI 1 "nonimmediate_operand" "r,km,k")]
>> +  UNSPEC_KMOV))]
>> +  "TARGET_AVX512BW && !MEM_P (operands[1])"
>>
>> Operand 0 should have "nonimmediate_operand" predicate. And here you
>> need  && !(MEM_P (op0) && MEM_P (op1)) in insn constraint to prevent
>> mem->mem moves.
>
> Changed according your comments and attached.

 Still not good.

 +(define_insn "kmovd"
 +  [(set (match_operand:SI 0 "register_operand" "=k,k")
 +(unspec:SI
 +  [(match_operand:SI 1 "nonimmediate_operand" "r,km")]
 +  UNSPEC_KMOV))]
 +  "TARGET_AVX512BW && !MEM_P (operands[1])"

 Remove !MEM_P in the above pattern.

  (define_insn "kmovw"
 -  [(set (match_operand:HI 0 "nonimmediate_operand" "=k,k")
 +  [(set (match_operand:HI 0 "register_operand" "=k,k")
  (unspec:HI
[(match_operand:HI 1 "nonimmediate_operand" "r,km")]
UNSPEC_KMOV))]
 -  "!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512F"
 +  "TARGET_AVX512F && !MEM_P (operands[1])"

 Also remove !MEM_P here.

 +(define_insn "kadd"
 +  [(set (match_operand:SWI1248x 0 "register_operand" "=r,&r,!k")
 +(plus:SWI1248x
 +  (not:SWI1248x
 +(match_operand:SWI1248x 1 "register_operand" "r,0,k"))
 +  (match_operand:SWI1248x 2 "register_operand" "r,r,k")))
 +   (clobber (reg:CC FLAGS_REG))]
 +  "TARGET_AVX512F"
 +{
 +  switch (

[arm-embedded][committed][PATCH 6/6] ARM ACLE Coprocessor MCRR and MRRC intrinsics

[Andre Vieira (lists)]

On 05/12/16 11:52, Andre Vieira (lists) wrote:
> On 09/11/16 10:12, Andre Vieira (lists) wrote:
>> Hi,
>>
>> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
>> intrinsics. See below a table mapping the intrinsics to their respective
>> instructions:
>>
>> +---+---+
>> | Intrinsic signature   |
>> Instruction pattern   |
>> +---+---+
>> |void __arm_mcrr(coproc, opc1, uint64_t value, CRm) |
>> MCRR coproc, opc1, Rt, Rt2, CRm   |
>> +---+---+
>> |void __arm_mcrr2(coproc, opc1, uint64_t value, CRm)|
>> MCRR2 coproc, opc1, Rt, Rt2, CRm  |
>> +---+---+
>> |uint64_t __arm_mrrc(coproc, opc1, CRm) |
>> MRRC coproc, opc1, Rt, Rt2, CRm   |
>> +---+---+
>> |uint64_t __arm_mrrc2(coproc, opc1, CRm)|
>> MRRC2 coproc, opc1, Rt, Rt2, CRm  |
>> +---+---+
>> Note that any untyped variable in the intrinsic signature is required to
>> be a compiler-time constant and has the type 'unsigned int'.  We do some
>> boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31]. If either of
>> these requirements are not met a diagnostic is issued.
>>
>> I added a new arm_arch variable for ARMv5TE to use when deciding whether
>> or not the MCRR and MRCC intrinsics are available.
>>
>> Is this OK for trunk?
>>
>> Regards,
>> Andre
>>
>> gcc/ChangeLog:
>> 2016-11-09  Andre Vieira  
>>
>>   * config/arm/arm.md (): New.
>>   (): New.
>>   * config/arm/arm.c (arm_arch5te): New.
>>   (arm_option_override): Set arm_arch5te.
>>   (arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc
>>   and mrrc2.
>>   * config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to...
>>   (arm_mcrr_qualifiers): ... this. New.
>>   (MRRC_QUALIFIERS): Define to...
>>   (arm_mrrc_qualifiers): ... this. New.
>>   * config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc,
>>   __arm_mrrc2): New.
>>   * config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New.
>>   * config/arm/iterators.md (MCRRI, mcrr, MCRR): New.
>>   (MRRCI, mrrc, MRRC): New.
>>   * config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC,
>>   VUNSPEC_MRRC2): New.
>>
>> gcc/testsuite/ChangeLog:
>>
>> 2016-11-09  Andre Vieira  
>>
>>   * gcc.target/arm/acle/mcrr: New.
>>   * gcc.target/arm/acle/mcrr2: New.
>>   * gcc.target/arm/acle/mrrc: New.
>>   * gcc.target/arm/acle/mrrc2: New.
>>
> Hi,
> 
> I realize I forgot to mention that for these intrinsics 'Rt' will hold
> the low half and 'Rt2' the higher half of either the argument 'value'
> for MCRR{,2} or the return value for MRRC{,2}.
> 
> Cheers,
> Andre
> 
Hi,

I committed this patch to the embedded-6-branch in revision r243264.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

* config/arm/arm.md (): New.
(): New.
* config/arm/arm.c (arm_arch5te): New.
(arm_option_override): Set arm_arch5te.
(arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc
and mrrc2.
* config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to...
(arm_mcrr_qualifiers): ... this. New.
(MRRC_QUALIFIERS): Define to...
(arm_mrrc_qualifiers): ... this. New.
* config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc,
__arm_mrrc2): New.
* config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New.
* config/arm/iterators.md (MCRRI, mcrr, MCRR): New.
(MRRCI, mrrc, MRRC): New.
* config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC,
VUNSPEC_MRRC2): New.

gcc/testsuite/ChangeLog.arm:
2016-12-05  Andre Vieira  

* gcc.target/arm/acle/mcrr: New.
* gcc.target/arm/acle/mcrr2: New.
* gcc.target/arm/acle/mrrc: New.
* gcc.target/arm/acle/mrrc2: New.
diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm
index 
3f7d684fd8264d5194d78b04fb237ea28012f714..3ca93cba4ec2f8f62710b2625ce765e234a173a8
 100644
--- a/gcc/ChangeLog.arm
+++ b/gcc/ChangeLog.arm
@@ -1,5 +1,25 @@
 2016-12-05  Andre Vieira  
 
+   * config/arm/arm.md (): New.
+   (): New.
+   * config/arm/arm.c (arm_arch5te): New.
+   (arm_option_override): Set arm_arch5te.
+   (arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc
+   and mrrc2.
+   * config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to...

[PATCH] Improve fold_compare (PR c++/71537)

[Jakub Jelinek]

Hi!

As the testcase shows, we also want to fold "abcd" + 3 != NULL
at constant time.  The following patch fixes that.
Additionally, I think if !indirect_base0 then we basically want to compare
whether the base0's value rather than address is non-NULL, which we can't
optimize.  All we can optimize is when indirect_base0 is true, i.e. we
want to ask whether base0's address + some constant offset is non-NULL.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2016-12-05  Jakub Jelinek  

PR c++/71537
* fold-const.c (fold_comparison): Assume CONSTANT_CLASS_P (base0)
plus offset is non-zero.  For maybe_nonzero_address decl base0,
require indirect_base0.

* g++.dg/cpp0x/constexpr-71537.C: New test.

--- gcc/fold-const.c.jj 2016-11-23 16:47:32.0 +0100
+++ gcc/fold-const.c2016-12-05 15:17:29.425739667 +0100
@@ -8419,14 +8419,16 @@ fold_comparison (location_t loc, enum tr
 below follow the C++ rules with the additional property that
 every object pointer compares greater than a null pointer.
   */
-  else if (DECL_P (base0)
-  && maybe_nonzero_address (base0) > 0
-  /* Avoid folding references to struct members at offset 0 to
- prevent tests like '&ptr->firstmember == 0' from getting
- eliminated.  When ptr is null, although the -> expression
- is strictly speaking invalid, GCC retains it as a matter
- of QoI.  See PR c/44555. */
-  && (offset0 == NULL_TREE && bitpos0 != 0)
+  else if (((DECL_P (base0)
+&& maybe_nonzero_address (base0) > 0
+/* Avoid folding references to struct members at offset 0 to
+   prevent tests like '&ptr->firstmember == 0' from getting
+   eliminated.  When ptr is null, although the -> expression
+   is strictly speaking invalid, GCC retains it as a matter
+   of QoI.  See PR c/44555. */
+&& (offset0 == NULL_TREE && bitpos0 != 0))
+   || CONSTANT_CLASS_P (base0))
+  && indirect_base0
   /* The caller guarantees that when one of the arguments is
  constant (i.e., null in this case) it is second.  */
   && integer_zerop (arg1))
--- gcc/testsuite/g++.dg/cpp0x/constexpr-71537.C.jj 2016-12-05 
15:34:09.648000207 +0100
+++ gcc/testsuite/g++.dg/cpp0x/constexpr-71537.C2016-12-05 
15:33:47.0 +0100
@@ -0,0 +1,18 @@
+// PR c++/71537
+// { dg-do compile { target c++11 } }
+
+constexpr int n[42] = {1};
+constexpr int x1 = n ? 1 : 0;
+constexpr int x2 = n + 1 ? 1 : 0;
+constexpr int x3 = "abc" ? 1 : 0;
+constexpr int x4 = "abc" + 1 ? 1 : 0;
+constexpr bool x5 = "abc" + 1;
+constexpr bool x6 = "abc" + 4;
+constexpr bool x7 = n + 42;
+static_assert (x1 == 1, "");
+static_assert (x2 == 1, "");
+static_assert (x3 == 1, "");
+static_assert (x4 == 1, "");
+static_assert (x5, "");
+static_assert (x6, "");
+static_assert (x7, "");

Jakub

[arm-embedded][committed][PATCH 5/6] ARM ACLE Coprocessor MCR and MRC intrinsics

[Andre Vieira (lists)]

On 09/11/16 10:12, Andre Vieira (lists) wrote:
> Hi,
> 
> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
> intrinsics. See below a table mapping the intrinsics to their respective
> instructions:
> 
> +---+---+
> | Intrinsic signature   |
> Instruction pattern   |
> +---+---+
> |void __arm_mcr(coproc, opc1, uint32_t value, CRn, CRm, opc2)   |
> MCR coproc, opc1, Rt, CRn, CRm, opc2  |
> +---+---+
> |void __arm_mcr2(coproc, opc1, uint32_t value, CRn, CRm, opc2)  |
> MCR2 coproc, opc1, Rt, CRn, CRm, opc2 |
> +---+---+
> |uint32_t __arm_mrc(coproc, opc1, CRn, CRm, opc2)   |
> MRC coproc, opc1, Rt, CRn, CRm, opc2  |
> +---+---+
> |uint32_t __arm_mrc2(coproc, opc1, CRn, CRm, opc2)  |
> MRC2 coproc, opc1, Rt, CRn, CRm, opc2 |
> +---+---+
> Note that any untyped variable in the intrinsic signature is required to
> be a compiler-time constant and has the type 'unsigned int'.  We do some
> boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31],opc2:[0-7].  If
> either of these requirements are not met a diagnostic is issued.
> 
> Is this OK for trunk?
> 
> Regards,
> Andre
> 
> gcc/ChangeLog:
> 2016-11-09  Andre Vieira  
> 
>   * config/arm/arm.md (): New.
>   (): New.
>   * config/arm/arm.c (arm_coproc_builtin_available): Add
>   support for mcr, mrc, mcr2 and mrc2.
>   * config/arm/arm-builtins.c (MCR_QUALIFIERS): Define to...
>   (arm_mcr_qualifiers): ... this. New.
>   (MRC_QUALIFIERS): Define to ...
>   (arm_mrc_qualifiers): ... this. New.
>   (MCR_QUALIFIERS): Define to ...
>   (arm_mcr_qualifiers): ... this. New.
>   * config/arm/arm_acle.h (__arm_mcr, __arm_mrc, __arm_mcr2,
>   __arm_mrc2): New.
>   * config/arm/arm_acle_builtins.def (mcr, mcr2, mrc, mrc2): New.
>   * config/arm/iterators.md (MCRI, mcr, MCR, MRCI, mrc, MRC): New.
>   * config/arm/unspecs.md (VUNSPEC_MCR, VUNSPEC_MCR2, VUNSPEC_MRC,
>   VUNSPEC_MRC2): New.
> 
> 
> gcc/ChangeLog:
> 2016-11-09  Andre Vieira  
> 
>   * gcc.target/arm/acle/mcr.c: New.
>   * gcc.target/arm/acle/mrc.c: New.
>   * gcc.target/arm/acle/mcr2.c: New.
>   * gcc.target/arm/acle/mrc2.c: New.
> 
Hi,

I committed this patch to the embedded-6-branch in revision r243263.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

* config/arm/arm.md (): New.
(): New.
* config/arm/arm.c (arm_coproc_builtin_available): Add
support for mcr, mrc, mcr2 and mrc2.
* config/arm/arm-builtins.c (MCR_QUALIFIERS): Define to...
(arm_mcr_qualifiers): ... this. New.
(MRC_QUALIFIERS): Define to ...
(arm_mrc_qualifiers): ... this. New.
(MCR_QUALIFIERS): Define to ...
(arm_mcr_qualifiers): ... this. New.
* config/arm/arm_acle.h (__arm_mcr, __arm_mrc, __arm_mcr2,
__arm_mrc2): New.
* config/arm/arm_acle_builtins.def (mcr, mcr2, mrc, mrc2): New.
* config/arm/iterators.md (MCRI, mcr, MCR, MRCI, mrc, MRC): New.
* config/arm/unspecs.md (VUNSPEC_MCR, VUNSPEC_MCR2, VUNSPEC_MRC,
VUNSPEC_MRC2): New.

gcc/testsuite/ChangeLog.arm:
2016-12-05  Andre Vieira  

* gcc.target/arm/acle/mcr.c: New.
* gcc.target/arm/acle/mrc.c: New.
* gcc.target/arm/acle/mcr2.c: New.
* gcc.target/arm/acle/mrc2.c: New.
diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm
index 
6e8954baa34483d99a015eeb3fa931c887b19c12..3f7d684fd8264d5194d78b04fb237ea28012f714
 100644
--- a/gcc/ChangeLog.arm
+++ b/gcc/ChangeLog.arm
@@ -1,5 +1,24 @@
 2016-12-05  Andre Vieira  
 
+   * config/arm/arm.md (): New.
+   (): New.
+   * config/arm/arm.c (arm_coproc_builtin_available): Add
+   support for mcr, mrc, mcr2 and mrc2.
+   * config/arm/arm-builtins.c (MCR_QUALIFIERS): Define to...
+   (arm_mcr_qualifiers): ... this. New.
+   (MRC_QUALIFIERS): Define to ...
+   (arm_mrc_qualifiers): ... this. New.
+   (MCR_QUALIFIERS): Define to ...
+   (arm_mcr_qualifiers): ... this. New.
+   * config/arm/arm_acle.h (__arm_mcr, __arm_mrc, __arm_mcr2,
+   __arm_mrc2): New.
+   * config/arm/arm_acle_builtins.def (mcr, mcr2, mrc, mrc2): New.
+   * config/arm/iterators.md (MCRI, mcr, MCR, MRCI, mrc, MRC): New.
+   * config/arm/unspecs.md (VUNSPEC_MCR, VUNSPEC_MCR2, VUNSPEC_MRC,
+   VUNSPEC_MRC2): New.
+
+2016-12-05  Andre Vieira  
+

[PATCH] Readd memchr constant folding (PR c++/71537)

[Jakub Jelinek]

Hi!

The slightly less recent but also post-6 changes to move memchr
folding from builtins.c to gimple-fold.c and fold-const-call.c also broke
the constexpr handling, it now only constant folds calls that return NULL,
while previously it also handled returning first argument + constant offset.

This patch moves the misplaced memchr handling from fold_const_call_1 to
fold_const_call where similar functions are already handled, fixes
formatting etc. and also handles the case when argument + constant offset
should be returned.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2016-12-05  Jakub Jelinek  

* fold-const-call.c (fold_const_call_1): Remove memchr handling here.
(fold_const_call) : Formatting improvements.
(fold_const_call) : Likewise.  If s2 is 0
and arguments have no side-effects, return 0.
(fold_const_call): Handle CFN_BUILT_IN_MEMCHR.

* g++.dg/cpp0x/constexpr-memchr.C: New test.

--- gcc/fold-const-call.c.jj2016-12-05 12:53:38.0 +0100
+++ gcc/fold-const-call.c   2016-12-05 14:25:13.075687677 +0100
@@ -1491,36 +1491,6 @@ fold_const_call_1 (combined_fn fn, tree
   return NULL_TREE;
 }
 
-  switch (fn)
-{
-case CFN_BUILT_IN_MEMCHR:
-  {
-   char c;
-   if (integer_zerop (arg2)
-   && !TREE_SIDE_EFFECTS (arg0)
-   && !TREE_SIDE_EFFECTS (arg1))
- return build_int_cst (type, 0);
-
-   if (!tree_fits_uhwi_p (arg2) || !target_char_cst_p (arg1, &c))
- return NULL_TREE;
-
-   unsigned HOST_WIDE_INT length = tree_to_uhwi (arg2);
-   unsigned HOST_WIDE_INT string_length;
-   const char *p1 = c_getstr (arg0, &string_length);
-   if (p1)
- {
-   const char *r
- = (const char *)memchr (p1, c, MIN (length, string_length));
-   if (r == NULL && length <= string_length)
- return build_int_cst (type, 0);
- }
-
-   break;
-  }
-default:
-  break;
-}
-
   return NULL_TREE;
 }
 
@@ -1531,47 +1501,69 @@ tree
 fold_const_call (combined_fn fn, tree type, tree arg0, tree arg1, tree arg2)
 {
   const char *p0, *p1;
+  char c;
   unsigned HOST_WIDE_INT s0, s1;
   size_t s2 = 0;
   switch (fn)
 {
 case CFN_BUILT_IN_STRNCMP:
-  {
-   bool const_size_p = host_size_t_cst_p (arg2, &s2);
-   if (const_size_p && s2 == 0
-   && !TREE_SIDE_EFFECTS (arg0)
-   && !TREE_SIDE_EFFECTS (arg1))
- return build_int_cst (type, 0);
-   else if (const_size_p
-&& (p0 = c_getstr (arg0))
-&& (p1 = c_getstr (arg1)))
- return build_int_cst (type, strncmp (p0, p1, s2));
+  if (!host_size_t_cst_p (arg2, &s2))
return NULL_TREE;
-  }
+  if (s2 == 0
+ && !TREE_SIDE_EFFECTS (arg0)
+ && !TREE_SIDE_EFFECTS (arg1))
+   return build_int_cst (type, 0);
+  else if ((p0 = c_getstr (arg0)) && (p1 = c_getstr (arg1)))
+   return build_int_cst (type, strncmp (p0, p1, s2));
+  return NULL_TREE;
+
 case CFN_BUILT_IN_STRNCASECMP:
-  {
-   bool const_size_p = host_size_t_cst_p (arg2, &s2);
-   if (const_size_p && s2 == 0
-   && !TREE_SIDE_EFFECTS (arg0)
-   && !TREE_SIDE_EFFECTS (arg1))
- return build_int_cst (type, 0);
-   else if (const_size_p
-&& (p0 = c_getstr (arg0))
-&& (p1 = c_getstr (arg1))
-&& strncmp (p0, p1, s2) == 0)
- return build_int_cst (type, 0);
+  if (!host_size_t_cst_p (arg2, &s2))
return NULL_TREE;
-  }
+  if (s2 == 0
+ && !TREE_SIDE_EFFECTS (arg0)
+ && !TREE_SIDE_EFFECTS (arg1))
+   return build_int_cst (type, 0);
+  else if ((p0 = c_getstr (arg0))
+  && (p1 = c_getstr (arg1))
+  && strncmp (p0, p1, s2) == 0)
+   return build_int_cst (type, 0);
+  return NULL_TREE;
+
 case CFN_BUILT_IN_BCMP:
 case CFN_BUILT_IN_MEMCMP:
+  if (!host_size_t_cst_p (arg2, &s2))
+   return NULL_TREE;
+  if (s2 == 0
+ && !TREE_SIDE_EFFECTS (arg0)
+ && !TREE_SIDE_EFFECTS (arg1))
+   return build_int_cst (type, 0);
   if ((p0 = c_getstr (arg0, &s0))
  && (p1 = c_getstr (arg1, &s1))
- && host_size_t_cst_p (arg2, &s2)
  && s2 <= s0
  && s2 <= s1)
return build_cmp_result (type, memcmp (p0, p1, s2));
   return NULL_TREE;
 
+case CFN_BUILT_IN_MEMCHR:
+  if (!host_size_t_cst_p (arg2, &s2))
+   return NULL_TREE;
+  if (s2 == 0
+ && !TREE_SIDE_EFFECTS (arg0)
+ && !TREE_SIDE_EFFECTS (arg1))
+   return build_int_cst (type, 0);
+  if ((p0 = c_getstr (arg0, &s0))
+ && s2 <= s0
+ && target_char_cst_p (arg1, &c))
+   {
+ const char *r = (const char *) memchr (p0, c, s2);
+ if (r == NULL)
+   return build_int_cst (type, 0);
+ return fold_convert (type,
+  

[arm-embedded][committed][PATCH 4/6] ARM ACLE Coprocessor LDC and STC intrinsics

[Andre Vieira (lists)]

On 09/11/16 10:12, Andre Vieira (lists) wrote:
> Hi,
> 
> This patch implements support for the ARM ACLE Coprocessor LDC and STC
> intrinsics. See below a table mapping the intrinsics to their respective
> instructions:
> 
> ++--+
> | Intrinsic signature| Instruction
> pattern  |
> ++--+
> |void __arm_ldc(coproc, CRd, const void* p)  |LDC coproc, CRd,
> [...]|
> ++--+
> |void __arm_ldcl(coproc, CRd, const void* p) |LDCL coproc, CRd,
> [...]   |
> ++--+
> |void __arm_ldc2(coproc, CRd, const void* p) |LDC2 coproc, CRd,
> [...]   |
> ++--+
> |void __arm_ldc2l(coproc, CRd, const void* p)|LDC2L coproc, CRd,
> [...]  |
> ++--+
> |void __arm_stc(coproc, CRd, void* p)|STC coproc, CRd,
> [...]|
> ++--+
> |void __arm_stcl(coproc, CRd, void* p)   |STCL coproc, CRd,
> [...]   |
> ++--+
> |void __arm_stc2(coproc, CRd, void* p)   |STC2 coproc, CRd,
> [...]   |
> ++--+
> |void __arm_stc2l(coproc, CRd, void* p)  |STC2L coproc, CRd,
> [...]  |
> ++--+
> Note that any untyped variable in the intrinsic signature is required to
> be a compiler-time constant and has the type 'unsigned int'.  We do some
> boundary checks for coproc:[0-15], CR*:[0-31]. If either of these
> requirements are not met a diagnostic is issued.
> 
> 
> Is this ok for trunk?
> 
> Regards,
> Andre
> 
> gcc/ChangeLog:
> 2016-11-09  Andre Vieira  
> 
>   * config/arm/arm.md (*ldcstc): New.
>   (): New.
>   * config/arm/arm.c (arm_coproc_builtin_available): Add
>   support for ldc,ldcl,stc,stcl,ldc2,ldc2l,stc2 and stc2l.
>   (arm_coproc_ldc_stc_legitimate_address): New.
>   * config/arm/arm-builtins.c (arm_type_qualifiers): Add
>   'qualifier_const_pointer'.
>   (LDC_QUALIFIERS): Define to...
>   (arm_ldc_qualifiers): ... this. New.
>   (STC_QUALIFIERS): Define to...
>   (arm_stc_qualifiers): ... this. New.
>   * config/arm/arm-protos.h
>   (arm_coproc_ldc_stc_legitimate_address): New.
>   * config/arm/arm_acle.h (__arm_ldc, __arm_ldcl, __arm_stc,
>   __arm_stcl, __arm_ldc2, __arm_ldc2l, __arm_stc2, __arm_stc2l): New.
>   * config/arm/arm_acle_builtins.def (ldc, ldc2, ldcl, ldc2l, stc,
>   stc2, stcl, stc2l): New.
>   * config/arm/constraints.md (Uz): New.
>   * config/arm/iterators.md (LDCSTCI, ldcstc, LDCSTC): New.
>   * config/arm/unspecs.md (VUNSPEC_LDC, VUNSPEC_LDC2, VUNSPEC_LDCL,
>   VUNSPEC_LDC2L, VUNSPEC_STC, VUNSPEC_STC2, VUNSPEC_STCL,
>   VUNSPEC_STC2L): New.
> 
> gcc/testsuite/ChangeLog:
> 
> 2016-11-09  Andre Vieira  
> 
>   * gcc.target/arm/acle/ldc: New.
>   * gcc.target/arm/acle/ldc2: New.
>   * gcc.target/arm/acle/ldcl: New.
>   * gcc.target/arm/acle/ldc2l: New.
>   * gcc.target/arm/acle/stc: New.
>   * gcc.target/arm/acle/stc2: New.
>   * gcc.target/arm/acle/stcl: New.
>   * gcc.target/arm/acle/stc2l: New.
> 
> 
Hi,

I committed this patch to the embedded-6-branch in revision r243262.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

* config/arm/arm.md (*ldcstc): New.
(): New.
* config/arm/arm.c (arm_coproc_builtin_available): Add
support for ldc,ldcl,stc,stcl,ldc2,ldc2l,stc2 and stc2l.
(arm_coproc_ldc_stc_legitimate_address): New.
* config/arm/arm-builtins.c (arm_type_qualifiers): Add
'qualifier_const_pointer'.
(LDC_QUALIFIERS): Define to...
(arm_ldc_qualifiers): ... this. New.
(STC_QUALIFIERS): Define to...
(arm_stc_qualifiers): ... this. New.
* config/arm/arm-protos.h
(arm_coproc_ldc_stc_legitimate_address): New.
* config/arm/arm_acle.h (__arm_ldc, __arm_ldcl, __arm_stc,
__arm_stcl, __arm_ldc2, __arm_ldc2l, __arm_stc2, __arm_stc2l): New.
* config/arm/arm_acle_builtins.def (ldc, ldc2, ldcl, ldc2l, stc,
stc2, stcl, stc2l): New.
* config/arm/constraints.md (Uz): New.
* config/arm/iterators.md (LDCSTCI, ldcstc, LDCSTC): New.
* config/arm/unspecs.md (VUNSPEC_LDC, VUNSPEC_LDC2, 

[PATCH] Readd strchr constant folding (PR c++/71537)

[Jakub Jelinek]

Hi!

The recent changes to move strchr folding from builtins.c to gimple-fold.c
broke constexpr handling with __builtin_strchr etc. (which the libstdc++
folks want to use).

Fixed by handling it also in fold-const-call.c.  Bootstrapped/regtested on
x86_64-linux and i686-linux, ok for trunk?

2016-12-05  Jakub Jelinek  

PR c++/71537
* fold-const-call.c (fold_const_call): Handle
CFN_BUILT_IN_{INDEX,STRCHR,RINDEX,STRRCHR}.

* g++.dg/cpp0x/constexpr-strchr.C: New test.

--- gcc/fold-const-call.c.jj2016-11-09 18:54:03.0 +0100
+++ gcc/fold-const-call.c   2016-12-05 12:53:38.597090946 +0100
@@ -1383,6 +1383,7 @@ tree
 fold_const_call (combined_fn fn, tree type, tree arg0, tree arg1)
 {
   const char *p0, *p1;
+  char c;
   switch (fn)
 {
 case CFN_BUILT_IN_STRSPN:
@@ -1409,6 +1410,30 @@ fold_const_call (combined_fn fn, tree ty
}
   return NULL_TREE;
 
+case CFN_BUILT_IN_INDEX:
+case CFN_BUILT_IN_STRCHR:
+  if ((p0 = c_getstr (arg0)) && target_char_cst_p (arg1, &c))
+   {
+ const char *r = strchr (p0, c);
+ if (r == NULL)
+   return build_int_cst (type, 0);
+ return fold_convert (type,
+  fold_build_pointer_plus_hwi (arg0, r - p0));
+   }
+  return NULL_TREE;
+
+case CFN_BUILT_IN_RINDEX:
+case CFN_BUILT_IN_STRRCHR:
+  if ((p0 = c_getstr (arg0)) && target_char_cst_p (arg1, &c))
+   {
+ const char *r = strrchr (p0, c);
+ if (r == NULL)
+   return build_int_cst (type, 0);
+ return fold_convert (type,
+  fold_build_pointer_plus_hwi (arg0, r - p0));
+   }
+  return NULL_TREE;
+
 default:
   return fold_const_call_1 (fn, type, arg0, arg1);
 }
--- gcc/testsuite/g++.dg/cpp0x/constexpr-strchr.C.jj2016-12-05 
13:00:19.448101292 +0100
+++ gcc/testsuite/g++.dg/cpp0x/constexpr-strchr.C   2016-12-05 
13:00:36.27012 +0100
@@ -0,0 +1,27 @@
+// { dg-do compile { target c++11 } }
+
+constexpr const char *f1 (const char *p, int q) { return __builtin_strchr (p, 
q); }
+constexpr const char *f2 (const char *p, int q) { return __builtin_index (p, 
q); }
+constexpr const char *f3 (const char *p, int q) { return __builtin_strrchr (p, 
q); }
+constexpr const char *f4 (const char *p, int q) { return __builtin_rindex (p, 
q); }
+constexpr const char a[] = "abcdefedcba";
+static_assert (f1 ("abcde", 'f') == nullptr, "");
+static_assert (f1 (a, 'g') == nullptr, "");
+static_assert (f1 (a, 'f') == a + 5, "");
+static_assert (f1 (a, 'c') == a + 2, "");
+static_assert (f1 (a, '\0') == a + 11, "");
+static_assert (f2 ("abcde", 'f') == nullptr, "");
+static_assert (f2 (a, 'g') == nullptr, "");
+static_assert (f2 (a, 'f') == a + 5, "");
+static_assert (f2 (a, 'c') == a + 2, "");
+static_assert (f2 (a, '\0') == a + 11, "");
+static_assert (f3 ("abcde", 'f') == nullptr, "");
+static_assert (f3 (a, 'g') == nullptr, "");
+static_assert (f3 (a, 'f') == a + 5, "");
+static_assert (f3 (a, 'c') == a + 8, "");
+static_assert (f3 (a, '\0') == a + 11, "");
+static_assert (f4 ("abcde", 'f') == nullptr, "");
+static_assert (f4 (a, 'g') == nullptr, "");
+static_assert (f4 (a, 'f') == a + 5, "");
+static_assert (f4 (a, 'c') == a + 8, "");
+static_assert (f4 (a, '\0') == a + 11, "");

Jakub

[arm-embedded][committed][PATCH 3/6] ARM ACLE Coprocessor CDP intrinsics

[Andre Vieira (lists)]

On 09/11/16 10:11, Andre Vieira (lists) wrote:
> Hi,
> 
> This patch implements support for the ARM ACLE Coprocessor CDP
> intrinsics. See below a table mapping the intrinsics to their respective
> instructions:
> 
> ++--+
> | Intrinsic signature| Instruction
> pattern  |
> ++--+
> |void __arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2)   |CDP coproc, opc1,
> CRd, CRn, CRm, opc2 |
> ++--+
> |void __arm_cdp2(coproc, opc1, CRd, CRn, CRm, opc2)  |CDP2 coproc, opc1,
> CRd, CRn, CRm, opc2|
> ++--+
> Note that any untyped variable in the intrinsic signature is required to
> be a compiler-time constant and has the type 'unsigned int'.  We do some
> boundary checks for coproc:[0-15], opc1:[0-15], CR*:[0-31], opc2:[0-7].
> If either of these requirements are not met a diagnostic is issued.
> 
> I renamed neon_const_bounds in this patch, to arm_const_bounds, simply
> because it is also used in the Coprocessor intrinsics.  It also requires
> the expansion of the builtin frame work such that it accepted 'void'
> modes and intrinsics with 6 arguments.
> 
> I also changed acle.exp to run tests for multiple options, where all lto
> option sets are appended with -ffat-objects to allow for assembly scans.
> 
> Is this OK for trunk?
> 
> Regards,
> Andre
> 
> gcc/ChangeLog:
> 2016-11-09  Andre Vieira  
> 
>   * config/arm/arm.md (): New.
>   * config/arm/arm.c (neon_const_bounds): Rename this ...
>   (arm_const_bounds): ... this.
>   (arm_coproc_builtin_available): New.
>   * config/arm/arm-builtins.c (SIMD_MAX_BUILTIN_ARGS): Increase.
>   (arm_type_qualifiers): Add 'qualifier_unsigned_immediate'.
>   (CDP_QUALIFIERS): Define to...
>   (arm_cdp_qualifiers): ... this. New.
>   (void_UP): Define.
>   (arm_expand_builtin_args): Add case for 6 arguments.
>   * config/arm/arm-protos.h (neon_const_bounds): Rename this ...
>   (arm_const_bounds): ... this.
>   (arm_coproc_builtin_available): New.
>   * config/arm/arm_acle.h (__arm_cdp): New.
>   (__arm_cdp2): New.
>   * config/arm/arm_acle_builtins.def (cdp): New.
>   (cdp2): New.
>   * config/arm/iterators.md (CDPI,CDP,cdp): New.
>   * config/arm/neon.md: Rename all 'neon_const_bounds' to
>   'arm_const_bounds'.
>   * config/arm/types.md (coproc): New.
>   * config/arm/unspecs.md (VUNSPEC_CDP, VUNSPEC_CDP2): New.
>   * gcc/doc/extend.texi (ACLE): Add a mention of Coprocessor intrinsics.
> 
> gcc/testsuite/ChangeLog:
> 2016-11-09  Andre Vieira  
> 
>   * gcc.target/arm/acle/acle.exp: Run tests for different options
>   and make sure fat-lto-objects is used such that we can still do
>   assemble scans.
>   * gcc.target/arm/acle/cdp.c: New.
>   * gcc.target/arm/acle/cdp2.c: New.
>   * lib/target-supports.exp (check_effective_target_arm_coproc1_ok): New.
>   (check_effective_target_arm_coproc1_ok_nocache): New.
>   (check_effective_target_arm_coproc2_ok): New.
>   (check_effective_target_arm_coproc2_ok_nocache): New.
>   (check_effective_target_arm_coproc3_ok): New.
>   (check_effective_target_arm_coproc3_ok_nocache): New.
> 
Hi,

I committed this patch to the embedded-6-branch in revision r243261.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-11-09  Andre Vieira  

* config/arm/arm.md (): New.
* config/arm/arm.c (neon_const_bounds): Rename this ...
(arm_const_bounds): ... this.
(arm_coproc_builtin_available): New.
* config/arm/arm-builtins.c (SIMD_MAX_BUILTIN_ARGS): Increase.
(arm_type_qualifiers): Add 'qualifier_unsigned_immediate'.
(CDP_QUALIFIERS): Define to...
(arm_cdp_qualifiers): ... this. New.
(void_UP): Define.
(arm_expand_builtin_args): Add case for 6 arguments.
* config/arm/arm-protos.h (neon_const_bounds): Rename this ...
(arm_const_bounds): ... this.
(arm_coproc_builtin_available): New.
* config/arm/arm_acle.h (__arm_cdp): New.
(__arm_cdp2): New.
* config/arm/arm_acle_builtins.def (cdp): New.
(cdp2): New.
* config/arm/iterators.md (CDPI,CDP,cdp): New.
* config/arm/neon.md: Rename all 'neon_const_bounds' to
'arm_const_bounds'.
* config/arm/types.md (coproc): New.
* config/arm/unspecs.md (VUNSPEC_CDP, VUNSPEC_CDP2): New.
* gcc/doc/extend.texi (ACLE): Add a mention of Coprocessor intrinsics.
* gcc/doc/sourcebuild.tex
(arm_coproc1_ok, arm_coproc2_ok, arm_coproc3_ok): New.

gcc/testsuite/ChangeLog.arm:
2016-12-05  Andre Vieira  

* gcc.target/arm/acle/acle.exp: Run tests for different options
and make sure fat-lto-objects is used such that we can still do
assemble scans.
   

Re: [SPARC] Disable U constraint with LRA

[Eric Botcazou]

> Fixed by disabling the relevant alternatives in the few patterns using the
> constraint and replacing it with a simple r constraint.  This yields a clean
> C testsuite in 32-bit mode.

There was a thinko in the patch: the U constraint cannot be just replaced with 
r as-is, because it is matched with the T constraint so, if the double-word 
register is not aligned, the double-word move needs to be split and this will 
require an offsetable memory reference, what T doesn't guarantee.  This was 
generating an illegal instruction for ACATS cxac004 at -O and above.

Fixed by the attached patch, which also overhauls the 3 series of double-word 
move splitters in 32-bit mode.  Tested on SPARC/Solaris w/ and w/o -mlra in 
32-bit mode, applied on the mainline.


2016-12-05  Eric Botcazou  

* config/sparc/sparc-protos.h (sparc_splitdi_legitimate): Rename to..
(sparc_split_reg_mem_legitimate): ...this.
(sparc_split_reg_mem): Declare.
(sparc_split_mem_reg): Likewise.
(sparc_split_regreg_legitimate): Rename to...
(sparc_split_reg_reg_legitimate): ...this.
* config/sparc/sparc.c (sparc_splitdi_legitimate): Rename to...
(sparc_split_reg_mem_legitimate): ...this.
(sparc_split_reg_mem): New function.
(sparc_split_mem_reg): Likewise.
(sparc_split_regreg_legitimate): Rename to...
(sparc_split_reg_reg_legitimate): ...this.
(sparc_split_reg_reg): New function.
* config/sparc/sparc.md (lra): Remove "none" value.
(enabled): Adjust to above change.
(*movdi_insn_sp32): Remove new (r,T) alternative and reorder others.
(DImode splitters): Adjust to above renamings and use new functions.
(*movdf_insn_sp32): Remove new (r,T) alternative and reorder others.
(DFmode splitters): Adjust to above renamings and use new functions.
(*mov_insn_sp64): Replace C with Z constraint and use W
constraint in conjunction with e.
(*mov_insn_sp32): Remove new (r,T) alternative, add (o,Y)
alternative and reorder others.
(VM64:mode splitters): Adjust to above renamings and use new
functions.

-- 
Eric BotcazouIndex: config/sparc/sparc-protos.h
===
--- config/sparc/sparc-protos.h	(revision 243172)
+++ config/sparc/sparc-protos.h	(working copy)
@@ -68,8 +68,11 @@ extern void sparc_emit_call_insn (rtx, r
 extern void sparc_defer_case_vector (rtx, rtx, int);
 extern bool sparc_expand_move (machine_mode, rtx *);
 extern void sparc_emit_set_symbolic_const64 (rtx, rtx, rtx);
-extern int sparc_splitdi_legitimate (rtx, rtx);
-extern int sparc_split_regreg_legitimate (rtx, rtx);
+extern int sparc_split_reg_mem_legitimate (rtx, rtx);
+extern void sparc_split_reg_mem (rtx, rtx, machine_mode);
+extern void sparc_split_mem_reg (rtx, rtx, machine_mode);
+extern int sparc_split_reg_reg_legitimate (rtx, rtx);
+extern void sparc_split_reg_reg (rtx, rtx, machine_mode);
 extern const char *output_ubranch (rtx, rtx_insn *);
 extern const char *output_cbranch (rtx, rtx, int, int, int, rtx_insn *);
 extern const char *output_return (rtx_insn *);
Index: config/sparc/sparc.c
===
--- config/sparc/sparc.c	(revision 243172)
+++ config/sparc/sparc.c	(working copy)
@@ -8484,46 +8484,82 @@ order_regs_for_local_alloc (void)
 }
 
 /* Return 1 if REG and MEM are legitimate enough to allow the various
-   mem<-->reg splits to be run.  */
+   MEM<-->REG splits to be run.  */
 
 int
-sparc_splitdi_legitimate (rtx reg, rtx mem)
+sparc_split_reg_mem_legitimate (rtx reg, rtx mem)
 {
   /* Punt if we are here by mistake.  */
   gcc_assert (reload_completed);
 
   /* We must have an offsettable memory reference.  */
-  if (! offsettable_memref_p (mem))
+  if (!offsettable_memref_p (mem))
 return 0;
 
   /* If we have legitimate args for ldd/std, we do not want
  the split to happen.  */
-  if ((REGNO (reg) % 2) == 0
-  && mem_min_alignment (mem, 8))
+  if ((REGNO (reg) % 2) == 0 && mem_min_alignment (mem, 8))
 return 0;
 
   /* Success.  */
   return 1;
 }
 
-/* Like sparc_splitdi_legitimate but for REG <--> REG moves.  */
+/* Split a REG <-- MEM move into a pair of moves in MODE.  */
+
+void
+sparc_split_reg_mem (rtx dest, rtx src, machine_mode mode)
+{
+  rtx high_part = gen_highpart (mode, dest);
+  rtx low_part = gen_lowpart (mode, dest);
+  rtx word0 = adjust_address (src, mode, 0);
+  rtx word1 = adjust_address (src, mode, 4);
+
+  if (reg_overlap_mentioned_p (high_part, word1))
+{
+  emit_move_insn_1 (low_part, word1);
+  emit_move_insn_1 (high_part, word0);
+}
+  else
+{
+  emit_move_insn_1 (high_part, word0);
+  emit_move_insn_1 (low_part, word1);
+}
+}
+
+/* Split a MEM <-- REG move into a pair of moves in MODE.  */
+
+void
+sparc_split_mem_reg (rtx dest, rtx src, machine_mode mode)
+{
+  rtx word0 = adjust_addres

[PATCH] Fix BIT_FIELD_REF type on vectorizable_live_operation created BFR (PR tree-optimization/78675)

[Jakub Jelinek]

Hi!

For VECTOR_BOOLEAN_TYPE_P vectype the element type can have different
precision from TYPE_SIZE, which is what we use for the bitsize.
The following patch uses then some other integral type of that precision
before it is actually converted to lhs_type (boolean_type_node).

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2016-12-05  Jakub Jelinek  

PR tree-optimization/78675
* tree-vect-loop.c (vectorizable_live_operation): For
VECTOR_BOOLEAN_TYPE_P vectype use integral type with bitsize precision
instead of TREE_TYPE (vectype) for the BIT_FIELD_REF.

* gcc.target/i386/pr78675-1.c: New test.
* gcc.target/i386/pr78675-2.c: New test.

--- gcc/tree-vect-loop.c.jj 2016-11-16 18:51:58.0 +0100
+++ gcc/tree-vect-loop.c2016-12-05 10:58:59.175857316 +0100
@@ -6601,8 +6601,10 @@ vectorizable_live_operation (gimple *stm
   /* Create a new vectorized stmt for the uses of STMT and insert outside the
  loop.  */
   gimple_seq stmts = NULL;
-  tree new_tree = build3 (BIT_FIELD_REF, TREE_TYPE (vectype), vec_lhs, bitsize,
- bitstart);
+  tree bftype = TREE_TYPE (vectype);
+  if (VECTOR_BOOLEAN_TYPE_P (vectype))
+bftype = build_nonstandard_integer_type (tree_to_uhwi (bitsize), 1);
+  tree new_tree = build3 (BIT_FIELD_REF, bftype, vec_lhs, bitsize, bitstart);
   new_tree = force_gimple_operand (fold_convert (lhs_type, new_tree), &stmts,
   true, NULL_TREE);
   if (stmts)
--- gcc/testsuite/gcc.c-torture/execute/pr78675.c.jj2016-12-05 
11:11:27.497407240 +0100
+++ gcc/testsuite/gcc.c-torture/execute/pr78675.c   2016-12-05 
11:10:44.0 +0100
@@ -0,0 +1,38 @@
+/* PR tree-optimization/78675 */
+
+long int a;
+
+__attribute__((noinline, noclone)) long int
+foo (long int x)
+{
+  long int b;
+  while (a < 1)
+{
+  b = a && x;
+  ++a;
+}
+  return b;
+}
+
+int
+main ()
+{
+  if (foo (0) != 0)
+__builtin_abort ();
+  a = 0;
+  if (foo (1) != 0)
+__builtin_abort ();
+  a = 0;
+  if (foo (25) != 0)
+__builtin_abort ();
+  a = -64;
+  if (foo (0) != 0)
+__builtin_abort ();
+  a = -64;
+  if (foo (1) != 0)
+__builtin_abort ();
+  a = -64;
+  if (foo (25) != 0)
+__builtin_abort ();
+  return 0;
+}
--- gcc/testsuite/gcc.target/i386/pr78675-1.c.jj2016-12-05 
11:11:27.497407240 +0100
+++ gcc/testsuite/gcc.target/i386/pr78675-1.c   2016-12-05 11:10:44.0 
+0100
@@ -0,0 +1,5 @@
+/* PR tree-optimization/78675 */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx512f" } */
+
+#include "../../gcc.c-torture/execute/pr78675.c"
--- gcc/testsuite/gcc.target/i386/pr78675-2.c.jj2016-12-05 
11:13:48.131631261 +0100
+++ gcc/testsuite/gcc.target/i386/pr78675-2.c   2016-12-05 11:14:00.582474027 
+0100
@@ -0,0 +1,15 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mavx512f" } */
+/* { dg-require-effective-target avx512f } */
+
+#include "avx512f-check.h"
+
+#define main do_main
+
+#include "../../gcc.c-torture/execute/pr78675.c"
+
+static void
+avx512f_test (void)
+{
+  do_main ();
+}

Jakub

Re: [PATCH 2/6][ARM] Move CRC builtins to refactored framework

[Andre Vieira (lists)]

On 05/12/16 15:05, Andre Vieira (lists) wrote:
> On 01/12/16 17:25, Andre Vieira (lists) wrote:
>> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>>> Hi,
>>>
>>> This patch refactors the implementation of the ARM ACLE CRC builtins to
>>> use the builtin framework.
>>>
>>> Is this OK for trunk?
>>>
>>> Regards,
>>> Andre
>>>
>>> gcc/ChangeLog
>>> 2016-11-09  Andre Vieira  
>>>
>>>   * config/arm/arm-builtins.c (arm_unsigned_binop_qualifiers): New.
>>>   (UBINOP_QUALIFIERS): New.
>>>   (si_UP): Define.
>>>   (acle_builtin_data): New. Change comment.
>>>   (arm_builtins): Remove ARM_BUILTIN_CRC32B, ARM_BUILTIN_CRC32H,
>>>   ARM_BUILTIN_CRC32W, ARM_BUILTIN_CRC32CB, ARM_BUILTIN_CRC32CH,
>>>   ARM_BUILTIN_CRC32CW. Add ARM_BUILTIN_ACLE_BASE and include
>>>   arm_acle_builtins.def.
>>>   (ARM_BUILTIN_ACLE_PATTERN_START): Define.
>>>   (arm_init_acle_builtins): New.
>>>   (CRC32_BUILTIN): Remove.
>>>   (bdesc_2arg): Remove entries for crc32b, crc32h, crc32w,
>>>   crc32cb, crc32ch and crc32cw.
>>>   (arm_init_crc32_builtins): Remove.
>>>   (arm_init_builtins): Use arm_init_acle_builtins rather
>>>   than arm_init_crc32_builtins.
>>>   (arm_expand_acle_builtin): New.
>>>   (arm_expand_builtin): Use 'arm_expand_acle_builtin'.
>>>   * config/arm/arm_acle_builtins.def: New.
>>>
>> Hi,
>>
>> Reworked this patch based on the changes made in [1/6]. No changes to
>> ChangeLog.
>>
>> Is this OK?
>>
>> Cheers,
>> Andre
>>
> Hi,
> 
> I had a typo in one of the range checks was using ARM_BUILTIN_ACLE_MAX
> where it should've been ARM_BUILTIN_ACLE_BASE.
> 
> Cheers,
> Andre
> 
Hi,

I committed this patch to the embedded-6-branch in revision r243260.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

* config/arm/arm-builtins.c (arm_unsigned_binop_qualifiers): New.
(UBINOP_QUALIFIERS): New.
(si_UP): Define.
(acle_builtin_data): New. Change comment.
(arm_builtins): Remove ARM_BUILTIN_CRC32B, ARM_BUILTIN_CRC32H,
ARM_BUILTIN_CRC32W, ARM_BUILTIN_CRC32CB, ARM_BUILTIN_CRC32CH,
ARM_BUILTIN_CRC32CW. Add ARM_BUILTIN_ACLE_BASE and include
arm_acle_builtins.def.
(ARM_BUILTIN_ACLE_PATTERN_START): Define.
(arm_init_acle_builtins): New.
(CRC32_BUILTIN): Remove.
(bdesc_2arg): Remove entries for crc32b, crc32h, crc32w,
crc32cb, crc32ch and crc32cw.
(arm_init_crc32_builtins): Remove.
(arm_init_builtins): Use arm_init_acle_builtins rather
than arm_init_crc32_builtins.
(arm_expand_acle_builtin): New.
(arm_expand_builtin): Use 'arm_expand_acle_builtin'.
* config/arm/arm_acle_builtins.def: New.
diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm
index 
27bce27e41fe8bace86c295b38accb5931790b53..9b0763dc96469053a64b312eba8f8519cd5667ad
 100644
--- a/gcc/ChangeLog.arm
+++ b/gcc/ChangeLog.arm
@@ -1,5 +1,28 @@
 2016-12-05  Andre Vieira  
 
+   * config/arm/arm-builtins.c (arm_unsigned_binop_qualifiers): New.
+   (UBINOP_QUALIFIERS): New.
+   (si_UP): Define.
+   (acle_builtin_data): New. Change comment.
+   (arm_builtins): Remove ARM_BUILTIN_CRC32B, ARM_BUILTIN_CRC32H,
+   ARM_BUILTIN_CRC32W, ARM_BUILTIN_CRC32CB, ARM_BUILTIN_CRC32CH,
+   ARM_BUILTIN_CRC32CW. Add ARM_BUILTIN_ACLE_BASE and include
+   arm_acle_builtins.def.
+   (ARM_BUILTIN_ACLE_PATTERN_START): Define.
+   (arm_init_acle_builtins): New.
+   (CRC32_BUILTIN): Remove.
+   (bdesc_2arg): Remove entries for crc32b, crc32h, crc32w,
+   crc32cb, crc32ch and crc32cw.
+   (arm_init_crc32_builtins): Remove.
+   (arm_init_builtins): Use arm_init_acle_builtins rather
+   than arm_init_crc32_builtins.
+   (arm_expand_acle_builtin): New.
+   (arm_expand_builtin): Use 'arm_expand_acle_builtin'.
+   (si_UP): New define.
+   * config/arm/arm_acle_builtins.def: New.
+
+2016-12-05  Andre Vieira  
+
* config/arm/arm-builtins.c (neon_builtin_datum): Rename to ...
(arm_builtin_datum): ... this.
(arm_init_neon_builtin): Rename to ...
diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index 
54defbf1c0823807325352427f4b9777b313837b..1fb41c91efc845fb72b9412b5ff3d7fd219fb210
 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -156,6 +156,13 @@ arm_load1_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
   qualifier_none, qualifier_struct_load_store_lane_index };
 #define LOAD1LANE_QUALIFIERS (arm_load1_lane_qualifiers)
 
+/* unsigned T (unsigned T, unsigned T, unsigned T).  */
+static enum arm_type_qualifiers
+arm_unsigned_binop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+  = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,
+  qualifier_unsigned };
+#define UBINOP_QUALIFIERS (arm_unsigned_binop_qualifiers)
+
 /* The first argument (return type) of a store should be void type,
which we represent with qualifier_void.  Their first operand will be
a DImode pointer to the location to store to, so

[arm-embedded][committed][PATCH 1/6] Refactor NEON builtin framework to work for other builtins

[Andre Vieira (lists)]

On 01/12/16 17:25, Andre Vieira (lists) wrote:
> On 17/11/16 10:42, Kyrill Tkachov wrote:
>> Hi Andre,
>>
>> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>>> Hi,
>>>
>>> Refactor NEON builtin framework such that it can be used to implement
>>> other builtins.
>>>
>>> Is this OK for trunk?
>>>
>>> Regards,
>>> Andre
>>>
>>> gcc/ChangeLog
>>> 2016-11-09  Andre Vieira  
>>>
>>>  * config/arm/arm-builtins.c (neon_builtin_datum): Rename to ..
>>>  (arm_builtin_datum): ... this.
>>>  (arm_init_neon_builtin): Rename to ...
>>>  (arm_init_builtin): ... this. Add a new parameters PREFIX
>>>  and USE_SIG_IN_NAME.
>>>  (arm_init_neon_builtins): Replace 'arm_init_neon_builtin' with
>>>  'arm_init_builtin'. Replace type 'neon_builtin_datum' with
>>>  'arm_builtin_datum'.
>>>  (arm_init_vfp_builtins): Likewise.
>>>  (builtin_arg): Rename enum's replacing 'NEON_ARG' with
>>>  'ARG_BUILTIN' and add a 'ARG_BUILTIN_NEON_MEMORY.
>>>  (arm_expand_neon_args): Rename to ...
>>>  (arm_expand_builtin_args): ... this. Rename builtin_arg
>>>  enum values and differentiate between ARG_BUILTIN_MEMORY
>>>  and ARG_BUILTIN_NEON_MEMORY.
>>>  (arm_expand_neon_builtin_1): Rename to ...
>>>  (arm_expand_builtin_1): ... this. Rename builtin_arg enum
>>>  values, arm_expand_builtin_args and add bool parameter NEON.
>>>  (arm_expand_neon_builtin): Use arm_expand_builtin_1.
>>>  (arm_expand_vfp_builtin): Likewise.
>>>  (NEON_MAX_BUILTIN_ARGS): Remove, it was unused.
>>
>>  /* Expand a neon builtin.  This is also used for vfp builtins, which
>> behave in
>> the same way.  These builtins are "special" because they don't have
>> symbolic
>> constants defined per-instruction or per instruction-variant. 
>> Instead, the
>> -   required info is looked up in the NEON_BUILTIN_DATA record that is
>> passed
>> +   required info is looked up in the ARM_BUILTIN_DATA record that is
>> passed
>> into the function.  */
>>  
>>
>> The comment should be updated now that it's not just NEON builtins that
>> are expanded through this function.
>>
>>  static rtx
>> -arm_expand_neon_builtin_1 (int fcode, tree exp, rtx target,
>> -   neon_builtin_datum *d)
>> +arm_expand_builtin_1 (int fcode, tree exp, rtx target,
>> +   arm_builtin_datum *d, bool neon)
>>  {
>>
>> I'm not a fan of this 'neon' boolean as it can cause confusion among the
>> users of the function
>> (see long thread at https://gcc.gnu.org/ml/gcc/2016-10/msg4.html).
>> Whether the builtin is a NEON/VFP builtin
>> can be distinguished from FCODE, so lets just make that bool neon a
>> local variable and initialise it accordingly
>> from FCODE.
>>
>> Same for:
>> +/* Set up a builtin.  It will use information stored in the argument
>> struct D to
>> +   derive the builtin's type signature and name.  It will append the
>> name in D
>> +   to the PREFIX passed and use these to create a builtin declaration
>> that is
>> +   then stored in 'arm_builtin_decls' under index FCODE.  This FCODE is
>> also
>> +   written back to D for future use.  If USE_SIG_IN_NAME is true the
>> builtin's
>> +   name is appended with type signature information to distinguish between
>> +   signedness and poly.  */
>>  
>>  static void
>> -arm_init_neon_builtin (unsigned int fcode,
>> -   neon_builtin_datum *d)
>> +arm_init_builtin (unsigned int fcode, arm_builtin_datum *d,
>> +  const char * prefix, bool use_sig_in_name)
>>
>> use_sig_in_name is dependent on FCODE so just deduce it from that
>> locally in arm_init_builtin.
>>
>> This is ok otherwise.
>> Thanks,
>> Kyrill
>>
>>
> 
> Hi,
> 
> Reworked patch according to comments. No changes to ChangeLog.
> 
> Is this OK?
> 
> Cheers,
> Andre
> 
Hi,

I committed this patch to the embedded-6-branch in revision r243259.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

* config/arm/arm-builtins.c (neon_builtin_datum): Rename to ..
(arm_builtin_datum): ... this.
(arm_init_neon_builtin): Rename to ...
(arm_init_builtin): ... this. Add a new parameters PREFIX
and USE_SIG_IN_NAME.
(arm_init_neon_builtins): Replace 'arm_init_neon_builtin' with
'arm_init_builtin'. Replace type 'neon_builtin_datum' with
'arm_builtin_datum'.
(arm_init_vfp_builtins): Likewise.
(builtin_arg): Rename enum's replacing 'NEON_ARG' with
'ARG_BUILTIN' and add a 'ARG_BUILTIN_NEON_MEMORY.
(arm_expand_neon_args): Rename to ...
(arm_expand_builtin_args): ... this. Rename builtin_arg
enum values and differentiate between ARG_BUILTIN_MEMORY
and ARG_BUILTIN_NEON_MEMORY.
(arm_expand_neon_builtin_1): Rename to ...
(arm_expand_builtin_1): ... this. Rename builtin_arg enum
values, arm_expand_builtin_args and add bool parameter NEON.
(arm_expand_neon_builtin): Use arm_expand_builtin_1.
(arm_expand_vfp_builtin): Like

[arm-embedded][committed][PATCH 10/17] Refactor support code for NEON builtins.

[Andre Vieira (lists)]

On 28/07/16 12:54, Ramana Radhakrishnan wrote:
> On Tue, May 17, 2016 at 3:39 PM, Matthew Wahab
>  wrote:
>> The ACLE intrinsics introduced to support the ARMv8.2 FP16 extensions
>> require that intrinsics for scalar (VFP) instructions are available
>> under different conditions from those for the NEON intrinsics. To
>> support this, changes to the builtins support code are needed to enable
>> the scalar intrinsics to be initialized and expanded independently of
>> the NEON intrinsics.
>>
>> This patch prepares for this by refactoring some of the builtin support
>> code so that it can be used for both the scalar and the NEON intrinsics.
>>
>> Tested the series for arm-none-linux-gnueabihf with native bootstrap and
>> make check and for arm-none-eabi and armeb-none-eabi with make check on
>> an ARMv8.2-A emulator.
> 
> 
> OK.
> 
> Ramana
>>
>> Ok for trunk?
>> Matthew
>>
>> 2016-05-17  Matthew Wahab  
>>
>> * config/arm/arm-builtins.c (ARM_BUILTIN_NEON_PATTERN_START):
>> Change offset calculation.
>> (arm_init_neon_builtin): New.
>> (arm_init_builtins): Move body of a loop to the standalone
>> function arm_init_neon_builtin.
>> (arm_expand_neon_builtin_1): New.  Update comment.  Function body
>> moved from arm_expand_neon_builtin with some white-space fixes.
>> (arm_expand_neon_builtin): Move code into the standalone function
>> arm_expand_neon_builtin_1.
>>
> 
Hi,

Backported this to embedded-6-branch in revision r.


gcc/ChangeLog.arm:

2016-12-05  Andre Vieira  

Backport from mainline
2016-09-23  Matthew Wahab  

* config/arm/arm-builtins.c (arm_init_neon_builtin): New.
(arm_init_builtins): Move body of a loop to the standalone
function arm_init_neon_builtin.
(arm_expand_neon_builtin_1): New.  Update comment.  Function body
moved from arm_neon_builtin with some white-space fixes.
(arm_expand_neon_builtin): Move code into the standalone function
arm_expand_neon_builtin_1.
diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm
index 
800a4b60efe7fe5ba9077217b7eb1271e9e05180..d9c71983cf05c1fe6b7578e2c3d43a581412e708
 100644
--- a/gcc/ChangeLog.arm
+++ b/gcc/ChangeLog.arm
@@ -1,6 +1,19 @@
 2016-12-05  Andre Vieira  
 
Backport from mainline
+   2016-09-23  Matthew Wahab  
+
+* config/arm/arm-builtins.c (arm_init_neon_builtin): New.
+(arm_init_builtins): Move body of a loop to the standalone
+function arm_init_neon_builtin.
+(arm_expand_neon_builtin_1): New.  Update comment.  Function body
+moved from arm_neon_builtin with some white-space fixes.
+(arm_expand_neon_builtin): Move code into the standalone function
+arm_expand_neon_builtin_1.
+
+2016-12-05  Andre Vieira  
+
+   Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  
 
diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index 
ac56648706cd81a35fc32bde0bf3fc723387f5d5..b747837313f9ec28496245f253071ac5bd8b08f9
 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -545,7 +545,7 @@ enum arm_builtins
 };
 
 #define ARM_BUILTIN_NEON_PATTERN_START \
-(ARM_BUILTIN_MAX - ARRAY_SIZE (neon_builtin_data))
+  (ARM_BUILTIN_NEON_BASE + 1)
 
 #undef CF
 #undef VAR1
@@ -897,6 +897,110 @@ arm_init_simd_builtin_scalar_types (void)
 "__builtin_neon_uti");
 }
 
+/* Set up a NEON builtin.  */
+
+static void
+arm_init_neon_builtin (unsigned int fcode,
+  neon_builtin_datum *d)
+{
+  bool print_type_signature_p = false;
+  char type_signature[SIMD_MAX_BUILTIN_ARGS] = { 0 };
+  char namebuf[60];
+  tree ftype = NULL;
+  tree fndecl = NULL;
+
+  d->fcode = fcode;
+
+  /* We must track two variables here.  op_num is
+ the operand number as in the RTL pattern.  This is
+ required to access the mode (e.g. V4SF mode) of the
+ argument, from which the base type can be derived.
+ arg_num is an index in to the qualifiers data, which
+ gives qualifiers to the type (e.g. const unsigned).
+ The reason these two variables may differ by one is the
+ void return type.  While all return types take the 0th entry
+ in the qualifiers array, there is no operand for them in the
+ RTL pattern.  */
+  int op_num = insn_data[d->code].n_operands - 1;
+  int arg_num = d->qualifiers[0] & qualifier_void
+? op_num + 1
+: op_num;
+  tree return_type = void_type_node, args = void_list_node;
+  tree eltype;
+
+  /* Build a function type directly from the insn_data for this
+ builtin.  The build_function_type () function takes care of
+ removing duplicates for us.  */
+  for (; op_num >= 0; arg_num--, op_num--)
+{
+  machine_mode op_mode = insn_data[d->code].operand[op_num].mode;
+  enum arm_type_qualifiers qualifiers = d->qualifiers[arg_num];
+
+  if (qualifiers & q

Re: [patch part, libgcc] Add AVX-specific matmul

[Markus Trippelsdorf]

On 2016.11.30 at 08:17 +0100, Thomas Koenig wrote:
> Hello world,
> 
> the patch at https://gcc.gnu.org/ml/fortran/2016-11/msg00246.html
> (the one going to gcc-patches was rejected due to size of
> regernerated files) contains one libgcc change, which exposes
> the __cpu_model interface fox i386 to libgfortran.
> 
> The Fortran bits are OKd, but I need an approval from a libgcc
> maintainer (or some hint how to do this better :-).
> 
> I have attached the libgcc-specific part of the patch.

FYI this gives nice additional speedups for 178.galgel:
http://gcc.opensuse.org/SPEC/CFP/sb-czerny-head-64/178_galgel_recent_big.png

-- 
Markus

Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

[Jakub Jelinek]

On Mon, Dec 05, 2016 at 08:50:08AM -0700, Martin Sebor wrote:
> I posted a bigger patch to fix this and other related problems on
> Friday (https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00262.html).
> In hindsight, I should have probably committed the fix for this
> on its own.  Please let me know if this is blocking you and I'll
> commit this fix by itself today so you don't have to wait for
> the bigger patch to get reviewed and approved.

You could just change the abs use to absu_hwi or abs_hwi if you need
something quickly working (depending on whether HOST_WIDE_INT_MIN can
appear or not).

Jakub

Re: [PATCH] correct handling of non-constant width and precision (pr 78521)

[Martin Sebor]

On 12/02/2016 08:52 AM, Martin Sebor wrote:

On 12/02/2016 01:31 AM, Rainer Orth wrote:

Hi Martin,


PR 78521 notes that the gimple-ssa-sprintf pass doesn't do the right
thing (i.e., the -Wformat-length and -fprintf-return-value options
behave incorrectly) when a conversion specification includes a width
or precision with a non-constant value.  The code treats such cases
as if they were not provided which is incorrect and results in
the wrong bytes counts in warning messages and in the wrong ranges
being generated for such calls (or in the case sprintf(0, 0, ...)
for some such calls being eliminated).

The attached patch corrects the handling of these cases, plus a couple
of other edge cases in the same area: it adjusts the parser to accept
precision in the form of just a period with no asterisk or decimal
digits after it (this sets the precision to zero), and corrects the
handling of zero precision and zero argument in integer directives
to produce no bytes on output.

Finally, the patch also tightens up the constraint on the upper bound
of bounded functions like snprintf to be INT_MAX.  The functions cannot
produce output in excess of INT_MAX + 1 bytes and some implementations
(e.g., Solaris) fail with EINVAL when the bound is INT_MAX or more.
This is the subject of PR 78520.


this patch broke Solaris bootstrap:

/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c: In function
'void {anonymous}::get_width_and_precision(const
{anonymous}::conversion_spec&, long long int*, long long int*)':
/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c:777:45: error:
call of overloaded 'abs(long long int)' is ambiguous
  width = abs (tree_to_shwi (spec.star_width));
 ^
/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c:777:45: note:
candidates are:
In file included from /usr/include/stdlib.h:12:0,
 from /vol/gcc/src/hg/trunk/local/gcc/system.h:258,
 from
/vol/gcc/src/hg/trunk/local/gcc/gimple-ssa-sprintf.c:49:
/usr/include/iso/stdlib_iso.h:205:16: note: long int std::abs(long int)
  inline long   abs(long _l) { return labs(_l); }
^
/usr/include/iso/stdlib_iso.h:160:12: note: int std::abs(int)
 extern int abs(int);
^

The following patch fixed this for me, but I've no idea if it's right.
It bootstrapped successfully on sparc-sun-solaris2.12,
i386-pc-solaris2.12, and x86_64-pc-linux-gnu.


Thanks for the heads up!  I just looked at that code yesterday while
analyzing bug 78608, wondering if it was safe.  Now I know it isn't.
I think it might be best to simply hand code the expression instead
of taking a chance on abs.  Let me take care of it today along with 78608.


I posted a bigger patch to fix this and other related problems on
Friday (https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00262.html).
In hindsight, I should have probably committed the fix for this
on its own.  Please let me know if this is blocking you and I'll
commit this fix by itself today so you don't have to wait for
the bigger patch to get reviewed and approved.

Martin

Re: [ARM][PATCH] Fix failing poly64 tests on ARM

[Kyrill Tkachov]

On 05/12/16 10:39, Tamar Christina wrote:

Hi All,

This patch fixes test failures on arm-none-eabi.
Poly64 was being used by files that were not supposed
to be testing poly64 types.

I have added a new MACRO that must be defined in addition
to having CRYPTO available before use of Poly64 types are
allowed in the header arm-neon-ref.h.

Ok for trunk?

gcc/testsuite/
2016-12-01  Tamar Christina  

* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h: Gate use of 
Poly64 on USE_CRYPTO_TYPES.
* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c: Define 
USE_CRYPTO_TYPES.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: Likewise.


Ok, but please make sure the line length in the ChangeLog doesn't go over 80 
characters.
Kyrill

Re: [PATCH 2/6][ARM] Move CRC builtins to refactored framework

[Andre Vieira (lists)]

On 01/12/16 17:25, Andre Vieira (lists) wrote:
> On 09/11/16 10:11, Andre Vieira (lists) wrote:
>> Hi,
>>
>> This patch refactors the implementation of the ARM ACLE CRC builtins to
>> use the builtin framework.
>>
>> Is this OK for trunk?
>>
>> Regards,
>> Andre
>>
>> gcc/ChangeLog
>> 2016-11-09  Andre Vieira  
>>
>>   * config/arm/arm-builtins.c (arm_unsigned_binop_qualifiers): New.
>>   (UBINOP_QUALIFIERS): New.
>>   (si_UP): Define.
>>   (acle_builtin_data): New. Change comment.
>>   (arm_builtins): Remove ARM_BUILTIN_CRC32B, ARM_BUILTIN_CRC32H,
>>   ARM_BUILTIN_CRC32W, ARM_BUILTIN_CRC32CB, ARM_BUILTIN_CRC32CH,
>>   ARM_BUILTIN_CRC32CW. Add ARM_BUILTIN_ACLE_BASE and include
>>   arm_acle_builtins.def.
>>   (ARM_BUILTIN_ACLE_PATTERN_START): Define.
>>   (arm_init_acle_builtins): New.
>>   (CRC32_BUILTIN): Remove.
>>   (bdesc_2arg): Remove entries for crc32b, crc32h, crc32w,
>>   crc32cb, crc32ch and crc32cw.
>>   (arm_init_crc32_builtins): Remove.
>>   (arm_init_builtins): Use arm_init_acle_builtins rather
>>   than arm_init_crc32_builtins.
>>   (arm_expand_acle_builtin): New.
>>   (arm_expand_builtin): Use 'arm_expand_acle_builtin'.
>>   * config/arm/arm_acle_builtins.def: New.
>>
> Hi,
> 
> Reworked this patch based on the changes made in [1/6]. No changes to
> ChangeLog.
> 
> Is this OK?
> 
> Cheers,
> Andre
> 
Hi,

I had a typo in one of the range checks was using ARM_BUILTIN_ACLE_MAX
where it should've been ARM_BUILTIN_ACLE_BASE.

Cheers,
Andre
diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index 
da6331fdc729461adeb81d84c0c425bc45b80b8c..e4671ec4a3dc37a02ad3708e4c730f0d5d783d5e
 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -157,6 +157,13 @@ arm_load1_lane_qualifiers[SIMD_MAX_BUILTIN_ARGS]
   qualifier_none, qualifier_struct_load_store_lane_index };
 #define LOAD1LANE_QUALIFIERS (arm_load1_lane_qualifiers)
 
+/* unsigned T (unsigned T, unsigned T, unsigned T).  */
+static enum arm_type_qualifiers
+arm_unsigned_binop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+  = { qualifier_unsigned, qualifier_unsigned, qualifier_unsigned,
+  qualifier_unsigned };
+#define UBINOP_QUALIFIERS (arm_unsigned_binop_qualifiers)
+
 /* The first argument (return type) of a store should be void type,
which we represent with qualifier_void.  Their first operand will be
a DImode pointer to the location to store to, so we must use
@@ -242,17 +249,16 @@ typedef struct {
   VAR11 (T, N, A, B, C, D, E, F, G, H, I, J, K) \
   VAR1 (T, N, L)
 
-/* The builtin data can be found in arm_neon_builtins.def,
-   arm_vfp_builtins.def.  The entries in arm_neon_builtins.def require
-   TARGET_NEON to be true.  The feature tests are checked when the
-   builtins are expanded.
+/* The builtin data can be found in arm_neon_builtins.def, arm_vfp_builtins.def
+   and arm_acle_builtins.def.  The entries in arm_neon_builtins.def require
+   TARGET_NEON to be true.  The feature tests are checked when the builtins are
+   expanded.
 
-   The mode entries in the following table correspond to the "key"
-   type of the instruction variant, i.e. equivalent to that which
-   would be specified after the assembler mnemonic, which usually
-   refers to the last vector operand.  The modes listed per
-   instruction should be the same as those defined for that
-   instruction's pattern, for instance in neon.md.  */
+   The mode entries in the following table correspond to the "key" type of the
+   instruction variant, i.e. equivalent to that which would be specified after
+   the assembler mnemonic for neon instructions, which usually refers to the
+   last vector operand.  The modes listed per instruction should be the same as
+   those defined for that instruction's pattern, for instance in neon.md.  */
 
 static arm_builtin_datum vfp_builtin_data[] =
 {
@@ -266,6 +272,15 @@ static arm_builtin_datum neon_builtin_data[] =
 
 #undef CF
 #undef VAR1
+#define VAR1(T, N, A) \
+  {#N, UP (A), CODE_FOR_##N, 0, T##_QUALIFIERS},
+
+static arm_builtin_datum acle_builtin_data[] =
+{
+#include "arm_acle_builtins.def"
+};
+
+#undef VAR1
 
 #define VAR1(T, N, X) \
   ARM_BUILTIN_NEON_##N##X,
@@ -518,13 +533,6 @@ enum arm_builtins
 
   ARM_BUILTIN_WMERGE,
 
-  ARM_BUILTIN_CRC32B,
-  ARM_BUILTIN_CRC32H,
-  ARM_BUILTIN_CRC32W,
-  ARM_BUILTIN_CRC32CB,
-  ARM_BUILTIN_CRC32CH,
-  ARM_BUILTIN_CRC32CW,
-
   ARM_BUILTIN_GET_FPSCR,
   ARM_BUILTIN_SET_FPSCR,
 
@@ -556,6 +564,14 @@ enum arm_builtins
 
 #include "arm_neon_builtins.def"
 
+#undef VAR1
+#define VAR1(T, N, X) \
+  ARM_BUILTIN_##N,
+
+  ARM_BUILTIN_ACLE_BASE,
+
+#include "arm_acle_builtins.def"
+
   ARM_BUILTIN_MAX
 };
 
@@ -565,6 +581,9 @@ enum arm_builtins
 #define ARM_BUILTIN_NEON_PATTERN_START \
   (ARM_BUILTIN_NEON_BASE + 1)
 
+#define ARM_BUILTIN_ACLE_PATTERN_START \
+  (ARM_BUILTIN_ACLE_BASE + 1)
+
 #undef CF
 #undef VAR1
 #undef VAR2
@@ -1013,7 +1032,7 @@ arm_init_builtin (unsigned int fcode, arm_builtin_datum 
*d,
   gcc_assert (ftype != NU

Re: [PATCH] Add AVX512 k-mask intrinsics

[Andrew Senkevich]

2016-12-02 21:31 GMT+03:00 Uros Bizjak :
> On Fri, Dec 2, 2016 at 6:44 PM, Andrew Senkevich
>  wrote:
>> 2016-11-11 22:14 GMT+03:00 Uros Bizjak :
>>> On Fri, Nov 11, 2016 at 7:23 PM, Andrew Senkevich
>>>  wrote:
 2016-11-11 20:56 GMT+03:00 Uros Bizjak :
> On Fri, Nov 11, 2016 at 6:50 PM, Uros Bizjak  wrote:
>> On Fri, Nov 11, 2016 at 6:38 PM, Andrew Senkevich
>>  wrote:
>>> 2016-11-11 17:34 GMT+03:00 Uros Bizjak :
 Some quick remarks:

 +(define_insn "kmovb"
 +  [(set (match_operand:QI 0 "nonimmediate_operand" "=k,k")
 + (unspec:QI
 +  [(match_operand:QI 1 "nonimmediate_operand" "r,km")]
 +  UNSPEC_KMOV))]
 +  "!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512DQ"
 +  "@
 +   kmovb\t{%k1, %0|%0, %k1}
 +   kmovb\t{%1, %0|%0, %1}";
 +  [(set_attr "mode" "QI")
 +   (set_attr "type" "mskmov")
 +   (set_attr "prefix" "vex")])
 +
 +(define_insn "kmovd"
 +  [(set (match_operand:SI 0 "nonimmediate_operand" "=k,k")
 + (unspec:SI
 +  [(match_operand:SI 1 "nonimmediate_operand" "r,km")]
 +  UNSPEC_KMOV))]
 +  "!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512BW"
 +  "@
 +   kmovd\t{%k1, %0|%0, %k1}
 +   kmovd\t{%1, %0|%0, %1}";
 +  [(set_attr "mode" "SI")
 +   (set_attr "type" "mskmov")
 +   (set_attr "prefix" "vex")])
 +
 +(define_insn "kmovq"
 +  [(set (match_operand:DI 0 "nonimmediate_operand" "=k,k,km")
 + (unspec:DI
 +  [(match_operand:DI 1 "nonimmediate_operand" "r,km,k")]
 +  UNSPEC_KMOV))]
 +  "!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512BW"
 +  "@
 +   kmovq\t{%k1, %0|%0, %k1}
 +   kmovq\t{%1, %0|%0, %1}
 +   kmovq\t{%1, %0|%0, %1}";
 +  [(set_attr "mode" "DI")
 +   (set_attr "type" "mskmov")
 +   (set_attr "prefix" "vex")])

 - kmovd (and existing kmovw) should be using register_operand for
 opreand 0. In this case, there is no need for MEM_P checks at all.
 - In the insn constraint, pease check TARGET_AVX before checking MEM_P.
 - please put these definitions above corresponding *mov??_internal 
 patterns.
>>>
>>> Do you mean put below *mov??_internal patterns? Attached corrected such 
>>> way.
>>
>> No, please put kmovq near *movdi_internal, kmovd near *movsi_internal,
>> etc. It doesn't matter if they are above or below their respective
>> *mov??_internal patterns, as long as they are positioned in some
>> consistent way. IOW, new patterns shouldn't be grouped together, as is
>> the case with your patch.
>
> +(define_insn "kmovb"
> +  [(set (match_operand:QI 0 "register_operand" "=k,k")
> +(unspec:QI
> +  [(match_operand:QI 1 "nonimmediate_operand" "r,km")]
> +  UNSPEC_KMOV))]
> +  "TARGET_AVX512DQ && !MEM_P (operands[1])"
>
> There is no need for !MEM_P, this will prevent memory operand, which
> is allowed by constraint "m".
>
> +(define_insn "kmovq"
> +  [(set (match_operand:DI 0 "register_operand" "=k,k,km")
> +(unspec:DI
> +  [(match_operand:DI 1 "nonimmediate_operand" "r,km,k")]
> +  UNSPEC_KMOV))]
> +  "TARGET_AVX512BW && !MEM_P (operands[1])"
>
> Operand 0 should have "nonimmediate_operand" predicate. And here you
> need  && !(MEM_P (op0) && MEM_P (op1)) in insn constraint to prevent
> mem->mem moves.

 Changed according your comments and attached.
>>>
>>> Still not good.
>>>
>>> +(define_insn "kmovd"
>>> +  [(set (match_operand:SI 0 "register_operand" "=k,k")
>>> +(unspec:SI
>>> +  [(match_operand:SI 1 "nonimmediate_operand" "r,km")]
>>> +  UNSPEC_KMOV))]
>>> +  "TARGET_AVX512BW && !MEM_P (operands[1])"
>>>
>>> Remove !MEM_P in the above pattern.
>>>
>>>  (define_insn "kmovw"
>>> -  [(set (match_operand:HI 0 "nonimmediate_operand" "=k,k")
>>> +  [(set (match_operand:HI 0 "register_operand" "=k,k")
>>>  (unspec:HI
>>>[(match_operand:HI 1 "nonimmediate_operand" "r,km")]
>>>UNSPEC_KMOV))]
>>> -  "!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512F"
>>> +  "TARGET_AVX512F && !MEM_P (operands[1])"
>>>
>>> Also remove !MEM_P here.
>>>
>>> +(define_insn "kadd"
>>> +  [(set (match_operand:SWI1248x 0 "register_operand" "=r,&r,!k")
>>> +(plus:SWI1248x
>>> +  (not:SWI1248x
>>> +(match_operand:SWI1248x 1 "register_operand" "r,0,k"))
>>> +  (match_operand:SWI1248x 2 "register_operand" "r,r,k")))
>>> +   (clobber (reg:CC FLAGS_REG))]
>>> +  "TARGET_AVX512F"
>>> +{
>>> +  switch (which_alternative)
>>> +{
>>> +case 0:
>>> +  return "add\t{%k2, %k1, %k0|%k0, %k1, %k2}";
>>> +case 1:
>>> +  return "#";
>>> +case 2:
>>> +  if (TARGET_AVX512BW &

[PATCH][ARM] Remove uses of leaf_function_p

[Wilco Dijkstra]

Using leaf_function_p in a backend is dangerous as it incorrectly returns
false if it is called while in a sequence (for example during prolog/epilog
generation).  Replace all uses with crtl->is_leaf as this is now initialized
early enough in ira.c.  This typically causes no code generation differences
unless there was a bug due to leaf_function_p returning the wrong value.

Bootstrap OK.

ChangeLog:
2016-12-05  Wilco Dijkstra  

* gcc/config/arm/arm.h (TARGET_BACKTRACE): Use crtl->is_leaf.
* gcc/config/arm/arm.c (arm_option_check_internal): Improve comment.
(thumb_force_lr_save): Use crtl->is_leaf.
(arm_get_frame_offsets): Remove comment.  Use crtl->is_leaf.
(thumb_far_jump_used_p): Remove comment.
(arm_frame_pointer_required): Use crtl->is_leaf.
--

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 
c8d74623814884fbdbcaa7cb4546f7319dbbaac4..0c50d2d67d1ad33778e9a5507de1839de2457af7
 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -126,7 +126,7 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
 #define TARGET_IWMMXT_ABI (TARGET_32BIT && arm_abi == ARM_ABI_IWMMXT)
 #define TARGET_ARM  (! TARGET_THUMB)
 #define TARGET_EITHER  1 /* (TARGET_ARM | TARGET_THUMB) */
-#define TARGET_BACKTRACE   (leaf_function_p () \
+#define TARGET_BACKTRACE   (crtl->is_leaf \
 ? TARGET_TPCS_LEAF_FRAME \
 : TARGET_TPCS_FRAME)
 #define TARGET_AAPCS_BASED \
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 
29dcefd23762ba861b458b8860eb4b4856a9cb02..c1088bf98335acfc4041c68f73c9bfe1cf0c1436
 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2798,8 +2798,7 @@ arm_option_check_internal (struct gcc_options *opts)
   if (TARGET_ARM_P (flags) && !ARM_FSET_HAS_CPU1 (insn_flags, FL_NOTM))
 error ("target CPU does not support ARM mode");
 
-  /* TARGET_BACKTRACE calls leaf_function_p, which causes a crash if done
- from here where no function is being compiled currently.  */
+  /* TARGET_BACKTRACE cannot be used here as crtl->is_leaf is not set yet.  */
   if ((TARGET_TPCS_FRAME || TARGET_TPCS_LEAF_FRAME) && TARGET_ARM_P (flags))
 warning (0, "enabling backtrace support is only meaningful when compiling 
for the Thumb");
 
@@ -19631,7 +19630,7 @@ static bool
 thumb_force_lr_save (void)
 {
   return !cfun->machine->lr_save_eliminated
-&& (!leaf_function_p ()
+&& (!crtl->is_leaf
 || thumb_far_jump_used_p ()
 || df_regs_ever_live_p (LR_REGNUM));
 }
@@ -19736,7 +19735,6 @@ arm_get_frame_offsets (void)
 {
   struct arm_stack_offsets *offsets;
   unsigned long func_type;
-  int leaf;
   int saved;
   int core_saved;
   HOST_WIDE_INT frame_size;
@@ -19744,16 +19742,6 @@ arm_get_frame_offsets (void)
 
   offsets = &cfun->machine->stack_offsets;
 
-  /* We need to know if we are a leaf function.  Unfortunately, it
- is possible to be called after start_sequence has been called,
- which causes get_insns to return the insns for the sequence,
- not the function, which will cause leaf_function_p to return
- the incorrect result.
-
- to know about leaf functions once reload has completed, and the
- frame size cannot be changed after that time, so we can safely
- use the cached value.  */
-
   if (reload_completed)
 return offsets;
 
@@ -19761,8 +19749,6 @@ arm_get_frame_offsets (void)
  into an offset once we have determined the size of preceding data.  */
   frame_size = ROUND_UP_WORD (get_frame_size ());
 
-  leaf = leaf_function_p ();
-
   /* Space for variadic functions.  */
   offsets->saved_args = crtl->args.pretend_args_size;
 
@@ -19816,7 +19802,7 @@ arm_get_frame_offsets (void)
 
   /* A leaf function does not need any stack alignment if it has nothing
  on the stack.  */
-  if (leaf && frame_size == 0
+  if (crtl->is_leaf && frame_size == 0
   /* However if it calls alloca(), we have a dynamically allocated
 block of BIGGEST_ALIGNMENT on stack, so still do stack alignment.  */
   && ! cfun->calls_alloca)
@@ -23107,9 +23093,6 @@ thumb_far_jump_used_p (void)
   bool far_jump = false;
   unsigned int func_size = 0;
 
-  /* This test is only important for leaf functions.  */
-  /* assert (!leaf_function_p ()); */
-
   /* If we have already decided that far jumps may be used,
  do not bother checking again, and always return true even if
  it turns out that they are not being used.  Once we have made
@@ -26484,7 +26467,7 @@ arm_frame_pointer_required (void)
 return true;
 
   /* The frame pointer is required for non-leaf APCS frames.  */
-  if (TARGET_ARM && TARGET_APCS_FRAME && !leaf_function_p ())
+  if (TARGET_ARM && TARGET_APCS_FRAME && !crtl->is_leaf)
 return true;
 
   /* If we are probing the stack in the prologue, we will have a faulting

Re: [PATCH v3] Do not simplify "(and (reg) (const bit))" to if_then_else.

[Dominik Vogt]

On Mon, Dec 05, 2016 at 07:56:46AM -0600, Segher Boessenkool wrote:
> On Mon, Dec 05, 2016 at 10:22:13AM +0100, Dominik Vogt wrote:
> > Sorry for breaking this.  With the constant changes in the
> > patterns this is supposed to fix it seems I've lost track of the
> > status quo.  I'll check what went wrong with the patch; in the
> > mean time Andreas will revert this, or if it's urgent, feel free
> > to do that yourself.
> 
> I've reverted it now, r243256.

Thanks.  I need to think about this patch and the patch that is
based on it for a while, so there's no need to get the fixed patch
into svn for now.

Ciao

Dominik ^_^  ^_^

-- 

Dominik Vogt
IBM Germany

Re: [PATCH v3] Do not simplify "(and (reg) (const bit))" to if_then_else.

[Segher Boessenkool]

On Mon, Dec 05, 2016 at 10:22:13AM +0100, Dominik Vogt wrote:
> Sorry for breaking this.  With the constant changes in the
> patterns this is supposed to fix it seems I've lost track of the
> status quo.  I'll check what went wrong with the patch; in the
> mean time Andreas will revert this, or if it's urgent, feel free
> to do that yourself.

I've reverted it now, r243256.

Thanks,


Segher

[PING] [PATCH, ARM] Further improve stack usage on sha512 (PR 77308)

[Bernd Edlinger]

Hi,

this was the latest version of my patch:
https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02796.html


Thanks
Bernd.

[Patch, Fortran, cleanup] PR 78674: merge gfc_convert_type_warn and gfc_convert_chartype

[Janus Weil]

Hi all,

the attached patch does not fix an actual bug, but merely does some
cleanup, geting rid of some code duplication. It removes the function
gfc_convert_chartype and merges its functionality into the more
general gfc_convert_type_warn.

Regtests cleanly on x86_64-linux-gnu. Ok for trunk?

Cheers,
Janus


2016-12-05  Janus Weil  

PR fortran/78674
* gfortran.h (gfc_convert_chartype): Remove prototype.
* expr.c (gfc_check_assign): Remove special case for character types.
* intrinsic.c (gfc_convert_type_warn): Treat also character types.
(gfc_convert_chartype): Remove function.
Index: gcc/fortran/expr.c
===
--- gcc/fortran/expr.c  (revision 243254)
+++ gcc/fortran/expr.c  (working copy)
@@ -3307,16 +3307,6 @@ gfc_check_assign (gfc_expr *lvalue, gfc_expr *rval
   return false;
 }
 
-  /* Assignment is the only case where character variables of different
- kind values can be converted into one another.  */
-  if (lvalue->ts.type == BT_CHARACTER && rvalue->ts.type == BT_CHARACTER)
-{
-  if (lvalue->ts.kind != rvalue->ts.kind && allow_convert)
-   return gfc_convert_chartype (rvalue, &lvalue->ts);
-  else
-   return true;
-}
-
   if (!allow_convert)
 return true;
 
Index: gcc/fortran/gfortran.h
===
--- gcc/fortran/gfortran.h  (revision 243254)
+++ gcc/fortran/gfortran.h  (working copy)
@@ -3011,7 +3011,6 @@ char gfc_type_letter (bt);
 gfc_symbol * gfc_get_intrinsic_sub_symbol (const char *);
 bool gfc_convert_type (gfc_expr *, gfc_typespec *, int);
 bool gfc_convert_type_warn (gfc_expr *, gfc_typespec *, int, int);
-bool gfc_convert_chartype (gfc_expr *, gfc_typespec *);
 int gfc_generic_intrinsic (const char *);
 int gfc_specific_intrinsic (const char *);
 bool gfc_is_intrinsic (gfc_symbol*, int, locus);
Index: gcc/fortran/intrinsic.c
===
--- gcc/fortran/intrinsic.c (revision 243254)
+++ gcc/fortran/intrinsic.c (working copy)
@@ -4895,7 +4895,16 @@ gfc_convert_type_warn (gfc_expr *expr, gfc_typespe
   && gfc_compare_types (&expr->ts, ts))
 return true;
 
-  sym = find_conv (&expr->ts, ts);
+  if (expr->ts.type == BT_CHARACTER && ts->type == BT_CHARACTER)
+{
+  if (expr->ts.kind != ts->kind)
+   sym = find_char_conv (&expr->ts, ts);
+  else
+   return true;
+}
+  else
+sym = find_conv (&expr->ts, ts);
+
   if (sym == NULL)
 goto bad;
 
@@ -5031,62 +5040,6 @@ bad:
 }
 
 
-bool
-gfc_convert_chartype (gfc_expr *expr, gfc_typespec *ts)
-{
-  gfc_intrinsic_sym *sym;
-  locus old_where;
-  gfc_expr *new_expr;
-  int rank;
-  mpz_t *shape;
-
-  gcc_assert (expr->ts.type == BT_CHARACTER && ts->type == BT_CHARACTER);
-
-  sym = find_char_conv (&expr->ts, ts);
-  gcc_assert (sym);
-
-  /* Insert a pre-resolved function call to the right function.  */
-  old_where = expr->where;
-  rank = expr->rank;
-  shape = expr->shape;
-
-  new_expr = gfc_get_expr ();
-  *new_expr = *expr;
-
-  new_expr = gfc_build_conversion (new_expr);
-  new_expr->value.function.name = sym->lib_name;
-  new_expr->value.function.isym = sym;
-  new_expr->where = old_where;
-  new_expr->ts = *ts;
-  new_expr->rank = rank;
-  new_expr->shape = gfc_copy_shape (shape, rank);
-
-  gfc_get_ha_sym_tree (sym->name, &new_expr->symtree);
-  new_expr->symtree->n.sym->ts.type = ts->type;
-  new_expr->symtree->n.sym->ts.kind = ts->kind;
-  new_expr->symtree->n.sym->attr.flavor = FL_PROCEDURE;
-  new_expr->symtree->n.sym->attr.function = 1;
-  new_expr->symtree->n.sym->attr.elemental = 1;
-  new_expr->symtree->n.sym->attr.referenced = 1;
-  gfc_intrinsic_symbol(new_expr->symtree->n.sym);
-  gfc_commit_symbol (new_expr->symtree->n.sym);
-
-  *expr = *new_expr;
-
-  free (new_expr);
-  expr->ts = *ts;
-
-  if (gfc_is_constant_expr (expr->value.function.actual->expr)
-  && !do_simplify (sym, expr))
-{
-  /* Error already generated in do_simplify() */
-  return false;
-}
-
-  return true;
-}
-
-
 /* Check if the passed name is name of an intrinsic (taking into account the
current -std=* and -fall-intrinsic settings).  If it is, see if we should
warn about this as a user-procedure having the same name as an intrinsic

[build] Disable hwcaps on libgfortran

[Rainer Orth]

The AVX-specific matmul patch for libgfortran broke Solaris/x86 testing
with /bin/as pretty badly: every single execution test involving
libgfortran.so now FAILs like

ld.so.1: alloc_comp_1.exe: fatal: 
/var/gcc/regression/trunk/10-gcc/build/i386-pc-solaris2.10/./libgfortran/.libs/libgfortran.so.4:
 hardware capability (CA_SUNW_HW_2) unsupported: 0x40  [ AVX2 ]
FAIL: gfortran.dg/coarray/alloc_comp_1.f90 -fcoarray=single  -O2  -latomic 
execution test

This happens because libgfortran.so now requires AVX and AVX2 support
from the executing system:

ro@zebrano 14 > elfdump -H libgfortran.so 

Capabilities Section:  .SUNW_cap

 Object Capabilities:
 index  tag   value
   [0]  CA_SUNW_HW_2 0x40  [ AVX2 ]
   [1]  CA_SUNW_HW_1 0x20001800  [ AVX SSE2 SSE ]

Since the relevant code is guarded by runtime test, this needs to be
disabled.  Fortunately, a similar problem has already been solved in
libitm and this patch just generalizes the solution:

* The autoconf macro checking for the -mclear-hwcaps compiler option
  (only available on Solaris at this time) is moved to a new
  config/hwcaps.m4, appropriately renamed.

* It's invoked in libgfortran.ac and the result added to the
  libgfortran.la LDFLAGS.

The patch below implements that.  It has been bootstrapped successfully
on i386-pc-solaris2.10 with both as/ld (where -mclear-hwcaps is present
and needed to avoid all those failures) and gas/gld (where
-mclear-hwcaps is present, but a no-op), and x86_64-pc-linux-gnu (where
the flag doesn't exist).  Testresults are back to normal for the first
configuration and unchanged for the other two.

Ok for mainline?

Rainer

-- 
-
Rainer Orth, Center for Biotechnology, Bielefeld University


2016-12-04  Rainer Orth  

libgfortran:
* configure.ac: Call GCC_CHECK_LINKER_HWCAP.
* Makefile.am (libgfortran_la_LDFLAGS): Add HWCAP_LDFLAGS.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* Makefile.in: Regenerate.

config:
* hwcaps.m4: New file.

libitm:
* acinclude.m4 (LIBITM_CHECK_LINKER_FEATURES): Remove.
* aclocal.m4: Regenerate.
* configure.ac: Call GCC_CHECK_LINKER_HWCAP instead of
LIBITM_CHECK_LINKER_HWCAP.

# HG changeset patch
# Parent  652ae1c5b6c997f22956287c4158ac9bef51f7d3
Disable hwcaps on libgfortran

diff --git a/config/hwcaps.m4 b/config/hwcaps.m4
new file mode 100644
--- /dev/null
+++ b/config/hwcaps.m4
@@ -0,0 +1,28 @@
+dnl
+dnl Check if the linker used supports linker maps to clear hardware
+dnl capabilities.  This is only supported on Solaris at the moment.
+dnl
+dnl Defines:
+dnl  HWCAP_LDFLAGS=-mclear-hwcap if possible
+dnl  LD (as a side effect of testing)
+dnl
+AC_DEFUN([GCC_CHECK_LINKER_HWCAP], [
+  test -z "$HWCAP_LDFLAGS" && HWCAP_LDFLAGS=''
+  AC_REQUIRE([AC_PROG_LD])
+
+  ac_save_LDFLAGS="$LDFLAGS"
+  LDFLAGS="$LFLAGS -mclear-hwcap"
+
+  AC_MSG_CHECKING([for -mclear-hwcap])
+  AC_TRY_LINK([], [return 0;], [ac_hwcap_ldflags=yes],[ac_hwcap_ldflags=no])
+  if test "$ac_hwcap_ldflags" = "yes"; then
+HWCAP_LDFLAGS="-mclear-hwcap $HWCAP_LDFLAGS"
+  fi
+  AC_MSG_RESULT($ac_hwcap_ldflags)
+
+  LDFLAGS="$ac_save_LDFLAGS"
+
+  AC_SUBST(HWCAP_LDFLAGS)
+
+  AM_CONDITIONAL(HAVE_HWCAP, test $ac_hwcap_ldflags != no)
+])
diff --git a/libgfortran/Makefile.am b/libgfortran/Makefile.am
--- a/libgfortran/Makefile.am
+++ b/libgfortran/Makefile.am
@@ -38,6 +38,7 @@ toolexeclib_DATA = libgfortran.spec
 libgfortran_la_LINK = $(LINK) $(libgfortran_la_LDFLAGS)
 libgfortran_la_LDFLAGS = -version-info `grep -v '^\#' $(srcdir)/libtool-version` \
 	$(LTLDFLAGS) $(LIBQUADLIB) ../libbacktrace/libbacktrace.la \
+	$(HWCAP_LDFLAGS) \
 	-lm $(extra_ldflags_libgfortran) \
 	$(version_arg) -Wc,-shared-libgcc
 libgfortran_la_DEPENDENCIES = $(version_dep) libgfortran.spec $(LIBQUADLIB_DEP)
diff --git a/libgfortran/configure.ac b/libgfortran/configure.ac
--- a/libgfortran/configure.ac
+++ b/libgfortran/configure.ac
@@ -222,6 +222,9 @@ fi
 AC_MSG_RESULT($ac_fdsections)
 AC_SUBST(SECTION_FLAGS)
 
+# Check linker hardware capability support.
+GCC_CHECK_LINKER_HWCAP
+
 # Find other programs we need.
 AC_CHECK_TOOL(AS, as)
 AC_CHECK_TOOL(AR, ar)
diff --git a/libitm/acinclude.m4 b/libitm/acinclude.m4
--- a/libitm/acinclude.m4
+++ b/libitm/acinclude.m4
@@ -300,36 +300,6 @@ AC_DEFUN([LIBITM_CHECK_LINKER_FEATURES],
 
 
 dnl
-dnl Check if the linker used supports linker maps to clear hardware
-dnl capabilities.  This is only supported on Solaris at the moment.
-dnl
-dnl Defines:
-dnl  HWCAP_LDFLAGS=-mclear-hwcap if possible
-dnl  LD (as a side effect of testing)
-dnl
-AC_DEFUN([LIBITM_CHECK_LINKER_HWCAP], [
-  test -z "$HWCAP_LDFLAGS" && HWCAP_LDFLAGS=''
-  AC_REQUIRE([AC_PROG_LD])
-
-  ac_save_LDFLAGS="$LDFLAGS"
-  LDFLAGS="$LFLAGS -mclear-hwcap"
-
-  AC_MSG_CHECKING([for -mclear-hwcap])
-  AC_TRY_LINK([], [return 0;], [ac_hwcap

Re: [PATCH, Fortran, v3] Fix deallocation of nested derived typed components

[Andre Vehreschild]

Hi Dominique, hi all,

@Dominique: Thanks for testing. I have extended my usual testcycle to add the
libgomp.fortran tests.

I could fix the errors below by calling deallocate_with_status directly from
the trans_omp_*-routines instead of using the gfc_array_deallocate wrapper.
While being at it, I made deallocate_with_status almighty when freeing memory.
gfc_deallocate_with_status now frees memory of scalars or arrays, coarrayed
scalars or coarrayed arrays without having to massage the inputs of the
routine. The benefit of this is, that instead of having four routines that are
able to deallocate a special kind of allocated object, there now are only two
(gfc_deallocate_scalar_with_status can be removed, too, but means changes in
many places which would enlarge this patch even more. Therefore I have not yet
done it.). I.e. no longer guessing which routine to call for freeing an
allocatable object -> hand it to deallocate_with_status and be done. 

Bootstraps and regtests ok on x86_64-linux/F23. Ok for trunk?

Regards,
Andre

On Sun, 4 Dec 2016 00:59:00 +0100
Dominique d'Humières  wrote:

> Hi Andre,
> 
> I fear the patch is causing another set of failures with -fopenmp:
> 
> FAIL: libgomp.fortran/allocatable11.f90   -O0  (internal compiler error)
> …
> FAIL: libgomp.fortran/allocatable8.f90   -g -flto  (test for excess errors)
> 
> of the kind
> 
> collect2: error: ld returned 1 exit status
> [Book15] f90/bug%
> gfc /opt/gcc/work/libgomp/testsuite/libgomp.fortran/allocatable2.f90
> -fopenmp 
> /opt/gcc/work/libgomp/testsuite/libgomp.fortran/allocatable2.f90:46:0:
> 
>if (l.or.allocated (a)) call abort
>  
> Error: incorrect sharing of tree nodes
> a.data
> a.data = 0B;
> /opt/gcc/work/libgomp/testsuite/libgomp.fortran/allocatable2.f90:46:0:
> internal compiler error: verify_gimple failed
> 
> Dominique
> 
> > Le 3 déc. 2016 à 19:51, Andre Vehreschild  a écrit :
> > 
> > Hi all,
> > 
> > @Dominique: Thanks for checking. And also for pointing out that the initial
> > version of the patch ICEd on some already closed PRs. The objective of those
> > PRs does not seem to be covered by the current testsuite. I therefore
> > additionally propose to add attached testcase. Ok for trunk?
> > 
> > Of course with appropriate Changelog-entry.
> > 
> > Regards,
> > Andre  
> 


-- 
Andre Vehreschild * Email: vehre ad gmx dot de 
gcc/fortran/ChangeLog:

2016-12-05  Andre Vehreschild  

* trans-array.c (gfc_array_deallocate): Remove wrapper.
(gfc_trans_dealloc_allocated): Same.
(structure_alloc_comps): Restructure deallocation of (nested)
allocatable components.  Insert dealloc of sub-component into the block
guarded by the if != NULL for the component.
(gfc_trans_deferred_array): Use the almightly deallocate_with_status.
* trans-array.h: Remove prototypes.
* trans-expr.c (gfc_conv_procedure_call): Use the almighty deallocate_
with_status.
* trans-openmp.c (gfc_walk_alloc_comps): Likewise.
(gfc_omp_clause_assign_op): Likewise. 
(gfc_omp_clause_dtor): Likewise.
* trans-stmt.c (gfc_trans_deallocate): Likewise.
* trans.c (gfc_deallocate_with_status): Allow deallocation of scalar
and arrays as well as coarrays.
(gfc_deallocate_scalar_with_status): Get the data member for coarrays
only when freeing an array with descriptor.  And set correct caf_mode
when freeing components of coarrays.
* trans.h: Change prototype of gfc_deallocate_with_status to allow
adding statements into the block guarded by the if (pointer != 0) and
supply a coarray handle.

gcc/testsuite/ChangeLog:

2016-12-05  Andre Vehreschild  

* gfortran.dg/coarray_alloc_comp_3.f08: New test.
* gfortran.dg/coarray_alloc_comp_4.f08: New test.
* gfortran.dg/finalize_18.f90: Add count for additional guard against
accessing null-pointer.
* gfortran.dg/proc_ptr_comp_47.f90: New test.

diff --git a/gcc/fortran/trans-array.c b/gcc/fortran/trans-array.c
index ac90a4b..8753cbf 100644
--- a/gcc/fortran/trans-array.c
+++ b/gcc/fortran/trans-array.c
@@ -5652,53 +5652,6 @@ gfc_array_allocate (gfc_se * se, gfc_expr * expr, tree status, tree errmsg,
 }
 
 
-/* Deallocate an array variable.  Also used when an allocated variable goes
-   out of scope.  */
-/*GCC ARRAYS*/
-
-tree
-gfc_array_deallocate (tree descriptor, tree pstat, tree errmsg, tree errlen,
-		  tree label_finish, gfc_expr* expr,
-		  int coarray_dealloc_mode)
-{
-  tree var;
-  tree tmp;
-  stmtblock_t block;
-  bool coarray = coarray_dealloc_mode != GFC_CAF_COARRAY_NOCOARRAY;
-
-  gfc_start_block (&block);
-
-  /* Get a pointer to the data.  */
-  var = gfc_conv_descriptor_data_get (descriptor);
-  STRIP_NOPS (var);
-
-  /* Parameter is the address of the data component.  */
-  tmp = gfc_deallocate_with_status (coarray ? descriptor : var, pstat, errmsg,
-errlen, label_finish, false, 

Re: [PATCH v3] Do not simplify "(and (reg) (const bit))" to if_then_else.

[Oleg Endo]

On Mon, 2016-12-05 at 04:00 -0600, Segher Boessenkool wrote:
> On Mon, Dec 05, 2016 at 10:22:13AM +0100, Dominik Vogt wrote:
> > 
> > On Sat, Dec 03, 2016 at 07:19:13PM -0600, Segher Boessenkool wrote:
> > > 
> > > [ I did not see this patch before, sorry. ]
> > > 
> > > This causes the second half of PR78638.
> > > 
> > > On Thu, Dec 01, 2016 at 04:30:08PM +0100, Dominik Vogt wrote:
> > > > 
> > > > --- a/gcc/combine.c
> > > > +++ b/gcc/combine.c
> > > > @@ -5600,6 +5600,18 @@ combine_simplify_rtx (rtx x,
> > > > machine_mode op0_mode, int in_dest,
> > > >      && OBJECT_P (SUBREG_REG (XEXP (x,
> > > > 0)))
> > > >  {
> > > >    rtx cond, true_rtx, false_rtx;
> > > > +  unsigned HOST_WIDE_INT nz;
> > > > +
> > > > +  /* If the operation is an AND wrapped in a SIGN_EXTEND
> > > > or ZERO_EXTEND with
> > > > +    either operand being just a constant single bit
> > > > value, do nothing since
> > > > +    IF_THEN_ELSE is likely to increase the expression's
> > > > complexity.  */
> > > > +  if (HWI_COMPUTABLE_MODE_P (mode)
> > > > +     && pow2p_hwi (nz = nonzero_bits (x, mode))
> > > > +     && ! ((code == SIGN_EXTEND || code == ZERO_EXTEND)
> > > > +   && GET_CODE (XEXP (x, 0)) == AND
> > > > +   && CONST_INT_P (XEXP (XEXP (x, 0), 0))
> > > > +   && UINTVAL (XEXP (XEXP (x, 0), 0)) == nz))
> > > > +     return x;
> > > The code does not match the comment: the "!" should not be
> > > there.  How
> > > did it fix anything on s390 *with* that "!"?  That does not make
> > > much
> > > sense.
> > Sorry for breaking this.  With the constant changes in the
> > patterns this is supposed to fix it seems I've lost track of the
> > status quo.  I'll check what went wrong with the patch; in the
> > mean time Andreas will revert this, or if it's urgent, feel free
> > to do that yourself.

> I have tested that removing that ! cures all regressions.  I do not
> know if it still fixes what this patch intended to fix, of course.

I haven't been following this, but it seems some of these changes also
triggered bleh on SH:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78633

Cheers,
Oleg

Re: [PATCH] fix -fmax-errors & notes, take 2

[Nathan Sidwell]

On 12/02/2016 09:07 AM, Bernd Schmidt wrote:


Arguments should be documented.


I really must get into the habit of adding FIXME when writing dev comments.



+  if (count >= (int) context->max_errors)


Looks like there are some unnecessary type mismatches leading to this
cast. Maybe declare max_errors as int and remove the cast?


Yeah, you'll see the original code had similar problems.  Fixed as you 
suggest.


committed the attached.

nathan

--
Nathan Sidwell
2016-12-05  Nathan Sidwell  

	gcc/
	* diagnostic.c (diagnostic_check_max_errors): New, broken out of ...
	(diagnostic_action_after_output): ... here.
	(diagnostic_report_diagnostic): Call it for non-notes.
	* diagnostic.h (struct diagnostic_context): Make max_errors signed
	int.
	(diagnostic_check_max_errors): Declare.

	gcc/fortran/
	* error.c (gfc_warning_check): Call diagnostic_check_max_errors.
	(gfc_error_check): Likewise.

	gcc/testsuite/
	* c-c++-common/fmax_errors.c: Check notes after last error are
	emitted.

Index: gcc/diagnostic.c
===
--- gcc/diagnostic.c	(revision 243253)
+++ gcc/diagnostic.c	(working copy)
@@ -446,6 +446,31 @@ bt_err_callback (void *data ATTRIBUTE_UN
 	   errnum == 0 ? "" : xstrerror (errnum));
 }
 
+/* Check if we've met the maximum error limit, and if so fatally exit
+   with a message.  CONTEXT is the context to check, and FLUSH
+   indicates whether a diagnostic_finish call is needed.  */
+
+void
+diagnostic_check_max_errors (diagnostic_context *context, bool flush)
+{
+  if (!context->max_errors)
+return;
+
+  int count = (diagnostic_kind_count (context, DK_ERROR)
+	   + diagnostic_kind_count (context, DK_SORRY)
+	   + diagnostic_kind_count (context, DK_WERROR));
+
+  if (count >= context->max_errors)
+{
+  fnotice (stderr,
+	   "compilation terminated due to -fmax-errors=%u.\n",
+	   context->max_errors);
+  if (flush)
+	diagnostic_finish (context);
+  exit (FATAL_EXIT_CODE);
+}
+}
+
 /* Take any action which is expected to happen after the diagnostic
is written out.  This function does not always return.  */
 void
@@ -470,18 +495,6 @@ diagnostic_action_after_output (diagnost
 	  diagnostic_finish (context);
 	  exit (FATAL_EXIT_CODE);
 	}
-  if (context->max_errors != 0
-	  && ((unsigned) (diagnostic_kind_count (context, DK_ERROR)
-			  + diagnostic_kind_count (context, DK_SORRY)
-			  + diagnostic_kind_count (context, DK_WERROR))
-	  >= context->max_errors))
-	{
-	  fnotice (stderr,
-		   "compilation terminated due to -fmax-errors=%u.\n",
-		   context->max_errors);
-	  diagnostic_finish (context);
-	  exit (FATAL_EXIT_CODE);
-	}
   break;
 
 case DK_ICE:
@@ -890,6 +903,9 @@ diagnostic_report_diagnostic (diagnostic
 	return false;
 }
 
+  if (diagnostic->kind != DK_NOTE)
+diagnostic_check_max_errors (context);
+
   context->lock++;
 
   if (diagnostic->kind == DK_ICE || diagnostic->kind == DK_ICE_NOBT)
Index: gcc/diagnostic.h
===
--- gcc/diagnostic.h	(revision 243253)
+++ gcc/diagnostic.h	(working copy)
@@ -143,7 +143,7 @@ struct diagnostic_context
   bool dc_warn_system_headers;
 
   /* Maximum number of errors to report.  */
-  unsigned int max_errors;
+  int max_errors;
 
   /* This function is called before any message is printed out.  It is
  responsible for preparing message prefix and such.  For example, it
@@ -320,6 +320,7 @@ void default_diagnostic_start_span_fn (d
 void default_diagnostic_finalizer (diagnostic_context *, diagnostic_info *);
 void diagnostic_set_caret_max_width (diagnostic_context *context, int value);
 void diagnostic_action_after_output (diagnostic_context *, diagnostic_t);
+void diagnostic_check_max_errors (diagnostic_context *, bool flush = false);
 
 void diagnostic_file_cache_fini (void);
 
Index: gcc/fortran/error.c
===
--- gcc/fortran/error.c	(revision 243253)
+++ gcc/fortran/error.c	(working copy)
@@ -1226,6 +1226,7 @@ gfc_warning_check (void)
   diagnostic_action_after_output (global_dc,
   warningcount_buffered
   ? DK_WARNING : DK_ERROR);
+  diagnostic_check_max_errors (global_dc, true);
 }
 }
 
@@ -1370,6 +1371,7 @@ gfc_error_check (void)
   gcc_assert (gfc_output_buffer_empty_p (pp_error_buffer));
   pp->buffer = tmp_buffer;
   diagnostic_action_after_output (global_dc, DK_ERROR);
+  diagnostic_check_max_errors (global_dc, true);
   return true;
 }
 
Index: gcc/testsuite/c-c++-common/fmax-errors.c
===
--- gcc/testsuite/c-c++-common/fmax-errors.c	(revision 243253)
+++ gcc/testsuite/c-c++-common/fmax-errors.c	(working copy)
@@ -1,11 +1,21 @@
 /* PR c/44782 */
 /* { dg-do compile } */
-/* { dg-options "-fmax-errors=3" } */
+/* { dg-options "-fmax-errors=3 -Wall" } */
 
 void foo (unsigned int i, 

[PATCH 1/2] [ARC] Generating code for profiling.

[Claudiu Zissulescu]

Remove old gmonlib from libgcc and reimplemnt profiling using UCB
counters.

gcc/
2016-07-28  Claudiu Zissulescu  

* config/arc/arc.h (LINK_SPEC): Tidy up.
(ENDFILE_SPEC): Likewise.
(LIB_SPEC): Likewise.
(STARTFILE_SPEC): Include gcrt0 when profiling.
(FUNCTION_PROFILER): Use __mcount.
* config/arc/arc.opt (mucb-mcount): Remove.
* doc/invoke.texi (ARC): Remove mucb-mcount doc.
* arc/arc-protos.h (arc_profile_call): Remove.
* arc/arc.c (write_profile_sections): Likewise.
(arc_profile_call): Likewise.
(unspec_prof_hash): Likewise.
(unspec_prof_htab_eq): Likewise.
(arc_legitimate_constant_p): Remove UNSPEC_PROF.
(arc_reorg): Remove call to write_profile_sections.
* arc/arc.md (call): Remove call to arc_profile_call.
(call_value): Likewise.
(sibcall): Likewise.
(sibcall_value): Likewise.
(define_constants): Remove UNSPEC_PROF.

libgcc/
2016-07-28  Claudiu Zissulescu  

* config.host (arc*-*-linux-uclibc*): Remove libgmon, crtg, and
crtgend.
(arc*-*-elf*): Likewise.
* config/arc/t-arc: Remove old gmon lib targets.
* arc/crtg.S: Reomve.
* arc/crtgend.S: Likewise.
* arc/gmon/atomic.h: Likewise.
* arc/gmon/auxreg.h: Likewise.
* arc/gmon/dcache_linesz.S: Likewise.
* arc/gmon/gmon.c: Likewise.
* arc/gmon/machine-gmon.h: Likewise.
* arc/gmon/mcount.c: Likewise.
* arc/gmon/prof-freq-stub.S: Likewise.
* arc/gmon/prof-freq.c: Likewise.
* arc/gmon/profil.S: Likewise.
* arc/gmon/sys/gmon.h: Likewise.
* arc/gmon/sys/gmon_out.h: Likewise.
* arc/t-arc-newlib: Likewise.
* arc/t-arc700-uClibc: Renamed to t-arc-uClibc.
---
 gcc/config/arc/arc-protos.h |   1 -
 gcc/config/arc/arc.c| 152 ---
 gcc/config/arc/arc.h|  28 +-
 gcc/config/arc/arc.md   |  35 +--
 gcc/config/arc/arc.opt  |   4 -
 gcc/doc/invoke.texi |   8 +-
 libgcc/config.host  |  10 +-
 libgcc/config/arc/crtg.S|  51 
 libgcc/config/arc/crtgend.S |  33 ---
 libgcc/config/arc/gmon/atomic.h |  26 --
 libgcc/config/arc/gmon/auxreg.h |  35 ---
 libgcc/config/arc/gmon/dcache_linesz.S  |  57 
 libgcc/config/arc/gmon/gmon.c   | 450 
 libgcc/config/arc/gmon/machine-gmon.h   |  65 -
 libgcc/config/arc/gmon/mcount.c | 206 ---
 libgcc/config/arc/gmon/prof-freq-stub.S |  40 ---
 libgcc/config/arc/gmon/prof-freq.c  |  60 -
 libgcc/config/arc/gmon/profil.S | 164 
 libgcc/config/arc/gmon/sys/gmon.h   | 217 ---
 libgcc/config/arc/gmon/sys/gmon_out.h   |  55 
 libgcc/config/arc/t-arc |  37 ---
 libgcc/config/arc/t-arc-newlib  |  22 --
 libgcc/config/arc/t-arc-uClibc  |  38 +++
 libgcc/config/arc/t-arc700-uClibc   |  40 ---
 24 files changed, 60 insertions(+), 1774 deletions(-)
 delete mode 100644 libgcc/config/arc/crtg.S
 delete mode 100644 libgcc/config/arc/crtgend.S
 delete mode 100644 libgcc/config/arc/gmon/atomic.h
 delete mode 100644 libgcc/config/arc/gmon/auxreg.h
 delete mode 100644 libgcc/config/arc/gmon/dcache_linesz.S
 delete mode 100644 libgcc/config/arc/gmon/gmon.c
 delete mode 100644 libgcc/config/arc/gmon/machine-gmon.h
 delete mode 100644 libgcc/config/arc/gmon/mcount.c
 delete mode 100644 libgcc/config/arc/gmon/prof-freq-stub.S
 delete mode 100644 libgcc/config/arc/gmon/prof-freq.c
 delete mode 100644 libgcc/config/arc/gmon/profil.S
 delete mode 100644 libgcc/config/arc/gmon/sys/gmon.h
 delete mode 100644 libgcc/config/arc/gmon/sys/gmon_out.h
 delete mode 100644 libgcc/config/arc/t-arc-newlib
 create mode 100644 libgcc/config/arc/t-arc-uClibc
 delete mode 100644 libgcc/config/arc/t-arc700-uClibc

diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h
index d0a4e80..014bb8f 100644
--- a/gcc/config/arc/arc-protos.h
+++ b/gcc/config/arc/arc-protos.h
@@ -68,7 +68,6 @@ extern bool arc_raw_symbolic_reference_mentioned_p (rtx, 
bool);
 extern bool arc_legitimate_pic_operand_p (rtx);
 extern bool arc_is_longcall_p (rtx);
 extern bool arc_is_shortcall_p (rtx);
-extern bool arc_profile_call (rtx callee);
 extern bool valid_brcc_with_delay_p (rtx *);
 extern bool small_data_pattern (rtx , machine_mode);
 extern rtx arc_rewrite_small_data (rtx);
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 7c5f69b..780d20b 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -3734,97 +3734,6 @@ arc_print_operand_address (FILE *file , rtx addr)
 }
 }
 
-/* Called via walk_stores.  DATA points to a hash table we can use to
-   establish a unique SYMBOL_REF for each counter, which corresponds to
-   a caller-callee pair.
-   X is

[PATCH 2/2] [ARC] Remove old prof patterns.

[Claudiu Zissulescu]

Cleanup old patterns.

gcc/
2016-10-10  Claudiu Zissulescu  

* config/arc/arc.md (call_prof): Remove.
(call_value_prof): Likewise.
(sibcall_prof): Likewise.
(sibcall_value_prof): Likewise.
---
 gcc/config/arc/arc.md | 63 ---
 1 file changed, 63 deletions(-)

diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index 8e26238..0648ff3 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -4140,20 +4140,6 @@
(set_attr "predicable" "no,no,yes,yes,no,yes,no,yes")
(set_attr "length" "*,*,4,4,4,4,4,8")])
 
-(define_insn "call_prof"
-  [(call (mem:SI (match_operand:SI 0 "symbolic_operand" "Cbr,Cal"))
-(match_operand 1 "" ""))
-   (clobber (reg:SI 31))
-   (use (reg:SI 8))
-   (use (reg:SI 9))]
-   ""
-  "@
-   bl%!%* %P0;2
-   jl%! %^%S0"
-  [(set_attr "type" "call,call_no_delay_slot")
-   (set_attr "predicable" "yes,yes")
-   (set_attr "length" "4,8")])
-
 (define_expand "call_value"
   ;; operand 2 is stack_size_rtx
   ;; operand 3 is next_arg_register
@@ -4203,22 +4189,6 @@
 ; use it for lack of inter-procedural branch shortening.
 ; Link-time relaxation would help...
 
-
-(define_insn "call_value_prof"
-  [(set (match_operand 0 "dest_reg_operand" "=r,r")
-   (call (mem:SI (match_operand:SI 1 "symbolic_operand" "Cbr,Cal"))
- (match_operand 2 "" "")))
-   (clobber (reg:SI 31))
-   (use (reg:SI 8))
-   (use (reg:SI 9))]
-   ""
-  "@
-   bl%!%* %P1;1
-   jl%! %^%S1"
-  [(set_attr "type" "call,call_no_delay_slot")
-   (set_attr "predicable" "yes,yes")
-   (set_attr "length" "4,8")])
-
 (define_insn "nop"
   [(const_int 0)]
   ""
@@ -4713,39 +4683,6 @@
(set_attr "is_SIBCALL" "yes")]
 )
 
-(define_insn "sibcall_prof"
- [(call (mem:SI (match_operand:SI 0 "call_address_operand" "Cbr,Cal"))
-   (match_operand 1 "" ""))
-  (simple_return)
-  (use (match_operand 2 "" ""))
-  (use (reg:SI 8))
-  (use (reg:SI 9))]
-  ""
-  "@
-   b%!%* %P0;2
-   j%! %^%S0;2"
-  [(set_attr "type" "call,call_no_delay_slot")
-   (set_attr "predicable" "yes")
-   (set_attr "is_SIBCALL" "yes")]
-)
-
-(define_insn "sibcall_value_prof"
- [(set (match_operand 0 "dest_reg_operand" "")
-   (call (mem:SI (match_operand:SI 1 "call_address_operand" "Cbr,Cal"))
-(match_operand 2 "" "")))
-  (simple_return)
-  (use (match_operand 3 "" ""))
-  (use (reg:SI 8))
-  (use (reg:SI 9))]
-  ""
-  "@
-   b%!%* %P1;1
-   j%! %^%S1;1"
-  [(set_attr "type" "call,call_no_delay_slot")
-   (set_attr "predicable" "yes")
-   (set_attr "is_SIBCALL" "yes")]
-)
-
 (define_expand "prologue"
   [(pc)]
   ""
-- 
1.9.1

[PATCH 0/2] [ARC] Reimplement profiling support.

[Claudiu Zissulescu]

This series of two patches reimplements ARC's profiling support in a
sustainable way.

First, we remove the old gmon lib implementation and its dependencies
from gcc and libgcc. This old implementation was partially working
only for A7xx type of processors, and only for bare-metal type of
applications. Also this implementation hinders the toolchain to build
for a glibc system.

Then, we reimplement the profiling support as done in anyonther port,
relaying on the existence of a gmon lib in the support C-libraries,
namely Newlib or glibc.

Ok to apply?
Claudiu

Claudiu Zissulescu (2):
  [ARC] Generating code for profiling.
  [ARC] Remove old prof patterns.

 gcc/config/arc/arc-protos.h |   1 -
 gcc/config/arc/arc.c| 152 ---
 gcc/config/arc/arc.h|  28 +-
 gcc/config/arc/arc.md   |  98 +--
 gcc/config/arc/arc.opt  |   4 -
 gcc/doc/invoke.texi |   8 +-
 libgcc/config.host  |  10 +-
 libgcc/config/arc/crtg.S|  51 
 libgcc/config/arc/crtgend.S |  33 ---
 libgcc/config/arc/gmon/atomic.h |  26 --
 libgcc/config/arc/gmon/auxreg.h |  35 ---
 libgcc/config/arc/gmon/dcache_linesz.S  |  57 
 libgcc/config/arc/gmon/gmon.c   | 450 
 libgcc/config/arc/gmon/machine-gmon.h   |  65 -
 libgcc/config/arc/gmon/mcount.c | 206 ---
 libgcc/config/arc/gmon/prof-freq-stub.S |  40 ---
 libgcc/config/arc/gmon/prof-freq.c  |  60 -
 libgcc/config/arc/gmon/profil.S | 164 
 libgcc/config/arc/gmon/sys/gmon.h   | 217 ---
 libgcc/config/arc/gmon/sys/gmon_out.h   |  55 
 libgcc/config/arc/t-arc |  37 ---
 libgcc/config/arc/t-arc-newlib  |  22 --
 libgcc/config/arc/t-arc-uClibc  |  38 +++
 libgcc/config/arc/t-arc700-uClibc   |  40 ---
 24 files changed, 60 insertions(+), 1837 deletions(-)
 delete mode 100644 libgcc/config/arc/crtg.S
 delete mode 100644 libgcc/config/arc/crtgend.S
 delete mode 100644 libgcc/config/arc/gmon/atomic.h
 delete mode 100644 libgcc/config/arc/gmon/auxreg.h
 delete mode 100644 libgcc/config/arc/gmon/dcache_linesz.S
 delete mode 100644 libgcc/config/arc/gmon/gmon.c
 delete mode 100644 libgcc/config/arc/gmon/machine-gmon.h
 delete mode 100644 libgcc/config/arc/gmon/mcount.c
 delete mode 100644 libgcc/config/arc/gmon/prof-freq-stub.S
 delete mode 100644 libgcc/config/arc/gmon/prof-freq.c
 delete mode 100644 libgcc/config/arc/gmon/profil.S
 delete mode 100644 libgcc/config/arc/gmon/sys/gmon.h
 delete mode 100644 libgcc/config/arc/gmon/sys/gmon_out.h
 delete mode 100644 libgcc/config/arc/t-arc-newlib
 create mode 100644 libgcc/config/arc/t-arc-uClibc
 delete mode 100644 libgcc/config/arc/t-arc700-uClibc

-- 
1.9.1

Re: [PATCH 6/6][ARM] Implement support for ACLE Coprocessor MCRR and MRRC intrinsics

[Andre Vieira (lists)]

On 09/11/16 10:12, Andre Vieira (lists) wrote:
> Hi,
> 
> This patch implements support for the ARM ACLE Coprocessor MCR and MRC
> intrinsics. See below a table mapping the intrinsics to their respective
> instructions:
> 
> +---+---+
> | Intrinsic signature   |
> Instruction pattern   |
> +---+---+
> |void __arm_mcrr(coproc, opc1, uint64_t value, CRm) |
> MCRR coproc, opc1, Rt, Rt2, CRm   |
> +---+---+
> |void __arm_mcrr2(coproc, opc1, uint64_t value, CRm)|
> MCRR2 coproc, opc1, Rt, Rt2, CRm  |
> +---+---+
> |uint64_t __arm_mrrc(coproc, opc1, CRm) |
> MRRC coproc, opc1, Rt, Rt2, CRm   |
> +---+---+
> |uint64_t __arm_mrrc2(coproc, opc1, CRm)|
> MRRC2 coproc, opc1, Rt, Rt2, CRm  |
> +---+---+
> Note that any untyped variable in the intrinsic signature is required to
> be a compiler-time constant and has the type 'unsigned int'.  We do some
> boundary checks for coproc:[0-15], opc1[0-7] CR*:[0-31]. If either of
> these requirements are not met a diagnostic is issued.
> 
> I added a new arm_arch variable for ARMv5TE to use when deciding whether
> or not the MCRR and MRCC intrinsics are available.
> 
> Is this OK for trunk?
> 
> Regards,
> Andre
> 
> gcc/ChangeLog:
> 2016-11-09  Andre Vieira  
> 
>   * config/arm/arm.md (): New.
>   (): New.
>   * config/arm/arm.c (arm_arch5te): New.
>   (arm_option_override): Set arm_arch5te.
>   (arm_coproc_builtin_available): Add support for mcrr, mcrr2, mrrc
>   and mrrc2.
>   * config/arm/arm-builtins.c (MCRR_QUALIFIERS): Define to...
>   (arm_mcrr_qualifiers): ... this. New.
>   (MRRC_QUALIFIERS): Define to...
>   (arm_mrrc_qualifiers): ... this. New.
>   * config/arm/arm_acle.h (__arm_mcrr, __arm_mcrr2, __arm_mrrc,
>   __arm_mrrc2): New.
>   * config/arm/arm_acle_builtins.def (mcrr, mcrr2, mrrc, mrrc2): New.
>   * config/arm/iterators.md (MCRRI, mcrr, MCRR): New.
>   (MRRCI, mrrc, MRRC): New.
>   * config/arm/unspecs.md (VUNSPEC_MCRR, VUNSPEC_MCRR2, VUNSPEC_MRRC,
>   VUNSPEC_MRRC2): New.
> 
> gcc/testsuite/ChangeLog:
> 
> 2016-11-09  Andre Vieira  
> 
>   * gcc.target/arm/acle/mcrr: New.
>   * gcc.target/arm/acle/mcrr2: New.
>   * gcc.target/arm/acle/mrrc: New.
>   * gcc.target/arm/acle/mrrc2: New.
> 
Hi,

I realize I forgot to mention that for these intrinsics 'Rt' will hold
the low half and 'Rt2' the higher half of either the argument 'value'
for MCRR{,2} or the return value for MRRC{,2}.

Cheers,
Andre

[arm-embedded][committed][PATCH 7/7] Added support for ARMV8-M Security Extension cmse_nonsecure_caller intrinsic

[Andre Vieira (lists)]

On 30/11/16 12:06, Andre Vieira (lists) wrote:
> Hi,
> 
> I changed the testcase with this patch since the old testcase was
> casting a function pointer to another function pointer and using that
> pointer to call the function. This is undefined behavior. The new test
> reflects a more sane use of the intrinsics.
> 
> Cheers,
> Andre
> 
Hi,

Backported this to the embedded-6-branch in revision r243253.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  

* config/arm/arm-builtins.c (arm_builtins): Define
ARM_BUILTIN_CMSE_NONSECURE_CALLER.
(bdesc_2arg): Add line for cmse_nonsecure_caller.
(arm_init_builtins): Handle cmse_nonsecure_caller.
(arm_expand_builtin): Likewise.
* config/arm/arm_cmse.h (cmse_nonsecure_caller): New.

gcc/testsuite/ChangeLog.arm:
2016-12-05  Andre Vieira  

Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  

* gcc.target/arm/cmse/cmse-1.c: Add test for
cmse_nonsecure_caller.
diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm
index 
315ea8897096ec7890675e0c680f048e19d5dd5b..800a4b60efe7fe5ba9077217b7eb1271e9e05180
 100644
--- a/gcc/ChangeLog.arm
+++ b/gcc/ChangeLog.arm
@@ -4,6 +4,19 @@
2016-12-02  Andre Vieira  
Thomas Preud'homme  
 
+   * config/arm/arm-builtins.c (arm_builtins): Define
+   ARM_BUILTIN_CMSE_NONSECURE_CALLER.
+   (bdesc_2arg): Add line for cmse_nonsecure_caller.
+   (arm_init_builtins): Handle cmse_nonsecure_caller.
+   (arm_expand_builtin): Likewise.
+   * config/arm/arm_cmse.h (cmse_nonsecure_caller): New.
+
+2016-12-05  Andre Vieira  
+
+   Backport from mainline
+   2016-12-02  Andre Vieira  
+   Thomas Preud'homme  
+
* config/arm/arm.c (detect_cmse_nonsecure_call): New.
(cmse_nonsecure_call_clear_caller_saved): New.
(arm_reorg): Use cmse_nonsecure_call_clear_caller_saved.
diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index 
68b2839879f78e8d819444fbc11d2a91f8d6279a..ac56648706cd81a35fc32bde0bf3fc723387f5d5
 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -515,6 +515,8 @@ enum arm_builtins
   ARM_BUILTIN_GET_FPSCR,
   ARM_BUILTIN_SET_FPSCR,
 
+  ARM_BUILTIN_CMSE_NONSECURE_CALLER,
+
 #undef CRYPTO1
 #undef CRYPTO2
 #undef CRYPTO3
@@ -1789,6 +1791,17 @@ arm_init_builtins (void)
= add_builtin_function ("__builtin_arm_stfscr", ftype_set_fpscr,
ARM_BUILTIN_SET_FPSCR, BUILT_IN_MD, NULL, 
NULL_TREE);
 }
+
+  if (use_cmse)
+{
+  tree ftype_cmse_nonsecure_caller
+   = build_function_type_list (unsigned_type_node, NULL);
+  arm_builtin_decls[ARM_BUILTIN_CMSE_NONSECURE_CALLER]
+   = add_builtin_function ("__builtin_arm_cmse_nonsecure_caller",
+   ftype_cmse_nonsecure_caller,
+   ARM_BUILTIN_CMSE_NONSECURE_CALLER, BUILT_IN_MD,
+   NULL, NULL_TREE);
+}
 }
 
 /* Return the ARM builtin for CODE.  */
@@ -2368,6 +2381,12 @@ arm_expand_builtin (tree exp,
   emit_insn (pat);
   return target;
 
+case ARM_BUILTIN_CMSE_NONSECURE_CALLER:
+  target = gen_reg_rtx (SImode);
+  op0 = arm_return_addr (0, NULL_RTX);
+  emit_insn (gen_addsi3 (target, op0, const1_rtx));
+  return target;
+
 case ARM_BUILTIN_TEXTRMSB:
 case ARM_BUILTIN_TEXTRMUB:
 case ARM_BUILTIN_TEXTRMSH:
diff --git a/gcc/config/arm/arm_cmse.h b/gcc/config/arm/arm_cmse.h
index 
894343bb835b61e09c14668d45aa43a8693fd011..82b58b1c4f4a12ba6062e2cc2632653788d0eeb7
 100644
--- a/gcc/config/arm/arm_cmse.h
+++ b/gcc/config/arm/arm_cmse.h
@@ -163,6 +163,13 @@ __attribute__ ((__always_inline__))
 cmse_TTAT (void *__p)
 __CMSE_TT_ASM (at)
 
+/* FIXME: diagnose use outside cmse_nonsecure_entry functions.  */
+__extension__ static __inline int __attribute__ ((__always_inline__))
+cmse_nonsecure_caller (void)
+{
+  return __builtin_arm_cmse_nonsecure_caller ();
+}
+
 #define CMSE_AU_NONSECURE  2
 #define CMSE_MPU_NONSECURE 16
 #define CMSE_NONSECURE 18
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 
50a2db184aa5c11865e0ebfc3881e54d2703774d..44d9b48fcd2ffd8a3b127261be8088d1ab67002e
 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -12287,6 +12287,7 @@ cmse_address_info_t cmse_TTAT_fptr (FPTR)
 void * cmse_check_address_range (void *, size_t, int)
 typeof(p) cmse_nsfptr_create (FPTR p)
 intptr_t cmse_is_nsfptr (FPTR)
+int cmse_nonsecure_caller (void)
 @end smallexample
 
 @node AVR Built-in Functions
diff --git a/gcc/testsuite/ChangeLog.arm b/gcc/testsuite/ChangeLog.arm
index 
708a16c48153322311538d9f8d7e49f76248..17dbfe0675bc9c8d01b3af4360ee7327bd719eda
 100644
--- a/gcc/testsuite/ChangeLog.arm
+++ b/gcc/testsuite

[arm-embedded][committed][PATCH 6/7] ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_call

[Andre Vieira (lists)]

On 02/12/16 13:41, Kyrill Tkachov wrote:
> Hi Andre,
> 
> On 02/12/16 13:36, Andre Vieira (lists) wrote:
>> On 23/11/16 11:53, Andre Vieira (lists) wrote:
>>> On 11/11/16 16:19, Kyrill Tkachov wrote:
 And CC'ing Ramana and Richard this time...

>>> Hi,
>>>
>>> After some extra testing I found that the sibcall optimization was not
>>> disabled for calls to function pointers with the cmse_nonsecure_call
>>> attribute, causing the clearing and call to the function wrapper to be
>>> skipped. This would result in an illegal branch into secure memory and
>>> would HardFault.
>>>
>>> Added a test.
>>>
>>> Is this OK?
>>>
>>> Cheers,
>>> Andre
>>>
>>> *** gcc/ChangeLog ***
>>> 2016-11-xx  Andre Vieira
>>>  Thomas Preud'homme  
>>>
>>>  * config/arm/arm.c (detect_cmse_nonsecure_call): New.
>>>  (cmse_nonsecure_call_clear_caller_saved): New.
>>>  (arm_reorg): Use cmse_nonsecure_call_clear_caller_saved.
>>>  (arm_function_ok_for_sibcall): Disable sibcalls for
>>> cmse_nonsecure_call.
>>>  * config/arm/arm-protos.h (detect_cmse_nonsecure_call): New.
>>>  * config/arm/arm.md (call): Handle cmse_nonsecure_entry.
>>>  (call_value): Likewise.
>>>  (nonsecure_call_internal): New.
>>>  (nonsecure_call_value_internal): New.
>>>  * config/arm/thumb1.md (*nonsecure_call_reg_thumb1_v5): New.
>>>  (*nonsecure_call_value_reg_thumb1_v5): New.
>>>  * config/arm/thumb2.md (*nonsecure_call_reg_thumb2): New.
>>>  (*nonsecure_call_value_reg_thumb2): New.
>>>  * config/arm/unspecs.md (UNSPEC_NONSECURE_MEM): New.
>>>
>>> *** libgcc/ChangeLog ***
>>> 2016-11-xx  Andre Vieira
>>>  Thomas Preud'homme  
>>>
>>>  * config/arm/cmse_nonsecure_call.S: New.
>>> * config/arm/t-arm: Compile cmse_nonsecure_call.S
>>>
>>>
>>> *** gcc/testsuite/ChangeLog ***
>>> 2016-11-xx  Andre Vieira
>>>  Thomas Preud'homme  
>>>
>>>  * gcc.target/arm/cmse/cmse.exp: Run tests in mainline dir.
>>>  * gcc.target/arm/cmse/cmse-9.c: Added some extra tests.
>>>  * gcc.target/arm/cmse/cmse-14.c: New.
>>>  * gcc.target/arm/cmse/baseline/bitfield-4.c: New.
>>>  * gcc.target/arm/cmse/baseline/bitfield-5.c: New.
>>>  * gcc.target/arm/cmse/baseline/bitfield-6.c: New.
>>>  * gcc.target/arm/cmse/baseline/bitfield-7.c: New.
>>>  * gcc.target/arm/cmse/baseline/bitfield-8.c: New.
>>>  * gcc.target/arm/cmse/baseline/bitfield-9.c: New.
>>>  * gcc.target/arm/cmse/baseline/bitfield-and-union-1.c: New.
>>>  * gcc.target/arm/cmse/baseline/cmse-11.c: New.
>>> * gcc.target/arm/cmse/baseline/cmse-13.c: New.
>>> * gcc.target/arm/cmse/baseline/cmse-6.c: New.
>>>  * gcc/testsuite/gcc.target/arm/cmse/baseline/union-1.c: New.
>>>  * gcc/testsuite/gcc.target/arm/cmse/baseline/union-2.c: New.
>>> * gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: New.
>>> * gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: New.
>>> * gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: New.
>>> * gcc.target/arm/cmse/mainline/hard/cmse-13.c: New.
>>> * gcc.target/arm/cmse/mainline/hard/cmse-7.c: New.
>>> * gcc.target/arm/cmse/mainline/hard/cmse-8.c: New.
>>> * gcc.target/arm/cmse/mainline/soft/cmse-13.c: New.
>>> * gcc.target/arm/cmse/mainline/soft/cmse-7.c: New.
>>> * gcc.target/arm/cmse/mainline/soft/cmse-8.c: New.
>>> * gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: New.
>>> * gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: New.
>>> * gcc.target/arm/cmse/mainline/softfp/cmse-13.c: New.
>>> * gcc.target/arm/cmse/mainline/softfp/cmse-7.c: New.
>>> * gcc.target/arm/cmse/mainline/softfp/cmse-8.c: New.
>>>
>> Hi,
>>
>> To make the clearing of registers consistent between single and double
>> precision I decided to clear all FP registers with 0. The callee-saved
>> registers, saved, cleared and restored in the library wrapper we can do
>> this without much penalty to performance. The caller-saved registers are
>> compiler generated and currently generate a 'vldr' instruction, per
>> cleared (sp or dp) register. This is far from optimal, but it works and
>> it is "safer". I have some ideas to improve this, for instance using
>> r0-r1 to clear the FP registers, since they will either contain the
>> address of the callback function or an argument value, either way they
>> will never contain secret information. I will address this at a later
>> time.
>>
>> Changed the tests to reflect these changes. No changes to the ChangeLog.
>>
>> Is this OK?
> 
> Thanks, I much prefer the consistency.
> This is ok.
> I believe all patches in this series have been approved now, so you can
> go ahead and commit them.
> Please keep an eye out for fallout over the next week.
> 
> Kyrill
> 
>> Cheers,
>> Andre
>>
> 

Hi,

Backported this to the embedded-6-branch in revision r243252.

Cheers,

Re: [PATCHv3 5/7, GCC[arm-embedded][committed][PATCH 5/7] Handling ARMv8-M Security Extension's cmse_nonsecure_call attribute, ARM, V8M] Handling ARMv8-M Security Extension's cmse_nonsecure_call attri

[Andre Vieira (lists)]

On 30/11/16 17:22, Kyrill Tkachov wrote:
> 
> On 30/11/16 12:05, Andre Vieira (lists) wrote:
>> Hi,
>>
>> I got a bug report against the old version of this patch and fixed it
>> here. This had to do with GCC optimizations sharing types with and
>> without the 'cmse_nonsecure_call' attribute.  The patch now no longer
>> sets the main variant, this didn't seem to do what I thought it did.
>> Instead the patch now creates distinct type copies for every declared
>> pointer that eventually points to the function type with the attribute,
>> it will also create a distinct copy for the function type itself.
>> Another change in this patch was to make 'arm_comp_type_attributes', the
>> ARM implementation of TARGET_COMP_TYPE_ATTRIBUTES, deny compatibility
>> between function types with the attribute and without.
>>
>> I added a test case to test the issue solved with these changes.
> 
> Ok.
> Thanks,
> Kyrill
> 
>> *** gcc/ChangeLog ***
>> 2016-11-xx  Andre Vieira
>>  Thomas Preud'homme  
>>
>>  * config/arm/arm.c (gimplify.h): New include.
>>  (arm_handle_cmse_nonsecure_call): New.
>>  (arm_attribute_table): Added cmse_nonsecure_call.
>>  (arm_comp_type_attributes): Deny compatibility of function types
>> with
>>  without the cmse_nonsecure_call attribute.
>>  * doc/extend.texi (ARM ARMv8-M Security Extensions): New
>> attribute.
>>
>> *** gcc/testsuite/ChangeLog ***
>> 2016-11-xx  Andre Vieira
>>  Thomas Preud'homme  
>>
>>  * gcc.target/arm/cmse/cmse-3.c: Add tests.
>>  * gcc.target/arm/cmse/cmse-4.c: Add tests.
>>  * gcc.target/arm/cmse/cmse-15.c: New.
>>
>>
>> Cheers,
>> Andre
> 
Hi,

Backported this to the embedded-6-branch in revision r243251.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  

* config/arm/arm.c (gimplify.h): New include.
(arm_handle_cmse_nonsecure_call): New.
(arm_attribute_table): Added cmse_nonsecure_call.
(arm_comp_type_attributes): Deny compatibility of function types
with without the cmse_nonsecure_call attribute.
* doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute.

gcc/testsuite/ChangeLog.arm:
2016-12-05  Andre Vieira  

Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  

* gcc.target/arm/cmse/cmse-3.c: Add tests.
* gcc.target/arm/cmse/cmse-4.c: Add tests.
* gcc.target/arm/cmse/cmse-15.c: New.
diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm
index 
3085e1c93270cb7ab9fcee5dbe70ec6ada763026..8459d1885f218a364a4396e458d001d015932266
 100644
--- a/gcc/ChangeLog.arm
+++ b/gcc/ChangeLog.arm
@@ -4,6 +4,19 @@
2016-12-02  Andre Vieira  
Thomas Preud'homme  
 
+   * config/arm/arm.c (gimplify.h): New include.
+   (arm_handle_cmse_nonsecure_call): New.
+   (arm_attribute_table): Added cmse_nonsecure_call.
+   (arm_comp_type_attributes): Deny compatibility of function types
+   with without the cmse_nonsecure_call attribute.
+   * doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute.
+
+2016-12-05  Andre Vieira  
+
+   Backport from mainline
+   2016-12-02  Andre Vieira  
+   Thomas Preud'homme  
+
* config/arm/arm.c (output_return_instruction): Clear
registers.
(thumb2_expand_return): Likewise.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 
b9a62b5e6bf06dcc218dfdb3111dc0803681acd2..bba2991f65e9f0b12d43a05ad023bfc2d0f97aff
 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -62,6 +62,7 @@
 #include "builtins.h"
 #include "tm-constrs.h"
 #include "rtl-iter.h"
+#include "gimplify.h"
 
 /* This file should be included last.  */
 #include "target-def.h"
@@ -137,6 +138,7 @@ static tree arm_handle_isr_attribute (tree *, tree, tree, 
int, bool *);
 static tree arm_handle_notshared_attribute (tree *, tree, tree, int, bool *);
 #endif
 static tree arm_handle_cmse_nonsecure_entry (tree *, tree, tree, int, bool *);
+static tree arm_handle_cmse_nonsecure_call (tree *, tree, tree, int, bool *);
 static void arm_output_function_epilogue (FILE *, HOST_WIDE_INT);
 static void arm_output_function_prologue (FILE *, HOST_WIDE_INT);
 static int arm_comp_type_attributes (const_tree, const_tree);
@@ -352,6 +354,8 @@ static const struct attribute_spec arm_attribute_table[] =
   /* ARMv8-M Security Extensions support.  */
   { "cmse_nonsecure_entry", 0, 0, true, false, false,
 arm_handle_cmse_nonsecure_entry, false },
+  { "cmse_nonsecure_call", 0, 0, true, false, false,
+arm_handle_cmse_nonsecure_call, true },
   { NULL,   0, 0, false, false, false, NULL, false }
 };
 
@@ -6713,6 +6717,78 @@ arm_handle_cmse_nonsecure_entry (tree *node, tree name,
   return NULL_TREE;
 }
 
+
+/* Called upon de

[arm-embedded][committed][PATCH 4/7] ARMv8-M Security Extension's cmse_nonsecure_entry: clear registers

[Andre Vieira (lists)]

On 30/11/16 17:22, Kyrill Tkachov wrote:
> 
> On 30/11/16 15:32, Andre Vieira (lists) wrote:
>> On 23/11/16 11:52, Andre Vieira (lists) wrote:
>>> Hi,
>>>
>>> After some extra testing I realized there was an issue with the way we
>>> were clearing registers when returning from a cmse_nonsecure_entry
>>> function for ARMv8-M.Baseline.  This patch fixes that and changes the
>>> testcase to catch the issue.
>>>
>>> The problem was I was always using LR to clear the registers, however,
>>> due to the way the Thumb-1 backend works, we can't guarantee LR will
>>> contain the address to which we will be returning at the time of
>>> clearing. Instead we use r0 to clear r1-r3 and IP. If the function does
>>> not use r0 to return a value, we clear r0 with 0 before using it to
>>> clear everything else. As for LR, we move the value of the register used
>>> to return into it prior to returning.
>>>
>>> This satisfies the requirements of not leaking secure information since
>>> all registers hold either:
>>> - values to return
>>> - 0
>>> - return address
>>>
>>> No changes to ChangeLog.
>>>
>>> Cheers,
>>> Andre
>>>
>> Hi,
>>
>> So I seemed to have forgotten to address two of your comments earlier,
>> done in this version.
>>
>> To reiterate:
>> After some extra testing I realized there was an issue with the way we
>> were clearing registers when returning from a cmse_nonsecure_entry
>> function for ARMv8-M Baseline.  This patch fixes that and changes the
>> testcase to catch the issue.
>>
>> The problem was I was always using LR to clear the registers, however,
>> due to the way the Thumb-1 backend works, we can't guarantee LR will
>> contain the address to which we will be returning at the time of
>> clearing. Instead we use r0 to clear r1-r3 and IP. If the function does
>> not use r0 to return a value, we clear r0 with 0 before using it to
>> clear everything else. As for LR, we move the value of the register used
>> to return into it prior to returning.
>>
>> This satisfies the requirements of not leaking secure information since
>> all registers hold either:
>> - values to return
>> - 0
>> - return address
>>
>> *** gcc/ChangeLog ***
>> 2016-11-xx  Andre Vieira
>>   Thomas Preud'homme  
>>
>>   * config/arm/arm.c (output_return_instruction): Clear
>>   registers.
>>   (thumb2_expand_return): Likewise.
>>   (thumb1_expand_epilogue): Likewise.
>>   (thumb_exit): Likewise.
>>   (arm_expand_epilogue): Likewise.
>>   (cmse_nonsecure_entry_clear_before_return): New.
>>   (comp_not_to_clear_mask_str_un): New.
>>   (compute_not_to_clear_mask): New.
>>   * config/arm/thumb1.md (*epilogue_insns): Change length
>> attribute.
>>   * config/arm/thumb2.md (*thumb2_cmse_entry_return): Duplicate
>>   thumb2_return pattern for cmse_nonsecure_entry functions.
>>
>> *** gcc/testsuite/ChangeLog ***
>> 2016-11-xx  Andre Vieira
>>   Thomas Preud'homme  
>>
>>   * gcc.target/arm/cmse/cmse.exp: Test different multilibs
>> separate.
>>   * gcc.target/arm/cmse/struct-1.c: New.
>>   * gcc.target/arm/cmse/bitfield-1.c: New.
>>   * gcc.target/arm/cmse/bitfield-2.c: New.
>>   * gcc.target/arm/cmse/bitfield-3.c: New.
>>   * gcc.target/arm/cmse/baseline/cmse-2.c: Test that registers
>> are
>> cleared.
>>   * gcc.target/arm/cmse/mainline/soft/cmse-5.c: New.
>>   * gcc.target/arm/cmse/mainline/hard/cmse-5.c: New.
>>   * gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: New.
>>   * gcc.target/arm/cmse/mainline/softfp/cmse-5.c: New.
>>   * gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: New.
> 
> Ok, thanks for addressing the issues.
> Kyrill
> 
>> Cheers,
>> Andre
> 
Hi,

Backported this to the embedded-6-branch in revision r243250.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  

* config/arm/arm.c (output_return_instruction): Clear
registers.
(thumb2_expand_return): Likewise.
(thumb1_expand_epilogue): Likewise.
(thumb_exit): Likewise.
(arm_expand_epilogue): Likewise.
(cmse_nonsecure_entry_clear_before_return): New.
(comp_not_to_clear_mask_str_un): New.
(compute_not_to_clear_mask): New.
* config/arm/thumb1.md (*epilogue_insns): Change length attribute.
* config/arm/thumb2.md (*thumb2_return): Disable for
cmse_nonsecure_entry functions.
(*thumb2_cmse_entry_return): Duplicate thumb2_return pattern for
cmse_nonsecure_entry functions.

gcc/testsuite/ChangeLog.arm:
2016-12-05  Andre Vieira  

Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  

* gcc.target/arm/cmse/cmse.exp: Test different multilibs separate.
* gcc.target/arm/cmse/st

[arm-embedded][committed][PATCH 3/7] ARMv8-M Security Extension's cmse_nonsecure_entry: __acle_se label and bxns return

[Andre Vieira (lists)]

On 27/10/16 10:55, Andre Vieira (lists) wrote:
> On 26/10/16 11:03, Kyrill Tkachov wrote:
>> Hi Andre,
>>
>> On 25/10/16 17:28, Andre Vieira (lists) wrote:
>>> On 25/07/16 14:23, Andre Vieira (lists) wrote:
 This patch extends support for the ARMv8-M Security Extensions
 'cmse_nonsecure_entry' attribute in two ways:

 1) Generate two labels for the function, the regular function name and
 one with the function's name appended to '__acle_se_', this will trigger
 the linker to create a secure gateway veneer for this entry function.
 2) Return from cmse_nonsecure_entry marked functions using bxns.

 See Section 5.4 of ARM®v8-M Security Extensions
 (http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html).



 *** gcc/ChangeLog ***
 2016-07-25  Andre Vieira
  Thomas Preud'homme  

  * config/arm/arm.c (use_return_insn): Change to return with 
 bxns
  when cmse_nonsecure_entry.
  (output_return_instruction): Likewise.
  (arm_output_function_prologue): Likewise.
  (thumb_pop): Likewise.
  (thumb_exit): Likewise.
  (arm_function_ok_for_sibcall): Disable sibcall for entry
 functions.
  (arm_asm_declare_function_name): New.
  * config/arm/arm-protos.h (arm_asm_declare_function_name): New.
  * config/arm/elf.h (ASM_DECLARE_FUNCTION_NAME): Redefine to
  use arm_asm_declare_function_name.

 *** gcc/testsuite/ChangeLog ***
 2016-07-25  Andre Vieira
  Thomas Preud'homme  

  * gcc.target/arm/cmse/cmse-2.c: New.
  * gcc.target/arm/cmse/cmse-4.c: New.

>>> Hi,
>>>
>>> Rebased previous patch on top of trunk as requested. No changes to
>>> ChangeLog.
>>>
>>> Cheers,
>>> Andre
>>
>> @@ -19919,6 +19932,42 @@ output_return_instruction (rtx operand, bool
>> really_return, bool reverse,
>>return "";
>>  }
>>  
>> +/* Output in FILE asm statements needed to declare the NAME of the
>> function
>> +   defined by its DECL node.  */
>> +
>> +void
>> +arm_asm_declare_function_name (FILE *file, const char *name, tree decl)
>> +{
>> +  size_t cmse_name_len;
>> +  char *cmse_name = 0;
>> +  char cmse_prefix[] = "__acle_se_";
>> +
>> +  if (use_cmse && lookup_attribute ("cmse_nonsecure_entry",
>> +DECL_ATTRIBUTES (decl)))
>> +{
>> +  cmse_name_len = sizeof (cmse_prefix) + strlen (name);
>> +  cmse_name = XALLOCAVEC (char, cmse_name_len);
>> +  snprintf (cmse_name, cmse_name_len, "%s%s", cmse_prefix, name);
>> +  targetm.asm_out.globalize_label (file, cmse_name);
>> +}
>> +
>>
>> I think this definitely warrants a quick comment explaining why you're
>> adding
>> __acle_se_ to the function label
>>
>>  
>>  /* Scan INSN just before assembler is output for it.
>> @@ -25247,6 +25301,12 @@ thumb2_expand_return (bool simple_return)
>>  
>>if (!simple_return && saved_regs_mask)
>>  {
>> +  /* TODO: Verify that this path is never taken for
>> cmse_nonsecure_entry
>> + functions or adapt code to handle according to ACLE.  This path
>> should
>> + not be reachable for cmse_nonsecure_entry functions though we prefer
>> + to guard it for now to ensure that future code changes do not
>> silently
>> + change this behavior.  */
>>
>> I think you mean s/guard/assert/
>>
>>  +  gcc_assert (!IS_CMSE_ENTRY (arm_current_func_type ()));
>>if (num_regs == 1)
>>  {
>>rtx par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2));
>>
>> This is ok with those changes.
>> Thanks,
>> Kyrill
>>
> Hi,
> 
> Reworked comments. Also got rid of a redundant 'if (cmse_name)' in
> 'arm_asm_declare_function_name'. No change to ChangeLogs.
> 
> Cheers,
> Andre
> 
Hi,

Backported this to the embedded-6-branch in revision r.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  

* config/arm/arm.c (use_return_insn): Change to return with  bxns
when cmse_nonsecure_entry.
(output_return_instruction): Likewise.
(arm_output_function_prologue): Likewise.
(thumb_pop): Likewise.
(thumb_exit): Likewise.
(thumb2_expand_return): Assert that entry functions always have simple
returns.
(arm_expand_epilogue): Handle entry functions.
(arm_function_ok_for_sibcall): Disable sibcall for entry functions.
(arm_asm_declare_function_name): New.
* config/arm/arm-protos.h (arm_asm_declare_function_name): New.
* config/arm/elf.h (ASM_DECLARE_FUNCTION_NAME): Redefine to
use arm_asm_declare_function_name.

gcc/testsuite/ChangeLog.arm:
2016-12-05  Andre Vieira  

Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  

[arm-embedded][committed][PATCH 2/7] Handling ARMv8-M Security Extension's cmse_nonsecure_entry attribute

[Andre Vieira (lists)]

On 27/10/16 11:19, Kyrill Tkachov wrote:
> 
> On 27/10/16 10:54, Andre Vieira (lists) wrote:
>> On 26/10/16 17:28, Kyrill Tkachov wrote:
>>> On 26/10/16 17:28, Andre Vieira (lists) wrote:
 On 26/10/16 10:33, Kyrill Tkachov wrote:
> +static tree
> +arm_handle_cmse_nonsecure_entry (tree *node, tree name,
> + tree /* args */,
> + int /* flags */,
> + bool *no_add_attrs)
> +{
> +  tree fndecl;
> +
> +  if (!use_cmse)
> +{
> +  *no_add_attrs = true;
> +  return NULL_TREE;
> +}
>
> Do you also want to warn the user here that the attribute will be
> ignored?
> This looks ok to me otherwise.
>
 Can easily do and might be more user friendly. How about
 " attribute ignored without -mcmse option."
>>> Yes, that's fine (without the full stop at the end)
>>> Kyrill
>>>
 Cheers,
 Andre

>> Hi,
>>
>> Reworked comments. No change to ChangeLogs.
> 
> Ok.
> Thanks,
> Kyrill
> 
>> Cheers,
>> Andre
> 
Hi,

Backported this to the embedded-6-branch in revision r243248.

Cheers,
Andre

gcc/ChangeLog.arm:
2016-12-05  Andre Vieira  

Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  

* config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New.
(arm_attribute_table): Added cmse_nonsecure_entry
(arm_compute_func_type): Handle cmse_nonsecure_entry.
(cmse_func_args_or_return_in_stack): New.
(arm_handle_cmse_nonsecure_entry): New.
* config/arm/arm.h (ARM_FT_CMSE_ENTRY): New macro define.
(IS_CMSE_ENTRY): Likewise.
* doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute.

gcc/testsuite/ChangeLog.arm:
2016-12-05  Andre Vieira  

Backport from mainline
2016-12-02  Andre Vieira  
Thomas Preud'homme  
diff --git a/gcc/ChangeLog.arm b/gcc/ChangeLog.arm
index 
98704eb438dadd73cf793da5a7b8266b5e9ef267..c93007a6b814320f3a3fb283873e21347b4cd333
 100644
--- a/gcc/ChangeLog.arm
+++ b/gcc/ChangeLog.arm
@@ -4,6 +4,21 @@
2016-12-02  Andre Vieira  
Thomas Preud'homme  
 
+   * config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New.
+   (arm_attribute_table): Added cmse_nonsecure_entry
+   (arm_compute_func_type): Handle cmse_nonsecure_entry.
+   (cmse_func_args_or_return_in_stack): New.
+   (arm_handle_cmse_nonsecure_entry): New.
+   * config/arm/arm.h (ARM_FT_CMSE_ENTRY): New macro define.
+   (IS_CMSE_ENTRY): Likewise.
+   * doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute.
+
+2016-12-05  Andre Vieira  
+
+   Backport from mainline
+   2016-12-02  Andre Vieira  
+   Thomas Preud'homme  
+
* config.gcc (extra_headers): Added arm_cmse.h.
* config/arm/arm-arches.def (ARM_ARCH):
(armv8-m): Add FL2_CMSE.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 
de9ad3e6a2df5103519ec16fcecdac8861a1cdfc..4e5e477bd2ba4eaa30640d0fdb4336b56cb37391
 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1383,6 +1383,7 @@ enum reg_class
 #define ARM_FT_VOLATILE(1 << 4) /* Does not return.  */
 #define ARM_FT_NESTED  (1 << 5) /* Embedded inside another func.  */
 #define ARM_FT_STACKALIGN  (1 << 6) /* Called with misaligned stack.  */
+#define ARM_FT_CMSE_ENTRY  (1 << 7) /* ARMv8-M non-secure entry function.  
*/
 
 /* Some macros to test these flags.  */
 #define ARM_FUNC_TYPE(t)   (t & ARM_FT_TYPE_MASK)
@@ -1391,6 +1392,7 @@ enum reg_class
 #define IS_NAKED(t)(t & ARM_FT_NAKED)
 #define IS_NESTED(t)   (t & ARM_FT_NESTED)
 #define IS_STACKALIGN(t)   (t & ARM_FT_STACKALIGN)
+#define IS_CMSE_ENTRY(t)   (t & ARM_FT_CMSE_ENTRY)
 
 
 /* Structure used to hold the function stack frame layout.  Offsets are
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 
7050f4897ddd9886d6c5377ca9c3e2764e2dff25..6eafba774542fb4b20f7b72fd353621a54ca5bc6
 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -136,6 +136,7 @@ static tree arm_handle_isr_attribute (tree *, tree, tree, 
int, bool *);
 #if TARGET_DLLIMPORT_DECL_ATTRIBUTES
 static tree arm_handle_notshared_attribute (tree *, tree, tree, int, bool *);
 #endif
+static tree arm_handle_cmse_nonsecure_entry (tree *, tree, tree, int, bool *);
 static void arm_output_function_epilogue (FILE *, HOST_WIDE_INT);
 static void arm_output_function_prologue (FILE *, HOST_WIDE_INT);
 static int arm_comp_type_attributes (const_tree, const_tree);
@@ -348,6 +349,9 @@ static const struct attribute_spec arm_attribute_table[] =
   { "notshared",0, 0, false, true, false, arm_handle_notshared_attribute,
 false },
 #endif
+  /* ARMv8-M Security Extensions support.  */
+  { "cmse_nonsecure_entry", 0, 0, true, false, false,
+arm_handle_cmse_nonsecure_entry, false },
   { NULL,  

[arm-embedded][committed][PATCH 1/7] Add support for ARMv8-M's Secure Extensions flag and intrinsics

[Andre Vieira (lists)]

On 27/10/16 11:01, Kyrill Tkachov wrote:
> 
> On 27/10/16 10:53, Andre Vieira (lists) wrote:
>> On 26/10/16 14:00, Kyrill Tkachov wrote:
>>> On 26/10/16 10:12, Kyrill Tkachov wrote:
 Hi Andre, thanks for resending them.

 On 25/10/16 17:26, Andre Vieira (lists) wrote:
> On 24/08/16 12:00, Andre Vieira (lists) wrote:
>> On 25/07/16 14:19, Andre Vieira (lists) wrote:
>>> This patch adds the support of the '-mcmse' option to enable
>>> ARMv8-M's
>>> Security Extensions and supports the following intrinsics:
>>> cmse_TT
>>> cmse_TT_fptr
>>> cmse_TTT
>>> cmse_TTT_fptr
>>> cmse_TTA
>>> cmse_TTA_fptr
>>> cmse_TTAT
>>> cmse_TTAT_fptr
>>> cmse_check_address_range
>>> cmse_check_pointed_object
>>> cmse_is_nsfptr
>>> cmse_nsfptr_create
>>>
>>> It also defines the mandatory cmse_address_info struct and the
>>> __ARM_FEATURE_CMSE macro.
>>> See Chapter 4, Sections 5.2, 5.3 and 5.6 of ARM®v8-M Security
>>> Extensions: Requirements on Development Tools
>>> (http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html).
>>>
>>>
>>>
>>> *** gcc/ChangeLog ***
>>> 2016-07-25  Andre Vieira 
>>>   Thomas Preud'homme 
>>>
>>>   * config.gcc (extra_headers): Added arm_cmse.h.
>>>   * config/arm/arm-arches.def (ARM_ARCH):
>>>   (armv8-m): Add FL2_CMSE.
>>>   (armv8-m.main): Likewise.
>>>   (armv8-m.main+dsp): Likewise.
>>>   * config/arm/arm-c.c
>>>   (arm_cpu_builtins): Added __ARM_FEATURE_CMSE macro.
>>>   * config/arm/arm-protos.h
>>>   (arm_is_constant_pool_ref): Define FL2_CMSE.
>>>   * config/arm.c (arm_arch_cmse): New.
>>>   (arm_option_override): New error for unsupported cmse
>>> target.
>>>   * config/arm/arm.h (arm_arch_cmse): New.
>>>   * config/arm/arm.opt (mcmse): New.
>>>   * doc/invoke.texi (ARM Options): Add -mcmse.
>>>   * config/arm/arm_cmse.h: New file.
>>>
>>> *** libgcc/ChangeLog ***
>>> 2016-07-25  Andre Vieira 
>>>   Thomas Preud'homme 
>>>
>>>   * config/arm/cmse.c: Likewise.
>>>   * config/arm/t-arm (HAVE_CMSE): New.
>>>
>>> *** gcc/testsuite/ChangeLog ***
>>> 2016-07-25  Andre Vieira 
>>>   Thomas Preud'homme 
>>>
>>>   * gcc.target/arm/cmse/cmse.exp: New.
>>>   * gcc.target/arm/cmse/cmse-1.c: New.
>>>   * gcc.target/arm/cmse/cmse-12.c: New.
>>>   * lib/target-supports.exp
>>>   (check_effective_target_arm_cmse_ok): New.
>>>
>>> Just remembered, new effective target checks should be documented in
>>> sourcebuild.texi
>>> Kyrill
>>>
>> Added more documentation as requested.
>>
>> This patch adds the support of the '-mcmse' option to enable
>> ARMv8-M's
>> Security Extensions and supports the following intrinsics:
>> cmse_TT
>> cmse_TT_fptr
>> cmse_TTT
>> cmse_TTT_fptr
>> cmse_TTA
>> cmse_TTA_fptr
>> cmse_TTAT
>> cmse_TTAT_fptr
>> cmse_check_address_range
>> cmse_check_pointed_object
>> cmse_is_nsfptr
>> cmse_nsfptr_create
>>
>> It also defines the mandatory cmse_address_info struct and the
>> __ARM_FEATURE_CMSE macro.
>> See Chapter 4, Sections 5.2, 5.3 and 5.6 of ARM®v8-M Security
>> Extensions: Requirements on Development Tools
>> (http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html).
>>
>>
>>
>> *** gcc/ChangeLog ***
>> 2016-07-xx  Andre Vieira 
>>   Thomas Preud'homme 
>>
>>   * config.gcc (extra_headers): Added arm_cmse.h.
>>   * config/arm/arm-arches.def (ARM_ARCH):
>>   (armv8-m): Add FL2_CMSE.
>>   (armv8-m.main): Likewise.
>>   (armv8-m.main+dsp): Likewise.
>>   * config/arm/arm-c.c
>>   (arm_cpu_builtins): Added __ARM_FEATURE_CMSE macro.
>>   * config/arm/arm-protos.h
>>   (arm_is_constant_pool_ref): Define FL2_CMSE.
>>   * config/arm.c (arm_arch_cmse): New.
>>   (arm_option_override): New error for unsupported cmse
>> target.
>>   * config/arm/arm.h (arm_arch_cmse): New.
>>   * config/arm/arm.opt (mcmse): New.
>>   * doc/invoke.texi (ARM Options): Add -mcmse.
>>   * doc/extend.texi (ARM ARMv8-M Security Extensions): Add
>> section.
>>   * config/arm/arm_cmse.h: New file.
>>
>> *** libgcc/ChangeLog ***
>> 2016-07-xx  Andre Vieira 
>>   Thomas Preud'homme 
>>   * config/arm/cmse.c: Likewise.
>>   * config/arm/t-arm (HAVE_CMSE): New.
>>
>>
>> *** gcc/testsuite/ChangeLog ***
>> 2016-07-xx  Andre Vieira 
>>

Re: [PATCH] [AArch64] Fix PR71112

[Kyrill Tkachov]

[CC'ing James]

On 23/11/16 05:25, Hurugalawadi, Naveen wrote:

Hi,

Please find attached the patch that fixes PR71112.

The current implementation that handles SYMBOL_SMALL_GOT_28K in
aarch64_load_symref_appropriately access the high part of RTX for Big-Endian
mode which results in ICE for ILP32.

The attached patch modifies it by accessing the lower part for both Endian
and fixes the issue.

Please review the patch and let me know if its okay?


This looks ok to me as I had independently come up with an identical patch for 
it.
But I can't approve.

Thanks,
Kyrill



2016-11-23  Andrew PInski  

gcc
* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
Access the lower part of RTX appropriately.

gcc/testsuite
* gcc.target/aarch64/pr71112.c : New Testcase.

RE: [PATCH 2/4] [ARC] Cleanup implementation.

[Claudiu Zissulescu]

Hi,

> > * config/arc/arc.md (ls_gd_load): Remove.
> > (tls_gd_dispatch): Likewise.
> 
> I don't see the connection between these two parts?  Plus it would be
> nice to have some more words _somewhere_ for why these are being
> removed.  The commit message is probably the right place I'd have
> thought.
> 
> But assuming your reason for removing the patterns is solid this patch
> looks fine.  You should commit with an extended description.

The two patterns in question are not used by our backend. I've updated the 
message like: Remove unused pattern. 

Patch committed, thank you for your review, 
Claudiu
 

RE: [PATCH][ARC] Fix PIE.

[Claudiu Zissulescu]

>  gcc/config.gcc   |  2 +-
>  gcc/config/arc/arc.h | 10 --
>  libgcc/config.host   |  4 ++--
>  libgcc/config/arc/crti.S |  2 ++

Approved and committed, thank you for your contribution,
Claudiu

[Ada] Do not enable atomic primitives on Power/Darwin 32-bit

[Eric Botcazou]

Iain Sandoe privately reported that the overhaul of the system files had 
broken the Ada compiler on Power/Darwin 32-bit.  Applied on the mainline.


2016-12-05  Eric Botcazou  

* system-darwin-ppc.ads (Support_Atomic_Primitives): Set to True only
if the word size is 64.

-- 
Eric BotcazouIndex: system-darwin-ppc.ads
===
--- system-darwin-ppc.ads	(revision 243172)
+++ system-darwin-ppc.ads	(working copy)
@@ -161,7 +161,7 @@ private
Stack_Check_Probes: constant Boolean := False;
Stack_Check_Limits: constant Boolean := False;
Support_Aggregates: constant Boolean := True;
-   Support_Atomic_Primitives : constant Boolean := True;
+   Support_Atomic_Primitives : constant Boolean := Word_Size = 64;
Support_Composite_Assign  : constant Boolean := True;
Support_Composite_Compare : constant Boolean := True;
Support_Long_Shifts   : constant Boolean := True;

[ARM][PATCH] Fix failing poly64 tests on ARM

[Tamar Christina]

Hi All,

This patch fixes test failures on arm-none-eabi.
Poly64 was being used by files that were not supposed
to be testing poly64 types.

I have added a new MACRO that must be defined in addition
to having CRYPTO available before use of Poly64 types are
allowed in the header arm-neon-ref.h.

Ok for trunk?

gcc/testsuite/
2016-12-01  Tamar Christina  

* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h: Gate use of 
Poly64 on USE_CRYPTO_TYPES.
* gcc.target/aarch64/advsimd-intrinsics/p64_p128.c: Define 
USE_CRYPTO_TYPES.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: Likewise.
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
index beaf6ac31d5c5affe3702a505ad0df8679229e32..8ed76c5c6f0adef4f5c123add1043eed1122ce84 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
@@ -40,6 +40,10 @@ extern size_t strlen(const char *);
 #define AARCH64_ONLY(X)
 #endif
 
+#if defined (USE_POLY_TYPES) && defined (__ARM_FEATURE_CRYPTO)
+#define USE_CRYPTO_TYPES 1
+#endif
+
 #define xSTR(X) #X
 #define STR(X) xSTR(X)
 
@@ -99,7 +103,7 @@ extern size_t strlen(const char *);
 fprintf(stderr, "CHECKED %s %s\n", STR(VECT_TYPE(T, W, N)), MSG);	\
   }
 
-#if defined (__ARM_FEATURE_CRYPTO)
+#if defined (USE_CRYPTO_TYPES)
 #define CHECK_CRYPTO(MSG,T,W,N,FMT,EXPECTED,COMMENT) \
 	   CHECK(MSG,T,W,N,FMT,EXPECTED,COMMENT)
 #else
@@ -155,7 +159,7 @@ static ARRAY(result, uint, 32, 2);
 static ARRAY(result, uint, 64, 1);
 static ARRAY(result, poly, 8, 8);
 static ARRAY(result, poly, 16, 4);
-#if defined (__ARM_FEATURE_CRYPTO)
+#if defined (USE_CRYPTO_TYPES)
 static ARRAY(result, poly, 64, 1);
 #endif
 #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
@@ -175,7 +179,7 @@ static ARRAY(result, uint, 32, 4);
 static ARRAY(result, uint, 64, 2);
 static ARRAY(result, poly, 8, 16);
 static ARRAY(result, poly, 16, 8);
-#if defined (__ARM_FEATURE_CRYPTO)
+#if defined (USE_CRYPTO_TYPES)
 static ARRAY(result, poly, 64, 2);
 #endif
 #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
@@ -198,7 +202,7 @@ extern ARRAY(expected, uint, 32, 2);
 extern ARRAY(expected, uint, 64, 1);
 extern ARRAY(expected, poly, 8, 8);
 extern ARRAY(expected, poly, 16, 4);
-#if defined (__ARM_FEATURE_CRYPTO)
+#if defined (USE_CRYPTO_TYPES)
 extern ARRAY(expected, poly, 64, 1);
 #endif
 extern ARRAY(expected, hfloat, 16, 4);
@@ -214,7 +218,7 @@ extern ARRAY(expected, uint, 32, 4);
 extern ARRAY(expected, uint, 64, 2);
 extern ARRAY(expected, poly, 8, 16);
 extern ARRAY(expected, poly, 16, 8);
-#if defined (__ARM_FEATURE_CRYPTO)
+#if defined (USE_CRYPTO_TYPES)
 extern ARRAY(expected, poly, 64, 2);
 #endif
 extern ARRAY(expected, hfloat, 16, 8);
@@ -420,7 +424,7 @@ static void clean_results (void)
   CLEAN(result, uint, 64, 1);
   CLEAN(result, poly, 8, 8);
   CLEAN(result, poly, 16, 4);
-#if defined (__ARM_FEATURE_CRYPTO)
+#if defined (USE_CRYPTO_TYPES)
   CLEAN(result, poly, 64, 1);
 #endif
 #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
@@ -438,7 +442,7 @@ static void clean_results (void)
   CLEAN(result, uint, 64, 2);
   CLEAN(result, poly, 8, 16);
   CLEAN(result, poly, 16, 8);
-#if defined (__ARM_FEATURE_CRYPTO)
+#if defined (USE_CRYPTO_TYPES)
   CLEAN(result, poly, 64, 2);
 #endif
 #if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
@@ -466,7 +470,7 @@ static void clean_results (void)
 #define DECL_VARIABLE(VAR, T1, W, N)		\
   VECT_TYPE(T1, W, N) VECT_VAR(VAR, T1, W, N)
 
-#if defined (__ARM_FEATURE_CRYPTO)
+#if defined (USE_CRYPTO_TYPES)
 #define DECL_VARIABLE_CRYPTO(VAR, T1, W, N) \
   DECL_VARIABLE(VAR, T1, W, N)
 #else
@@ -570,7 +574,7 @@ static void clean_results (void)
 
 /* Helpers to call macros with 1 constant and 5 variable
arguments.  */
-#if defined (__ARM_FEATURE_CRYPTO)
+#if defined (USE_CRYPTO_TYPES)
 #define MACRO_CRYPTO(MACRO, VAR1, VAR2, T1, T2, T3, W, N) \
   MACRO(VAR1, VAR2, T1, T2, T3, W, N)
 #else
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/p64_p128.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
index 8907b38cde90b44a8f1501f72b2c4e812cba5707..1b66a6a243ac5ea16cf1d05cb4f2853a5ed23e7d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/p64_p128.c
@@ -4,7 +4,7 @@
 /* { dg-require-effective-target arm_crypto_ok { target { arm*-*-* } } } */
 /* { dg-add-options arm_crypto } */
 /* { dg-additional-options "-march=armv8-a+crypto" { target { aarch64*-*-* } } }*/
-
+#define USE_POLY_TYPES 1
 #include 
 #include "arm-neon-ref.h"
 #include "compute-ref-data.h"
diff --git a/gcc/testsuite/gcc.targ

Re: [PATCH v3] Do not simplify "(and (reg) (const bit))" to if_then_else.

[Dominik Vogt]

On Mon, Dec 05, 2016 at 04:00:25AM -0600, Segher Boessenkool wrote:
> On Mon, Dec 05, 2016 at 10:22:13AM +0100, Dominik Vogt wrote:
> > On Sat, Dec 03, 2016 at 07:19:13PM -0600, Segher Boessenkool wrote:
> > > [ I did not see this patch before, sorry. ]
> > > 
> > > This causes the second half of PR78638.
> > > 
> > > On Thu, Dec 01, 2016 at 04:30:08PM +0100, Dominik Vogt wrote:
> > > > --- a/gcc/combine.c
> > > > +++ b/gcc/combine.c
> > > > @@ -5600,6 +5600,18 @@ combine_simplify_rtx (rtx x, machine_mode 
> > > > op0_mode, int in_dest,
> > > >  && OBJECT_P (SUBREG_REG (XEXP (x, 0)))
> > > >  {
> > > >rtx cond, true_rtx, false_rtx;
> > > > +  unsigned HOST_WIDE_INT nz;
> > > > +
> > > > +  /* If the operation is an AND wrapped in a SIGN_EXTEND or 
> > > > ZERO_EXTEND with
> > > > +either operand being just a constant single bit value, do 
> > > > nothing since
> > > > +IF_THEN_ELSE is likely to increase the expression's 
> > > > complexity.  */
> > > > +  if (HWI_COMPUTABLE_MODE_P (mode)
> > > > + && pow2p_hwi (nz = nonzero_bits (x, mode))
> > > > + && ! ((code == SIGN_EXTEND || code == ZERO_EXTEND)
> > > > +   && GET_CODE (XEXP (x, 0)) == AND
> > > > +   && CONST_INT_P (XEXP (XEXP (x, 0), 0))
> > > > +   && UINTVAL (XEXP (XEXP (x, 0), 0)) == nz))
> > > > + return x;
> > > 
> > > The code does not match the comment: the "!" should not be there.  How
> > > did it fix anything on s390 *with* that "!"?  That does not make much
> > > sense.
> > 
> > Sorry for breaking this.  With the constant changes in the
> > patterns this is supposed to fix it seems I've lost track of the
> > status quo.  I'll check what went wrong with the patch; in the
> > mean time Andreas will revert this, or if it's urgent, feel free
> > to do that yourself.
> 
> I have tested that removing that ! cures all regressions.  I do not
> know if it still fixes what this patch intended to fix, of course.

S390[x] has these complicated patterns for the risbg instruction,
and there's some ongoing work on patterns for related instructions
(rosbg, rxsbg) which needed the patch discussed here - at least at
some point in time.  But the risbg patterns are breaking all over
the place because they are so sensitive to changes in combine.c
(and possibly other passes), and any change fixing the old
patterns may affect the new ones.  In other words:  At the moment
I have no clue whether the discussed patch is still good for
anythin on s390[x].

If there was a consensus that the patch discussed here, with the
"!" fix is useful in any case, that would simplify my current
work, but

1) I've done no testing with it (only with the broken version of
   the patch),
2) it may be just a chunk of dead code.

Ciao

Dominik ^_^  ^_^

-- 

Dominik Vogt
IBM Germany

Re: [AArch64] [PATCH] Fix failing poly tests AArch64

[James Greenhalgh]

On Mon, Dec 05, 2016 at 10:37:41AM +, Tamar Christina wrote:
> 
> Hi All,
> 
> This patch fixes test failures on aarch64-none-linux-gnu.
> Some vreinterpret intrinsics which are required for some of
> the tests to run were missing.
> 
> Bootstrapped and reg tested on aarch64-none-linux-gnu.
> 
> Ok for trunk?

OK.

Thanks,
James

> 
> gcc/
> 2016-12-01  Tamar Christina  
> 
>   * gcc/config/aarch64/arm_neon.h
>   (vreinterpretq_p8_p128, vreinterpretq_p16_p128): Added.
>   (vreinterpret_p64_p16, vreinterpretq_p64_p128): Likewise.
>   (vreinterpretq_p64_p16, vreinterpretq_p128_p8): Likewise.
>   (vreinterpretq_p128_p16, vreinterpretq_p128_f16): Likewise.
>   (vreinterpretq_p128_f32, vreinterpretq_p128_p64): Likewise.
>   (vreinterpretq_p128_s64, vreinterpretq_p128_u64): Likewise.
>   (vreinterpretq_p128_s8, vreinterpretq_p128_s16): Likewise.
>   (vreinterpretq_p128_s32, vreinterpretq_p128_u8): Likewise.
>   (vreinterpretq_p128_u16, vreinterpretq_p128_u32): Likewise.
>   (vreinterpretq_f16_p128, vreinterpretq_f32_p128): Likewise.
>   (vreinterpretq_s64_p128, vreinterpretq_u64_p128): Likewise.
>   (vreinterpretq_s8_p128, vreinterpretq_s16_p128): Likewise.
>   (vreinterpretq_s32_p128, vreinterpretq_u8_p128): Likewise.
>   (vreinterpretq_u16_p128, vreinterpretq_u32_p128): Likewise.

[AArch64] [PATCH] Fix failing poly tests AArch64

[Tamar Christina]

Hi All,

This patch fixes test failures on aarch64-none-linux-gnu.
Some vreinterpret intrinsics which are required for some of
the tests to run were missing.

Bootstrapped and reg tested on aarch64-none-linux-gnu.

Ok for trunk?

gcc/
2016-12-01  Tamar Christina  

* gcc/config/aarch64/arm_neon.h
(vreinterpretq_p8_p128, vreinterpretq_p16_p128): Added.
(vreinterpret_p64_p16, vreinterpretq_p64_p128): Likewise.
(vreinterpretq_p64_p16, vreinterpretq_p128_p8): Likewise.
(vreinterpretq_p128_p16, vreinterpretq_p128_f16): Likewise.
(vreinterpretq_p128_f32, vreinterpretq_p128_p64): Likewise.
(vreinterpretq_p128_s64, vreinterpretq_p128_u64): Likewise.
(vreinterpretq_p128_s8, vreinterpretq_p128_s16): Likewise.
(vreinterpretq_p128_s32, vreinterpretq_p128_u8): Likewise.
(vreinterpretq_p128_u16, vreinterpretq_p128_u32): Likewise.
(vreinterpretq_f16_p128, vreinterpretq_f32_p128): Likewise.
(vreinterpretq_s64_p128, vreinterpretq_u64_p128): Likewise.
(vreinterpretq_s8_p128, vreinterpretq_s16_p128): Likewise.
(vreinterpretq_s32_p128, vreinterpretq_u8_p128): Likewise.
(vreinterpretq_u16_p128, vreinterpretq_u32_p128): Likewise.diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index 7d4d2a25ab80ae2daa9c8f8f004b07d2a64111ad..b8466440d824f317b745d4b2c0e2df9bcac8c061 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -3506,6 +3506,13 @@ vreinterpretq_p8_p64 (poly64x2_t __a)
   return (poly8x16_t) __a;
 }
 
+__extension__ extern __inline poly8x16_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p8_p128 (poly128_t __a)
+{
+  return (poly8x16_t)__a;
+}
+
 __extension__ extern __inline poly16x4_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vreinterpret_p16_f16 (float16x4_t __a)
@@ -3688,6 +3695,13 @@ vreinterpretq_p16_p64 (poly64x2_t __a)
   return (poly16x8_t) __a;
 }
 
+__extension__ extern __inline poly16x8_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p16_p128 (poly128_t __a)
+{
+  return (poly16x8_t)__a;
+}
+
 __extension__ extern __inline poly64x1_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vreinterpret_p64_f16 (float16x4_t __a)
@@ -3772,6 +3786,13 @@ vreinterpret_p64_p8 (poly8x8_t __a)
   return (poly64x1_t) __a;
 }
 
+__extension__ extern __inline poly64x1_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpret_p64_p16 (poly16x4_t __a)
+{
+  return (poly64x1_t)__a;
+}
+
 __extension__ extern __inline poly64x2_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vreinterpretq_p64_f64 (float64x2_t __a)
@@ -3823,6 +3844,13 @@ vreinterpretq_p64_f32 (float32x4_t __a)
 
 __extension__ extern __inline poly64x2_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p64_p128 (poly128_t __a)
+{
+  return (poly64x2_t)__a;
+}
+
+__extension__ extern __inline poly64x2_t
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vreinterpretq_p64_u8 (uint8x16_t __a)
 {
   return (poly64x2_t) __a;
@@ -3836,6 +3864,13 @@ vreinterpretq_p64_u16 (uint16x8_t __a)
 }
 
 __extension__ extern __inline poly64x2_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p64_p16 (poly16x8_t __a)
+{
+  return (poly64x2_t)__a;
+}
+
+__extension__ extern __inline poly64x2_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
 vreinterpretq_p64_u32 (uint32x4_t __a)
 {
@@ -3856,6 +3891,97 @@ vreinterpretq_p64_p8 (poly8x16_t __a)
   return (poly64x2_t) __a;
 }
 
+__extension__ extern __inline poly128_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p128_p8 (poly8x16_t __a)
+{
+  return (poly128_t)__a;
+}
+
+__extension__ extern __inline poly128_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p128_p16 (poly16x8_t __a)
+{
+  return (poly128_t)__a;
+}
+
+__extension__ extern __inline poly128_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p128_f16 (float16x8_t __a)
+{
+  return (poly128_t) __a;
+}
+
+__extension__ extern __inline poly128_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p128_f32 (float32x4_t __a)
+{
+  return (poly128_t)__a;
+}
+
+__extension__ extern __inline poly128_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p128_p64 (poly64x2_t __a)
+{
+  return (poly128_t)__a;
+}
+
+__extension__ extern __inline poly128_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p128_s64 (int64x2_t __a)
+{
+  return (poly128_t)__a;
+}
+
+__extension__ extern __inline poly128_t
+__attribute__  ((__always_inline__, __gnu_inline__, __artificial__))
+vreinterpretq_p128_u64 (uint64x2_t __a)
+{
+  return