Re: [v3 PATCH] Reduce the size of variant, it doesn't need an index of type size_t internally.

[Tim Shen via gcc-patches]

On Tue, Jan 10, 2017 at 2:19 PM, Ville Voutilainen
 wrote:
> Cleanups based on review; there's no longer any public typedefs added
> to variant,
> and the test is greatly simpler with much less trickery.

Looks good to me.

Thanks!


-- 
Regards,
Tim Shen

[PATCH v2] Offer suggestions for unrecognized sanitizer options (PR driver/78877)

[David Malcolm]

On Tue, 2017-01-10 at 20:49 +0100, Jakub Jelinek wrote:
> On Tue, Jan 10, 2017 at 03:02:49PM -0500, David Malcolm wrote:
> > +/* Given ARG, an unrecognized sanitizer option, return the best
> > +   matching sanitizer option, or NULL if there isn't one.  */
> > +
> > +static const char *
> > +get_closest_sanitizer_option (const string_fragment )
> > +{
> > +  best_match  bm (arg);
> > +  for (int i = 0; sanitizer_opts[i].name != NULL; ++i)
> > +bm.consider (sanitizer_opts[i].name);
> > +  return bm.get_best_meaningful_candidate ();
> 
> I think we shouldn't suggest invalid option combinations, so that
> means
> passing code to get_closest_sanitizer_option (so that we know if it
> is
> OPT_fsanitize_ or OPT_fsanitize_recover_) and a bool whether it is
> the -fno-sanitize* or -fsanitize* (value).  Then we shouldn't add to
> bm.consider:
> 1) for -fsanitize= (and not -fno-sanitize=) the "all" option
>(sanitizer_opts[i].flag == ~0U && code == OPT_fsanitize_ && value
>is a cheap test for that case)
> 2) for -fsanitize-recover= (and not -fno-sanitize-recover=) the
>non-recoverable options
>(!sanitizer_opts[i].can_recover && code == OPT_fsanitize_recover_
> && value)
> Otherwise it looks good to me.
> 
>   Jakub

Thanks.

Here's a v2 of the patch which I believe adds the conditions you
suggest (and new test cases for them).

Successfully bootstrapped on x86_64-pc-linux-gnu.

OK for trunk?

gcc/ChangeLog:
PR driver/78877
* opts.c: Include "spellcheck.h"
(struct string_fragment): New struct.
(struct edit_distance_traits): New
struct.
(get_closest_sanitizer_option): New function.
(parse_sanitizer_options): Offer suggestions for unrecognized arguments.

gcc/testsuite/ChangeLog:
PR driver/78877
* gcc.dg/spellcheck-options-14.c: New test case.
* gcc.dg/spellcheck-options-15.c: New test case.
* gcc.dg/spellcheck-options-16.c: New test case.
---
 gcc/opts.c   | 74 +++-
 gcc/testsuite/gcc.dg/spellcheck-options-14.c |  8 +++
 gcc/testsuite/gcc.dg/spellcheck-options-15.c |  7 +++
 gcc/testsuite/gcc.dg/spellcheck-options-16.c |  9 
 4 files changed, 96 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/spellcheck-options-14.c
 create mode 100644 gcc/testsuite/gcc.dg/spellcheck-options-15.c
 create mode 100644 gcc/testsuite/gcc.dg/spellcheck-options-16.c

diff --git a/gcc/opts.c b/gcc/opts.c
index 059a61a..c4e3bbd 100644
--- a/gcc/opts.c
+++ b/gcc/opts.c
@@ -30,6 +30,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "opts-diagnostic.h"
 #include "insn-attr-common.h"
 #include "common/common-target.h"
+#include "spellcheck.h"
 
 static void set_Wstrict_aliasing (struct gcc_options *opts, int onoff);
 
@@ -1511,6 +1512,62 @@ const struct sanitizer_opts_s sanitizer_opts[] =
   { NULL, 0U, 0UL, false }
 };
 
+/* A struct for describing a run of chars within a string.  */
+
+struct string_fragment
+{
+  string_fragment (const char *start, size_t len)
+  : m_start (start), m_len (len) {}
+
+  const char *m_start;
+  size_t m_len;
+};
+
+/* Specialization of edit_distance_traits for string_fragment,
+   for use by get_closest_sanitizer_option.  */
+
+template <>
+struct edit_distance_traits
+{
+  static size_t get_length (const string_fragment )
+  {
+return fragment.m_len;
+  }
+
+  static const char *get_string (const string_fragment )
+  {
+return fragment.m_start;
+  }
+};
+
+/* Given ARG, an unrecognized sanitizer option, return the best
+   matching sanitizer option, or NULL if there isn't one.
+   CODE is OPT_fsanitize_ or OPT_fsanitize_recover_.
+   VALUE is non-zero for the regular form of the option, zero
+   for the "no-" form (e.g. "-fno-sanitize-recover=").  */
+
+static const char *
+get_closest_sanitizer_option (const string_fragment ,
+ enum opt_code code, int value)
+{
+  best_match  bm (arg);
+  for (int i = 0; sanitizer_opts[i].name != NULL; ++i)
+{
+  /* -fsanitize=all is not valid, so don't offer it.  */
+  if (sanitizer_opts[i].flag == ~0U && code == OPT_fsanitize_ && value)
+   continue;
+
+  /* For -fsanitize-recover= (and not -fno-sanitize-recover=),
+don't offer the non-recoverable options.  */
+  if (!sanitizer_opts[i].can_recover && code == OPT_fsanitize_recover_
+ && value)
+   continue;
+
+  bm.consider (sanitizer_opts[i].name);
+}
+  return bm.get_best_meaningful_candidate ();
+}
+
 /* Parse comma separated sanitizer suboptions from P for option SCODE,
adjust previous FLAGS and return new ones.  If COMPLAIN is false,
don't issue diagnostics.  */
@@ -1572,8 +1629,21 @@ parse_sanitizer_options (const char *p, location_t loc, 
int scode,
  }
 
   if (! found && complain)
-   error_at (loc, "unrecognized argument to -fsanitize%s= option: %q.*s",
- code == OPT_fsanitize_ ? "" : 

Re: [patch mips/gcc] add build-time and runtime options to disable or set madd.fmt type

[Sandra Loosemore]

On 01/10/2017 07:24 AM, Yunqiang Su wrote:

Hi, folks, any idea about this patch?


I can only comment on the documentation parts.


diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index b911d76dd66..e548733537d 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -1338,6 +1338,23 @@ In the absence of this configuration option the default 
convention is
the legacy encoding, as when neither of the @option{-mnan=2008} and
@option{-mnan=legacy} command-line options has been used.

+@item --with-madd4=@var{type}
+On MIPS targets, set the default behaivor of madd.fmt/msub.fmt. The


s/behaivor/behavior/

Are you really setting/describing the behavior of these instructions on 
the target, or are you setting how GCC generates code for them?



+possibilities for @var{type} are:
+@table @code
+@item unfused
+The madd.fmt/msub.fmt instructions are unfused, as with the
+@option{-mmadd4=unfused} command-line option.
+@item fused
+The madd.fmt/msub.fmt instructions are fused, as with the
+@option{-mmadd4=fused} command-line option.
+@item no
+The madd.fmt/msub.fmt are disabled, as with the @option{-mmadd4=no}


s/are/instructions are/

+command-line option.
+@end table
+In the absence of this configuration option the default convention is
+the unfused, while for MIPS r6 and Loongson, the default is fused.


s/the unfused/@samp{unfused}
s/fused/@samp{fused}

The MIPS maintainers may correct me on this, but it looks to me like 
"MIPS r6" is not an official name of anything.  I see "MIPS Release 6" 
on the Imagination web site and in the MIPS processor documentation.


Finally, I'm confused about whether the default is based on the 
processor selected at compile time, or depends on some other 
configure-time option.



diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 1096254085f..e88040cdceb 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -19289,6 +19289,29 @@ their trailing significand field being 0.
The default is @option{-mnan=legacy} unless GCC has been configured with
@option{--with-nan=2008}.

+@item -mmadd4=unfused
+@item -mmadd4=fused
+@item -mmadd4=no


Use @itemx instead of @item for entries other than the first.


+@opindex mmadd4=unfused
+@opindex mmadd4=fused
+@opindex mmadd4=no


I think it's sufficient to just have a single index entry

@opindex mmadd4=


+These options control the type of madd.fmt/msub.fmt, unfused, fused
+or disabled at all.


"type of" is confusing.  Maybe just say

These options control generation of madd.fmt/msub.fmt instructions.


+
+The @option{-mmadd4=unfused} option will set type of madd.fmt/msub.fmt


Same concerns about "type of" here, plus
s/will set/sets/


+to be unfused if they are generated.
+
+The @option{-mmadd4=fused} option will set type of madd.fmt/msub.fmt
+to be fused if they are generated.


Same here.


+
+The @option{-mmadd4=no} option will disable madd.fmt/msub.fmt
+to be generated at all.


s/will disable/prevents/
s/to be generated/from being generated/



+
+The default is @option{-mmadd4=unfused} unless GCC has been configured
+for MIPS r6+ or Loongson. If runtime flags for MIPS r6 or Loongson is
+given, the type will always be `fused', no matter what value
+@option{-mmadd4=} is.
+


Same concerns about "MIPS r6".

I suggest rewriting the second sentence as something like

"If compiling for a MIPS Release 6 or Loongson processor, this option is 
ignored and the behavior is as if @samp{fused} were specified."


I think we are talking about controlling code generation determined by 
compilation options, and not detecting runtime processor flag bits, right?


-Sandra

Re: [patch] Fix wrong code for return of small aggregates on big-endian

[Eric Botcazou]

> I have noticed new failures after this commit (r244249).
> g++.dg/opt/call3.C fails at execution on armeb targets
> g++.dg/opt/call2.C fails at execution on aarch64_be

It turns out that there is already a big-endian adjustment a few lines above:

  /* If the value has a record type and an integral mode then, if BITSIZE
 is narrower than this mode and this is for big-endian data, we must
first put the value into the low-order bits.  Moreover, the field may
 be not aligned on a byte boundary; in this case, if it has reverse
storage order, it needs to be accessed as a scalar field with reverse
 storage order and we must first put the value into target order.  */
  if (TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE
  && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT)
{
  HOST_WIDE_INT size = GET_MODE_BITSIZE (GET_MODE (temp));

  reverse = TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp));

  if (reverse)
temp = flip_storage_order (GET_MODE (temp), temp);

  if (bitsize < size
  && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
 size - bitsize, NULL_RTX, 1);
}

and adding the extraction leads to a double adjustment on armeb, whereas no 
adjustment is still applied to aarch64_be...

That's why the attached patch merges the second adjustment in the first one by 
moving up the code fetching the return value from the registers; this ensures 
that only one adjustment is ever applied and that it is applied only on left- 
justified values.  But a final extraction (without big-endian adjustment) is 
still needed for small BLKmode values, otherwise store_bit_field aborts...

Tested on the same platforms as the original patch, applied as obvious.


* expr.c (store_field): In the bitfield case, fetch the return value
from the registers before applying a single big-endian adjustment.
Always do a final load for a BLKmode value not larger than a word.

-- 
Eric BotcazouIndex: expr.c
===
--- expr.c	(revision 244258)
+++ expr.c	(working copy)
@@ -6832,13 +6832,36 @@ store_field (rtx target, HOST_WIDE_INT b
 
   temp = expand_normal (exp);
 
-  /* If the value has a record type and an integral mode then, if BITSIZE
-	 is narrower than this mode and this is for big-endian data, we must
-	 first put the value into the low-order bits.  Moreover, the field may
-	 be not aligned on a byte boundary; in this case, if it has reverse
-	 storage order, it needs to be accessed as a scalar field with reverse
-	 storage order and we must first put the value into target order.  */
-  if (TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE
+  /* Handle calls that return values in multiple non-contiguous locations.
+	 The Irix 6 ABI has examples of this.  */
+  if (GET_CODE (temp) == PARALLEL)
+	{
+	  HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
+	  machine_mode temp_mode
+	= smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
+	  rtx temp_target = gen_reg_rtx (temp_mode);
+	  emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
+	  temp = temp_target;
+	}
+
+  /* Handle calls that return BLKmode values in registers.  */
+  else if (mode == BLKmode && REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
+	{
+	  rtx temp_target = gen_reg_rtx (GET_MODE (temp));
+	  copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
+	  temp = temp_target;
+	}
+
+  /* If the value has aggregate type and an integral mode then, if BITSIZE
+	 is narrower than this mode and this is for big-endian data, we first
+	 need to put the value into the low-order bits for store_bit_field,
+	 except when MODE is BLKmode and BITSIZE larger than the word size
+	 (see the handling of fields larger than a word in store_bit_field).
+	 Moreover, the field may be not aligned on a byte boundary; in this
+	 case, if it has reverse storage order, it needs to be accessed as a
+	 scalar field with reverse storage order and we must first put the
+	 value into target order.  */
+  if (AGGREGATE_TYPE_P (TREE_TYPE (exp))
 	  && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT)
 	{
 	  HOST_WIDE_INT size = GET_MODE_BITSIZE (GET_MODE (temp));
@@ -6849,7 +6872,8 @@ store_field (rtx target, HOST_WIDE_INT b
 	temp = flip_storage_order (GET_MODE (temp), temp);
 
 	  if (bitsize < size
-	  && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
+	  && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN
+	  && !(mode == BLKmode && bitsize > BITS_PER_WORD))
 	temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
  size - bitsize, NULL_RTX, 1);
 	}
@@ -6859,12 +6883,10 @@ store_field (rtx target, HOST_WIDE_INT b
 	  && mode != TYPE_MODE (TREE_TYPE (exp)))
 	temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
 

Re: [PATCH 9a] Add "__RTL" to C frontend

[Joseph Myers]

On Mon, 9 Jan 2017, David Malcolm wrote:

> This part of the patch adds the ability to tag a function with
> "__RTL", analogous to the "__GIMPLE" tag.
> 
> gcc/c-family/ChangeLog:
>   * c-common.c (c_common_reswords): Add "__RTL".
>   * c-common.h (enum rid): Add RID_RTL.
> 
> gcc/c/ChangeLog:
>   * c-parser.c: Include "read-rtl-function.h" and
>   "run-rtl-passes.h".
>   (c_parser_declaration_or_fndef): Rename "gimple-pass-list" in
>   grammar to gimple-or-rtl-pass-list.  Add rtl-function-definition
>   production.  Update for renaming of field "gimple_pass" to
>   "gimple_or_rtl_pass".  If __RTL was seen, call
>   c_parser_parse_rtl_body.  Convert a timevar_push/pop pair
>   to an auto_timevar, to cope with early exit.
>   (c_parser_declspecs): Update RID_GIMPLE handling for renaming of
>   field "gimple_pass" to "gimple_or_rtl_pass", and for renaming of
>   c_parser_gimple_pass_list to c_parser_gimple_or_rtl_pass_list.
>   Handle RID_RTL.
>   (c_parser_parse_rtl_body): New function.
>   * c-tree.h (enum c_declspec_word): Add cdw_rtl.
>   (struct c_declspecs): Rename field "gimple_pass" to
>   "gimple_or_rtl_pass".  Add field "rtl_p".
>   * gimple-parser.c (c_parser_gimple_pass_list): Rename to...
>   (c_parser_gimple_or_rtl_pass_list): ...this, updating accordingly.
>   * gimple-parser.h (c_parser_gimple_pass_list): Rename to...
>   (c_parser_gimple_or_rtl_pass_list): ...this.
> 
> gcc/ChangeLog:
>   * function.h (struct function): Update comment for field
>   "pass_startwith".

OK.

-- 
Joseph S. Myers
jos...@codesourcery.com

[PATCH] DOn't miscompile programs with -flto -fno-merge-constants (PR middle-end/50199)

[Jakub Jelinek]

Hi!

LTO partitioning can actually take appart uses of STRING_CSTs or other
constants and put those into multiple partitions.  When -fno-merge-constants
is in effect, it means those constants aren't merged by the linker and
e.g. following testcase fails.

I fail to see what -flto -fno-merge-constants would be good for,
-fno-merge-constants can be used to decrease link time, or when producing
assembly and parsing something in it, but both cases don't make much sense
with LTO.  So for now the patch just forces constant merging when in lto.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2017-01-10  Jakub Jelinek  

PR middle-end/50199
* lto-lang.c (lto_post_options): Force flag_merge_constants = 1
if it was 0.

* gcc.dg/lto/pr50199_0.c: New test.

--- gcc/lto/lto-lang.c.jj   2017-01-01 12:45:47.0 +0100
+++ gcc/lto/lto-lang.c  2017-01-10 14:37:20.158387918 +0100
@@ -857,6 +857,12 @@ lto_post_options (const char **pfilename
  support.  */
   flag_excess_precision_cmdline = EXCESS_PRECISION_FAST;
 
+  /* When partitioning, we can tear appart STRING_CSTs uses from the same
+ TU into multiple partitions.  Without constant merging the constants
+ might not be equal at runtime.  See PR50199.  */
+  if (!flag_merge_constants)
+flag_merge_constants = 1;
+
   /* Initialize the compiler back end.  */
   return false;
 }
--- gcc/testsuite/gcc.dg/lto/pr50199_0.c.jj 2017-01-10 14:44:06.276071432 
+0100
+++ gcc/testsuite/gcc.dg/lto/pr50199_0.c2017-01-10 14:43:49.0 
+0100
@@ -0,0 +1,17 @@
+/* PR middle-end/50199 */
+/* { dg-lto-options {{-O2 -flto -fno-merge-constants 
--param=lto-min-partition=1}} } */
+
+__attribute__ ((noinline)) const char *
+foo (const char *x)
+{
+  return x;
+}
+
+int
+main ()
+{
+  const char *a = "ab";
+  if (a != foo (a))
+__builtin_abort ();
+  return 0;
+}

Jakub

[committed] add C99 runtime requirement to a couple of tests

[Martin Sebor]

The three bugs below point test failures in a couple of the printf
tests due to them exercising C99 features not present in the default
runtime on the targets (the h and hh length modifiers on HP-UX 11.11
and the a format specifier in Newlib).  As suggested in PR 78959,
the attached patch committed in r244298 adds
the { dg-require-effective-target c99_runtime } directive to make
the tests conditional on support for those features.

Martin

PR testsuite/78960 - FAIL: gcc.dg/tree-ssa/builtin-sprintf.c execution test
PR testsuite/78959 - FAIL: gcc.c-torture/execute/pr78622.c
PR testsuite/78133 - Commit r241489 adds printf specifiers not supported by
newlib
ndex: gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf.c
===
--- gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf.c	(revision 244297)
+++ gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf.c	(revision 244298)
@@ -3,8 +3,10 @@
constant folding.  With optimization enabled the test will fail to
link if any of the assertions fails.  Without optimization the test
aborts at runtime if any of the assertions fails.  */
-/* { dg-do run } */
-/* { dg-additional-options "-O2 -Wall -Wno-pedantic -fprintf-return-value" } */
+/* { dg-do run }
+   The h and hh length modifiers are a C99 feature (see PR 78959).
+   { dg-require-effective-target c99_runtime }
+   { dg-additional-options "-O2 -Wall -Wno-pedantic -fprintf-return-value" } */
 
 #ifndef LINE
 #  define LINE   0
Index: gcc/testsuite/gcc.dg/tree-ssa/pr78622.c
===
--- gcc/testsuite/gcc.dg/tree-ssa/pr78622.c	(revision 244297)
+++ gcc/testsuite/gcc.dg/tree-ssa/pr78622.c	(revision 244298)
@@ -1,7 +1,9 @@
 /* PR middle-end/78622 - [7 Regression] -Wformat-length/-fprintf-return-value
incorrect with overflow/wrapping
{ dg-do compile }
-   { dg-options "-Wformat-length=2" } */
+   { dg-options "-Wformat-length=2" }
+   The h and hh length modifiers are a C99 feature (see PR 78959).
+   { dg-require-effective-target c99_runtime }  */
 
 char buf[1];
 

[PATCH] Fix as flags for -c xx.s -g0 -g (PR driver/49726)

[Jakub Jelinek]

Hi!

ASM_DEBUG_SPEC uses usually %{g:%{!g0:--gdwarf2}} or something similar.
In the past, it used to be %{g:--gdwarf2}.  Both have problems (and thus
this is also a regression).  The problem with the current ASM_DEBUG_SPEC
is that if one uses -g0 -g, which normally means that -g overrides -g0,
we still don't supply --gdwarf2 to as.  Also, there are many options
starting with -g, so if one just uses gcc -grecord-gcc-switches foo.s,
--gdwarf2 is passed to as too, even when gcc -grecord-gcc-switches foo.c
actually doesn't emit any debug info.  The problem with older
ASM_DEBUG_SPEC has been that even -g0 resulted in --gdwarf2 being passed
to as, or -g -g0 too.

The following patch fixes that by introducing a new spec function, which
compares debug_info_level against its argument (so in some other place
we could e.g. check if debug_info_level >= 3 and similar if needed).
To make this work, I had to mark all the -g* options with the Driver
flag, so that debug_info_level isn't computed just in the FEs, but also in
the driver.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2017-01-10  Jakub Jelinek  

PR driver/49726
* gcc.c (debug_level_greater_than_spec_func): New function.
(static_spec_functions): Add debug-level-gt spec function.
(ASM_DEBUG_SPEC, cpp_options): Use %:debug-level-gt(0) instead of
!g0.
* config/darwin.h (DSYMUTIL_SPEC, ASM_DEBUG_SPEC): Likewise.
* config/darwin9.h (DSYMUTIL_SPEC, ASM_DEBUG_SPEC): Likewise.
* common.opt (g, gcoff, gdwarf, gdwarf-, ggdb, gno-pubnames,
gpubnames, ggnu-pubnames, gno-record-gcc-switches,
grecord-gcc-switches, gno-strict-dwarf, gstrict-dwarf, gstabs,
gstabs+, gtoggle, gvms, gxcoff, gxcoff+): Add Driver flag.
c-family/
* c.opt (gen-decls): Add Driver flag.
ada/
* gcc-interface/lang.opt (gant, gnatO, gnat): Add Driver flag.

--- gcc/gcc.c.jj2017-01-10 10:42:52.0 +0100
+++ gcc/gcc.c   2017-01-10 12:55:52.847230312 +0100
@@ -402,6 +402,7 @@ static const char *compare_debug_auxbase
 static const char *pass_through_libs_spec_func (int, const char **);
 static const char *replace_extension_spec_func (int, const char **);
 static const char *greater_than_spec_func (int, const char **);
+static const char *debug_level_greater_than_spec_func (int, const char **);
 static char *convert_white_space (char *);
 
 /* The Specs Language
@@ -833,14 +834,16 @@ proper position among the other output f
  && defined(HAVE_AS_GDWARF2_DEBUG_FLAG) && 
defined(HAVE_AS_GSTABS_DEBUG_FLAG)
 #  define ASM_DEBUG_SPEC   \
   (PREFERRED_DEBUGGING_TYPE == DBX_DEBUG   \
-   ? "%{!g0:%{gdwarf*:--gdwarf2}%{!gdwarf*:%{g*:--gstabs}}}" ASM_MAP   
\
-   : "%{!g0:%{gstabs*:--gstabs}%{!gstabs*:%{g*:--gdwarf2}}}" ASM_MAP)
+   ? "%{%:debug-level-gt(0):"  \
+"%{gdwarf*:--gdwarf2}%{!gdwarf*:%{g*:--gstabs}}}" ASM_MAP  \
+   : "%{%:debug-level-gt(0):"  \
+"%{gstabs*:--gstabs}%{!gstabs*:%{g*:--gdwarf2}}}" ASM_MAP)
 # else
 #  if defined(DBX_DEBUGGING_INFO) && defined(HAVE_AS_GSTABS_DEBUG_FLAG)
-#   define ASM_DEBUG_SPEC "%{g*:%{!g0:--gstabs}}" ASM_MAP
+#   define ASM_DEBUG_SPEC "%{g*:%{%:debug-level-gt(0):--gstabs}}" ASM_MAP
 #  endif
 #  if defined(DWARF2_DEBUGGING_INFO) && defined(HAVE_AS_GDWARF2_DEBUG_FLAG)
-#   define ASM_DEBUG_SPEC "%{g*:%{!g0:--gdwarf2}}" ASM_MAP
+#   define ASM_DEBUG_SPEC "%{g*:%{%:debug-level-gt(0):--gdwarf2}}" ASM_MAP
 #  endif
 # endif
 #endif
@@ -1119,7 +1122,8 @@ static const char *cpp_unique_options =
in turn cause preprocessor symbols to be defined specially.  */
 static const char *cpp_options =
 "%(cpp_unique_options) %1 %{m*} %{std*} %{W**} %{w}\
- %{f*} %{g*:%{!g0:%{g*} %{!fno-working-directory:-fworking-directory}}} %{O*}\
+ %{f*} %{g*:%{%:debug-level-gt(0):%{g*}\
+ %{!fno-working-directory:-fworking-directory}}} %{O*}\
  %{undef} %{save-temps*:-fpch-preprocess}";
 
 /* This contains cpp options which are not passed when the preprocessor
@@ -1639,6 +1643,7 @@ static const struct spec_function static
   { "pass-through-libs",   pass_through_libs_spec_func },
   { "replace-extension",   replace_extension_spec_func },
   { "gt",  greater_than_spec_func },
+  { "debug-level-gt",  debug_level_greater_than_spec_func },
 #ifdef EXTRA_SPEC_FUNCTIONS
   EXTRA_SPEC_FUNCTIONS
 #endif
@@ -9861,6 +9866,27 @@ greater_than_spec_func (int argc, const
 return "";
 
   return NULL;
+}
+
+/* Returns "" if debug_info_level is greater than ARGV[ARGC-1].
+   Otherwise, return NULL.  */
+
+static const char *
+debug_level_greater_than_spec_func (int argc, const char **argv)
+{
+  char *converted;
+
+  if (argc != 1)
+fatal_error (input_location,
+"wrong number of arguments to %%:debug-level-gt");

[PATCH] Optimize n + 1 for automatic n array (PR c++/71537)

[Jakub Jelinek]

Hi!

This patch allows to fold n + 1 != 0 into true for automatic array n.
We already handle it for variables in the symbol table (if not weak),
but automatic vars are never in the symbol table.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

Or shall I add the function local address check into maybe_nonzero_address
instead (return 1 for those)?

2017-01-10  Jakub Jelinek  

PR c++/71537
* fold-const.c (fold_comparison): Handle also comparison of
addresses of local objects against NULL.

* g++.dg/cpp1y/constexpr-71537.C: New test.

--- gcc/fold-const.c.jj 2017-01-01 12:45:38.0 +0100
+++ gcc/fold-const.c2017-01-10 12:16:47.005931072 +0100
@@ -8420,7 +8420,11 @@ fold_comparison (location_t loc, enum tr
 every object pointer compares greater than a null pointer.
   */
   else if (((DECL_P (base0)
-&& maybe_nonzero_address (base0) > 0
+&& (maybe_nonzero_address (base0) > 0
+/* Function local objects are never NULL.  */
+|| (DECL_CONTEXT (base0)
+&& TREE_CODE (DECL_CONTEXT (base0)) == FUNCTION_DECL
+&& auto_var_in_fn_p (base0, DECL_CONTEXT (base0
 /* Avoid folding references to struct members at offset 0 to
prevent tests like '>firstmember == 0' from getting
eliminated.  When ptr is null, although the -> expression
--- gcc/testsuite/g++.dg/cpp1y/constexpr-71537.C.jj 2017-01-10 
12:22:07.102748236 +0100
+++ gcc/testsuite/g++.dg/cpp1y/constexpr-71537.C2017-01-10 
12:21:41.0 +0100
@@ -0,0 +1,14 @@
+// PR c++/71537
+// { dg-do compile { target c++14 } }
+
+constexpr bool
+foo ()
+{
+  constexpr int n[42] = { 1 };
+  constexpr int o = n ? 1 : 0;
+  constexpr int p = n + 1 ? 1 : 0;
+  constexpr int q = "abc" + 1 ? 1 : 0;
+  return p + p + q == 3;
+}
+
+static_assert (foo (), "");

Jakub

[C++ PATCH] Fix ICE on invalid (PR c++/78341)

[Jakub Jelinek]

Hi!

As mentioned in the PR, cp_parser_parse_definitely may fail even when
alignas_expr actually is meaningful, e.g. when the error is due to the
missing closing paren.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2017-01-10  Jakub Jelinek  

PR c++/78341
* parser.c (cp_parser_std_attribute_spec): Remove over-eager
assertion.  Formatting fix.

* g++.dg/cpp0x/pr78341.C: New test.

--- gcc/cp/parser.c.jj  2017-01-10 08:12:46.0 +0100
+++ gcc/cp/parser.c 2017-01-10 11:09:04.217456830 +0100
@@ -24931,11 +24931,7 @@ cp_parser_std_attribute_spec (cp_parser
 
   if (!cp_parser_parse_definitely (parser))
{
- gcc_assert (alignas_expr == error_mark_node
- || alignas_expr == NULL_TREE);
-
- alignas_expr =
-   cp_parser_assignment_expression (parser);
+ alignas_expr = cp_parser_assignment_expression (parser);
  if (alignas_expr == error_mark_node)
cp_parser_skip_to_end_of_statement (parser);
  if (alignas_expr == NULL_TREE
--- gcc/testsuite/g++.dg/cpp0x/pr78341.C.jj 2017-01-10 11:11:10.368843803 
+0100
+++ gcc/testsuite/g++.dg/cpp0x/pr78341.C2017-01-10 11:10:52.0 
+0100
@@ -0,0 +1,4 @@
+// PR c++/78341
+// { dg-do compile { target c++11 } }
+
+alignas (alignas double // { dg-error "" }

Jakub

[PATCH] Avoid generating code when writing PCH (PR c++/72813)

[Jakub Jelinek]

Hi!

The comments in both the C and C++ FEs say that after writing PCH file
when --output-pch= is used, we don't want to do anything else and the
routines return to the caller early, especially for C++ FE skipping lots of
needed handling for code generation.  But, nothing is signalled to the
callers, so we actually continue with the full optimization pipeline and
generate assembly.  Because some important parts have been skipped, we
can generate errors though.

Normally, the *.s file is thrown away and not used further, only when
-S or -save-temps is used, it is preserved.

One option would be (patch in the PR) not to skip anything and continue
writing, but as Richard mentioned on IRC, emitting assembly for the header
makes really no sense.  So this patch just does what the comment say,
by setting flag_syntax_only after writing the PCH file tell callers not to
perform cgraph finalization.

In addition to that, the patch also extends the r237955 fix to -S
-save-temps, so that we don't error out on that.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2017-01-10  Jakub Jelinek  

PR c++/72813
* gcc.c (default_compilers): Don't add -o %g.s for -S -save-temps
of c-header.

* c-decl.c (pop_file_scope): Set flag_syntax_only to 1 after writing
PCH file.

* decl2.c (c_parse_final_cleanups): Set flag_syntax_only to 1 after
writing PCH file.

--- gcc/gcc.c.jj2017-01-09 17:22:24.0 +0100
+++ gcc/gcc.c   2017-01-10 10:42:52.893462294 +0100
@@ -1328,7 +1328,7 @@ static const struct compiler default_com
%(cpp_options) -o %{save-temps*:%b.i} %{!save-temps*:%g.i} \n\
cc1 -fpreprocessed %{save-temps*:%b.i} %{!save-temps*:%g.i} 
\
%(cc1_options)\
-   %{!fsyntax-only:-o %g.s \
+   %{!fsyntax-only:%{!S:-o %g.s} \
%{!fdump-ada-spec*:%{!o*:--output-pch=%i.gch}\
   %W{o*:--output-pch=%*}}%V}}\
  %{!save-temps*:%{!traditional-cpp:%{!no-integrated-cpp:\
--- gcc/c/c-decl.c.jj   2017-01-01 12:45:46.0 +0100
+++ gcc/c/c-decl.c  2017-01-10 10:42:07.387043153 +0100
@@ -1420,6 +1420,8 @@ pop_file_scope (void)
   if (pch_file)
 {
   c_common_write_pch ();
+  /* Ensure even the callers don't try to finalize the CU.  */
+  flag_syntax_only = 1;
   return;
 }
 
--- gcc/cp/decl2.c.jj   2017-01-08 17:41:18.0 +0100
+++ gcc/cp/decl2.c  2017-01-10 10:41:47.539296496 +0100
@@ -4461,6 +4461,8 @@ c_parse_final_cleanups (void)
  DECL_ASSEMBLER_NAME (node->decl);
   c_common_write_pch ();
   dump_tu ();
+  /* Ensure even the callers don't try to finalize the CU.  */
+  flag_syntax_only = 1;
   return;
 }
 

Jakub

Re: [v3 PATCH] Reduce the size of variant, it doesn't need an index of type size_t internally.

[Ville Voutilainen]

Cleanups based on review; there's no longer any public typedefs added
to variant,
and the test is greatly simpler with much less trickery.

2017-01-11  Ville Voutilainen  

Reduce the size of variant, it doesn't need an index of
type size_t internally.
* include/std/variant (parse_numbers.h): New include.
(__select_index): New.
(_Variant_storage::_M_reset_impl): Use
_index_type for comparison with variant_npos.
(_Variant_storage::__index_type): New.
(_Variant_storage::_M_index): Change the
type from size_t to __index_type.
(_Variant_storage::__index_type): New.
(_Variant_storage::_M_index): Change the
type from size_t to __index_type.
(_Variant_base::_M_valid): Use _Storage::__index_type
for comparison with variant_npos.
(variant::index): Use _Base::_Storage::__index_type
for comparison with variant_npos.
* testsuite/20_util/variant/index_type.cc: New.
diff --git a/libstdc++-v3/include/std/variant b/libstdc++-v3/include/std/variant
index 3d025a7..6404fce 100644
--- a/libstdc++-v3/include/std/variant
+++ b/libstdc++-v3/include/std/variant
@@ -43,6 +43,7 @@
 #include 
 #include 
 #include 
+#include 
 
 namespace std _GLIBCXX_VISIBILITY(default)
 {
@@ -314,6 +315,13 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   template
 struct _Variant_storage;
 
+  template 
+  using __select_index =
+typename __select_int::_Select_int_base
+::type::value_type;
+
   template
 struct _Variant_storage
 {
@@ -332,7 +340,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   template
constexpr void _M_reset_impl(std::index_sequence<__indices...>)
{
- if (_M_index != variant_npos)
+ if (_M_index != __index_type(variant_npos))
_S_vtable<__indices...>[_M_index](*this);
}
 
@@ -346,7 +354,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   { _M_reset(); }
 
   _Variadic_union<_Types...> _M_u;
-  size_t _M_index;
+  using __index_type = __select_index<_Types...>;
+  __index_type _M_index;
 };
 
   template
@@ -364,7 +373,8 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   { _M_index = variant_npos; }
 
   _Variadic_union<_Types...> _M_u;
-  size_t _M_index;
+  using __index_type = __select_index<_Types...>;
+  __index_type _M_index;
 };
 
   // Helps SFINAE on special member functions. Otherwise it can live in variant
@@ -487,7 +497,10 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
   constexpr bool
   _M_valid() const noexcept
-  { return this->_M_index != variant_npos; }
+  {
+   return this->_M_index !=
+ typename _Storage::__index_type(variant_npos);
+  }
 };
 
   // For how many times does _Tp appear in _Tuple?
@@ -1086,7 +1099,12 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   { return !this->_M_valid(); }
 
   constexpr size_t index() const noexcept
-  { return this->_M_index; }
+  {
+   if (this->_M_index ==
+   typename _Base::_Storage::__index_type(variant_npos))
+ return variant_npos;
+   return this->_M_index;
+  }
 
   void
   swap(variant& __rhs)
diff --git a/libstdc++-v3/testsuite/20_util/variant/index_type.cc 
b/libstdc++-v3/testsuite/20_util/variant/index_type.cc
new file mode 100644
index 000..b7f3a7b
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/variant/index_type.cc
@@ -0,0 +1,24 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile { target x86_64-*-* powerpc*-*-*} }
+
+// Copyright (C) 2017 Free Software Foundation, Inc.
+//
+// This file is part of the GNU ISO C++ Library.  This library is free
+// software; you can redistribute it and/or modify it under the
+// terms of the GNU General Public License as published by the
+// Free Software Foundation; either version 3, or (at your option)
+// any later version.
+
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU General Public License for more details.
+
+// You should have received a copy of the GNU General Public License along
+// with this library; see the file COPYING3.  If not see
+// .
+
+#include 
+
+static_assert(sizeof(std::variant)
+ < sizeof(size_t));

[PATCH] adding missing LTO to some warning options (PR 78606)

[Martin Sebor]

The -Walloca-larger-than, -Wformat-length, and -Wformat-truncation
options do not mention LTO among the supported languages and so are
disabled when -flto is used, causing false negatives.

The attached patch adds the missing LTO to the three options.  This
makes -Walloca-larger-than work with LTO but not the other two
options, implying that something else is preventing the gimple-ssa-
sprintf pass from running when -flto is enabled.  I haven't had
the cycles to look into what that might be yet.  Since the root
causes are independent I'd like to commit this patch first and
deal with the  -Wformat-{length,truncation} problem separately,
under a new bug (or give someone with a better understanding of
LTO the opportunity to do it).

Thanks
Martin
PR c/78768 -  -Walloca-larger-than and -Wformat-length warnings disabled by -flto

gcc/c-family/ChangeLog:

	PR c/78768
	* c.opt (-Walloca-larger-than, -Wformat-length, -Wformat-truncation):
	Also enable for LTO.

gcc/testsuite/ChangeLog:

	PR c/78768
	* gcc.dg/pr78768.c: New test.

Index: gcc/c-family/c.opt
===
--- gcc/c-family/c.opt	(revision 244294)
+++ gcc/c-family/c.opt	(working copy)
@@ -313,7 +313,7 @@ C ObjC C++ ObjC++ Var(warn_alloc_zero) Warning
 -Walloc-zero Warn for calls to allocation functions that specify zero bytes.
 
 Walloca-larger-than=
-C ObjC C++ ObjC++ Var(warn_alloca_limit) Warning Joined RejectNegative UInteger
+C ObjC C++ LTO ObjC++ Var(warn_alloca_limit) Warning Joined RejectNegative UInteger
 -Walloca-larger-than= Warn on unbounded uses of
 alloca, and on bounded uses of alloca whose bound can be larger than
  bytes.
@@ -521,7 +521,7 @@ C ObjC C++ ObjC++ Var(warn_format_extra_args) Warn
 Warn if passing too many arguments to a function for its format string.
 
 Wformat-length
-C ObjC C++ ObjC++ Warning Alias(Wformat-length=, 1, 0)
+C ObjC C++ LTO ObjC++ Warning Alias(Wformat-length=, 1, 0)
 Warn about function calls with format strings that write past the end
 of the destination region.  Same as -Wformat-length=1.
 
@@ -538,7 +538,7 @@ C ObjC C++ ObjC++ Var(warn_format_signedness) Warn
 Warn about sign differences with format functions.
 
 Wformat-truncation
-C ObjC C++ ObjC++ Warning Alias(Wformat-truncation=, 1, 0)
+C ObjC C++ LTO ObjC++ Warning Alias(Wformat-truncation=, 1, 0)
 Warn about calls to snprintf and similar functions that truncate output.
 Same as -Wformat-truncation=1.
 
Index: gcc/testsuite/gcc.dg/pr78768.c
===
--- gcc/testsuite/gcc.dg/pr78768.c	(revision 0)
+++ gcc/testsuite/gcc.dg/pr78768.c	(working copy)
@@ -0,0 +1,13 @@
+/* PR c/78768 - -Walloca-larger-than and -Wformat-length warnings disabled
+   by -flto
+  { dg-do run }
+  { dg-options "-O2 -Walloca-larger-than=10 -Wformat -Wformat-length -flto" } */
+
+int main (void)
+{
+  char *d = (char *)__builtin_alloca (12);  /* { dg-warning "argument to .alloca. is too large" } */
+
+  __builtin_sprintf (d, "%32s", "x");   /* { dg-warning "directive writing 32 bytes into a region of size 12" "-Wformat-length" { xfail *-*-* } } */
+
+  return 0;
+}

[committed] Fix issues with unrepresentable column numbers (PR c++/77949)

[David Malcolm]

PR c++/77949 identifies an ICE when the C++ frontend attempts to emit a
fix-it hint inserting a missing semicolon at column 4097 of a source file.

This column value exceeds LINE_MAP_MAX_COLUMN_NUMBER and hence isn't
representable using a location_t.

Attempting to do so leads to these problems, which this patch fixes:

(a) when encountering a column number > LINE_MAP_MAX_COLUMN_NUMBER we
create a new linemap with m_column_and_range_bits == 0, but
linemap_position_for_column doesn't check for this, and hence can emit
a bogus location_t value that's calculated relative to the previous
linemap start, but which will be decoded relative to the new linemap,
leading to very large incorrect line values.

(b) when encountering a column number that can't be represented, and
for which the linemap was pre-existing, the code would hit this assertion:
  if (linemap_assert_fails (column < (1u << map->m_column_and_range_bits)))
around a bail-out condition.  The patch replaces this assertion with a
simple conditional, to stop the ICE when this occurs, and fixes the
bit count (effective column bits, vs column+range bits)

(c) the C++ frontend wasn't checking for failure of
linemap_position_for_loc_and_offset when considering emitting the fix-it
hint.  The patch adds a conditional, so that no fix-it hint is emitted
if the location is bogus.

Successfully bootstrapped on x86_64-pc-linux-gnu.

Committed to trunk as r244292.

gcc/cp/ChangeLog:
PR c++/77949
* parser.c (cp_parser_class_specifier_1): Only suggest inserting
a missing semicolon if we have a valid insertion location for
the fix-it hint.

gcc/ChangeLog:
PR c++/77949
* input.c (selftest::test_accessing_ordinary_linemaps): Verify
that we correctly handle column numbers greater than
LINE_MAP_MAX_COLUMN_NUMBER.

gcc/testsuite/ChangeLog:
PR c++/77949
* g++.dg/diagnostic/pr77949.C: New test case.

libcpp/ChangeLog:
PR c++/77949
* line-map.c (linemap_position_for_column): When calling
linemap_start_line, detect if a new linemap was created with
0 column bits, and bail out early if this is the case.
(linemap_position_for_loc_and_offset): Replace overzealous
linemap_assert_fails with a simple conditional; use correct
bit count.
---
 gcc/cp/parser.c   |  5 -
 gcc/input.c   | 26 ++
 gcc/testsuite/g++.dg/diagnostic/pr77949.C |  7 +++
 libcpp/line-map.c | 19 ++-
 4 files changed, 55 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/g++.dg/diagnostic/pr77949.C

diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index b94270d..6b250db 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -22120,7 +22120,10 @@ cp_parser_class_specifier_1 (cp_parser* parser)
  next_loc = linemap_position_for_loc_and_offset (line_table, loc, 1);
 
rich_location richloc (line_table, next_loc);
-   richloc.add_fixit_insert_before (next_loc, ";");
+
+   /* If we successfully offset the location, suggest the fix-it.  */
+   if (next_loc != loc)
+ richloc.add_fixit_insert_before (next_loc, ";");
 
if (CLASSTYPE_DECLARED_CLASS (type))
  error_at_rich_loc (,
diff --git a/gcc/input.c b/gcc/input.c
index 4df47f2..6e45538 100644
--- a/gcc/input.c
+++ b/gcc/input.c
@@ -1699,6 +1699,22 @@ test_accessing_ordinary_linemaps (const line_table_case 
_)
   ASSERT_EQ (7, map->m_column_and_range_bits - map->m_range_bits);
 }
 
+  /* Example of a line that will eventually be seen to be longer
+ than LINE_MAP_MAX_COLUMN_NUMBER; the initially seen width is
+ below that.  */
+  linemap_line_start (line_table, 5, 2000);
+
+  location_t loc_start_of_very_long_line
+= linemap_position_for_column (line_table, 2000);
+  location_t loc_too_wide
+= linemap_position_for_column (line_table, 4097);
+  location_t loc_too_wide_2
+= linemap_position_for_column (line_table, 4098);
+
+  /* ...and back to a sane line length.  */
+  linemap_line_start (line_table, 6, 100);
+  location_t loc_sane_again = linemap_position_for_column (line_table, 10);
+
   linemap_add (line_table, LC_LEAVE, false, NULL, 0);
 
   /* Multiple files.  */
@@ -1714,6 +1730,16 @@ test_accessing_ordinary_linemaps (const line_table_case 
_)
   assert_loceq ("foo.c", 2, 17, loc_d);
   assert_loceq ("foo.c", 3, 700, loc_e);
   assert_loceq ("foo.c", 4, 100, loc_back_to_short);
+
+  /* In the very wide line, the initial location should be fully tracked.  */
+  assert_loceq ("foo.c", 5, 2000, loc_start_of_very_long_line);
+  /* ...but once we exceed LINE_MAP_MAX_COLUMN_NUMBER column-tracking should
+ be disabled.  */
+  assert_loceq ("foo.c", 5, 0, loc_too_wide);
+  assert_loceq ("foo.c", 5, 0, loc_too_wide_2);
+  /*...and column-tracking should be re-enabled for subsequent lines.  */
+  assert_loceq ("foo.c", 6, 10, 

libgo patch committed: copy more scheduler code from Go 1.7 runtime

[Ian Lance Taylor]

I looked at a diff of libgo/go/runtime/proc.go between Go 1.7 and
gccgo, and copied over all the easy stuff.  Bootstrapped and ran Go
testsuite on x86_64-pc-linux-gnu.  Committed to mainline.

Ian
Index: gcc/go/gofrontend/MERGE
===
--- gcc/go/gofrontend/MERGE (revision 244256)
+++ gcc/go/gofrontend/MERGE (working copy)
@@ -1,4 +1,4 @@
-f439989e483b7c2eada6ddcf6e730a791cce603f
+d3725d876496f2cca3d6ce538e98b58c85d90bfb
 
 The first line of this file holds the git revision number of the last
 merge done from the gofrontend repository.
Index: libgo/go/runtime/debug.go
===
--- libgo/go/runtime/debug.go   (revision 244236)
+++ libgo/go/runtime/debug.go   (working copy)
@@ -44,7 +44,7 @@ func NumCPU() int
 // NumCgoCall returns the number of cgo calls made by the current process.
 func NumCgoCall() int64 {
var n int64
-   for mp := (*m)(atomic.Loadp(unsafe.Pointer(allm(; mp != nil; mp = 
mp.alllink {
+   for mp := (*m)(atomic.Loadp(unsafe.Pointer())); mp != nil; mp = 
mp.alllink {
n += int64(mp.ncgocall)
}
return n
Index: libgo/go/runtime/export_test.go
===
--- libgo/go/runtime/export_test.go (revision 244236)
+++ libgo/go/runtime/export_test.go (working copy)
@@ -24,8 +24,7 @@ import (
 
 var Entersyscall = entersyscall
 var Exitsyscall = exitsyscall
-
-// var LockedOSThread = lockedOSThread
+var LockedOSThread = lockedOSThread
 
 // var Xadduintptr = xadduintptr
 
Index: libgo/go/runtime/mprof.go
===
--- libgo/go/runtime/mprof.go   (revision 244166)
+++ libgo/go/runtime/mprof.go   (working copy)
@@ -521,7 +521,7 @@ func BlockProfile(p []BlockProfileRecord
 // Most clients should use the runtime/pprof package instead
 // of calling ThreadCreateProfile directly.
 func ThreadCreateProfile(p []StackRecord) (n int, ok bool) {
-   first := (*m)(atomic.Loadp(unsafe.Pointer(allm(
+   first := (*m)(atomic.Loadp(unsafe.Pointer()))
for mp := first; mp != nil; mp = mp.alllink {
n++
}
Index: libgo/go/runtime/os_gccgo.go
===
--- libgo/go/runtime/os_gccgo.go(revision 244166)
+++ libgo/go/runtime/os_gccgo.go(working copy)
@@ -11,6 +11,13 @@ import (
 // Temporary for C code to call:
 //go:linkname minit runtime.minit
 
+// Called to initialize a new m (including the bootstrap m).
+// Called on the parent thread (main thread in case of bootstrap), can 
allocate memory.
+func mpreinit(mp *m) {
+   mp.gsignal = malg(true, true, , )
+   mp.gsignal.m = mp
+}
+
 // minit is called to initialize a new m (including the bootstrap m).
 // Called on the new thread, cannot allocate memory.
 func minit() {
Index: libgo/go/runtime/proc.go
===
--- libgo/go/runtime/proc.go(revision 244236)
+++ libgo/go/runtime/proc.go(working copy)
@@ -18,6 +18,7 @@ import (
 //go:linkname sysmon runtime.sysmon
 //go:linkname schedtrace runtime.schedtrace
 //go:linkname allgadd runtime.allgadd
+//go:linkname mcommoninit runtime.mcommoninit
 //go:linkname ready runtime.ready
 //go:linkname gcprocs runtime.gcprocs
 //go:linkname needaddgcproc runtime.needaddgcproc
@@ -27,6 +28,10 @@ import (
 //go:linkname stoplockedm runtime.stoplockedm
 //go:linkname schedule runtime.schedule
 //go:linkname execute runtime.execute
+//go:linkname gfput runtime.gfput
+//go:linkname gfget runtime.gfget
+//go:linkname lockOSThread runtime.lockOSThread
+//go:linkname unlockOSThread runtime.unlockOSThread
 //go:linkname procresize runtime.procresize
 //go:linkname helpgc runtime.helpgc
 //go:linkname stopTheWorldWithSema runtime.stopTheWorldWithSema
@@ -66,6 +71,113 @@ func goready(gp *g, traceskip int) {
})
 }
 
+//go:nosplit
+func acquireSudog() *sudog {
+   // Delicate dance: the semaphore implementation calls
+   // acquireSudog, acquireSudog calls new(sudog),
+   // new calls malloc, malloc can call the garbage collector,
+   // and the garbage collector calls the semaphore implementation
+   // in stopTheWorld.
+   // Break the cycle by doing acquirem/releasem around new(sudog).
+   // The acquirem/releasem increments m.locks during new(sudog),
+   // which keeps the garbage collector from being invoked.
+   mp := acquirem()
+   pp := mp.p.ptr()
+   if len(pp.sudogcache) == 0 {
+   lock()
+   // First, try to grab a batch from central cache.
+   for len(pp.sudogcache) < cap(pp.sudogcache)/2 && 
sched.sudogcache != nil {
+   s := sched.sudogcache
+   sched.sudogcache = s.next
+   s.next = nil
+

Re: [PATCH] [msp430] Sync msp430_mcu_data with devices.csv

[DJ Delorie]

Committed for you, thanks!

[PATCH] Add new test

[Jeff Law]

pr77766 is a duplicate of pr78856.  This just adds the test for pr77766 
to the testsuite.  Committing to the trunk.


Jeff
commit 2729592d26c48c6c2add94f4ee98bd4328eacf85
Author: law 
Date:   Tue Jan 10 20:55:59 2017 +

PR tree-optimization/77766
PR tree-optimization/78856
* gcc.c-torture/execute/pr77766.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@244287 
138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index bc86b4f..009d32d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2017-01-10  Jeff Law  
+
+   PR tree-optimization/77766
+   PR tree-optimization/78856
+   * gcc.c-torture/execute/pr77766.c: New test.
+
 2016-01-10  Richard Biener  
 
PR tree-optimization/79034
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr77766.c 
b/gcc/testsuite/gcc.c-torture/execute/pr77766.c
new file mode 100644
index 000..f8f61ad
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr77766.c
@@ -0,0 +1,28 @@
+char a;
+short b, d = 5, h;
+char c[1];
+int e, f = 4, g, j;
+int main() {
+  int i;
+  for (; f; f = a) {
+g = 0;
+for (; g <= 32; ++g) {
+  i = 0;
+  for (; i < 3; i++)
+while (1 > d)
+  if (c[b])
+break;
+L:
+  if (j)
+break;
+}
+  }
+  e = 0;
+  for (; e; e = 0) {
+d++;
+for (; h;)
+  goto L;
+  }
+  return 0;
+}
+

[doc, committed] fix overfull hboxes in GCC manual

[Sandra Loosemore]

I've checked in this patch to address various overfull hbox warnings in 
the PDF version of the GCC manual.  These changes are intended to be 
completely boring and content-free.  ;-)


There's still one case, in the ARM -mtune description, that needs more 
thought -- I'm considering changing all such lists to use @gccoptlist 
with a ragged right margin rather than flowed inline text.  That would 
be a fairly mechanical change but it would touch a lot of other sections 
as well, so I thought it better to leave it separate, at least.


-Sandra

2017-01-10  Sandra Loosemore  

	gcc/
	* doc/extend.texi: Tweak formatting to fix overfull hbox warnings.
	* doc/invoke.texi: Likewise.
	* doc/md.texi: Likewise.
	* doc/objc.texi: Likewise.
Index: gcc/doc/extend.texi
===
--- gcc/doc/extend.texi	(revision 244215)
+++ gcc/doc/extend.texi	(working copy)
@@ -5943,10 +5943,10 @@ at all.  Just use an appropriate linker
   @{ ...
   @} > text
   /* Leave .rodata in flash and add an offset of 0x4000 to all
- addresses so that respective objects can be accessed by LD
- instructions and open coded C/C++.  This means there is no
- need for progmem in the source and no overhead by read-only
- data in RAM.  */
+ addresses so that respective objects can be accessed by
+ LD instructions and open coded C/C++.  This means there
+ is no need for progmem in the source and no overhead by
+ read-only data in RAM.  */
   .rodata ADDR(.text) + SIZEOF (.text) + 0x4000 :
   @{
 *(.rodata)
@@ -8687,8 +8687,8 @@ top:
 With no modifiers, this is what the output from the operands would be for the 
 @samp{att} and @samp{intel} dialects of assembler:
 
-@multitable {Operand} {masm=att} {OFFSET FLAT:.L2}
-@headitem Operand @tab masm=att @tab masm=intel
+@multitable {Operand} {$.L2} {OFFSET FLAT:.L2}
+@headitem Operand @tab @samp{att} @tab @samp{intel}
 @item @code{%0}
 @tab @code{%eax}
 @tab @code{eax}
@@ -8702,8 +8702,8 @@ With no modifiers, this is what the outp
 
 The table below shows the list of supported modifiers and their effects.
 
-@multitable {Modifier} {Print the opcode suffix for the size of th} {Operand} {masm=att} {masm=intel}
-@headitem Modifier @tab Description @tab Operand @tab @option{masm=att} @tab @option{masm=intel}
+@multitable {Modifier} {Print the opcode suffix for the size of th} {Operand} {@samp{att}} {@samp{intel}}
+@headitem Modifier @tab Description @tab Operand @tab @samp{att} @tab @samp{intel}
 @item @code{z}
 @tab Print the opcode suffix for the size of the current integer operand (one of @code{b}/@code{w}/@code{l}/@code{q}).
 @tab @code{%z0}
@@ -12727,7 +12727,9 @@ points to.  Counting starts at @code{0}.
 If the address does not point to flash memory, return @code{-1}.
 
 @smallexample
-unsigned char __builtin_avr_insert_bits (unsigned long map, unsigned char bits, unsigned char val)
+unsigned char __builtin_avr_insert_bits (unsigned long map,
+ unsigned char bits,
+ unsigned char val)
 @end smallexample
 
 @noindent
@@ -18128,13 +18130,16 @@ __vector long long int
 vec_extract_sig (__vector double source);
 
 __vector float
-vec_insert_exp (__vector unsigned int significands,  __vector unsigned int exponents);
+vec_insert_exp (__vector unsigned int significands,
+__vector unsigned int exponents);
 __vector double
 vec_insert_exp (__vector unsigned long long int significands,
 __vector unsigned long long int exponents);
 
-__vector int vec_test_data_class (__vector float source, unsigned int condition);
-__vector long long int vec_test_data_class (__vector double source, unsigned int condition);
+__vector int vec_test_data_class (__vector float source,
+  unsigned int condition);
+__vector long long int vec_test_data_class (__vector double source,
+unsigned int condition);
 @end smallexample
 
 The @code{vec_extract_sig} and @code{vec_extract_exp} built-in
@@ -18229,9 +18234,9 @@ vector unsigned int __builtin_crypto_vsh
  int, int);
 @end smallexample
 
-The second argument to the @var{__builtin_crypto_vshasigmad} and
-@var{__builtin_crypto_vshasigmaw} builtin functions must be a constant
-integer that is 0 or 1.  The third argument to these builtin functions
+The second argument to @var{__builtin_crypto_vshasigmad} and
+@var{__builtin_crypto_vshasigmaw} must be a constant
+integer that is 0 or 1.  The third argument to these built-in functions
 must be a constant integer in the range of 0 to 15.
 
 If the ISA 3.0 instruction set additions 
@@ -20454,8 +20459,10 @@ void __builtin_ia32_xsaveopt64 (void *,
 The following built-in functions are available when @option{-mtbm} is used.
 Both of them generate the immediate form of the bextr machine instruction.
 

[LRA] Fix PR rtl-optimization/79032

[Eric Botcazou]

Hi,

LRA generates an unaligned memory access for 32-bit SPARC on the attached 
testcase when it is compiled with optimization.  It's again the business of 
paradoxical subregs of memory dealt with by simplify_operand_subreg:

  /* If we change the address for a paradoxical subreg of memory, the
address might violate the necessary alignment or the access might
 be slow.  So take this into consideration.  We need not worry
 about accesses beyond allocated memory for paradoxical memory
 subregs as we don't substitute such equiv memory (see processing
equivalences in function lra_constraints) and because for spilled
 pseudos we allocate stack memory enough for the biggest
 corresponding paradoxical subreg.  */
  if (!(MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (mode)
&& SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (reg)))
  || (MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (innermode)
  && SLOW_UNALIGNED_ACCESS (innermode, MEM_ALIGN (reg
return true;

However the code contains a small inaccuracy: it tests the old MEM (reg) which 
has mode INNERMODE in the first branch of the condition instead of testing the 
new MEM (subst) which has mode MODE.  That's benign for little-endian targets 
since the offset doesn't change, but not for big-endian ones where it changes 
and thus also can change the alignment.

The attached fix was bootstrapped/regtested on SPARC/Solaris, OK for mainline?


2017-01-10  Eric Botcazou  <ebotca...@adacore.com>

PR rtl-optimization/79032
* lra-constraints.c (simplify_operand_subreg): In the MEM case, test
the alignment of the adjusted memory reference against that of MODE,
instead of the alignment of the original memory reference.


2017-01-10  Eric Botcazou  <ebotca...@adacore.com>

    * gcc.c-torture/execute/20170110-1.c: New test.

-- 
Eric Botcazou/* PR rtl-optimization/79032 */

extern void abort (void);

struct S {
  short a;
  long long b;
  short c;
  char d;
  unsigned short e;
  long *f;
};

static long foo (struct S *s) __attribute__((noclone, noinline));

static long foo (struct S *s)
{
  long a = 1;
  a /= s->e;
  s->f[a]--;
  return a;
}

int main (void)
{
  long val = 1;
  struct S s = { 0, 0, 0, 0, 2,  };
  val = foo ();
  if (val != 0)
abort ();
  return 0;
}
Index: lra-constraints.c
===
--- lra-constraints.c	(revision 244194)
+++ lra-constraints.c	(working copy)
@@ -1505,15 +1505,15 @@ simplify_operand_subreg (int nop, machin
   MEM_ADDR_SPACE (subst
 	{
 	  /* If we change the address for a paradoxical subreg of memory, the
-	 address might violate the necessary alignment or the access might
-	 be slow.  So take this into consideration.  We need not worry
+	 new address might violate the necessary alignment or the access
+	 might be slow; take this into consideration.  We need not worry
 	 about accesses beyond allocated memory for paradoxical memory
 	 subregs as we don't substitute such equiv memory (see processing
 	 equivalences in function lra_constraints) and because for spilled
 	 pseudos we allocate stack memory enough for the biggest
 	 corresponding paradoxical subreg.  */
-	  if (!(MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (mode)
-		&& SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (reg)))
+	  if (!(MEM_ALIGN (subst) < GET_MODE_ALIGNMENT (mode)
+		&& SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (subst)))
 	  || (MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (innermode)
 		  && SLOW_UNALIGNED_ACCESS (innermode, MEM_ALIGN (reg
 	return true;

[PATCH, rs6000] Fix PR79044 (ICE in swap optimization)

[Bill Schmidt]

Hi,

PR79044 reports a situation where swap optimization ICEs in GCC 6 and in trunk. 
 The
problem is that swap optimization doesn't properly recognize that 
element-reversing
loads and stores (e.g., lxvw4x) cannot be treated as "swappable" instructions.  
These
arise from the __builtin_vec_xl and __builtin_vec_xst interfaces that were 
added in 
GCC 6.  The surrounding code is slightly different, so the fix is slightly 
different
for the two releases.

The fix is obvious, and bootstraps on powerpc64le-unknown-linux-gnu with no 
regressions.
Are these patches ok for trunk and GCC 6, respectively?

Thanks,
Bill


For current trunk:

[gcc]

2017-01-10  Bill Schmidt  

PR target/79044
* config/rs6000/rs6000.c (insn_is_swappable_p): Mark
element-reversing loads and stores as not swappable.

[gcc/testsuite]

2017-01-10  Bill Schmidt  

PR target/79044
* gcc.target/powerpc/swaps-p8-26.c: New.


Index: gcc/config/rs6000/rs6000.c
===
--- gcc/config/rs6000/rs6000.c  (revision 244274)
+++ gcc/config/rs6000/rs6000.c  (working copy)
@@ -41344,7 +41344,10 @@ insn_is_swappable_p (swap_web_entry *insn_entry, r
   if (GET_CODE (body) == SET)
{
  rtx rhs = SET_SRC (body);
- gcc_assert (GET_CODE (rhs) == MEM);
+ /* Even without a swap, the RHS might be a vec_select for, say,
+a byte-reversing load.  */
+ if (GET_CODE (rhs) != MEM)
+   return 0;
  if (GET_CODE (XEXP (rhs, 0)) == AND)
return 0;
 
@@ -41361,7 +41364,10 @@ insn_is_swappable_p (swap_web_entry *insn_entry, r
  && GET_CODE (SET_SRC (body)) != UNSPEC)
{
  rtx lhs = SET_DEST (body);
- gcc_assert (GET_CODE (lhs) == MEM);
+ /* Even without a swap, the LHS might be a vec_select for, say,
+a byte-reversing store.  */
+ if (GET_CODE (lhs) != MEM)
+   return 0;
  if (GET_CODE (XEXP (lhs, 0)) == AND)
return 0;
  
Index: gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c
===
--- gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c  (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c  (working copy)
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { powerpc64le-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { 
"-mcpu=power8" } } */
+/* { dg-options "-mcpu=power8 -O3 " } */
+/* { dg-final { scan-assembler-times "lxvw4x" 2 } } */
+/* { dg-final { scan-assembler "stxvw4x" } } */
+/* { dg-final { scan-assembler-not "xxpermdi" } } */
+
+/* Verify that swap optimization does not interfere with element-reversing
+   loads and stores.  */
+
+/* Test case to resolve PR79044.  */
+
+#include 
+
+void pr79044 (float *x, float *y, float *z)
+{
+  vector float a = __builtin_vec_xl (0, x);
+  vector float b = __builtin_vec_xl (0, y);
+  vector float c = __builtin_vec_mul (a, b);
+  __builtin_vec_xst (c, 0, z);
+}



For GCC 6:


[gcc]

2017-01-10  Bill Schmidt  

PR target/79044
* config/rs6000/rs6000.c (insn_is_swappable_p): Mark
element-reversing loads and stores as not swappable.

[gcc/testsuite]

2017-01-10  Bill Schmidt  

PR target/79044
* gcc.target/powerpc/swaps-p8-26.c: New.


Index: gcc/config/rs6000/rs6000.c
===
--- gcc/config/rs6000/rs6000.c  (revision 244276)
+++ gcc/config/rs6000/rs6000.c  (working copy)
@@ -38657,6 +38657,12 @@ insn_is_swappable_p (swap_web_entry *insn_entry, r
 {
   if (GET_CODE (body) == SET)
{
+ rtx rhs = SET_SRC (body);
+ /* Even without a swap, the RHS might be a vec_select for, say,
+a byte-reversing load.  */
+ if (GET_CODE (rhs) != MEM)
+   return 0;
+
  *special = SH_NOSWAP_LD;
  return 1;
}
@@ -38668,6 +38674,12 @@ insn_is_swappable_p (swap_web_entry *insn_entry, r
 {
   if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) != UNSPEC)
{
+ rtx lhs = SET_DEST (body);
+ /* Even without a swap, the LHS might be a vec_select for, say,
+a byte-reversing store.  */
+ if (GET_CODE (lhs) != MEM)
+   return 0;
+
  *special = SH_NOSWAP_ST;
  return 1;
}
Index: gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c
===
--- gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c  (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/swaps-p8-26.c  (working copy)
@@ -0,0 +1,21 @@
+/* { dg-do compile { target { powerpc64le-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { 
"-mcpu=power8" } } */
+/* { 

Contents of PO file 'cpplib-7.1-b20170101.da.po'

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A revised PO file for textual domain 'cpplib' has been submitted
by the Danish team of translators.  The file is available at:

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a separate email.)

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official or a pretest.

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containing a newer POT file, please send the URL of that distribution
tarball to the address below.  The tarball may be just a pretest or a
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Re: [PATCH] Offer suggestions for unrecognized sanitizer options (PR driver/78877)

[Jakub Jelinek]

On Tue, Jan 10, 2017 at 03:02:49PM -0500, David Malcolm wrote:
> +/* Given ARG, an unrecognized sanitizer option, return the best
> +   matching sanitizer option, or NULL if there isn't one.  */
> +
> +static const char *
> +get_closest_sanitizer_option (const string_fragment )
> +{
> +  best_match  bm (arg);
> +  for (int i = 0; sanitizer_opts[i].name != NULL; ++i)
> +bm.consider (sanitizer_opts[i].name);
> +  return bm.get_best_meaningful_candidate ();

I think we shouldn't suggest invalid option combinations, so that means
passing code to get_closest_sanitizer_option (so that we know if it is
OPT_fsanitize_ or OPT_fsanitize_recover_) and a bool whether it is
the -fno-sanitize* or -fsanitize* (value).  Then we shouldn't add to
bm.consider:
1) for -fsanitize= (and not -fno-sanitize=) the "all" option
   (sanitizer_opts[i].flag == ~0U && code == OPT_fsanitize_ && value
   is a cheap test for that case)
2) for -fsanitize-recover= (and not -fno-sanitize-recover=) the
   non-recoverable options
   (!sanitizer_opts[i].can_recover && code == OPT_fsanitize_recover_ && value)
Otherwise it looks good to me.

Jakub

Re: Go patch committed: drop size arguments to hash/equal functions

[Rainer Orth]

Hi Ian,

> Drop the size arguments for the hash/equal functions stored in type
> descriptors.  Types know what size they are.  To make this work,
> generate hash/equal functions for types that can use an identity
> comparison but are not a standard size and alignment.
>
> Drop the multiplications by 33 in the generated hash code and the
> reflect package hash code.  They are not necessary since we started
> passing a seed value around, as the seed includes the hash of the
> earlier values.
>
> Copy the algorithms for standard types from the Go 1.7 runtime,
> replacing the C functions.
>
> Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.  Committed
> to mainline.

this patch broke Solaris/SPARC bootstrap, it seems: building
debug/dwarf.lo ICEs like this:

go1: internal compiler error: in write_specific_type_functions, at 
go/gofrontend/types.cc:1993
0x4bc50b Type::write_specific_type_functions(Gogo*, Named_type*, long long, 
std::__cxx11::basic_string 
const&, Function_type*, std::__cxx11::basic_string const&, Function_type*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/types.cc:1993
0x4bc8ff Type::specific_type_functions(Gogo*, Named_type*, long long, 
Function_type*, Function_type*, Named_object**, Named_object**)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/types.cc:1971
0x4bb2a3 Type::type_functions(Gogo*, Named_type*, Function_type*, 
Function_type*, Named_object**, Named_object**)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/types.cc:1753
0x4bf06f Type::type_descriptor_constructor(Gogo*, int, Named_type*, Methods 
const*, bool)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/types.cc:2308
0x4c0893 Array_type::array_type_descriptor(Gogo*, Named_type*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/types.cc:6932
0x4b43c7 Type::make_type_descriptor_var(Gogo*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/types.cc:1237
0x4b47c3 Type::type_descriptor_pointer(Gogo*, Location)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/types.cc:1172
0x1232d63 Type_descriptor_expression::do_get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:14344
0x4251df Expression::get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:402
0x43faaf Struct_construction_expression::do_get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:12572
0x4251df Expression::get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:402
0x4408d3 Array_construction_expression::get_constructor(Translate_context*, 
Btype*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:12795
0x4251df Expression::get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:402
0x43cb93 Unary_expression::do_get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:4249
0x4251df Expression::get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:402
0x4260ef Slice_value_expression::do_get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:14729
0x4251df Expression::get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:402
0x4251df Expression::get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:402
0x43faaf Struct_construction_expression::do_get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:12572
0x4251df Expression::get_backend(Translate_context*)
/vol/gcc/src/hg/trunk/local/gcc/go/gofrontend/expressions.cc:402

Solaris/x86 is fine.

Rainer

-- 
-
Rainer Orth, Center for Biotechnology, Bielefeld University

[PATCH] Offer suggestions for unrecognized sanitizer options (PR driver/78877)

[David Malcolm]

PR driver/78877 notes that we offer a suggestion for
"-fsanitize-addres" (with a hyphen):

  xgcc: error: unrecognized command line option '-fsanitize-addres';
  did you mean '-fsanitize=address'?

but not for "-fsanitize=addres" (with an equals sign):

  xgcc: error: unrecognized argument to -fsanitize= option: 'addres'

This patch implements suggestions for the latter case.

The input arguments are not always 0-terminated, since they are accessed
from a comma-separated buffer, so we need some extra types for describing
this to the spellchecker code (struct string_fragment and the
specialization of edit_distance_traits).

Successfully bootstrapped on x86_64-pc-linux-gnu.

OK for trunk?

gcc/ChangeLog:
PR driver/78877
* opts.c: Include "spellcheck.h"
(struct string_fragment): New struct.
(struct edit_distance_traits): New
struct.
(get_closest_sanitizer_option): New function.
(parse_sanitizer_options): Offer suggestions for unrecognized arguments.

gcc/testsuite/ChangeLog:
PR driver/78877
* gcc.dg/spellcheck-options-14.c: New test case.
---
 gcc/opts.c   | 57 +++-
 gcc/testsuite/gcc.dg/spellcheck-options-14.c |  8 
 2 files changed, 63 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/spellcheck-options-14.c

diff --git a/gcc/opts.c b/gcc/opts.c
index 059a61a..6ee02d6 100644
--- a/gcc/opts.c
+++ b/gcc/opts.c
@@ -30,6 +30,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "opts-diagnostic.h"
 #include "insn-attr-common.h"
 #include "common/common-target.h"
+#include "spellcheck.h"
 
 static void set_Wstrict_aliasing (struct gcc_options *opts, int onoff);
 
@@ -1511,6 +1512,46 @@ const struct sanitizer_opts_s sanitizer_opts[] =
   { NULL, 0U, 0UL, false }
 };
 
+/* A struct for describing a run of chars within a string.  */
+
+struct string_fragment
+{
+  string_fragment (const char *start, size_t len)
+  : m_start (start), m_len (len) {}
+
+  const char *m_start;
+  size_t m_len;
+};
+
+/* Specialization of edit_distance_traits for string_fragment,
+   for use by get_closest_sanitizer_option.  */
+
+template <>
+struct edit_distance_traits
+{
+  static size_t get_length (const string_fragment )
+  {
+return fragment.m_len;
+  }
+
+  static const char *get_string (const string_fragment )
+  {
+return fragment.m_start;
+  }
+};
+
+/* Given ARG, an unrecognized sanitizer option, return the best
+   matching sanitizer option, or NULL if there isn't one.  */
+
+static const char *
+get_closest_sanitizer_option (const string_fragment )
+{
+  best_match  bm (arg);
+  for (int i = 0; sanitizer_opts[i].name != NULL; ++i)
+bm.consider (sanitizer_opts[i].name);
+  return bm.get_best_meaningful_candidate ();
+}
+
 /* Parse comma separated sanitizer suboptions from P for option SCODE,
adjust previous FLAGS and return new ones.  If COMPLAIN is false,
don't issue diagnostics.  */
@@ -1572,8 +1613,20 @@ parse_sanitizer_options (const char *p, location_t loc, 
int scode,
  }
 
   if (! found && complain)
-   error_at (loc, "unrecognized argument to -fsanitize%s= option: %q.*s",
- code == OPT_fsanitize_ ? "" : "-recover", (int) len, p);
+   {
+ const char *optname
+   = code == OPT_fsanitize_ ? "-fsanitize" : "-fsanitize-recover";
+ const char *hint
+   = get_closest_sanitizer_option (string_fragment (p, len));
+
+ if (hint)
+   error_at (loc, "unrecognized argument to %s= option: %q.*s;"
+ " did you mean %qs",
+ optname, (int) len, p, hint);
+ else
+   error_at (loc, "unrecognized argument to %s= option: %q.*s",
+ optname, (int) len, p);
+   }
 
   if (comma == NULL)
break;
diff --git a/gcc/testsuite/gcc.dg/spellcheck-options-14.c 
b/gcc/testsuite/gcc.dg/spellcheck-options-14.c
new file mode 100644
index 000..5582460
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/spellcheck-options-14.c
@@ -0,0 +1,8 @@
+/* Verify that we offer suggestions for misspelled sanitizer options
+   (PR driver/78877).  */
+
+/* { dg-do compile } */
+/* { dg-options "-fsanitize=addres,nul,this-is-not-a-sanitizer-option" } */
+/* { dg-error "unrecognized argument to -fsanitize= option: .addres.; did you 
mean .address." "" { target *-*-* } 0 } */
+/* { dg-error "unrecognized argument to -fsanitize= option: .nul.; did you 
mean .null." "" { target *-*-* } 0 } */
+/* { dg-error "unrecognized argument to -fsanitize= option: 
.this-is-not-a-sanitizer-option." "" { target *-*-* } 0 } */
-- 
1.8.5.3

Re: [PATCH][PR tree-optimization/78856] Invalidate cached iteration information when threading across multiple loop headers

[Jeff Law]

On 01/04/2017 05:25 AM, Richard Biener wrote:

On Wed, Jan 4, 2017 at 6:31 AM, Jeff Law  wrote:


So as noted in the BZ comments the jump threading code has code that detects
when a jump threading path wants to cross multiple loop headers and
truncates the jump threading path in that case.

What we should have done instead is invalidate the cached loop information.

Additionally, this BZ shows that just looking at loop headers is not
sufficient -- we might cross from a reducible to an irreducible region which
is equivalent to crossing into another loop in that we need to invalidate
the cached loop iteration information.

What's so damn funny here is that eventually we take nested loops and
irreducible regions, thread various edges and end up with a nice natural
loop and no irreducible regions in the end :-)  But the cached iteration
information is still bogus.

Anyway, this patch corrects both issues.  It treats moving between an
reducible and irreducible region as crossing a loop header and it
invalidates the cached iteration information rather than truncating the jump
thread path.

Bootstrapped and regression tested on x86_64-linux-gnu.  That compiler was
also used to build all the configurations in config-list.mk.

Installing on the trunk.  I could be convinced to install on the gcc-6
branch as well since it's affected by the same problem.

Jeff


commit 93e3964a4664350446eefe786e3b73eb41d99036
Author: law 
Date:   Wed Jan 4 05:31:23 2017 +

PR tree-optimizatin/78856
* tree-ssa-threadupdate.c: Include tree-vectorizer.h.
(mark_threaded_blocks): Remove code to truncate thread paths that
cross multiple loop headers.  Instead invalidate the cached loop
iteration information and handle case of a thread path walking
into an irreducible region.

PR tree-optimization/78856
* gcc.c-torture/execute/pr78856.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@244045
138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3114e02..6b2888f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2017-01-03  Jeff Law  
+
+   PR tree-optimizatin/78856
+   * tree-ssa-threadupdate.c: Include tree-vectorizer.h.
+   (mark_threaded_blocks): Remove code to truncate thread paths that
+   cross multiple loop headers.  Instead invalidate the cached loop
+   iteration information and handle case of a thread path walking
+   into an irreducible region.
+
 2016-12-30  Michael Meissner  

PR target/78900
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cd2a065..cadfbc9 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-01-03  Jeff Law  
+
+   PR tree-optimization/78856
+   * gcc.c-torture/execute/pr78856.c: New test.
+
 2017-01-03  Michael Meissner  

PR target/78953
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr78856.c
b/gcc/testsuite/gcc.c-torture/execute/pr78856.c
new file mode 100644
index 000..80f2317
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr78856.c
@@ -0,0 +1,25 @@
+extern void exit (int);
+
+int a, b, c, d, e, f[3];
+
+int main()
+{
+  while (d)
+while (1)
+  ;
+  int g = 0, h, i = 0;
+  for (; g < 21; g += 9)
+{
+  int j = 1;
+  for (h = 0; h < 3; h++)
+   f[h] = 1;
+  for (; j < 10; j++) {
+   d = i && (b ? 0 : c);
+   i = 1;
+   if (g)
+ a = e;
+  }
+  }
+  exit (0);
+}
+
diff --git a/gcc/tree-ssa-threadupdate.c b/gcc/tree-ssa-threadupdate.c
index adbb6e0..2da93a8 100644
--- a/gcc/tree-ssa-threadupdate.c
+++ b/gcc/tree-ssa-threadupdate.c
@@ -34,6 +34,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "cfgloop.h"
 #include "dbgcnt.h"
 #include "tree-cfg.h"
+#include "tree-vectorizer.h"

 /* Given a block B, update the CFG and SSA graph to reflect redirecting
one or more in-edges to B to instead reach the destination of an
@@ -2084,10 +2085,8 @@ mark_threaded_blocks (bitmap threaded_blocks)
   /* Look for jump threading paths which cross multiple loop headers.

  The code to thread through loop headers will change the CFG in ways
- that break assumptions made by the loop optimization code.
-
- We don't want to blindly cancel the requests.  We can instead do
better
- by trimming off the end of the jump thread path.  */
+ that invalidate the cached loop iteration information.  So we must
+ detect that case and wipe the cached information.  */
   EXECUTE_IF_SET_IN_BITMAP (tmp, 0, i, bi)
 {
   basic_block bb = BASIC_BLOCK_FOR_FN (cfun, i);
@@ -2102,26 +2101,16 @@ mark_threaded_blocks (bitmap threaded_blocks)
   i++)
{
  basic_block dest = (*path)[i]->e->dest;
+ 

C++ PATCH for C++17 NB comment FI20 (parenthesized initialization with decomposition)

[Jason Merrill]

The FI20 comment on the decomposition declarations proposal complained
that the syntax unnecessarily excluded parenthesized initialization.
This patch implements the resolution.

Tested x86_64-pc-linux-gnu, applying to trunk.
commit 749ec367e50b356a40fd41a3daae10d9d948062b
Author: Jason Merrill 
Date:   Mon Jan 9 17:33:42 2017 -0500

FI 20, decomposition declaration with parenthesized initializer.

* parser.c (cp_parser_decomposition_declaration): Use
cp_parser_initializer.

diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index aa045c4..4517313 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -12923,7 +12923,7 @@ cp_parser_simple_declaration (cp_parser* parser,
 
 /* Helper of cp_parser_simple_declaration, parse a decomposition declaration.
  decl-specifier-seq ref-qualifier [opt] [ identifier-list ]
-   brace-or-equal-initializer ;  */
+   initializer ;  */
 
 static tree
 cp_parser_decomposition_declaration (cp_parser *parser,
@@ -13022,21 +13022,12 @@ cp_parser_decomposition_declaration (cp_parser 
*parser,
   || cp_lexer_next_token_is_not (parser->lexer, CPP_COLON))
 {
   bool non_constant_p = false, is_direct_init = false;
-  tree initializer;
   *init_loc = cp_lexer_peek_token (parser->lexer)->location;
-  /* Parse the initializer.  */
-  if (cp_lexer_next_token_is (parser->lexer, CPP_OPEN_BRACE))
-   {
- initializer = cp_parser_braced_list (parser, _constant_p);
- CONSTRUCTOR_IS_DIRECT_INIT (initializer) = 1;
- is_direct_init = true;
-   }
-  else
-   {
- /* Consume the `='.  */
- cp_parser_require (parser, CPP_EQ, RT_EQ);
- initializer = cp_parser_initializer_clause (parser, _constant_p);
-   }
+  tree initializer = cp_parser_initializer (parser, _direct_init,
+   _constant_p);
+  if (TREE_CODE (initializer) == TREE_LIST)
+   initializer = build_x_compound_expr_from_list (initializer, ELK_INIT,
+  tf_warning_or_error);
 
   if (decl != error_mark_node)
{
diff --git a/gcc/testsuite/g++.dg/cpp1z/decomp20.C 
b/gcc/testsuite/g++.dg/cpp1z/decomp20.C
new file mode 100644
index 000..8831b71
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1z/decomp20.C
@@ -0,0 +1,10 @@
+// { dg-options -std=c++1z }
+
+struct A { int i,j; };
+
+A f();
+
+int main()
+{
+  auto [i,j] (f());
+}

Re: C++ PATCH to implement C++17 variadic using

[Jason Merrill]

On Mon, Jan 9, 2017 at 4:50 PM, Jason Merrill  wrote:
> The last C++17 feature was pretty trivial to implement, as expected.

...and the feature-test macro.
commit 9926adaa233a28474a12d16601a4f5a1204efbee
Author: Jason Merrill 
Date:   Mon Jan 9 17:37:21 2017 -0500

* c-cppbuiltin.c (c_cpp_builtins): Define __cpp_variadic_using.

diff --git a/gcc/c-family/c-cppbuiltin.c b/gcc/c-family/c-cppbuiltin.c
index 2115099..c114bbd 100644
--- a/gcc/c-family/c-cppbuiltin.c
+++ b/gcc/c-family/c-cppbuiltin.c
@@ -970,6 +970,7 @@ c_cpp_builtins (cpp_reader *pfile)
  cpp_define (pfile, "__cpp_noexcept_function_type=201510");
  cpp_define (pfile, "__cpp_template_auto=201606");
  cpp_define (pfile, "__cpp_structured_bindings=201606");
+ cpp_define (pfile, "__cpp_variadic_using=201611");
}
   if (flag_concepts)
cpp_define (pfile, "__cpp_concepts=201507");
diff --git a/gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C 
b/gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C
index f61b9f5..e424e1c 100644
--- a/gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C
+++ b/gcc/testsuite/g++.dg/cpp1z/feat-cxx1z.C
@@ -404,6 +404,12 @@
 #  error "__cpp_template_template_args != 201611"
 #endif
 
+#ifndef __cpp_variadic_using
+#  error "__cpp_variadic_using"
+#elif __cpp_variadic_using != 201611
+#  error "__cpp_variadic_using != 201611"
+#endif
+
 #ifdef __has_cpp_attribute
 
 #  if ! __has_cpp_attribute(maybe_unused)

[PING][Aarch64][PATCH] Fix gcc.dg/zero_bits_compound-2.c for aarch64

[Michael Collison]

Ping. Link to original patch:

https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00400.html

Re: [PATCH] PR77528 add default constructors for container adaptors

[Tim Song]

On Tue, Jan 10, 2017 at 12:33 PM, Jonathan Wakely  wrote:
> The standard says that the container adaptors have a constructor with
> a default argument, which serves as a default constructor. That
> involves default-constructing the underlying sequence as the default
> argument and then move-constructing the member variable from that
> argument. Because std::deque allocates memory in its move constructor
> this means the default constructor of an adaptor using std::deque
> will allocate twice, which is wasteful and expensive.
>
> This change adds a separate default constructor, defined as defaulted
> (and adding default member-initializers to ensure the member variables
> get value-initialized). This avoids the move-construction, so we only
> allocate once when using std::deque.
>

The new default member initializers use {}, and it's not too hard to find
test cases where {} and value-initialization do different things, including
cases where {} doesn't compile but () does. (So much for "uniform"
initialization.)

> Because the default constructor is defined as defaulted it will be
> deleted when the underlying sequence isn't default constructible,

That's not correct. There's no implicit deletion due to the presence of DMIs.
The reason the explicit instantiation works is that constructors explicitly
defaulted at their first declaration are not implicitly defined until ODR-used.

So, unlike the SFINAE-based approach outlined in the bugzilla issue, this
patch causes is_default_constructible>
to trigger a hard error (though the standard's version isn't SFINAE-friendly
either).

Also, the change to .../priority_queue/requirements/explicit_instantiation/1.cc
adds a Cmp class but doesn't actually use it in the explicit instantiation.

Re: [PATCH] Add support for Fuchsia (OS)

[Josh Conner via gcc-patches]

On 1/10/17 7:54 AM, Richard Earnshaw (lists) wrote:

On 12/12/16 21:31, Josh Conner via gcc-patches wrote:

On 12/10/16 3:26 AM, Richard Earnshaw wrote:

On 08/12/16 22:55, Josh Conner wrote:

+arm*-*-fuchsia*)
+  tm_file="${tm_file} fuchsia.h arm/fuchsia-elf.h glibc-stdint.h"
+  tmake_file="${tmake_file} arm/t-bpabi"
+  ;;

This will leave the default cpu as arm7tdmi.  Is that what you want?
It's fine if it is, but if not, you should consider setting
target_cpu_cname here as well.

Mmm, probably not. Thanks for pointing that out.
I've attached an updated patch addressing all of the concerns so far.

OK for mainline?

Thanks -

Josh


2016-12-08  Joshua Conner

Two spaces between your name and email address.


 * config/arm/fuchsia-elf.h: New file.
 * config/fuchsia.h: New file.
 * config.gcc (*-*-fuchsia*): Set native_system_header_dir.
 (aarch64*-*-fuchsia*, arm*-*-fuchsia*, x86_64-*-fuchsia*): Add to
 targets.
 * config.host: (aarch64*-*-fuchsia*, arm*-*-fuchsia*): Add to hosts.


This is OK, but please update the copyright years on the new files to
include 2017.


Applied with those changes, thanks.

- Josh


R.


gcc-fuchsia-support-v2.patch


Index: config/arm/fuchsia-elf.h
===
--- config/arm/fuchsia-elf.h(revision 0)
+++ config/arm/fuchsia-elf.h(working copy)
@@ -0,0 +1,31 @@
+/* Configuration file for ARM Fuchsia ELF targets.
+   Copyright (C) 2016 Free Software Foundation, Inc.
+   Contributed by Google.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   .  */
+
+/* Use the BPABI builtins and the generic OS builtins.  */
+#undef  TARGET_SUB_OS_CPP_BUILTINS
+#define TARGET_SUB_OS_CPP_BUILTINS()   \
+  TARGET_BPABI_CPP_BUILTINS()
+
+/* Use the AAPCS ABI by default.  */
+#undef ARM_DEFAULT_ABI
+#define ARM_DEFAULT_ABI ARM_ABI_AAPCS
+
+#define ARM_TARGET2_DWARF_FORMAT (DW_EH_PE_pcrel | DW_EH_PE_indirect)
+
Index: config/fuchsia.h
===
--- config/fuchsia.h(revision 0)
+++ config/fuchsia.h(working copy)
@@ -0,0 +1,68 @@
+/* Base configuration file for all Fuchsia targets.
+   Copyright (C) 2016 Free Software Foundation, Inc.
+   Contributed by Google.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+/* Common Fuchsia configuration.  */
+
+#undef  STARTFILE_SPEC
+#define STARTFILE_SPEC "%{!shared: crt1%O%s} crtbegin%O%s"
+
+#undef  ENDFILE_SPEC
+#define ENDFILE_SPEC "crtend%O%s"
+
+/* When neither pic nor pie has been specified, use PIE.  */
+#undef  CC1_SPEC
+#define CC1_SPEC "%{!fno-pic:%{!fno-PIC:%{!fpic:%{!fPIC:" \
+   "%{!fno-pie:%{!fno-PIE:%{!fpie:%{!fPIE: -fPIE"
+
+#undef  LIB_SPEC
+#define LIB_SPEC "--start-group" \
+" -lmxio -lmagenta -lc -llaunchpad" \
+"%{!static: -lgcc_s}" \
+" --end-group"
+
+#undef  LINK_SPEC
+#define LINK_SPEC "-z max-page-size=4096" \
+ " -z combreloc" \
+ " -z relro" \
+ " -z now" \
+ " -z text" \
+ "%{!hash-style: --hash-style=gnu}" \
+ "%{!no-eh-frame-hdr: --eh-frame-hdr}" \
+ "%{!no-build-id: --build-id}" \
+ "%{shared: -shared}" \
+ "%{!shared:%{!static:%{!dynamic-linker: 
-dynamic-linker=ld.so.1}}}"
+
+/* We are using MUSL as our libc.  */
+#undef  OPTION_MUSL
+#define OPTION_MUSL 1
+
+#ifndef TARGET_SUB_OS_CPP_BUILTINS
+#define TARGET_SUB_OS_CPP_BUILTINS()
+#endif
+
+#undef  TARGET_OS_CPP_BUILTINS
+#define TARGET_OS_CPP_BUILTINS()   \
+  do   \
+{  \
+  

[PATCH] Adjust effective target selector to fix C++17 FAIL

[Jonathan Wakely]

This test using std::set_unexpected fails when run with -std=gnu++17
because throw() is no longer a dynamic exception specification and so
the unexpected handler no longer gets called. This tweaks the target
selector so it's only run for C++11 and C++14, where unexpected
handlers are usable (it can't be run for C++98 because it uses
std::rethrow_exception).

* testsuite/18_support/exception_ptr/60612-unexpected.cc: Adjust
effective target selector to prevent running in C++17 mode.

Tested x86_64-linux with various -std options, committed to trunk.

commit ae39d3a49df4589e5f9a2dd6eff4518d0667cb53
Author: Jonathan Wakely 
Date:   Tue Jan 10 17:35:27 2017 +

Adjust effective target selector to fix C++17 FAIL

* testsuite/18_support/exception_ptr/60612-unexpected.cc: Adjust
effective target selector to prevent running in C++17 mode.

diff --git 
a/libstdc++-v3/testsuite/18_support/exception_ptr/60612-unexpected.cc 
b/libstdc++-v3/testsuite/18_support/exception_ptr/60612-unexpected.cc
index 3562892..97e3d57 100644
--- a/libstdc++-v3/testsuite/18_support/exception_ptr/60612-unexpected.cc
+++ b/libstdc++-v3/testsuite/18_support/exception_ptr/60612-unexpected.cc
@@ -1,4 +1,4 @@
-// { dg-do run { target c++11 } }
+// { dg-do run { target { c++11_only || c++14_only } } }
 
 // Copyright (C) 2014-2017 Free Software Foundation, Inc.
 //

[PATCH] PR77528 add default constructors for container adaptors

[Jonathan Wakely]

The standard says that the container adaptors have a constructor with
a default argument, which serves as a default constructor. That
involves default-constructing the underlying sequence as the default
argument and then move-constructing the member variable from that
argument. Because std::deque allocates memory in its move constructor
this means the default constructor of an adaptor using std::deque
will allocate twice, which is wasteful and expensive.

This change adds a separate default constructor, defined as defaulted
(and adding default member-initializers to ensure the member variables
get value-initialized). This avoids the move-construction, so we only
allocate once when using std::deque.

As noted in Bugzilla this makes the default constructors non-explicit,
which is a change in behaviour, and not strictly conforming. I'm doing
that intentionally, because having default construction be explicit
for these types is stupid anyway.

Because the default constructor is defined as defaulted it will be
deleted when the underlying sequence isn't default constructible, so
we can still explicitly instantiate the adaptors in such cases (which
I've added tests for).

I'm also shuffling some tests around. Currently we have two explicit
instantiation tests for each adaptor, 1.cc and 1_c++0x.cc, which
originally tested it for C++98 and C++11. But since the default became
gnu++14 we now test twice in C++14 mode. So I'm replacing 1_c++0x.cc
with 1_c++98.cc which has { dg-options "-std=gnu++98.cc" } to force
testing that dialect.

PR libstdc++/77528
* include/bits/stl_queue.h (queue::c): Add default member initializer.
(queue::queue()): Add constructor and define as defaulted.
(queue::queue(_Sequence&&)): Remove default argument.
(priority_queue::c, priority_queue::comp): Add default member
initializers.
(priority_queue::priority_queue()): Add constructor and define as
defaulted.
(priority_queue::priority_queue(const _Compare&, _Sequence&&)):
Remove default argument for first parameter.
* include/bits/stl_stack.h (stack::c): Add default member initializer.
(stack::stack()): Add constructor and define as defaulted.
(stack::stack(const _Sequence&)): Remove default argument.
* testsuite/23_containers/priority_queue/requirements/
explicit_instantiation/1.cc: Test explicit instantiation with
non-DefaultConstructible sequence.
* testsuite/23_containers/priority_queue/77528.cc: New test.
* testsuite/23_containers/priority_queue/requirements/
explicit_instantiation/1_c++0x.cc: Replace with 1_c++98.cc.
* testsuite/23_containers/queue/77528.cc: New test.
* testsuite/23_containers/queue/requirements/explicit_instantiation/
1.cc: Test explicit instantiation with non-DefaultConstructible
sequence.
* testsuite/23_containers/queue/requirements/explicit_instantiation/
1_c++0x.cc: Replace with 1_c++98.cc.
* testsuite/23_containers/stack/77528.cc: New test.
* testsuite/23_containers/stack/requirements/explicit_instantiation/
1.cc: Test explicit instantiation with non-DefaultConstructible
sequence.
* testsuite/23_containers/stack/requirements/explicit_instantiation/
1_c++0x.cc: Replace with 1_c++98.cc.

Tested powerpc64le-linux, committed to trunk.

We might want to backport this to the branches, but I'll let it bake
on trunk for a bit first.

commit 5fe45739d39c67fae0f9a3179c2f61b6c95428e4
Author: Jonathan Wakely 
Date:   Thu Sep 8 14:32:37 2016 +0100

PR77528 add default constructors for container adaptors

PR libstdc++/77528
* include/bits/stl_queue.h (queue::c): Add default member initializer.
(queue::queue()): Add constructor and define as defaulted.
(queue::queue(_Sequence&&)): Remove default argument.
(priority_queue::c, priority_queue::comp): Add default member
initializers.
(priority_queue::priority_queue()): Add constructor and define as
defaulted.
(priority_queue::priority_queue(const _Compare&, _Sequence&&)):
Remove default argument for first parameter.
* include/bits/stl_stack.h (stack::c): Add default member initializer.
(stack::stack()): Add constructor and define as defaulted.
(stack::stack(const _Sequence&)): Remove default argument.
* testsuite/23_containers/priority_queue/requirements/
explicit_instantiation/1.cc: Test explicit instantiation with
non-DefaultConstructible sequence.
* testsuite/23_containers/priority_queue/77528.cc: New test.
* testsuite/23_containers/priority_queue/requirements/
explicit_instantiation/1_c++0x.cc: Replace with 1_c++98.cc.
* testsuite/23_containers/queue/77528.cc: New test.
* testsuite/23_containers/queue/requirements/explicit_instantiation/
 

[PATCH][AArch64] Improve Cortex-A53 scheduling of int/fp transfers

[Wilco Dijkstra]

My previous change to the Cortex-A53 scheduler resulted in a 13% regression on a
proprietary benchmark.  This turned out to be due to non-optimal scheduling of 
int
to float conversions.  This patch separates int to FP transfers from int to 
float
conversions based on experiments to determine the best schedule.  As a result of
these tweaks the performance of the benchmark improves by 20%.

ChangeLog:
2017-01-10  Wilco Dijkstra  

* config/arm/cortex-a53.md: Add bypasses for
cortex_a53_r2f_cvt.
(cortex_a53_r2f): Only use for transfers.
(cortex_a53_f2r): Likewise.
(cortex_a53_r2f_cvt): Add reservation for conversions.
(cortex_a53_f2r_cvt): Likewise.

--

diff --git a/gcc/config/arm/cortex-a53.md b/gcc/config/arm/cortex-a53.md
index 
14822ba0ac0532aaf0dd29cff7a87e32e745cbe8..b367ad403a4a641da34521c17669027b87092737
 100644
--- a/gcc/config/arm/cortex-a53.md
+++ b/gcc/config/arm/cortex-a53.md
@@ -252,9 +252,18 @@
 "cortex_a53_r2f")
 
 (define_bypass 1 "cortex_a53_mul,
- cortex_a53_load*"
+ cortex_a53_load1,
+ cortex_a53_load2"
 "cortex_a53_r2f")
 
+(define_bypass 2 "cortex_a53_alu*"
+"cortex_a53_r2f_cvt")
+
+(define_bypass 3 "cortex_a53_mul,
+ cortex_a53_load1,
+ cortex_a53_load2"
+"cortex_a53_r2f_cvt")
+
 ;; Model flag forwarding to branches.
 
 (define_bypass 0 "cortex_a53_alu*,cortex_a53_shift*"
@@ -514,16 +523,24 @@
 ;; Floating-point to/from core transfers.
 
 
-(define_insn_reservation "cortex_a53_r2f" 6
+(define_insn_reservation "cortex_a53_r2f" 2
   (and (eq_attr "tune" "cortexa53")
-   (eq_attr "type" "f_mcr,f_mcrr,f_cvti2f,
-   neon_from_gp, neon_from_gp_q"))
-  "cortex_a53_slot_any,nothing*2,cortex_a53_fp_alu")
+   (eq_attr "type" "f_mcr,f_mcrr"))
+  "cortex_a53_slot_any,cortex_a53_fp_alu")
+
+(define_insn_reservation "cortex_a53_f2r" 4
+  (and (eq_attr "tune" "cortexa53")
+   (eq_attr "type" "f_mrc,f_mrrc"))
+  "cortex_a53_slot_any,cortex_a53_fp_alu")
+
+(define_insn_reservation "cortex_a53_r2f_cvt" 4
+  (and (eq_attr "tune" "cortexa53")
+   (eq_attr "type" "f_cvti2f, neon_from_gp, neon_from_gp_q"))
+  "cortex_a53_slot_any,cortex_a53_fp_alu")
 
-(define_insn_reservation "cortex_a53_f2r" 6
+(define_insn_reservation "cortex_a53_f2r_cvt" 5
   (and (eq_attr "tune" "cortexa53")
-   (eq_attr "type" "f_mrc,f_mrrc,f_cvtf2i,
-   neon_to_gp, neon_to_gp_q"))
+   (eq_attr "type" "f_cvtf2i, neon_to_gp, neon_to_gp_q"))
   "cortex_a53_slot_any,cortex_a53_fp_alu")
 
 

Re: [Ping~][AArch64] Add commandline support for -march=armv8.3-a

[James Greenhalgh]

On Fri, Jan 06, 2017 at 11:33:39AM +, Jiong Wang wrote:
> On 11/11/16 18:22, Jiong Wang wrote:
> >This patch add command line support for ARMv8.3-A through new architecture:
> >
> >   -march=armv8.3-a
> >
> >ARMv8.3-A implies all default features of ARMv8.2-A and meanwhile it includes
> >the new pointer authentication extension.
> >
> >
> >gcc/
> >2016-11-08  Jiong Wang
> >
> > * config/aarch64/aarch64-arches.def: New entry for "armv8.3-a".
> > * config/aarch64/aarch64.h (AARCH64_FL_PAUTH, AARCH64_FL_V8_3,
> > AARCH64_FL_FOR_ARCH8_3, AARCH64_ISA_PAUTH, AARCH64_ISA_V8_3,
> > TARGET_PAUTH, TARGET_ARMV8_3): New.
> > * doc/invoke.texi (AArch64 Options): Document "armv8.3-a".
> 
> Ping ~
> 
> As pointer authentication extension is defined to be mandatory extension on
> ARMv8.3-A and is not optional, I adjusted the patch slightly.
> 
> This also let GCC treating pointer authentication extension in consistent way
> with Binutils.
> 
> OK for trunk?

OK.

Thanks,
James

> 
> gcc/
> 2017-01-06  Jiong Wang  
> 
> * config/aarch64/aarch64-arches.def: New entry for "armv8.3-a".
> * config/aarch64/aarch64.h (AARCH64_FL_V8_3, AARCH64_FL_FOR_ARCH8_3,
> AARCH64_ISA_V8_3, TARGET_ARMV8_3): New.
> * doc/invoke.texi (AArch64 Options): Document "armv8.3-a".
> 
> 

Re: [PATCH] Enable SGX intrinsics

[Andrew Senkevich]

On Fri, Dec 30, 2016 at 03:37:14PM +0100, Uros Bizjak wrote:
>> As suggested in [1], you should write multi-line enums like:
>>
>> enum foo
>> {
>>   a = ...
>>   b = ...
>> }
>
> Sure.  Plus it depends on if users of the APIs should just write the operands 
> on their own as numbers, or as __SGX_E*, or as E*.
> In the first case the patch sans formatting is reasonable, in the second case 
> the enums should be moved to file scope, in the last case we have to live 
> with the namespace pollution.
> The pdf you've referenced in the thread doesn't list the _encls_u32 and
> _enclu_u32 intrinsics, so I think it depends on what ICC does (if it has been 
> shipped with such a support already, or on coordination with ICC if not).

Jakub, it is in accordance with ICC.
So the first case will be used.


--
WBR,
Andrew

Re: [PATCH] Add support for Fuchsia (OS)

[Richard Earnshaw (lists)]

On 12/12/16 21:31, Josh Conner via gcc-patches wrote:
> On 12/10/16 3:26 AM, Richard Earnshaw wrote:
>> On 08/12/16 22:55, Josh Conner wrote:
>>> +arm*-*-fuchsia*)
>>> +  tm_file="${tm_file} fuchsia.h arm/fuchsia-elf.h glibc-stdint.h"
>>> +  tmake_file="${tmake_file} arm/t-bpabi"
>>> +  ;;
>>
>> This will leave the default cpu as arm7tdmi.  Is that what you want?
>> It's fine if it is, but if not, you should consider setting
>> target_cpu_cname here as well.
> 
> Mmm, probably not. Thanks for pointing that out.
> I've attached an updated patch addressing all of the concerns so far.
> 
> OK for mainline?
> 
> Thanks -
> 
> Josh
> 
> 
> 2016-12-08  Joshua Conner

Two spaces between your name and email address.

> 
> * config/arm/fuchsia-elf.h: New file.
> * config/fuchsia.h: New file.
> * config.gcc (*-*-fuchsia*): Set native_system_header_dir.
> (aarch64*-*-fuchsia*, arm*-*-fuchsia*, x86_64-*-fuchsia*): Add to
> targets.
> * config.host: (aarch64*-*-fuchsia*, arm*-*-fuchsia*): Add to hosts.
> 

This is OK, but please update the copyright years on the new files to
include 2017.

R.

> 
> gcc-fuchsia-support-v2.patch
> 
> 
> Index: config/arm/fuchsia-elf.h
> ===
> --- config/arm/fuchsia-elf.h  (revision 0)
> +++ config/arm/fuchsia-elf.h  (working copy)
> @@ -0,0 +1,31 @@
> +/* Configuration file for ARM Fuchsia ELF targets.
> +   Copyright (C) 2016 Free Software Foundation, Inc.
> +   Contributed by Google.
> +
> +   This file is part of GCC.
> +
> +   GCC is free software; you can redistribute it and/or modify it
> +   under the terms of the GNU General Public License as published
> +   by the Free Software Foundation; either version 3, or (at your
> +   option) any later version.
> +
> +   GCC is distributed in the hope that it will be useful, but WITHOUT
> +   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
> +   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
> +   License for more details.
> +
> +   You should have received a copy of the GNU General Public License
> +   along with GCC; see the file COPYING3.  If not see
> +   .  */
> +
> +/* Use the BPABI builtins and the generic OS builtins.  */
> +#undef  TARGET_SUB_OS_CPP_BUILTINS
> +#define TARGET_SUB_OS_CPP_BUILTINS() \
> +  TARGET_BPABI_CPP_BUILTINS()
> +
> +/* Use the AAPCS ABI by default.  */
> +#undef ARM_DEFAULT_ABI
> +#define ARM_DEFAULT_ABI ARM_ABI_AAPCS
> +
> +#define ARM_TARGET2_DWARF_FORMAT (DW_EH_PE_pcrel | DW_EH_PE_indirect)
> +
> Index: config/fuchsia.h
> ===
> --- config/fuchsia.h  (revision 0)
> +++ config/fuchsia.h  (working copy)
> @@ -0,0 +1,68 @@
> +/* Base configuration file for all Fuchsia targets.
> +   Copyright (C) 2016 Free Software Foundation, Inc.
> +   Contributed by Google.
> +
> +This file is part of GCC.
> +
> +GCC is free software; you can redistribute it and/or modify
> +it under the terms of the GNU General Public License as published by
> +the Free Software Foundation; either version 3, or (at your option)
> +any later version.
> +
> +GCC is distributed in the hope that it will be useful,
> +but WITHOUT ANY WARRANTY; without even the implied warranty of
> +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +GNU General Public License for more details.
> +
> +You should have received a copy of the GNU General Public License
> +along with GCC; see the file COPYING3.  If not see
> +.  */
> +
> +/* Common Fuchsia configuration.  */
> +
> +#undef  STARTFILE_SPEC
> +#define STARTFILE_SPEC "%{!shared: crt1%O%s} crtbegin%O%s"
> +
> +#undef  ENDFILE_SPEC
> +#define ENDFILE_SPEC "crtend%O%s"
> +
> +/* When neither pic nor pie has been specified, use PIE.  */
> +#undef  CC1_SPEC
> +#define CC1_SPEC "%{!fno-pic:%{!fno-PIC:%{!fpic:%{!fPIC:" \
> +   "%{!fno-pie:%{!fno-PIE:%{!fpie:%{!fPIE: -fPIE"
> +
> +#undef  LIB_SPEC
> +#define LIB_SPEC "--start-group" \
> +  " -lmxio -lmagenta -lc -llaunchpad" \
> +  "%{!static: -lgcc_s}" \
> +  " --end-group"
> +
> +#undef  LINK_SPEC
> +#define LINK_SPEC "-z max-page-size=4096" \
> +   " -z combreloc" \
> +   " -z relro" \
> +   " -z now" \
> +   " -z text" \
> +   "%{!hash-style: --hash-style=gnu}" \
> +   "%{!no-eh-frame-hdr: --eh-frame-hdr}" \
> +   "%{!no-build-id: --build-id}" \
> +   "%{shared: -shared}" \
> +   "%{!shared:%{!static:%{!dynamic-linker: 
> -dynamic-linker=ld.so.1}}}"
> +
> +/* We are using MUSL as our libc.  */
> +#undef  OPTION_MUSL
> +#define OPTION_MUSL 1
> +
> +#ifndef TARGET_SUB_OS_CPP_BUILTINS
> +#define TARGET_SUB_OS_CPP_BUILTINS()
> +#endif
> +
> +#undef  TARGET_OS_CPP_BUILTINS
> 

[PATCH] Reload global options when strict aliasing is dropped (PR ipa/79043).

[Martin Liška]

As mentioned in the PR, we currently do not properly reload global
optimization options when we drop strict-aliasing flag on a function
that equals to cfun.

Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.

Ready to be installed?
Martin
>From 53108a01c5fcb6fcfca15b389e76217b724915c3 Mon Sep 17 00:00:00 2001
From: marxin 
Date: Tue, 10 Jan 2017 14:43:04 +0100
Subject: [PATCH] Reload global options when strict aliasing is dropped (PR
 ipa/79043).

gcc/ChangeLog:

2017-01-10  Martin Liska  

	PR ipa/79043
	* function.c (set_cfun): Add new argument force.
	* function.h (set_cfun): Likewise.
	* ipa-inline-transform.c (inline_call): Use the function when
	strict alising from is dropped for function we inline to.

gcc/testsuite/ChangeLog:

2017-01-10  Martin Liska  

	PR ipa/79043
	* gcc.c-torture/execute/pr79043.c: New test.
---
 gcc/function.c|  4 ++--
 gcc/function.h|  2 +-
 gcc/ipa-inline-transform.c|  8 
 gcc/testsuite/gcc.c-torture/execute/pr79043.c | 21 +
 4 files changed, 32 insertions(+), 3 deletions(-)
 create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr79043.c

diff --git a/gcc/function.c b/gcc/function.c
index 7fde96adbe3..f625489205b 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -4811,9 +4811,9 @@ invoke_set_current_function_hook (tree fndecl)
 /* cfun should never be set directly; use this function.  */
 
 void
-set_cfun (struct function *new_cfun)
+set_cfun (struct function *new_cfun, bool force)
 {
-  if (cfun != new_cfun)
+  if (cfun != new_cfun || force)
 {
   cfun = new_cfun;
   invoke_set_current_function_hook (new_cfun ? new_cfun->decl : NULL_TREE);
diff --git a/gcc/function.h b/gcc/function.h
index fb3cbbc3346..fb8f57ae385 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -613,7 +613,7 @@ extern tree block_chainon (tree, tree);
 extern void number_blocks (tree);
 
 /* cfun shouldn't be set directly; use one of these functions instead.  */
-extern void set_cfun (struct function *new_cfun);
+extern void set_cfun (struct function *new_cfun, bool force = false);
 extern void push_cfun (struct function *new_cfun);
 extern void pop_cfun (void);
 
diff --git a/gcc/ipa-inline-transform.c b/gcc/ipa-inline-transform.c
index 7725fadd6d8..a8e73cd6967 100644
--- a/gcc/ipa-inline-transform.c
+++ b/gcc/ipa-inline-transform.c
@@ -340,6 +340,8 @@ inline_call (struct cgraph_edge *e, bool update_original,
   if (DECL_FUNCTION_PERSONALITY (callee->decl))
 DECL_FUNCTION_PERSONALITY (to->decl)
   = DECL_FUNCTION_PERSONALITY (callee->decl);
+
+  bool reload_optimization_node = false;
   if (!opt_for_fn (callee->decl, flag_strict_aliasing)
   && opt_for_fn (to->decl, flag_strict_aliasing))
 {
@@ -352,6 +354,7 @@ inline_call (struct cgraph_edge *e, bool update_original,
 		 to->name (), to->order);
   DECL_FUNCTION_SPECIFIC_OPTIMIZATION (to->decl)
 	 = build_optimization_node ();
+  reload_optimization_node = true;
 }
 
   inline_summary *caller_info = inline_summaries->get (to);
@@ -412,9 +415,14 @@ inline_call (struct cgraph_edge *e, bool update_original,
 		 callee->name (), callee->order, to->name (), to->order);
 	  DECL_FUNCTION_SPECIFIC_OPTIMIZATION (to->decl)
 	 = build_optimization_node ();
+	  reload_optimization_node = true;
 	}
 }
 
+  /* Reload global optimization flags.  */
+  if (reload_optimization_node && DECL_STRUCT_FUNCTION (to->decl) == cfun)
+set_cfun (cfun, true);
+
   /* If aliases are involved, redirect edge to the actual destination and
  possibly remove the aliases.  */
   if (e->callee != callee)
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr79043.c b/gcc/testsuite/gcc.c-torture/execute/pr79043.c
new file mode 100644
index 000..b7fcc8260dc
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr79043.c
@@ -0,0 +1,21 @@
+/* PR ipa/78791 */
+
+int val;
+
+int *ptr = 
+float *ptr2 = 
+
+static
+__attribute__((always_inline, optimize ("-fno-strict-aliasing")))
+typepun ()
+{
+  *ptr2=0;
+}
+
+main()
+{
+  *ptr=1;
+  typepun ();
+  if (*ptr)
+__builtin_abort ();
+}
-- 
2.11.0

Re: [PATCH 2/2] IPA ICF: make algorithm stable to survive -fcompare-debug

[Martin Liška]

On 01/10/2017 02:56 PM, Richard Biener wrote:

On Mon, Jan 9, 2017 at 4:05 PM, Martin Liška  wrote:

Second part of the patch does sorting of final congruence classes, it's groups
and items included in the groups according DECL_UID.

Both patches can bootstrap together on ppc64le-redhat-linux and survive 
regression tests.

Ready to be installed?


Minor nit:

+  auto_vec  classes;
+  for (hash_table::iterator it = m_classes.begin ();
+   it != m_classes.end (); ++it)
+classes.safe_push (*it);

use quick_push and reserve_exact m_classes.elements () elements for
the classes vector before.


Thanks for hint.



+
+  classes.qsort (sort_congruence_class_groups_by_decl_uid);

Ok with that change.


Installed as r244273.

Martin



Richard.



Martin

Re: [patch mips/gcc] add build-time and runtime options to disable or set madd.fmt type

[Yunqiang Su]

Hi, folks, any idea about this patch?

> 在 2016年12月24日，20:53，Yunqiang Su  写道：
> 
> By this patch, I add 
>build-time options:
> —with-madd4=unfused/fused/no
>runtime options:
> -mmadd4=unfused/fused/no
> 
> to disable or set madd.fmt type.
> 
> For MIPS r6 (TARGET_MIPS8000) and Loongson (TARGET_LOONGSON_3A), 
> it always generate fused madd.fmt or maddf.fmt.
> 
> diff --git a/gcc/config.gcc b/gcc/config.gcc
> index 7afbc54bc78..7176d4484f7 100644
> --- a/gcc/config.gcc
> +++ b/gcc/config.gcc
> @@ -3940,7 +3940,7 @@ case "${target}" in
>   ;;
> 
>   mips*-*-*)
> - supported_defaults="abi arch arch_32 arch_64 float fpu nan 
> fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci"
> + supported_defaults="abi arch arch_32 arch_64 float fpu nan 
> fp_32 odd_spreg_32 madd4 tune tune_32 tune_64 divide llsc mips-plt synci"
> 
>   case ${with_float} in
>   "" | soft | hard)
> @@ -3997,6 +3997,16 @@ case "${target}" in
>   exit 1
>   ;;
>   esac
> + 
> + case ${with_madd4} in
> + "" | fused | unfused | no)
> + # OK
> + ;;
> + *)
> + echo "Unknown madd4 type used in 
> --with-madd4=$with_madd4" 1>&2
> + exit 1
> + ;;
> + esac
> 
>   case ${with_abi} in
>   "" | 32 | o64 | n32 | 64 | eabi)
> @@ -4496,7 +4506,7 @@ case ${target} in
> esac
> 
> t=
> -all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 
> tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt 
> synci tls"
> +all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 
> tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 madd4 divide llsc 
> mips-plt synci tls"
> for option in $all_defaults
> do
>   eval "val=\$with_"`echo $option | sed s/-/_/g`
> diff --git a/gcc/config/mips/mips-opts.h b/gcc/config/mips/mips-opts.h
> index 40aa006bc4e..ea1e0ea5310 100644
> --- a/gcc/config/mips/mips-opts.h
> +++ b/gcc/config/mips/mips-opts.h
> @@ -34,6 +34,13 @@ enum mips_ieee_754_setting {
>   MIPS_IEEE_754_2008
> };
> 
> +/* Enumerates the setting of the -mmadd4 option.  */
> +enum mips_madd4_setting {
> +  MIPS_MADD4_DEFAULT,
> +  MIPS_MADD4_UNFUSED,
> +  MIPS_MADD4_FUSED,
> +  MIPS_MADD4_NO
> +};
> /* Enumerates the setting of the -mr10k-cache-barrier option.  */
> enum mips_r10k_cache_barrier_setting {
>   R10K_CACHE_BARRIER_NONE,
> diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
> index bb66c428dd1..e8ca94ac709 100644
> --- a/gcc/config/mips/mips.h
> +++ b/gcc/config/mips/mips.h
> @@ -863,6 +863,7 @@ struct mips_cpu_info {
>   
> ":%{!msoft-float:%{!msingle-float:%{!mfp*:%{!mmsa:-mfp%(VALUE)}" }, \
>   {"odd_spreg_32", "%{" OPT_ARCH32 ":%{!msoft-float:%{!msingle-float:" \
>  "%{!modd-spreg:%{!mno-odd-spreg:-m%(VALUE)}" }, \
> +  {"madd4", "%{!mmadd4=*:-mmadd4=%(VALUE)}" }, \
>   {"divide", "%{!mdivide-traps:%{!mdivide-breaks:-mdivide-%(VALUE)}}" }, \
>   {"llsc", "%{!mllsc:%{!mno-llsc:-m%(VALUE)}}" }, \
>   {"mips-plt", "%{!mplt:%{!mno-plt:-m%(VALUE)}}" }, \
> @@ -1056,11 +1057,12 @@ struct mips_cpu_info {
> 
> /* ISA has 4 operand fused madd instructions of the form
>'d = [+-] (a * b [+-] c)'.  */
> -#define ISA_HAS_FUSED_MADD4  TARGET_MIPS8000
> +#define ISA_HAS_FUSED_MADD4  (TARGET_MIPS8000 || TARGET_LOONGSON_3A || 
> (mips_madd4==MIPS_MADD4_FUSED))
> 
> /* ISA has 4 operand unfused madd instructions of the form
>'d = [+-] (a * b [+-] c)'.  */
> -#define ISA_HAS_UNFUSED_MADD4(ISA_HAS_FP4 && !TARGET_MIPS8000)
> +#define ISA_HAS_UNFUSED_MADD4(ISA_HAS_FP4 && !TARGET_MIPS8000 && 
> !TARGET_LOONGSON_3A && \
> + (mips_madd4!=MIPS_MADD4_FUSED) && (mips_madd4!=MIPS_MADD4_NO))
> 
> /* ISA has 3 operand r6 fused madd instructions of the form
>'c = c [+-] (a * b)'.  */
> diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt
> index 08dd83e14ce..0d9a6e4362e 100644
> --- a/gcc/config/mips/mips.opt
> +++ b/gcc/config/mips/mips.opt
> @@ -416,6 +416,23 @@ modd-spreg
> Target Report Mask(ODD_SPREG)
> Enable use of odd-numbered single-precision registers.
> 
> +mmadd4=
> +Target RejectNegative Joined Enum(mips_madd4_value) Var(mips_madd4) 
> Init(MIPS_MADD4_DEFAULT)
> +-mmadd4=TYPE Select madd.fmt/msub.fmt type.
> +
> +Enum
> +Name(mips_madd4_value) Type(int)
> +Known MIPS madd.fmt type settings (for use with the -mmadd4 options):
> +
> +EnumValue
> +Enum(mips_madd4_value) String(unfused) Value(MIPS_MADD4_UNFUSED)
> +
> +EnumValue
> +Enum(mips_madd4_value) String(fused) Value(MIPS_MADD4_FUSED)
> +
> +EnumValue
> +Enum(mips_madd4_value) String(no) Value(MIPS_MADD4_NO)
> +
> mframe-header-opt
> Target Report Var(flag_frame_header_optimization) Optimization
> Optimize frame 

Re: Fix compilation errors with libstdc++v3 for AVR target and allow --enable-libstdcxx

[Jonathan Wakely]

On 23/12/16 13:18 -0200, Felipe Magno de Almeida wrote:

On Fri, Dec 16, 2016 at 10:45 AM, Jonathan Wakely  wrote:

On 15/12/16 21:41 -0300, Felipe Magno de Almeida wrote:


Good point. Do you want me to update the patch with __men or go your way
with the wrapper?


Hello Jonathan,


I think my wrapper's too ugly :-)


:)


So please follow the same approach as for tm_mon (pass __mem to the
function, the copy it to tm_mon if there was no error). That adds a
write and a branch for every extracted field, which I hope shouldn't
have too much impact.


Please find it attached.


This has now been committed to trunk (with whitespace fixes) - thanks.

commit 1cf9a4be2647a9bb54e763b74fb09d5a21706bd6
Author: Jonathan Wakely 
Date:   Tue Jan 10 12:43:29 2017 +

Use temporary int objects to access struct tm members

Call _M_extract_* functions family through temporary int objects, so
it doesn't convert from lvalue to rvalue through a temporary in AVR
because of the incompatible types used in AVR-Libc.

This fixes compilation errors with AVR-Libc while compiling libstdc++
for AVR target.

2017-01-10  Felipe Magno de Almeida 

	* include/bits/locale_facets_nonio.tcc
	(time_get::_M_extract_via_format): Avoid compilation errors with
	non-standard struct tm.

diff --git a/libstdc++-v3/include/bits/locale_facets_nonio.tcc b/libstdc++-v3/include/bits/locale_facets_nonio.tcc
index 2fcf234..a449c41 100644
--- a/libstdc++-v3/include/bits/locale_facets_nonio.tcc
+++ b/libstdc++-v3/include/bits/locale_facets_nonio.tcc
@@ -659,30 +659,38 @@ _GLIBCXX_END_NAMESPACE_LDBL_OR_CXX11
 		  // Abbreviated weekday name [tm_wday]
 		  const char_type*  __days1[7];
 		  __tp._M_days_abbreviated(__days1);
-		  __beg = _M_extract_name(__beg, __end, __tm->tm_wday, __days1,
+		  __beg = _M_extract_name(__beg, __end, __mem, __days1,
 	  7, __io, __tmperr);
+		  if (!__tmperr)
+		__tm->tm_wday = __mem;
 		  break;
 		case 'A':
 		  // Weekday name [tm_wday].
 		  const char_type*  __days2[7];
 		  __tp._M_days(__days2);
-		  __beg = _M_extract_name(__beg, __end, __tm->tm_wday, __days2,
+		  __beg = _M_extract_name(__beg, __end, __mem, __days2,
 	  7, __io, __tmperr);
+		  if (!__tmperr)
+		__tm->tm_wday = __mem;
 		  break;
 		case 'h':
 		case 'b':
 		  // Abbreviated month name [tm_mon]
 		  const char_type*  __months1[12];
 		  __tp._M_months_abbreviated(__months1);
-		  __beg = _M_extract_name(__beg, __end, __tm->tm_mon, 
+		  __beg = _M_extract_name(__beg, __end, __mem,
 	  __months1, 12, __io, __tmperr);
+		  if (!__tmperr)
+		__tm->tm_mon = __mem;
 		  break;
 		case 'B':
 		  // Month name [tm_mon].
 		  const char_type*  __months2[12];
 		  __tp._M_months(__months2);
-		  __beg = _M_extract_name(__beg, __end, __tm->tm_mon, 
+		  __beg = _M_extract_name(__beg, __end, __mem,
 	  __months2, 12, __io, __tmperr);
+		  if (!__tmperr)
+		__tm->tm_mon = __mem;
 		  break;
 		case 'c':
 		  // Default time and date representation.
@@ -693,18 +701,22 @@ _GLIBCXX_END_NAMESPACE_LDBL_OR_CXX11
 		  break;
 		case 'd':
 		  // Day [01, 31]. [tm_mday]
-		  __beg = _M_extract_num(__beg, __end, __tm->tm_mday, 1, 31, 2,
+		  __beg = _M_extract_num(__beg, __end, __mem, 1, 31, 2,
 	 __io, __tmperr);
+		  if (!__tmperr)
+		__tm->tm_mday = __mem;
 		  break;
 		case 'e':
 		  // Day [1, 31], with single digits preceded by
 		  // space. [tm_mday]
 		  if (__ctype.is(ctype_base::space, *__beg))
-		__beg = _M_extract_num(++__beg, __end, __tm->tm_mday, 1, 9,
+		__beg = _M_extract_num(++__beg, __end, __mem, 1, 9,
 	   1, __io, __tmperr);
 		  else
-		__beg = _M_extract_num(__beg, __end, __tm->tm_mday, 10, 31,
+		__beg = _M_extract_num(__beg, __end, __mem, 10, 31,
 	   2, __io, __tmperr);
+		  if (!__tmperr)
+		__tm->tm_mday = __mem;
 		  break;
 		case 'D':
 		  // Equivalent to %m/%d/%y.[tm_mon, tm_mday, tm_year]
@@ -715,13 +727,17 @@ _GLIBCXX_END_NAMESPACE_LDBL_OR_CXX11
 		  break;
 		case 'H':
 		  // Hour [00, 23]. [tm_hour]
-		  __beg = _M_extract_num(__beg, __end, __tm->tm_hour, 0, 23, 2,
+		  __beg = _M_extract_num(__beg, __end, __mem, 0, 23, 2,
 	 __io, __tmperr);
+		  if (!__tmperr)
+		__tm->tm_hour = __mem;
 		  break;
 		case 'I':
 		  // Hour [01, 12]. [tm_hour]
-		  __beg = _M_extract_num(__beg, __end, __tm->tm_hour, 1, 12, 2,
+		  __beg = _M_extract_num(__beg, __end, __mem, 1, 12, 2,
 	 __io, __tmperr);
+		  if (!__tmperr)
+		__tm->tm_hour = __mem;
 		  break;
 		case 'm':
 		  // Month [01, 12]. [tm_mon]
@@ -732,8 +748,10 @@ _GLIBCXX_END_NAMESPACE_LDBL_OR_CXX11
 		  break;
 		case 'M':
 		  // Minute [00, 59]. [tm_min]
-		  __beg = _M_extract_num(__beg, __end, __tm->tm_min, 0, 59, 2,
+		  __beg = _M_extract_num(__beg, __end, __mem, 0, 59, 2,
 	 __io, __tmperr);
+		  if (!__tmperr)
+		__tm->tm_min = __mem;
 		  break;
 		case 

[PATCH] combine ignoring a check

[Nathan Sidwell]

This patch addresses an issue Nicolai found while browsing combine.c. 
He noticed some checking code that looked like:


  for (i = 0; i < NUM_ARGS; i++)
if (!cond)
  break;

  for (i = 0; i < NUM_ARGS; i++)
if (!other_cond)
  break;

  if (i == NUM_ARGS)
do_the_thing;

the intent is that both cond and other_cond are true for all args, but 
the first loop's negative result (i != NUM_ARGS) is being ignored.  This 
patch fixes that problem, and I took the opportunity to merge both loops 
into a single loop:

   ok = true;
   for (i = 0; ok && i < NUM_ARGS; i++)
 if (!cond || !other_cond)
   ok = false;
   if (ok)
 do_the_thing;

Segher commented on IRC that a single loop would be slower.  I disagree. 
 These days the optimizer is smart enough to turn that boolean logic 
into direct control flow, and a single loop is certainly smaller code (I 
checked).  The only case that might be faster would be an early out if 
the first loop resulted in a negative.  But I doubt that's significant, 
particularly as the first loop's check is the more expensive one and the 
second loops check is very cheap.


booted & tested on x86_64-linux.  Thanks to Nic for finding this problem 
and helping test it.


nathan
--
Nathan Sidwell
2017-01-10  Nathan Sidwell  
	Nicolai Stange  

	* combine.c (try_combine): Don't ignore result of overlap checking
	loop.  Combine overlap & asm check into single loop.

Index: combine.c
===
--- combine.c	(revision 244226)
+++ combine.c	(working copy)
@@ -2785,22 +2785,24 @@ try_combine (rtx_insn *i3, rtx_insn *i2,
 	 (Besides, reload can't handle output reloads for this.)
 
 	 The problem can also happen if the dest of I3 is a memory ref,
-	 if another dest in I2 is an indirect memory ref.  */
-  for (i = 0; i < XVECLEN (p2, 0); i++)
-	if ((GET_CODE (XVECEXP (p2, 0, i)) == SET
-	 || GET_CODE (XVECEXP (p2, 0, i)) == CLOBBER)
-	&& reg_overlap_mentioned_p (SET_DEST (PATTERN (i3)),
-	SET_DEST (XVECEXP (p2, 0, i
-	  break;
+	 if another dest in I2 is an indirect memory ref.
 
-  /* Make sure this PARALLEL is not an asm.  We do not allow combining
+	 Neither can this PARALLEL be not an asm.  We do not allow combining
 	 that usually (see can_combine_p), so do not here either.  */
-  for (i = 0; i < XVECLEN (p2, 0); i++)
-	if (GET_CODE (XVECEXP (p2, 0, i)) == SET
-	&& GET_CODE (SET_SRC (XVECEXP (p2, 0, i))) == ASM_OPERANDS)
-	  break;
+  bool ok = true;
+  for (i = 0; ok && i < XVECLEN (p2, 0); i++)
+	{
+	  if ((GET_CODE (XVECEXP (p2, 0, i)) == SET
+	   || GET_CODE (XVECEXP (p2, 0, i)) == CLOBBER)
+	  && reg_overlap_mentioned_p (SET_DEST (PATTERN (i3)),
+	  SET_DEST (XVECEXP (p2, 0, i
+	ok = false;
+	  else if (GET_CODE (XVECEXP (p2, 0, i)) == SET
+		   && GET_CODE (SET_SRC (XVECEXP (p2, 0, i))) == ASM_OPERANDS)
+	ok = false;
+	}
 
-  if (i == XVECLEN (p2, 0))
+  if (ok)
 	for (i = 0; i < XVECLEN (p2, 0); i++)
 	  if (GET_CODE (XVECEXP (p2, 0, i)) == SET
 	  && SET_DEST (XVECEXP (p2, 0, i)) == SET_SRC (PATTERN (i3)))

Re: [PATCH 2/2] IPA ICF: make algorithm stable to survive -fcompare-debug

[Richard Biener]

On Mon, Jan 9, 2017 at 4:05 PM, Martin Liška  wrote:
> Second part of the patch does sorting of final congruence classes, it's groups
> and items included in the groups according DECL_UID.
>
> Both patches can bootstrap together on ppc64le-redhat-linux and survive 
> regression tests.
>
> Ready to be installed?

Minor nit:

+  auto_vec  classes;
+  for (hash_table::iterator it = m_classes.begin ();
+   it != m_classes.end (); ++it)
+classes.safe_push (*it);

use quick_push and reserve_exact m_classes.elements () elements for
the classes vector before.

+
+  classes.qsort (sort_congruence_class_groups_by_decl_uid);

Ok with that change.

Richard.


> Martin

Re: [PATCH 9d] Don't call delete_tree_ssa for __RTL functions

[Richard Biener]

On Tue, Jan 10, 2017 at 3:38 AM, David Malcolm  wrote:
> gcc/ChangeLog:
> * final.c (rest_of_clean_state): Don't call delete_tree_ssa for
> __RTL functions.

Heh, so you are lucky that nothing looks at this.  MEM_EXPRs can
contain SSA names
these days (for points-to info), but I suppose you don't parse
MEM_EXPRs fully yet.

I'm somewhat inclined to tell you calling init_tree_ssa () for __RTL
functions...

Richard.

> ---
>  gcc/final.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/final.c b/gcc/final.c
> index 8a4c9f8..2483381 100644
> --- a/gcc/final.c
> +++ b/gcc/final.c
> @@ -4699,7 +4699,8 @@ rest_of_clean_state (void)
>
>free_bb_for_insn ();
>
> -  delete_tree_ssa (cfun);
> +  if (cfun->gimple_df)
> +delete_tree_ssa (cfun);
>
>/* We can reduce stack alignment on call site only when we are sure that
>   the function body just produced will be actually used in the final
> --
> 1.8.5.3
>

Re: [PATCH 9b] Don't assume that copy tables were initialized

[Richard Biener]

On Tue, Jan 10, 2017 at 3:38 AM, David Malcolm  wrote:
> gcc/ChangeLog:
> * cfg.c (original_copy_tables_initialized_p): New function.
> * cfg.h (original_copy_tables_initialized_p): New decl.
> * cfgrtl.c (relink_block_chain): Guard the call to
> free_original_copy_tables with a call to
> original_copy_tables_initialized_p.

Ok.

Richard.

> ---
>  gcc/cfg.c| 9 +
>  gcc/cfg.h| 1 +
>  gcc/cfgrtl.c | 3 ++-
>  3 files changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/gcc/cfg.c b/gcc/cfg.c
> index 97cc755..f30b680 100644
> --- a/gcc/cfg.c
> +++ b/gcc/cfg.c
> @@ -1094,6 +1094,15 @@ free_original_copy_tables (void)
>original_copy_bb_pool = NULL;
>  }
>
> +/* Return true iff we have had a call to initialize_original_copy_tables
> +   without a corresponding call to free_original_copy_tables.  */
> +
> +bool
> +original_copy_tables_initialized_p (void)
> +{
> +  return original_copy_bb_pool != NULL;
> +}
> +
>  /* Removes the value associated with OBJ from table TAB.  */
>
>  static void
> diff --git a/gcc/cfg.h b/gcc/cfg.h
> index d421d3b..b44f1e1 100644
> --- a/gcc/cfg.h
> +++ b/gcc/cfg.h
> @@ -110,6 +110,7 @@ extern void scale_bbs_frequencies_gcov_type (basic_block 
> *, int, gcov_type,
>  extern void initialize_original_copy_tables (void);
>  extern void reset_original_copy_tables (void);
>  extern void free_original_copy_tables (void);
> +extern bool original_copy_tables_initialized_p (void);
>  extern void set_bb_original (basic_block, basic_block);
>  extern basic_block get_bb_original (basic_block);
>  extern void set_bb_copy (basic_block, basic_block);
> diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
> index 7604346..b3b1146 100644
> --- a/gcc/cfgrtl.c
> +++ b/gcc/cfgrtl.c
> @@ -3646,7 +3646,8 @@ relink_block_chain (bool stay_in_cfglayout_mode)
>/* Maybe reset the original copy tables, they are not valid anymore
>   when we renumber the basic blocks in compact_blocks.  If we are
>   are going out of cfglayout mode, don't re-allocate the tables.  */
> -  free_original_copy_tables ();
> +  if (original_copy_tables_initialized_p ())
> +free_original_copy_tables ();
>if (stay_in_cfglayout_mode)
>  initialize_original_copy_tables ();
>
> --
> 1.8.5.3
>

Re: [PATCH] Tree-level fix for PR 69526

[Robin Dapp]

Perhaps I'm still missing how some cases are handled or not handled,
sorry for the noise.

> I'm not sure there is anything to "interpret" -- the operation is unsigned
> and overflow is when the operation may wrap around zero.  There might
> be clever ways of re-writing the expression to
> (uint64_t)((uint32_t)((int32_t)uint32 + -1) + 1)
> avoiding the overflow and thus allowing the transform but I'm not sure that's
> good.

The extra work I introduced was to discern between

 (uint64_t)(a + UINT_MAX) + 1  -> (uint64_t)(a),
 (uint64_t)(a + UINT_MAX) + 1  -> (uint64_t)(a) + (uint64_t)(UINT_MAX + 1),

For a's range of [1,1] there is an overflow in both cases.
We still want to simplify the first case by combining UINT_MAX + 1 -> 0.
If "interpreting" UINT_MAX as -1 is not the correct thing to do, perhaps
(uint64_t)((uint32_t)(UINT_MAX + 1)) is? This fails, however, if the
outer constant is larger than UINT_MAX. What else can we do here?
Do we see cases like the second one at all? If it's not needed, the
extra work is likely not needed.

> A related thing would be canonicalizing unsigned X plus CST to
> unsigned X minus CST'
> if CST' has a smaller absolute value than CST.  I think currently we
> simply canonicalize
> to 'plus CST' but also only in fold-const.c, not in match.pd (ah we
> do, but only in a simplified manner).

I can imagine this could simplify the treatment of some cases, yet I'm
already a bit lost with the current cases :)

> That said, can we leave that "trick" out of the patch?  I think your
> more complicated
> "overflows" result from extract_range_from_binary_expr_1 doesn't apply to all
> ops (like MULT_EXPR where more complicated cases can arise).

There is certainly additional work to be done for MULT_EXPR, I
disregarded it so far. For this patch, I'd rather conservatively assume
overflow.

Regards
 Robin

Re: [PATCH] Do not error when -E provided (PR pch/78970).

[Jakub Jelinek]

On Tue, Jan 10, 2017 at 02:32:07PM +0100, Martin Liška wrote:
> On 01/09/2017 04:12 PM, Jakub Jelinek wrote:
> > Was ?
> > 
> > Ok with that change.
> > 
> > Jakub
> 
> Thanks for review, installed as r244227.
> 
> I've finished testing for both active branches, may I install the patch?

Ok.

Jakub

Re: [PATCH] Do not error when -E provided (PR pch/78970).

[Martin Liška]

On 01/09/2017 04:12 PM, Jakub Jelinek wrote:

Was ?

Ok with that change.

Jakub


Thanks for review, installed as r244227.

I've finished testing for both active branches, may I install the patch?

Martin

Re: [gomp4] remove GOVD_USE_DEVPTR

[Thomas Schwinge]

Hi!

On Mon, 7 Nov 2016 12:45:43 -0800, Cesar Philippidis  
wrote:
> It looks like gomp-4_0-branch was using the GOVD_USE_DEVPTR attribute [...]
> I've applied this patch remove GOVD_USE_DEVPTR from gomp4.

I'm seeing:

[...]/gcc/gimplify.c: In function 'int 
gimplify_adjust_omp_clauses_1(splay_tree_node, void*)':
[...]/gcc/gimplify.c:8053:24: warning: unused variable 'on' 
[-Wunused-variable]
splay_tree_node on
^

Committed to gomp-4_0-branch in r244266:

commit 72aa2b2728e84aff6ac882f366d1c4ed924b906b
Author: tschwinge 
Date:   Tue Jan 10 13:27:11 2017 +

Remove unused variables

gcc/
* gimplify.c (gimplify_adjust_omp_clauses_1): Clean up.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gomp-4_0-branch@244266 
138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog.gomp |  2 ++
 gcc/gimplify.c | 10 +-
 2 files changed, 3 insertions(+), 9 deletions(-)

diff --git gcc/ChangeLog.gomp gcc/ChangeLog.gomp
index c8a13d5..006ce81 100644
--- gcc/ChangeLog.gomp
+++ gcc/ChangeLog.gomp
@@ -1,5 +1,7 @@
 2017-01-10  Thomas Schwinge  
 
+   * gimplify.c (gimplify_adjust_omp_clauses_1): Clean up.
+
Backport from gcc-6-branch r244264:
2017-01-10  Thomas Schwinge  
 
diff --git gcc/gimplify.c gcc/gimplify.c
index 1e82a71..057fe0e 100644
--- gcc/gimplify.c
+++ gcc/gimplify.c
@@ -8064,15 +8064,7 @@ gimplify_adjust_omp_clauses_1 (splay_tree_node n, void 
*data)
  OMP_CLAUSE_CHAIN (clause) = nc;
}
   else
-   {
- if (gimplify_omp_ctxp->outer_context)
-   {
- struct gimplify_omp_ctx *ctx = gimplify_omp_ctxp->outer_context;
- splay_tree_node on
-   = splay_tree_lookup (ctx->variables, (splay_tree_key) decl);
-   }
- OMP_CLAUSE_SIZE (clause) = DECL_SIZE_UNIT (decl);
-   }
+   OMP_CLAUSE_SIZE (clause) = DECL_SIZE_UNIT (decl);
 }
   if (code == OMP_CLAUSE_FIRSTPRIVATE && (flags & GOVD_LASTPRIVATE) != 0)
 {


Grüße
 Thomas

Re: [gomp4] remove GOVD_USE_DEVPTR

[Thomas Schwinge]

Hi!

On Mon, 7 Nov 2016 12:45:43 -0800, Cesar Philippidis  
wrote:
> It looks like gomp-4_0-branch was using the GOVD_USE_DEVPTR attribute [...]
> I've applied this patch remove GOVD_USE_DEVPTR from gomp4.

> 2016-11-07  Cesar Philippidis  
> 
>   gcc/fortran/
>   * openmp.c (gfc_match_omp_map_clause): New common_block argument.
>   [...]

That's a different patch, gomp-4_0-branch r240165.  Here is the correct
one, gomp-4_0-branch r241933:

commit 5f6e13b2084c0d037504b4c6c82008246c5f6f6d
Author: cesar 
Date:   Mon Nov 7 20:30:34 2016 +

gcc/
* gimplify.c (enum gimplify_omp_var_data): Remove stale
GOVD_USE_DEVPTR.
(gimplify_scan_omp_clauses): Likewise.
(gimplify_adjust_omp_clauses_1): Likewise.

gcc/testsuite/
* c-c++-common/goacc/deviceptr-4.c: Adjust testcase.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gomp-4_0-branch@241933 
138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog.gomp | 7 +++
 gcc/gimplify.c | 7 ---
 gcc/testsuite/ChangeLog.gomp   | 4 
 gcc/testsuite/c-c++-common/goacc/deviceptr-4.c | 2 +-
 4 files changed, 12 insertions(+), 8 deletions(-)

diff --git gcc/ChangeLog.gomp gcc/ChangeLog.gomp
index ab229b6..d36b8f8 100644
--- gcc/ChangeLog.gomp
+++ gcc/ChangeLog.gomp
@@ -1,3 +1,10 @@
+2016-11-07  Cesar Philippidis  
+
+   * gimplify.c (enum gimplify_omp_var_data): Remove stale
+   GOVD_USE_DEVPTR.
+   (gimplify_scan_omp_clauses): Likewise.
+   (gimplify_adjust_omp_clauses_1): Likewise.
+
 2016-10-28  Cesar Philippidis  
 
* config/nvptx/nvptx.c (nvptx_single): Use a single predicate
diff --git gcc/gimplify.c gcc/gimplify.c
index 0168df5..2c25a2e 100644
--- gcc/gimplify.c
+++ gcc/gimplify.c
@@ -93,9 +93,6 @@ enum gimplify_omp_var_data
   /* Flag for GOVD_MAP, if it is a forced mapping.  */
   GOVD_MAP_FORCE = 262144,
 
-  /* OpenACC deviceptr clause.  */
-  GOVD_USE_DEVPTR = 524288,
-
   GOVD_DATA_SHARE_CLASS = (GOVD_SHARED | GOVD_PRIVATE | GOVD_FIRSTPRIVATE
   | GOVD_LASTPRIVATE | GOVD_REDUCTION | GOVD_LINEAR
   | GOVD_LOCAL)
@@ -7307,8 +7304,6 @@ gimplify_scan_omp_clauses (tree *list_p, gimple_seq 
*pre_p,
  if (OMP_CLAUSE_MAP_KIND (c) == GOMP_MAP_ALWAYS_TO
  || OMP_CLAUSE_MAP_KIND (c) == GOMP_MAP_ALWAYS_TOFROM)
flags |= GOVD_MAP_ALWAYS_TO;
- else if (OMP_CLAUSE_MAP_KIND (c) == GOMP_MAP_FORCE_DEVICEPTR)
-   flags |= GOVD_USE_DEVPTR;
  goto do_add;
 
case OMP_CLAUSE_DEPEND:
@@ -8057,8 +8052,6 @@ gimplify_adjust_omp_clauses_1 (splay_tree_node n, void 
*data)
  struct gimplify_omp_ctx *ctx = gimplify_omp_ctxp->outer_context;
  splay_tree_node on
= splay_tree_lookup (ctx->variables, (splay_tree_key) decl);
- if (on && (on->value & GOVD_USE_DEVPTR))
-   OMP_CLAUSE_SET_MAP_KIND (clause, GOMP_MAP_FORCE_PRESENT);
}
  OMP_CLAUSE_SIZE (clause) = DECL_SIZE_UNIT (decl);
}
diff --git gcc/testsuite/ChangeLog.gomp gcc/testsuite/ChangeLog.gomp
index 5974bca..6050abe 100644
--- gcc/testsuite/ChangeLog.gomp
+++ gcc/testsuite/ChangeLog.gomp
@@ -1,3 +1,7 @@
+2016-11-07  Cesar Philippidis  
+
+   * c-c++-common/goacc/deviceptr-4.c: Adjust testcase.
+
 2016-10-05  Cesar Philippidis  
 
* gfortran.dg/goacc/tile-lowering.f95: Add more coverage.
diff --git gcc/testsuite/c-c++-common/goacc/deviceptr-4.c 
gcc/testsuite/c-c++-common/goacc/deviceptr-4.c
index 7962843..db1b916 100644
--- gcc/testsuite/c-c++-common/goacc/deviceptr-4.c
+++ gcc/testsuite/c-c++-common/goacc/deviceptr-4.c
@@ -8,4 +8,4 @@ subr (int *a)
   a[0] += 1.0;
 }
 
-/* { dg-final { scan-tree-dump-times "#pragma omp target 
oacc_parallel.*map\\(force_present:a" 1 "gimple" } } */
+/* { dg-final { scan-tree-dump-times "#pragma omp target 
oacc_parallel.*map\\(tofrom:a" 1 "gimple" } } */

Re: [PATCH v2] PR sanitizer/78992: Fix sigaction definition on 32-bit sparc

[Jakub Jelinek]

On Tue, Jan 10, 2017 at 01:19:32PM +, James Clarke wrote:
> libsanitizer:
>   PR sanitizer/78992
>   * sanitizer_common/sanitizer_platform_limits_posix.h
>   (struct __sanitizer_sigaction): Cherry-pick upstream r291561.

Ok, thanks.

> ---
>  libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h | 7 +--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h 
> b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
> index 066bf41ffef..c139322839a 100644
> --- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
> +++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
> @@ -633,9 +633,12 @@ namespace __sanitizer {
>  #ifndef __mips__
>  #if defined(__sparc__)
>  #if __GLIBC_PREREQ (2, 20)
> -// On sparc glibc 2.19 and earlier sa_flags was unsigned long, and
> -// __glibc_reserved0 didn't exist.
> +// On sparc glibc 2.19 and earlier sa_flags was unsigned long.
> +#if defined(__arch64__)
> +// To maintain ABI compatibility on sparc64 when switching to an int,
> +// __glibc_reserved0 was added.
>  int __glibc_reserved0;
> +#endif
>  int sa_flags;
>  #else
>  unsigned long sa_flags;
> -- 
> 2.11.0

Jakub

[PATCH v2] PR sanitizer/78992: Fix sigaction definition on 32-bit sparc

[James Clarke]

libsanitizer:
PR sanitizer/78992
* sanitizer_common/sanitizer_platform_limits_posix.h
(struct __sanitizer_sigaction): Cherry-pick upstream r291561.
---
 libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h 
b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
index 066bf41ffef..c139322839a 100644
--- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
@@ -633,9 +633,12 @@ namespace __sanitizer {
 #ifndef __mips__
 #if defined(__sparc__)
 #if __GLIBC_PREREQ (2, 20)
-// On sparc glibc 2.19 and earlier sa_flags was unsigned long, and
-// __glibc_reserved0 didn't exist.
+// On sparc glibc 2.19 and earlier sa_flags was unsigned long.
+#if defined(__arch64__)
+// To maintain ABI compatibility on sparc64 when switching to an int,
+// __glibc_reserved0 was added.
 int __glibc_reserved0;
+#endif
 int sa_flags;
 #else
 unsigned long sa_flags;
-- 
2.11.0

Re: [PR tree-optimization/78024] Clear basic block flags before using BB_VISITED for OpenACC loops processing

[Thomas Schwinge]

Hi!

On Wed, 19 Oct 2016 12:28:39 +0200, I wrote:
> [PR tree-optimization/78024] Clear basic block flags before using 
> BB_VISITED for OpenACC loops processing

To fix the same problem, committed the following to gcc-6-branch in
r244264:

commit 82f25a52380b366a99af8045fb615d79d4ff94b6
Author: tschwinge 
Date:   Tue Jan 10 13:00:31 2017 +

[PR tree-optimization/78024] Clear basic block flags before using 
BB_VISITED for OpenACC loops processing

gcc/
PR tree-optimization/78024
* omp-low.c (oacc_loop_discovery): Call clear_bb_flags.

Backport from trunk r241334:

gcc/testsuite/
2016-10-19  Thomas Schwinge  

PR tree-optimization/78024
* gcc.dg/goacc/loop-processing-1.c: New file.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-6-branch@244264 
138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog  |  3 +++
 gcc/omp-low.c  |  9 +
 gcc/testsuite/ChangeLog|  8 
 gcc/testsuite/gcc.dg/goacc/loop-processing-1.c | 18 ++
 4 files changed, 34 insertions(+), 4 deletions(-)

diff --git gcc/ChangeLog gcc/ChangeLog
index 86b7f1b..5e7b2fc 100644
--- gcc/ChangeLog
+++ gcc/ChangeLog
@@ -1,5 +1,8 @@
 2017-01-10  Thomas Schwinge  
 
+   PR tree-optimization/78024
+   * omp-low.c (oacc_loop_discovery): Call clear_bb_flags.
+
Backport trunk r239086:
2016-08-03  Nathan Sidwell  
 
diff --git gcc/omp-low.c gcc/omp-low.c
index 15ecb44..57a03df 100644
--- gcc/omp-low.c
+++ gcc/omp-low.c
@@ -19225,7 +19225,9 @@ oacc_loop_sibling_nreverse (oacc_loop *loop)
 static oacc_loop *
 oacc_loop_discovery ()
 {
-  basic_block bb;
+  /* Clear basic block flags, in particular BB_VISITED which we're going to use
+ in the following.  */
+  clear_bb_flags ();
   
   oacc_loop *top = new_oacc_loop_outer (current_function_decl);
   oacc_loop_discover_walk (top, ENTRY_BLOCK_PTR_FOR_FN (cfun));
@@ -19234,9 +19236,8 @@ oacc_loop_discovery ()
  that diagnostics come out in an unsurprising order.  */
   top = oacc_loop_sibling_nreverse (top);
 
-  /* Reset the visited flags.  */
-  FOR_ALL_BB_FN (bb, cfun)
-bb->flags &= ~BB_VISITED;
+  /* Clear basic block flags again.  */
+  clear_bb_flags ();
 
   return top;
 }
diff --git gcc/testsuite/ChangeLog gcc/testsuite/ChangeLog
index 391941f..df035a5 100644
--- gcc/testsuite/ChangeLog
+++ gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2017-01-10  Thomas Schwinge  
+
+   Backport from trunk r241334:
+   2016-10-19  Thomas Schwinge  
+
+   PR tree-optimization/78024
+   * gcc.dg/goacc/loop-processing-1.c: New file.
+
 2017-01-09  Andre Vieira 
 
Backport from mainline
diff --git gcc/testsuite/gcc.dg/goacc/loop-processing-1.c 
gcc/testsuite/gcc.dg/goacc/loop-processing-1.c
new file mode 100644
index 000..2064bcd
--- /dev/null
+++ gcc/testsuite/gcc.dg/goacc/loop-processing-1.c
@@ -0,0 +1,18 @@
+/* Make sure that OpenACC loop processing happens.  */
+/* { dg-additional-options "-O2 -fdump-tree-oaccdevlow" } */
+
+extern int place ();
+
+void vector_1 (int *ary, int size)
+{
+#pragma acc parallel num_workers (32) vector_length(32) copy(ary[0:size]) 
firstprivate (size)
+  {
+#pragma acc loop gang
+for (int jx = 0; jx < 1; jx++)
+#pragma acc loop auto
+  for (int ix = 0; ix < size; ix++)
+   ary[ix] = place ();
+  }
+}
+
+/* { dg-final { scan-tree-dump "OpenACC loops.*Loop 0\\\(0\\\).*Loop 
14\\\(1\\\).*\\\.data_dep\\\.\[0-9_\]+ = UNIQUE \\\(\[0-9\]+, 0, 1, 
20\\\);.*Head-0:.*\\\.data_dep\\\.\[0-9_\]+ = UNIQUE \\\(\[0-9\]+, 0, 1, 
20\\\);.*\\\.data_dep\\\.\[0-9_\]+ = UNIQUE \\\(\[0-9\]+, 
\\\.data_dep\\\.\[0-9_\]+, 0\\\);.*Tail-0:.*\\\.data_dep\\\.\[0-9_\]+ = UNIQUE 
\\\(\[0-9\]+, \\\.data_dep\\\.\[0-9_\]+, 1\\\);.*\\\.data_dep\\\.\[0-9_\]+ = 
UNIQUE \\\(\[0-9\]+, \\\.data_dep\\\.\[0-9_\]+, 0\\\);.*Loop 
6\\\(4\\\).*\\\.data_dep\\\.\[0-9_\]+ = UNIQUE \\\(\[0-9\]+, 0, 1, 
6\\\);.*Head-0:.*\\\.data_dep\\\.\[0-9_\]+ = UNIQUE \\\(\[0-9\]+, 0, 1, 
6\\\);.*\\\.data_dep\\\.\[0-9_\]+ = UNIQUE \\\(\[0-9\]+, 
\\\.data_dep\\\.\[0-9_\]+, 2\\\);.*Tail-0:.*\\\.data_dep\\\.\[0-9_\]+ = UNIQUE 
\\\(\[0-9\]+, \\\.data_dep\\\.\[0-9_\]+, 1\\\);.*\\\.data_dep\\\.\[0-9_\]+ = 
UNIQUE \\\(\[0-9\]+, \\\.data_dep\\\.\[0-9_\]+, 2\\\);" "oaccdevlow" } } */

..., and to gomp-4_0-branch in r244265:

commit 3b218c043a68883431fc5f3497d4e43137db8d8b
Author: tschwinge 
Date:   Tue Jan 10 13:02:00 2017 +

[PR tree-optimization/78024] Clear basic block flags before using 
BB_VISITED for OpenACC loops processing

Backport from gcc-6-branch r244264:

Re: [PATCH][x86_64] Enable AVX512 VPOPCNTD/VPOPCNTQ instructions

[Kirill Yukhin]

On 10 Jan 15:00, Andrew Senkevich wrote:
> 2017-01-10 13:31 GMT+03:00 Uros Bizjak :
> > On Tue, Jan 10, 2017 at 11:21 AM, Andrew Senkevich
> >  wrote:
> >> 2017-01-10 13:04 GMT+03:00 Kirill Yukhin :
> >>> Hi,
> >>> In addition to Uroš's inputs:
>  diff --git a/gcc/config/i386/avx512vpopcntdqintrin.h
>  b/gcc/config/i386/avx512vpopcntdqintrin.h
>  new file mode 100644
>  index 000..28305f6
>  --- /dev/null
>  +++ b/gcc/config/i386/avx512vpopcntdqintrin.h
>  @@ -0,0 +1,90 @@
>  +/* Copyright (C) 2016 Free Software Foundation, Inc.
> >>> Pls, fix year.
> >>>
> >>> Pattern should perfectly fit into subst infra.
> >>
> >> Indeed, patch attached.
> >> Changelogs will be fixed accordingly.
> >
> > Patch is OK for mainline.
>
> Thanks!
>
> Attached with updated ChangeLogs.
> Kirill, could you commit please?
Done.

Also, could you pls implement runtime test cases for new intrinsics.

--
Thanks, K

Re: Pretty printers for versioned namespace

[Jonathan Wakely]

On 09/01/17 21:25 +0100, François Dumont wrote:

On 04/01/2017 13:52, Jonathan Wakely wrote:

On 24/12/16 14:47 +0100, François Dumont wrote:

I'd prefer not to have to use the regex matches in libstdc++.exp as
they complicate things.

For the two examples above, the whatis results are bad even for the
non-versioned namespace. For specializations of basic_string we only
have type printers that recognize the standard typedefs like
std::u16string, but not other specializations. We really want it to
show std::basic_string not the full name. That would
require a TemplateTypePrinter for basic_string. The attached patch
works, and should be easy to incorporate into your changes for the
versioned namespace.


+add_one_template_type_printer(obj, 'basic_string',
+'basic_string<((un)?signed char), std::char_traits<\\1 ?>, 
std::allocator<\\1 ?> >',
+'basic_string<{1}>')
+

I had consider a similar approach but more generic like:

+add_one_template_type_printer(obj, 'basic_string',
+'basic_string<(.*)?, std::char_traits<\\1 ?>, std::allocator<\\1 ?> 
>',
+'basic_string<{1}>')
+


but it had bad effect on rendering of std::string type so I give up on this 
approach. Your version is indeed enough to cover not too exotic instantiations 
of std::basic_string.


Yes, I tried that first as well.


I also updated 48362.cc test case as this test was already adapted for 
versioned namespace. But I had to keep one occurence of '__7' when displaying 
types inside a tuple. I think it is ok.


Yes, I think so too.


Tested with versioned namespace. Is it ok to commit after I completed tests 
without versioned namespace ?


I've committed the attached patch, which passes the tests for the
default configuration and the versioned namespace configuration.

I added another helper function, strip_versioned_namespace, which is
more expressive than doing typename.replace(vers_nsp, '') everywhere.
I've also renamed vers_nsp to _versioned_namespace (using the naming
convention for global variables private to the module). I've added
checks so that if that variable is None then the extra printers and
special cases for the versioned namespace are skipped. That's not
currently used, but it would allow us to optimise things later if
needed.

I also needed to update the new SharedPtrMethodsMatcher to add
"(__\d+)?" to the regular expression.



@@ -1392,47 +1406,54 @@ def register_type_printers(obj):
add_one_type_printer(obj, 'discard_block_engine', 'ranlux48')
add_one_type_printer(obj, 'shuffle_order_engine', 'knuth_b')

+# Consider optional versioned namespace
+opt_nsp = '(' + vers_nsp + ')?'
+
# Do not show defaulted template arguments in class templates
add_one_template_type_printer(obj, 'unique_ptr',
-'unique_ptr<(.*), std::default_delete<\\1 ?> >',
-'unique_ptr<{1}>')
+'{0}unique_ptr<(.*), std::{0}default_delete<\\2 ?> >'.format(opt_nsp),
+'unique_ptr<{2}>')


This is ugly. Mixing python string formatting with regular expressions
makes it harder to read, and is inconsistent with how the versioned
namespace is handled elsewhere. In Printer.add_version and
add_one_type_printer we just register two names, one using std:: and
one using std::__7::. We can do the same for the template type
printers.


@@ -1466,7 +1487,7 @@ def build_libstdcxx_dictionary ():
libstdcxx_printer = Printer("libstdc++-v6")

# For _GLIBCXX_BEGIN_NAMESPACE_VERSION.
-vers = '(__7::)?'
+vers = '(' + vers_nsp + ')?'
# For _GLIBCXX_BEGIN_NAMESPACE_CONTAINER.
container = '(__cxx1998::' + vers + ')?'



These variables don't seem to be used, so can just be removed.

commit 6238b856776f1a86626f626009d28f4d29c119d8
Author: Jonathan Wakely 
Date:   Tue Jan 10 12:31:31 2017 +

Make Python printers and xmethods work with versioned namespace

2017-01-10  Fran??ois Dumont  
	Jonathan Wakely  

	* python/libstdcxx/v6/printers.py (_versioned_namespace): Define.
	(is_specialization, strip_versioned_namespace): New helpers functions
	to work with symbols in the versioned namespace.
	(Printer.add_version): Add second name using versioned namespace.
	(add_one_template_type_printer, add_one_type_printer): Add second
	type printers using versioned namespace.
	(register_type_printers): Add template type printer for basic_string.
	(build_libstdcxx_dictionary): Remove dead code.
	* python/libstdcxx/v6/xmethods.py: Make all matchers look for
	versioned namespace.
	* testsuite/libstdc++-prettyprinters/48362.cc: Adjust expected
	results.
	* testsuite/libstdc++-prettyprinters/whatis.cc: Likewise.

diff --git a/libstdc++-v3/python/libstdcxx/v6/printers.py b/libstdc++-v3/python/libstdcxx/v6/printers.py
index 7690a6b..36dd81d 100644
--- a/libstdc++-v3/python/libstdcxx/v6/printers.py
+++ 

Re: [patch] Fix wrong code for return of small aggregates on big-endian

[Eric Botcazou]

> They pass before the patch (I only checked armeb).

I think that's not true for aarch64_be though, since the patch doesn't change 
code generation for this target.  But I'll fix that too.

-- 
Eric Botcazou

Re: [PTX] fix worker propagation ICE

[Thomas Schwinge]

Hi!

On Wed, 3 Aug 2016 13:30:10 -0400, Nathan Sidwell  wrote:
> The PTX backend could ice when generating a state propagation sequence 
> entering 
> partitioned execution.  [...]

To fix the same problem, applying the same changes, committed the
following to gcc-6-branch in r244261:

commit 71f5a3c5007ba5bd398d978a56640b7163530ab5
Author: tschwinge 
Date:   Tue Jan 10 12:07:13 2017 +

[PTX] fix worker propagation ICE

Backport trunk r239086:

gcc/
2016-08-03  Nathan Sidwell  

* config/nvptx/nvptx.c (nvptx_declare_function_name): Round frame
size to DImode boundary.
(nvptx_propagate): Likewise.

libgomp/
2016-08-03  Nathan Sidwell  

* testsuite/libgomp.oacc-c-c++-common/crash-1.c: New.

Backport trunk r239125 'Make libgomp.oacc-c-c++-common/crash-1.c a "link" 
test,
and don't hardcode -O0':

libgomp/
2016-08-04  Thomas Schwinge  

* testsuite/libgomp.oacc-c-c++-common/crash-1.c: Make it a "link"
test, and don't hardcode -O0.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-6-branch@244261 
138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog  |  9 
 gcc/config/nvptx/nvptx.c   | 12 ++
 libgomp/ChangeLog  | 13 +++
 .../testsuite/libgomp.oacc-c-c++-common/crash-1.c  | 27 ++
 4 files changed, 57 insertions(+), 4 deletions(-)

diff --git gcc/ChangeLog gcc/ChangeLog
index 71b0742..86b7f1b 100644
--- gcc/ChangeLog
+++ gcc/ChangeLog
@@ -1,3 +1,12 @@
+2017-01-10  Thomas Schwinge  
+
+   Backport trunk r239086:
+   2016-08-03  Nathan Sidwell  
+
+   * config/nvptx/nvptx.c (nvptx_declare_function_name): Round frame
+   size to DImode boundary.
+   (nvptx_propagate): Likewise.
+
 2017-01-10  Chung-Ju Wu  
 
Backport from mainline
diff --git gcc/config/nvptx/nvptx.c gcc/config/nvptx/nvptx.c
index a6c90b6..2262005 100644
--- gcc/config/nvptx/nvptx.c
+++ gcc/config/nvptx/nvptx.c
@@ -989,11 +989,14 @@ nvptx_declare_function_name (FILE *file, const char 
*name, const_tree decl)
 init_frame (file, STACK_POINTER_REGNUM,
UNITS_PER_WORD, crtl->outgoing_args_size);
 
-  /* Declare a local variable for the frame.  */
+  /* Declare a local variable for the frame.  Force its size to be
+ DImode-compatible.  */
   HOST_WIDE_INT sz = get_frame_size ();
   if (sz || cfun->machine->has_chain)
 init_frame (file, FRAME_POINTER_REGNUM,
-   crtl->stack_alignment_needed / BITS_PER_UNIT, sz);
+   crtl->stack_alignment_needed / BITS_PER_UNIT,
+   (sz + GET_MODE_SIZE (DImode) - 1)
+   & ~(HOST_WIDE_INT)(GET_MODE_SIZE (DImode) - 1));
 
   /* Declare the pseudos we have as ptx registers.  */
   int maxregs = max_reg_num ();
@@ -3212,8 +3215,9 @@ nvptx_propagate (basic_block block, rtx_insn *insn, 
propagate_mask rw,
   rtx pred = NULL_RTX;
   rtx_code_label *label = NULL;
 
-  gcc_assert (!(fs & (GET_MODE_SIZE (DImode) - 1)));
-  fs /= GET_MODE_SIZE (DImode);
+  /* The frame size might not be DImode compatible, but the frame
+array's declaration will be.  So it's ok to round up here.  */
+  fs = (fs + GET_MODE_SIZE (DImode) - 1) / GET_MODE_SIZE (DImode);
   /* Detect single iteration loop. */
   if (fs == 1)
fs = 0;
diff --git libgomp/ChangeLog libgomp/ChangeLog
index 8841636..2e5f73b 100644
--- libgomp/ChangeLog
+++ libgomp/ChangeLog
@@ -1,3 +1,16 @@
+2017-01-10  Thomas Schwinge  
+
+   Backport trunk r239125:
+   2016-08-04  Thomas Schwinge  
+
+   * testsuite/libgomp.oacc-c-c++-common/crash-1.c: Make it a "link"
+   test, and don't hardcode -O0.
+
+   Backport trunk r239086:
+   2016-08-03  Nathan Sidwell  
+
+   * testsuite/libgomp.oacc-c-c++-common/crash-1.c: New.
+
 2016-12-21  Release Manager
 
* GCC 6.3.0 released.
diff --git libgomp/testsuite/libgomp.oacc-c-c++-common/crash-1.c 
libgomp/testsuite/libgomp.oacc-c-c++-common/crash-1.c
new file mode 100644
index 000..dcf1485
--- /dev/null
+++ libgomp/testsuite/libgomp.oacc-c-c++-common/crash-1.c
@@ -0,0 +1,27 @@
+/* { dg-do link } */
+
+/* For -O0, ICEd in nvptx backend due to unexpected frame size.  */
+#pragma acc routine worker
+void
+worker_matmul (int *c, int i)
+{
+  int j;
+
+#pragma acc loop
+  for (j = 0; j < 4; j++)
+c[j] = j;
+}
+
+
+int
+main ()
+{
+  int c[4];
+
+#pragma acc parallel 
+  {
+worker_matmul (c, 0);
+  }
+  
+  return 0;
+}


Grüße
 Thomas

Re: [Ada] Fix PR ada/78845

[Arnaud Charlet]

> >> 2016-12-21  Simon Wright   >> >
> >> 
> >>PR ada/78845
> >>* a-ngcoar.adb (Inverse): call Unit_Matrix with First_1 set to
> >>A'First(2)
> >>  and vice versa.
> >>* a-ngrear.adb (Inverse): likewise.
> 
> Can the patch be committed, please, when convenient?

Yes, will do it when convenient :-) Feel free to find someone with write
access in the meantime if you're in a hurry.

Arno

Re: [PATCH][x86_64] Enable AVX512 VPOPCNTD/VPOPCNTQ instructions

[Andrew Senkevich]

2017-01-10 13:31 GMT+03:00 Uros Bizjak :
> On Tue, Jan 10, 2017 at 11:21 AM, Andrew Senkevich
>  wrote:
>> 2017-01-10 13:04 GMT+03:00 Kirill Yukhin :
>>> Hi,
>>> In addition to Uroš's inputs:
 diff --git a/gcc/config/i386/avx512vpopcntdqintrin.h
 b/gcc/config/i386/avx512vpopcntdqintrin.h
 new file mode 100644
 index 000..28305f6
 --- /dev/null
 +++ b/gcc/config/i386/avx512vpopcntdqintrin.h
 @@ -0,0 +1,90 @@
 +/* Copyright (C) 2016 Free Software Foundation, Inc.
>>> Pls, fix year.
>>>
>>> Pattern should perfectly fit into subst infra.
>>
>> Indeed, patch attached.
>> Changelogs will be fixed accordingly.
>
> Patch is OK for mainline.

Thanks!

Attached with updated ChangeLogs.
Kirill, could you commit please?


--
WBR,
Andrew


avx512vpopcntdq_v3.patch
Description: Binary data

Re: [Ada] Fix PR ada/78845

[Simon Wright]

On 21 Dec 2016, at 14:52, Arnaud Charlet  wrote:
> 
>>> Yes, please resend an updated patch.
>> 
>> The function Ada.Numerics.Generic_Real_Arrays.Inverse is required
>> (ARM G.3.1(72)) to
>> return a matrix with the bounds of the dimension indices swapped, i.e.
>> result'Range(1) ==
>> input'Range(2) and vice versa. The present code gets result'Range(1)
>> correct, but
>> result'Range(2) always starts at 1.
>> 
>> Of course, many users would always use ranges starting at 1 and wouldn't see 
>> a
>> problem.
>> 
>> The same applies to Ada.Numerics.Complex_Real_Arrays.Inverse (ARM
>> G.3.2(140)).
> 
> Updated patch OK as well.
> 
>> 2016-12-21  Simon Wright  > >
>> 
>>  PR ada/78845
>>  * a-ngcoar.adb (Inverse): call Unit_Matrix with First_1 set to
>>  A'First(2)
>>and vice versa.
>>  * a-ngrear.adb (Inverse): likewise.

Can the patch be committed, please, when convenient?

(patch reposted below for convenience)




pr78845.diff
Description: Binary data

Re: [patch] Fix wrong code for return of small aggregates on big-endian

[Christophe Lyon]

On 10 January 2017 at 11:26, Eric Botcazou  wrote:
>> They pass before the patch (I only checked armeb).
>
> Thanks, I see what's going on, but can you post the configure line of armeb?
>
Sure, it is:
--target=armeb-none-linux-gnueabihf  --with-float=hard --with-mode=arm
--with-cpu=cortex-a9 --with-fpu=neon


> --
> Eric Botcazou

Re: [PATCH] Fix IPA CP where it forgot to add a reference in cgraph

[Martin Liška]

PING^1

On 12/20/2016 03:55 PM, Martin Liška wrote:

On 12/20/2016 11:06 AM, Martin Jambor wrote:

...this test should be for ADDR_EXPR here.  Or you could switch the
IPA_REF_* constants the other way round which I bet is going to have
the same effect in practice, but personally, I'd test for ADDR_EXPR.


Thanks for the note, fixed (and tested in second version of the patch).

Martin



Thanks,

Martin

[PATCH][ARM] [gcc] Add __artificial__ attribute to all NEON intrinsics

[Tamar Christina]

Hi all,

This patch adds the __artificial__ and __gnu_inline__
attributes to the intrinsics in arm_neon.h so that
costs are associated to the user function during profiling
and during debugging the intrinsics are hidden in trace.

A similar patch was already applied to Aarch64.

The artificial attribute does not affect code generation.
The functions are also changed from static to being extern
in order for the __gnu_inline__ function to not treat the
intrinsics as standalone functions.

No new tests for this since it would require a gdb test
but regression tests on arm-none-linux-gnueabi was performed.

The attribute was added with the following bash script:

#!/bin/bash

# first apply to the ones in #define blocks and add extra \ at the end
sed -i -r 's/(__inline.+)(__attribute__\s*)\(\((.+)\)\)\s*\\/\1\\\n\2 \(\(\3, 
__gnu_inline__,__artificial__\)\) \\/m' \
 gcc/config/arm/arm_neon.h

# Then write all normal functions
sed -i -r 's/(__inline.+)(__attribute__\s*)\(\((.+)\)\)/\1\n\2 \(\(\3, 
__gnu_inline__, __artificial__\)\)/m' \
 gcc/config/arm/arm_neon.h

# Then correct any trailing whitespaces we might have introduced
sed -i 's/[ \t]*$//' \
 gcc/config/arm/arm_neon.h

# And then finish up by correcting some attribute values which don't fit the 
patterns above.
sed -i -r 's/(__attribute__\s+)\(\((__always_inline__)\)\)\s+\\/\1\(\(\2, 
__gnu_inline__, __artificial__\)\) \\/m' \
 gcc/config/arm/arm_neon.h

# Replace static definitions with extern
sed -i -r 's/(__extension__\s+)static(.+)/\1extern\2/m' \
 gcc/config/arm/arm_neon.h


Ok for trunk?

Thanks,
Tamar

gcc/
2017-01-10  Tamar Christina  

* config/arm/arm_neon.h: Add __artificial__ and gnu_inline
  to all inlined functions, change static to extern.

arm-artificial.patch.xz
Description: arm-artificial.patch.xz

Re: [PATCH][x86_64] Enable AVX512 VPOPCNTD/VPOPCNTQ instructions

[Uros Bizjak]

On Tue, Jan 10, 2017 at 11:21 AM, Andrew Senkevich
 wrote:
> 2017-01-10 13:04 GMT+03:00 Kirill Yukhin :
>> Hi,
>> In addition to Uroš's inputs:
>>> diff --git a/gcc/config/i386/avx512vpopcntdqintrin.h
>>> b/gcc/config/i386/avx512vpopcntdqintrin.h
>>> new file mode 100644
>>> index 000..28305f6
>>> --- /dev/null
>>> +++ b/gcc/config/i386/avx512vpopcntdqintrin.h
>>> @@ -0,0 +1,90 @@
>>> +/* Copyright (C) 2016 Free Software Foundation, Inc.
>> Pls, fix year.
>>
>> Pattern should perfectly fit into subst infra.
>
> Indeed, patch attached.
> Changelogs will be fixed accordingly.

Patch is OK for mainline.

Thanks,
Uros.

Re: [patch] Fix wrong code for return of small aggregates on big-endian

[Eric Botcazou]

> They pass before the patch (I only checked armeb).

Thanks, I see what's going on, but can you post the configure line of armeb?

-- 
Eric Botcazou

Re: [PATCH][x86_64] Enable AVX512 VPOPCNTD/VPOPCNTQ instructions

[Andrew Senkevich]

2017-01-10 13:04 GMT+03:00 Kirill Yukhin :
> Hi,
> In addition to Uroš's inputs:
>> diff --git a/gcc/config/i386/avx512vpopcntdqintrin.h
>> b/gcc/config/i386/avx512vpopcntdqintrin.h
>> new file mode 100644
>> index 000..28305f6
>> --- /dev/null
>> +++ b/gcc/config/i386/avx512vpopcntdqintrin.h
>> @@ -0,0 +1,90 @@
>> +/* Copyright (C) 2016 Free Software Foundation, Inc.
> Pls, fix year.
>
> Pattern should perfectly fit into subst infra.

Indeed, patch attached.
Changelogs will be fixed accordingly.


avx512vpopcntdq_v2.patch
Description: Binary data

Re: [patch] Fix wrong code for return of small aggregates on big-endian

[Christophe Lyon]

On 10 January 2017 at 09:58, Eric Botcazou  wrote:
>> I have noticed new failures after this commit (r244249).
>> g++.dg/opt/call3.C fails at execution on armeb targets
>> g++.dg/opt/call2.C fails at execution on aarch64_be
>
> They are new testcases: can you find out whether they pass before the patch?
>
They pass before the patch (I only checked armeb).

> --
> Eric Botcazou

[PATCH] Fix PR79034

[Richard Biener]

I am testing the following patch to fix another case where call
shrink-wrapping fails to update PHIs properly.  The previous fix
missed the case where the destination contained a degenerate PHI
thus we can simply propagate those out.

Bootstrap and regtest running on x86_64-unknown-linux-gnu (for trunk
where the testcase doesn't show the latent issue).  I'll backport
later.

Richard.

2016-01-10  Richard Biener  

PR tree-optimization/79034
* tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
Propagate out degenerate PHIs in the joiner.

* g++.dg/torture/pr79034.C: New testcase.

Index: gcc/tree-call-cdce.c
===
--- gcc/tree-call-cdce.c(revision 244260)
+++ gcc/tree-call-cdce.c(working copy)
@@ -805,7 +805,18 @@ shrink_wrap_one_built_in_call_with_conds
   if (EDGE_COUNT (join_tgt_in_edge_from_call->dest->preds) > 1)
join_tgt_bb = split_edge (join_tgt_in_edge_from_call);
   else
-   join_tgt_bb = join_tgt_in_edge_from_call->dest;
+   {
+ join_tgt_bb = join_tgt_in_edge_from_call->dest;
+ /* We may have degenerate PHIs in the destination.  Propagate
+those out.  */
+ for (gphi_iterator i = gsi_start_phis (join_tgt_bb); !gsi_end_p (i);)
+   {
+ gphi *phi = i.phi ();
+ replace_uses_by (gimple_phi_result (phi),
+  gimple_phi_arg_def (phi, 0));
+ remove_phi_node (, true);
+   }
+   }
 }
   else
 {
Index: gcc/testsuite/g++.dg/torture/pr79034.C
===
--- gcc/testsuite/g++.dg/torture/pr79034.C  (nonexistent)
+++ gcc/testsuite/g++.dg/torture/pr79034.C  (working copy)
@@ -0,0 +1,52 @@
+/* { dg-do compile } */
+
+extern "C" {
+float sqrtf(float);
+}
+
+class T {
+public:
+float floats[1];
+
+inline float length() const {
+   return sqrtf(floats[0]);
+}
+};
+
+void destruct(void *);
+
+class Container {
+
+T Ts[1];
+
+public:
+~Container() {
+   destruct((void *)Ts);
+}
+
+T& operator[](int n) {
+   return Ts[0];
+}
+};
+
+void fill(Container&);
+
+void doit()
+{
+  Container data;
+  float max = 10;
+
+  int i, j, k;
+
+  for (i = 0; i < 10; i++) {
+  for (j = 1; j < 10; j++) {
+ if (max < 5)
+   break;
+ fill( data);
+ max = data[0].length();
+ for (k = 1; k < j; k++) {
+ max = 5;
+ }
+  }
+  }
+}

Re: [PATCH][x86_64] Enable AVX512 VPOPCNTD/VPOPCNTQ instructions

[Kirill Yukhin]

Hi,
In addition to Uroš's inputs:
> diff --git a/gcc/config/i386/avx512vpopcntdqintrin.h
> b/gcc/config/i386/avx512vpopcntdqintrin.h
> new file mode 100644
> index 000..28305f6
> --- /dev/null
> +++ b/gcc/config/i386/avx512vpopcntdqintrin.h
> @@ -0,0 +1,90 @@
> +/* Copyright (C) 2016 Free Software Foundation, Inc.
Pls, fix year.

Pattern should perfectly fit into subst infra.

On 27 Dec 14:59, Uros Bizjak wrote:
> On Tue, Dec 27, 2016 at 2:47 PM, Uros Bizjak  wrote:
> > On Tue, Dec 27, 2016 at 2:40 PM, Andrew Senkevich
> >  wrote:
> >> 2016-12-27 16:35 GMT+03:00 Uros Bizjak :
> >>> Hello!
> >>>
>  this patch enables AVX512 VPOPCNTD/VPOPCNTQ instructions recently
>  added in Instruction Set Extensions
>  (https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf).
> >>>
> >>> @@ -265,6 +268,9 @@
> >>>  (define_mode_iterator VF_512
> >>>[V16SF V8DF])
> >>>
> >>> +(define_mode_iterator VI_AVX512F
> >>> +  [V16SI V8DI])
> >>>
> >>> Please name this iterator VI_512.
> >>
> >> But there are already VI_512 :)
> >>
> >> ;; All 512bit vector integer modes
> >> (define_mode_iterator VI_512
> >>   [(V64QI "TARGET_AVX512BW")
> >>(V32HI "TARGET_AVX512BW")
> >>V16SI V8DI])
> >
> > Eh, this one is duplicate of VI_AVX512BW and should be removed.
>
> Actually, you should use existing VI48_512 mode iterator.
>
> Uros.

--
Thanks, K

last call predictor tweek

[Jan Hubicka]

Hi,
this is the last change to make call predictor match the statistical data.

Honza

PR middle-end/77484
* predict.def (PRED_CALL): Set to 67.
Index: predict.def
===
--- predict.def (revision 244259)
+++ predict.def (working copy)
@@ -116,7 +116,7 @@ DEF_PREDICTOR (PRED_TREE_OPCODE_NONEQUAL
 DEF_PREDICTOR (PRED_TREE_FPOPCODE, "fp_opcode (on trees)", HITRATE (90), 0)
 
 /* Branch guarding call is probably taken.  */
-DEF_PREDICTOR (PRED_CALL, "call", HITRATE (55), 0)
+DEF_PREDICTOR (PRED_CALL, "call", HITRATE (67), 0)
 
 /* PRED_CALL is not very reliable predictor and it turns out to be even
less reliable for indirect calls and polymorphic calls.  For spec2k6

[PATCH] nds32: Backport PR70668 solution from mainline

[Chung-Ju Wu]

Hi, all,

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70668
https://gcc.gnu.org/ml/gcc-patches/2016-04/msg01862.html

Thanks Stefan Reinauer to create this PR and
thanks Segher Boessenkool to fix the issue.

Now I backport the solution to gcc-6 and gcc-5 branches.
Committed as revision r244257 and r244258.
https://gcc.gnu.org/r244257
https://gcc.gnu.org/r244258


Best regards,
jasonwucj
Index: gcc/ChangeLog
===
--- gcc/ChangeLog   (revision 244256)
+++ gcc/ChangeLog   (working copy)
@@ -1,3 +1,12 @@
+2017-01-10  Chung-Ju Wu  
+
+   Backport from mainline
+   2016-04-28  Segher Boessenkool  
+
+   PR target/70668
+   * config/nds32/nds32.md (casesi): Don't access the operands array
+   out of bounds.
+
 2017-01-09  Andreas Tobler  
 
Backport from mainline
Index: gcc/config/nds32/nds32.md
===
--- gcc/config/nds32/nds32.md   (revision 244256)
+++ gcc/config/nds32/nds32.md   (working copy)
@@ -2289,11 +2289,9 @@
   emit_jump_insn (gen_cbranchsi4 (test, operands[0], operands[2],
  operands[4]));
 
-  operands[5] = gen_reg_rtx (SImode);
-  /* Step C, D, E, and F, using another temporary register operands[5].  */
-  emit_jump_insn (gen_casesi_internal (operands[0],
-  operands[3],
-  operands[5]));
+  /* Step C, D, E, and F, using another temporary register.  */
+  rtx tmp = gen_reg_rtx (SImode);
+  emit_jump_insn (gen_casesi_internal (operands[0], operands[3], tmp));
   DONE;
 })
 
Index: gcc/ChangeLog
===
--- gcc/ChangeLog   (revision 244256)
+++ gcc/ChangeLog   (working copy)
@@ -1,3 +1,12 @@
+2017-01-10  Chung-Ju Wu  
+
+   Backport from mainline
+   2016-04-28  Segher Boessenkool  
+
+   PR target/70668
+   * config/nds32/nds32.md (casesi): Don't access the operands array
+   out of bounds.
+
 2017-01-09  Andreas Tobler  
 
Backport from mainline
Index: gcc/config/nds32/nds32.md
===
--- gcc/config/nds32/nds32.md   (revision 244256)
+++ gcc/config/nds32/nds32.md   (working copy)
@@ -2288,11 +2288,9 @@
   emit_jump_insn (gen_cbranchsi4 (test, operands[0], operands[2],
  operands[4]));
 
-  operands[5] = gen_reg_rtx (SImode);
-  /* Step C, D, E, and F, using another temporary register operands[5].  */
-  emit_jump_insn (gen_casesi_internal (operands[0],
-  operands[3],
-  operands[5]));
+  /* Step C, D, E, and F, using another temporary register.  */
+  rtx tmp = gen_reg_rtx (SImode);
+  emit_jump_insn (gen_casesi_internal (operands[0], operands[3], tmp));
   DONE;
 })
 

Re: [patch] Fix wrong code for return of small aggregates on big-endian

[Eric Botcazou]

> I have noticed new failures after this commit (r244249).
> g++.dg/opt/call3.C fails at execution on armeb targets
> g++.dg/opt/call2.C fails at execution on aarch64_be

They are new testcases: can you find out whether they pass before the patch?

-- 
Eric Botcazou

[gomp4] Support multi-dimensional pointer based arrays in OpenACC data clauses

[Chung-Lin Tang]

This patch implements support for dynamically allocated multi-dimensional arrays
in OpenACC data clauses. To illustrate, these kinds of arrays now work:

int **a;
float *f[100];
double ***d;

#pragma acc parallel copy (a[0:100][x:y], f[10:20][0:30]) 
copyout(d[x:y][x:y][x:y])
{
 ...
}

The pointer-to-array-rows kind of case is supposedly also supported in the 
OpenACC
spec (e.g. int (*x)[50]), though support for that is currently still TBD. I've
rejected those cases in omp-low.

Instead of using multiple continuous map entries like pset/pointer maps, I've
opted to use a different style. The compiler creates a descriptor on stack, and
passes the pointer into libgomp. libgomp will then process and exchange it
for the actual target dynamic array pointer before kernel launch.

Tested and committed to gomp-4_0-branch. This will probably also be sent some
time during the next stage-1 for trunk.

Chung-Lin

2017-01-10  Chung-Lin Tang  

gcc/c/
* c-typeck.c (handle_omp_array_sections_1): Add 'bool _contiguous'
parameter, adjust recursive call site, add cases for allowing
pointer based multi-dimensional arrays for OpenACC.
(handle_omp_array_sections): Adjust handle_omp_array_sections_1 call,
handle non-contiguous case to create dynamic array map.

gcc/cp/
* semantics.c (handle_omp_array_sections_1): Add 'bool _contiguous'
parameter, adjust recursive call site, add cases for allowing
pointer based multi-dimensional arrays for OpenACC.
(handle_omp_array_sections): Adjust handle_omp_array_sections_1 call,
handle non-contiguous case to create dynamic array map.

gcc/
* gimplify.c (gimplify_scan_omp_clauses): For dynamic array map kinds,
make sure bias in each dimension are put into firstprivate variables.
* tree-pretty-print.c (dump_omp_clauses): Add cases for printing
GOMP_MAP_DYNAMIC_ARRAY map kinds.
* omp-low.c (struct omp_context):
Add 'hash_map *dynamic_arrays' field, also
added include of "tree-hash-traits.h".
(append_field_to_record_type): New function.
(create_dynamic_array_descr_type): Likewise.
(create_dynamic_array_descr_init_code): Likewise.
(new_omp_context): Add initialize of dynamic_arrays field.
(delete_omp_context): Add delete of dynamic_arrays field.
(scan_sharing_clauses): For dynamic array map kinds, check for
supported dimension structure, and install dynamic array variable into
current omp_context.
(lower_omp_target): Add handling for dynamic array map kinds.
(dynamic_array_lookup): New function.
(dynamic_array_reference_start): Likewise.
(scan_for_op): Likewise.
(scan_for_reference): Likewise.
(da_create_bias): Likewise.
(da_dimension_peel): Likewise.
(lower_omp_1): Add case to look for start of dynamic array reference,
and handle bias adjustments for the code sequence.

include/
* gomp-constants.h (GOMP_MAP_FLAG_SPECIAL_3): Define.
(enum gomp_map_kind): Add GOMP_MAP_DYNAMIC_ARRAY,
GOMP_MAP_DYNAMIC_ARRAY_TO, GOMP_MAP_DYNAMIC_ARRAY_FROM,
GOMP_MAP_DYNAMIC_ARRAY_TOFROM, GOMP_MAP_DYNAMIC_ARRAY_FORCE_TO,
GOMP_MAP_DYNAMIC_ARRAY_FORCE_FROM, GOMP_MAP_DYNAMIC_ARRAY_FORCE_TOFROM,
GOMP_MAP_DYNAMIC_ARRAY_ALLOC, GOMP_MAP_DYNAMIC_ARRAY_FORCE_ALLOC,
GOMP_MAP_DYNAMIC_ARRAY_FORCE_PRESENT.
(GOMP_MAP_DYNAMIC_ARRAY_P): Define.

libgomp/
* target.c (struct da_dim): New struct declaration.
(struct da_descr_type): Likewise.
(struct da_info): Likewise.
(gomp_dynamic_array_count_rows): New function.
(gomp_dynamic_array_compute_info): Likewise.
(gomp_dynamic_array_fill_rows_1): Likewise.
(gomp_dynamic_array_fill_rows): Likewise.
(gomp_dynamic_array_create_ptrblock): Likewise.
(gomp_map_vars): Add code to handle dynamic array map kinds.
* testsuite/libgomp.oacc-c-c++-common/da-1.c: New test.
* testsuite/libgomp.oacc-c-c++-common/da-2.c: New test.
* testsuite/libgomp.oacc-c-c++-common/da-3.c: New test.
* testsuite/libgomp.oacc-c-c++-common/da-4.c: New test.
* testsuite/libgomp.oacc-c-c++-common/da-utils.h: New test.
Index: gcc/c/c-typeck.c
===
--- gcc/c/c-typeck.c	(revision 244258)
+++ gcc/c/c-typeck.c	(revision 244259)
@@ -11926,7 +11926,7 @@
 static tree
 handle_omp_array_sections_1 (tree c, tree t, vec ,
 			 bool _zero_len, unsigned int _non_one,
-			 enum c_omp_region_type ort)
+			 bool _contiguous, enum c_omp_region_type ort)
 {
   tree ret, low_bound, length, type;
   if (TREE_CODE (t) != TREE_LIST)
@@ -11982,7 +11982,8 @@
 }
 
   ret = handle_omp_array_sections_1 (c, TREE_CHAIN (t), types,
- 

Fwd: [Patch] PR71017 - libgcc/config/i386/cpuinfo.c:346:17: runtime error: left shift of 1 by 31 places cannot be represented in type 'int'

[Uros Bizjak]

On Mon, Jan 9, 2017 at 11:05 PM, Dominique d'Humières
 wrote:

>
> > Le 9 janv. 2017 à 20:37, Uros Bizjak  a écrit :
> >
> > Hello!
> >
> >> The following patch fixes errors of the kind
> >>
> >> libgcc/config/i386/cpuinfo.c:260:17: runtime error: left shift of 1 by 31 
> >> places cannot be
> >> represented in type ‘int'
> >>
> >> 2017-01-07  Dominique d'Humieres  
> >>
> >>PR target/71017
> >>* config/i386/cpuid.h: Fix undefined behavior.
> >
> >> Is it OK for trunk/branches?
>
>
> Thanks, committed on the trunk as revision r244248. Is it OK for the 5 and 6 
> branches?

Yes, but please wait a couple of days if any problem arises with patch
in mainline.

Uros.

Re: [patch] Fix wrong code for return of small aggregates on big-endian

[Christophe Lyon]

On 9 January 2017 at 12:14, Richard Biener  wrote:
> On Mon, Jan 9, 2017 at 11:43 AM, Eric Botcazou  wrote:
>> Hi,
>>
>> this is a regression present on all active branches for big-endian targets
>> returning small aggregate types in registers under certain circumstances and
>> when optimization is enabled: when the bitfield path of store_field is taken,
>> the function ends up calling store_bit_field to store the value.  Now the
>> behavior of store_bit_field is awkward when the mode is BLKmode: it always
>> takes its value from the lsb up to the word size but expects it left 
>> justified
>> beyond it (see expmed.c:890 and below) and I missed that when I got rid of 
>> the
>> stack temporaries that were originally generated in that case.
>>
>> Of course that's OK for little-endian targets but not for big-endian targets,
>> and I have a couple of C++ testcases exposing the issue on SPARC 64-bit and a
>> couple of Ada testcases exposing the issue on PowerPC with the SVR4 ABI (the
>> Linux ABI is immune since it always returns on the stack); I think they cover
>> all the cases in the problematic code.
>>
>> The attached fix was tested on a bunch of platforms: x86/Linux, x86-64/Linux,
>> PowerPC/Linux, PowerPC64/Linux, PowerPC/VxWorks, Aarch64/Linux, SPARC/Solaris
>> and SPARC64/Solaris with no regressions.  OK for the mainline? other 
>> branches?
>
> Ok for trunk and branches after a short burn-in.
>

Hi Eric,

I have noticed new failures after this commit (r244249).
g++.dg/opt/call3.C fails at execution on armeb targets
g++.dg/opt/call2.C fails at execution on aarch64_be

Christophe




> Thanks,
> Richard.
>
>>
>> 2017-01-09  Eric Botcazou  
>>
>> * expr.c (store_field): In the bitfield case, if the value comes from
>> a function call and is of an aggregate type returned in registers, do
>> not modify the field mode; extract the value in all cases if the mode
>> is BLKmode and the size is not larger than a word.
>>
>>
>> 2017-01-09  Eric Botcazou  
>>
>> * g++.dg/opt/call2.C: New test.
>> * g++.dg/opt/call3.C: Likewise.
>> * gnat.dg/array26.adb: New test.
>> * gnat.dg/array26_pkg.ad[sb]: New helper.
>> * gnat.dg/array27.adb: New test.
>> * gnat.dg/array27_pkg.ad[sb]: New helper.
>> * gnat.dg/array28.adb: New test.
>> * gnat.dg/array28_pkg.ad[sb]: New helper.
>>
>> --
>> Eric Botcazou