Re: [RFC] propagate malloc attribute in ipa-pure-const pass

[Prathamesh Kulkarni]

On 17 August 2017 at 18:02, Prathamesh Kulkarni
 wrote:
> On 8 August 2017 at 09:50, Prathamesh Kulkarni
>  wrote:
>> On 31 July 2017 at 23:53, Prathamesh Kulkarni
>>  wrote:
>>> On 23 May 2017 at 19:10, Prathamesh Kulkarni
>>>  wrote:
 On 19 May 2017 at 19:02, Jan Hubicka  wrote:
>>
>> * LTO and memory management
>> This is a general question about LTO and memory management.
>> IIUC the following sequence takes place during normal LTO:
>> LGEN: generate_summary, write_summary
>> WPA: read_summary, execute ipa passes, write_opt_summary
>>
>> So I assumed it was OK in LGEN to allocate return_callees_map in
>> generate_summary and free it in write_summary and during WPA, allocate
>> return_callees_map in read_summary and free it after execute (since
>> write_opt_summary does not require return_callees_map).
>>
>> However with fat LTO, it seems the sequence changes for LGEN with
>> execute phase takes place after write_summary. However since
>> return_callees_map is freed in pure_const_write_summary and
>> propagate_malloc() accesses it in execute stage, it results in
>> segmentation fault.
>>
>> To work around this, I am using the following hack in 
>> pure_const_write_summary:
>> // FIXME: Do not free if -ffat-lto-objects is enabled.
>> if (!global_options.x_flag_fat_lto_objects)
>>   free_return_callees_map ();
>> Is there a better approach for handling this ?
>
> I think most passes just do not free summaries with -flto.  We probably 
> want
> to fix it to make it possible to compile multiple units i.e. from plugin 
> by
> adding release_summaries method...
> So I would say it is OK to do the same as others do and leak it with 
> -flto.
>> diff --git a/gcc/ipa-pure-const.c b/gcc/ipa-pure-const.c
>> index e457166ea39..724c26e03f6 100644
>> --- a/gcc/ipa-pure-const.c
>> +++ b/gcc/ipa-pure-const.c
>> @@ -56,6 +56,7 @@ along with GCC; see the file COPYING3.  If not see
>>  #include "tree-scalar-evolution.h"
>>  #include "intl.h"
>>  #include "opts.h"
>> +#include "ssa.h"
>>
>>  /* Lattice values for const and pure functions.  Everything starts out
>> being const, then may drop to pure and then neither depending on
>> @@ -69,6 +70,15 @@ enum pure_const_state_e
>>
>>  const char *pure_const_names[3] = {"const", "pure", "neither"};
>>
>> +enum malloc_state_e
>> +{
>> +  PURE_CONST_MALLOC_TOP,
>> +  PURE_CONST_MALLOC,
>> +  PURE_CONST_MALLOC_BOTTOM
>> +};
>
> It took me a while to work out what PURE_CONST means here :)
> I would just call it something like STATE_MALLOC_TOP... or so.
> ipa_pure_const is outdated name from the time pass was doing only
> those two.
>> @@ -109,6 +121,10 @@ typedef struct funct_state_d * funct_state;
>>
>>  static vec funct_state_vec;
>>
>> +/* A map from node to subset of callees. The subset contains those 
>> callees
>> + * whose return-value is returned by the node. */
>> +static hash_map< cgraph_node *, vec* > 
>> *return_callees_map;
>> +
>
> Hehe, a special case of return jump function.  We ought to support those 
> more generally.
> How do you keep it up to date over callgraph changes?
>> @@ -921,6 +1055,23 @@ end:
>>if (TREE_NOTHROW (decl))
>>  l->can_throw = false;
>>
>> +  if (ipa)
>> +{
>> +  vec v = vNULL;
>> +  l->malloc_state = PURE_CONST_MALLOC_BOTTOM;
>> +  if (DECL_IS_MALLOC (decl))
>> + l->malloc_state = PURE_CONST_MALLOC;
>> +  else if (malloc_candidate_p (DECL_STRUCT_FUNCTION (decl), v))
>> + {
>> +   l->malloc_state = PURE_CONST_MALLOC_TOP;
>> +   vec *callees_p = new vec (vNULL);
>> +   for (unsigned i = 0; i < v.length (); ++i)
>> + callees_p->safe_push (v[i]);
>> +   return_callees_map->put (fn, callees_p);
>> + }
>> +  v.release ();
>> +}
>> +
>
> I would do non-ipa variant, too.  I think most attributes can be detected 
> that way
> as well.
>
> The patch generally makes sense to me.  It would be nice to make it 
> easier to write such
> a basic propagators across callgraph (perhaps adding a template doing the 
> basic
> propagation logic). Also I think you need to solve the problem with 
> keeping your
> summaries up to date across callgraph node removal and duplications.
 Thanks for the suggestions, I will try to address them in a follow-up 
 patch.
 IIUC, I would need to modify ipa-pure-const cgraph hooks -
 add_new_function, remove_node_data, duplicate_node_data
 to keep return_callees_map 

Re: [1/2] PR 78736: New warning -Wenum-conversion

[Prathamesh Kulkarni]

On 26 August 2017 at 04:15, Joseph Myers  wrote:
> On Tue, 11 Jul 2017, Prathamesh Kulkarni wrote:
>
>> On 13 June 2017 at 01:47, Joseph Myers  wrote:
>> > This is OK with one fix:
>> >
>> >> +C ObjC Var(warn_enum_conversion) Init(0) Warning LangEnabledBy(C 
>> >> Objc,Wall)
>> >
>> > I believe the LangEnabledBy arguments are case-sensitive, so you need to
>> > have ObjC not Objc there for it to work correctly.  (*.opt parsing isn't
>> > very good at detecting typos and giving errors rather than silently
>> > ignoring things.)
>> Hi,
>> Sorry for the late response, I was on a vacation.
>> The attached patch is rebased and bootstrap+tested on 
>> x86_64-unknown-linux-gnu.
>> I have modified it slightly to not warn for enums with different names
>> but having same value ranges.
>> For eg:
>> enum e1 { e1_1, e1_2 };
>> enum e2 { e2_1, e2_2 };
>>
>> enum e1 x = e2_1;
>> With this version, there would be no warning for the above assignment
>> since both e1 and e2 have
>> same value ranges.  Is that OK ?
>
> I don't really think that's a good heuristic.  I see no particular reason
> to think that just because two enums have the same set of values, an
> implicit conversion between them is actually deliberate - corresponding
> values have the same semantics in some sense - rather than reflecting an
> underlying confusion in the code.  (You could have different levels of the
> warning - and only warn in this case at a higher level - but I don't
> really think that makes sense either for this particular warning.)
Thanks for the suggestion, I have reverted this change in the attached patch.
>
>> The patch has following fallouts in the testsuite:
>>
>> a) libgomp:
>> I initially assume it was a false positive because I thought enum
>> gomp_schedule_type
>> and enum omp_sched_t have same value-ranges but it looks like omp_sched_t
>> has range [1, 4] while gomp_schedule_type has range [0, 4] with one
>> extra element.
>> Is the warning then correct for this case ?
>>
>> b) libgfortran:
>> i) Implicit conversion from unit_mode to file_mode
>> ii) Implicit conversion from unit_sign_s to unit_sign.
>> I suppose the warning is OK for these cases since unit_mode, file_mode
>> have different value-ranges and similarly for unit_sign_s, unit_sign ?
>
> If it's an implicit conversion between different enum types, the warning
> is correct.  The more important question for the review is: is it correct
> to replace the implicit conversion by an explicit one?  That is, for each
> value in the source type, what enumerator of the destination type has the
> same value, and do the semantics match in whatever way is required for the
> code in question?
Well, for instance unit_sign in libgfortran/io.h is defined as:
typedef enum
{ SIGN_PROCDEFINED, SIGN_SUPPRESS, SIGN_PLUS, SIGN_UNSPECIFIED }
unit_sign;

and unit_sign_s is defined:
typedef enum
{ SIGN_S, SIGN_SS, SIGN_SP }
unit_sign_s;

Since the enum types are different, I assume warnings for implicit
conversion from unit_sign_s to unit_sign would be correct ?
And since unit_sign_s is a subset of unit_sign in terms of
value-ranges, I assume replacing implicit by explicit conversion would
be OK ?

Thanks,
Prathamesh
>
> Also note s/valeu/value/ in the documentation.
>
> --
> Joseph S. Myers
> jos...@codesourcery.com
2017-10-01  Prathamesh Kulkarni  

* doc/invoke.texi: Document -Wenum-conversion.
* c-family/c.opt (Wenum-conversion): New option.
* c/c-typeck.c (convert_for_assignment): Handle Wenum-conversion.

libgomp/
* icv.c (omp_set_schedule): Cast kind to enum gomp_schedule_type.
(omp_get_schedule): Cast icv->run_sched_var to enum omp_sched_t
before.

libgfortran/
* io/transfer.c (current_mode): Cast FORM_UNSPECIFIED to file_mode.
(formatted_transfer_scalar_read): Cast SIGN_S, SIGN_SS, SIGN_SP to
unit_sign.
(formatted_transfer_scalar_write): Likewise.

testsuite/
* gcc.dg/Wenum-conversion.c: New test-case.

diff --git a/gcc/c-family/c.opt b/gcc/c-family/c.opt
index 3435fe90cca..23a5d350bad 100644
--- a/gcc/c-family/c.opt
+++ b/gcc/c-family/c.opt
@@ -500,6 +500,10 @@ Wenum-compare
 C ObjC C++ ObjC++ Var(warn_enum_compare) Init(-1) Warning LangEnabledBy(C 
ObjC,Wall || Wc++-compat)
 Warn about comparison of different enum types.
 
+Wenum-conversion
+C ObjC Var(warn_enum_conversion) Init(0) Warning LangEnabledBy(C ObjC,Wall)
+Warn about implicit conversion of enum types.
+
 Werror
 C ObjC C++ ObjC++
 ; Documented in common.opt
diff --git a/gcc/c/c-typeck.c b/gcc/c/c-typeck.c
index 135dd9d665c..a46de0438e6 100644
--- a/gcc/c/c-typeck.c
+++ b/gcc/c/c-typeck.c
@@ -6341,6 +6341,20 @@ convert_for_assignment (location_t location, location_t 
expr_loc, tree type,
  }
 }
 
+  if (warn_enum_conversion)
+{
+  tree checktype = origtype != NULL_TREE ? origtype : rhstype;
+  if (checktype != error_mark_node
+ 

[PATCH] combine: Fix for PR82024

[Segher Boessenkool]

With the testcase in the PR, with all the command line options mentioned
there, a (comparison) instruction becomes dead in fwprop1 but is not
deleted until all the way in rtl_dce.

Before combine this insn look like:

20: flags:CC=cmp(r106:DI,0x)
  REG_DEAD r106:DI
  REG_UNUSED flags:CC
  REG_EQUAL cmp(0,0x)

(note the only output is unused).

Combining some earlier insns gives

13: r106:DI=0
14: r105:DI=r101:DI+r103:DI

14+13+20 then gives

(parallel [
(set (reg:CC 17 flags)
(compare:CC (const_int 0 [0])
(const_int -1 [0x])))
(set (reg:DI 105)
(plus:DI (reg/v:DI 101 [ e ])
(reg:DI 103)))
])

which doesn't match; but the set of flags is dead, so combine makes the
set of r105 the whole new instruction, which it then places at i3.  But
that is wrong, because r105 is used after i2 but before i3!  We forget
to check for that in this case.

This patch fixes it.  Bootstrapped and tested on powerpc64-linux {-m32,-m64},
and on x86_64-linux, and tested it doesn't regress output by comparing Linux
kernel builds for 30 targets.

I'll commit this tomorrow.


Segher


2017-08-31  Segher Boessenkool  

PR rtl-optimization/82024
* combine.c (try_combine): If the combination result is a PARALLEL,
and we only need to retain the SET in there that would be placed
at I2, check that we can place that at I3 instead, before doing so.

---
 gcc/combine.c | 19 ++-
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/gcc/combine.c b/gcc/combine.c
index c139cf6..bf3eda8 100644
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -3505,7 +3505,10 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, 
rtx_insn *i0,
  i3, and one from i2.  Combining then splitting the parallel results
  in the original i2 again plus an invalid insn (which we delete).
  The net effect is only to move instructions around, which makes
- debug info less accurate.  */
+ debug info less accurate.
+
+ If the remaining SET came from I2 its destination should not be used
+ between I2 and I3.  See PR82024.  */
 
   if (!(added_sets_2 && i1 == 0)
   && is_parallel_of_n_reg_sets (newpat, 2)
@@ -3534,11 +3537,17 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, 
rtx_insn *i0,
   && insn_nothrow_p (i3)
   && !side_effects_p (SET_SRC (set0)))
{
- newpat = set1;
- insn_code_number = recog_for_combine (, i3, _i3_notes);
+ rtx dest = SET_DEST (set1);
+ if (GET_CODE (dest) == SUBREG)
+   dest = SUBREG_REG (dest);
+ if (!reg_used_between_p (dest, i2, i3))
+   {
+ newpat = set1;
+ insn_code_number = recog_for_combine (, i3, _i3_notes);
 
- if (insn_code_number >= 0)
-   changed_i3_dest = 1;
+ if (insn_code_number >= 0)
+   changed_i3_dest = 1;
+   }
}
 
   if (insn_code_number < 0)
-- 
1.8.3.1

[PATCH 7/9] [LVU] Introduce location views

[Alexandre Oliva]

This patch introduces an option to enable the generation of location
views along with location lists.  The exact format depends on the
DWARF version: it can be a separate attribute (DW_AT_GNU_locviews) or
(DW_LLE_view_pair) entries in DWARF5+ loclists.

Line number tables are also affected.  If the assembler is found, at
compiler build time, to support .loc views, we use them and
assembler-computed view labels, otherwise we output compiler-generated
line number programs with conservatively-computed view labels.  In
either case, we output view information next to line number changes
when verbose assembly output is requested.

This patch requires an LVU patch that modifies the exported API of
final_scan_insn.  It also expects the entire SFN patchset to be
installed first, although SFN is not a requirement for LVU.

for  include/ChangeLog

* dwarf2.def (DW_AT_GNU_locviews): New.
* dwarf2.h (enum dwarf_location_list_entry_type): Add
DW_LLE_GNU_view_pair.
(DW_LLE_view_pair): Define.

for  gcc/ChangeLog

* common.opt (gvariable-location-views): New.
* config.in: Rebuilt.
* configure: Rebuilt.
* configure.ac: Test assembler for view support.
* dwarf2asm.c (dw2_asm_output_symname_uleb128): New.
* dwarf2asm.h (dw2_asm_output_symname_uleb128): Declare.
* dwarf2out.c (var_loc_view): New typedef.
(struct dw_loc_list_struct): Add vl_symbol, vbegin, vend.
(dwarf2out_locviews_in_attribute): New.
(dwarf2out_locviews_in_loclist): New.
(dw_val_equal_p): Compare val_view_list of dw_val_class_view_lists.
(enum dw_line_info_opcode): Add LI_adv_address.
(struct dw_line_info_table): Add view.
(RESET_NEXT_VIEW, RESETTING_VIEW_P): New macros.
(DWARF2_ASM_VIEW_DEBUG_INFO): Define default.
(zero_view_p): New variable.
(ZERO_VIEW_P): New macro.
(output_asm_line_debug_info): New.
(struct var_loc_node): Add view.
(add_AT_view_list, AT_loc_list): New.
(add_var_loc_to_decl): Add view param.  Test it against last.
(new_loc_list): Add view params.  Record them.
(AT_loc_list_ptr): Handle loc and view lists.
(view_list_to_loc_list_val_node): New.
(print_dw_val): Handle dw_val_class_view_list.
(size_of_die): Likewise.
(value_format): Likewise.
(loc_list_has_views): New.
(gen_llsym): Set vl_symbol too.
(maybe_gen_llsym, skip_loc_list_entry): New.
(dwarf2out_maybe_output_loclist_view_pair): New.
(output_loc_list): Output view list or entries too.
(output_view_list_offset): New.
(output_die): Handle dw_val_class_view_list.
(output_dwarf_version): New.
(output_compilation_unit_header): Use it.
(output_skeleton_debug_sections): Likewise.
(output_rnglists, output_line_info): Likewise.
(output_pubnames, output_aranges): Update version comments.
(output_one_line_info_table): Output view numbers in asm comments.
(dw_loc_list): Determine current endview, pass it to new_loc_list.
Call maybe_gen_llsym.
(loc_list_from_tree_1): Adjust.
(add_AT_location_description): Create view list attribute if
needed, check it's absent otherwise.
(convert_cfa_to_fb_loc_list): Adjust.
(maybe_emit_file): Call output_asm_line_debug_info for test.
(dwarf2out_var_location): Reset views as needed.  Precompute
add_var_loc_to_decl args.  Call get_attr_min_length only if we have the
attribute.  Set view.
(new_line_info_table): Reset next view.
(set_cur_line_info_table): Call output_asm_line_debug_info for test.
(dwarf2out_source_line): Likewise.  Output view resets and labels to
the assembler, or select appropriate line info opcodes.
(prune_unused_types_walk_attribs): Handle dw_val_class_view_list.
(optimize_string_length): Catch it.  Adjust.
(resolve_addr): Copy vl_symbol along with ll_symbol.  Handle
dw_val_class_view_list, and remove it if no longer needed.
(hash_loc_list): Hash view numbers.
(loc_list_hasher::equal): Compare them.
(optimize_location_lists): Check whether a view list symbol is
needed, and whether the locview attribute is present, and
whether they match.  Remove the locview attribute if no longer
needed.
(index_location_lists): Call skip_loc_list_entry for test.
(dwarf2out_finish): Call output_asm_line_debug_info for test.
Use output_dwarf_version.
* dwarf2out.h (enum dw_val_class): Add dw_val_class_view_list.
(struct dw_val_node): Add val_view_list.
* final.c: Include langhooks.h.
(SEEN_NEXT_VIEW): New.
(set_next_view_needed): New.
(clear_next_view_needed): New.
(maybe_output_next_view): New.
(final_start_function): Rename to...

[PATCH 9/9] [IEPM] Introduce inline entry point markers

[Alexandre Oliva]

Output DW_AT_entry_pc based on markers.

Introduce DW_AT_GNU_entry_view as a DWARF extension.

If views are enabled are we're not in strict compliance mode, output
DW_AT_GNU_entry_view if it might be nonzero.

This patch depends on SFN and LVU patchsets, and on the IEPM patch that
introduces the inline_entry debug hook.

for  include/ChangeLog

* dwarf2.def (DW_AT_GNU_entry_view): New.

for  gcc/ChangeLog

* cfgexpand.c (expand_gimple_basic_block): Handle inline entry
markers.
* dwarf2out.c (dwarf2_debug_hooks): Enable inline_entry hook.
(BLOCK_INLINE_ENTRY_LABEL): New.
(dwarf2out_var_location): Disregard inline entry markers.
(inline_entry_data): New struct.
(inline_entry_data_hasher): New hashtable type.
(inline_entry_data_hasher::hash): New.
(inline_entry_data_hasher::equal): New.
(inline_entry_data_table): New variable.
(add_high_low_attributes): Add DW_AT_entry_pc and
DW_AT_GNU_entry_view attributes if a pending entry is found
in inline_entry_data_table.  Add old entry_pc attribute only
if debug nonbinding markers are disabled.
(gen_inlined_subroutine_die): Set BLOCK_DIE if nonbinding
markers are enabled.
(block_within_block_p, dwarf2out_inline_entry): New.
(dwarf2out_finish): Check that no entries remained in
inline_entry_data_table.
* final.c (reemit_insn_block_notes): Handle inline entry notes.
(final_scan_insn, notice_source_line): Likewise.
(rest_of_clean_state): Skip inline entry markers.
* gimple-pretty-print.c (dump_gimple_debug): Handle inline entry
markers.
* gimple.c (gimple_build_debug_inline_entry): New.
* gimple.h (enum gimple_debug_subcode): Add
GIMPLE_DEBUG_INLINE_ENTRY.
(gimple_build_debug_inline_entry): Declare.
(gimple_debug_inline_entry_p): New.
(gimple_debug_nonbind_marker_p): Adjust.
* insn-notes.def (INLINE_ENTRY): New.
* print-rtl.c (rtx_writer::print_rtx_operand_code_0): Handle
inline entry marker notes.
(print_insn): Likewise.
* rtl.h (NOTE_MARKER_P): Add INLINE_ENTRY support.
(INSN_DEBUG_MARKER_KIND): Likewise.
* tree-inline.c (expand_call_inline): Build and insert
debug_inline_entry stmt.
* tree-ssa-live.c (remove_unused_scope_block_p): Preserve
inline entry blocks early, if nonbind markers are enabled.
(dump_scope_block): Dump fragment info.
* var-tracking.c (reemit_marker_as_note): Handle inline entry note.
* doc/gimple.texi (gimple_debug_inline_entry_p): New.
(gimple_build_debug_inline_entry): New.
* doc/invoke.texi (gstatement-frontiers, gno-statement-frontiers):
Enable/disable inline entry points too.
* doc/rtl.texi (NOTE_INSN_INLINE_ENTRY): New.
(DEBUG_INSN): Describe inline entry markers.
---
 gcc/cfgexpand.c   |   9 +++
 gcc/doc/gimple.texi   |  18 +
 gcc/doc/rtl.texi  |  24 --
 gcc/dwarf2out.c   | 186 +-
 gcc/final.c   |  26 +++
 gcc/gimple-pretty-print.c |  13 
 gcc/gimple.c  |  21 ++
 gcc/gimple.h  |  18 -
 gcc/insn-notes.def|   4 +
 gcc/print-rtl.c   |   5 ++
 gcc/rtl.h |   5 +-
 gcc/tree-inline.c |   7 ++
 gcc/tree-ssa-live.c   |  27 +--
 gcc/var-tracking.c|   1 +
 include/dwarf2.def|   1 +
 15 files changed, 349 insertions(+), 16 deletions(-)

diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 8b25e9f..74c5c1f 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -5694,6 +5694,15 @@ expand_gimple_basic_block (basic_block bb, bool 
disable_tail_calls)
goto delink_debug_stmt;
  else if (gimple_debug_begin_stmt_p (stmt))
val = gen_rtx_DEBUG_MARKER (VOIDmode);
+ else if (gimple_debug_inline_entry_p (stmt))
+   {
+ tree block = gimple_block (stmt);
+
+ if (block)
+   val = gen_rtx_DEBUG_MARKER (BLKmode);
+ else
+   goto delink_debug_stmt;
+   }
  else
gcc_unreachable ();
 
diff --git a/gcc/doc/gimple.texi b/gcc/doc/gimple.texi
index 6c9c4789..af39d75 100644
--- a/gcc/doc/gimple.texi
+++ b/gcc/doc/gimple.texi
@@ -836,6 +836,11 @@ Return true if g is a @code{GIMPLE_DEBUG} that marks the 
beginning of
 a source statement.
 @end deftypefn
 
+@deftypefn {GIMPLE function} gimple_debug_inline_entry_p (gimple g)
+Return true if g is a @code{GIMPLE_DEBUG} that marks the entry
+point of an inlined function.
+@end deftypefn
+
 @deftypefn {GIMPLE function} gimple_debug_nonbind_marker_p (gimple g)
 Return true if g is a @code{GIMPLE_DEBUG} that marks a program location,
 without any variable binding.
@@ -1539,6 

[PATCH 4/9] [SFN] introduce statement frontier notes, still disabled

[Alexandre Oliva]

This patch completes the infrastructure for the introduction of
statement frontiers in C-family languages.

It brings in all the code remaining code needed to introduce and
transform begin stmt trees, gimple stmts, insns and notes, and
ultimately use them to generate the is_stmt column in DWARF2+ line
number tables/programs, however none of it is activated: the option
that would do so will be introduced in a subsequent patch.

This patch depends on an earlier patch with not-quite-boilerplate
changes towards SFN.

for  gcc/c-family/ChangeLog

* c-semantics.c (pop_stmt_list): Move begin stmt marker into
subsequent statement list.

for  gcc/c/ChangeLog

* c-objc-common.h (LANG_HOOKS_EMITS_BEGIN_STMT): Redefine as true.
* c-parser.c (add_debug_begin_stmt): New.
(c_parser_declaration_or_fndef): Call it.
(c_parser_compound_statement_nostart): Likewise.
(c_parser_statement_after_labels): Likewise.
* c-typeck (c_finish_stmt_expr): Skip begin stmts markers.

for  gcc/cp/ChangeLog

* constexpr.c (build_data_member_initialization): Skip begin stmt
markers.
(check_constexpr_ctor_body_1): Likewise.
(build_constexpr_constructor_member_initializers): Likewise.
(constexpr_fn_retval): Likewise.
(cxx_eval_statement_list): Likewise.
(potential_constant_expression_1): Likewise.
* cp-array-notation.c (stmt_location): New.
(cp_expand_cond_array_notations): Use it.
* cp-objcp-common.h (LANG_HOOKS_EMITS_BEGIN_STMT): Redefine as true.
* parser.c (add_debug_begin_stmt): New.
(cp_parser_statement): Call it.
* pt.c (tsubst_copy): Handle begin stmt markers.

for  gcc/ChangeLog

* cfgexpand.c (expand_gimple_basic_block): Handle begin stmt
markers.  Integrate source bind into debug stmt expand loop.
(pass_expand::execute): Check debug marker limit.  Avoid deep
TER and expand debug locations for debug bind insns only.
* cse.c (insn_live_p): Keep nonbind markers and debug bindings
followed by them.
* df-scan.c (df_insn_delete): Accept out-of-block debug insn.
* final.c (reemit_insn_block_notes): Take current block from
nonbind markers.  Declare note where it's first set.
(final_scan_insn): Handle begin stmt notes.  Emit is_stmt according to
begin stmt markers if enabled.
(notice_source_line): Handle nonbind markers.  Fail if their
location is unknown or that of builtins.
(rest_of_handle_final): Convert begin stmt markers to notes if
var-tracking didn't run.
(rest_of_clean_state): Skip begin stmt markers.
* gimple-pretty-print.c (dump_gimple_debug): Handle begin stmt
markers.
* function.c (allocate_struct_function): Set begin_stmt_markers.
* function.h (struct function): Add debug_marker_count counter
and debug_nonbind_markers flag.
* gimple-iterator.c (gsi_remove): Adjust debug_marker_count.
* gimple-low.c (lower_function_body): Adjust
debug_nonbind_markers.
(lower_stmt): Drop or skip gimple debug stmts.
(lower_try_catch): Skip debug stmts.
* gimple.c (gimple_build_debug_begin_stmt): New.
(gimple_copy): Increment debug_marker_count if copying one.
* gimple.h (gimple_build_debug_begin_stmt): Declare.
* gimplify.c (rexpr_location): New.
(rexpr_has_location): New.
(warn_switch_unreachable_r): Handle gimple debug stmts.
(shortcut_cond_r): Call expr_location.
(find_goto): New.
(find_goto_label): New.
(shortcut_cond_expr): Call expr_has_location, expr_location, and
find_goto_label.
(gimplify_cond_expr): Call find_goto_label, expr_has_location, and
expr_location.
(gimplify_expr): Handle begin stmt markers.  Reject debug expr decls.
* langhooks-def.h (LANG_HOOKS_EMITS_BEGIN_STMT): New.  Add to...
(LANG_HOOKS_INITIALIZER): ... this.
* langhooks.h (struct lang_hooks): Add emits_begin_stmt.
* lra-contraints.c (inherit_reload_reg): Tolerate between-blocks
debug insns.
(update_ebb_live_info): Skip debug insn markers.
* lra.c (debug_insn_static_data): Rename to...
(debug_bind_static_data): ... this.
(debug_marker_static_data): New.
(lra_set_insn_recog_data): Select one of the above depending
on debug insn kind.
(lra_update_isn_regno_info): Don't assume debug insns have
freqs.
(push_insns): Skip debug insns.
* lto-streamer-in.c (input_function): Drop debug stmts
depending on active options.  Adjust debug_nonbind_markers.
* params.def (PARAM_MAX_DEBUG_MARKER_COUNT): New.
* print-rtl.c (rtx_writer::print_rtx_operand_code_0): Handle
begin stmt marker notes.
(print_insn): Likewise.
* recog.c (extract_insn): 

[PATCH 3/9] [SFN] not-quite-boilerplate changes in preparation to introduce nonbind markers

[Alexandre Oliva]

This patch adjusts numerous parts of the compiler that would
malfunction should they find debug markers at points where they may be
introduced.  The changes purport to allow the compiler to pass
bootstrap-debug-lean (-fcompare-debug in stage3) at various
optimization levels, as well as bootstrap-debug-lib (-fcompare-debug
for target libraries), even after the compiler is changed so that
debug markers are introduced in code streams at spots where earlier
debug stmts, insns and notes wouldn't normally appear.

This patch depends on an earlier SFN boilerplate patch, and on another
SFN patch that introduces new RTL insn-walking functions.

for  gcc/ChangeLog

* cfgbuild.c (find_bb_boundaries): Skip debug insns.
* cfgcleanup.c (delete_unreachable_blocks): Use alternate
block removal order if MAY_HAVE_DEBUG_BIND_INSNS.
* cfgexpand.c (label_rtx_for_bb): Skip debug insns.
* cfgrtl.c (try_redirect_by_replacing_jump): Skip debug insns.
(rtl_tidy_fallthru_edge): Likewise.
(rtl_verify_fallthru): Likewise.
(rtl_verify_bb_layout): Likewise.
(skip_insns_after_block): Likewise.
(duplicate_insn_chain): Use DEBUG_BIND_INSN_P.
* dwarf2out.c: Include print-rtl.h.
(dwarf2out_next_real_insn): New.
(dwarf2out_var_location): Call it.  Disregard begin stmt markers.
Dump debug binds in asm comments.
* gimple-iterator.c (gimple_find_edge_insert_loc): Skip debug stmts.
* gimple-iterator.h (gsi_start_bb_nondebug): Remove; adjust
callers to use gsi_start_nondebug_bb instead.
(gsi_after_labels): Skip gimple debug stmts.
(gsi_start_nondebug): New.
* gimple-low.c (gimple_seq_may_fallthru): Take last nondebug stmt.
* gimple.h (gimple_seq_last_nondebug_stmt): New.
* gimplify.c (last_stmt_in_scope): Skip debug stmts.
(collect_fallthrough_labels): Likewise.
(should_warn_for_implicit_fallthrough): Likewise.
(warn_implicit_fallthrough_r): Likewise.
(expand_FALLTHROUGH_r): Likewise.
* graphite-isl-ast-to-gimple.c (gsi_insert_earliest): Adjust.
(rename_uses): Skip nonbind markers.
* graphite-scop-detection.c (trivially_empty_bb_p): Call
is_gimple_debug in test.
* haifa-sched.c (sched_extend_bb): Skip debug insns.
* ipa-icf-gimple.c (func_checker::compare_bb): Adjust.
* jump.c (clean_barriers): Skip debug insns.
* omp-expand.c (expand_parallel_call): Skip debug insns.
(expand_cilk_for_call): Likewise.
(expand_task_call): Likewise.
(remove_exit_barrier): Likewise.
(expand_omp_taskreg): Likewise.
(expand_omp_for_init_counts): Likewise.
(expand_omp_for_generic): Likewise.
(expand_omp_for_static_nochunk): Likewise.
(expand_omp_for_static_chunk): Likewise.
(expand_cilk_for): Likewise.
(expand_omp_simd): Likewise.
(expand_omp_taskloop_for_outer): Likewise.
(expand_omp_taskloop_for_inner): Likewise.
(expand_oacc_for): Likewise.
(expand_omp_sections): Likewise.
(expand_omp_single): Likewise.
(expand_omp_synch): Likewise.
(expand_omp_atomic_load): Likewise.
(expand_omp_atomic_store): Likewise.
(expand_omp_atomic_fetch_op): Likewise.
(expand_omp_atomic_pipeline): Likewise.
(expand_omp_atomic_mutex): Likewise.
(expand_omp_target): Likewise.
(grid_expand_omp_for_loop): Likewise.
(grid_expand_target_grid_body): Likewise.
(build_omp_regions_1): Likewise.
* omp-low.c (check_combined_parallel): Skip debug stmts.
* postreload.c (fixup_debug_insns): Skip nonbind debug insns.
* regcprop.c (find_oldest_value_reg): Ensure REGNO is not a pseudo.
* tree-cfg.c (make_blobs_1): Skip debug stmts.
(make_edges): Likewise.
(cleanup_dead_labels): Likewise.
(gimple_can_merge_blocks_p): Likewise.
(stmt_starts_bb_p): Likewise.
(gimple_block_label): Likewise.
(gimple_redirect_edge_and_branch): Likewise.
* tree-cfgcleanup.c (remove_forwarder_block): Rearrange skipping
of debug stmts.
(execute_cleanup_cfg_post_optimizing): Dump enumerated decls with
TDF_SLIM.
* tree-pretty-print (print_declaration): Omit initializer in slim
dumps.
* tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Mark begin stmt
markers.
(eliminate_unnecessary_stmts): Stabilize block removal order.
* tree-ssa-tail-merge.c (find_duplicate): Skip debug stmts.
* var-tracking.c (get_first_insn): New.
(vt_emit_notes): Call it.
(vt_initialize): Walk any insns before the first BB.
(delete_debug_insns): Likewise.
---
 gcc/cfgbuild.c   |  12 +++
 gcc/cfgcleanup.c |  12 +--
 gcc/cfgexpand.c  |  24 +-
 gcc/cfgrtl.c

[PATCH 6/9] [LVU] Allow final_start_function to skip initial insns

[Alexandre Oliva]

This API change will enable final_start_function() to "consume"
initial insns, and choose the first insn to be passed to final().

Many ports call final_start_function() and final() when creating
thunks and whatnot, so they needed adjusting.

for  gcc/ChangeLog

* output.h (final_start_function): Adjust.
* final.c (final_start_function): Take pointer to FIRST.
(rest_of_handle_final): Adjust.
* config/aarch64/aarch64.c (aarch64_output_mi_thunk): Adjust.
* config/alpha/alpha.c (alpha_output_mi_thunk_osf): Likewise.
* config/arm/arm.c (arm_thumb1_mi_thunk): Likewise.
(arm32_output_mi_thunk): Likewise.
* config/cris/cris.c (cris_asm_output_mi_thunk): Likewise.
* config/i386/i386.c (ix86_code_end): Likewise.
(x86_output_mi_thunk): Likewise.
* config/ia64/ia64.c (ia64_output_mi_thunk): Likewise.
* config/m68k/m68k.c (m68k_output_mi_thunk): Likewise.
* config/microblaze/microblaze.c (microblaze_asm_output_mi_thunk):
Likewise.
* config/mips/mips.c (mips_output_mi_thunk): Likewise.
* config/nds32/nds32.c (nds32_asm_output_mi_thunk): Likewise.
* config/nios2/nios2.c (nios2_asm_output_mi_thunk): Likewise.
* config/pa/pa.c (pa_asm_output_mi_thunk): Likewise.
* config/rs6000/rs6000.c (rs6000_output_mi_thunk): Likewise.
(rs6000_code_end): Likewise.
* config/s390/s390.c (s390_output_mi_thunk): Likewise.
* config/sh/sh.c (sh_output_mi_thunk): Likewise.
* config/sparc/sparc.c (sparc_output_mi_thunk): Likewise.
* config/spu/spu.c (spu_output_mi_thunk): Likewise.
* config/tilegx/tilegx.c (tilegx_output_mi_thunk): Likewise.
* config/tilepro/tilepro.c (tilepro_asm_output_mi_thunk): Likewise.
---
 gcc/config/aarch64/aarch64.c   | 2 +-
 gcc/config/alpha/alpha.c   | 2 +-
 gcc/config/arm/arm.c   | 5 +++--
 gcc/config/cris/cris.c | 3 ++-
 gcc/config/i386/i386.c | 5 +++--
 gcc/config/ia64/ia64.c | 2 +-
 gcc/config/m68k/m68k.c | 2 +-
 gcc/config/microblaze/microblaze.c | 2 +-
 gcc/config/mips/mips.c | 2 +-
 gcc/config/nds32/nds32.c   | 3 ++-
 gcc/config/nios2/nios2.c   | 2 +-
 gcc/config/pa/pa.c | 3 ++-
 gcc/config/rs6000/rs6000.c | 5 +++--
 gcc/config/s390/s390.c | 3 ++-
 gcc/config/sh/sh.c | 2 +-
 gcc/config/sparc/sparc.c   | 2 +-
 gcc/config/spu/spu.c   | 3 ++-
 gcc/config/tilegx/tilegx.c | 2 +-
 gcc/config/tilepro/tilepro.c   | 2 +-
 gcc/final.c| 9 ++---
 gcc/output.h   | 2 +-
 21 files changed, 37 insertions(+), 26 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 28c4e0e..51584f5 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -3936,7 +3936,7 @@ aarch64_output_mi_thunk (FILE *file, tree thunk 
ATTRIBUTE_UNUSED,
 
   insn = get_insns ();
   shorten_branches (insn);
-  final_start_function (insn, file, 1);
+  final_start_function (, file, 1);
   final (insn, file, 1);
   final_end_function ();
 
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index e13c5f9..c158f7a 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -8461,7 +8461,7 @@ alpha_output_mi_thunk_osf (FILE *file, tree thunk_fndecl 
ATTRIBUTE_UNUSED,
  assemble_start_function and assemble_end_function.  */
   insn = get_insns ();
   shorten_branches (insn);
-  final_start_function (insn, file, 1);
+  final_start_function (, file, 1);
   final (insn, file, 1);
   final_end_function ();
 }
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index fa3e2fa..71a0d2d 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -26357,7 +26357,8 @@ arm_thumb1_mi_thunk (FILE *file, tree, HOST_WIDE_INT 
delta,
   if (mi_delta < 0)
 mi_delta = - mi_delta;
 
-  final_start_function (emit_barrier (), file, 1);
+  rtx_insn *first = emit_barrier ();
+  final_start_function (, file, 1);
 
   if (TARGET_THUMB1)
 {
@@ -26534,7 +26535,7 @@ arm32_output_mi_thunk (FILE *file, tree, HOST_WIDE_INT 
delta,
 
   insn = get_insns ();
   shorten_branches (insn);
-  final_start_function (insn, file, 1);
+  final_start_function (, file, 1);
   final (insn, file, 1);
   final_end_function ();
 
diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c
index b57881a..376c1eb 100644
--- a/gcc/config/cris/cris.c
+++ b/gcc/config/cris/cris.c
@@ -2744,7 +2744,8 @@ cris_asm_output_mi_thunk (FILE *stream,
  tree funcdecl)
 {
   /* Make sure unwind info is emitted for the thunk if needed.  */
-  final_start_function (emit_barrier (), stream, 1);
+  rtx_insn *first = emit_barrier ();
+  final_start_function (, stream, 1);
 
   if (delta > 0)
 fprintf (stream, "\tadd%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
diff --git 

[PATCH 8/9] [IEPM] Introduce debug hook for inline entry point markers

[Alexandre Oliva]

The inline_entry hook will be given a definition in a later patch.

for  gcc/ChangeLog

* debug.h (gcc_debug_hooks): Add inline_entry.
* dbxout.c (dbx_debug_hooks, xcoff_debug_hooks): Likewise.
* debug.c (do_nothing_debug_hooks): Likewise.
* sdbout.c (sdb_debug_hooks): Likewise.
* vmsdbgout.c (vmsdbg_debug_hooks): Likewise.
* dwarf2out.c (dwarf2_debug_hooks): Likewise.
(dwarf2_lineno_debug_hooks): Likewise.
---
 gcc/dbxout.c| 2 ++
 gcc/debug.c | 1 +
 gcc/debug.h | 3 +++
 gcc/dwarf2out.c | 2 ++
 gcc/sdbout.c| 1 +
 gcc/vmsdbgout.c | 1 +
 6 files changed, 10 insertions(+)

diff --git a/gcc/dbxout.c b/gcc/dbxout.c
index 3d9268c3..f1c80c5 100644
--- a/gcc/dbxout.c
+++ b/gcc/dbxout.c
@@ -377,6 +377,7 @@ const struct gcc_debug_hooks dbx_debug_hooks =
   debug_nothing_rtx_code_label, /* label */
   dbxout_handle_pch,/* handle_pch */
   debug_nothing_rtx_insn,   /* var_location */
+  debug_nothing_tree,   /* inline_entry */
   debug_nothing_tree,   /* size_function */
   debug_nothing_void,/* switch_text_section */
   debug_nothing_tree_tree,  /* set_name */
@@ -417,6 +418,7 @@ const struct gcc_debug_hooks xcoff_debug_hooks =
   debug_nothing_rtx_code_label, /* label */
   dbxout_handle_pch,/* handle_pch */
   debug_nothing_rtx_insn,   /* var_location */
+  debug_nothing_tree,   /* inline_entry */
   debug_nothing_tree,   /* size_function */
   debug_nothing_void,/* switch_text_section */
   debug_nothing_tree_tree,  /* set_name */
diff --git a/gcc/debug.c b/gcc/debug.c
index d68c30ff..5deec2c 100644
--- a/gcc/debug.c
+++ b/gcc/debug.c
@@ -53,6 +53,7 @@ const struct gcc_debug_hooks do_nothing_debug_hooks =
   debug_nothing_rtx_code_label, /* label */
   debug_nothing_int,/* handle_pch */
   debug_nothing_rtx_insn,   /* var_location */
+  debug_nothing_tree,   /* inline_entry */
   debug_nothing_tree,   /* size_function */
   debug_nothing_void,/* switch_text_section */
   debug_nothing_tree_tree,  /* set_name */
diff --git a/gcc/debug.h b/gcc/debug.h
index bfb7221..78bb401 100644
--- a/gcc/debug.h
+++ b/gcc/debug.h
@@ -168,6 +168,9 @@ struct gcc_debug_hooks
   /* Called from final_scan_insn for any NOTE_INSN_VAR_LOCATION note.  */
   void (* var_location) (rtx_insn *);
 
+  /* Called from final_scan_insn for any NOTE_INSN_INLINE_ENTRY note.  */
+  void (* inline_entry) (tree block);
+
   /* Called from finalize_size_functions for size functions so that their body
  can be encoded in the debug info to describe the layout of variable-length
  structures.  */
diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index ff97715..839b153 100644
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -2766,6 +2766,7 @@ const struct gcc_debug_hooks dwarf2_debug_hooks =
   debug_nothing_rtx_code_label,/* label */
   debug_nothing_int,   /* handle_pch */
   dwarf2out_var_location,
+  debug_nothing_tree,  /* inline_entry */
   dwarf2out_size_function, /* size_function */
   dwarf2out_switch_text_section,
   dwarf2out_set_name,
@@ -2804,6 +2805,7 @@ const struct gcc_debug_hooks dwarf2_lineno_debug_hooks =
   debug_nothing_rtx_code_label, /* label */
   debug_nothing_int,/* handle_pch */
   debug_nothing_rtx_insn,   /* var_location */
+  debug_nothing_tree,   /* inline_entry */
   debug_nothing_tree,   /* size_function */
   debug_nothing_void,/* switch_text_section */
   debug_nothing_tree_tree,  /* set_name */
diff --git a/gcc/sdbout.c b/gcc/sdbout.c
index a67f9d6..e21a65d 100644
--- a/gcc/sdbout.c
+++ b/gcc/sdbout.c
@@ -307,6 +307,7 @@ const struct gcc_debug_hooks sdb_debug_hooks =
   sdbout_label, /* label */
   debug_nothing_int,/* handle_pch */
   debug_nothing_rtx_insn,   /* var_location */
+  debug_nothing_tree,   /* inline_entry */
   debug_nothing_tree,   /* size_function */
   debug_nothing_void,/* switch_text_section */
   debug_nothing_tree_tree,  /* set_name */
diff --git a/gcc/vmsdbgout.c b/gcc/vmsdbgout.c
index 42300e2..557b76e 100644
--- a/gcc/vmsdbgout.c
+++ b/gcc/vmsdbgout.c
@@ -203,6 +203,7 @@ const struct gcc_debug_hooks vmsdbg_debug_hooks
debug_nothing_rtx_code_label,  /* label */
debug_nothing_int,/* handle_pch */
debug_nothing_rtx_insn,   /* var_location */
+   debug_nothing_tree,   /* inline_entry */
debug_nothing_tree,   /* size_function */
debug_nothing_void,/* switch_text_section 

[PATCH 2/9] [SFN] boilerplate changes in preparation to introduce nonbind markers

[Alexandre Oliva]

This patch introduces a number of new macros and functions that will
be used to distinguish between different kinds of debug stmts, insns
and notes, namely, preexisting debug bind ones and to-be-introduced
nonbind markers.

In a seemingly mechanical way, it adjusts several uses of the macros
and functions, so that they refer to narrower categories when
appropriate.

These changes, by themselves, should not have any visible effect in
the compiler behavior, since the upcoming debug markers are never
created with this patch alone.

for  gcc/ChangeLog

* gimple.h (enum gimple_debug_subcode): Add
GIMPLE_DEBUG_BEGIN_STMT.
(gimple_debug_begin_stmt_p): New.
(gimple_debug_nonbind_marker_p): New.
* tree.h (MAY_HAVE_DEBUG_MARKER_STMTS): New.
(MAY_HAVE_DEBUG_BIND_STMTS): Renamed from
(MAY_HAVE_DEBUG_STMTS): ... this.  Check both.
* insn-notes.def (BEGIN_STMT): New.
* rtl.h (MAY_HAVE_DEBUG_MARKER_INSNS): New.
(MAY_HAVE_DEBUG_BIND_INSNS): Renamed from
(MAY_HAVE_DEBUG_INSNS): ... this.  Check both.
(NOTE_MARKER_LOCATION, NOTE_MARKER_P): New.
(DEBUG_BIND_INSN_P, DEBUG_MARKER_INSN_P): New.
(INSN_DEBUG_MARKER_KIND): New.
(INSN_VAR_LOCATION): Check for VAR_LOCATION.
(INSN_VAR_LOCATION_PTR): New.
* cfgexpand.c (expand_debug_locations): Handle debug bind insns
only.
(expand_gimple_basic_block): Likewise.  Emit debug temps for TER
deps only if debug bind insns are enabled.
(pass_expand::execute): Avoid deep TER and expand
debug locations for debug bind insns only.
* cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Narrow
debug stmts special handling down to debug bind stmts.
* combine.c (try_combine): Narrow debug insns special handling
down to debug bind insns.
* cse.c (delete_trivially_dead_insns): Handle debug bindings.
Narrow debug insns preexisting special handling down to debug
bind insns.
* dce.c (rest_of_handle_ud_dce): Narrow debug insns special
handling down to debug bind insns.
* function.c (instantiate_virtual_regs): Skip debug markers,
adjust handling of debug binds.
* gimple-ssa-backprop.c (backprop::prepare_change): Try debug
temp insertion iff MAY_HAVE_DEBUG_BIND_STMTS.
* haifa-sched.c (schedule_insn): Narrow special handling of debug
insns to debug bind insns.
* ipa-prop.c (ipa_modify_call_arguments): Narrow special
handling of debug insns to debug bind insns.
* ipa-split.c (split_function): Likewise.
* ira.c (combine_and_move_insns): Adjust debug bind insns only.
* loop-unroll.c (apply_opt_in_copies): Adjust tests on bind
debug insns.
* reg-stack.c (convert_regs_1): Use DEBUG_BIND_INSN_P.
* regrename.c (build_def_use): Likewise.
* regcprop.c (copyprop_hardreg_forward_1): Likewise.
(pass_cprop_hardreg): Narrow special casing of debug insns to
debug bind insns.
* regstat.c (regstat_init_n_sets_and_refs): Likewise.
* reload1.c (reload): Likewise.
* sese.c (sese_build_liveouts): Narrow special casing of debug
stmts to debug bind stmts.
* shrink-wrap.c (move_insn_for_shrink_wrap): Likewise.
* ssa-iterators.h (num_imm_uses): Likewise.
* tree-cfg.c (gimple_merge_blocks): Narrow special casing of
debug stmts to debug bind stmts.
* tree-inline.c (tree_function_versioning): Narrow special casing
of debug stmts to debug bind stmts.
* tree-loop-distribution.c (generate_loops_for_partition):
Narrow special casing of debug stmts to debug bind stmts.
* tree-sra.c (analyze_access_subtree): Narrow special casing
of debug stmts to debug bind stmts.
* tree-ssa-dce.c (remove_dead_stmt): Narrow special casing of debug
stmts to debug bind stmts.
* tree-ssa-loop-ivopt.c (remove_unused_ivs): Narrow special
casing of debug stmts to debug bind stmts.
* tree-ssa-reassoc.c (reassoc_remove_stmt): Likewise.
* tree-ssa-tail-merge.c (tail_merge_optimize): Narrow special
casing of debug stmts to debug bind stmts.
* tree-ssa-threadedge.c (propagate_threaded_block_debug_info):
Likewise.
* tree-ssa.c (flush_pending_stmts): Narrow special casing of
debug stmts to debug bind stmts.
(gimple_replace_ssa_lhs): Likewise.
(insert_debug_temp_for_var_def): Likewise.
(insert_debug_temps_for_defs): Likewise.
(reset_debug_uses): Likewise.
* tree-ssanames.c (release_ssa_name_fn): Likewise.
* tree-vect-loop-manip.c (adjust_debug_stmts_now): Likewise.
(adjust_debug_stmts): Likewise.
(adjust_phi_and_debug_stmts): Likewise.
(vect_do_peeling): Likewise.
* tree-vect-loop.c (vect_transform_loop): 

[PATCH 5/9] [SFN] Introduce -gstatement-frontiers option, enable debug markers

[Alexandre Oliva]

Introduce a command line option to enable statement frontiers, enabled
by default in optimized builds with DWARF2+ debug information.

This patch depends on an earlier patch that completed the
infrastructure for debug markers, and on another patch that turns -g
into a negatable option prefix.

gcc/ChangeLog

* common.opt (gstatement-frontiers): New, setting
debug_nonbind_markers_p.
* rtl.h (MAY_HAVE_DEBUG_MARKER_INSNS): Activate.
* toplev.c (process_options): Autodetect value for debug statement
frontiers option.
* tree.h (MAY_HAVE_DEBUG_MARKER_STMTS): Activate.
* doc/invoke.texi (gstatement-frontiers, gno-statement-frontiers): New.
---
 gcc/common.opt  |  4 
 gcc/doc/invoke.texi | 12 
 gcc/rtl.h   |  2 +-
 gcc/toplev.c|  4 
 gcc/tree.h  |  2 +-
 5 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/gcc/common.opt b/gcc/common.opt
index d18559a..b0748a2 100644
--- a/gcc/common.opt
+++ b/gcc/common.opt
@@ -2874,6 +2874,10 @@ gstabs+
 Common Driver JoinedOrMissing Negative(gvms)
 Generate debug information in extended STABS format.
 
+gstatement-frontiers
+Common Driver Var(debug_nonbind_markers_p) Init(2)
+Emit progressive recommended breakpoint locations.
+
 gstrict-dwarf
 Common Driver Report Var(dwarf_strict) Init(0)
 Don't emit DWARF additions beyond selected version.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 6dbc362..082f122 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -344,6 +344,7 @@ Objective-C and Objective-C++ Dialects}.
 -ggdb  -grecord-gcc-switches  -gno-record-gcc-switches @gol
 -gstabs  -gstabs+  -gstrict-dwarf  -gno-strict-dwarf @gol
 -gcolumn-info  -gno-column-info @gol
+-gstatement-frontiers  -gno-statement-frontiers @gol
 -gvms  -gxcoff  -gxcoff+  -gz@r{[}=@var{type}@r{]} @gol
 -fdebug-prefix-map=@var{old}=@var{new}  -fdebug-types-section @gol
 -feliminate-dwarf2-dups  -fno-eliminate-unused-debug-types @gol
@@ -6988,6 +6989,17 @@ Emit location column information into DWARF debugging 
information, rather
 than just file and line.
 This option is disabled by default.
 
+@item -gstatement-frontiers
+@item -gno-statement-frontiers
+@opindex gstatement-frontiers
+@opindex gno-statement-frontiers
+This option causes GCC to create markers in the internal representation
+at the beginning of statements, and to keep them roughly in place
+throughout compilation, using them to guide the output of @code{is_stmt}
+markers in the line number table.  This is enabled by default when
+compiling with optimization (@option{-Os}, @option{-O}, @option{-O2},
+@dots{}), and outputting DWARF 2 debug information at the normal level.
+
 @item -gz@r{[}=@var{type}@r{]}
 @opindex gz
 Produce compressed debug sections in DWARF format, if that is supported.
diff --git a/gcc/rtl.h b/gcc/rtl.h
index f7aa5fb..6ca6ecf 100644
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -815,7 +815,7 @@ struct GTY(()) rtvec_def {
 #define NONDEBUG_INSN_P(X) (INSN_P (X) && !DEBUG_INSN_P (X))
 
 /* Nonzero if DEBUG_MARKER_INSN_P may possibly hold.  */
-#define MAY_HAVE_DEBUG_MARKER_INSNS 0 /* debug_nonbind_markers_p */
+#define MAY_HAVE_DEBUG_MARKER_INSNS debug_nonbind_markers_p
 /* Nonzero if DEBUG_BIND_INSN_P may possibly hold.  */
 #define MAY_HAVE_DEBUG_BIND_INSNS flag_var_tracking_assignments
 /* Nonzero if DEBUG_INSN_P may possibly hold.  */
diff --git a/gcc/toplev.c b/gcc/toplev.c
index d23714c..dea6f82 100644
--- a/gcc/toplev.c
+++ b/gcc/toplev.c
@@ -1534,6 +1534,10 @@ process_options (void)
 warning_at (UNKNOWN_LOCATION, 0,
"var-tracking-assignments changes selective scheduling");
 
+  if (debug_nonbind_markers_p == AUTODETECT_VALUE)
+debug_nonbind_markers_p = optimize && debug_info_level >= 
DINFO_LEVEL_NORMAL
+  && (write_symbols == DWARF2_DEBUG || write_symbols == 
VMS_AND_DWARF2_DEBUG);
+
   if (flag_tree_cselim == AUTODETECT_VALUE)
 {
   if (HAVE_conditional_move)
diff --git a/gcc/tree.h b/gcc/tree.h
index 379efa8..bd4a5bc 100644
--- a/gcc/tree.h
+++ b/gcc/tree.h
@@ -1127,7 +1127,7 @@ extern void omp_clause_range_check_failed (const_tree, 
const char *, int,
   ((int)TREE_INT_CST_LOW (VL_EXP_CHECK (NODE)->exp.operands[0]))
 
 /* Nonzero if gimple_debug_nonbind_marker_p() may possibly hold.  */
-#define MAY_HAVE_DEBUG_MARKER_STMTS 0 /* debug_nonbind_markers_p */
+#define MAY_HAVE_DEBUG_MARKER_STMTS debug_nonbind_markers_p
 /* Nonzero if gimple_debug_bind_p() (and thus
gimple_debug_source_bind_p()) may possibly hold.  */
 #define MAY_HAVE_DEBUG_BIND_STMTS flag_var_tracking_assignments
-- 
2.9.5

[PATCH 1/9] [SFN] adjust RTL insn-walking API

[Alexandre Oliva]

This patch removes unused RTL functions, introduces alternate ones for
use in a later SFN patch, and regroups other related functions so that
they appear in a more consistent order.

for  gcc/ChangeLog

* emit-rtl.c (next_nondebug_insn, prev_nondebug_insn): Reorder.
(next_nonnote_nondebug_insn, prev_nonnote_nondebug_insn): Reorder.
(next_nonnote_nondebug_insn_bb): New.
(prev_nonnote_nondebug_insn_bb): New.
(prev_nonnote_insn_bb, next_nonnote_insn_bb): Remove.
* rtl.h (prev_nonnote_insn_bb, next_nonnote_insn_bb): Remove decls.
(prev_nonnote_nondebug_insn_bb): Declare.
(next_nonnote_nondebug_insn_bb): Declare.
* cfgbuild.c (find_bb_boundaries): Adjust to skip debug insns.
* cfgrtl.c (get_last_bb_insn): Likewise.
* lra.c (push_insns): Likewise.
---
 gcc/cfgbuild.c |  2 +-
 gcc/cfgrtl.c   |  4 ++--
 gcc/emit-rtl.c | 69 --
 gcc/lra.c  |  2 +-
 gcc/rtl.h  |  4 ++--
 5 files changed, 44 insertions(+), 37 deletions(-)

diff --git a/gcc/cfgbuild.c b/gcc/cfgbuild.c
index 2fe74c4..4a3d903 100644
--- a/gcc/cfgbuild.c
+++ b/gcc/cfgbuild.c
@@ -489,7 +489,7 @@ find_bb_boundaries (basic_block bb)
 the middle of a BB.  We need to split it in the same manner as
 if the barrier were preceded by a control_flow_insn_p insn.  */
  if (!flow_transfer_insn)
-   flow_transfer_insn = prev_nonnote_insn_bb (insn);
+   flow_transfer_insn = prev_nonnote_nondebug_insn_bb (insn);
}
 
   if (control_flow_insn_p (insn))
diff --git a/gcc/cfgrtl.c b/gcc/cfgrtl.c
index 6ef47b7..bce56b4 100644
--- a/gcc/cfgrtl.c
+++ b/gcc/cfgrtl.c
@@ -2274,11 +2274,11 @@ get_last_bb_insn (basic_block bb)
 end = table;
 
   /* Include any barriers that may follow the basic block.  */
-  tmp = next_nonnote_insn_bb (end);
+  tmp = next_nonnote_nondebug_insn_bb (end);
   while (tmp && BARRIER_P (tmp))
 {
   end = tmp;
-  tmp = next_nonnote_insn_bb (end);
+  tmp = next_nonnote_nondebug_insn_bb (end);
 }
 
   return end;
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 6951f61..a6efdd8 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3346,20 +3346,17 @@ next_nonnote_insn (rtx_insn *insn)
   return insn;
 }
 
-/* Return the next insn after INSN that is not a NOTE, but stop the
-   search before we enter another basic block.  This routine does not
-   look inside SEQUENCEs.  */
+/* Return the next insn after INSN that is not a DEBUG_INSN.  This
+   routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-next_nonnote_insn_bb (rtx_insn *insn)
+next_nondebug_insn (rtx_insn *insn)
 {
   while (insn)
 {
   insn = NEXT_INSN (insn);
-  if (insn == 0 || !NOTE_P (insn))
+  if (insn == 0 || !DEBUG_INSN_P (insn))
break;
-  if (NOTE_INSN_BASIC_BLOCK_P (insn))
-   return NULL;
 }
 
   return insn;
@@ -3381,67 +3378,70 @@ prev_nonnote_insn (rtx_insn *insn)
   return insn;
 }
 
-/* Return the previous insn before INSN that is not a NOTE, but stop
-   the search before we enter another basic block.  This routine does
-   not look inside SEQUENCEs.  */
+/* Return the previous insn before INSN that is not a DEBUG_INSN.
+   This routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-prev_nonnote_insn_bb (rtx_insn *insn)
+prev_nondebug_insn (rtx_insn *insn)
 {
-
   while (insn)
 {
   insn = PREV_INSN (insn);
-  if (insn == 0 || !NOTE_P (insn))
+  if (insn == 0 || !DEBUG_INSN_P (insn))
break;
-  if (NOTE_INSN_BASIC_BLOCK_P (insn))
-   return NULL;
 }
 
   return insn;
 }
 
-/* Return the next insn after INSN that is not a DEBUG_INSN.  This
-   routine does not look inside SEQUENCEs.  */
+/* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
+   This routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-next_nondebug_insn (rtx_insn *insn)
+next_nonnote_nondebug_insn (rtx_insn *insn)
 {
   while (insn)
 {
   insn = NEXT_INSN (insn);
-  if (insn == 0 || !DEBUG_INSN_P (insn))
+  if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
break;
 }
 
   return insn;
 }
 
-/* Return the previous insn before INSN that is not a DEBUG_INSN.
-   This routine does not look inside SEQUENCEs.  */
+/* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN,
+   but stop the search before we enter another basic block.  This
+   routine does not look inside SEQUENCEs.  */
 
 rtx_insn *
-prev_nondebug_insn (rtx_insn *insn)
+next_nonnote_nondebug_insn_bb (rtx_insn *insn)
 {
   while (insn)
 {
-  insn = PREV_INSN (insn);
-  if (insn == 0 || !DEBUG_INSN_P (insn))
+  insn = NEXT_INSN (insn);
+  if (insn == 0)
+   break;
+  if (DEBUG_INSN_P (insn))
+   continue;
+  if (!NOTE_P (insn))
break;
+  if (NOTE_INSN_BASIC_BLOCK_P (insn))
+   return NULL;
 }
 
   return insn;
 }
 
-/* Return 

Re: Statement Frontier Notes, Location Views, and Inlined Entry Point Markers

[Alexandre Oliva]

On Aug 23, 2017, Richard Biener  wrote:

> Just separating the boilerplate changes out from the "meat" of the change
> into a separate patch for easier reviewing would be nice.

I've broken up the patch into a patchset with 10 patches.  I've already
posted the one that makes -g options negatable the other day; I'll post
the other 9 as a follow up to this message.

-- 
Alexandre Oliva, freedom fighterhttp://FSFLA.org/~lxoliva/
You must be the change you wish to see in the world. -- Gandhi
Be Free! -- http://FSFLA.org/   FSF Latin America board member
Free Software Evangelist|Red Hat Brasil GNU Toolchain Engineer

Re: [PING #2] [PATCH] enhance -Wrestrict to handle string built-ins (PR 78918)

[Jeff Law]

On 08/28/2017 06:20 PM, Martin Sebor wrote:
>>
>> Warning for memcpy (p, p, ...) is going to fire false positives all
>> around
>> given the C++ FE emits those in some cases and optimization can
>> expose that we are dealing with self-assignments.  And *p = *p is
>> valid.
> 
> I changed it to only warn for calls to the library function and
> not to the __builtin_xxx.  Though I haven't been able to reproduce
> the problem you referring to (bug 32667) which makes me wonder if
> it's been fixed.
I doubt it it's been fully addressed.  I don't know if it's possible,
but if we could somehow flag the assignments as they're generated by the
front-ends for the structure copy, that would probably be best becuase
we could then ignore those, but detect on all the others.

> 
>>
>> @@ -1028,6 +1066,10 @@ gimple_fold_builtin_memory_op
>> (gimple_stmt_iterator *gsi,
>> }
>> }
>>
>> +  /* Avoid folding the call if overlap is detected.  */
>> +  if (check_overlap && detect_overlap (loc, stmt, dest, src, len))
>> +   return false;
>> +
>>
>> no, please not.  You diagnosed the call (which might be a false positive)
>> so why keep it undefined?  The folded stmt will either have the same
>> semantics (aggregate copies expanded as memcpy) or have all reads
>> performed before writes.
> 
> My goal was to follow the approach reflected in the comments
> elsewhere in the file:
> 
> /* Out of bound array access.  Value is undefined,
>but don't fold.  */
So I misunderstood a bit from our call today.  As long as we have the
same semantics I don't have a real strong opinion about folding here.
There are cases where folding is going to enable further optimizations
and cases where it's likely to inhibit optimization.  A lot depends on
the exact context of the nearby code, the operands (particularly the size).

I doubt there's any consensus to be had on this topic because the
implications of folding at point likely aren't very predictable.

My personal opinion is we should only be folding this stuff early if we
collapse down to 1 or 2 stores.   Those are the cases that are most
likely going to result in further optimization.  The rest can probably
be deferred with marginal, if any, performance penalty.


> While gimple_fold_builtin_memory_op may be able to provide well-
> defined behavior for the otherwise undefined semantics in a small
> subset of cases, it doesn't attempt to fold many more that it
> otherwise could (it only folds calls with sizes that are powers
> of 2).  So it seems of dubious value to make an effort in this
> relatively small subset of cases.
I agree its of dubious value.  Again, no strong opinion from me, I'll go
with a majority opinion here.

> 
> In my experience, users also don't appreciate optimizations that
> "rely on" undefined behavior one way or the other.  What they would
> like to see instead is that when their compiler detects undefined
> behavior it diagnoses it but either doesn't use it to make
> optimization decisions, or uses it to disable them.  For calls to
> library functions, that in my view means making the call and not
> folding it.  (Btw., do we have some sort of a policy or guideline
> for how to handle such cases in general?)
It's never a fine crisp line.  There's almost always two sides to this
kind of question and they simply will never agree because they have
different priorities.

So we end up having to make a bit of a guess about how often the
particular undefined situation occurs in practice, what the implications
of optimizing around it might be, etc.  It's almost always the case that
some people complain, but that in and of itself is not enough to justify
never optimizing these cases.  It's a judgment call.

Jeff

Re: [PING][PATCH 2/3] retire mem_signal_fence pattern

[Jeff Law]

On 08/28/2017 06:05 AM, Alexander Monakov wrote:
> Ping (for this and patch 3/3 in the thread).
> 
> On Wed, 2 Aug 2017, Alexander Monakov wrote:
> 
>> Similar to mem_thread_fence issue from the patch 1/3, RTL representation of
>> __atomic_signal_fence must be a compiler barrier.  We have just one backend
>> offering this pattern, and it does not place a compiler barrier.
>>
>> It does not appear useful to expand signal_fence to some kind of hardware
>> instruction, its documentation is wrong/outdated, and we are using it
>> incorrectly anyway.  So just remove the whole thing and simply emit a 
>> compiler
>> memory barrier in the optabs.c handler.
>>
>>  * config/s390/s390.md (mem_signal_fence): Remove.
>> * doc/md.texi (mem_signal_fence): Remove.
>> * optabs.c (expand_mem_signal_fence): Remove uses of 
>> mem_signal_fence.
>> Update comments.
>> * target-insns.def (mem_signal_fence): Remove.
This is OK.

What's the point of the delete_insns_since calls in patch #3?

jeff

Re: [PATCH][compare-elim] Merge zero-comparisons with normal ops

[Jeff Law]

On 08/29/2017 02:39 AM, Kyrill Tkachov wrote:

>>> This scares combine away as x0 is used in insn 33 as well as the
>>> comparison in insn 34.
>>> I think the compare-elim pass can help us here.
>> Is it the multiple use or the hard register that combine doesn't
>> appreciate.  The latter would definitely steer us towards compare-elim.
> 
> It's the multiple use IIRC.
OK.  I can see a case where multiple use causes a problem as well.  That
non-combinable use at insn 33 could well be a problem for combining insn
7 and insn 34 from your sample RTL.


>> What about old style asms?  Do you need to explicit punt those?  I don't
>> think they carry DF info.
> 
> I think we want to bail out on those to be safe. How are they
> represented in RTL?
I think old style asms will be an insn with an ASM_INPUT as their pattern.

New sytle asms (ie, with dataflow) would be an insn with ASM_OPERANDs as
their pattern.
> 
>> Don't you also have to verify that the inputs to ARITH_INSN are
>> unchanged between ARITH_INSN and CMP_INSN?
> 
> I don't think so. As long as there is no flag clobbering instructions
> between them we should be ok.
Right.  It's really a matter of which direction you go.   Working with
your example:


> 
> Consider:
> r1 := r2 + r3  // arith_insn
> r2 := r4 + r5  // arith_insn input modified before cmp_insn
> cc := CMP r1 0 // cmp_insn
combining the r1 := and the cc:= statements essentially means one is
going to move across the r2 := statment.

If the cc assignment moves, then you  need to verify that cc and r1 are
not changed.

If the r1 assignment moves, then you need to verify that r2 and r3 are
not changed.


You're doing the former but I was thinking of the latter.


> 

Ping on three small aarch64 patches

[Steve Ellcey]

This is a ping for several small aarch64 specific patches that have
not been approved or commented on.


Enable resolver attribute on aarch64.
https://gcc.gnu.org/ml/gcc-patches/2017-06/msg00806.html

Improve cost of shift/extend instructions on ThunderX2T99.
https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01823.html


ILP32 multi-arch fix.
https://gcc.gnu.org/ml/gcc-patches/2017-01/msg00130.html (ping)
https://gcc.gnu.org/ml/gcc-patches/2016-12/msg00952.html (ping)
https://gcc.gnu.org/ml/gcc-patches/2016-11/msg01021.html (ping)
https://gcc.gnu.org/ml/gcc-patches/2016-10/msg00522.html (patch)


Steve Ellcey
sell...@cavium.com

Re: [PATCH] Fix bug in simplify_ternary_operation

[Jeff Law]

On 08/28/2017 12:26 PM, Tom de Vries wrote:
> Hi,
> 
> I think I found a bug in r17465:
> ...
>>* cse.c (simplify_ternary_operation): Handle more IF_THEN_ELSE
>>simplifications.
>>
>> diff --git a/gcc/cse.c b/gcc/cse.c
>> index e001597..3c27387 100644
>> --- a/gcc/cse.c
>> +++ b/gcc/cse.c
>> @@ -4713,6 +4713,17 @@ simplify_ternary_operation (code, mode,
>> op0_mode, op0, op1, op2)
> 
> Note: the parameters of simplify_ternary_operation have the following
> meaning:
> ...
> /* Simplify CODE, an operation with result mode MODE and three operands,
>OP0, OP1, and OP2.  OP0_MODE was the mode of OP0 before it became
>a constant.  Return 0 if no simplifications is possible.  */
> 
> rtx
> simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
>  enum rtx_code code;
>  enum machine_mode mode, op0_mode;
>  rtx op0, op1, op2;
> ...
> 
>>   && rtx_equal_p (XEXP (op0, 1), op1)
>>   && rtx_equal_p (XEXP (op0, 0), op2))
>> return op2;
>> +  else if (! side_effects_p (op0))
>> +   {
>> + rtx temp;
>> + temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
>> +   XEXP (op0, 0), XEXP
>> (op0, 1));
> 
> We're handling code == IF_THEN_ELSE here, so op0 is the condition, op1
> is the 'then expr' and op2 is the 'else expr'.
> 
> The parameters of simplify_relational_operation have the following meaning:
> ...
> /* Like simplify_binary_operation except used for relational operators.
>MODE is the mode of the operands, not that of the result.  If MODE
>is VOIDmode, both operands must also be VOIDmode and we compare the
>operands in "infinite precision".
> 
>If no simplification is possible, this function returns zero.
>Otherwise, it returns either const_true_rtx or const0_rtx.  */
> 
> rtx
> simplify_relational_operation (code, mode, op0, op1)
>  enum rtx_code code;
>  enum machine_mode mode;
>  rtx op0, op1;
> ...
> 
> The problem in the patch is that we use op0_mode argument for the mode
> parameter. The mode parameter of simplify_relational_operation needs to
> be the mode of the operands of the condition, while op0_mode is the mode
> of the condition.
> 
> Patch below fixes this on current trunk.
> 
> [ I found this by running into an ICE in
> gcc.c-torture/compile/pr28776-2.c for gcn target. I haven't been able to
> reproduce this with an upstream branch yet. ]
> 
> OK for trunk if bootstrap and reg-test for x86_64 succeeds?
So clearly setting cmp_mode to op0_mode is wrong.   But we also have to
make sure that if cmp_mode is VOIDmode that either XEXP (op0, 0) has a
non-void mode or that XEXP (op0, 1) has a non-void mode, otherwise we're
likely to abort down in simplify_const_relational_operation.

ISTM a better fix is to return NULL_RTX if cmp_mode is VOIDmode and both
the sub-operations are VOIDmode as well.

Can you try that and verify that pr28776-2.c continues to work?
jeff

Re: [PATCH v5] aarch64: Add split-stack initial support

[Adhemerval Zanella]

Ping.

On 26/07/2017 16:08, Adhemerval Zanella wrote:
> This is an update patch based on my previous submission [1].  The changes
> from previous version are:
> 
>   - Update aarch64_supports_split_stack to return true an let the loader
> to actually emit an error if it does not provide the required TCB
> field.  The TCB field support is planed for GLIBC 2.27.
> 
>   - Some cleanup on morestack-c.c to avoid code duplication (ss_pointer
> function).
> 
> I am still some sporadic failures, but it due missing linker support
> for split calls due not enough stack size (on pprof and other go tests
> that call backtrace on signal handling).  This could be mitigate by
> increasing the BACKOFF to a higher value, but to not deviate from other
> ports with split-stack support this patch is using the default values
> (initial stack size of 16k and backoff of 4k).  This should be correctly
> handled with proper gold suppor (as for other ports).
> 
> --
> 
> This patch adds the split-stack support on aarch64 (PR #67877).  As for
> other ports this patch should be used along with glibc and gold support.
> 
> The support is done similar to other architectures: a split-stack field
> is allocated before TCB by glibc, a target-specific __morestack implementation
> and helper functions are added in libgcc and compiler supported in adjusted
> (split-stack prologue, va_start for argument handling).  I also plan to
> send the gold support to adjust stack allocation acrosss split-stack
> and default code calls.
> 
> Current approach is to set the final stack adjustments using a 2 instructions
> at most (mov/movk) which limits stack allocation to upper limit of 4GB.
> The morestack call is non standard with x10 hollding the requested stack
> pointer, x11 the argument pointer (if required), and x12 to return
> continuation address.  Unwinding is handled by a personality routine that
> knows how to find stack segments.
> 
> Split-stack prologue on function entry is as follow (this goes before the
> usual function prologue):
> 
> function:
>   mrsx9, tpidr_el0
>   movx10, 
>   movk   x10, #0x0, lsl #16
>   subx10, sp, x10
>   movx11, sp  # if function has stacked arguments
>   adrp   x12, main_fn_entry
>   addx12, x12, :lo12:.L2
>   cmpx9, x10
>   b.lt   
>   b  __morestack
> main_fn_entry:
>   [function prologue]
> 
> Notes:
> 
> 1. Even if a function does not allocate a stack frame, a split-stack prologue
>is created.  It is to avoid issues with tail call for external symbols
>which might require linker adjustment (libgo/runtime/go-varargs.c).
> 
> 2. Basic-block reordering (enabled with -O2) will move split-stack TCB ldr
>to after the required stack calculation.
> 
> 3. Similar to powerpc, When the linker detects a call from split-stack to
>non-split-stack code, it adds 16k (or more) to the value found in 
> "allocate"
>instructions (so non-split-stack code gets a larger stack).  The amount is
>tunable by a linker option.  The edit means aarch64 does not need to
>implement __morestack_non_split, necessary on x86 because insufficient
>space is available there to edit the stack comparison code.  This feature
>is only implemented in the GNU gold linker.
> 
> 4. AArch64 does not handle >4G stack initially and although it is possible
>to implement it, limiting to 4G allows to materize the allocation with
>only 2 instructions (mov + movk) and thus simplifying the linker
>adjustments required.  Supporting multiple threads each requiring more
>than 4G of stack is probably not that important, and likely to OOM at
>run time.
> 
> 5. The TCB support on GLIBC is meant to be included in version 2.26.
> 
> 6. The continuation address materialized on x12 is done using 'adrp'
>plus add and a static relocation.  Current code uses the
>aarch64_expand_mov_immediate function and since a better alternative
>would be 'adp', it could be a future optimization (not implemented
>in this patch).
> 
> libgcc/ChangeLog:
> 
>   * libgcc/config.host: Use t-stack and t-statck-aarch64 for
>   aarch64*-*-linux.
>   * libgcc/config/aarch64/morestack-c.c: New file.
>   * libgcc/config/aarch64/morestack.S: Likewise.
>   * libgcc/config/aarch64/t-stack-aarch64: Likewise.
>   * libgcc/generic-morestack.c (__splitstack_find): Add aarch64-specific
>   code.
> 
> gcc/ChangeLog:
> 
>   * common/config/aarch64/aarch64-common.c
>   (aarch64_supports_split_stack): New function.
>   (TARGET_SUPPORTS_SPLIT_STACK): New macro.
>   * gcc/config/aarch64/aarch64-linux.h (TARGET_ASM_FILE_END): Remove
>   macro.
>   * gcc/config/aarch64/aarch64-protos.h: Add
>   aarch64_expand_split_stack_prologue and
>   aarch64_split_stack_space_check.
>   * gcc/config/aarch64/aarch64.c (aarch64_gen_far_branch): Add suport
>   to emit 'b' instruction to rtx different 

Re: libgo patch committed: netinet/icmp6.h require netinet/in.h on AIX

[Ian Lance Taylor]

On Thu, Aug 31, 2017 at 1:09 AM, Rainer Orth
 wrote:
>
>> This patch from Tony Reix fixes the libgo configure script to
>> correctly decide whether netinet/icmp6.h exists on AIX.  Bootstrapped
>> and ran Go testsuite on x86_64-pc-linux-gnu.  Committed to mainline.
>
> unfortunately, this patch broke Solaris bootstrap (seen on Solaris 11.4,
> but the headers are the same all the way back to Solaris 10):
>
> runtime_sysinfo.go:1504:32: error: use of undefined type '_mld_hdr_t'
>  type _mld2q struct { mld2q_hdr _mld_hdr_t; mld2q_sqrv uint8; mld2q_qqic 
> uint8; mld2q_numsrc uint16; }
> ^
> runtime_sysinfo.go:1504:32: error: use of undefined type '_mld_hdr_t'
>
> gen-sysinfo.go has
>
> gen-sysinfo.go:type _mld_hdr_t struct { mld_icmp6_hdr _icmp6_hdr; mld_addr 
> _in6_addr; }
>
> which is lost in sysinfo.go due to the use of _in6_addr.  The solution
> is the same as for AIX _arpcom, and the following patch allowed an
> i386-pc-solaris2.11 bootstrap to finish.

Thanks.  Committed.

Ian

[RFC PATCH, i386]: Convert TLS location to DEFAULT_TLS_SEG_REG address space

[Uros Bizjak]

Hello!

Using following testcase:

--cut here--
__thread int a;

int foo (void)
{
  return a;
}
--cut here--

Attached patch converts TLS location in the form of:

(mem/c:SI (plus:DI (unspec:DI [
(const_int 0 [0])
] UNSPEC_TP)
(const:DI (unspec:DI [
(symbol_ref:DI ("a") [flags 0x2a]
)
] UNSPEC_NTPOFF))) [1 a+0 S4 A32]))
"thread.c":5 82 {*movsi_internal}
to:

(mem/c:SI (const:DI (unspec:DI [
(symbol_ref:DI ("a") [flags 0x2a]  )
] UNSPEC_NTPOFF)) [1 a+0 S4 A32 AS1])) "thread.c":5 -1

avoiding the UNSPEC_TP tag and instead mark the location with AS.

This way, address space becomes the property of the memory location,
not of the address itself, so we don't need ugly hacks when the
address is moved to a register (LEA ignores segment overrides, c.f.
split_long_move function in i386.c).

Please note that some instructions (e.g. prefetchX) operate on
prefixed *address*, so we can't just rip out non-AS code from
print_operand. The above amended example:

--cut here--
__thread int a;

int foo (void)
{
  __builtin_prefetch (, 0);
  return a;
}
--cut here--

compiles to:

prefetcht0  %fs:a@tpoff
movl%fs:a@tpoff, %eax

where prefetch operand remains:

(insn 7 6 16 2 (prefetch (plus:DI (unspec:DI [
(const_int 0 [0])
] UNSPEC_TP)
(const:DI (unspec:DI [
(symbol_ref:DI ("a") [flags 0x2a]  )
] UNSPEC_NTPOFF)))
(const_int 0 [0])
(const_int 3 [0x3])) "thread.c":5 1010 {*prefetch_sse}
 (nil))

2017-08-31  Uros Bizjak  

* config/i386/i386-protos.h (ix86_tls_address_pattern_p) New prototype.
(ix86_rewrite_tls_address): Ditto.
* config/i386/i386.c (ix86_tls_address_pattern_p) New function.
(ix86_rewrite_tls_address_1): Ditto.
(ix86_rewrite_tls_address): Ditto.
* config/i386/predicates.md (tls_address_pattern): New predicate.
* config/i386/i386.md (TLS address splitter): New splitter.

Patch was bootstrapped and regression tested on x86_64-linux-gnu
{,-m32}, all default languages plus go.

I plan to commit the patch to the mainline early next week.

Uros
Index: config/i386/i386-protos.h
===
--- config/i386/i386-protos.h   (revision 251566)
+++ config/i386/i386-protos.h   (working copy)
@@ -227,6 +227,8 @@ extern unsigned int ix86_get_callcvt (const_tree);
 #endif
 
 extern rtx ix86_tls_module_base (void);
+extern bool ix86_tls_address_pattern_p (rtx);
+extern rtx ix86_rewrite_tls_address (rtx);
 
 extern void ix86_expand_vector_init (bool, rtx, rtx);
 extern void ix86_expand_vector_set (bool, rtx, rtx, int);
Index: config/i386/i386.c
===
--- config/i386/i386.c  (revision 251566)
+++ config/i386/i386.c  (working copy)
@@ -17631,6 +17631,89 @@ legitimize_tls_address (rtx x, enum tls_model mode
   return dest;
 }
 
+/* Return true if OP refers to a TLS address.  */
+bool
+ix86_tls_address_pattern_p (rtx op)
+{
+  subrtx_var_iterator::array_type array;
+  FOR_EACH_SUBRTX_VAR (iter, array, op, ALL)
+{
+  rtx op = *iter;
+  if (MEM_P (op))
+   {
+ rtx *x =  (op, 0);
+ while (GET_CODE (*x) == PLUS)
+   {
+ int i;
+ for (i = 0; i < 2; i++)
+   {
+ rtx u = XEXP (*x, i);
+ if (GET_CODE (u) == ZERO_EXTEND)
+   u = XEXP (u, 0);
+ if (GET_CODE (u) == UNSPEC
+ && XINT (u, 1) == UNSPEC_TP)
+   return true;
+   }
+ x =  (*x, 0);
+   }
+
+ iter.skip_subrtxes ();
+   }
+}
+
+  return false;
+}
+
+/* Rewrite *LOC so that it refers to a default TLS address space.  */
+void
+ix86_rewrite_tls_address_1 (rtx *loc)
+{
+  subrtx_ptr_iterator::array_type array;
+  FOR_EACH_SUBRTX_PTR (iter, array, loc, ALL)
+{
+  rtx *loc = *iter;
+  if (MEM_P (*loc))
+   {
+ rtx addr = XEXP (*loc, 0);
+ rtx *x = 
+ while (GET_CODE (*x) == PLUS)
+   {
+ int i;
+ for (i = 0; i < 2; i++)
+   {
+ rtx u = XEXP (*x, i);
+ if (GET_CODE (u) == ZERO_EXTEND)
+   u = XEXP (u, 0);
+ if (GET_CODE (u) == UNSPEC
+ && XINT (u, 1) == UNSPEC_TP)
+   {
+ addr_space_t as = DEFAULT_TLS_SEG_REG;
+
+ *x = XEXP (*x, 1 - i);
+
+ *loc = replace_equiv_address_nv (*loc, addr, true);
+ set_mem_addr_space (*loc, as);
+ return;
+   }
+   }
+ x =  (*x, 0);
+   }
+
+ 

[PATCH, vxworks] simplify configuration selection for powerpc vxworks variants

[Olivier Hainque]

Hello,

All the currently supported VxWorks variants for powerpc (regular, ae/653
and mils) are handled by common sections in config.gcc + libgcc/config.host,
with case selectors like:

 powerpc-wrs-vxworks|powerpc-wrs-vxworksae|powerpc-wrs-vxworksmils)

Two variants we now also support (spe and 7) are also handled by these
sections.

The attached patch simplifies the case selectors by using vxworks*
to match them all.

We have been using this in-house for a large number of configurations
on gcc-6 based toolchains. I verified manually that it has the intended
effect on gcc-7 for a subset of these configurations, and that a build
for powerpc-wrs-vxworks7 proceeds as it should on mainline.

Committing to mainline.

Olivier

2017-08-31  Olivier Hainque  

gcc/
* config.gcc (powerpc-wrs-vxworks|vxworksae|vxworksmils): Now
match as powerpc-wrs-vxworks*.

libgcc/
* config.host: Likewise.



ppc-vxworks-wildcard.diff
Description: Binary data

Re: [PATCH 6/7] [ARC] Reimplement ZOL support.

[Andrew Burgess]

* Claudiu Zissulescu  [2017-07-24 10:42:58 
+0200]:

> From: claziss 
> 
> 2017-05-22  Claudiu Zissulescu 
> 
>   * config/arc/arc-c.c (__ARC_LPC_WIDTH__): Add builtin define.
>   * config/arc/arc.c (ARC_MAX_LOOP_LENGTH): Define.
>   (arc_conditional_register_usage): Remove ARC600 lp_count
>   exception.
>   (arc_file_start): Emit Tag_ARC_CPU_variation.
>   (arc_can_use_doloop_p): New conditions to use ZOLs.
>   (hwloop_fail): New function.
>   (hwloop_optimize): Likewise.
>   (hwloop_pattern_reg): Likewise.
>   (arc_doloop_hooks): New struct, to be used with reorg_loops.
>   (arc_reorg_loops): New function, calls reorg_loops.
>   (arc_reorg): Call arc_reorg_loops.  Remove old ZOL handling.
>   (arc600_corereg_hazard): Remove ZOL checking, case handled by
>   hwloop_optimize.
>   (arc_loop_hazard): Remove function, functionality moved into
>   hwloop_optimize.
>   (arc_hazard): Remove arc_loop_hazard call.
>   (arc_adjust_insn_length): Remove ZOL handling, functionality moved
>   into hwloop_optimize.
>   (arc_label_align): Remove ZOL handling.
>   * config/arc/arc.h (LOOP_ALIGN): Changed to 0.
>   * config/arc/arc.md (doloop_begin): Remove pattern.
>   (doloop_begin_i): Likewise.
>   (doloop_end_i): Likewise.
>   (doloop_fallback): Likewise.
>   (doloop_fallback_m): Likewise.
>   (doloop_end): Reimplement expand.
>   (arc_lp): New pattern for LP instruction.
>   (loop_end): New pattern.
>   (loop_fail): Likewise.
>   (decrement_and_branch_until_zero): Likewise.
>   * config/arc/arc.opt (mlpc-width): New option.
>   * doc/invoke.texi (mlpc-width): Document option.
> 
> testsuite/
> 2017-05-22  Claudiu Zissulescu 
> 
>   * gcc.target/arc/loop-1.c: Update test.

I'm happy with this if the doc is updated inline with Sandra's
suggestions.

Thanks,
Andrew



> ---
>  gcc/config/arc/arc-c.c|   2 +
>  gcc/config/arc/arc.c  | 726 
> ++
>  gcc/config/arc/arc.h  |  10 +-
>  gcc/config/arc/arc.md | 419 ++--
>  gcc/config/arc/arc.opt|  25 ++
>  gcc/config/arc/predicates.md  |   2 +
>  gcc/doc/invoke.texi   |  14 +-
>  gcc/testsuite/gcc.target/arc/loop-1.c |  49 +--
>  8 files changed, 561 insertions(+), 686 deletions(-)
>  mode change 100644 => 100755 gcc/testsuite/gcc.target/arc/loop-1.c
> 
> diff --git a/gcc/config/arc/arc-c.c b/gcc/config/arc/arc-c.c
> index de877a1..44ff338 100644
> --- a/gcc/config/arc/arc-c.c
> +++ b/gcc/config/arc/arc-c.c
> @@ -62,6 +62,8 @@ arc_cpu_cpp_builtins (cpp_reader * pfile)
>builtin_define_with_int_value ("__ARC_TLS_REGNO__",
>arc_tp_regno);
>  
> +  builtin_define_with_int_value ("__ARC_LPC_WIDTH__", arc_lpcwidth);
> +
>builtin_define (TARGET_BIG_ENDIAN
> ? "__BIG_ENDIAN__" : "__LITTLE_ENDIAN__");
>if (TARGET_BIG_ENDIAN)
> diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
> index c94b187..0f9b553 100644
> --- a/gcc/config/arc/arc.c
> +++ b/gcc/config/arc/arc.c
> @@ -64,11 +64,15 @@ along with GCC; see the file COPYING3.  If not see
>  #include "rtl-iter.h"
>  #include "alias.h"
>  #include "opts.h"
> +#include "hw-doloop.h"
>  
>  /* Which cpu we're compiling for (ARC600, ARC601, ARC700).  */
>  static char arc_cpu_name[10] = "";
>  static const char *arc_cpu_string = arc_cpu_name;
>  
> +/* Maximum size of a loop.  */
> +#define ARC_MAX_LOOP_LENGTH 4095
> +
>  /* ??? Loads can handle any constant, stores can only handle small ones.  */
>  /* OTOH, LIMMs cost extra, so their usefulness is limited.  */
>  #define RTX_OK_FOR_OFFSET_P(MODE, X) \
> @@ -1708,18 +1712,7 @@ arc_conditional_register_usage (void)
>  i <= ARC_LAST_SIMD_DMA_CONFIG_REG; i++)
>   reg_alloc_order [i] = i;
>  }
> -  /* For ARC600, lp_count may not be read in an instruction
> - following immediately after another one setting it to a new value.
> - There was some discussion on how to enforce scheduling constraints for
> - processors with missing interlocks on the gcc mailing list:
> - http://gcc.gnu.org/ml/gcc/2008-05/msg00021.html .
> - However, we can't actually use this approach, because for ARC the
> - delay slot scheduling pass is active, which runs after
> - machine_dependent_reorg.  */
> -  if (TARGET_ARC600)
> -CLEAR_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], LP_COUNT);
> -  else if (!TARGET_LP_WR_INTERLOCK)
> -fixed_regs[LP_COUNT] = 1;
> +
>for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
>  if (!call_used_regs[regno])
>CLEAR_HARD_REG_BIT (reg_class_contents[SIBCALL_REGS], regno);
> @@ -6998,28 +6991,33 @@ arc_pass_by_reference (cumulative_args_t ca_v 
> ATTRIBUTE_UNUSED,
>  /* 

Re: [PATCH 7/7] [ARC] Fix errors in arc_ifcvt.

[Andrew Burgess]

* Claudiu Zissulescu  [2017-07-24 10:42:59 
+0200]:

> From: claziss 
> 
> The arc_ifcvt procedure is removing a label even when it is used by
> another jump.  This patch fixes dg.exp/pr31507-1.c.
> 
> gcc/
> 2017-07-10  Claudiu Zissulescu  
> 
>   * config/arc/arc.c (arc_ifcvt): Remove use of merge_blocks call.
>   (arc_ccfsm_advance): Fix checking for delay slots.
>   (arc_reorg): Add rtl dump after each call to arc_ifcvt

Looks good.

Thanks,
Andrew




> ---
>  gcc/config/arc/arc.c | 42 +++---
>  1 file changed, 11 insertions(+), 31 deletions(-)
> 
> diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
> index 0f9b553..f7a2b61 100644
> --- a/gcc/config/arc/arc.c
> +++ b/gcc/config/arc/arc.c
> @@ -4429,12 +4429,10 @@ arc_ccfsm_advance (rtx_insn *insn, struct arc_ccfsm 
> *state)
>  
>/* If this is a non-annulled branch with a delay slot, there is
>no need to conditionalize the delay slot.  */
> -  if (NEXT_INSN (PREV_INSN (insn)) != insn
> +  if ((GET_CODE (PATTERN (NEXT_INSN (PREV_INSN (insn == SEQUENCE)
> && state->state == 0 && !INSN_ANNULLED_BRANCH_P (insn))
>   {
> this_insn = NEXT_INSN (this_insn);
> -   gcc_assert (NEXT_INSN (NEXT_INSN (PREV_INSN (start_insn)))
> -   == NEXT_INSN (this_insn));
>   }
>/* See how many insns this branch skips, and what kind of insns.  If 
> all
>insns are okay, and the label or unconditional branch to the same
> @@ -7547,6 +7545,12 @@ arc_reorg (void)
> arc_ifcvt ();
> unsigned int flags = pass_data_arc_ifcvt.todo_flags_finish;
> df_finish_pass ((flags & TODO_df_verify) != 0);
> +
> +   if (dump_file)
> + {
> +   fprintf (dump_file, ";; After if conversion:\n\n");
> +   print_rtl (dump_file, get_insns ());
> + }
>   }
>  
>/* Call shorten_branches to calculate the insn lengths.  */
> @@ -8998,7 +9002,6 @@ static unsigned
>  arc_ifcvt (void)
>  {
>struct arc_ccfsm *statep = >machine->ccfsm_current;
> -  basic_block merge_bb = 0;
>  
>memset (statep, 0, sizeof *statep);
>for (rtx_insn *insn = get_insns (); insn; insn = next_insn (insn))
> @@ -9008,20 +9011,14 @@ arc_ifcvt (void)
>switch (statep->state)
>   {
>   case 0:
> -   if (JUMP_P (insn))
> - merge_bb = 0;
> break;
>   case 1: case 2:
> {
>   /* Deleted branch.  */
> - gcc_assert (!merge_bb);
> - merge_bb = BLOCK_FOR_INSN (insn);
> - basic_block succ_bb
> -   = BLOCK_FOR_INSN (NEXT_INSN (NEXT_INSN (PREV_INSN (insn;
>   arc_ccfsm_post_advance (insn, statep);
>   gcc_assert (!IN_RANGE (statep->state, 1, 2));
>   rtx_insn *seq = NEXT_INSN (PREV_INSN (insn));
> - if (seq != insn)
> + if (GET_CODE (PATTERN (seq)) == SEQUENCE)
> {
>   rtx slot = XVECEXP (PATTERN (seq), 0, 1);
>   rtx pat = PATTERN (slot);
> @@ -9035,18 +9032,10 @@ arc_ifcvt (void)
> gcc_unreachable ();
>   PUT_CODE (slot, NOTE);
>   NOTE_KIND (slot) = NOTE_INSN_DELETED;
> - if (merge_bb && succ_bb)
> -   merge_blocks (merge_bb, succ_bb);
> -   }
> - else if (merge_bb && succ_bb)
> -   {
> - set_insn_deleted (insn);
> - merge_blocks (merge_bb, succ_bb);
> }
>   else
> {
> - PUT_CODE (insn, NOTE);
> - NOTE_KIND (insn) = NOTE_INSN_DELETED;
> + set_insn_deleted (insn);
> }
>   continue;
> }
> @@ -9055,17 +9044,8 @@ arc_ifcvt (void)
> && statep->target_label == CODE_LABEL_NUMBER (insn))
>   {
> arc_ccfsm_post_advance (insn, statep);
> -   basic_block succ_bb = BLOCK_FOR_INSN (insn);
> -   if (merge_bb && succ_bb)
> - merge_blocks (merge_bb, succ_bb);
> -   else if (--LABEL_NUSES (insn) == 0)
> - {
> -   const char *name = LABEL_NAME (insn);
> -   PUT_CODE (insn, NOTE);
> -   NOTE_KIND (insn) = NOTE_INSN_DELETED_LABEL;
> -   NOTE_DELETED_LABEL_NAME (insn) = name;
> - }
> -   merge_bb = 0;
> +   if (--LABEL_NUSES (insn) == 0)
> + delete_insn (insn);
> continue;
>   }
> /* Fall through.  */
> -- 
> 1.9.1
> 

Re: [PATCH 5/7] [ARC] Update various patterns

[Andrew Burgess]

* Claudiu Zissulescu  [2017-07-24 10:42:57 
+0200]:

> From: claziss 
> 
> gcc/
> 2017-04-25  Claudiu Zissulescu  
> 
>   * config/arc/arc.md (movqi_insn): Add stores to save constant long
>   immediates.
>   (movhi_insn): Update store instruction constraint which are saving
>   6-bit short immediates.
>   (movsi_insn): Consider also short scaled load operations.
>   (zero_extendhisi2_i): Use Usd constraint instead of T.
>   (extendhisi2_i): Add q constraint.
>   (arc_clzsi2): Add type and length attributes.
>   (arc_ctzsi2): Likewise.
>   * config/arc/constraints.md (Usc): Update constraint, the
>   assembler can parse two relocations for a single instruction.
> 
> gcc/testsuite/
> 2017-04-25  Claudiu Zissulescu  
> 
>   * gcc.target/arc/arc.exp: Test also cpp files.
>   * gcc.target/arc/tdelay_slots.cpp: New test.

That looks fine to me.

Thanks,
Andrew



> ---
>  gcc/config/arc/arc.md | 54 
> ++-
>  gcc/config/arc/constraints.md |  6 +--
>  gcc/testsuite/gcc.target/arc/arc.exp  |  2 +-
>  gcc/testsuite/gcc.target/arc/tdelay_slots.cpp | 42 +
>  4 files changed, 75 insertions(+), 29 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/arc/tdelay_slots.cpp
> 
> diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
> index f595da7..04a1447 100644
> --- a/gcc/config/arc/arc.md
> +++ b/gcc/config/arc/arc.md
> @@ -618,8 +618,8 @@
>  ; The iscompact attribute allows the epilogue expander to know for which
>  ; insns it should lengthen the return insn.
>  (define_insn "*movqi_insn"
> -  [(set (match_operand:QI 0 "move_dest_operand" "=Rcq,Rcq#q,w,Rcq#q,   
> h, w,w,???w,h, w,Rcq,  S,!*x,  r,r, Ucm,m,???m,Usc")
> - (match_operand:QI 1 "move_src_operand"  "  cL,   cP,Rcq#q,
> P,hCm1,cL,I,?Rac,i,?i,  T,Rcq,Usd,Ucm,m,?Rac,c,?Rac,Cm3"))]
> +  [(set (match_operand:QI 0 "move_dest_operand" "=Rcq,Rcq#q,w,Rcq#q,   
> h, w,w,???w,h, w,Rcq,  S,!*x,  r,r, Ucm,m,???m,  m,Usc")
> + (match_operand:QI 1 "move_src_operand"  "  cL,   cP,Rcq#q,
> P,hCm1,cL,I,?Rac,i,?i,  T,Rcq,Usd,Ucm,m,?Rac,c,?Rac,Cm3,i"))]
>"register_operand (operands[0], QImode)
> || register_operand (operands[1], QImode)"
>"@
> @@ -641,11 +641,12 @@
> xstb%U0 %1,%0
> stb%U0%V0 %1,%0
> stb%U0%V0 %1,%0
> +   stb%U0%V0 %1,%0
> stb%U0%V0 %1,%0"
> -  [(set_attr "type" 
> "move,move,move,move,move,move,move,move,move,move,load,store,load,load,load,store,store,store,store")
> -   (set_attr "iscompact" 
> "maybe,maybe,maybe,true,true,false,false,false,maybe_limm,false,true,true,true,false,false,false,false,false,false")
> -   (set_attr "predicable" 
> "yes,no,yes,no,no,yes,no,yes,yes,yes,no,no,no,no,no,no,no,no,no")
> -   (set_attr "cpu_facility" 
> "av1,av1,av1,av2,av2,*,*,*,*,*,*,*,*,*,*,*,*,*,*")])
> +  [(set_attr "type" 
> "move,move,move,move,move,move,move,move,move,move,load,store,load,load,load,store,store,store,store,store")
> +   (set_attr "iscompact" 
> "maybe,maybe,maybe,true,true,false,false,false,maybe_limm,false,true,true,true,false,false,false,false,false,false,false")
> +   (set_attr "predicable" 
> "yes,no,yes,no,no,yes,no,yes,yes,yes,no,no,no,no,no,no,no,no,no,no")
> +   (set_attr "cpu_facility" 
> "av1,av1,av1,av2,av2,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*")])
>  
>  (define_expand "movhi"
>[(set (match_operand:HI 0 "move_dest_operand" "")
> @@ -654,8 +655,8 @@
>"if (prepare_move_operands (operands, HImode)) DONE;")
>  
>  (define_insn "*movhi_insn"
> -  [(set (match_operand:HI 0 "move_dest_operand" "=Rcq,Rcq#q,w,Rcq#q,   
> h, w,w,???w,Rcq#q,h, w,Rcq,  S,  r,r, Ucm,m,???m,VUsc,VUsc")
> - (match_operand:HI 1 "move_src_operand" "   cL,   cP,Rcq#q,
> P,hCm1,cL,I,?Rac,i,i,?i,  T,Rcq,Ucm,m,?Rac,c,?Rac, Cm3,i"))]
> +  [(set (match_operand:HI 0 "move_dest_operand" "=Rcq,Rcq#q,w,Rcq#q,   
> h, w,w,???w,Rcq#q,h, w,Rcq,  S,  r,r, Ucm,m,???m,  m,VUsc")
> + (match_operand:HI 1 "move_src_operand" "   cL,   cP,Rcq#q,
> P,hCm1,cL,I,?Rac,i,i,?i,  T,Rcq,Ucm,m,?Rac,c,?Rac,Cm3,i"))]
>"register_operand (operands[0], HImode)
> || register_operand (operands[1], HImode)
> || (CONSTANT_P (operands[1])
> @@ -706,8 +707,8 @@
>  ; insns it should lengthen the return insn.
>  ; N.B. operand 1 of alternative 7 expands into pcl,symbol@gotpc .
>  (define_insn "*movsi_insn"  ;   0 1 2 34 
>  5 6   7   8   9   10  11  12  1314  15   16  17  18 19 20  21  
> 222324 25 2627 28  29   30   31
> -  [(set (match_operand:SI 0 "move_dest_operand" "=Rcq,Rcq#q,w,Rcq#q,   
> h, w,w,  w,  w,  w,  w,???w, ?w,  w,Rcq#q,  h,   w,Rcq,  S,   Us<,RcqRck,!*x, 
>  r,!*Rsd,!*Rcd,r,Ucm,  Usd,m,???m,VUsc,VUsc")
> - (match_operand:SI 1 "move_src_operand"  "  cL,   cP,Rcq#q,
> 

Re: [PATCH 4/7] [ARC] Use TARGET_USE_ANCHORS_FOR_SYMBOL_P.

[Andrew Burgess]

* Claudiu Zissulescu  [2017-07-24 10:42:56 
+0200]:

> From: Claudiu Zissulescu 
> 
> We don't want to use anchors for small data: the GP register acts as an 
> anchor in that
> case.  We also don't want to use them for PC-relative accesses,
> where the PC acts as an anchor.  TLS symbols require special accesses as 
> well, don't use
> anchors for such symbols.
> 
> gcc/
> 2017-04-28  Claudiu Zissulescu  
> 
>   * config/arc/arc.c (arc_use_anchors_for_symbol_p): New function.
>   (TARGET_USE_ANCHORS_FOR_SYMBOL_P): Define.
> 
> gcc/testsuite
> 2017-04-28  Claudiu Zissulescu  
> 
>   * gcc.target/arc/pr9001184797.c: New test.

Looks good.

Thanks,
Andrew


> ---
>  gcc/config/arc/arc.c| 24 
>  gcc/testsuite/gcc.target/arc/pr9001184797.c | 19 +++
>  2 files changed, 43 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/arc/pr9001184797.c
> 
> diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
> index 3980a0f..c94b187 100644
> --- a/gcc/config/arc/arc.c
> +++ b/gcc/config/arc/arc.c
> @@ -10687,6 +10687,30 @@ arc_builtin_setjmp_frame_value (void)
>return gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
>  }
>  
> +/* Implement TARGET_USE_ANCHORS_FOR_SYMBOL_P.  We don't want to use
> +   anchors for small data: the GP register acts as an anchor in that
> +   case.  We also don't want to use them for PC-relative accesses,
> +   where the PC acts as an anchor.  Prohibit also TLS symbols to use
> +   anchors.  */
> +
> +static bool
> +arc_use_anchors_for_symbol_p (const_rtx symbol)
> +{
> +  if (SYMBOL_REF_TLS_MODEL (symbol))
> +return false;
> +
> +  if (flag_pic)
> +return false;
> +
> +  if (SYMBOL_REF_SMALL_P (symbol))
> +return false;
> +
> +  return default_use_anchors_for_symbol_p (symbol);
> +}
> +
> +#undef TARGET_USE_ANCHORS_FOR_SYMBOL_P
> +#define TARGET_USE_ANCHORS_FOR_SYMBOL_P arc_use_anchors_for_symbol_p
> +
>  struct gcc_target targetm = TARGET_INITIALIZER;
>  
>  #include "gt-arc.h"
> diff --git a/gcc/testsuite/gcc.target/arc/pr9001184797.c 
> b/gcc/testsuite/gcc.target/arc/pr9001184797.c
> new file mode 100644
> index 000..e76c676
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arc/pr9001184797.c
> @@ -0,0 +1,19 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target tls } */
> +/* { dg-options "-Os -w -mno-ll64" } */
> +
> +/* This test studies the use of anchors and tls symbols. */
> +
> +struct a b;
> +struct a {
> +  long c;
> +  long d
> +} e() {
> +  static __thread struct a f;
> +  static __thread g;
> +  g = 5;
> +  h();
> +  if (f.c)
> +g = g & 5;
> +  f = b;
> +}
> -- 
> 1.9.1
> 

[PATCH, Makefile] improve default cpu selection for e500v2

[Olivier Hainque]

Hello,

gcc can be configured with an "e500v2" cpu target
name, conveying SPE with double precision floats.

config.gcc already has a provision for a good default
cpu selection for SPE with double precision floats
when the latter is explicitly requested with an explicit
--enable command line option. This is:

  # If there is no $with_cpu option, try to infer one from ${target}.
  # This block sets nothing except for with_cpu.
  ...
  case ${target} in
  ...
powerpc*-*-*spe*)
  if test x$enable_e500_double = xyes; then
 with_cpu=8548
  else
 with_cpu=8540
  fi   
  ;;

The attached patch is a proposal to refine this to select 8548 also
when we were configured for an e500v2 target cpu (canonicalized to
match powerpc-*spe), regardless of enable_e500_double.

We have been using something like this in production for a few
years in-house, lately with gcc-6 based toolchains for VxWorks or
bareboard configurations.

I also checked that
- e500v2-wrs-vxworks builds work with gcc-7, that the default cpu is
  indeed properly set to 8548, and that the built toolchains pass Ada
  ACATS tests for a couple of runtime library variants (kernel and rtp).

- a mainline build for powerpc-eabispe without --enable-e500-double
  defaults to 8540

- a mainline build for powerpc-eabispe with --enable-e500-double
  defaults to 8548

- a mainline build for e500v2-wrs-vxworks without --enable-e500-double
  defaults to 8548

OK to commit ?

Thanks in advance

2017-08-31  Olivier Hainque  

* gcc/config.gcc (powerpc*-*-*spe*): Pick 8548 as the
default with_cpu for an e500v2 target cpu name, in addition
to --enable-e500-double.



spe-default-cpu.diff
Description: Binary data

Re: [PATCH] Fix PR82054

[Jason Merrill]

OK.

On Thu, Aug 31, 2017 at 6:15 AM, Richard Biener  wrote:
>
> I am testing the following patch to fix another fallout of the
> assert that we dont' add duplicated dwarf attributes.
>
> LTO bootstrapped / bootstrapped on x86_64-unknown-linux-gnu, testing
> in progress.
>
> Richard.
>
> 2017-08-31  Richard Biener  
>
> PR middle-end/82054
> * dwarf2out.c (dwarf2out_early_global_decl): Process each
> function only once.
>
> * g++.dg/gomp/pr82054.C: New testcase.
>
> Index: gcc/dwarf2out.c
> ===
> --- gcc/dwarf2out.c (revision 251553)
> +++ gcc/dwarf2out.c (working copy)
> @@ -25492,9 +25492,10 @@ dwarf2out_early_global_decl (tree decl)
>if (TREE_CODE (decl) != TYPE_DECL
>&& TREE_CODE (decl) != PARM_DECL)
>  {
> -  tree save_fndecl = current_function_decl;
>if (TREE_CODE (decl) == FUNCTION_DECL)
> {
> + tree save_fndecl = current_function_decl;
> +
>   /* For nested functions, make sure we have DIEs for the parents 
> first
>  so that all nested DIEs are generated at the proper scope in the
>  first shot.  */
> @@ -25521,11 +25522,19 @@ dwarf2out_early_global_decl (tree decl)
>   dwarf2out_decl (origin);
> }
>
> - current_function_decl = decl;
> + /* Emit the DIE for decl but avoid doing that multiple times.  */
> + dw_die_ref old_die;
> + if ((old_die = lookup_decl_die (decl)) == NULL
> + || is_declaration_die (old_die))
> +   {
> + current_function_decl = decl;
> + dwarf2out_decl (decl);
> +   }
> +
> + current_function_decl = save_fndecl;
> }
> -  dwarf2out_decl (decl);
> -  if (TREE_CODE (decl) == FUNCTION_DECL)
> -   current_function_decl = save_fndecl;
> +  else
> +   dwarf2out_decl (decl);
>  }
>symtab->global_info_ready = save;
>  }
> Index: gcc/testsuite/g++.dg/gomp/pr82054.C
> ===
> --- gcc/testsuite/g++.dg/gomp/pr82054.C (revision 0)
> +++ gcc/testsuite/g++.dg/gomp/pr82054.C (working copy)
> @@ -0,0 +1,13 @@
> +// { dg-do compile }
> +// { dg-additional-options "-g" }
> +
> +class a
> +{
> +  bool b ();
> +};
> +bool
> +a::b ()
> +{
> +#pragma omp parallel
> +  ;
> +}

Re: C++ PATCH to fix ICE with -Wbool-operation (PR c++/82040)

[Jason Merrill]

On Thu, Aug 31, 2017 at 8:17 AM, Marek Polacek  wrote:
> + && (complain & tf_error)

This should be tf_warning.

OK with that change.

Jason

Re: [Patch][aarch64] Use IFUNCs to enable LSE instructions in libatomic on aarch64

[Steve Ellcey]

On Tue, 2017-08-29 at 12:25 +0100, Szabolcs Nagy wrote:
> 
> in glibc the hwcap is not used, because it has accesses to
> cached dispatch info, but in libatomic using the hwcap
> argument is the right way.

Here is an updated version of the patch to allow aarch64 to use ifuncs
in libatomic.

The main difference from the last patch is that the library does not
access the hwcap value directly but accesses it through the ifunc
resolver argument.  That means that we no longer need the
init_cpu_revision static constructor to set a flag that the resolver
checks, instead the resolver just does a comparision of its incoming
argument with HWCAP_ATOMICS.

This did mean I had to change the prototype for the resolver functions
in libatomic_i.h to have an argument, which is the way glibc calls
them.  One complication of this is that the type of the argument can
differ between platforms and ABIs so I added code to configure.tgt to
set the type.  I used uint64_t for aarch64 and 'long unsigned int'
for everything else.  That is not correct for all platforms but at 
this point no other platforms access the argument so it should not
matter.  If and when platforms do need to access it they can change
the type if necessary.

Steve Ellcey
sell...@cavium.com


2017-08-31  Steve Ellcey  

* Makefile.am (ARCH_AARCH64_LINUX_LSE): Add IFUNC_OPTIONS and
libatomic_la_LIBADD.
* config/linux/aarch64/host-config.h: New file.
* configure.ac (HWCAP_TYPE): Define.
(AC_CHECK_HEADERS): Check for sys/auxv.h.
(AC_CHECK_FUNCS): Check for getauxval.
(ARCH_AARCH64_LINUX_LSE): New conditional for IFUNC builds.
* configure.tgt (aarch64): Set AARCH and try_ifunc.
(aarch64*-*-linux*) Update config_path.
(aarch64*-*-linux*) Set HWCAP_TYPE.
* libatomic_i.h (GEN_SELECTOR): Add "HWCAP_TYPE hwcap" argument.
* Makefile.in: Regenerate.
* auto-config.h.in: Regenerate.
* configure: Regenerate.

diff --git a/libatomic/Makefile.am b/libatomic/Makefile.am
index d731406..a35df1e 100644
--- a/libatomic/Makefile.am
+++ b/libatomic/Makefile.am
@@ -122,6 +122,10 @@ libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix _$(s)_.lo,$(SIZEOBJS)))
 
 ## On a target-specific basis, include alternates to be selected by IFUNC.
 if HAVE_IFUNC
+if ARCH_AARCH64_LINUX_LSE
+IFUNC_OPTIONS	 = -mcpu=thunderx2t99
+libatomic_la_LIBADD += $(foreach s,$(SIZES),$(addsuffix _$(s)_1_.lo,$(SIZEOBJS)))
+endif
 if ARCH_ARM_LINUX
 IFUNC_OPTIONS	 = -march=armv7-a -DHAVE_KERNEL64
 libatomic_la_LIBADD += $(foreach s,$(SIZES),$(addsuffix _$(s)_1_.lo,$(SIZEOBJS)))
diff --git a/libatomic/config/linux/aarch64/host-config.h b/libatomic/config/linux/aarch64/host-config.h
index e69de29..2e5e97a 100644
--- a/libatomic/config/linux/aarch64/host-config.h
+++ b/libatomic/config/linux/aarch64/host-config.h
@@ -0,0 +1,39 @@
+/* Copyright (C) 2017 Free Software Foundation, Inc.
+
+   This file is part of the GNU Atomic Library (libatomic).
+
+   Libatomic is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   Libatomic is distributed in the hope that it will be useful, but WITHOUT ANY
+   WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+   FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+   more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   .  */
+
+#if HAVE_IFUNC
+#include 
+#ifdef HAVE_SYS_AUXV_H
+# include 
+#endif
+
+# ifdef HWCAP_ATOMICS
+#  define IFUNC_COND_1	(hwcap & HWCAP_ATOMICS)
+# else
+#  define IFUNC_COND_1	(false)
+# endif
+# define IFUNC_NCOND(N)	(1)
+
+#endif /* HAVE_IFUNC */
+
+#include_next 
diff --git a/libatomic/configure.ac b/libatomic/configure.ac
index 023f172..4e06ffe 100644
--- a/libatomic/configure.ac
+++ b/libatomic/configure.ac
@@ -163,6 +163,10 @@ if test -n "$UNSUPPORTED"; then
   AC_MSG_ERROR([Configuration ${target} is unsupported.])
 fi
 
+# Write out the ifunc resolver arg type.
+AC_DEFINE_UNQUOTED(HWCAP_TYPE, $HWCAP_TYPE,
+	[Define type of ifunc resolver function argument.])
+
 # Disable fallbacks to __sync routines from libgcc.  Otherwise we'll
 # make silly decisions about what the cpu can do.
 CFLAGS="$save_CFLAGS -fno-sync-libcalls $XCFLAGS"
@@ -171,7 +175,8 @@ CFLAGS="$save_CFLAGS -fno-sync-libcalls $XCFLAGS"
 AC_STDC_HEADERS
 ACX_HEADER_STRING
 GCC_HEADER_STDINT(gstdint.h)

Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

[Andrew Pinski]

On Thu, Aug 31, 2017 at 9:59 AM, Renlin Li  wrote:
> Hi all,
>
> This is a split patch from a discussion here:
> https://gcc.gnu.org/ml/gcc-patches/2017-06/msg00289.html
>
> It contains the document part only.
> It clarify the behavior when no modifier is used for register operand.
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359
>
> 'H' modifier is added for TImode register pair case.
>
> It only documents the most common cases I can think of. Any other
> suggestions are welcome.
>
> Is Okay to trunk?

>From my point of view this looks good.

Thanks,
Andrew

>
> Regards,
> Renlin
>
>
> gcc/ChangeLog:
>
> 2017-08-31  Renlin Li  
>
> PR target/63359
> * doc/extend.texi (AArch64Operandmodifers): New section.
>
>
> On 27/06/17 18:19, Renlin Li wrote:
>>
>> Hi Andrew,
>>
>> On 27/06/17 17:11, Andrew Pinski wrote:
>>>
>>> On Tue, Jun 27, 2017 at 8:27 AM, Renlin Li 
>>> wrote:

 Hi Andrew,

 On 25/06/17 22:38, Andrew Pinski wrote:
>
>
> On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li 
> wrote:
>>
>>
>> Hi all,
>>
>> In this patch, a new integer register operand modifier 'r' is added.
>> This
>> will use the
>> proper register name according to the mode of corresponding operand.
>>
>> 'w' register for scalar integer mode smaller than DImode
>> 'x' register for DImode
>>
>> This allows more flexibility and would meet people's expectations.
>> It will help for ILP32 and LP64, and big-endian case.
>>
>> A new section is added to document the AArch64 operand modifiers which
>> might
>> be used in inline assembly. It's not an exhaustive list covers every
>> modifier.
>> Only the most common and useful ones are documented.
>>
>> The default behavior of integer operand without modifier is clearly
>> documented
>> as well. It's not changed so that the patch shouldn't break anything.
>>
>> So with this patch, it should resolve the issues in PR63359.
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359
>>
>>
>> aarch64-none-elf regression test Okay. Okay to check in?
>
>
>
> I think 'r' modifier is very fragile and can be used incorrectly and
> wrong in some cases really..



 The user could always (or be encouraged to) opt to a strict register
 modifier to enforce consistent behavior in all cases.

 I agree the flexibility might bring unexpected behavior in corner cases.
 Do you have any examples to share off the top of your head? So that we
 can
 discuss the benefit and pitfalls, and decide to improve the patch or
 withdraw it.
>>>
>>>
>>> One thing is TImode is missing.  I have an use case of __int128_t
>>> inside inline-asm.
>>> For me %r and TImode would produce "x0, x1".  This is one of the
>>> reasons why I said it is fragile.
>>>
>>
>> This is true. Actually, I intended to make 'r' only handle the simplest
>> single
>> integer register case.
>> So that people won't believe it's a magic thing which could handle
>> everything.
>> I could improve the description about 'r' to clearly explain it's
>> limitation.
>>
>> For TImode integer data, if 'r' is used, it will error
>> "invalid 'asm': invalid operand mode for register modifier 'r'"
>>

> I like the documentation though.
>>>
>>>
>>> As an aside %H is not documented here.  Noticed it because I am using
>>> %H with TImode.
>>
>>
>> For the document as well, I only document those most common ones which
>> might be used in
>> inline assembly. It's good to know more use cases.
>> I could add 'H' into the document.
>>
>> Regards,
>> Renlin
>>
>>>
>>> Thanks,
>>> Andrew
>>>

 Thanks,
 Renlin


>
> Thanks,
> Andrew
>
>>
>> gcc/ChangeLog:
>>
>> 2017-06-06  Renlin Li  
>>
>>   PR target/63359
>>   * config/aarch64/aarch64.c (aarch64_print_operand): Add 'r'
>> modifier.
>>   * doc/extend.texi (AArch64Operandmodifiers): New section.

Re: C++ PATCH for c++/80767, unnecessary instantiation of generic lambda

[Jason Merrill]

On Thu, Aug 31, 2017 at 9:37 AM, David Edelsohn  wrote:
> Jason,
>
> The recent patch for 82030
>
> PR c++/82030 - ICE inheriting from multiple lambdas
>
> PR c++/80767
> * call.c (compare_ics): Handle null candidate.
>
> causes bootstrap to fail for AIX due to a segfault ICE building
> libstdc++ with stage1 compiler.

Hmm, strange.  Testcase?

Jason

Re: [RFC][AARCH64]Add 'r' integer register operand modifier. Document the common asm modifier for aarch64 target.

[Renlin Li]

Hi all,

This is a split patch from a discussion here:
https://gcc.gnu.org/ml/gcc-patches/2017-06/msg00289.html

It contains the document part only.
It clarify the behavior when no modifier is used for register operand.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359

'H' modifier is added for TImode register pair case.

It only documents the most common cases I can think of. Any other suggestions 
are welcome.

Is Okay to trunk?

Regards,
Renlin


gcc/ChangeLog:

2017-08-31  Renlin Li  

PR target/63359
* doc/extend.texi (AArch64Operandmodifers): New section.

On 27/06/17 18:19, Renlin Li wrote:

Hi Andrew,

On 27/06/17 17:11, Andrew Pinski wrote:

On Tue, Jun 27, 2017 at 8:27 AM, Renlin Li  wrote:

Hi Andrew,

On 25/06/17 22:38, Andrew Pinski wrote:


On Tue, Jun 6, 2017 at 3:56 AM, Renlin Li  wrote:


Hi all,

In this patch, a new integer register operand modifier 'r' is added. This
will use the
proper register name according to the mode of corresponding operand.

'w' register for scalar integer mode smaller than DImode
'x' register for DImode

This allows more flexibility and would meet people's expectations.
It will help for ILP32 and LP64, and big-endian case.

A new section is added to document the AArch64 operand modifiers which
might
be used in inline assembly. It's not an exhaustive list covers every
modifier.
Only the most common and useful ones are documented.

The default behavior of integer operand without modifier is clearly
documented
as well. It's not changed so that the patch shouldn't break anything.

So with this patch, it should resolve the issues in PR63359.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359


aarch64-none-elf regression test Okay. Okay to check in?



I think 'r' modifier is very fragile and can be used incorrectly and
wrong in some cases really..



The user could always (or be encouraged to) opt to a strict register
modifier to enforce consistent behavior in all cases.

I agree the flexibility might bring unexpected behavior in corner cases.
Do you have any examples to share off the top of your head? So that we can
discuss the benefit and pitfalls, and decide to improve the patch or
withdraw it.


One thing is TImode is missing.  I have an use case of __int128_t
inside inline-asm.
For me %r and TImode would produce "x0, x1".  This is one of the
reasons why I said it is fragile.



This is true. Actually, I intended to make 'r' only handle the simplest single
integer register case.
So that people won't believe it's a magic thing which could handle everything.
I could improve the description about 'r' to clearly explain it's limitation.

For TImode integer data, if 'r' is used, it will error
"invalid 'asm': invalid operand mode for register modifier 'r'"




I like the documentation though.


As an aside %H is not documented here.  Noticed it because I am using
%H with TImode.


For the document as well, I only document those most common ones which might be 
used in
inline assembly. It's good to know more use cases.
I could add 'H' into the document.

Regards,
Renlin



Thanks,
Andrew



Thanks,
Renlin




Thanks,
Andrew



gcc/ChangeLog:

2017-06-06  Renlin Li  

  PR target/63359
  * config/aarch64/aarch64.c (aarch64_print_operand): Add 'r'
modifier.
  * doc/extend.texi (AArch64Operandmodifiers): New section.
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 03ba8fc..589a6cb 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -8286,7 +8286,9 @@ is undefined if @var{a} is modified before using @var{b}.
 @code{asm} supports operand modifiers on operands (for example @samp{%k2} 
 instead of simply @samp{%2}). Typically these qualifiers are hardware 
 dependent. The list of supported modifiers for x86 is found at 
-@ref{x86Operandmodifiers,x86 Operand modifiers}.
+@ref{x86Operandmodifiers,x86 Operand modifiers}.  The list of supported
+modifiers for AArch64 is found at
+@ref{AArch64Operandmodifiers,AArch64 Operand modifiers}.
 
 If the C code that follows the @code{asm} makes no use of any of the output 
 operands, use @code{volatile} for the @code{asm} statement to prevent the 
@@ -8513,7 +8515,9 @@ optimizers may discard the @code{asm} statement as unneeded
 @code{asm} supports operand modifiers on operands (for example @samp{%k2} 
 instead of simply @samp{%2}). Typically these qualifiers are hardware 
 dependent. The list of supported modifiers for x86 is found at 
-@ref{x86Operandmodifiers,x86 Operand modifiers}.
+@ref{x86Operandmodifiers,x86 Operand modifiers}.  The list of supported
+modifiers for AArch64 is found at
+@ref{AArch64Operandmodifiers,AArch64 Operand modifiers}.
 
 In this example using the fictitious @code{combine} instruction, the 
 constraint @code{"0"} for input operand 1 says that it must occupy the same 
@@ -8681,6 +8685,71 @@ error:
 @}
 @end example
 
+@anchor{AArch64Operandmodifiers}

[PATCH] PR c++/82039 suppress -Wzero-as-null-pointer-constant warning

[Jonathan Wakely]

This avoids an unhelpful warning from a system header. Users can't
change the code to avoid the warning, and we don't want to change it
(because it needs to work for C++98 as well as later versions).

PR c++/82039
* include/ext/new_allocator.h (__gnu_cxx::new_allocator::allocate):
Adjust null pointer constant to avoid warning

Tested powerpc64le-linux, committed to trunk.

commit 84cedda4ddf90070f8b5d9132be1bf401183cf1c
Author: Jonathan Wakely 
Date:   Thu Aug 31 12:25:34 2017 +0100

PR c++/82039 suppress -Wzero-as-null-pointer-constant warning

PR c++/82039
* include/ext/new_allocator.h (__gnu_cxx::new_allocator::allocate):
Adjust null pointer constant to avoid warning.

diff --git a/libstdc++-v3/include/ext/new_allocator.h 
b/libstdc++-v3/include/ext/new_allocator.h
index ee64b9c6447..e1e152c4bf0 100644
--- a/libstdc++-v3/include/ext/new_allocator.h
+++ b/libstdc++-v3/include/ext/new_allocator.h
@@ -96,7 +96,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
   // NB: __n is permitted to be 0.  The C++ standard says nothing
   // about what the return value is when __n == 0.
   pointer
-  allocate(size_type __n, const void* = 0)
+  allocate(size_type __n, const void* = static_cast(0))
   {
if (__n > this->max_size())
  std::__throw_bad_alloc();

Re: C/C++ PATCH to add __remove_qualifiers (PR c/65455, c/39985)

[Joseph Myers]

I think the documentation needs to say (and the tests need to test) that 
this produces a non-atomic type (like lvalue-to-rvalue conversion), if 
that's the intent for how it handles atomic types, since _Atomic is 
syntactically a qualifier but largely not treated like one in the 
standard.

-- 
Joseph S. Myers
jos...@codesourcery.com

[AArch64 obvious] Fix register constraints for aarch64_ml[as]_elt_merge

[James Greenhalgh]

Hi,

The MLA by-element instructions have the same restriction as other by-element
instructions whereby the forms operating on vectors of 16-bit integer data
may only use registers v0-v15. We have an iterator for that, applied to the
other patterns generating this instruction, so use that.

Bootstrap and test OK, Applied as r251568.

Thanks,
James

---
2017-08-31  James Greenhalgh  

* config/aarch64/aarch64-simd.md (aarch64_mla_elt_merge): Fix
register constraint for by-element operand.
(aarch64_mls_elt_merge): Likewise.

diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index bf2db02..051d2a9 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -1072,7 +1072,7 @@
   [(set (match_operand:VDQHS 0 "register_operand" "=w")
 	(plus:VDQHS
 	  (mult:VDQHS (vec_duplicate:VDQHS
-		  (match_operand: 1 "register_operand" "w"))
+		  (match_operand: 1 "register_operand" ""))
 		(match_operand:VDQHS 2 "register_operand" "w"))
 	  (match_operand:VDQHS 3 "register_operand" "0")))]
  "TARGET_SIMD"
@@ -1132,7 +1132,7 @@
 	(minus:VDQHS
 	  (match_operand:VDQHS 1 "register_operand" "0")
 	  (mult:VDQHS (vec_duplicate:VDQHS
-		  (match_operand: 2 "register_operand" "w"))
+		  (match_operand: 2 "register_operand" ""))
 		(match_operand:VDQHS 3 "register_operand" "w"]
   "TARGET_SIMD"
   "mls\t%0., %3., %2.[0]"

C/C++ PATCH to add __remove_qualifiers (PR c/65455, c/39985)

[Marek Polacek]

After a long time, I'm finally sending the revisited patch dealing with these
two PRs.  To quickly recap, users were looking for a typeof variant that
strips type qualifiers.  I sent a path adding __typeof_noqual, but a discussion
ensued and it's been concluded that we'd rather go a different way, i.e. add
__remove_qualifiers, which takes a typename, and strips type qualifiers.  That
is my understanding anyway.  Here's a patch implementing just that, for both
C and C++ FEs.

Here's a link to the previous discussion:
https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01146.html

Bootstrapped/regtested on x86_64-linux, ok for trunk?

2017-08-31  Marek Polacek  

PR c/39985
PR c/65455
* c-common.c (c_common_reswords): Add __remove_qualifiers and
__remove_qualifiers__.
(keyword_begins_type_specifier): Handle RID_REMOVE_QUALS.
* c-common.h (enum rid): Add RID_REMOVE_QUALS.

* c-decl.c (start_struct): Also check in_remove_qualifiers.
(finish_struct): Likewise.
(start_enum): Likewise.
(finish_enum): Likewise.
* c-parser.c (c_keyword_starts_typename): Handle RID_REMOVE_QUALS.
(c_token_starts_declspecs): Likewise.
(c_parser_declaration_or_fndef): For __auto_type, remove all type
qualifiers.
(c_parser_declspecs): Handle RID_REMOVE_QUALS.
(c_parser_remove_qualifiers_specifier): New function.
(c_parser_objc_selector): Handle RID_REMOVE_QUALS.
* c-tree.h (enum c_typespec_kind): Update a comment.
Declare in_remove_qualifiers.
* c-typeck.c (in_remove_qualifiers): New global variable.
(build_external_ref): Also check in_remove_qualifiers.
(struct maybe_used_decl): Likewise.
(record_maybe_used_decl): Likewise.
(pop_maybe_used): Likewise.

* parser.c (cp_keyword_starts_decl_specifier_p): Handle
RID_REMOVE_QUALS.
(cp_parser_simple_type_specifier): Likewise.
(cp_parser_sizeof_operand): For __remove_qualifiers, remove all type
qualifiers.

* doc/extend.texi: Document __remove_qualifiers.

* c-c++-common/remove-quals-1.c: New test.
* c-c++-common/remove-quals-2.c: New test.
* c-c++-common/remove-quals-3.c: New test.
* c-c++-common/remove-quals-4.c: New test.
* g++.dg/ext/remove-quals-1.C: New test.
* g++.dg/ext/remove-quals-2.C: New test.
* gcc.dg/auto-type-3.c: New test.
* gcc.dg/remove-quals-1.c: New test.
* gcc.dg/remove-quals-2.c: New test.

diff --git gcc/c-family/c-common.c gcc/c-family/c-common.c
index d959dbc25bb..ae92ff440f6 100644
--- gcc/c-family/c-common.c
+++ gcc/c-family/c-common.c
@@ -423,6 +423,8 @@ const struct c_common_resword c_common_reswords[] =
   { "__null",  RID_NULL,   0 },
   { "__real",  RID_REALPART,   0 },
   { "__real__",RID_REALPART,   0 },
+  { "__remove_qualifiers", RID_REMOVE_QUALS, 0 },
+  { "__remove_qualifiers__", RID_REMOVE_QUALS, 0 },
   { "__restrict",  RID_RESTRICT,   0 },
   { "__restrict__",RID_RESTRICT,   0 },
   { "__signed",RID_SIGNED, 0 },
@@ -7525,6 +7527,7 @@ keyword_begins_type_specifier (enum rid keyword)
 case RID_CLASS:
 case RID_UNION:
 case RID_ENUM:
+case RID_REMOVE_QUALS:
   return true;
 default:
   if (keyword >= RID_FIRST_INT_N
diff --git gcc/c-family/c-common.h gcc/c-family/c-common.h
index 8e367680600..e726aa8844b 100644
--- gcc/c-family/c-common.h
+++ gcc/c-family/c-common.h
@@ -101,7 +101,7 @@ enum rid
   RID_ASM,   RID_TYPEOF,   RID_ALIGNOF,  RID_ATTRIBUTE,  RID_VA_ARG,
   RID_EXTENSION, RID_IMAGPART, RID_REALPART, RID_LABEL,  RID_CHOOSE_EXPR,
   RID_TYPES_COMPATIBLE_P,  RID_BUILTIN_COMPLEX, 
RID_BUILTIN_SHUFFLE,
-  RID_DFLOAT32, RID_DFLOAT64, RID_DFLOAT128,
+  RID_DFLOAT32, RID_DFLOAT64, RID_DFLOAT128,  RID_REMOVE_QUALS,
 
   /* TS 18661-3 keywords, in the same sequence as the TI_* values.  */
   RID_FLOAT16,
diff --git gcc/c/c-decl.c gcc/c/c-decl.c
index d526f0e88e4..b9cd5f8cf56 100644
--- gcc/c/c-decl.c
+++ gcc/c/c-decl.c
@@ -7516,12 +7516,14 @@ start_struct (location_t loc, enum tree_code code, tree 
name,
  within a statement expr used within sizeof, et. al.  This is not
  terribly serious as C++ doesn't permit statement exprs within
  sizeof anyhow.  */
-  if (warn_cxx_compat && (in_sizeof || in_typeof || in_alignof))
+  if (warn_cxx_compat && (in_sizeof || in_typeof || in_alignof
+ || in_remove_qualifiers))
 warning_at (loc, OPT_Wc___compat,
"defining type in %qs expression is invalid in C++",
-   (in_sizeof
-? "sizeof"
-: (in_typeof ? "typeof" : "alignof")));
+   (in_sizeof ? "sizeof"
+: (in_typeof ? "typeof"
+ : (in_alignof ? "alignof"
+   

C++ PATCH for c++/82029, ICE with __func__ in lambda in template

[Jason Merrill]

When tsubst_decl creates a new local static variable, it checks to see
if it belongs to current_function_decl.  It has done this by tsubsting
the old DECL_CONTEXT, but that doesn't work with the new lambda model,
where we can't get to the new lambda op() by tsubsting the old one.
So this patch introduces a new function enclosing_instantiation_of,
which looks out from current_function_decl to find which enclosing
function corresponds to the context of the variable in the template.

I've attached two versions of this patch: one which matches up lambdas
based on nesting level within an enclosing function, and one which
uses a hash table.  I've been ambivalent about which to go with; the
first has more complicated logic, but uses less space, so I think
that's the one I'm going to check in now.  I might revisit this choice
if I find other uses for the hash table.

Tested x86_64-pc-linux-gnu, applying to trunk.
commit 4c88ba8c2a00d662c33f0e2569526122759dc2cb
Author: Jason Merrill 
Date:   Wed Aug 30 16:26:24 2017 -0400

PR c++/82029 - __PRETTY_FUNCTION__ in lambda in template

* pt.c (enclosing_instantiation_of, lambda_fn_in_template_p)
(regenerated_lambda_fn_p): New.
(tsubst_decl) [VAR_DECL]: Use enclosing_instantiation_of.
(tsubst_copy) [VAR_DECL]: Likewise.

diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c
index f4868ab..d5ab939 100644
--- a/gcc/cp/pt.c
+++ b/gcc/cp/pt.c
@@ -12587,6 +12587,63 @@ tsubst_template_decl (tree t, tree args, 
tsubst_flags_t complain,
   return r;
 }
 
+/* True if FN is the op() for a lambda in an uninstantiated template.  */
+
+bool
+lambda_fn_in_template_p (tree fn)
+{
+  if (!LAMBDA_FUNCTION_P (fn))
+return false;
+  tree closure = DECL_CONTEXT (fn);
+  return CLASSTYPE_TEMPLATE_INFO (closure) != NULL_TREE;
+}
+
+/* True if FN is the op() for a lambda regenerated from a lambda in an
+   uninstantiated template.  */
+
+bool
+regenerated_lambda_fn_p (tree fn)
+{
+  return (LAMBDA_FUNCTION_P (fn)
+ && !DECL_TEMPLATE_INSTANTIATION (fn));
+}
+
+/* We're instantiating a variable from template function TCTX.  Return the
+   corresponding current enclosing scope.  This gets complicated because lambda
+   functions in templates are regenerated rather than instantiated, but generic
+   lambda functions are subsequently instantiated.  */
+
+static tree
+enclosing_instantiation_of (tree tctx)
+{
+  tree fn = current_function_decl;
+  int lambda_count = 0;
+
+  for (; tctx && lambda_fn_in_template_p (tctx);
+   tctx = decl_function_context (tctx))
+++lambda_count;
+  for (; fn; fn = decl_function_context (fn))
+{
+  tree lambda = fn;
+  int flambda_count = 0;
+  for (; fn && regenerated_lambda_fn_p (fn);
+  fn = decl_function_context (fn))
+   ++flambda_count;
+  if (DECL_TEMPLATE_INFO (fn)
+ ? most_general_template (fn) != most_general_template (tctx)
+ : fn != tctx)
+   continue;
+  if (lambda_count)
+   {
+ fn = lambda;
+ while (flambda_count-- > lambda_count)
+   fn = decl_function_context (fn);
+   }
+  return fn;
+}
+  gcc_unreachable ();
+}
+
 /* Substitute the ARGS into the T, which is a _DECL.  Return the
result of the substitution.  Issue error and warning messages under
control of COMPLAIN.  */
@@ -12955,7 +13012,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain)
   enclosing function, in which case we need to fill it in now.  */
if (TREE_STATIC (t))
  {
-   tree fn = tsubst (DECL_CONTEXT (t), args, complain, in_decl);
+   tree fn = enclosing_instantiation_of (DECL_CONTEXT (t));
if (fn != current_function_decl)
  ctx = fn;
  }
@@ -14734,9 +14791,7 @@ tsubst_copy (tree t, tree args, tsubst_flags_t 
complain, tree in_decl)
  if (r && !is_capture_proxy (r))
{
  /* Make sure that the one we found is the one we want.  */
- tree ctx = DECL_CONTEXT (t);
- if (DECL_LANG_SPECIFIC (ctx) && DECL_TEMPLATE_INFO (ctx))
-   ctx = tsubst (ctx, args, complain, in_decl);
+ tree ctx = enclosing_instantiation_of (DECL_CONTEXT (t));
  if (ctx != DECL_CONTEXT (r))
r = NULL_TREE;
}
diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-__func__2.C 
b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-__func__2.C
new file mode 100644
index 000..bc0e3b2
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-__func__2.C
@@ -0,0 +1,13 @@
+// PR c++/82029
+// { dg-do compile { target c++11 } }
+
+template  struct A {
+  void m_fn1() {
+[] { return __func__; }();
+  }
+};
+struct B {
+  A a;
+  void m_fn2();
+};
+void B::m_fn2() { a.m_fn1(); }
commit 3edefaa7d1dd5d6b947d4311be1e508552b303c9
Author: Jason Merrill 
Date:   Wed 

RE: [PATCH 3/7] [ARC] Update can_follow_jump hook helper.

[Claudiu Zissulescu]

> This looks fine.
> 

Committed. Thank you for your review,
Claudiu

RE: [PATCH 2/7] [ARC] Use -G option to control sdata behavior

[Claudiu Zissulescu]

> From looking at other targets, I think that we need to add
> documentation for -G into the ARC Options section of of
> gcc/doc/invoke.texi.

Added to invoke.texi as suggested.


> Is it critical that we rely on default types here?  I know it's
> legitimate, but it just makes me sad to see new code using default
> types.

No, just a small mistake on my side. I've updated the test as suggested.

> 
> Also, I guess that this test expects some things to be placed into the
> small data section? Is there no pattern we can 'scan-assembler' for?
> Or is this testing some other feature / bug?

The test should check the interaction between the small data and data section 
anchors (which are default when compiling for size). In the case of an issue, 
we should get an ICE. Anyhow, I've added also a scan-assembler for clarity.

Committed with above changes. Thank you for your review,
Claudiu

Re: [PATCH] Fix ancient wrong-code with ?: (PR middle-end/81814)

[Eric Botcazou]

> Can you file a bugreport and include a testcase for gnat.dg so that
> we can reproduce?  Bonus points if you manage to create a C testcase
> of course ;)

How can I collect them exactly? ;-)

unsigned long foo (int x)
{
  return x > 0 ? (unsigned long) x : 0UL;
}

On x86-64/Linux with GCC 7.2.1, the t.c.003t.original dump contains:

;; Function foo (null)
;; enabled by -tree-original


{
  return (long unsigned int) MAX_EXPR ;
}

With mainline, it contains:

;; Function foo (null)
;; enabled by -tree-original


{
  return x > 0 ? (long unsigned int) x : 0;
}

-- 
Eric Botcazou

Re: [PATCH] Early LTO debug TODO

[Richard Biener]

On Thu, 31 Aug 2017, Richard Biener wrote:

> 
> As suspected during review the DECL_ABSTRACT_P handling in
> gen_formal_parameter_die is no longer necessary so the following
> patch removes it.
> 
> [LTO] bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
> The gdb testsuite shows no regression.
> 
> Will apply after testing finished.

Ok, so it doesn't work - it regresses for example 
gcc.dg/debug/dwarf2/inline1.c because we end up annotating the
abstract DIE with a location.  This is because in gen_subprogram_die
(with decl set as abstract-self and thus generating a concrete
instance subroutine die) we call

  else if (parm && !POINTER_BOUNDS_P (parm))
{
  dw_die_ref parm_die = gen_decl_die (parm, NULL, NULL, 
subr_die);

thus unconditionally pass NULL as origin where gen_formal_parameter_die
just has

  /* If we have a previously generated DIE, use it, unless this is an
 concrete instance (origin != NULL), in which case we need a new
 DIE with a corresponding DW_AT_abstract_origin.  */
  bool reusing_die;
  if (parm_die && origin == NULL)
reusing_die = true;
  else
{
  parm_die = new_die (DW_TAG_formal_parameter, context_die, node);
  reusing_die = false;
}

but obviously that logic is flawed with us passing origin as NULL...

What saved us here is the check whether the existing param_die has
the correct parent, if not we didn't re-use it.  OTOH for die_parent
== NULL we have the extra check that would have been dead code.

Any hint as to whether we should pass in anything as origin or
whether we should keep the existing die_parent logic somehow?
(do we ever get a NULL context_die passed?)

Anyway, retracting the patch for now -- at least the comment above
doesn't match reality (we're getting origin == NULL for the
concrete instance).

Thanks,
Richard.


> Richard.
> 
> 2017-08-31  Richard Biener  
> 
>   * dwarf2out.c (gen_formal_parameter_die): Remove no longer
>   needed DECL_ABSTRACT_P handling.
> 
> Index: gcc/dwarf2out.c
> ===
> --- gcc/dwarf2out.c   (revision 251559)
> +++ gcc/dwarf2out.c   (working copy)
> @@ -21288,28 +21288,9 @@ gen_formal_parameter_die (tree node, tre
>tree ultimate_origin;
>dw_die_ref parm_die = NULL;
>
> -  if (TREE_CODE_CLASS (TREE_CODE (node_or_origin)) == tcc_declaration)
> +  if (DECL_P (node_or_origin))
>  {
>parm_die = lookup_decl_die (node);
> -
> -  /* If the contexts differ, we may not be talking about the same
> -  thing.
> -  ???  When in LTO the DIE parent is the "abstract" copy and the
> -  context_die is the specification "copy".  But this whole block
> -  should eventually be no longer needed.  */
> -  if (parm_die && parm_die->die_parent != context_die && !in_lto_p)
> - {
> -   if (!DECL_ABSTRACT_P (node))
> - {
> -   /* This can happen when creating an inlined instance, in
> -  which case we need to create a new DIE that will get
> -  annotated with DW_AT_abstract_origin.  */
> -   parm_die = NULL;
> - }
> -   else
> - gcc_unreachable ();
> - }
> -
>if (parm_die && parm_die->die_parent == NULL)
>   {
> /* Check that parm_die already has the right attributes that
> 

-- 
Richard Biener 
SUSE LINUX GmbH, GF: Felix Imendoerffer, Jane Smithard, Graham Norton, HRB 
21284 (AG Nuernberg)

RE: [PATCH 1/7] [ARC] Improves and fixes for small data support.

[Claudiu Zissulescu]

> Remember to add both new testsuite files in the ChangeLog, but
> otherwise looks good.
> 
> Thanks,
> Andrew
> 

Done. Thank you for your review,
Claudiu

Re: C++ PATCH for c++/80767, unnecessary instantiation of generic lambda

[David Edelsohn]

Jason,

The recent patch for 82030

PR c++/82030 - ICE inheriting from multiple lambdas

PR c++/80767
* call.c (compare_ics): Handle null candidate.

causes bootstrap to fail for AIX due to a segfault ICE building
libstdc++ with stage1 compiler.

- David

[PATCH] Early LTO debug TODO

[Richard Biener]

As suspected during review the DECL_ABSTRACT_P handling in
gen_formal_parameter_die is no longer necessary so the following
patch removes it.

[LTO] bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
The gdb testsuite shows no regression.

Will apply after testing finished.

Richard.

2017-08-31  Richard Biener  

* dwarf2out.c (gen_formal_parameter_die): Remove no longer
needed DECL_ABSTRACT_P handling.

Index: gcc/dwarf2out.c
===
--- gcc/dwarf2out.c (revision 251559)
+++ gcc/dwarf2out.c (working copy)
@@ -21288,28 +21288,9 @@ gen_formal_parameter_die (tree node, tre
   tree ultimate_origin;
   dw_die_ref parm_die = NULL;
   
-  if (TREE_CODE_CLASS (TREE_CODE (node_or_origin)) == tcc_declaration)
+  if (DECL_P (node_or_origin))
 {
   parm_die = lookup_decl_die (node);
-
-  /* If the contexts differ, we may not be talking about the same
-thing.
-???  When in LTO the DIE parent is the "abstract" copy and the
-context_die is the specification "copy".  But this whole block
-should eventually be no longer needed.  */
-  if (parm_die && parm_die->die_parent != context_die && !in_lto_p)
-   {
- if (!DECL_ABSTRACT_P (node))
-   {
- /* This can happen when creating an inlined instance, in
-which case we need to create a new DIE that will get
-annotated with DW_AT_abstract_origin.  */
- parm_die = NULL;
-   }
- else
-   gcc_unreachable ();
-   }
-
   if (parm_die && parm_die->die_parent == NULL)
{
  /* Check that parm_die already has the right attributes that

C++ PATCH to fix ICE with -Wbool-operation (PR c++/82040)

[Marek Polacek]

Here we got into re-entering the error reporting routines because the
warning_at call wasn't guarded with "complain", and crash ensued.

Bootstrapped/regtested on x86_64-linux, ok for trunk/7?

2017-08-31  Marek Polacek  

PR c++/82040
* typeck.c (cp_build_unary_op): Avoid re-entering reporting routines.

* g++.dg/warn/Wbool-operation-1.C: New test.

diff --git gcc/cp/typeck.c gcc/cp/typeck.c
index 171c2dfb57c..b303ceaede1 100644
--- gcc/cp/typeck.c
+++ gcc/cp/typeck.c
@@ -5982,6 +5982,7 @@ cp_build_unary_op (enum tree_code code, tree xarg, bool 
noconvert,
{
  /* Warn if the expression has boolean value.  */
  if (TREE_CODE (TREE_TYPE (arg)) == BOOLEAN_TYPE
+ && (complain & tf_error)
  && warning_at (location, OPT_Wbool_operation,
 "%<~%> on an expression of type bool"))
inform (location, "did you mean to use logical not (%)?");
diff --git gcc/testsuite/g++.dg/warn/Wbool-operation-1.C 
gcc/testsuite/g++.dg/warn/Wbool-operation-1.C
index e69de29bb2d..4512b858287 100644
--- gcc/testsuite/g++.dg/warn/Wbool-operation-1.C
+++ gcc/testsuite/g++.dg/warn/Wbool-operation-1.C
@@ -0,0 +1,11 @@
+// PR c++/82040
+// { dg-do compile { target c++11 } }
+// { dg-options "-Wbool-operation" }
+
+template 
+decltype (~c{})
+call ()
+{
+  return ~false; // { dg-warning "on an expression of type bool" }
+}
+template int call();

Marek

[PATCH][GCC][AArch64][Committed] Actually reserve room for null terminator when mangling buildins.

[Tamar Christina]

Hi All,

When mangling the builtin names and type signatures we create a buffer
to hold SIMD_MAX_BUILTIN_ARGS arguments, but don't account for the null
terminator for the string. Which means when you actually do use up to
SIMD_MAX_BUILTIN_ARGS arguments you'll end up with garbage at the end of
your intrinsics name.

I now allocate one extra char for the type signature for the null terminator.

Committed under the GCC obvious rule as r251558.

Tested on aarch64-none-elf

Thanks,
Tamar


gcc/
2017-08-31  Tamar Christina  

* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
Resize type_signature.

-- 
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index a1b598c3da29ca791c261ca8a6f918573a818974..2670f3b550fc7c56cb11c5bfd5517cdeb9091d35 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -759,7 +759,7 @@ aarch64_init_simd_builtins (void)
   for (i = 0; i < ARRAY_SIZE (aarch64_simd_builtin_data); i++, fcode++)
 {
   bool print_type_signature_p = false;
-  char type_signature[SIMD_MAX_BUILTIN_ARGS] = { 0 };
+  char type_signature[SIMD_MAX_BUILTIN_ARGS + 1] = { 0 };
   aarch64_simd_builtin_datum *d = _simd_builtin_data[i];
   char namebuf[60];
   tree ftype = NULL;

Re: [AArch64] Tweak aarch64_classify_address interface

[Richard Sandiford]

James Greenhalgh  writes:
> On Tue, Aug 22, 2017 at 10:23:47AM +0100, Richard Sandiford wrote:
>> Previously aarch64_classify_address used an rtx code to distinguish
>> LDP/STP addresses from normal addresses; the code was PARALLEL
>> to select LDP/STP and anything else to select normal addresses.
>> This patch replaces that parameter with a dedicated enum.
>> 
>> The SVE port will add another enum value that didn't map naturally
>> to an rtx code.
>> 
>> Tested on aarch64-linux-gnu.  OK to install?
>
> I can't say I really like this new interface, I'd prefer two wrappers
> aarch64_legitimate_address_p , aarch64_legitimate_ldp_address_p (or similar)
> around your new interface, and for most code to simply call the wrapper.
> Or an overloaded call that filled in ADDR_QUERY_M automatically, to save
> that spreading through the backend.

OK, I went for the second, putting the query type last and making it
an optional argument.

Tested on aarch64-linux-gnu.  OK to install?

Thanks,
Richard


2017-08-31  Richard Sandiford  
Alan Hayward  
David Sherwood  

gcc/
* config/aarch64/aarch64-protos.h (aarch64_addr_query_type): New enum.
(aarch64_legitimate_address_p): Use it instead of an rtx code,
as an optional final parameter.
* config/aarch64/aarch64.c (aarch64_classify_address): Likewise.
(aarch64_legitimate_address_p): Likewise.
(aarch64_address_valid_for_prefetch_p): Update calls accordingly.
(aarch64_legitimate_address_hook_p): Likewise.
(aarch64_print_operand_address): Likewise.
(aarch64_address_cost): Likewise.
* config/aarch64/aarch64-simd.md (mov): Likewise.
* config/aarch64/constraints.md (Uad): Likewise.
* config/aarch64/predicates.md (aarch64_mem_pair_operand): Likewise.

Index: gcc/config/aarch64/aarch64-protos.h
===
--- gcc/config/aarch64/aarch64-protos.h 2017-08-29 20:01:08.126372143 +0100
+++ gcc/config/aarch64/aarch64-protos.h 2017-08-31 10:34:44.007238668 +0100
@@ -111,6 +111,19 @@ enum aarch64_symbol_type
   SYMBOL_FORCE_TO_MEM
 };
 
+/* Classifies the type of an address query.
+
+   ADDR_QUERY_M
+  Query what is valid for an "m" constraint and a memory_operand
+  (the rules are the same for both).
+
+   ADDR_QUERY_LDP_STP
+  Query what is valid for a load/store pair.  */
+enum aarch64_addr_query_type {
+  ADDR_QUERY_M,
+  ADDR_QUERY_LDP_STP
+};
+
 /* A set of tuning parameters contains references to size and time
cost models and vectors for address cost calculations, register
move costs and memory move costs.  */
@@ -433,7 +446,8 @@ bool aarch64_float_const_representable_p
 
 #if defined (RTX_CODE)
 
-bool aarch64_legitimate_address_p (machine_mode, rtx, RTX_CODE, bool);
+bool aarch64_legitimate_address_p (machine_mode, rtx, bool,
+  aarch64_addr_query_type = ADDR_QUERY_M);
 machine_mode aarch64_select_cc_mode (RTX_CODE, rtx, rtx);
 rtx aarch64_gen_compare_reg (RTX_CODE, rtx, rtx);
 rtx aarch64_load_tp (rtx);
Index: gcc/config/aarch64/aarch64.c
===
--- gcc/config/aarch64/aarch64.c2017-08-30 12:20:31.681622403 +0100
+++ gcc/config/aarch64/aarch64.c2017-08-31 10:34:44.009238668 +0100
@@ -4385,21 +4385,21 @@ virt_or_elim_regno_p (unsigned regno)
  || regno == ARG_POINTER_REGNUM);
 }
 
-/* Return true if X is a valid address for machine mode MODE.  If it is,
-   fill in INFO appropriately.  STRICT_P is true if REG_OK_STRICT is in
-   effect.  OUTER_CODE is PARALLEL for a load/store pair.  */
+/* Return true if X is a valid address of type TYPE for machine mode MODE.
+   If it is, fill in INFO appropriately.  STRICT_P is true if
+   REG_OK_STRICT is in effect.  */
 
 static bool
 aarch64_classify_address (struct aarch64_address_info *info,
- rtx x, machine_mode mode,
- RTX_CODE outer_code, bool strict_p)
+ rtx x, machine_mode mode, bool strict_p,
+ aarch64_addr_query_type type = ADDR_QUERY_M)
 {
   enum rtx_code code = GET_CODE (x);
   rtx op0, op1;
 
   /* On BE, we use load/store pair for all large int mode load/stores.
  TI/TFmode may also use a load/store pair.  */
-  bool load_store_pair_p = (outer_code == PARALLEL
+  bool load_store_pair_p = (type == ADDR_QUERY_LDP_STP
|| mode == TImode
|| mode == TFmode
|| (BYTES_BIG_ENDIAN
@@ -4631,7 +4631,7 @@ aarch64_address_valid_for_prefetch_p (rt
   struct aarch64_address_info addr;
 
   /* PRFM accepts the same addresses as DImode...  */
-  bool res = aarch64_classify_address (, x, DImode, MEM, strict_p);
+  bool res = aarch64_classify_address (, x, 

[PATCH] Fix PR81968 some more

[Richard Biener]

I am testing the following to silence more of Solaris ld warnings about
early debug objects.

LTO bootstrapped on x86_64-unknown-linux-gnu, testing in progress.

Richard.

2017-08-31  Richard Biener  

PR lto/81968
* simple-object-elf.c (simple_object_elf_copy_lto_debug_section):
Keep names of removed global symbols.

Index: libiberty/simple-object-elf.c
===
--- libiberty/simple-object-elf.c   (revision 251553)
+++ libiberty/simple-object-elf.c   (working copy)
@@ -1349,9 +1349,11 @@ simple_object_elf_copy_lto_debug_section
 
  if (discard)
{
- /* Make discarded symbols undefined and unnamed.  */
- ELF_SET_FIELD (type_functions, ei_class, Sym,
-ent, st_name, Elf_Word, 0);
+ /* Make discarded symbols undefined and unnamed
+in case it is local.  */
+ if (ELF_ST_BIND (*st_info) == STB_LOCAL)
+   ELF_SET_FIELD (type_functions, ei_class, Sym,
+  ent, st_name, Elf_Word, 0);
  ELF_SET_FIELD (type_functions, ei_class, Sym,
 ent, st_value, Elf_Addr, 0);
  ELF_SET_FIELD (type_functions, ei_class, Sym,

[PATCH] Fix PR82054

[Richard Biener]

I am testing the following patch to fix another fallout of the
assert that we dont' add duplicated dwarf attributes.

LTO bootstrapped / bootstrapped on x86_64-unknown-linux-gnu, testing
in progress.

Richard.

2017-08-31  Richard Biener  

PR middle-end/82054
* dwarf2out.c (dwarf2out_early_global_decl): Process each
function only once.

* g++.dg/gomp/pr82054.C: New testcase.

Index: gcc/dwarf2out.c
===
--- gcc/dwarf2out.c (revision 251553)
+++ gcc/dwarf2out.c (working copy)
@@ -25492,9 +25492,10 @@ dwarf2out_early_global_decl (tree decl)
   if (TREE_CODE (decl) != TYPE_DECL
   && TREE_CODE (decl) != PARM_DECL)
 {
-  tree save_fndecl = current_function_decl;
   if (TREE_CODE (decl) == FUNCTION_DECL)
{
+ tree save_fndecl = current_function_decl;
+
  /* For nested functions, make sure we have DIEs for the parents first
 so that all nested DIEs are generated at the proper scope in the
 first shot.  */
@@ -25521,11 +25522,19 @@ dwarf2out_early_global_decl (tree decl)
  dwarf2out_decl (origin);
}
 
- current_function_decl = decl;
+ /* Emit the DIE for decl but avoid doing that multiple times.  */
+ dw_die_ref old_die;
+ if ((old_die = lookup_decl_die (decl)) == NULL
+ || is_declaration_die (old_die))
+   {
+ current_function_decl = decl;
+ dwarf2out_decl (decl);
+   }
+
+ current_function_decl = save_fndecl;
}
-  dwarf2out_decl (decl);
-  if (TREE_CODE (decl) == FUNCTION_DECL)
-   current_function_decl = save_fndecl;
+  else
+   dwarf2out_decl (decl);
 }
   symtab->global_info_ready = save;
 }
Index: gcc/testsuite/g++.dg/gomp/pr82054.C
===
--- gcc/testsuite/g++.dg/gomp/pr82054.C (revision 0)
+++ gcc/testsuite/g++.dg/gomp/pr82054.C (working copy)
@@ -0,0 +1,13 @@
+// { dg-do compile }
+// { dg-additional-options "-g" }
+
+class a
+{
+  bool b ();
+};
+bool
+a::b ()
+{
+#pragma omp parallel
+  ;
+}

Re: [AArch64], patch] PR71727 fix -mstrict-align

[Christophe Lyon]

ping^2 ?


On 21 August 2017 at 15:04, Christophe Lyon  wrote:
> ping ?
> https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01063.html
>
> Christophe
>
>
> On 18 July 2017 at 14:50, Christophe Lyon  wrote:
>> Hello,
>>
>> I've received a complaint that GCC for AArch64 would generate
>> vectorized code relying on unaligned memory accesses even when using
>> -mstrict-align. This is a problem for code where such accesses lead to
>> memory faults.
>>
>> A previous patch (r24) introduced
>> aarch64_builtin_support_vector_misalignment, which rejects such
>> accesses when the element size is 64 bits, and accept them otherwise,
>> which I think it shouldn't. The testcase added at that time only used
>> 64 bits elements, and therefore didn't fully test the patch.
>>
>> The report I received is about vectorized accesses to an array of
>> unsigned chars, whose start address is not aligned on a 128 bits
>> boundary.
>>
>> The attached patch fixes the problem by making
>> aarch64_builtin_support_vector_misalignment always return false when
>> the misalignment is not known at compile time.
>>
>> I've also added a testcase, which tries to check if the array start
>> address alignment is checked (using %16, and-ing with #15), so that
>> loop peeling is performed *before* using vectorized accesses. Without
>> the patch, vectorized accesses are used at the beginning of the array,
>> and byte accesses are used for the remainder at the end, and there is
>> not such 'and wX,wX,15'.
>>
>> BTW, I'm not sure about the same hook for arm... it seems to me it has
>> a similar problem.
>>
>> OK?
>>
>> Thanks,
>>
>> Christophe

Re: [PATCH] Fix ancient wrong-code with ?: (PR middle-end/81814)

[Richard Biener]

On Thu, 31 Aug 2017, Eric Botcazou wrote:

> > So you should be able to extract a C testcase?  I suspect sth like
> > 
> >   long foo (long x, int y)
> >   {
> > return y > x ? y : x;
> >   }
> > 
> > to no longer be folded to return MAX_EXPR (x, (long) y).
> > 
> > That would be a shame btw.

Just checked and the above is still folded.

> Any news on this?  We're having regressions in Ada because of that, e.g.
> 
>   for U'Object_Size use 17179869280;
>  -for U'Value_Size use  (#1 max 0) + 11) & -4) + 4) * 8) ;
>  +for U'Value_Size use  (if (#1 > 0) then #1 else 0 end) + 11) & -4) + 4) 
> * 8) ;
>   for U'Alignment use 4;
> 
> which means that COND_EXPR is no longer turned into MAX_EXPR in TYPE_SIZE.

Can you file a bugreport and include a testcase for gnat.dg so that
we can reproduce?  Bonus points if you manage to create a C testcase
of course ;)

Richard.

Re: [PATCH] Fix ancient wrong-code with ?: (PR middle-end/81814)

[Eric Botcazou]

> So you should be able to extract a C testcase?  I suspect sth like
> 
>   long foo (long x, int y)
>   {
> return y > x ? y : x;
>   }
> 
> to no longer be folded to return MAX_EXPR (x, (long) y).
> 
> That would be a shame btw.

Any news on this?  We're having regressions in Ada because of that, e.g.

  for U'Object_Size use 17179869280;
 -for U'Value_Size use  (#1 max 0) + 11) & -4) + 4) * 8) ;
 +for U'Value_Size use  (if (#1 > 0) then #1 else 0 end) + 11) & -4) + 4) 
* 8) ;
  for U'Alignment use 4;

which means that COND_EXPR is no longer turned into MAX_EXPR in TYPE_SIZE.

-- 
Eric Botcazou

Re: libgo patch committed: netinet/icmp6.h require netinet/in.h on AIX

[Rainer Orth]

Hi Ian,

> This patch from Tony Reix fixes the libgo configure script to
> correctly decide whether netinet/icmp6.h exists on AIX.  Bootstrapped
> and ran Go testsuite on x86_64-pc-linux-gnu.  Committed to mainline.

unfortunately, this patch broke Solaris bootstrap (seen on Solaris 11.4,
but the headers are the same all the way back to Solaris 10):

runtime_sysinfo.go:1504:32: error: use of undefined type '_mld_hdr_t'
 type _mld2q struct { mld2q_hdr _mld_hdr_t; mld2q_sqrv uint8; mld2q_qqic uint8; 
mld2q_numsrc uint16; }
^
runtime_sysinfo.go:1504:32: error: use of undefined type '_mld_hdr_t'

gen-sysinfo.go has

gen-sysinfo.go:type _mld_hdr_t struct { mld_icmp6_hdr _icmp6_hdr; mld_addr 
_in6_addr; }

which is lost in sysinfo.go due to the use of _in6_addr.  The solution
is the same as for AIX _arpcom, and the following patch allowed an
i386-pc-solaris2.11 bootstrap to finish.

Rainer

-- 
-
Rainer Orth, Center for Biotechnology, Bielefeld University


diff --git a/libgo/mkrsysinfo.sh b/libgo/mkrsysinfo.sh
--- a/libgo/mkrsysinfo.sh
+++ b/libgo/mkrsysinfo.sh
@@ -36,6 +36,10 @@ grep -v '^// ' gen-sysinfo.go | \
 grep '^type _arpcom ' gen-sysinfo.go | \
   sed -e 's/_in6_addr/[16]byte/' >> ${OUT}
 
+# Same on Solaris for _mld_hdr_t.
+grep '^type _mld_hdr_t ' gen-sysinfo.go | \
+  sed -e 's/_in6_addr/[16]byte/' >> ${OUT}
+
 # The time structures need special handling: we need to name the
 # types, so that we can cast integers to the right types when
 # assigning to the structures.
diff --git a/libgo/mksysinfo.sh b/libgo/mksysinfo.sh
--- a/libgo/mksysinfo.sh
+++ b/libgo/mksysinfo.sh
@@ -48,6 +48,10 @@ grep -v '^// ' gen-sysinfo.go | \
 grep '^type _arpcom ' gen-sysinfo.go | \
   sed -e 's/_in6_addr/[16]byte/' >> ${OUT}
 
+# Same on Solaris for _mld_hdr_t.
+grep '^type _mld_hdr_t ' gen-sysinfo.go | \
+  sed -e 's/_in6_addr/[16]byte/' >> ${OUT}
+
 # The errno constants.  These get type Errno.
   egrep '#define E[A-Z0-9_]+ ' errno.i | \
   sed -e 's/^#define \(E[A-Z0-9_]*\) .*$/const \1 = Errno(_\1)/' >> ${OUT}