Re: [PATCH] RISC-V: Fix ICE on riscv_gpr_save_operation_p [PR95683]

[Kito Cheng via Gcc-patches]

Committed, thanks :)

On Tue, Jun 16, 2020 at 6:07 AM Jim Wilson  wrote:
>
> On Mon, Jun 15, 2020 at 7:41 AM Kito Cheng  wrote:
> > gcc/ChangeLog:
> >
> > PR target/95683
> > * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
> > assertion and turn it into a early exit check.
> >
> > gcc/testsuite/ChangeLog
> >
> > PR target/95683
> > * gcc.target/riscv/pr95683.c: New.
>
> Looks good to me also.
>
> Jim

Re: [PATCH] Optimize V*QImode shift by constant using same operation on V*HImode [PR95524]

[Hongtao Liu via Gcc-patches]

On Mon, Jun 15, 2020 at 9:48 PM Jakub Jelinek  wrote:
>
> On Mon, Jun 15, 2020 at 09:29:29PM +0800, Hongtao Liu via Gcc-patches wrote:
> >   Basically i "copy" this optimization from clang i386 backend, Refer
> > to pr95524 for details.
> >   Bootstrap is ok, regression test on i386/x86-64 backend is ok.
> >
> > gcc/ChangeLog:
> > PR target/95524
> > * gcc/config/i386/i386-expand.c
> > (ix86_expand_vec_shift_qihi_constant): New function.
>
> No gcc/ prefix in gcc/ChangeLog (git push would be refused).
> And with or without the prefix it fits, so:
> * config/i386/i386-expand.c (ix86_expand_vec_shift_qihi_constant): New
> function.
>
> > * gcc/config/i386/i386-protos.h: Declare.
>
> This needs to mention the function name again.
>
> > * gcc/config/i386/sse.md: Optimize shift V*QImode by constant.
>
> And thus needs to mention the define_expand, (3)
> in this case.
>
Changed.
> +  machine_mode qimode, himode;
> +  unsigned int shift_constant, and_constant, xor_constant;
> +  rtx vec_const_and, vec_const_xor;
> +  rtx tmp, op1_subreg;
> +  rtx (*gen_shift) (rtx, rtx, rtx);
> +  rtx (*gen_and) (rtx, rtx, rtx);
> +  rtx (*gen_xor) (rtx, rtx, rtx);
> +  rtx (*gen_sub) (rtx, rtx, rtx);
> +
> +  /* Only optimize shift by constant.  */
> +  if (!CONST_INT_P (op2))
> +return false;
> +
> +  qimode = GET_MODE (dest);
> +  shift_constant = INTVAL (op2);
>
> I wonder if shift_constant shouldn't be unsigned HOST_WIDE_INT
i don't think there would be some usage with shift_constant greater
than UINT_MAX(4294967295),
shouldn't unsigned int enough here?
> instead, and which >= 8 values you should try to do something about rather
> than punt on optimizing.  If this is just from normal C shifts, then
That's why this optimization is only for ASHIFT/LSHIFTRT which shifts in 0s.
> perhaps anything >= 32U would be invalid, if it is from intrinsics,
> perhaps there is a different behavior (masked with something?).
We don't have intrinsic of simd int8 shift yet, so it's only normal C shifts.
>
> +  /* Shift constant greater equal 8 result into 0.  */
> +  if (shift_constant > 7)
> +{
> +  if (code == ASHIFT || code == LSHIFTRT)
> +   {
> + emit_move_insn (dest, CONST0_RTX (qimode));
> + return true;
> +   }
> +  /* Sign bit not known.  */
> +  else if (code == ASHIFTRT)
> +   return false;
> +  else
> +   gcc_unreachable ();
> +}
> +
> +  gcc_assert (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
> +  /* Record sign bit.  */
> +  xor_constant = 1 << (8 - shift_constant - 1);
> +
> +  /* Zero upper/lower bits shift from left/right element.  */
> +  and_constant = code == ASHIFT ? 256 - (1 << shift_constant) :
> +(1 << (8 - shift_constant)) - 1;
>
> Formatting.  Should be:
>   and_constant
> = (code == ASHIFT ? 256 - (1 << shift_constant)
>   : (1 << (8 - shift_constant)) - 1);
> or so.
Changed
> +
> +  switch (qimode)
> +{
> +case V16QImode:
> +  himode = V8HImode;
> +  gen_shift = (code == ASHIFT) ? gen_ashlv8hi3 :
> +   (code == ASHIFTRT) ? gen_ashrv8hi3 : gen_lshrv8hi3;
>
> Similarly.  : or ? should just never appear at the end of line.
> And probably no reason to wrap the comparisons in parens,
> instead wrap the whole expression.  So:
>   gen_shift
> = (code == ASHIFT
>? gen_ashlv8hi3
>: code == ASHIFTRT ? gen_ashrv8hi3 : gen_lshrv8hi3);
> or so?
>
Changed.
> +  gen_and = gen_andv16qi3;
> +  gen_xor = gen_xorv16qi3;
> +  gen_sub = gen_subv16qi3;
> +  break;
> +case V32QImode:
> +  himode = V16HImode;
> +  gen_shift = (code == ASHIFT) ? gen_ashlv16hi3 :
> +   (code == ASHIFTRT) ? gen_ashrv16hi3 : gen_lshrv16hi3;
>
> Ditto.
>
Changed.
> +  gen_and = gen_andv32qi3;
> +  gen_xor = gen_xorv32qi3;
> +  gen_sub = gen_subv32qi3;
> +  break;
> +case V64QImode:
> +  himode = V32HImode;
> +  gen_shift = (code == ASHIFT) ? gen_ashlv32hi3 :
> +   (code == ASHIFTRT) ? gen_ashrv32hi3 : gen_lshrv32hi3;
>
> Ditto.
>
Changed.
> +  tmp = gen_reg_rtx (himode);
> +  vec_const_and = gen_reg_rtx (qimode);
> +  op1_subreg = simplify_gen_subreg (himode, op1, qimode, 0);
>
> Just use lowpart_subreg?
Changed.
> +
> +  /* For ASHIFT and LSHIFTRT, perform operation like
> + vpsllw/vpsrlw $shift_constant, %op1, %dest.
> + vpand %vec_const_and, %dest.  */
> +  emit_insn (gen_shift (tmp, op1_subreg, op2));
> +  emit_move_insn (dest, simplify_gen_subreg (qimode, tmp, himode, 0));
> +  emit_move_insn (vec_const_and,
> + ix86_build_const_vector (qimode, true,
> +  GEN_INT (and_constant)));
> +  emit_insn (gen_and (dest, dest, vec_const_and));
> +
> +  /* For ASHIFTRT, perform extra operation like
> + vpxor %vec_const_xor, %dest, %dest
> + vpsubb %vec_const_xor, %dest, %dest  */
> +  if (code == ASHIFTRT)
> +{
> +  

Re: [PATCH] c++: Fix ICE in check_local_shadow with enum [PR95560]

[Marek Polacek via Gcc-patches]

On Thu, Jun 11, 2020 at 03:32:14PM -0400, Jason Merrill wrote:
> On 6/10/20 5:11 PM, Marek Polacek wrote:
> > Another indication that perhaps this warning is emitted too early.  We
> > crash because same_type_p gets a null type: we have an enumerator
> > without a fixed underlying type and finish_enum_value_list hasn't yet
> > run.  So check if the type is null before calling same_type_p.
> 
> Hmm, I wonder why we use NULL_TREE for the type of uninitialized enumerators
> in a template; why not give them integer_type_node temporarily?

That breaks enum22.C:

  template 
  struct A {
enum e_ : unsigned char { Z_, E_=sizeof(Z_) };
  };

  static_assert ( A::E_ == 1, "E_ should be 1");

If we give 'Z_' a type, it's no longer instantiation-dependent, so sizeof(Z_)
immediately evaluates to 4.  Whereas if it doesn't have a type, in the template
we create a SIZEOF_EXPR and only evaluate when instantiating (to 1).

This sounded like a problem big enough for me not to pursue this any further.
Do you want me to try anything else or is the original patch ok?

Marek

Re: [PATCH] Port libgccjit to Windows.

[Nicolas Bértolo via Gcc-patches]

> Thanks, pushed to git master.

Thanks, Nicolas.

Re: [PATCH] Port libgccjit to Windows.

[JonY via Gcc-patches]

On 6/12/20 12:19 AM, JonY wrote:
> On 6/11/20 10:02 PM, Nicolas Bértolo wrote:
>> Hi,
>>
>> On 6/7/20 11:12 PM, JonY wrote:
>>> Ideally, libtool is used so we get libgccjit-0.dll, unfortunately it is
>>> not. So the only way to ABI version the dll would be to use Unix style
>>> soname to mark when an ABI has changed.
>>
>> I tried generating the library as libgccjit-0.dll and naming its import 
>> library
>> libgccjit.dll.a. It worked. I understand you prefer the libgccjit-0.dll 
>> filename
>> from this comment about libtool. A patch implementing this change is 
>> attached.
>>
>> Thanks for your feedback.
>>
>> Nicolas.
>>
> 
> Thanks for the patch, it looks good to me. I will push this soon if no
> one else objects.
> 
> 

Thanks, pushed to git master.



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[PATCH 5/6 ver 2] rs6000, Add vector splat builtin support

[Carl Love via Gcc-patches]

v2 changes:  

change log fixes

gcc/config/rs6000/altivec changed name of define_insn and define_expand
for vxxspltiw... to xxspltiw...   Fixed spaces in gen_xxsplti32dx_v4sf_inst 
(operands[0], GEN_INT

gcc/rs6000-builtin.def propagated name changes above where they are used.

Updated definition for S32bit_cint_operand, c32bit_cint_operand,
f32bit_const_operand predicate definitions.

Changed name of rs6000_constF32toI32 to rs6000_const_f32_to_i32, propagated
name change as needed.  Replaced if test with gcc_assert().

Fixed description of vec_splatid() in documentation.
---

GCC maintainers:

The following patch adds support for the vec_splati, vec_splatid and
vec_splati_ins builtins.

Note, this patch adds support for instructions that take a 32-bit immediate
value that represents a floating point value.  This support adds new
predicates and a support function to properly handle the immediate value.

The patch has been compiled and tested on

  powerpc64le-unknown-linux-gnu (Power 9 LE)

with no regression errors.

The test case was compiled on a Power 9 system and then tested on
Mambo.

Please let me know if this patch is acceptable for the pu
branch.  Thanks.

 Carl Love

gcc/ChangeLog

2020-06-15  Carl Love  

* config/rs6000/altivec.h (vec_splati, vec_splatid, vec_splati_ins):
Add defines.
* config/rs6000/altivec.md (UNSPEC_XXSPLTIW, UNSPEC_XXSPLTID,
UNSPEC_XXSPLTI32DX): New.
(vxxspltiw_v4si, vxxspltiw_v4sf_inst, vxxspltidp_v2df_inst,
vxxsplti32dx_v4si_inst, vxxsplti32dx_v4sf_inst): New define_insn.
(vxxspltiw_v4sf, vxxspltidp_v2df, vxxsplti32dx_v4si,
vxxsplti32dx_v4sf.): New define_expands.
* config/rs6000/predicates (u1bit_cint_operand,
s32bit_cint_operand, c32bit_cint_operand,
f32bit_const_operand): New predicates.
* config/rs6000/rs6000-builtin.def (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF,
 VXXSPLTID): NewBU_FUTURE_V_1 definitions.
(VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF): New BU_FUTURE_V_3
definitions.
(XXSPLTIW, XXSPLTID): New BU_FUTURE_OVERLOAD_1 definitions.
(XXSPLTI32DX): Add BU_FUTURE_OVERLOAD_3 definition.
* config/rs6000/rs6000-call.c (FUTURE_BUILTIN_VEC_XXSPLTIW,
FUTURE_BUILTIN_VEC_XXSPLTID, FUTURE_BUILTIN_VEC_XXSPLTI32DX):
New definitions.
* config/rs6000/rs6000-protos.h (rs6000_constF32toI32): New extern
declaration.
* config/rs6000/rs6000.c (rs6000_constF32toI32): New function.
* config/doc/extend.texi: Add documentation for vec_splati,
vec_splatid, and vec_splati_ins.

gcc/testsuite/ChangeLog

2020-06-15  Carl Love  

* testsuite/gcc.target/powerpc/vec-splati-runnable: New test.
---
 gcc/config/rs6000/altivec.h   |   3 +
 gcc/config/rs6000/altivec.md  | 109 +
 gcc/config/rs6000/predicates.md   |  33 
 gcc/config/rs6000/rs6000-builtin.def  |  13 ++
 gcc/config/rs6000/rs6000-call.c   |  19 +++
 gcc/config/rs6000/rs6000-protos.h |   1 +
 gcc/config/rs6000/rs6000.c|  11 ++
 gcc/doc/extend.texi   |  35 +
 .../gcc.target/powerpc/vec-splati-runnable.c  | 145 ++
 9 files changed, 369 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c

diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 0be68892aad..9ed41b1cbf1 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -705,6 +705,9 @@ __altivec_scalar_pred(vec_any_nle,
 #define vec_replace_unaligned(a, b, c) __builtin_vec_replace_un (a, b, c)
 #define vec_sldb(a, b, c)  __builtin_vec_sldb (a, b, c)
 #define vec_srdb(a, b, c)  __builtin_vec_srdb (a, b, c)
+#define vec_splati(a)  __builtin_vec_xxspltiw (a)
+#define vec_splatid(a) __builtin_vec_xxspltid (a)
+#define vec_splati_ins(a, b, c)__builtin_vec_xxsplti32dx (a, b, c)
 
 #define vec_gnb(a, b)  __builtin_vec_gnb (a, b)
 #define vec_clrl(a, b) __builtin_vec_clrl (a, b)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 832a35cdaa9..25f6b9b2f07 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -173,6 +173,9 @@
UNSPEC_VSTRIL
UNSPEC_SLDB
UNSPEC_SRDB
+   UNSPEC_XXSPLTIW
+   UNSPEC_XXSPLTID
+   UNSPEC_XXSPLTI32DX
 ])
 
 (define_c_enum "unspecv"
@@ -799,6 +802,112 @@
   "vsdbi %0,%1,%2,%3"
   [(set_attr "type" "vecsimple")])
 
+(define_insn "xxspltiw_v4si"
+  [(set (match_operand:V4SI 0 "register_operand" "=wa")
+   (unspec:V4SI [(match_operand:SI 1 "s32bit_cint_operand" "n")]
+UNSPEC_XXSPLTIW))]
+ "TARGET_FUTURE"
+ "xxspltiw %x0,%1"
+ [(set_attr "type" "vecsimple")])
+
+(define_expand "xxspltiw_v4sf"
+  [(set 

[PATCH 4/6 ver 2] rs6000, Add vector shift double builtin support

[Carl Love via Gcc-patches]

v2 fixes:

 change logs redone

  gcc/config/rs6000/rs6000-call.c - added spaces before parenthesis around args.

-
GCC maintainers:

The following patch adds support for the vector shift double builtins
for RFC2609.

The patch has been compiled and tested on

  powerpc64le-unknown-linux-gnu (Power 9 LE)

and Mambo with no regression errors.

Please let me know if this patch is acceptable for the pu
branch.  Thanks.

 Carl Love

---

gcc/ChangeLog

2020-06-15  Carl Love  

* config/rs6000/altivec.h (vec_sldb and vec_srdb): New defines.
* config/rs6000/altivec.md (UNSPEC_SLDB, UNSPEC_SRDB): New.
(SLDB_LR attribute): New.
(VSHIFT_DBL_LR iterator): New.
(vsdb_): New define_insn.
* config/rs6000/rs6000-builtin.def (VSLDB_V16QI, VSLDB_V8HI,
VSLDB_V4SI, VSLDB_V2DI, VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI,
VSRDB_V2DI): New BU_FUTURE_V_3 definitions.
(SLDB, SRDB): New BU_FUTURE_OVERLOAD_3 definitions.
* config/rs6000/rs6000-call.c (FUTURE_BUILTIN_VEC_SLDB,
FUTURE_BUILTIN_VEC_SRDB): New definitions.
(rs6000_expand_ternop_builtin) [CODE_FOR_vsldb_v16qi,
CODE_FOR_vsldb_v8hi, CODE_FOR_vsldb_v4si, CODE_FOR_vsldb_v2di,
CODE_FOR_vsrdb_v16qi, CODE_FOR_vsrdb_v8hi, CODE_FOR_vsrdb_v4si,
CODE_FOR_vsrdb_v2di}: Add else if clauses.
* doc/extend.texi: Add description for vec_sldb and vec_srdb.

gcc/testsuite/ChangeLog

2020-06-15  Carl Love  
* gcc.target/powerpc/vec-shift-double-runnable.c:  New test file.
---
 gcc/config/rs6000/altivec.h   |   2 +
 gcc/config/rs6000/altivec.md  |  18 +
 gcc/config/rs6000/rs6000-builtin.def  |  11 +
 gcc/config/rs6000/rs6000-call.c   |  70 
 gcc/doc/extend.texi   |  53 +++
 .../powerpc/vec-shift-double-runnable.c   | 384 ++
 6 files changed, 538 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-shift-double-runnable.c

diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 435ffb8158f..0be68892aad 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -703,6 +703,8 @@ __altivec_scalar_pred(vec_any_nle,
 #define vec_inserth(a, b, c)   __builtin_vec_inserth (a, b, c)
 #define vec_replace_elt(a, b, c)   __builtin_vec_replace_elt (a, b, c)
 #define vec_replace_unaligned(a, b, c) __builtin_vec_replace_un (a, b, c)
+#define vec_sldb(a, b, c)  __builtin_vec_sldb (a, b, c)
+#define vec_srdb(a, b, c)  __builtin_vec_srdb (a, b, c)
 
 #define vec_gnb(a, b)  __builtin_vec_gnb (a, b)
 #define vec_clrl(a, b) __builtin_vec_clrl (a, b)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 0b0b49ee056..832a35cdaa9 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -171,6 +171,8 @@
UNSPEC_XXEVAL
UNSPEC_VSTRIR
UNSPEC_VSTRIL
+   UNSPEC_SLDB
+   UNSPEC_SRDB
 ])
 
 (define_c_enum "unspecv"
@@ -781,6 +783,22 @@
   DONE;
 })
 
+;; Map UNSPEC_SLDB to "l" and  UNSPEC_SRDB to "r".
+(define_int_attr SLDB_LR [(UNSPEC_SLDB "l")
+ (UNSPEC_SRDB "r")])
+
+(define_int_iterator VSHIFT_DBL_LR [UNSPEC_SLDB UNSPEC_SRDB])
+
+(define_insn "vsdb_"
+ [(set (match_operand:VI2 0 "register_operand" "=v")
+  (unspec:VI2 [(match_operand:VI2 1 "register_operand" "v")
+  (match_operand:VI2 2 "register_operand" "v")
+  (match_operand:QI 3 "const_0_to_12_operand" "n")]
+ VSHIFT_DBL_LR))]
+  "TARGET_FUTURE"
+  "vsdbi %0,%1,%2,%3"
+  [(set_attr "type" "vecsimple")])
+
 (define_expand "vstrir_"
   [(set (match_operand:VIshort 0 "altivec_register_operand")
(unspec:VIshort [(match_operand:VIshort 1 "altivec_register_operand")]
diff --git a/gcc/config/rs6000/rs6000-builtin.def 
b/gcc/config/rs6000/rs6000-builtin.def
index 91821f29a6f..2b198177ef0 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -2657,6 +2657,15 @@ BU_FUTURE_V_3 (VREPLACE_UN_V2DI, "vreplace_un_v2di", 
CONST, vreplace_un_v2di)
 BU_FUTURE_V_3 (VREPLACE_UN_UV2DI, "vreplace_un_uv2di", CONST, vreplace_un_v2di)
 BU_FUTURE_V_3 (VREPLACE_UN_V2DF, "vreplace_un_v2df", CONST, vreplace_un_v2df)
 
+BU_FUTURE_V_3 (VSLDB_V16QI, "vsldb_v16qi", CONST, vsldb_v16qi)
+BU_FUTURE_V_3 (VSLDB_V8HI, "vsldb_v8hi", CONST, vsldb_v8hi)
+BU_FUTURE_V_3 (VSLDB_V4SI, "vsldb_v4si", CONST, vsldb_v4si)
+BU_FUTURE_V_3 (VSLDB_V2DI, "vsldb_v2di", CONST, vsldb_v2di)
+
+BU_FUTURE_V_3 (VSRDB_V16QI, "vsrdb_v16qi", CONST, vsrdb_v16qi)
+BU_FUTURE_V_3 (VSRDB_V8HI, "vsrdb_v8hi", CONST, vsrdb_v8hi)
+BU_FUTURE_V_3 (VSRDB_V4SI, "vsrdb_v4si", CONST, vsrdb_v4si)
+BU_FUTURE_V_3 (VSRDB_V2DI, "vsrdb_v2di", CONST, vsrdb_v2di)
 BU_FUTURE_V_1 (VSTRIBR, "vstribr", CONST, vstrir_v16qi)
 BU_FUTURE_V_1 (VSTRIHR, "vstrihr", 

[PATCH 6/6 ver 2] rs6000 Add vector blend, permute builtin support

[Carl Love via Gcc-patches]

v2 changes:

   Updated ChangeLog per comments.

   define_expand "xxpermx",  Updated implementation to use XOR

   (icode == CODE_FOR_xxpermx, fix comments and check for 3-bit immediate
 field.

   gcc/doc/extend.texi:
comment "Maybe it should say it is related to vsel/xxsel, but per
bigger element?", added comment.  I took the description directly
from spec.  Don't really don't want to mess with the approved
description.

   fixed typo for Vector Permute Extendedextracth

--

GCC maintainers:

The following patch adds support for the vec_blendv and vec_permx
builtins.

The patch has been compiled and tested on

  powerpc64le-unknown-linux-gnu (Power 9 LE)

with no regression errors.

The test cases were compiled on a Power 9 system and then tested on
Mambo.

 Carl Love

---
rs6000 RFC2609 vector blend, permute instructions

gcc/ChangeLog

2020-06-15  Carl Love  

* config/rs6000/altivec.h (vec_blendv, vec_permx): Add define.
* config/rs6000/altivec.md (UNSPEC_XXBLEND, UNSPEC_XXPERMX.): New
unspecs.
(VM3): New define_mode.
(VM3_char): New define_attr.
(xxblend_ mode VM3): New define_insn.
(xxpermx): New define_expand.
(xxpermx_inst): New define_insn.
* config/rs6000/rs6000-builtin.def (VXXBLEND_V16QI, VXXBLEND_V8HI,
VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): New
BU_FUTURE_V_3 definitions.
(XXBLENDBU_FUTURE_OVERLOAD_3): New BU_FUTURE_OVERLOAD_3 definition.
(XXPERMX): New BU_FUTURE_OVERLOAD_4 definition.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
(FUTURE_BUILTIN_VXXPERMX): Add if case support.
* config/rs6000/rs6000-call.c (FUTURE_BUILTIN_VXXBLEND_V16QI,
FUTURE_BUILTIN_VXXBLEND_V8HI, FUTURE_BUILTIN_VXXBLEND_V4SI,
FUTURE_BUILTIN_VXXBLEND_V2DI, FUTURE_BUILTIN_VXXBLEND_V4SF,
FUTURE_BUILTIN_VXXBLEND_V2DF, FUTURE_BUILTIN_VXXPERMX): Define
overloaded arguments.
(rs6000_expand_quaternop_builtin): Add if case for CODE_FOR_xxpermx.
(builtin_quaternary_function_type): Add v16uqi_type and xxpermx_type
variables, add case statement for FUTURE_BUILTIN_VXXPERMX.
(builtin_function_type)[FUTURE_BUILTIN_VXXBLEND_V16QI,
FUTURE_BUILTIN_VXXBLEND_V8HI, FUTURE_BUILTIN_VXXBLEND_V4SI,
FUTURE_BUILTIN_VXXBLEND_V2DI]: Add case statements.
* doc/extend.texi: Add documentation for vec_blendv and vec_permx.

gcc/testsuite/ChangeLog

2020-06-15  Carl Love  
gcc.target/powerpc/vec-blend-runnable.c: New test.
gcc.target/powerpc/vec-permute-ext-runnable.c: New test.
---
 gcc/config/rs6000/altivec.h   |   2 +
 gcc/config/rs6000/altivec.md  |  71 +
 gcc/config/rs6000/rs6000-builtin.def  |  13 +
 gcc/config/rs6000/rs6000-c.c  |  25 +-
 gcc/config/rs6000/rs6000-call.c   |  94 ++
 gcc/doc/extend.texi   |  63 
 .../gcc.target/powerpc/vec-blend-runnable.c   | 276 
 .../powerpc/vec-permute-ext-runnable.c| 294 ++
 8 files changed, 833 insertions(+), 5 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-blend-runnable.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-permute-ext-runnable.c

diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 9ed41b1cbf1..1b532effebe 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -708,6 +708,8 @@ __altivec_scalar_pred(vec_any_nle,
 #define vec_splati(a)  __builtin_vec_xxspltiw (a)
 #define vec_splatid(a) __builtin_vec_xxspltid (a)
 #define vec_splati_ins(a, b, c)__builtin_vec_xxsplti32dx (a, b, c)
+#define vec_blendv(a, b, c)__builtin_vec_xxblend (a, b, c)
+#define vec_permx(a, b, c, d)  __builtin_vec_xxpermx (a, b, c, d)
 
 #define vec_gnb(a, b)  __builtin_vec_gnb (a, b)
 #define vec_clrl(a, b) __builtin_vec_clrl (a, b)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 25f6b9b2f07..fd221bb21f6 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -176,6 +176,8 @@
UNSPEC_XXSPLTIW
UNSPEC_XXSPLTID
UNSPEC_XXSPLTI32DX
+   UNSPEC_XXBLEND
+   UNSPEC_XXPERMX
 ])
 
 (define_c_enum "unspecv"
@@ -218,6 +220,21 @@
   (KF "FLOAT128_VECTOR_P (KFmode)")
   (TF "FLOAT128_VECTOR_P (TFmode)")])
 
+;; Like VM2, just do char, short, int, long, float and double
+(define_mode_iterator VM3 [V4SI
+   V8HI
+   V16QI
+   V4SF
+   V2DF
+   V2DI])
+
+(define_mode_attr VM3_char [(V2DI "d")
+   (V4SI "w")
+   (V8HI "h")
+   

[PATCH 1/6 ver 2] rs6000, Update support for vec_extract

[Carl Love via Gcc-patches]

v2 changes

config/rs6000/altivec.md log entry for move from changed as suggested.

config/rs6000/vsx.md log entro for moved to here changed as suggested.

define_mode_iterator VI2 also moved, included in both change log entries


GCC maintainers:

Move the existing vector extract support in altivec.md to vsx.md
so all of the vector insert and extract support is in the same file.

The patch also updates the name of the builtins and descriptions for the
builtins in the documentation file so they match the approved builtin
names and descriptions.

The patch does not make any functional changes.

Please let me know if the changes are acceptable.  Thanks.

  Carl Love

--

gcc/ChangeLog

2020-06-15  Carl Love  

* config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
(vextractl, vextractr)
(vextractl_internal, vextractr_internal)
(VI2): Move to gcc/config/rs6000/vsx.md.
* config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
(vextractl, vextractr)
(vextractl_internal, vextractr_internal)
(VI2): Code was moved from config/rs6000/altivec.md.
* gcc/doc/extend.texi: Update documentation for vec_extractl.
Replace builtin name vec_extractr with vec_extracth.  Update description
of vec_extracth.
---
 gcc/config/rs6000/altivec.md | 64 ---
 gcc/config/rs6000/vsx.md | 66 
 gcc/doc/extend.texi  | 73 +---
 3 files changed, 101 insertions(+), 102 deletions(-)

diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 159f24ebc10..0b0b49ee056 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -171,8 +171,6 @@
UNSPEC_XXEVAL
UNSPEC_VSTRIR
UNSPEC_VSTRIL
-   UNSPEC_EXTRACTL
-   UNSPEC_EXTRACTR
 ])
 
 (define_c_enum "unspecv"
@@ -183,8 +181,6 @@
UNSPECV_DSS
   ])
 
-;; Like VI, defined in vector.md, but add ISA 2.07 integer vector ops
-(define_mode_iterator VI2 [V4SI V8HI V16QI V2DI])
 ;; Short vec int modes
 (define_mode_iterator VIshort [V8HI V16QI])
 ;; Longer vec int modes for rotate/mask ops
@@ -785,66 +781,6 @@
   DONE;
 })
 
-(define_expand "vextractl"
-  [(set (match_operand:V2DI 0 "altivec_register_operand")
-   (unspec:V2DI [(match_operand:VI2 1 "altivec_register_operand")
- (match_operand:VI2 2 "altivec_register_operand")
- (match_operand:SI 3 "register_operand")]
-UNSPEC_EXTRACTL))]
-  "TARGET_FUTURE"
-{
-  if (BYTES_BIG_ENDIAN)
-{
-  emit_insn (gen_vextractl_internal (operands[0], operands[1],
-  operands[2], operands[3]));
-  emit_insn (gen_xxswapd_v2di (operands[0], operands[0]));
-}
-  else
-emit_insn (gen_vextractr_internal (operands[0], operands[2],
-operands[1], operands[3]));
-  DONE;
-})
-
-(define_insn "vextractl_internal"
-  [(set (match_operand:V2DI 0 "altivec_register_operand" "=v")
-   (unspec:V2DI [(match_operand:VEC_I 1 "altivec_register_operand" "v")
- (match_operand:VEC_I 2 "altivec_register_operand" "v")
- (match_operand:SI 3 "register_operand" "r")]
-UNSPEC_EXTRACTL))]
-  "TARGET_FUTURE"
-  "vextvlx %0,%1,%2,%3"
-  [(set_attr "type" "vecsimple")])
-
-(define_expand "vextractr"
-  [(set (match_operand:V2DI 0 "altivec_register_operand")
-   (unspec:V2DI [(match_operand:VI2 1 "altivec_register_operand")
- (match_operand:VI2 2 "altivec_register_operand")
- (match_operand:SI 3 "register_operand")]
-UNSPEC_EXTRACTR))]
-  "TARGET_FUTURE"
-{
-  if (BYTES_BIG_ENDIAN)
-{
-  emit_insn (gen_vextractr_internal (operands[0], operands[1],
-  operands[2], operands[3]));
-  emit_insn (gen_xxswapd_v2di (operands[0], operands[0]));
-}
-  else
-emit_insn (gen_vextractl_internal (operands[0], operands[2],
-operands[1], operands[3]));
-  DONE;
-})
-
-(define_insn "vextractr_internal"
-  [(set (match_operand:V2DI 0 "altivec_register_operand" "=v")
-   (unspec:V2DI [(match_operand:VEC_I 1 "altivec_register_operand" "v")
- (match_operand:VEC_I 2 "altivec_register_operand" "v")
- (match_operand:SI 3 "register_operand" "r")]
-UNSPEC_EXTRACTR))]
-  "TARGET_FUTURE"
-  "vextvrx %0,%1,%2,%3"
-  [(set_attr "type" "vecsimple")])
-
 (define_expand "vstrir_"
   [(set (match_operand:VIshort 0 "altivec_register_operand")
(unspec:VIshort [(match_operand:VIshort 1 "altivec_register_operand")]
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 2a28215ac5b..51ffe2d2000 

[PATCH 0/6] ] Permute Class Operations

[Carl Love via Gcc-patches]

Version 2.  The patches in this series have been updated per the
comments from Segher.  I have put at the top of each patch a short
summary of the version 2 changes.  Hopefully the summaries will make
the re-review easier and faster.  Most of the changes were ChangeLog
fixes with a few functional changes.
--

Based on previous IBM internal reviews of the patch set, the desire is
for all of the vector insert and extract support to be in vsx.md as
there is a longer term plan to re-work this support for PPC.

The first patch moves the existing extract support in altivec.md to
vsx.md.

The subsequent patches add additional vector insert and vector
replace builtin support.

Additionally, the documentation for the existing vector extract
builtins has been updated to match the latest documentation and builtin
names in the code. Specifically, the builtin name vec_extractr has been
changed to vec_extracth.  The description of the two builtins has been
changed to match the latest description of the builtins with a few
minor edits to address typos in the descriptions.

[PATCH 3/6 ver 2] rs6000, Add vector replace builtin support

[Carl Love via Gcc-patches]

v2 fixes:

change log entries config/rs6000/vsx.md, config/rs6000/rs6000-builtin.def,
config/rs6000/rs6000-call.c.

gcc/config/rs6000/rs6000-call.c: fixed if check for 3rd arg between 0 and 3
 fixed if check for 3rd arg between 0 and 12

gcc/config/rs6000/vsx.md: removed REPLACE_ELT_atr definition and used
  VS_scalar instead.
  removed REPLACE_ELT_inst definition and used  i\
nstead
  fixed spelling mistake on Endianness.
  fixed indenting for vreplace_elt_

---

GCC maintainers:

The following patch adds support for builtins vec_replace_elt and
vec_replace_unaligned.

The patch has been compiled and tested on

  powerpc64le-unknown-linux-gnu (Power 9 LE)

and mambo with no regression errors.

Please let me know if this patch is acceptable for the pu
branch.  Thanks.

 Carl Love

---

gcc/ChangeLog

2020-06-15 Carl Love  

* config/rs6000/altivec.h: Add define for vec_replace_elt and
vec_replace_unaligned.
* config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New.
(REPLACE_ELT): New mode iterator.
(REPLACE_ELT_atr, REPLACE_ELT_inst, REPLACE_ELT_char,
REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
(vreplace_un_, vreplace_elt__inst): New.
* config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI, VREPLACE_ELT_UV4\
SI,
VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI, VREPLACE_ELT_V2DF,
VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF,
VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI, VREPLACE_UN_V2DF): New.
(REPLACE_ELT, REPLACE_UN): New.
* config/rs6000/rs6000-call.c (FUTURE_BUILTIN_VEC_REPLACE_ELT,
FUTURE_BUILTIN_VEC_REPLACE_UN): New.
(rs6000_expand_ternop_builtin): Add 3rd argument checks for
CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
(builtin_function_type) [FUTURE_BUILTIN_VREPLACE_ELT_UV4SI, FUTURE_BUIL\
TIN_VREPLACE_ELT_UV2DI,
FUTURE_BUILTIN_VREPLACE_UN_UV4SI, FUTURE_BUILTIN_VREPLACE_UN_UV2DI]: Ne\
w cases.
* doc/extend.texi: Add description for vec_replace_elt and
vec_replace_unaligned builtins.


gcc/testsuite/ChangeLog

2020-06-15 Carl Love  
* gcc.target/powerpc/vec-replace-word.c: Add new test.
---
 gcc/config/rs6000/altivec.h   |   2 +
 gcc/config/rs6000/rs6000-builtin.def  |  16 +
 gcc/config/rs6000/rs6000-call.c   |  61 
 gcc/config/rs6000/vsx.md  |  60 
 gcc/doc/extend.texi   |  50 +++
 .../powerpc/vec-replace-word-runnable.c   | 289 ++
 6 files changed, 478 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-replace-word-runnable.c

diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 936aeb1ee09..435ffb8158f 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -701,6 +701,8 @@ __altivec_scalar_pred(vec_any_nle,
 #define vec_extracth(a, b, c)  __builtin_vec_extracth (a, b, c)
 #define vec_insertl(a, b, c)   __builtin_vec_insertl (a, b, c)
 #define vec_inserth(a, b, c)   __builtin_vec_inserth (a, b, c)
+#define vec_replace_elt(a, b, c)   __builtin_vec_replace_elt (a, b, c)
+#define vec_replace_unaligned(a, b, c) __builtin_vec_replace_un (a, b, c)
 
 #define vec_gnb(a, b)  __builtin_vec_gnb (a, b)
 #define vec_clrl(a, b) __builtin_vec_clrl (a, b)
diff --git a/gcc/config/rs6000/rs6000-builtin.def 
b/gcc/config/rs6000/rs6000-builtin.def
index c5bd4f86555..91821f29a6f 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -2643,6 +2643,20 @@ BU_FUTURE_V_3 (VINSERTVPRBR, "vinsvubvrx", CONST, 
vinsertvr_v16qi)
 BU_FUTURE_V_3 (VINSERTVPRHR, "vinsvuhvrx", CONST, vinsertvr_v8hi)
 BU_FUTURE_V_3 (VINSERTVPRWR, "vinsvuwvrx", CONST, vinsertvr_v4si)
 
+BU_FUTURE_V_3 (VREPLACE_ELT_V4SI, "vreplace_v4si", CONST, vreplace_elt_v4si)
+BU_FUTURE_V_3 (VREPLACE_ELT_UV4SI, "vreplace_uv4si", CONST, vreplace_elt_v4si)
+BU_FUTURE_V_3 (VREPLACE_ELT_V4SF, "vreplace_v4sf", CONST, vreplace_elt_v4sf)
+BU_FUTURE_V_3 (VREPLACE_ELT_V2DI, "vreplace_v2di", CONST, vreplace_elt_v2di)
+BU_FUTURE_V_3 (VREPLACE_ELT_UV2DI, "vreplace_uv2di", CONST, vreplace_elt_v2di)
+BU_FUTURE_V_3 (VREPLACE_ELT_V2DF, "vreplace_v2df", CONST, vreplace_elt_v2df)
+
+BU_FUTURE_V_3 (VREPLACE_UN_V4SI, "vreplace_un_v4si", CONST, vreplace_un_v4si)
+BU_FUTURE_V_3 (VREPLACE_UN_UV4SI, "vreplace_un_uv4si", CONST, vreplace_un_v4si)
+BU_FUTURE_V_3 (VREPLACE_UN_V4SF, "vreplace_un_v4sf", CONST, vreplace_un_v4sf)
+BU_FUTURE_V_3 (VREPLACE_UN_V2DI, "vreplace_un_v2di", CONST, vreplace_un_v2di)
+BU_FUTURE_V_3 (VREPLACE_UN_UV2DI, "vreplace_un_uv2di", CONST, vreplace_un_v2di)
+BU_FUTURE_V_3 

[PATCH 2/6 ver 2] rs6000 Add vector insert builtin support

[Carl Love via Gcc-patches]

v2 changes

Fix change log entry for config/rs6000/altivec.h

Fix change log entry for config/rs6000/rs6000-builtin.def

Fix change log entry for config/rs6000/rs6000-call.c

vsx.md: Fixed if (BYTES_BIG_ENDIAN) else statements.
Porting error from pu branch.

---
GCC maintainers:

This patch adds support for vec_insertl and vec_inserth builtins.

The patch has been compiled and tested on

  powerpc64le-unknown-linux-gnu (Power 9 LE)

and mambo with no regression errors.

Please let me know if this patch is acceptable for the mainline branch.

Thanks.

 Carl Love

--
gcc/ChangeLog

2020-06-15  Carl Love  

* config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines.
* config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL,
VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL,
VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR,
VINSERTVPRHR, VINSERTVPRWR): New builtins.
(INSERTL, INSERTH): New builtins.
* config/rs6000/rs6000-call.c (FUTURE_BUILTIN_VEC_INSERTL,
FUTURE_BUILTIN_VEC_INSERTH):  New Overloaded definitions.
(FUTURE_BUILTIN_VINSERTGPRBL, FUTURE_BUILTIN_VINSERTGPRHL,
FUTURE_BUILTIN_VINSERTGPRWL, FUTURE_BUILTIN_VINSERTGPRDL,
FUTURE_BUILTIN_VINSERTVPRBL, FUTURE_BUILTIN_VINSERTVPRHL,
FUTURE_BUILTIN_VINSERTVPRWL): Add case entries.
* config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL,
UNSPEC_INSERTR.
(define_expand): Add vinsertvl_, vinsertvr_,
vinsertgl_, vinsertgr_, mode is VI2.
(define_ins): vinsertvl_internal_, vinsertvr_internal_,
vinsertgl_internal_, vinsertgr_internal_, mode VEC_I.
* doc/extend.texi: Add documentation for vec_insertl, vec_inserth.

gcc/testsuite/ChangeLog

2020-06-15  Carl Love  

* gcc.target/powerpc/vec-insert-word-runnable.c: New
test case.
---
 gcc/config/rs6000/altivec.h   |   2 +
 gcc/config/rs6000/rs6000-builtin.def  |  18 +
 gcc/config/rs6000/rs6000-call.c   |  51 +++
 gcc/config/rs6000/vsx.md  | 110 ++
 gcc/doc/extend.texi   |  73 
 .../powerpc/vec-insert-word-runnable.c| 345 ++
 6 files changed, 599 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vec-insert-word-runnable.c

diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index 0a7e8ab3647..936aeb1ee09 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -699,6 +699,8 @@ __altivec_scalar_pred(vec_any_nle,
 /* Overloaded built-in functions for future architecture.  */
 #define vec_extractl(a, b, c)  __builtin_vec_extractl (a, b, c)
 #define vec_extracth(a, b, c)  __builtin_vec_extracth (a, b, c)
+#define vec_insertl(a, b, c)   __builtin_vec_insertl (a, b, c)
+#define vec_inserth(a, b, c)   __builtin_vec_inserth (a, b, c)
 
 #define vec_gnb(a, b)  __builtin_vec_gnb (a, b)
 #define vec_clrl(a, b) __builtin_vec_clrl (a, b)
diff --git a/gcc/config/rs6000/rs6000-builtin.def 
b/gcc/config/rs6000/rs6000-builtin.def
index 8b1ddb00045..c5bd4f86555 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -2627,6 +2627,22 @@ BU_FUTURE_V_3 (VEXTRACTHR, "vextduhvhx", CONST, 
vextractrv8hi)
 BU_FUTURE_V_3 (VEXTRACTWR, "vextduwvhx", CONST, vextractrv4si)
 BU_FUTURE_V_3 (VEXTRACTDR, "vextddvhx", CONST, vextractrv2di)
 
+BU_FUTURE_V_3 (VINSERTGPRBL, "vinsgubvlx", CONST, vinsertgl_v16qi)
+BU_FUTURE_V_3 (VINSERTGPRHL, "vinsguhvlx", CONST, vinsertgl_v8hi)
+BU_FUTURE_V_3 (VINSERTGPRWL, "vinsguwvlx", CONST, vinsertgl_v4si)
+BU_FUTURE_V_3 (VINSERTGPRDL, "vinsgudvlx", CONST, vinsertgl_v2di)
+BU_FUTURE_V_3 (VINSERTVPRBL, "vinsvubvlx", CONST, vinsertvl_v16qi)
+BU_FUTURE_V_3 (VINSERTVPRHL, "vinsvuhvlx", CONST, vinsertvl_v8hi)
+BU_FUTURE_V_3 (VINSERTVPRWL, "vinsvuwvlx", CONST, vinsertvl_v4si)
+
+BU_FUTURE_V_3 (VINSERTGPRBR, "vinsgubvrx", CONST, vinsertgr_v16qi)
+BU_FUTURE_V_3 (VINSERTGPRHR, "vinsguhvrx", CONST, vinsertgr_v8hi)
+BU_FUTURE_V_3 (VINSERTGPRWR, "vinsguwvrx", CONST, vinsertgr_v4si)
+BU_FUTURE_V_3 (VINSERTGPRDR, "vinsgudvrx", CONST, vinsertgr_v2di)
+BU_FUTURE_V_3 (VINSERTVPRBR, "vinsvubvrx", CONST, vinsertvr_v16qi)
+BU_FUTURE_V_3 (VINSERTVPRHR, "vinsvuhvrx", CONST, vinsertvr_v8hi)
+BU_FUTURE_V_3 (VINSERTVPRWR, "vinsvuwvrx", CONST, vinsertvr_v4si)
+
 BU_FUTURE_V_1 (VSTRIBR, "vstribr", CONST, vstrir_v16qi)
 BU_FUTURE_V_1 (VSTRIHR, "vstrihr", CONST, vstrir_v8hi)
 BU_FUTURE_V_1 (VSTRIBL, "vstribl", CONST, vstril_v16qi)
@@ -2646,6 +2662,8 @@ BU_FUTURE_OVERLOAD_2 (XXGENPCVM, "xxgenpcvm")
 
 BU_FUTURE_OVERLOAD_3 (EXTRACTL, "extractl")
 BU_FUTURE_OVERLOAD_3 (EXTRACTH, "extracth")
+BU_FUTURE_OVERLOAD_3 (INSERTL, "insertl")
+BU_FUTURE_OVERLOAD_3 (INSERTH, "inserth")
 
 

Re: [PATCH 3/3] rs6000: Add testsuite test cases for MMA built-ins.

[will schmidt via Gcc-patches]

On Mon, 2020-06-15 at 14:59 -0500, Peter Bergner via Gcc-patches wrote:
> This patch adds the testsuite test cases for all of the MMA built-
> ins.
> 
> This patch plus patch1 and patch2 passed bootstrap and regtesting
> with no
> regressions on both powerpc64le-linux and powerpc64-linux.  Ok for
> trunk?
> 
> Peter
> 
> 2020-06-15  Peter Bergner  
> 
> gcc/testsuite/
>   * gcc.target/powerpc/mma-builtin-1.c: New test.
>   * gcc.target/powerpc/mma-builtin-2.c: New test.
>   * gcc.target/powerpc/mma-builtin-3.c: New test.
>   * gcc.target/powerpc/mma-builtin-4.c: New test.
>   * gcc.target/powerpc/mma-builtin-5.c: New test.
>   * gcc.target/powerpc/mma-builtin-6.c: New test.
> 
> diff --git a/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.c
> b/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.c
> new file mode 100644
> index 000..a971c869095
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.c
> @@ -0,0 +1,313 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target powerpc_future_ok } */
> +/* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */
> +


Compared the tests with scan-assembler stanzas, tests look reasonable.

Per the previous patches, the -mma option comes with -mcpu=future
option automatically, so thats good.
I think it would be good to have an additional test or two to verify
the -mma and -mno-mma options behave as desired, but that could be a
later add-on.

otherwise lgtm. 

Thanks
-Will

Re: [PATCH 2/3] rs6000: Add MMA built-in function definitions

[will schmidt via Gcc-patches]

On Mon, 2020-06-15 at 14:58 -0500, Peter Bergner via Gcc-patches wrote:
> This patches adds the actual MMA built-ins.  The MMA accumulators are
> INOUT
> operands for most MMA instructions, but they are also very expensive
> to
> move around.  For this reason, we have implemented a built-in API
> where the accumulators are passed using pass-by-reference/pointers,
> so
> the user won't use one accumulator as input and another as output,
> which would entail a lot of copies.  However, using pointers gives us
> poor code generation when we expand the built-ins at normal expand
> time.
> We therefore expand the MMA built-ins early into gimple, converting
> the pass-by-reference calls to an internal built-in that uses pass-
> by-value
> calling convention, where we can enforce the input and output
> accumulators
> are the same.  This gives us much better code generation.
> 
> The associated test cases for these built-ins are in patch3.
> 
> This patch plus patch1 passed bootstrap and regtesting with no
> regressions
> on both powerpc64le-linux and powerpc64-linux.  Ok for trunk?
> 
> Peter
> 
> 2020-06-15  Peter Bergner  
> 
> gcc/
>   * config/rs6000/predicates.md (mma_input_operand): New
> predicate.
>   * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2,
> BU_MMA_3,
>   BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining
> MMA
>   built-in functions.
>   (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC,
> DISASSEMBLE_PAIR,
>   PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
>   PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
>   PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
>   PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER,
> PMXVF64GERNN,
>   PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2,
> PMXVI16GER2PP,
>   PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP,
> PMXVI8GER4,
>   PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN,
> XVBF16GER2NP,
>   XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
>   XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
>   XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER,
> XVF64GERNN,
>   XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP,
> XVI16GER2S,
>   XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP,
> XVI8GER4SPP,
>   XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.

checked noses, all have been found below. 

>   * config/rs6000/rs6000.c (rs6000_emit_move): Allow zero
> constants.
>   (print_operand) : New output modifier.
>   (rs6000_split_multireg_move): Add support for inserting
> accumulator
>   priming and depriming instructions.  Add support for splitting
> an
>   assemble accumulator pattern.
>   * config/rs6000/rs6000-call.c (mma_init_builtins,
> mma_expand_builtin,
>   rs6000_gimple_fold_mma_builtin): New functions.
>   (RS6000_BUILTIN_M): New macro.
>   (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR
> attributes.
>   (bdesc_mma): Add new MMA built-in support.
>   (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
>   (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
>   RS6000_BTM_MMA.
>   (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID
> attribute.
>   (rs6000_gimple_fold_builtin): Call
> rs6000_builtin_is_supported_p
>   and rs6000_gimple_fold_mma_builtin.
>   (rs6000_expand_builtin): Call mma_expand_builtin.
>   Use RS6000_BTC_OPND_MASK.
>   (rs6000_init_builtins): Adjust comment.  Call
> mma_init_builtins.
>   (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
>   (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
>   VSX_BUILTIN_XVCVBF16SP.
>   * config/rs6000/rs6000.h (RS6000_BTC_QUINARY,
> RS6000_BTC_SENARY,
>   RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
>   RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
>   (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
>   RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
>   * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
>   (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
>   UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
>   UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
>   UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
>   UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
>   UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
>   UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
>   UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
>   UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
>   UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
>   UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
>   UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
>   UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
>   UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
>  

Re: [PATCH 1/3] rs6000: Add base support and types for defining MMA built-ins.

[will schmidt via Gcc-patches]

On Mon, 2020-06-15 at 14:56 -0500, Peter Bergner via Gcc-patches wrote:
> This patch adds the new -mmma option as well as the initial MMA
> support,
> which includes the target specific __vector_pair and __vector_quad
> types,
> the POImode and PXImode partial integer modes they are mapped to, and
> their
> associated  move patterns.  Support for the restrictions on the
> registers
> these modes can be assigned to as also been added.
> 
> This patch passed bootstrap and regtesting with no regressions on
> powerpc64le-linux.  Ok for trunk?
> 
> Peter
> 
> 2020-06-15  Peter Bergner  
>   Michael Meissner  
> 
> gcc/
>   * config/rs6000/mma.md: New file.
>   * config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
> Define
>   __MMA__ for mma.
>   * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add
> support
>   for __vector_pair and __vector_quad types.
>   * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
>   OPTION_MASK_MMA.
>   (POWERPC_MASKS): Likewise.

Don't see POWERPC_MASKS in the patch here.


>   * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
>   (POI, PXI): New partial integer modes.
>   * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
>   (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
>   (rs6000_hard_regno_mode_ok_uncached): Likewise.
>   Add support for POImode being allowed in VSX registers and
> PXImode
>   being allowed in FP registers.
>   (rs6000_modes_tieable_p): Adjust comment.
>   Add support for POImode and PXImode.
>   (rs6000_debug_reg_global) : Add OImode,
> POImode
>   XImode and PXImode.
>   (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
>   Set up appropriate addr_masks for vector pair and vector quad
> addresses.
>   (rs6000_init_hard_regno_mode_ok): Add support for vector pair
> and
>   vector quad registers.  Setup reload handlers for POImode and
> PXImode.
>   (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA
>   and RS6000_BTM_FUTURE.
>   (rs6000_option_override_internal): Error if -mmma is specified
>   without -mcpu=future.
>   (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
>   (quad_address_p): Change size test to less than 16 bytes.
>   (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector
> pair
>   and vector quad instructions.
>   (avoiding_indexed_address_p): Likewise.
>   (rs6000_emit_move): Disallow POImode and PXImode moves
> involving
>   constants.
>   (rs6000_preferred_reload_class): Prefer VSX registers for
> POImode
>   and FP registers for PXImode.
>   (rs6000_split_multireg_move): Support splitting POImode and
> PXImode
>   move instructions.  Insert xxmtacc and xxmfacc instructions
> when
>   setting a PXImode register and reading a PXImode register
> respectively.
>   (rs6000_mangle_type): Adjust comment.  Add support for mangling
>   __vector_pair and __vector_quad types.
>   (rs6000_opt_masks): Add entry for mma.
>   (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and
> RS6000_BTM_FUTURE.
>   (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
>   (address_to_insn_form): Likewise.
>   (reg_to_non_prefixed): Likewise.
>   (rs6000_invalid_conversion): New function.
>   * config/rs6000/rs6000.h (MASK_MMA): Define.
>   (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
>   (VECTOR_ALIGNMENT_P): New helper macro.
>   (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
>   (RS6000_BTM_MMA): Define.
>   (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
>   (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
>   RS6000_BTI_vector_quad.
>   (vector_pair_type_node): Define.
>   (vector_quad_type_node): Likewise.
>   * config/rs6000/rs6000.md (define_attr "isa"): Add mma.
>   (define_attr "enabled"): Handle mma.
>   (define_mode_iterator RELOAD): Add POI and PXI.
>   Include mma.md.
>   * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
>   * config/rs6000/rs6000.opt (-mmma): New.
>   * doc/invoke.texi: Document -mmma.

The rest of the Changelog looks to match the contents.   ok.


> 
> diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
> new file mode 100644
> index 000..b35a15a2be1
> --- /dev/null
> +++ b/gcc/config/rs6000/mma.md
> @@ -0,0 +1,128 @@
> +;; Vector Quad, Vector Pair, and MMA patterns.
> +;; Copyright (C) 2020 Free Software Foundation, Inc.
> +;; Contributed by Peter Bergner  and
> +;; Michael Meissner 
> +
> +;; This file is part of GCC.
> +
> +;; GCC is free software; you can redistribute it and/or modify it
> +;; under the terms of the GNU General Public License as published
> +;; by the Free Software Foundation; either version 3, or (at your
> +;; option) any later version.
> +
> +;; GCC is distributed in the hope that it will be useful, 

Re: [PATCH] RISC-V: Fix ICE on riscv_gpr_save_operation_p [PR95683]

[Jim Wilson]

On Mon, Jun 15, 2020 at 7:41 AM Kito Cheng  wrote:
> gcc/ChangeLog:
>
> PR target/95683
> * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
> assertion and turn it into a early exit check.
>
> gcc/testsuite/ChangeLog
>
> PR target/95683
> * gcc.target/riscv/pr95683.c: New.

Looks good to me also.

Jim

PR fortran/95687 - ICE in get_unique_hashed_string, at fortran/class.c:508

[Harald Anlauf]

And yet ABRBG (another one by Gerhard) provoking a buffer overflow.

Sigh.  At least this time we caught it on master.

Regtested on x86_64-pc-linux-gnu.

OK for master, and backports where appropriate?

Thanks,
Harald


PR fortran/95687 - ICE in get_unique_hashed_string, at fortran/class.c:508

With submodules and PDTs, name mangling of interfaces may result in long
internal symbols overflowing a previously static internal buffer.  We now
set the buffer size dynamically.

gcc/fortran/
PR fortran/95687
* class.c (get_unique_type_string): Return a string with dynamic
length.
(get_unique_hashed_string, gfc_hash_value): Use dynamic result
from get_unique_type_string instead of static buffer.
diff --git a/gcc/fortran/class.c b/gcc/fortran/class.c
index 227134eef3d..c2f7db0fe55 100644
--- a/gcc/fortran/class.c
+++ b/gcc/fortran/class.c
@@ -476,22 +476,38 @@ gfc_class_initializer (gfc_typespec *ts, gfc_expr *init_expr)
and module name. This is used to construct unique names for the class
containers and vtab symbols.  */

-static void
-get_unique_type_string (char *string, gfc_symbol *derived)
+static char *
+get_unique_type_string (gfc_symbol *derived)
 {
   const char *dt_name;
+  char *string;
+  size_t len;
   if (derived->attr.unlimited_polymorphic)
 dt_name = "STAR";
   else
 dt_name = gfc_dt_upper_string (derived->name);
+  len = strlen (dt_name) + 2;
   if (derived->attr.unlimited_polymorphic)
-sprintf (string, "_%s", dt_name);
+{
+  string = XALLOCAVEC (char, len);
+  sprintf (string, "_%s", dt_name);
+}
   else if (derived->module)
-sprintf (string, "%s_%s", derived->module, dt_name);
+{
+  string = XALLOCAVEC (char, strlen (derived->module) + len);
+  sprintf (string, "%s_%s", derived->module, dt_name);
+}
   else if (derived->ns->proc_name)
-sprintf (string, "%s_%s", derived->ns->proc_name->name, dt_name);
+{
+  string = XALLOCAVEC (char, strlen (derived->ns->proc_name->name) + len);
+  sprintf (string, "%s_%s", derived->ns->proc_name->name, dt_name);
+}
   else
-sprintf (string, "_%s", dt_name);
+{
+  string = XALLOCAVEC (char, len);
+  sprintf (string, "_%s", dt_name);
+}
+  return string;
 }


@@ -502,10 +518,8 @@ static void
 get_unique_hashed_string (char *string, gfc_symbol *derived)
 {
   /* Provide sufficient space to hold "symbol.symbol_symbol".  */
-  char tmp[3*GFC_MAX_SYMBOL_LEN+3];
-  get_unique_type_string ([0], derived);
-  size_t len = strnlen (tmp, sizeof (tmp));
-  gcc_assert (len < sizeof (tmp));
+  char *tmp;
+  tmp = get_unique_type_string (derived);
   /* If string is too long, use hash value in hex representation (allow for
  extra decoration, cf. gfc_build_class_symbol & gfc_find_derived_vtab).
  We need space to for 15 characters "__class_" + symbol name + "_%d_%da",
@@ -527,12 +541,11 @@ gfc_hash_value (gfc_symbol *sym)
 {
   unsigned int hash = 0;
   /* Provide sufficient space to hold "symbol.symbol_symbol".  */
-  char c[3*GFC_MAX_SYMBOL_LEN+3];
+  char *c;
   int i, len;

-  get_unique_type_string ([0], sym);
-  len = strnlen (c, sizeof (c));
-  gcc_assert ((size_t) len < sizeof (c));
+  c = get_unique_type_string (sym);
+  len = strlen (c);

   for (i = 0; i < len; i++)
 hash = (hash << 6) + (hash << 16) - hash + c[i];
diff --git a/gcc/testsuite/gfortran.dg/pr95687.f90 b/gcc/testsuite/gfortran.dg/pr95687.f90
new file mode 100644
index 000..a674533179a
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr95687.f90
@@ -0,0 +1,19 @@
+! { dg-do compile }
+! { dg-options "-fsecond-underscore" }
+! PR fortran/95687 - ICE in get_unique_hashed_string, at fortran/class.c:508
+
+module m2345678901234567890123456789012345678901234567890123456789_123
+  interface
+ module subroutine s2345678901234567890123456789012345678901234567890123456789_123
+ end
+  end interface
+end
+submodule(m2345678901234567890123456789012345678901234567890123456789_123) &
+  n2345678901234567890123456789012345678901234567890123456789_123
+  type t2345678901234567890123456789012345678901234567890123456789_123 &
+  (a2345678901234567890123456789012345678901234567890123456789_123)
+ integer, kind :: a2345678901234567890123456789012345678901234567890123456789_123 = 4
+  end type
+  class(t2345678901234567890123456789012345678901234567890123456789_123(3)), pointer :: &
+x2345678901234567890123456789012345678901234567890123456789_123
+end

Aw: [PATCH][8/9/10/11 Regression] PR fortran/95689 - ICE in check_sym_interfaces, at fortran/interface.c:2015

[Harald Anlauf]

Copy error on the git commit message:

> gcc/fortran/
>   PR fortran/95689
>   * class.c (get_unique_type_string): Enlarge temporary buffer, and
>   add check on length on mangled name to prevent overflow.

This should have been:

gcc/fortran/
PR fortran/95689
* interface.c (check_sym_interfaces): Enlarge temporary buffer,
and add check on length on mangled name to prevent overflow.

Sorry for that.

Harald

libgo patch committed: Update x/sys/cpu to support all GOARCH values

[Ian Lance Taylor via Gcc-patches]

This libgo patch by Tobias Klauser updates the x/sys/cpu package to
add all GOARCH values supported by gccgo.  This brings in
https://golang.org/cl/237897 from the external x/sys/cpu repo.
Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.  Committed
to mainline.

Ian
882af4350b427b9354a152f680d5ae84dc3c8041
diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE
index 9a33735b9c7..fa3764891fb 100644
--- a/gcc/go/gofrontend/MERGE
+++ b/gcc/go/gofrontend/MERGE
@@ -1,4 +1,4 @@
-925d115397e7ec663f669ee5ac31b6dfccea5724
+d4dade353648eae4a1eaa1acd3e4ce1f7180a913
 
 The first line of this file holds the git revision number of the last
 merge done from the gofrontend repository.
diff --git a/libgo/go/golang.org/x/sys/cpu/byteorder.go 
b/libgo/go/golang.org/x/sys/cpu/byteorder.go
index da6b9e4363d..74116e97abb 100644
--- a/libgo/go/golang.org/x/sys/cpu/byteorder.go
+++ b/libgo/go/golang.org/x/sys/cpu/byteorder.go
@@ -14,15 +14,20 @@ import (
 func hostByteOrder() binary.ByteOrder {
switch runtime.GOARCH {
case "386", "amd64", "amd64p32",
+   "alpha",
"arm", "arm64",
"mipsle", "mips64le", "mips64p32le",
+   "nios2",
"ppc64le",
-   "riscv", "riscv64":
+   "riscv", "riscv64",
+   "sh":
return binary.LittleEndian
case "armbe", "arm64be",
+   "m68k",
"mips", "mips64", "mips64p32",
"ppc", "ppc64",
"s390", "s390x",
+   "shbe",
"sparc", "sparc64":
return binary.BigEndian
}

Re: [PATCH] wwwdocs: Document devel/omp/gcc-10 branch

[Kwok Cheung Yeung]

I have now moved the entry for devel/omp/gcc-9 into the inactive branches 
section and reworded it slightly.


Okay to push?

Thanks

Kwok

On 12/06/2020 9:35 am, Thomas Schwinge wrote:

or by topic (in which case it should
probably go after openacc-gcc-9-branch)?


By topic makes most sense to me.  And, 'devel/omp/gcc-9' definitively
should group right next to 'openacc-gcc-9-branch', as it began as a
direct translation of the latter.

For historical reasons, I have a (at least slight) preference to keep all
these branches right after the 'gomp-4_0-branch' -- where it all began.
This is a history chapter, after all.

commit b719899acf24974fd4c51f14538b426f99259384
Author: Kwok Cheung Yeung 
Date:   Wed Jun 10 06:08:06 2020 -0700

Document devel/omp/gcc-10 branch

This also moves the old devel/omp/gcc-9 branch to the inactive branches
section.

diff --git a/htdocs/git.html b/htdocs/git.html
index 8c28bc0..f7f87a9 100644
--- a/htdocs/git.html
+++ b/htdocs/git.html
@@ -280,15 +280,15 @@ in Git.
   Makarov mailto:vmaka...@redhat.com;>vmaka...@redhat.com.
   
 
-  https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;a=shortlog;h=refs/heads/devel/omp/gcc-9;>devel/omp/gcc-9
+  https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;a=shortlog;h=refs/heads/devel/omp/gcc-10;>devel/omp/gcc-10
   This branch is for collaborative development of
   https://gcc.gnu.org/wiki/OpenACC;>OpenACC and
   https://gcc.gnu.org/wiki/openmp;>OpenMP support and related
   functionality, such
   as https://gcc.gnu.org/wiki/Offloading;>offloading support (OMP:
   offloading and multi processing).
-  The branch is based on releases/gcc-9.
-  Please send patch emails with a short-hand [og9] tag in the
+  The branch is based on releases/gcc-10.
+  Please send patch emails with a short-hand [og10] tag in the
   subject line, and use ChangeLog.omp files.
 
   unified-autovect
@@ -944,8 +944,16 @@ merged.
   These branches were used for development of
   https://gcc.gnu.org/wiki/OpenACC;>OpenACC support and related
   functionality, based on gcc-7-branch, gcc-8-branch, and gcc-9-branch
-  respectively.
-  Work is now proceeding on the devel/omp/gcc-9 branch.
+  respectively.
+
+  https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;a=shortlog;h=refs/heads/devel/omp/gcc-9;>devel/omp/gcc-9
+  This branch was used for collaborative development of
+  https://gcc.gnu.org/wiki/OpenACC;>OpenACC and
+  https://gcc.gnu.org/wiki/openmp;>OpenMP support and related
+  functionality as the successor to openacc-gcc-9-branch after the move to
+  Git.
+  The branch was based on releases/gcc-9.
+  Development has now moved to the devel/omp/gcc-10 branch.
 
   hammer-3_3-branch
   The goal of this branch was to have a stable compiler based on GCC 3.3

Re: [PATCH v2] c++: Don't allow designated initializers with non-aggregates [PR95369]

[Marek Polacek via Gcc-patches]

On Thu, Jun 11, 2020 at 06:15:26PM -0400, Jason Merrill via Gcc-patches wrote:
> On 6/11/20 5:28 PM, Marek Polacek wrote:
> > On Thu, Jun 11, 2020 at 03:51:29PM -0400, Jason Merrill wrote:
> > > On 6/9/20 2:17 PM, Marek Polacek wrote:
> > > > Another part of 95369 is that we accept designated initializers with
> > > > non-aggregate types.  That seems to be wrong since they're part of
> > > > aggregate initialization.  clang/icc also reject it.
> > > > 
> > > > (Un)fortunately there are multiple contexts where we can use designated
> > > > initializers: function-like casts, member list initializers, NTTP, etc.
> > > > So I've adjusted multiple places in the compiler in order to to detect
> > > > this case and to provide a nice diagnostic, instead of an ugly raft of
> > > > errors.
> > > 
> > > Would it work to handle this only in add_list_candidates?
> > 
> > 'fraid not -- we don't call add_list_candidates at all when compiling
> > desig16.C.
> 
> Hmm, why not?  What is turning the CONSTRUCTOR into an argument vec?

Nevermind, I must've glossed over a local patch.  This better patch
implements your suggestion.  I still changed implicit_conversion_error
to give a better diagnostic but that should be fine.  Thanks,

Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?

-- >8 --
Another part of 95369 is that we accept designated initializers with
non-aggregate types.  That seems to be wrong since they're part of
aggregate initialization.  clang/icc also reject it.

There are multiple contexts where we can use designated initializers:
function-like casts, member list initializers, NTTP, etc.  I've adjusted
add_list_candidates and implicit_conversion_error in order to to detect
this case.

gcc/cp/ChangeLog:

PR c++/95369
* call.c (add_list_candidates): Return if a designated initializer
is used with a non-aggregate.
(implicit_conversion_error): Give an error for the case above.

gcc/testsuite/ChangeLog:

PR c++/95369
* g++.dg/cpp2a/desig11.C: Adjust dg-error.
* g++.dg/cpp2a/desig16.C: New test.
---
 gcc/cp/call.c| 13 +
 gcc/testsuite/g++.dg/cpp2a/desig11.C |  2 +-
 gcc/testsuite/g++.dg/cpp2a/desig16.C | 28 
 3 files changed, 42 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/g++.dg/cpp2a/desig16.C

diff --git a/gcc/cp/call.c b/gcc/cp/call.c
index b99959f76f9..1a54e9f4440 100644
--- a/gcc/cp/call.c
+++ b/gcc/cp/call.c
@@ -3952,6 +3952,14 @@ add_list_candidates (tree fns, tree first_arg,
   if (any_strictly_viable (*candidates))
return;
 }
+  else if (CONSTRUCTOR_IS_DESIGNATED_INIT (init_list)
+  && !CP_AGGREGATE_TYPE_P (totype))
+{
+  if (complain & tf_error)
+   error ("designated initializers cannot be used with a "
+  "non-aggregate type %qT", totype);
+  return;
+}
 
   /* Expand the CONSTRUCTOR into a new argument vec.  */
   vec *new_args;
@@ -4301,6 +4309,11 @@ implicit_conversion_error (location_t loc, tree type, 
tree expr)
 instantiate_type (type, expr, complain);
   else if (invalid_nonstatic_memfn_p (loc, expr, complain))
 /* We gave an error.  */;
+  else if (BRACE_ENCLOSED_INITIALIZER_P (expr)
+  && CONSTRUCTOR_IS_DESIGNATED_INIT (expr)
+  && !CP_AGGREGATE_TYPE_P (type))
+error_at (loc, "designated initializers cannot be used with a "
+ "non-aggregate type %qT", type);
   else
 {
   range_label_for_type_mismatch label (TREE_TYPE (expr), type);
diff --git a/gcc/testsuite/g++.dg/cpp2a/desig11.C 
b/gcc/testsuite/g++.dg/cpp2a/desig11.C
index d6895a7be56..a189fff2059 100644
--- a/gcc/testsuite/g++.dg/cpp2a/desig11.C
+++ b/gcc/testsuite/g++.dg/cpp2a/desig11.C
@@ -11,4 +11,4 @@ int bar (_Complex int);   // { dg-message 
"initializing argument 1 of" }
 int y = bar ({.real = 0, .imag = 1});  // { dg-error "cannot convert" }
 
 int baz (std::initializer_list);
-int z = baz ({.one = 1, .two = 2, .three = 3});// { dg-error "could 
not convert" }
+int z = baz ({.one = 1, .two = 2, .three = 3});// { dg-error 
"designated initializers" }
diff --git a/gcc/testsuite/g++.dg/cpp2a/desig16.C 
b/gcc/testsuite/g++.dg/cpp2a/desig16.C
new file mode 100644
index 000..3edb68d24a4
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp2a/desig16.C
@@ -0,0 +1,28 @@
+// PR c++/95369
+// { dg-do compile { target c++20 } }
+
+struct S {
+  unsigned a;
+  unsigned b;
+  constexpr S(unsigned _a, unsigned _b) noexcept: a{_a}, b{_b} { }
+};
+
+template struct X { };
+void g(S);
+
+struct Z {
+  S s;
+  Z() : s{.a = 1, .b = 2} { } // { dg-error "designated initializers|no 
matching function" }
+};
+
+S
+f()
+{
+  X<{.a = 1, .b = 2}> x; // { dg-error "designated initializers" }
+  S s{ .a = 1, .b = 2 }; // { dg-error "designated initializers|no matching 
function" }
+  S s2 = { .a = 1, .b = 2 }; // { dg-error "designated initializers" }
+  S s3 = S{ .a = 1, .b 

[PATCH][8/9/10/11 Regression] PR fortran/95689 - ICE in check_sym_interfaces, at fortran/interface.c:2015

[Harald Anlauf]

YABRBG (Yet another bug report by Gerhard).

Sigh.  Another buffer overflow.

We extend the buffer and now check for overflow.

Regtested on x86_64-pc-linux-gnu.

OK for master?  Backports where possible?

Thanks,
Harald



PR fortran/95689 - ICE in check_sym_interfaces, at fortran/interface.c:2015

With submodules, name mangling of interfaces may result in long internal
symbols overflowing an internal buffer.  We now check that we do not
exceed the enlarged buffer size.

gcc/fortran/
PR fortran/95689
* class.c (get_unique_type_string): Enlarge temporary buffer, and
add check on length on mangled name to prevent overflow.

diff --git a/gcc/fortran/interface.c b/gcc/fortran/interface.c
index f33c6632b45..b1a75a37b0e 100644
--- a/gcc/fortran/interface.c
+++ b/gcc/fortran/interface.c
@@ -1981,7 +1981,8 @@ check_interface1 (gfc_interface *p, gfc_interface *q0,
 static void
 check_sym_interfaces (gfc_symbol *sym)
 {
-  char interface_name[GFC_MAX_SYMBOL_LEN + sizeof("generic interface ''")];
+  /* Provide sufficient space to hold "generic interface 'symbol.symbol'".  */
+  char interface_name[2*GFC_MAX_SYMBOL_LEN+2 + sizeof("generic interface ''")];
   gfc_interface *p;

   if (sym->ns != gfc_current_ns)
@@ -1989,6 +1990,8 @@ check_sym_interfaces (gfc_symbol *sym)

   if (sym->generic != NULL)
 {
+  size_t len = strlen (sym->name) + sizeof("generic interface ''");
+  gcc_assert (len < sizeof (interface_name));
   sprintf (interface_name, "generic interface '%s'", sym->name);
   if (check_interface0 (sym->generic, interface_name))
 	return;
diff --git a/gcc/testsuite/gfortran.dg/pr95689.f90 b/gcc/testsuite/gfortran.dg/pr95689.f90
new file mode 100644
index 000..287ae50b0cb
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/pr95689.f90
@@ -0,0 +1,16 @@
+! { dg-do compile }
+! { dg-options "-fsecond-underscore" }
+! PR fortran/95689 - ICE in check_sym_interfaces, at fortran/interface.c:2015
+
+module m2345678901234567890123456789012345678901234567890123456789_123
+  type t2345678901234567890123456789012345678901234567890123456789_123
+   end type
+   interface
+  module subroutine s2345678901234567890123456789012345678901234567890123456789_123 &
+   (x2345678901234567890123456789012345678901234567890123456789_123)
+  end
+   end interface
+end
+submodule(m2345678901234567890123456789012345678901234567890123456789_123) &
+  t2345678901234567890123456789012345678901234567890123456789_123
+end

[PATCH] nvptx: Add support for subword compare-and-swap

[Kwok Cheung Yeung]

Hello

This patch adds support on nvptx for __sync_val_compare_and_swap operations on 
1- and 2-byte values. The implementation is a straight copy of the version for 
AMD GCN.


I have added a new libgomp test that exercises the new operation. I have also 
verified that the new code does not cause any regressions on the nvptx 
offloading tests, and that the new test passes with both nvptx and amdgcn as 
offload targets.


Okay for master and OG10?

Kwok

commit 7c3a9c23ba9f5b8fe953aa5492ae75617f2444a3
Author: Kwok Cheung Yeung 
Date:   Mon Jun 15 12:34:55 2020 -0700

nvptx: Add support for subword compare-and-swap

2020-06-15  Kwok Cheung Yeung  

libgcc/
* config/nvptx/atomic.c: New.
* config/nvptx/t-nvptx (LIB2ADD): Add atomic.c.

libgomp/
* testsuite/libgomp.c-c++-common/reduction-16.c: New.

diff --git a/libgcc/config/nvptx/atomic.c b/libgcc/config/nvptx/atomic.c
new file mode 100644
index 000..4becbd2
--- /dev/null
+++ b/libgcc/config/nvptx/atomic.c
@@ -0,0 +1,59 @@
+/* NVPTX atomic operations
+   Copyright (C) 2020 Free Software Foundation, Inc.
+   Contributed by Mentor Graphics.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   .  */
+
+#include 
+
+#define __SYNC_SUBWORD_COMPARE_AND_SWAP(TYPE, SIZE) \
+\
+TYPE\
+__sync_val_compare_and_swap_##SIZE (TYPE *ptr, TYPE oldval, TYPE newval) \
+{   \
+  unsigned int *wordptr = (unsigned int *)((__UINTPTR_TYPE__ ) ptr & ~3UL);  \
+  int shift = ((__UINTPTR_TYPE__ ) ptr & 3UL) * 8;  \
+  unsigned int valmask = (1 << (SIZE * 8)) - 1;
 \
+  unsigned int wordmask = ~(valmask << shift);  \
+  unsigned int oldword = *wordptr;  \
+  for (;;)  \
+{   \
+  TYPE prevval = (oldword >> shift) & valmask;  \
+  if (__builtin_expect (prevval != oldval, 0))  \
+   return prevval;  \
+  unsigned int newword = oldword & wordmask;\
+  newword |= ((unsigned int) newval) << shift;  \
+  unsigned int prevword \
+ = __sync_val_compare_and_swap_4 (wordptr, oldword, newword);   \
+  if (__builtin_expect (prevword == oldword, 1))\
+   return oldval;   \
+  oldword = prevword;   \
+}   \
+}   \
+\
+bool\
+__sync_bool_compare_and_swap_##SIZE (TYPE *ptr, TYPE oldval, TYPE newval)\
+{   \
+  return __sync_val_compare_and_swap_##SIZE (ptr, oldval, newval) == oldval; \
+}
+
+__SYNC_SUBWORD_COMPARE_AND_SWAP (unsigned char, 1)
+__SYNC_SUBWORD_COMPARE_AND_SWAP (unsigned short, 2)
+
diff --git a/libgcc/config/nvptx/t-nvptx b/libgcc/config/nvptx/t-nvptx
index c4d20c9..ede0bf0 100644
--- a/libgcc/config/nvptx/t-nvptx
+++ b/libgcc/config/nvptx/t-nvptx
@@ -1,5 +1,6 @@
 LIB2ADD=$(srcdir)/config/nvptx/reduction.c \
-   $(srcdir)/config/nvptx/mgomp.c
+   $(srcdir)/config/nvptx/mgomp.c \
+   $(srcdir)/config/nvptx/atomic.c
 
 LIB2ADDEH=
 LIB2FUNCS_EXCLUDE=__main
diff --git 

[PATCH 2/3] rs6000: Add MMA built-in function definitions

[Peter Bergner via Gcc-patches]

This patches adds the actual MMA built-ins.  The MMA accumulators are INOUT
operands for most MMA instructions, but they are also very expensive to
move around.  For this reason, we have implemented a built-in API
where the accumulators are passed using pass-by-reference/pointers, so
the user won't use one accumulator as input and another as output,
which would entail a lot of copies.  However, using pointers gives us
poor code generation when we expand the built-ins at normal expand time.
We therefore expand the MMA built-ins early into gimple, converting
the pass-by-reference calls to an internal built-in that uses pass-by-value
calling convention, where we can enforce the input and output accumulators
are the same.  This gives us much better code generation.

The associated test cases for these built-ins are in patch3.

This patch plus patch1 passed bootstrap and regtesting with no regressions
on both powerpc64le-linux and powerpc64-linux.  Ok for trunk?

Peter

2020-06-15  Peter Bergner  

gcc/
* config/rs6000/predicates.md (mma_input_operand): New predicate.
* config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
built-in functions.
(ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
* config/rs6000/rs6000.c (rs6000_emit_move): Allow zero constants.
(print_operand) : New output modifier.
(rs6000_split_multireg_move): Add support for inserting accumulator
priming and depriming instructions.  Add support for splitting an
assemble accumulator pattern.
* config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
rs6000_gimple_fold_mma_builtin): New functions.
(RS6000_BUILTIN_M): New macro.
(def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
(bdesc_mma): Add new MMA built-in support.
(htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
(rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
RS6000_BTM_MMA.
(rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
(rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
and rs6000_gimple_fold_mma_builtin.
(rs6000_expand_builtin): Call mma_expand_builtin.
Use RS6000_BTC_OPND_MASK.
(rs6000_init_builtins): Adjust comment.  Call mma_init_builtins.
(htm_init_builtins): Use RS6000_BTC_OPND_MASK.
(builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
VSX_BUILTIN_XVCVBF16SP.
* config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
(RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
* config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
(UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
UNSPEC_MMA_XVBF16GER2PP, 

[PATCH 3/3] rs6000: Add testsuite test cases for MMA built-ins.

[Peter Bergner via Gcc-patches]

This patch adds the testsuite test cases for all of the MMA built-ins.

This patch plus patch1 and patch2 passed bootstrap and regtesting with no
regressions on both powerpc64le-linux and powerpc64-linux.  Ok for trunk?

Peter

2020-06-15  Peter Bergner  

gcc/testsuite/
* gcc.target/powerpc/mma-builtin-1.c: New test.
* gcc.target/powerpc/mma-builtin-2.c: New test.
* gcc.target/powerpc/mma-builtin-3.c: New test.
* gcc.target/powerpc/mma-builtin-4.c: New test.
* gcc.target/powerpc/mma-builtin-5.c: New test.
* gcc.target/powerpc/mma-builtin-6.c: New test.

diff --git a/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.c 
b/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.c
new file mode 100644
index 000..a971c869095
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/mma-builtin-1.c
@@ -0,0 +1,313 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_future_ok } */
+/* { dg-options "-Wno-psabi -mdejagnu-cpu=future -O2" } */
+
+typedef unsigned char  vec_t __attribute__((vector_size(16)));
+
+void
+foo0 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_xvi4ger8 (, vec0, vec1);
+  __builtin_mma_xvi4ger8pp (, vec0, vec1);
+  dst[0] = acc;
+}
+
+void
+foo1 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_xvi8ger4 (, vec0, vec1);
+  __builtin_mma_xvi8ger4pp (, vec0, vec1);
+  __builtin_mma_xvi8ger4spp(, vec0, vec1);
+  dst[1] = acc;
+}
+
+void
+foo2 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_xvi16ger2 (, vec0, vec1);
+  __builtin_mma_xvi16ger2pp (, vec0, vec1);
+  dst[2] = acc;
+}
+
+void
+foo3 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_xvi16ger2s (, vec0, vec1);
+  __builtin_mma_xvi16ger2spp (, vec0, vec1);
+  dst[3] = acc;
+}
+
+void
+foo4 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_xvf16ger2 (, vec0, vec1);
+  __builtin_mma_xvf16ger2pp (, vec0, vec1);
+  __builtin_mma_xvf16ger2pn (, vec0, vec1);
+  dst[4] = acc;
+}
+
+void
+foo4b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  acc = src[0];
+  __builtin_mma_xvf16ger2np (, vec0, vec1);
+  __builtin_mma_xvf16ger2nn (, vec0, vec1);
+  dst[4] = acc;
+}
+
+void
+foo5 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_xvbf16ger2 (, vec0, vec1);
+  __builtin_mma_xvbf16ger2pp (, vec0, vec1);
+  __builtin_mma_xvbf16ger2pn (, vec0, vec1);
+  dst[5] = acc;
+}
+
+void
+foo5b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  acc = src[0];
+  __builtin_mma_xvbf16ger2np (, vec0, vec1);
+  __builtin_mma_xvbf16ger2nn (, vec0, vec1);
+  dst[5] = acc;
+}
+
+void
+foo6 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_xvf32ger (, vec0, vec1);
+  __builtin_mma_xvf32gerpp (, vec0, vec1);
+  __builtin_mma_xvf32gerpn (, vec0, vec1);
+  dst[6] = acc;
+}
+
+void
+foo6b (__vector_quad *dst, __vector_quad *src, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  acc = src[0];
+  __builtin_mma_xvf32gernp (, vec0, vec1);
+  __builtin_mma_xvf32gernn (, vec0, vec1);
+  dst[6] = acc;
+}
+
+void
+foo7 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_pmxvi4ger8 (, vec0, vec1, 15, 15, 255);
+  __builtin_mma_pmxvi4ger8pp (, vec0, vec1, 15, 15, 255);
+  dst[7] = acc;
+}
+
+void
+foo8 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_pmxvi8ger4 (, vec0, vec1, 15, 15, 15);
+  __builtin_mma_pmxvi8ger4pp (, vec0, vec1, 15, 15, 15);
+  __builtin_mma_pmxvi8ger4spp(, vec0, vec1, 15, 15, 15);
+  dst[8] = acc;
+}
+
+void
+foo9 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_pmxvi16ger2 (, vec0, vec1, 15, 15, 3);
+  __builtin_mma_pmxvi16ger2pp (, vec0, vec1, 15, 15, 3);
+  dst[9] = acc;
+}
+
+void
+foo10 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_pmxvi16ger2s (, vec0, vec1, 15, 15, 3);
+  __builtin_mma_pmxvi16ger2spp (, vec0, vec1, 15, 15, 3);
+  dst[10] = acc;
+}
+
+void
+foo11 (__vector_quad *dst, vec_t *vec)
+{
+  __vector_quad acc;
+  vec_t vec0 = vec[0];
+  vec_t vec1 = vec[1];
+
+  __builtin_mma_pmxvf16ger2 (, vec0, vec1, 15, 15, 3);
+  __builtin_mma_pmxvf16ger2pp (, vec0, vec1, 15, 15, 3);
+  

[PATCH 1/3] rs6000: Add base support and types for defining MMA built-ins.

[Peter Bergner via Gcc-patches]

This patch adds the new -mmma option as well as the initial MMA support,
which includes the target specific __vector_pair and __vector_quad types,
the POImode and PXImode partial integer modes they are mapped to, and their
associated  move patterns.  Support for the restrictions on the registers
these modes can be assigned to as also been added.

This patch passed bootstrap and regtesting with no regressions on
powerpc64le-linux.  Ok for trunk?

Peter

2020-06-15  Peter Bergner  
Michael Meissner  

gcc/
* config/rs6000/mma.md: New file.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__MMA__ for mma.
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
for __vector_pair and __vector_quad types.
* config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
OPTION_MASK_MMA.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
(POI, PXI): New partial integer modes.
* config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
(rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
(rs6000_hard_regno_mode_ok_uncached): Likewise.
Add support for POImode being allowed in VSX registers and PXImode
being allowed in FP registers.
(rs6000_modes_tieable_p): Adjust comment.
Add support for POImode and PXImode.
(rs6000_debug_reg_global) : Add OImode, POImode
XImode and PXImode.
(rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
Set up appropriate addr_masks for vector pair and vector quad addresses.
(rs6000_init_hard_regno_mode_ok): Add support for vector pair and
vector quad registers.  Setup reload handlers for POImode and PXImode.
(rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA
and RS6000_BTM_FUTURE.
(rs6000_option_override_internal): Error if -mmma is specified
without -mcpu=future.
(rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
(quad_address_p): Change size test to less than 16 bytes.
(reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
and vector quad instructions.
(avoiding_indexed_address_p): Likewise.
(rs6000_emit_move): Disallow POImode and PXImode moves involving
constants.
(rs6000_preferred_reload_class): Prefer VSX registers for POImode
and FP registers for PXImode.
(rs6000_split_multireg_move): Support splitting POImode and PXImode
move instructions.  Insert xxmtacc and xxmfacc instructions when
setting a PXImode register and reading a PXImode register respectively.
(rs6000_mangle_type): Adjust comment.  Add support for mangling
__vector_pair and __vector_quad types.
(rs6000_opt_masks): Add entry for mma.
(rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
(rs6000_function_value): Use VECTOR_ALIGNMENT_P.
(address_to_insn_form): Likewise.
(reg_to_non_prefixed): Likewise.
(rs6000_invalid_conversion): New function.
* config/rs6000/rs6000.h (MASK_MMA): Define.
(BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
(VECTOR_ALIGNMENT_P): New helper macro.
(ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
(RS6000_BTM_MMA): Define.
(RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
(rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
RS6000_BTI_vector_quad.
(vector_pair_type_node): Define.
(vector_quad_type_node): Likewise.
* config/rs6000/rs6000.md (define_attr "isa"): Add mma.
(define_attr "enabled"): Handle mma.
(define_mode_iterator RELOAD): Add POI and PXI.
Include mma.md.
* config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
* config/rs6000/rs6000.opt (-mmma): New.
* doc/invoke.texi: Document -mmma.

diff --git a/gcc/config/rs6000/mma.md b/gcc/config/rs6000/mma.md
new file mode 100644
index 000..b35a15a2be1
--- /dev/null
+++ b/gcc/config/rs6000/mma.md
@@ -0,0 +1,128 @@
+;; Vector Quad, Vector Pair, and MMA patterns.
+;; Copyright (C) 2020 Free Software Foundation, Inc.
+;; Contributed by Peter Bergner  and
+;;   Michael Meissner 
+
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify it
+;; under the terms of the GNU General Public License as published
+;; by the Free Software Foundation; either version 3, or (at your
+;; option) any later version.
+
+;; GCC is distributed in the hope that it will be useful, but WITHOUT
+;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+;; License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the 

[PATCH 0/3] rs6000: Add support for Matrix-Multiply Assist (MMA) built-in functions.

[Peter Bergner via Gcc-patches]

POWER ISA 3.1 added new Matrix-Multiply Assist (MMA) instructions.
The following patch series adds support for generating these instructions
through built-in functions which are enabled with the -mmma option.

Patch1 adds the base support required for defining the built-ins.
Patch2 adds the built-ins themselves and Patch3 adds testsuite test cases
to exercise the builtins.  I'll note that I split the testsuite changes
into their own patch solely for review purposes.  I plan on committing
patch2 and patch3 together.

The patch1 and patch1+patch2+patch3 have been bootstrapped and regtested on
powerpc64le-linux with no regressions.  In addition, patch1+patch2+patch3
has been bootstrapped and regtested on powerpc64-linux (BE), also without
regressions.  

Peter

[PATCH] c++: Fix bogus "does not declare anything" warning (PR 66159)

[Jonathan Wakely via Gcc-patches]

Ping ...



G++ gives a bogus warning for 'struct A; using B = struct ::A;'
complaining that the elaborated-type-specifier doesn't declare anything.
That's true, but it's not trying to declare struct ::A, just refer to it
unambiguously. Do not emit the warning unless we're actually parsing a
declaration.

This also makes the relevant warning depend on -Wredundant-decls (which
is not part of -Wall or -Wextra) so it can be disabled on the command
line or by using #pragma. This means the warning will no longer be given
by default, so some tests need -Wredundant-decls added.

gcc/cp/ChangeLog:

PR c++/66159
* parser.c (cp_parser_elaborated_type_specifier): Do not warn
unless in a declaration. Make warning depend on
WOPT_redundant_decls.

gcc/testsuite/ChangeLog:

PR c++/66159
* g++.dg/parse/specialization1.C: Remove dg-warning.
* g++.dg/warn/forward-inner.C: Add -Wredundant-decls. Check
alias-declaration using elaborated-type-specifier.
* g++.dg/warn/pr36999.C: Add -Wredundant-decls.


Is it OK to make this warning no longer emitted by default, and not
even with -Wall -Wextra?

Would it be better to add a new option for this specific warning,
which would be enabled by -Wall and also by -Wredundant-decls? Maybe
-Wredundant-decls-elaborated-type or something.


commit c254d7cb3977484fd4737b973a87c1df98c30e01
Author: Jonathan Wakely 
Date:   Wed May 27 10:40:38 2020 +0100

c++: Fix bogus "does not declare anything" warning (PR 66159)

G++ gives a bogus warning for 'struct A; using B = struct ::A;'
complaining that the elaborated-type-specifier doesn't declare anything.
That's true, but it's not trying to declare struct ::A, just refer to it
unambiguously. Do not emit the warning unless we're actually parsing a
declaration.

This also makes the relevant warning depend on -Wredundant-decls (which
is not part of -Wall or -Wextra) so it can be disabled on the command
line or by using #pragma. This means the warning will no longer be given
by default, so some tests need -Wredundant-decls added.

gcc/cp/ChangeLog:

PR c++/66159
* parser.c (cp_parser_elaborated_type_specifier): Do not warn
unless in a declaration. Make warning depend on
WOPT_redundant_decls.

gcc/testsuite/ChangeLog:

PR c++/66159
* g++.dg/parse/specialization1.C: Remove dg-warning.
* g++.dg/warn/forward-inner.C: Add -Wredundant-decls. Check
alias-declaration using elaborated-type-specifier.
* g++.dg/warn/pr36999.C: Add -Wredundant-decls.

diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c
index 54ca875ce54..5287ab34752 100644
--- a/gcc/cp/parser.c
+++ b/gcc/cp/parser.c
@@ -18917,8 +18917,10 @@ cp_parser_elaborated_type_specifier (cp_parser* parser,
  here.  */
 
   if (cp_lexer_next_token_is (parser->lexer, CPP_SEMICOLON)
-  && !is_friend && !processing_explicit_instantiation)
-warning (0, "declaration %qD does not declare anything", decl);
+ && !is_friend && is_declaration
+ && !processing_explicit_instantiation)
+   warning (OPT_Wredundant_decls,
+"declaration %qD does not declare anything", decl);
 
  type = TREE_TYPE (decl);
}
diff --git a/gcc/testsuite/g++.dg/parse/specialization1.C 
b/gcc/testsuite/g++.dg/parse/specialization1.C
index 44a98baa2f4..6d83bc4f254 100644
--- a/gcc/testsuite/g++.dg/parse/specialization1.C
+++ b/gcc/testsuite/g++.dg/parse/specialization1.C
@@ -4,4 +4,3 @@
 
 template  class A;
 template  class A::B; // { dg-error "declaration" "err" }
-// { dg-warning "declaration" "warn" { target *-*-* } .-1 }
diff --git a/gcc/testsuite/g++.dg/warn/forward-inner.C 
b/gcc/testsuite/g++.dg/warn/forward-inner.C
index 5336d4ed946..1c10ec44a54 100644
--- a/gcc/testsuite/g++.dg/warn/forward-inner.C
+++ b/gcc/testsuite/g++.dg/warn/forward-inner.C
@@ -1,5 +1,6 @@
 // Check that the compiler warns about inner-style forward declarations in
 // contexts where they're not actually illegal, but merely useless.
+// { dg-options "-Wredundant-decls" }
 
 // Verify warnings for and within classes, and by extension, struct and union.
 class C1;
@@ -70,7 +71,7 @@ template class TC6::TC7;  // Valid explicit 
instantiation, no warning
 
 
 // Verify that friend declarations, also easy to confuse with forward
-// declrations, are similarly not warned about.
+// declarations, are similarly not warned about.
 class C8 {
  public:
   class C9 { };
@@ -79,3 +80,10 @@ class C10 {
  public:
   friend class C8::C9; // Valid friend declaration, no warning
 };
+
+#if __cplusplus >= 201103L
+// Verify that alias-declarations using an elaborated-type-specifier and
+// nested-name-specifier are not warned about (PR c++/66159).
+struct C11;
+using A1 = struct ::C11; // Valid alias-decl, no warning
+#endif

Re: [PATCH 2/2] c++: Clean up previous change [PR41437]

[Jason Merrill via Gcc-patches]

On 6/15/20 2:59 PM, Patrick Palka wrote:

On Mon, 15 Jun 2020, Jason Merrill wrote:


On 6/5/20 5:16 PM, Patrick Palka wrote:

The previous patch mostly avoided making any changes that had no
functional impact, such as adjusting now-outdated comments and
performing renamings.  Such changes have been consolidated to this
followup patch for easier review.

The main change here is that we now reuse struct deferred_access_check
as the element type of the vector TI_TYPEDEFS_NEEDING_ACCESS_CHECKING
(now renamed to TI_DEFERRED_ACCESS_CHECKS, since it now may contain all
kinds of access checks).

gcc/cp/ChangeLog:

PR c++/41437
PR c++/47346
* cp-tree.h (qualified_typedef_usage_s): Delete.
(qualified_typedef_usage_t): Delete.
(deferred_access_check): Move up in file.
(tree_template_info::typedefs_needing_access_checking): Delete.
(tree_template_info::deferred_access_checks): New field.
(TI_TYPEDEFS_NEEDING_ACCESS_CHECKING): Rename to ...
(TI_DEFERRED_ACCESS_CHECKS): ... this, and adjust accordingly.
* pt.c (perform_typedefs_access_check): Rename to ...
(perform_instantiation_time_access_checks): ... this, and adjust
accordingly.  Remove unnecessary tree tests.
(instantiate_class_template_1): Adjust accordingly.
(instantiate_decl): Likewise.
* semantics.c (enforce_access): Adjust to build up a
deferred_access_check.
---
   gcc/cp/cp-tree.h   | 58 +++
   gcc/cp/pt.c| 61 +-
   gcc/cp/semantics.c | 12 -
   3 files changed, 48 insertions(+), 83 deletions(-)

diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 771d51cc283..50d83add458 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -1449,27 +1449,6 @@ struct GTY (()) tree_lambda_expr
 int discriminator;
   };
   -/* A (typedef,context,usage location) triplet.
-   It represents a typedef used through a
-   context at a given source location.
-   e.g.
-   struct foo {
- typedef int myint;
-   };
-
-   struct bar {
-foo::myint v; // #1<-- this location.
-   };
-
-   In bar, the triplet will be (myint, foo, #1).
-   */
-struct GTY(()) qualified_typedef_usage_s {
-  tree typedef_decl;
-  tree context;
-  location_t locus;
-};
-typedef struct qualified_typedef_usage_s qualified_typedef_usage_t;
-
   /* Non-zero if this template specialization has access violations that
  should be rechecked when the function is instantiated outside argument
  deduction.  */
@@ -1489,11 +1468,24 @@ typedef struct qualified_typedef_usage_s
qualified_typedef_usage_t;
   #define TINFO_VAR_DECLARED_CONSTINIT(NODE) \
 (TREE_LANG_FLAG_2 (TEMPLATE_INFO_CHECK (NODE)))
   +/* The representation of a deferred access check.  */
+
+struct GTY(()) deferred_access_check {
+  /* The base class in which the declaration is referenced. */
+  tree binfo;
+  /* The declaration whose access must be checked.  */
+  tree decl;
+  /* The declaration that should be used in the error message.  */
+  tree diag_decl;
+  /* The location of this access.  */
+  location_t loc;
+};
+
   struct GTY(()) tree_template_info {
 struct tree_base base;
 tree tmpl;
 tree args;
-  vec *typedefs_needing_access_checking;
+  vec *deferred_access_checks;
   };
 // Constraint information for a C++ declaration. Constraint information
is
@@ -3532,14 +3524,15 @@ struct GTY(()) lang_decl {
 ? int_cst_value (NON_DEFAULT_TEMPLATE_ARGS_COUNT (NODE)) \
 : TREE_VEC_LENGTH (INNERMOST_TEMPLATE_ARGS (NODE))
   #endif
-/* The list of typedefs - used in the template - that need
-   access checking at template instantiation time.
+
+/* The list of access checks that were deferred during parsing
+   which need to be performed at template instantiation time.
FIXME this should be associated with the TEMPLATE_DECL, not the
  TEMPLATE_INFO.  */
-#define TI_TYPEDEFS_NEEDING_ACCESS_CHECKING(NODE) \
+#define TI_DEFERRED_ACCESS_CHECKS(NODE) \
 ((struct tree_template_info*)TEMPLATE_INFO_CHECK \
- (NODE))->typedefs_needing_access_checking
+ (NODE))->deferred_access_checks
 /* We use TREE_VECs to hold template arguments.  If there is only one
  level of template arguments, then the TREE_VEC contains the
@@ -7090,19 +7083,6 @@ extern int shared_member_p
(tree);
   extern bool any_dependent_bases_p (tree = current_nonlambda_class_type
());
   extern bool maybe_check_overriding_exception_spec (tree, tree);
   -/* The representation of a deferred access check.  */
-
-struct GTY(()) deferred_access_check {
-  /* The base class in which the declaration is referenced. */
-  tree binfo;
-  /* The declaration whose access must be checked.  */
-  tree decl;
-  /* The declaration that should be used in the error message.  */
-  tree diag_decl;
-  /* The location of this access.  */
-  location_t loc;
-};
-
   /* in semantics.c */
   extern void 

libgo patch committed: Use getrandom_linux_generic.go on riscv

[Ian Lance Taylor via Gcc-patches]

This patch by Tobias Klauser adds (32-bit) riscv support for the
getrandom function in internal/syscall/unix.  Bootstrapped and ran Go
testsuite on x86_64-pc-linux-gnu.  Committed to mainline.

Ian
274fa3704bdb79f75088e245772150ab1e83b460
diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE
index c8b78bfda04..9a33735b9c7 100644
--- a/gcc/go/gofrontend/MERGE
+++ b/gcc/go/gofrontend/MERGE
@@ -1,4 +1,4 @@
-74199467ea912138c1b76e9a156bb47886be1436
+925d115397e7ec663f669ee5ac31b6dfccea5724
 
 The first line of this file holds the git revision number of the last
 merge done from the gofrontend repository.
diff --git a/libgo/go/internal/syscall/unix/getrandom_linux_generic.go 
b/libgo/go/internal/syscall/unix/getrandom_linux_generic.go
index 0c79ae54f4b..007e769c397 100644
--- a/libgo/go/internal/syscall/unix/getrandom_linux_generic.go
+++ b/libgo/go/internal/syscall/unix/getrandom_linux_generic.go
@@ -3,7 +3,7 @@
 // license that can be found in the LICENSE file.
 
 // +build linux
-// +build arm64 arm64be nios2 riscv64
+// +build arm64 arm64be nios2 riscv riscv64
 
 package unix
 

Re: [PATCH 2/2] c++: Clean up previous change [PR41437]

[Patrick Palka via Gcc-patches]

On Mon, 15 Jun 2020, Jason Merrill wrote:

> On 6/5/20 5:16 PM, Patrick Palka wrote:
> > The previous patch mostly avoided making any changes that had no
> > functional impact, such as adjusting now-outdated comments and
> > performing renamings.  Such changes have been consolidated to this
> > followup patch for easier review.
> > 
> > The main change here is that we now reuse struct deferred_access_check
> > as the element type of the vector TI_TYPEDEFS_NEEDING_ACCESS_CHECKING
> > (now renamed to TI_DEFERRED_ACCESS_CHECKS, since it now may contain all
> > kinds of access checks).
> > 
> > gcc/cp/ChangeLog:
> > 
> > PR c++/41437
> > PR c++/47346
> > * cp-tree.h (qualified_typedef_usage_s): Delete.
> > (qualified_typedef_usage_t): Delete.
> > (deferred_access_check): Move up in file.
> > (tree_template_info::typedefs_needing_access_checking): Delete.
> > (tree_template_info::deferred_access_checks): New field.
> > (TI_TYPEDEFS_NEEDING_ACCESS_CHECKING): Rename to ...
> > (TI_DEFERRED_ACCESS_CHECKS): ... this, and adjust accordingly.
> > * pt.c (perform_typedefs_access_check): Rename to ...
> > (perform_instantiation_time_access_checks): ... this, and adjust
> > accordingly.  Remove unnecessary tree tests.
> > (instantiate_class_template_1): Adjust accordingly.
> > (instantiate_decl): Likewise.
> > * semantics.c (enforce_access): Adjust to build up a
> > deferred_access_check.
> > ---
> >   gcc/cp/cp-tree.h   | 58 +++
> >   gcc/cp/pt.c| 61 +-
> >   gcc/cp/semantics.c | 12 -
> >   3 files changed, 48 insertions(+), 83 deletions(-)
> > 
> > diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
> > index 771d51cc283..50d83add458 100644
> > --- a/gcc/cp/cp-tree.h
> > +++ b/gcc/cp/cp-tree.h
> > @@ -1449,27 +1449,6 @@ struct GTY (()) tree_lambda_expr
> > int discriminator;
> >   };
> >   -/* A (typedef,context,usage location) triplet.
> > -   It represents a typedef used through a
> > -   context at a given source location.
> > -   e.g.
> > -   struct foo {
> > - typedef int myint;
> > -   };
> > -
> > -   struct bar {
> > -foo::myint v; // #1<-- this location.
> > -   };
> > -
> > -   In bar, the triplet will be (myint, foo, #1).
> > -   */
> > -struct GTY(()) qualified_typedef_usage_s {
> > -  tree typedef_decl;
> > -  tree context;
> > -  location_t locus;
> > -};
> > -typedef struct qualified_typedef_usage_s qualified_typedef_usage_t;
> > -
> >   /* Non-zero if this template specialization has access violations that
> >  should be rechecked when the function is instantiated outside argument
> >  deduction.  */
> > @@ -1489,11 +1468,24 @@ typedef struct qualified_typedef_usage_s
> > qualified_typedef_usage_t;
> >   #define TINFO_VAR_DECLARED_CONSTINIT(NODE) \
> > (TREE_LANG_FLAG_2 (TEMPLATE_INFO_CHECK (NODE)))
> >   +/* The representation of a deferred access check.  */
> > +
> > +struct GTY(()) deferred_access_check {
> > +  /* The base class in which the declaration is referenced. */
> > +  tree binfo;
> > +  /* The declaration whose access must be checked.  */
> > +  tree decl;
> > +  /* The declaration that should be used in the error message.  */
> > +  tree diag_decl;
> > +  /* The location of this access.  */
> > +  location_t loc;
> > +};
> > +
> >   struct GTY(()) tree_template_info {
> > struct tree_base base;
> > tree tmpl;
> > tree args;
> > -  vec *typedefs_needing_access_checking;
> > +  vec *deferred_access_checks;
> >   };
> > // Constraint information for a C++ declaration. Constraint information
> > is
> > @@ -3532,14 +3524,15 @@ struct GTY(()) lang_decl {
> > ? int_cst_value (NON_DEFAULT_TEMPLATE_ARGS_COUNT (NODE)) \
> > : TREE_VEC_LENGTH (INNERMOST_TEMPLATE_ARGS (NODE))
> >   #endif
> > -/* The list of typedefs - used in the template - that need
> > -   access checking at template instantiation time.
> > +
> > +/* The list of access checks that were deferred during parsing
> > +   which need to be performed at template instantiation time.
> >FIXME this should be associated with the TEMPLATE_DECL, not the
> >  TEMPLATE_INFO.  */
> > -#define TI_TYPEDEFS_NEEDING_ACCESS_CHECKING(NODE) \
> > +#define TI_DEFERRED_ACCESS_CHECKS(NODE) \
> > ((struct tree_template_info*)TEMPLATE_INFO_CHECK \
> > - (NODE))->typedefs_needing_access_checking
> > + (NODE))->deferred_access_checks
> > /* We use TREE_VECs to hold template arguments.  If there is only one
> >  level of template arguments, then the TREE_VEC contains the
> > @@ -7090,19 +7083,6 @@ extern int shared_member_p
> > (tree);
> >   extern bool any_dependent_bases_p (tree = current_nonlambda_class_type
> > ());
> >   extern bool maybe_check_overriding_exception_spec (tree, tree);
> >   -/* The representation of a deferred access check.  */
> > -
> > -struct GTY(()) deferred_access_check {
> > -  /* The base class 

Re: [PATCH, RS6000 PR target/94954] Fix wrong codegen for vec_pack_to_short_fp32() builtin

[will schmidt via Gcc-patches]

On Fri, 2020-06-12 at 18:31 -0500, Segher Boessenkool wrote:
> Hi!
> 
> On Thu, Jun 11, 2020 at 11:22:33PM -0500, will schmidt wrote:
> >   Fix codegen implementation for the builtin
> > vec_pack_to_short_fp32.
> > +;; Convert two vector F32 to packed vector f16.
> > +(define_expand "convert_4f32_8f16"
> > +  [(set (match_operand:V8HI 0 "register_operand" "=v")
> > +   (unspec:V8HI [(match_operand:V4SF 1 "register_operand" "v")
> > + (match_operand:V4SF 2 "register_operand" "v")]
> > +UNSPEC_CONVERT_4F32_8F16))]
> > +  "TARGET_P9_VECTOR"
> > +{
> > +  rtx rtx_tmp_hi = gen_reg_rtx (V4SImode);
> > +  rtx rtx_tmp_lo = gen_reg_rtx (V4SImode);
> > +
> > +  emit_insn (gen_vsx_xvcvsphp (rtx_tmp_hi, operands[1] ));
> > +  emit_insn (gen_vsx_xvcvsphp (rtx_tmp_lo, operands[2] ));
> > +  if (BYTES_BIG_ENDIAN)
> > +emit_insn (gen_altivec_vpkuwum (operands[0], rtx_tmp_lo,
> > rtx_tmp_hi));
> > +  else
> > +emit_insn (gen_altivec_vpkuwum (operands[0], rtx_tmp_hi,
> > rtx_tmp_lo));
> > +  DONE;
> > +})
> 
> Why is this different from the 8i16, which doesn't have the swap of
> the
> operands for BE?

The 8f16 implementation specifies the swap variation between LE/BE. 
I'm not sure of the 8i16 implementation was defined without that, or
if this was just missed.  I suspect it should have been there too.

> 
> If the comment before the pattern would say how it orders the
> elements,
> that might clarify things.  (This really is documenting the unspec,
> but
> there is no better place for documenting this afaics).

Ok.  I'll double-check and ensure i've got the right wording. 

> 
> > +;; Generate xvcvsphp
> > +(define_insn "vsx_xvcvsphp"
> > +  [(set (match_operand:V4SI 0 "register_operand" "=wa")
> > +(unspec:V4SI [(match_operand:V4SF 1 "vsx_register_operand"
> > "wa")]
> > +UNSPEC_VSX_XVCVSPHP))]
> 
> (Should be a tab before the unspec as well, not eight spaces).

I see a tab and 5 spaces.   I'll double-check. 

> 
> > --- a/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c
> > +++ b/gcc/testsuite/gcc.target/powerpc/builtins-1-p9-runnable.c
> > @@ -1,25 +1,37 @@
> >  /* { dg-do run { target { powerpc*-*-linux* && { lp64 &&
> > p9vector_hw } } } } */
> 
> Why the lp64 here?
> 
> >  /* { dg-require-effective-target powerpc_p9vector_ok } */
> 
> That is implied by p9vector_hw (or it should be, at least :-) )

Hmm, yes.  Those are issues with the original test.  I'll update.

Thanks
-Will

> 
> 
> Segher

Re: [PATCH] avoid false positives due to compute_objsize (PR 95353)

[Martin Sebor via Gcc-patches]

On 6/14/20 12:37 PM, Jeff Law wrote:

On Sat, 2020-06-13 at 17:49 -0600, Martin Sebor wrote:

On 6/13/20 3:50 PM, Sandra Loosemore wrote:

On 6/2/20 6:12 PM, Martin Sebor via Gcc-patches wrote:

The compute_objsize() function started out as a thin wrapper around
compute_builtin_object_size(), but over time developed its own
features to compensate for the other function's limitations (such
as its inability to work with ranges).  The interaction of these
features and the limitations has started to become increasingly
problematic as the former function is used in more contexts.

A complete "fix" for all the problems (as well as some other
limitations) that I'm working on will be more extensive and won't
be appropriate for backports.  Until then, the attached patch
cleans up the extensions compute_objsize() has accumulated over
the years to avoid a class of false positives.

To make the warnings issued based on the results of the function
easier to understand and fix, the patch also adds an informative
message to many instances of -Wstringop-overflow to point to
the object to which the warning refers.  This is especially
helpful when the object is referenced by a series of pointer
operations.

Tested by boostrapping on x86_64-linux and building Binutils/GDB,
Glibc, and the Linux kernel with no new warnings.

Besides applying it to trunk I'm looking to backport the fix to
GCC 10.


This patch (commit a2c2cee92e5defff9bf23d3b1184ee96e57e5fdd) has broken
glibc builds on nios2-linux-gnu, when building sysdeps/posix/getaddrinfo.c:

../sysdeps/posix/getaddrinfo.c: In function 'gaih_inet.constprop':
../sysdeps/posix/getaddrinfo.c:1081:3: error: 'memcpy' writing 16 bytes
into a region of size 8 overflows the destination
[-Werror=stringop-overflow=]
   1081 |   memcpy (>sin6_addr,
|   ^~
   1082 |at2->addr, sizeof (struct in6_addr));
|
In file included from ../include/netinet/in.h:3,
   from ../resolv/bits/types/res_state.h:5,
   from ../include/bits/types/res_state.h:1,
   from ../nptl/descr.h:35,
   from ../sysdeps/nios2/nptl/tls.h:45,
   from ../sysdeps/generic/libc-tsd.h:44,
   from ../include/../locale/localeinfo.h:224,
   from ../include/ctype.h:26,
   from ../sysdeps/posix/getaddrinfo.c:57:
../inet/netinet/in.h:249:19: note: destination object 'sin_zero'
249 | unsigned char sin_zero[sizeof (struct sockaddr)
|   ^~~~


I have to say that I don't understand the "note" diagnostic here at all.
   :-(  Why does it think the destination object is a field of struct
sockaddr_in, while this memcpy is filling in a field of struct
sockaddr_in6?  (And, the sin6_addr field is indeed of type struct
in6_addr, matching the sizeof expression.)


Most likely because some earlier pass (from my exchange with Jeff
about this instance of the warning I suspect it's PRE) substitutes
one member for the other in the IL when offsets into them happen
to evaluate to the same offset from the start of the enclosing
object.  The Glibc code does this:

Yes, this is the same issue we were discussing privately.



struct sockaddr_in6 *sin6p =
  (struct sockaddr_in6 *) ai->ai_addr;

sin6p->sin6_port = st2->port;
sin6p->sin6_flowinfo = 0;
memcpy (>sin6_addr,
at2->addr, sizeof (struct in6_addr));

and the warning doesn't see sin6p->sin6_addr as the destination
but something like

  [(void *)ai_10 + 4B].sin_zero;

The details in this and all other middle end warnings are only as
reliable as the IL they work with.  If the IL that doesn't correspond
to the original source code they're going to be confusing (and may
trigger false positives).

True, but the transformation done by PRE is valid.  PRE is concerned only with
value equivalences and the two addresses are the same and PRE can and will
replace one with the other.


That's fine.  Since they are treated as equivalent it shouldn't
matter which of the equivalent alternatives is chosen (there
may be many).  It's the particular choice of the smaller member
that makes it a problem: both in the terms of triggering a false
positive and in terms of the note referencing a member the source
code doesn't use.

If PRE instead picked the bigger member it wouldn't necessarily
trigger the warning.  But if that member was also too small,
the note might still reference the wrong member.

But if PRE picked another equivalent representation not involving
any member at all but rather an offset from the base object (i.e.,
just a MEM_REF) there would be no problem either way: no false
positive, and if it overflowed, the warning wouldn't reference
any member but just the base object.





Instead of substituting one member for another in the COMPONENT_REF
when both 

Re: [PATCH 2/2] c++: Clean up previous change [PR41437]

[Jason Merrill via Gcc-patches]

On 6/5/20 5:16 PM, Patrick Palka wrote:

The previous patch mostly avoided making any changes that had no
functional impact, such as adjusting now-outdated comments and
performing renamings.  Such changes have been consolidated to this
followup patch for easier review.

The main change here is that we now reuse struct deferred_access_check
as the element type of the vector TI_TYPEDEFS_NEEDING_ACCESS_CHECKING
(now renamed to TI_DEFERRED_ACCESS_CHECKS, since it now may contain all
kinds of access checks).

gcc/cp/ChangeLog:

PR c++/41437
PR c++/47346
* cp-tree.h (qualified_typedef_usage_s): Delete.
(qualified_typedef_usage_t): Delete.
(deferred_access_check): Move up in file.
(tree_template_info::typedefs_needing_access_checking): Delete.
(tree_template_info::deferred_access_checks): New field.
(TI_TYPEDEFS_NEEDING_ACCESS_CHECKING): Rename to ...
(TI_DEFERRED_ACCESS_CHECKS): ... this, and adjust accordingly.
* pt.c (perform_typedefs_access_check): Rename to ...
(perform_instantiation_time_access_checks): ... this, and adjust
accordingly.  Remove unnecessary tree tests.
(instantiate_class_template_1): Adjust accordingly.
(instantiate_decl): Likewise.
* semantics.c (enforce_access): Adjust to build up a
deferred_access_check.
---
  gcc/cp/cp-tree.h   | 58 +++
  gcc/cp/pt.c| 61 +-
  gcc/cp/semantics.c | 12 -
  3 files changed, 48 insertions(+), 83 deletions(-)

diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index 771d51cc283..50d83add458 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -1449,27 +1449,6 @@ struct GTY (()) tree_lambda_expr
int discriminator;
  };
  
-/* A (typedef,context,usage location) triplet.

-   It represents a typedef used through a
-   context at a given source location.
-   e.g.
-   struct foo {
- typedef int myint;
-   };
-
-   struct bar {
-foo::myint v; // #1<-- this location.
-   };
-
-   In bar, the triplet will be (myint, foo, #1).
-   */
-struct GTY(()) qualified_typedef_usage_s {
-  tree typedef_decl;
-  tree context;
-  location_t locus;
-};
-typedef struct qualified_typedef_usage_s qualified_typedef_usage_t;
-
  /* Non-zero if this template specialization has access violations that
 should be rechecked when the function is instantiated outside argument
 deduction.  */
@@ -1489,11 +1468,24 @@ typedef struct qualified_typedef_usage_s 
qualified_typedef_usage_t;
  #define TINFO_VAR_DECLARED_CONSTINIT(NODE) \
(TREE_LANG_FLAG_2 (TEMPLATE_INFO_CHECK (NODE)))
  
+/* The representation of a deferred access check.  */

+
+struct GTY(()) deferred_access_check {
+  /* The base class in which the declaration is referenced. */
+  tree binfo;
+  /* The declaration whose access must be checked.  */
+  tree decl;
+  /* The declaration that should be used in the error message.  */
+  tree diag_decl;
+  /* The location of this access.  */
+  location_t loc;
+};
+
  struct GTY(()) tree_template_info {
struct tree_base base;
tree tmpl;
tree args;
-  vec *typedefs_needing_access_checking;
+  vec *deferred_access_checks;
  };
  
  // Constraint information for a C++ declaration. Constraint information is

@@ -3532,14 +3524,15 @@ struct GTY(()) lang_decl {
? int_cst_value (NON_DEFAULT_TEMPLATE_ARGS_COUNT (NODE)) \
: TREE_VEC_LENGTH (INNERMOST_TEMPLATE_ARGS (NODE))
  #endif
-/* The list of typedefs - used in the template - that need
-   access checking at template instantiation time.
+
+/* The list of access checks that were deferred during parsing
+   which need to be performed at template instantiation time.
  
 FIXME this should be associated with the TEMPLATE_DECL, not the

 TEMPLATE_INFO.  */
-#define TI_TYPEDEFS_NEEDING_ACCESS_CHECKING(NODE) \
+#define TI_DEFERRED_ACCESS_CHECKS(NODE) \
((struct tree_template_info*)TEMPLATE_INFO_CHECK \
- (NODE))->typedefs_needing_access_checking
+ (NODE))->deferred_access_checks
  
  /* We use TREE_VECs to hold template arguments.  If there is only one

 level of template arguments, then the TREE_VEC contains the
@@ -7090,19 +7083,6 @@ extern int shared_member_p   (tree);
  extern bool any_dependent_bases_p (tree = current_nonlambda_class_type ());
  extern bool maybe_check_overriding_exception_spec (tree, tree);
  
-/* The representation of a deferred access check.  */

-
-struct GTY(()) deferred_access_check {
-  /* The base class in which the declaration is referenced. */
-  tree binfo;
-  /* The declaration whose access must be checked.  */
-  tree decl;
-  /* The declaration that should be used in the error message.  */
-  tree diag_decl;
-  /* The location of this access.  */
-  location_t loc;
-};
-
  /* in semantics.c */
  extern void push_deferring_access_checks  (deferring_kind);
  extern void resume_deferring_access_checks

Re: [PATCH 1/2] c++: Improve access checking inside templates [PR41437]

[Jason Merrill via Gcc-patches]

On 6/15/20 9:56 AM, Patrick Palka wrote:

On Thu, 11 Jun 2020, Jason Merrill wrote:


On 6/5/20 5:16 PM, Patrick Palka wrote:

This patch generalizes our existing functionality for deferring access
checking of typedefs when parsing a function or class template to now
defer all kinds of access checks until template instantiation time,
including member function and member object accesses.

Since all access checks eventually go through enforce_access, the main
component of this patch is new handling inside enforce_access to defer
the current access check if we're inside a template.  The bulk of the
rest of the patch consists of removing now-unneeded code pertaining to
suppressing access checks inside templates or pertaining to
typedef-specific access handling.  Renamings and other changes with no
functional impact have been split off into the followup patch.


Great!


Bootstrapped and regtested on x86_64-pc-linux-gnu, and also tested by
building parts of boost, cmcstl2 and other libraries.



-  && !dependent_type_p (qualifying_type))
+  && !dependent_type_p (scope))


This needs a comment.  And it occurs to me that if we're only going to check
access if scope is non-dependent, we can check that much earlier and avoid the
need to guard DECL_NONSTATIC_MEMBER_P.


Good point, that works much better.  Done in the below patch, which has
been bootstrapped and regtested  on x86_64-pc-linux-gnu and has been
smoke tested on a number of libraries.


OK, thanks.


(The followup patch remains
essentially unchanged.)

-- >8 --

Subject: [PATCH 1/2] c++: Improve access checking inside templates [PR41437]

This patch generalizes our existing functionality for deferring access
checking of typedefs when parsing a function or class template to now
defer all kinds of access checks until template instantiation time,
including member function and member object accesses.

Since all access checks eventually go through enforce_access, the main
component of this patch is new handling inside enforce_access to defer
the current access check if we're inside a template.  The bulk of the
rest of the patch consists of removing now-unneeded code pertaining to
suppressing access checks inside templates or pertaining to
typedef-specific access handling.  Renamings and other changes with no
functional impact have been split off into the followup patch.

Bootstrapped and regtested on x86_64-pc-linux-gnu, and also tested by
building parts of boost, cmcstl2 and other libraries.

gcc/cp/ChangeLog:

PR c++/41437
PR c++/47346
* call.c (enforce_access): Move to semantics.c.
* cp-tree.h (enforce_access): Delete.
(get_types_needing_access_check): Delete.
(add_typedef_to_current_template_for_access_check): Delete.
* decl.c (make_typename_type): Adjust accordingly.  Use
check_accessibility_of_qualified_id instead of directly using
perform_or_defer_access_check.
* parser.c (cp_parser_template_declaration_after_parameters):
Don't push a dk_no_check access state when parsing a template.
* pt.c (get_types_needing_access_check): Delete.
(append_type_to_template_for_access_check_1): Delete.
(perform_typedefs_access_check): Adjust.  If type_decl is a
FIELD_DECL, also check its DECL_CONTEXT for dependence. Use
tsubst_copy instead of tsubst to substitute into type_decl so
that we substitute into the DECL_CONTEXT of a FIELD_DECL.
(append_type_to_template_for_access_check): Delete.
* search.c (accessible_p): Remove the processing_template_decl
early exit.
* semantics.c (enforce_access): Moved from call.c.  If we're
parsing a template and the access check failed, add the check to
TI_TYPEDEFS_NEEDING_ACCESS_CHECKING.
(perform_or_defer_access_check): Adjust comment.
(add_typedef_to_current_template_for_access_check): Delete.
(check_accessibility_of_qualified_id):  Adjust accordingly.
Exit early if the scope is dependent.

gcc/testsuite/ChangeLog:

PR c++/41437
PR c++/47346
* g++.dg/cpp2a/concepts-using2.C: Adjust.
* g++.dg/lto/20081219_1.C: Adjust.
* g++.dg/lto/20091002-1_0.C: Adjust.
* g++.dg/lto/pr65475c_0.C: Adjust.
* g++.dg/opt/dump1.C: Adjust.
* g++.dg/other/pr53574.C: Adjust.
* g++.dg/template/access30.C: New test.
* g++.dg/template/access31.C: New test.
* g++.dg/wrappers/wrapper-around-type-pack-expansion.C: Adjust.

libstdc++-v3/ChangeLog:

PR libstdc++/94003
* testsuite/20_util/is_constructible/94003.cc: New test.
---
  gcc/cp/call.c |  36 -
  gcc/cp/cp-tree.h  |   6 -
  gcc/cp/decl.c |   8 +-
  gcc/cp/parser.c   |   4 -
  gcc/cp/pt.c   | 120 +
  gcc/cp/search.c

Re: [PATCH] recog: Use parameter packs for operator()

[Jonathan Wakely via Gcc-patches]

+  template
+  rtx_insn *operator() (Ts... args...) const

Why is this declared as a variadic template **and** a varargs function?

I think the second ellipsis is wrong, it should be just:

+  template
+  rtx_insn *operator() (Ts... args) const


And this seems like a more direct way to say "a list of N rtx types"
where N is sizeof...(args):

diff --git a/gcc/recog.h b/gcc/recog.h
index 0a71a02c4a9..fd22c58c92a 100644
--- a/gcc/recog.h
+++ b/gcc/recog.h
@@ -294,10 +294,13 @@ struct insn_gen_fn
 {
   typedef void (*stored_funcptr) (void);
 
+  template using rtx_t = rtx;
+
   template
-  rtx_insn *operator() (Ts... args...) const
+  rtx_insn *operator() (Ts... args) const
   {
-return ((rtx_insn *(*) (decltype(args, NULL_RTX)...)) func) (args...);
+using funcptr = rtx_insn * (*) (rtx_t...);
+return ((funcptr) func) (args...);
   }
 
   // This is for compatibility of code that invokes functions like

The rtx_t alias is the type 'rtx' for any T. The pack expansion
rtx_t... is a list of rtx the same length as the pack Ts.

The 'funcptr' alias sin't necessary, but (IMHO) simplifies the
following line, by splitting the definition of the complicated
function pointer type from its use.

Re: [pushed][PATCH] identify lfs prefixed case PR95347

[Segher Boessenkool]

On Mon, Jun 15, 2020 at 09:25:40AM -0500, Aaron Sawdey wrote:
> Now that this has been in trunk for a bit with no issues, ok to back port to 
> 10?

Yes please.  Thanks!


Segher


> > The same problem also arises for plfs where prefixed_load_p()
> > doesn't recognize it so we get just lfs in the asm output
> > with an @pcrel address.
> > 
> > PR target/95347
> > * config/rs6000/rs6000.c (is_stfs_insn): Rename to
> > is_lfs_stfs_insn and make it recognize lfs as well.
> > (prefixed_store_p): Use is_lfs_stfs_insn().
> > (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.

[patch] fix PR lto/95604, -flto and -fcf-protection

[Matthias Klose]

PR lto/95604 was seen when checking for binaries without having CET support in a
distro archive, for binaries built with LTO optimization.  The hardening flag
-fcf-protection=full is passed in CFLAGS, and maybe should be passed in LDFLAGS
as well.  However to make it work when not passed to the link step, it should be
extracted from the options found in the lto opts section.

Richard suggested two solutions offline.  I checked that both fix the test case.
Which one to install?  Also ok for the 9 and 10 branches?

Thanks, Matthias



	PR lto/95604
	* lto-wrapper.c (merge_and_complain): Warn about different
	values for -fcf-protection.
	(append_compiler_options): Pass -fcf-protection option.
	* lto-opts.c (lto_write_options): Pass -fcf-protection option.

--- a/src/gcc/lto-opts.c
+++ b/src/gcc/lto-opts.c
@@ -94,6 +94,21 @@ lto_write_options (void)
   : "-fno-pie");
 }
 
+  if (!global_options_set.x_flag_cf_protection)
+{
+  append_to_collect_gcc_options (
+_obstack, _p,
+	global_options.x_flag_cf_protection == CF_NONE
+	? "-fcf-protection=none"
+	: global_options.x_flag_cf_protection == CF_FULL
+	? "-fcf-protection=full"
+	: global_options.x_flag_cf_protection == CF_BRANCH
+	? "-fcf-protection=branch"
+	: global_options.x_flag_cf_protection == CF_RETURN
+	? "-fcf-protection=RETURN"
+	: "");
+}
+
   /* If debug info is enabled append -g.  */
   if (debug_info_level > DINFO_LEVEL_NONE)
 append_to_collect_gcc_options (_obstack, _p, "-g");
--- a/src/gcc/lto-wrapper.c
+++ b/src/gcc/lto-wrapper.c
@@ -287,6 +287,18 @@
 			 foption->orig_option_with_args_text);
 	  break;
 
+	case OPT_fcf_protection_:
+	  /* Append or check identical.  */
+	  for (j = 0; j < *decoded_options_count; ++j)
+	if ((*decoded_options)[j].opt_index == foption->opt_index)
+	  break;
+	  if (j == *decoded_options_count)
+	append_option (decoded_options, decoded_options_count, foption);
+	  else if (strcmp ((*decoded_options)[j].arg, foption->arg))
+	warning (input_location, "option %s with different values",
+		 foption->orig_option_with_args_text);
+	  break;
+
 	case OPT_O:
 	case OPT_Ofast:
 	case OPT_Og:
@@ -645,6 +677,7 @@
 	case OPT_fopenacc:
 	case OPT_fopenacc_dim_:
 	case OPT_foffload_abi_:
+	case OPT_fcf_protection_:
 	case OPT_g:
 	case OPT_O:
 	case OPT_Ofast:
	* common.opt (fcf-protection, fcf-protection=): Mark as optimization.

--- a/src/gcc/common.opt
+++ b/src/gcc/common.opt
@@ -1739,10 +1739,10 @@
 Inline __atomic operations when a lock free instruction sequence is available.
 
 fcf-protection
-Common RejectNegative Alias(fcf-protection=,full)
+Common Optimization RejectNegative Alias(fcf-protection=,full)
 
 fcf-protection=
-Common Report Joined RejectNegative Enum(cf_protection_level) Var(flag_cf_protection) Init(CF_NONE)
+Common Optimization Report Joined RejectNegative Enum(cf_protection_level) Var(flag_cf_protection) Init(CF_NONE)
 -fcf-protection=[full|branch|return|none]	Instrument functions with checks to verify jump/call/return control-flow transfer
 instructions have valid targets.
 

[PATCH] RISC-V: Fix ICE on riscv_gpr_save_operation_p [PR95683]

[Kito Cheng]

 - riscv_gpr_save_operation_p might try to match parallel on other
   patterns like inline asm pattern, and then it might trigger ther
   assertion checking there, so we could trun it into a early exit check.

gcc/ChangeLog:

PR target/95683
* config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
assertion and turn it into a early exit check.

gcc/testsuite/ChangeLog

PR target/95683
* gcc.target/riscv/pr95683.c: New.
---
 gcc/config/riscv/riscv.c |  5 -
 gcc/testsuite/gcc.target/riscv/pr95683.c | 10 ++
 2 files changed, 14 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/pr95683.c

diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 328c0c823a39..bfb3885ed081 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -5216,7 +5216,10 @@ bool
 riscv_gpr_save_operation_p (rtx op)
 {
   unsigned len = XVECLEN (op, 0);
-  gcc_assert (len <= ARRAY_SIZE (gpr_save_reg_order));
+
+  if (len > ARRAY_SIZE (gpr_save_reg_order))
+return false;
+
   for (unsigned i = 0; i < len; i++)
 {
   rtx elt = XVECEXP (op, 0, i);
diff --git a/gcc/testsuite/gcc.target/riscv/pr95683.c 
b/gcc/testsuite/gcc.target/riscv/pr95683.c
new file mode 100644
index ..00cfbdcf2826
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr95683.c
@@ -0,0 +1,10 @@
+/* PR target/95683 */
+/* { dg-options "-Os" } */
+/* { dg-do compile } */
+void a() {
+  asm(""
+  :
+  :
+  : "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3",
+"t4", "t5", "t6", "ra");
+}
-- 
2.27.0

Re: [pushed][PATCH] identify lfs prefixed case PR95347

[Aaron Sawdey via Gcc-patches]

Now that this has been in trunk for a bit with no issues, ok to back port to 10?


Aaron Sawdey, Ph.D. saw...@linux.ibm.com
IBM Linux on POWER Toolchain
 

> On Jun 3, 2020, at 4:10 PM, Aaron Sawdey  wrote:
> 
> This passed regstrap and was approved offline by Segher, posting
> the final form (minus my debug code, oops).
> 
> The same problem also arises for plfs where prefixed_load_p()
> doesn't recognize it so we get just lfs in the asm output
> with an @pcrel address.
> 
>   PR target/95347
>   * config/rs6000/rs6000.c (is_stfs_insn): Rename to
>   is_lfs_stfs_insn and make it recognize lfs as well.
>   (prefixed_store_p): Use is_lfs_stfs_insn().
>   (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
> ---
> gcc/config/rs6000/rs6000.c | 37 +
> 1 file changed, 25 insertions(+), 12 deletions(-)
> 
> diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
> index ba9069ecc3b..42d517c1f65 100644
> --- a/gcc/config/rs6000/rs6000.c
> +++ b/gcc/config/rs6000/rs6000.c
> @@ -24980,14 +24980,18 @@ address_to_insn_form (rtx addr,
>   return INSN_FORM_BAD;
> }
> 
> -/* Helper function to see if we're potentially looking at stfs.
> +/* Helper function to see if we're potentially looking at lfs/stfs.
>- PARALLEL containing a SET and a CLOBBER
> -   - SET is from UNSPEC_SI_FROM_SF to MEM:SI
> -   - CLOBBER is a V4SF
> +   - stfs:
> +- SET is from UNSPEC_SI_FROM_SF to MEM:SI
> +- CLOBBER is a V4SF
> +   - lfs:
> +- SET is from UNSPEC_SF_FROM_SI to REG:SF
> +- CLOBBER is a DI
>  */
> 
> static bool
> -is_stfs_insn (rtx_insn *insn)
> +is_lfs_stfs_insn (rtx_insn *insn)
> {
>   rtx pattern = PATTERN (insn);
>   if (GET_CODE (pattern) != PARALLEL)
> @@ -25013,16 +25017,22 @@ is_stfs_insn (rtx_insn *insn)
>   rtx src = SET_SRC (set);
>   rtx scratch = SET_DEST (clobber);
> 
> -  if (GET_CODE (src) != UNSPEC || XINT (src, 1) != UNSPEC_SI_FROM_SF)
> +  if (GET_CODE (src) != UNSPEC)
> return false;
> 
> -  if (GET_CODE (dest) != MEM || GET_MODE (dest) != SImode)
> -return false;
> +  /* stfs case.  */
> +  if (XINT (src, 1) == UNSPEC_SI_FROM_SF
> +  && GET_CODE (dest) == MEM && GET_MODE (dest) == SImode
> +  && GET_CODE (scratch) == SCRATCH && GET_MODE (scratch) == V4SFmode)
> +return true;
> 
> -  if (GET_CODE (scratch) != SCRATCH || GET_MODE (scratch) != V4SFmode)
> -return false;
> +  /* lfs case.  */
> +  if (XINT (src, 1) == UNSPEC_SF_FROM_SI
> +  && GET_CODE (dest) == REG && GET_MODE (dest) == SFmode
> +  && GET_CODE (scratch) == SCRATCH && GET_MODE (scratch) == DImode)
> +return true;
> 
> -  return true;
> +  return false;
> }
> 
> /* Helper function to take a REG and a MODE and turn it into the non-prefixed
> @@ -25135,7 +25145,10 @@ prefixed_load_p (rtx_insn *insn)
>   else
> non_prefixed = reg_to_non_prefixed (reg, mem_mode);
> 
> -  return address_is_prefixed (XEXP (mem, 0), mem_mode, non_prefixed);
> +  if (non_prefixed == NON_PREFIXED_X && is_lfs_stfs_insn (insn))
> +return address_is_prefixed (XEXP (mem, 0), mem_mode, 
> NON_PREFIXED_DEFAULT);
> +  else
> +return address_is_prefixed (XEXP (mem, 0), mem_mode, non_prefixed);
> }
> 
> /* Whether a store instruction is a prefixed instruction.  This is called from
> @@ -25170,7 +25183,7 @@ prefixed_store_p (rtx_insn *insn)
>   /* Need to make sure we aren't looking at a stfs which doesn't look
>  like the other things reg_to_non_prefixed/address_is_prefixed
>  looks for.  */
> -  if (non_prefixed == NON_PREFIXED_X && is_stfs_insn (insn))
> +  if (non_prefixed == NON_PREFIXED_X && is_lfs_stfs_insn (insn))
> return address_is_prefixed (addr, mem_mode, NON_PREFIXED_DEFAULT);
>   else
> return address_is_prefixed (addr, mem_mode, non_prefixed);
> -- 
> 2.17.1
> 

Re: [PATCH 1/2] c++: Improve access checking inside templates [PR41437]

[Patrick Palka via Gcc-patches]

On Mon, 15 Jun 2020, Patrick Palka wrote:

> On Thu, 11 Jun 2020, Jason Merrill wrote:
> 
> > On 6/5/20 5:16 PM, Patrick Palka wrote:
> > > This patch generalizes our existing functionality for deferring access
> > > checking of typedefs when parsing a function or class template to now
> > > defer all kinds of access checks until template instantiation time,
> > > including member function and member object accesses.
> > > 
> > > Since all access checks eventually go through enforce_access, the main
> > > component of this patch is new handling inside enforce_access to defer
> > > the current access check if we're inside a template.  The bulk of the
> > > rest of the patch consists of removing now-unneeded code pertaining to
> > > suppressing access checks inside templates or pertaining to
> > > typedef-specific access handling.  Renamings and other changes with no
> > > functional impact have been split off into the followup patch.
> > 
> > Great!
> > 
> > > Bootstrapped and regtested on x86_64-pc-linux-gnu, and also tested by
> > > building parts of boost, cmcstl2 and other libraries.
> > 
> > > -  && !dependent_type_p (qualifying_type))
> > > +  && !dependent_type_p (scope))
> > 
> > This needs a comment.  And it occurs to me that if we're only going to check
> > access if scope is non-dependent, we can check that much earlier and avoid 
> > the
> > need to guard DECL_NONSTATIC_MEMBER_P.
> 
> Good point, that works much better.  Done in the below patch, which has
> been bootstrapped and regtested  on x86_64-pc-linux-gnu and has been
> smoke tested on a number of libraries.  (The followup patch remains
> essentially unchanged.)
> 
> -- >8 --
> 
> Subject: [PATCH 1/2] c++: Improve access checking inside templates [PR41437]
> 
> This patch generalizes our existing functionality for deferring access
> checking of typedefs when parsing a function or class template to now
> defer all kinds of access checks until template instantiation time,
> including member function and member object accesses.
> 
> Since all access checks eventually go through enforce_access, the main
> component of this patch is new handling inside enforce_access to defer
> the current access check if we're inside a template.  The bulk of the
> rest of the patch consists of removing now-unneeded code pertaining to
> suppressing access checks inside templates or pertaining to
> typedef-specific access handling.  Renamings and other changes with no
> functional impact have been split off into the followup patch.
> 
> Bootstrapped and regtested on x86_64-pc-linux-gnu, and also tested by
> building parts of boost, cmcstl2 and other libraries.
> 
> gcc/cp/ChangeLog:
> 
>   PR c++/41437
>   PR c++/47346
>   * call.c (enforce_access): Move to semantics.c.
>   * cp-tree.h (enforce_access): Delete.
>   (get_types_needing_access_check): Delete.
>   (add_typedef_to_current_template_for_access_check): Delete.
>   * decl.c (make_typename_type): Adjust accordingly.  Use
>   check_accessibility_of_qualified_id instead of directly using
>   perform_or_defer_access_check.
>   * parser.c (cp_parser_template_declaration_after_parameters):
>   Don't push a dk_no_check access state when parsing a template.
>   * pt.c (get_types_needing_access_check): Delete.
>   (append_type_to_template_for_access_check_1): Delete.
>   (perform_typedefs_access_check): Adjust.  If type_decl is a
>   FIELD_DECL, also check its DECL_CONTEXT for dependence. Use
>   tsubst_copy instead of tsubst to substitute into type_decl so
>   that we substitute into the DECL_CONTEXT of a FIELD_DECL.
>   (append_type_to_template_for_access_check): Delete.
>   * search.c (accessible_p): Remove the processing_template_decl
>   early exit.
>   * semantics.c (enforce_access): Moved from call.c.  If we're
>   parsing a template and the access check failed, add the check to
>   TI_TYPEDEFS_NEEDING_ACCESS_CHECKING.
>   (perform_or_defer_access_check): Adjust comment.
>   (add_typedef_to_current_template_for_access_check): Delete.
>   (check_accessibility_of_qualified_id):  Adjust accordingly.
>   Exit early if the scope is dependent.
> 
> gcc/testsuite/ChangeLog:
> 
>   PR c++/41437
>   PR c++/47346
>   * g++.dg/cpp2a/concepts-using2.C: Adjust.
>   * g++.dg/lto/20081219_1.C: Adjust.
>   * g++.dg/lto/20091002-1_0.C: Adjust.
>   * g++.dg/lto/pr65475c_0.C: Adjust.
>   * g++.dg/opt/dump1.C: Adjust.
>   * g++.dg/other/pr53574.C: Adjust.
>   * g++.dg/template/access30.C: New test.
>   * g++.dg/template/access31.C: New test.
>   * g++.dg/wrappers/wrapper-around-type-pack-expansion.C: Adjust.
> 
> libstdc++-v3/ChangeLog:
> 
>   PR libstdc++/94003
>   * testsuite/20_util/is_constructible/94003.cc: New test.
> ---
>  gcc/cp/call.c |  36 -
>  gcc/cp/cp-tree.h  |   6 -
>  

Re: [PATCH 1/2] c++: Improve access checking inside templates [PR41437]

[Patrick Palka via Gcc-patches]

On Thu, 11 Jun 2020, Jason Merrill wrote:

> On 6/5/20 5:16 PM, Patrick Palka wrote:
> > This patch generalizes our existing functionality for deferring access
> > checking of typedefs when parsing a function or class template to now
> > defer all kinds of access checks until template instantiation time,
> > including member function and member object accesses.
> > 
> > Since all access checks eventually go through enforce_access, the main
> > component of this patch is new handling inside enforce_access to defer
> > the current access check if we're inside a template.  The bulk of the
> > rest of the patch consists of removing now-unneeded code pertaining to
> > suppressing access checks inside templates or pertaining to
> > typedef-specific access handling.  Renamings and other changes with no
> > functional impact have been split off into the followup patch.
> 
> Great!
> 
> > Bootstrapped and regtested on x86_64-pc-linux-gnu, and also tested by
> > building parts of boost, cmcstl2 and other libraries.
> 
> > -  && !dependent_type_p (qualifying_type))
> > +  && !dependent_type_p (scope))
> 
> This needs a comment.  And it occurs to me that if we're only going to check
> access if scope is non-dependent, we can check that much earlier and avoid the
> need to guard DECL_NONSTATIC_MEMBER_P.

Good point, that works much better.  Done in the below patch, which has
been bootstrapped and regtested  on x86_64-pc-linux-gnu and has been
smoke tested on a number of libraries.  (The followup patch remains
essentially unchanged.)

-- >8 --

Subject: [PATCH 1/2] c++: Improve access checking inside templates [PR41437]

This patch generalizes our existing functionality for deferring access
checking of typedefs when parsing a function or class template to now
defer all kinds of access checks until template instantiation time,
including member function and member object accesses.

Since all access checks eventually go through enforce_access, the main
component of this patch is new handling inside enforce_access to defer
the current access check if we're inside a template.  The bulk of the
rest of the patch consists of removing now-unneeded code pertaining to
suppressing access checks inside templates or pertaining to
typedef-specific access handling.  Renamings and other changes with no
functional impact have been split off into the followup patch.

Bootstrapped and regtested on x86_64-pc-linux-gnu, and also tested by
building parts of boost, cmcstl2 and other libraries.

gcc/cp/ChangeLog:

PR c++/41437
PR c++/47346
* call.c (enforce_access): Move to semantics.c.
* cp-tree.h (enforce_access): Delete.
(get_types_needing_access_check): Delete.
(add_typedef_to_current_template_for_access_check): Delete.
* decl.c (make_typename_type): Adjust accordingly.  Use
check_accessibility_of_qualified_id instead of directly using
perform_or_defer_access_check.
* parser.c (cp_parser_template_declaration_after_parameters):
Don't push a dk_no_check access state when parsing a template.
* pt.c (get_types_needing_access_check): Delete.
(append_type_to_template_for_access_check_1): Delete.
(perform_typedefs_access_check): Adjust.  If type_decl is a
FIELD_DECL, also check its DECL_CONTEXT for dependence. Use
tsubst_copy instead of tsubst to substitute into type_decl so
that we substitute into the DECL_CONTEXT of a FIELD_DECL.
(append_type_to_template_for_access_check): Delete.
* search.c (accessible_p): Remove the processing_template_decl
early exit.
* semantics.c (enforce_access): Moved from call.c.  If we're
parsing a template and the access check failed, add the check to
TI_TYPEDEFS_NEEDING_ACCESS_CHECKING.
(perform_or_defer_access_check): Adjust comment.
(add_typedef_to_current_template_for_access_check): Delete.
(check_accessibility_of_qualified_id):  Adjust accordingly.
Exit early if the scope is dependent.

gcc/testsuite/ChangeLog:

PR c++/41437
PR c++/47346
* g++.dg/cpp2a/concepts-using2.C: Adjust.
* g++.dg/lto/20081219_1.C: Adjust.
* g++.dg/lto/20091002-1_0.C: Adjust.
* g++.dg/lto/pr65475c_0.C: Adjust.
* g++.dg/opt/dump1.C: Adjust.
* g++.dg/other/pr53574.C: Adjust.
* g++.dg/template/access30.C: New test.
* g++.dg/template/access31.C: New test.
* g++.dg/wrappers/wrapper-around-type-pack-expansion.C: Adjust.

libstdc++-v3/ChangeLog:

PR libstdc++/94003
* testsuite/20_util/is_constructible/94003.cc: New test.
---
 gcc/cp/call.c |  36 -
 gcc/cp/cp-tree.h  |   6 -
 gcc/cp/decl.c |   8 +-
 gcc/cp/parser.c   |   4 -
 gcc/cp/pt.c   | 120 +
 

Re: [PATCH] coroutines: Copy attributes to the outlined functions [PR95518]

[Nathan Sidwell]

On 6/11/20 3:53 PM, Iain Sandoe wrote:

Hi

We had omitted the copying of function attributes (including the
'used' status).  Mark the outlined functions as artificial, since
they are; some diagnostic processing tests this.


Do we do the right thing for say attribute((section("bob"))?  what if the user 
tries attribute((alias("bob")), presumable we don't want both ramp and actor to 
alias bob?  I think this might be tricky.



tested on Linux and Darwin,
OK for master?
10.2?
thanks
Iain

gcc/cp/ChangeLog:

PR c++/95518
* coroutines.cc (act_des_fn): Copy function attributes from
the user’s function decl onto the outlined helpers.

gcc/testsuite/ChangeLog:

PR c++/95518
* g++.dg/coroutines/pr95518.C: New test.
---
  gcc/cp/coroutines.cc  |  5 +
  gcc/testsuite/g++.dg/coroutines/pr95518.C | 27 +++
  2 files changed, 32 insertions(+)
  create mode 100644 gcc/testsuite/g++.dg/coroutines/pr95518.C

diff --git a/gcc/cp/coroutines.cc b/gcc/cp/coroutines.cc
index 93f1e5ca30d..4f7356e94e5 100644
--- a/gcc/cp/coroutines.cc
+++ b/gcc/cp/coroutines.cc
@@ -3530,12 +3530,17 @@ act_des_fn (tree orig, tree fn_type, tree 
coro_frame_ptr, const char* name)
tree fn_name = get_fn_local_identifier (orig, name);
tree fn = build_lang_decl (FUNCTION_DECL, fn_name, fn_type);
DECL_CONTEXT (fn) = DECL_CONTEXT (orig);
+  DECL_ARTIFICIAL (fn) = true;
DECL_INITIAL (fn) = error_mark_node;
tree id = get_identifier ("frame_ptr");
tree fp = build_lang_decl (PARM_DECL, id, coro_frame_ptr);
DECL_CONTEXT (fp) = fn;
DECL_ARG_TYPE (fp) = type_passed_as (coro_frame_ptr);
DECL_ARGUMENTS (fn) = fp;
+  /* Copy used-ness from the original function.  */
+  TREE_USED (fn) = TREE_USED (orig);
+  /* Apply attributes from the original fn.  */
+  DECL_ATTRIBUTES (fn) = copy_list (DECL_ATTRIBUTES (orig));
return fn;
  }
  
diff --git a/gcc/testsuite/g++.dg/coroutines/pr95518.C b/gcc/testsuite/g++.dg/coroutines/pr95518.C

new file mode 100644
index 000..2d7dd049e1b
--- /dev/null
+++ b/gcc/testsuite/g++.dg/coroutines/pr95518.C
@@ -0,0 +1,27 @@
+//  { dg-additional-options "-O -Wunused-function" }
+
+#if __has_include ()
+#include 
+using namespace std;
+#elif defined (__clang__) && __has_include ()
+#include 
+namespace std { using namespace experimental; }
+#endif
+
+struct dummy
+{
+struct promise_type
+{
+dummy get_return_object() const noexcept { return {}; }
+std::suspend_never initial_suspend() const noexcept { return {}; }
+std::suspend_never final_suspend() const noexcept { return {}; }
+void return_void() const noexcept {}
+void unhandled_exception() const noexcept {}
+};
+int i; // work around #95516
+};
+
+[[maybe_unused]] static dummy foo()
+{
+co_return;
+}




--
Nathan Sidwell

Re: [PATCH] coroutines: Update handling and failure for g-r-o-o-a-f [PR95505]

[Nathan Sidwell]

On 6/11/20 3:50 PM, Iain Sandoe wrote:

Hi,

The reason that the code fails is that (by a somewhat complex
implied route), when a user adds a 'get-return-on-alloc-fail’
to their coroutine promise, this implies the use of some content
from ; we should not ICE because the user forgot that tho.

Jonathan and I were discussing whether there’s a better way than
including  in  to make this less likely to happen.

The issue is that neither  nor the user’s code overtly
use ; one has to know that the standard makes use of it
by implication… anyway that’s not the bug, but the background.

tested on Linux, and Darwin.
OK for master?
10.2?
thanks
Iain


ok, a couple of nits




The actual issue is that (in the testcase) std::nothrow is not
available.  So update the handling of the get-return-on-alloc-fail
to include the possibility that std::nothrow might not be
available.

gcc/cp/ChangeLog:

* coroutines.cc (morph_fn_to_coro): Update handling of
get-return-object-on-allocation-fail and diagnose missing
std::nothrow.

gcc/testsuite/ChangeLog:

* g++.dg/coroutines/pr95505.C: New test.
---
  gcc/cp/coroutines.cc  | 43 +++
  gcc/testsuite/g++.dg/coroutines/pr95505.C | 26 ++
  2 files changed, 47 insertions(+), 22 deletions(-)
  create mode 100644 gcc/testsuite/g++.dg/coroutines/pr95505.C

diff --git a/gcc/cp/coroutines.cc b/gcc/cp/coroutines.cc
index f0b7e71633d..93f1e5ca30d 100644
--- a/gcc/cp/coroutines.cc
+++ b/gcc/cp/coroutines.cc
@@ -3913,30 +3913,25 @@ morph_fn_to_coro (tree orig, tree *resumer, tree 
*destroyer)
tree grooaf = NULL_TREE;
tree dummy_promise = build_dummy_object (get_coroutine_promise_type (orig));
  
-  /* We don't require this, so lookup_promise_method can return NULL...  */

+  /* We don't require this, so lookup_promise_method can return NULL,
+ but, if the lookup succeeds, then the function must be usable.*/

 .*/


-  if (fns && BASELINK_P (fns))
+  /* We don't require this, so lookup_promise_method can return NULL...  */

... to what?  Is this a repeat of the above rationale or something different?


nathan
--
Nathan Sidwell

Re: [PATCH] Optimize V*QImode shift by constant using same operation on V*HImode [PR95524]

[Jakub Jelinek via Gcc-patches]

On Mon, Jun 15, 2020 at 09:29:29PM +0800, Hongtao Liu via Gcc-patches wrote:
>   Basically i "copy" this optimization from clang i386 backend, Refer
> to pr95524 for details.
>   Bootstrap is ok, regression test on i386/x86-64 backend is ok.
> 
> gcc/ChangeLog:
> PR target/95524
> * gcc/config/i386/i386-expand.c
> (ix86_expand_vec_shift_qihi_constant): New function.

No gcc/ prefix in gcc/ChangeLog (git push would be refused).
And with or without the prefix it fits, so:
* config/i386/i386-expand.c (ix86_expand_vec_shift_qihi_constant): New
function.

> * gcc/config/i386/i386-protos.h: Declare.

This needs to mention the function name again.

> * gcc/config/i386/sse.md: Optimize shift V*QImode by constant.

And thus needs to mention the define_expand, (3)
in this case.

+  machine_mode qimode, himode;
+  unsigned int shift_constant, and_constant, xor_constant;
+  rtx vec_const_and, vec_const_xor;
+  rtx tmp, op1_subreg;
+  rtx (*gen_shift) (rtx, rtx, rtx);
+  rtx (*gen_and) (rtx, rtx, rtx);
+  rtx (*gen_xor) (rtx, rtx, rtx);
+  rtx (*gen_sub) (rtx, rtx, rtx);
+
+  /* Only optimize shift by constant.  */
+  if (!CONST_INT_P (op2))
+return false;
+
+  qimode = GET_MODE (dest);
+  shift_constant = INTVAL (op2);

I wonder if shift_constant shouldn't be unsigned HOST_WIDE_INT
instead, and which >= 8 values you should try to do something about rather
than punt on optimizing.  If this is just from normal C shifts, then
perhaps anything >= 32U would be invalid, if it is from intrinsics,
perhaps there is a different behavior (masked with something?).

+  /* Shift constant greater equal 8 result into 0.  */
+  if (shift_constant > 7)
+{
+  if (code == ASHIFT || code == LSHIFTRT)
+   {
+ emit_move_insn (dest, CONST0_RTX (qimode));
+ return true;
+   }
+  /* Sign bit not known.  */
+  else if (code == ASHIFTRT)
+   return false;
+  else
+   gcc_unreachable ();
+}
+
+  gcc_assert (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
+  /* Record sign bit.  */
+  xor_constant = 1 << (8 - shift_constant - 1);
+
+  /* Zero upper/lower bits shift from left/right element.  */
+  and_constant = code == ASHIFT ? 256 - (1 << shift_constant) :
+(1 << (8 - shift_constant)) - 1;

Formatting.  Should be:
  and_constant
= (code == ASHIFT ? 256 - (1 << shift_constant)
  : (1 << (8 - shift_constant)) - 1);
or so.
+
+  switch (qimode)
+{
+case V16QImode:
+  himode = V8HImode;
+  gen_shift = (code == ASHIFT) ? gen_ashlv8hi3 :
+   (code == ASHIFTRT) ? gen_ashrv8hi3 : gen_lshrv8hi3;

Similarly.  : or ? should just never appear at the end of line.
And probably no reason to wrap the comparisons in parens,
instead wrap the whole expression.  So:
  gen_shift
= (code == ASHIFT
   ? gen_ashlv8hi3
   : code == ASHIFTRT ? gen_ashrv8hi3 : gen_lshrv8hi3);
or so?

+  gen_and = gen_andv16qi3;
+  gen_xor = gen_xorv16qi3;
+  gen_sub = gen_subv16qi3;
+  break;
+case V32QImode:
+  himode = V16HImode;
+  gen_shift = (code == ASHIFT) ? gen_ashlv16hi3 :
+   (code == ASHIFTRT) ? gen_ashrv16hi3 : gen_lshrv16hi3;

Ditto.

+  gen_and = gen_andv32qi3;
+  gen_xor = gen_xorv32qi3;
+  gen_sub = gen_subv32qi3;
+  break;
+case V64QImode:
+  himode = V32HImode;
+  gen_shift = (code == ASHIFT) ? gen_ashlv32hi3 :
+   (code == ASHIFTRT) ? gen_ashrv32hi3 : gen_lshrv32hi3;

Ditto.

+  tmp = gen_reg_rtx (himode);
+  vec_const_and = gen_reg_rtx (qimode);
+  op1_subreg = simplify_gen_subreg (himode, op1, qimode, 0);

Just use lowpart_subreg?
+
+  /* For ASHIFT and LSHIFTRT, perform operation like
+ vpsllw/vpsrlw $shift_constant, %op1, %dest.
+ vpand %vec_const_and, %dest.  */
+  emit_insn (gen_shift (tmp, op1_subreg, op2));
+  emit_move_insn (dest, simplify_gen_subreg (qimode, tmp, himode, 0));
+  emit_move_insn (vec_const_and,
+ ix86_build_const_vector (qimode, true,
+  GEN_INT (and_constant)));
+  emit_insn (gen_and (dest, dest, vec_const_and));
+
+  /* For ASHIFTRT, perform extra operation like
+ vpxor %vec_const_xor, %dest, %dest
+ vpsubb %vec_const_xor, %dest, %dest  */
+  if (code == ASHIFTRT)
+{
+  vec_const_xor = gen_reg_rtx (qimode);
+  emit_move_insn (vec_const_xor,
+ ix86_build_const_vector (qimode, true,
+  GEN_INT (xor_constant)));
+  emit_insn (gen_xor (dest, dest, vec_const_xor));
+  emit_insn (gen_sub (dest, dest, vec_const_xor));
+}
+  return true;
+}
+
 /* Expand a vector operation CODE for a V*QImode in terms of the
same operation on V*HImode.  */
 
diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h
index f5320494fa1..7c2ce618f3f 100644
--- a/gcc/config/i386/i386-protos.h
+++ b/gcc/config/i386/i386-protos.h
@@ -206,6 

Re: [PATCH] libstdc++: Fix char_traits move with overlap

[Jonathan Wakely via Gcc-patches]

On 15/06/20 14:42 +0100, Jonathan Wakely wrote:

On 14/06/20 22:40 +, Paul Keir wrote:

Hi,

Upon constexpr evaluation, char_traits move uses copy_backward, but its last 
argument should be to the range end rather than its beginning. I include the 
fix and a test.

This is my first patch, so if it looks OK, perhaps someone could commit for me.


The patch is fine, and small enough to not need a copyright
assignment, so I've tested it and committed it. Thanks very much!


I'll also queue your patch for the gcc-10 branch, so it will get
applied next time I do some backports.



I've also committed the attached patch, which bumps the feature test
macro to indicate support for this feature. That macro is not defined
by the C++ committee, but I'm treating that as a defect and will get
it added.

Re: [PATCH] libstdc++: Fix char_traits move with overlap

[Jonathan Wakely via Gcc-patches]

On 14/06/20 22:40 +, Paul Keir wrote:

Hi,

Upon constexpr evaluation, char_traits move uses copy_backward, but its last 
argument should be to the range end rather than its beginning. I include the 
fix and a test.

This is my first patch, so if it looks OK, perhaps someone could commit for me.


The patch is fine, and small enough to not need a copyright
assignment, so I've tested it and committed it. Thanks very much!

I've also committed the attached patch, which bumps the feature test
macro to indicate support for this feature. That macro is not defined
by the C++ committee, but I'm treating that as a defect and will get
it added.

Tested powerpc64le-linux, committed to master.


commit b6ab9ecd550227684643b41e9e33a4d3466724d8
Author: Jonathan Wakely 
Date:   Mon Jun 15 14:31:26 2020 +0100

libstdc++: Update value of __cpp_lib_constexpr_char_traits for C++20

Although not required by SD-6 or the C++20 draft, we define the macro
__cpp_lib_constexpr_char_traits to indicate support for P0432R1. This
updates the value in C++20 mode for the P1032R1 changes to char_traits.

* include/bits/char_traits.h (__cpp_lib_constexpr_char_traits):
Update value for C++20.
* include/std/version (__cpp_lib_constexpr_char_traits): Likewise.
* testsuite/21_strings/char_traits/requirements/constexpr_functions_c++17.cc:
Update expected value.
* testsuite/21_strings/char_traits/requirements/constexpr_functions_c++20.cc:
Likewise.

diff --git a/libstdc++-v3/include/bits/char_traits.h b/libstdc++-v3/include/bits/char_traits.h
index c623a6713f6..84c2d1b7ff2 100644
--- a/libstdc++-v3/include/bits/char_traits.h
+++ b/libstdc++-v3/include/bits/char_traits.h
@@ -236,7 +236,14 @@ namespace std _GLIBCXX_VISIBILITY(default)
 _GLIBCXX_BEGIN_NAMESPACE_VERSION
 
 #if __cplusplus >= 201703L
-#define __cpp_lib_constexpr_char_traits 201611
+
+#if __cplusplus == 201703L
+// Unofficial macro indicating P0426R1 support
+# define __cpp_lib_constexpr_char_traits 201611L
+#else
+// Also support P1032R1 in C++20
+# define __cpp_lib_constexpr_char_traits 201811L
+#endif
 
   /**
*  @brief Determine whether the characters of a NULL-terminated
diff --git a/libstdc++-v3/include/std/version b/libstdc++-v3/include/std/version
index c6bde2cfbda..f64aff4f520 100644
--- a/libstdc++-v3/include/std/version
+++ b/libstdc++-v3/include/std/version
@@ -127,7 +127,7 @@
 #define __cpp_lib_boyer_moore_searcher 201603
 #define __cpp_lib_chrono 201611
 #define __cpp_lib_clamp 201603
-#define __cpp_lib_constexpr_char_traits 201611
+#define __cpp_lib_constexpr_char_traits 201611L
 #define __cpp_lib_enable_shared_from_this 201603
 #define __cpp_lib_execution 201902L // FIXME: should be 201603L
 #define __cpp_lib_filesystem 201703
@@ -192,16 +192,18 @@
 
 #if _GLIBCXX_HOSTED
 #undef __cpp_lib_array_constexpr
+#undef __cpp_lib_constexpr_char_traits
 #define __cpp_lib_array_constexpr 201811L
 #define __cpp_lib_assume_aligned 201811L
 #define __cpp_lib_bind_front 201907L
 // FIXME: #define __cpp_lib_execution 201902L
 #define __cpp_lib_integer_comparison_functions 202002L
 #define __cpp_lib_constexpr_algorithms 201806L
+#define __cpp_lib_constexpr_char_traits 201811L
 #define __cpp_lib_constexpr_complex 201711L
 #define __cpp_lib_constexpr_dynamic_alloc 201907L
 #define __cpp_lib_constexpr_functional 201907L
-# define __cpp_lib_constexpr_iterator 201811L
+#define __cpp_lib_constexpr_iterator 201811L
 #define __cpp_lib_constexpr_memory 201811L
 #define __cpp_lib_constexpr_numeric 201911L
 #define __cpp_lib_constexpr_string_view 201811L
diff --git a/libstdc++-v3/testsuite/21_strings/char_traits/requirements/constexpr_functions_c++17.cc b/libstdc++-v3/testsuite/21_strings/char_traits/requirements/constexpr_functions_c++17.cc
index 7cb950b89f5..55dcba48db6 100644
--- a/libstdc++-v3/testsuite/21_strings/char_traits/requirements/constexpr_functions_c++17.cc
+++ b/libstdc++-v3/testsuite/21_strings/char_traits/requirements/constexpr_functions_c++17.cc
@@ -75,8 +75,10 @@ template
 
 #ifndef __cpp_lib_constexpr_char_traits
 # error Feature-test macro for constexpr char_traits is missing
-#elif __cpp_lib_constexpr_char_traits != 201611
+#elif __cpp_lib_constexpr_char_traits < 201611
 # error Feature-test macro for constexpr char_traits has the wrong value
+#elif __cpp_lib_constexpr_char_traits > 201611 && __cplusplus == 201703
+# error Feature-test macro for constexpr char_traits has wrong value for C++17
 #endif
 
 static_assert( test_assign>() );
diff --git a/libstdc++-v3/testsuite/21_strings/char_traits/requirements/constexpr_functions_c++20.cc b/libstdc++-v3/testsuite/21_strings/char_traits/requirements/constexpr_functions_c++20.cc
index 6358640c1cb..63c7c9cbb57 100644
--- a/libstdc++-v3/testsuite/21_strings/char_traits/requirements/constexpr_functions_c++20.cc
+++ b/libstdc++-v3/testsuite/21_strings/char_traits/requirements/constexpr_functions_c++20.cc
@@ -32,7 

[PATCH] Optimize V*QImode shift by constant using same operation on V*HImode [PR95524]

[Hongtao Liu via Gcc-patches]

Hi:
  Basically i "copy" this optimization from clang i386 backend, Refer
to pr95524 for details.
  Bootstrap is ok, regression test on i386/x86-64 backend is ok.

gcc/ChangeLog:
PR target/95524
* gcc/config/i386/i386-expand.c
(ix86_expand_vec_shift_qihi_constant): New function.
* gcc/config/i386/i386-protos.h: Declare.
* gcc/config/i386/sse.md: Optimize shift V*QImode by constant.

gcc/testsuite/ChangeLog:
* gcc.target/i386/avx2-shiftqihi-constant-1.c: New test.
* gcc.target/i386/avx2-shiftqihi-constant-2.c: Ditto.
* gcc.target/i386/avx512bw-shiftqihi-constant-1.c: Ditto.
* gcc.target/i386/avx512bw-shiftqihi-constant-2.c: Ditto.
* gcc.target/i386/sse2-shiftqihi-constant-1.c: Ditto.
* gcc.target/i386/sse2-shiftqihi-constant-2.c: Ditto.

-- 
BR,
Hongtao


0001-Optimize-V16QI-V32QI-V64QI-shift-by-constant.patch
Description: Binary data

Re: [PATCH] vectorizer: add _bb_vec_info::const_iterator

[Martin Liška]

On 6/12/20 5:49 PM, Richard Sandiford wrote:

Martin Liška  writes:

On 6/12/20 3:22 PM, Richard Sandiford wrote:

Martin Liška  writes:

diff --git a/gcc/tree-vect-patterns.c b/gcc/tree-vect-patterns.c
index 636ad59c001..eac372e6abc 100644
--- a/gcc/tree-vect-patterns.c
+++ b/gcc/tree-vect-patterns.c
@@ -5120,20 +5120,12 @@ vect_determine_precisions (vec_info *vinfo)
 else
   {
 bb_vec_info bb_vinfo = as_a  (vinfo);
-  gimple_stmt_iterator si = bb_vinfo->region_end;
-  gimple *stmt;
-  do
+  for (gimple *stmt: *bb_vinfo)
{
- if (!gsi_stmt (si))
-   si = gsi_last_bb (bb_vinfo->bb);
- else
-   gsi_prev ();
- stmt = gsi_stmt (si);
  stmt_vec_info stmt_info = vinfo->lookup_stmt (stmt);
  if (stmt_info && STMT_VINFO_VECTORIZABLE (stmt_info))
vect_determine_stmt_precisions (vinfo, stmt_info);
}
-  while (stmt != gsi_stmt (bb_vinfo->region_begin));
   }
   }


This loop wants a reverse iterator: it starts at the end and walks
backwards.  That's important because vect_determine_stmt_precisions
acts based on information recorded about later uses.


I thought that it may be a problematic change. Note that we don't a have
test coverage for the situation in testsuite (on x86_64). So I'm also
introducing reverse_iterator for this.


There's definitely coverage on aarch64.  Thought there would be on x86
too for the PAVG stuff, but obviously not.


diff --git a/gcc/tree-vect-stmts.c b/gcc/tree-vect-stmts.c
index cdd6f6c5e5d..766598862d4 100644
--- a/gcc/tree-vect-stmts.c
+++ b/gcc/tree-vect-stmts.c
@@ -1342,7 +1342,7 @@ vect_init_vector_1 (vec_info *vinfo, stmt_vec_info 
stmt_vinfo, gimple *new_stmt,
 else
  {
 bb_vec_info bb_vinfo = dyn_cast  (vinfo);
- gimple_stmt_iterator gsi_region_begin = bb_vinfo->region_begin;
+ gimple_stmt_iterator gsi_region_begin = bb_vinfo->begin ().gsi;
  gsi_insert_before (_region_begin, new_stmt, GSI_SAME_STMT);
  }
   }


Feels like this kind-of breaks the abstraction a bit.

Would it make sense instead to add the operators to gimple_stmt_iterator
itself and just make const_iterator a typedef of that?


Well, I'm planning to use the _bb_vec_info::const_iterator to jump in between
BBs, so it can't be a simple typedef.


But what happens to this code when that happens?  Is inserting at
begin().gsi meaningful?  I.e. is the stmt at *begin() guaranteed
to dominate all the SLP code even with multple BBs?

Personally I'd prefer either:

(a) const_iterator starts out as a typedef of gimple_stmt_iterator,
 and with your later changes becomes a derived class of it; or

(b) we just provide a region_begin() function that returns the gsi
 directly.


I decided for this function.




+  reverse_iterator rbegin () const
+{
+  reverse_iterator it = reverse_iterator (m_region_end);
+  if (*it == NULL)
+   return reverse_iterator (gsi_last_bb (m_region_end.bb));
+  else
+   return it;
+}


I think the else case should return “++it” instead, since AIUI
m_region_end is an exclusive rather than inclusive endpoint.


Ah, you are right.



Also, one minor formatting nit, sorry: the other functions instead
indent the “{” block by the same amount as the function prototype,
which seems more consistent with the usual out-of-class formatting.


Hope I fixed that.

About rbiener's comment, I wrapper the iterators with bb_vinfo::region_stmts..

Patch can bootstrap on x86_64-linux-gnu and survives regression tests.

Ready to be installed?
Thanks,
Martin



Thanks,
Richard



>From d96153a354c60e1c2c2fcd1da5714556fcd54a1a Mon Sep 17 00:00:00 2001
From: Martin Liska 
Date: Thu, 11 Jun 2020 13:25:40 +0200
Subject: [PATCH] vectorizer: add _bb_vec_info::region_stmts and iterators

gcc/ChangeLog:

	* tree-vectorizer.h: Add the new const_iterator and
	reverse_iterator and all related functions.
	Wrap m_region_begin and m_region_end in region_stmts.
	* tree-vect-patterns.c (vect_determine_precisions): Use the
	iterator.
	(vect_pattern_recog): Likewise.
	* tree-vect-slp.c (_bb_vec_info::_bb_vec_info): Likewise.
	(_bb_vec_info::~_bb_vec_info): Likewise.
	(vect_slp_check_for_constructors): Likewise.
	* tree-vect-stmts.c (vect_init_vector_1): Likewise.
---
 gcc/tree-vect-patterns.c | 16 ++--
 gcc/tree-vect-slp.c  | 33 ++-
 gcc/tree-vect-stmts.c|  3 +-
 gcc/tree-vectorizer.h| 86 ++--
 4 files changed, 101 insertions(+), 37 deletions(-)

diff --git a/gcc/tree-vect-patterns.c b/gcc/tree-vect-patterns.c
index 636ad59c001..d2d4ce1dc8e 100644
--- a/gcc/tree-vect-patterns.c
+++ b/gcc/tree-vect-patterns.c
@@ -5120,20 +5120,14 @@ vect_determine_precisions (vec_info *vinfo)
   else
 {
   bb_vec_info bb_vinfo = as_a  (vinfo);
-  gimple_stmt_iterator si = bb_vinfo->region_end;
-  gimple *stmt;
-  do
+  for ( 

Re: [committed] amdgcn: use unsigned extend for lshiftrt

[Andrew Stubbs]

On 15/05/2020 11:37, Andrew Stubbs wrote:
This patch fixes a bug in which 8 and 16-bit vector shifts used the 
wrong kind of extend, thus causing wrong results.  It was simply a 
thinko in the insn code, so easily fixed.


This is now back-ported to releases/gcc-10.

Andrew

Re: [PATCH PR94274] fold phi whose incoming args are defined from binary

[Richard Biener]

On Thu, 11 Jun 2020, Zhanghaijian (A) wrote:

> Hi,
> 
> This is a experimental fix for pr94274. For if/else structure, when the 
> expressions is binary operation and have a common subexpression, and the 
> opcode is the same, we can fold the merging phi node in 
> tree_ssa_phiopt_worker (ssa-phiopt). It can be optimized to do csel 
> first and then do binary operations. This can eliminate one or more 
> instructions. And this patch is effective for 500.perlbench_r in 
> spec2017. Bootstrap and tested on aarch64/x86_64 Linux platform. No new 
> regression witnessed.
> 
> Any suggestion?  

First of all I would not implement this as separate pass, we do
have precedence for this kind of transform in phiopt itself
(factor_out_conditional_conversion).  There's also abs_replacement
which eventually sinks a negation operation.

Note that the equivalency code matches roughly what we do in
the tail-merging optimization (tree-ssa-tail-merge.c).  I guess
if you'd cleverly re-order stmts and split blocks you could see
tail-merging doing the desired transform.

Your approach hard-codes binary operations but we have other classes
of operations that would benefit from the transform (including
calls for example).

Your approach is greedy, for a larger expression you rely on
intermediate transforms to be profitable, that is you won't
sink

 _1 = a_2(D) + b_3(D);
 _2 = a_2(D) - b_3(D);
 _3 = _1 * _2;

 .. = PHI <_3, ...>

because sinking _1 * _2 requires two PHIs but after sinking
a + b and a - b both are gone.  Note that the number of PHIs
does not directly translate to register pressure.  Note
other opportunities you leave on the plate are when the above
also has a second PHI like

 .. = PHI <_2, ...>

because then _2 does not have a single use but if we sink
the second PHI vanishes as well.

So I do not think the greedy approach is sound given you
talk about examples with more than one sunk statement.

There is already two copies of code comparing statements,
one in the above mentioned tail-merging pass and one in
ICF - ipa-icf-gimple.[ch] may even have a usable interface
to compare sequences of stmts for equality and if not
Martin may be of help here.

Thanks,
Richard.

Re: [PATCH] ipa: special pass-through op for Fortran strides

[Jan Hubicka]

> On Fri, Jun 12, 2020 at 11:28 PM Martin Jambor  wrote:
> >
> > Hi,
> >
> > when Fortran functions pass array descriptors they receive as a
> > parameter to another function, they actually rebuild it.  Thanks to
> > work done mainly by Feng, IPA-CP can already handle the cases when
> > they pass directly the values loaded from the original descriptor.
> > Unfortunately, perhaps the most important one, stride, is first
> > checked against zero and is replaced with one in that case:
> >
> >   _12 = *a_11(D).dim[0].stride;
> >   if (_12 != 0)
> > goto ; [50.00%]
> >   else
> > goto ; [50.00%]
> >
> >   
> > // empty BB
> >   
> >   # iftmp.22_9 = PHI <_12(2), 1(3)>
> >...
> >parm.6.dim[0].stride = iftmp.22_9;
> >...
> >__x_MOD_foo (, b_31(D));
> >
> > in the most important and hopefully common cases, the incoming value
> > is already 1 and we fail to propagate it.
> >
> > I would therefore like to propose the following way of encoding this
> > situation in pass-through jump functions using using ASSERTT_EXPR
> > operation code meaning that if the incoming value is the same as the
> > "operand" in the jump function, it is passed on, otherwise the result
> > is unknown.  This of course captures only the single (but most
> > important) case but is an improvement and does not need enlarging the
> > jump function structure and is simple to pattern match.  Encoding that
> > zero needs to be changed to one would need another field and matching
> > it would be slightly more complicated too.
> >
> > Bootstrapped and tested on x86_64-linux, LTO bootstrap is underway.  OK
> > if it passes?
> 
> Looks reasonable - I wonder if we somehow track enough info to
> infer the _12 != 0 check in IPA propagation?  So whether there's the
> possibility to not use "conditional 1" as I understand you do but
> "conditional *a_11(D).dim[0].stride"?  Because AFAICS you
> compare _12 against 1 in IPA propagation to enable the propagation,
> why not compare it against 0?  Or even allow all cases to be resolved
> if _12 is a constant?  That is, propagate a "_12 != 0 ? 12 : 1" jump
> function which you should be able to resolve in the exact same
> way via values_equal_for_ipa_cp_p?

I was wondering, since we can now represent more complex arithmetic
operations, if we can express param0 + (param0 != 0) using the jump
function w/o use of assert exprs?

In general assert exprs seems like good concept to represent conditional
jumps though.

Honza
> 
> Thanks,
> Richard.
> 
> > Thanks,
> >
> > Martin
> >
> >
> > 2020-06-12  Martin Jambor  
> >
> > * ipa-prop.h (ipa_pass_through_data): Expand comment describing
> > operation.
> > * ipa-prop.c (analyze_agg_content_value): Detect new special case 
> > and
> > encode it as ASSERT_EXPR.
> > * ipa-cp.c (values_equal_for_ipcp_p): Move before
> > ipa_get_jf_arith_result.
> > (ipa_get_jf_arith_result): Special case ASSERT_EXPR.
> >
> > testsuite/
> > * gfortran.dg/ipcp-array-2.f90: New test.
> > ---
> >  gcc/ipa-cp.c   |  48 ---
> >  gcc/ipa-prop.c | 148 ++---
> >  gcc/ipa-prop.h |  11 +-
> >  gcc/testsuite/gfortran.dg/ipcp-array-2.f90 |  45 +++
> >  4 files changed, 179 insertions(+), 73 deletions(-)
> >  create mode 100644 gcc/testsuite/gfortran.dg/ipcp-array-2.f90
> >
> > diff --git a/gcc/ipa-cp.c b/gcc/ipa-cp.c
> > index b0c8f405260..4a2714c634f 100644
> > --- a/gcc/ipa-cp.c
> > +++ b/gcc/ipa-cp.c
> > @@ -1290,6 +1290,26 @@ initialize_node_lattices (struct cgraph_node *node)
> >}
> >  }
> >
> > +/* Return true iff X and Y should be considered equal values by IPA-CP.  */
> > +
> > +static bool
> > +values_equal_for_ipcp_p (tree x, tree y)
> > +{
> > +  gcc_checking_assert (x != NULL_TREE && y != NULL_TREE);
> > +
> > +  if (x == y)
> > +return true;
> > +
> > +  if (TREE_CODE (x) == ADDR_EXPR
> > +  && TREE_CODE (y) == ADDR_EXPR
> > +  && TREE_CODE (TREE_OPERAND (x, 0)) == CONST_DECL
> > +  && TREE_CODE (TREE_OPERAND (y, 0)) == CONST_DECL)
> > +return operand_equal_p (DECL_INITIAL (TREE_OPERAND (x, 0)),
> > +   DECL_INITIAL (TREE_OPERAND (y, 0)), 0);
> > +  else
> > +return operand_equal_p (x, y, 0);
> > +}
> > +
> >  /* Return the result of a (possibly arithmetic) operation on the constant
> > value INPUT.  OPERAND is 2nd operand for binary operation.  RES_TYPE is
> > the type of the parameter to which the result is passed.  Return
> > @@ -1307,6 +1327,14 @@ ipa_get_jf_arith_result (enum tree_code opcode, tree 
> > input, tree operand,
> >if (!is_gimple_ip_invariant (input))
> >  return NULL_TREE;
> >
> > +  if (opcode == ASSERT_EXPR)
> > +{
> > +  if (values_equal_for_ipcp_p (input, operand))
> > +   return input;
> > +  else
> > +   return NULL_TREE;
> > +}
> > +
> >if (!res_type)
> >  {
> > 

RE: [PATCH] vect: Use LOOP_VINFO_DATAREFS and LOOP_VINFO_DDRS consistently

[Yangfei (Felix)]

Hi,

> -Original Message-
> From: Richard Biener [mailto:richard.guent...@gmail.com]
> Sent: Monday, June 15, 2020 5:12 PM
> To: Yangfei (Felix) 
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] vect: Use LOOP_VINFO_DATAREFS and
> LOOP_VINFO_DDRS consistently
> 
> >
> > Thanks for reviewing this.   Could you please help install it?
> 
> Pushed.  Please remember to verify the ChangeLog - I needed to replace
> leading 8 spaces with tabs.
 
Thanks for the effort. 
Looks like the issue was caused by copy-and-paste, will pay attention next 
time.  

Felix

Re: [stage1][PATCH] Lower VEC_COND_EXPR into internal functions.

[Martin Liška]

On 6/15/20 1:59 PM, Richard Biener wrote:

On Mon, Jun 15, 2020 at 1:19 PM Martin Liška  wrote:


On 6/15/20 9:14 AM, Richard Biener wrote:

On Fri, Jun 12, 2020 at 3:24 PM Martin Liška  wrote:


On 6/12/20 11:43 AM, Richard Biener wrote:

So ... how far are you with enforcing a split VEC_COND_EXPR?
Thus can we avoid the above completely (even as intermediate
state)?


Apparently, I'm quite close. Using the attached patch I see only 2 testsuite
failures:

FAIL: gcc.dg/tree-ssa/pr68714.c scan-tree-dump-times reassoc1 " <= " 1
FAIL: gcc.target/i386/pr78102.c scan-assembler-times pcmpeqq 3

The first one is about teaching reassoc about the SSA_NAMEs in VEC_COND_EXPR. I 
haven't
analyze the second failure.

I'm also not sure about the gimlification change, I see a superfluous 
assignments:
 vec_cond_cmp.5 = _1 == _2;
 vec_cond_cmp.6 = vec_cond_cmp.5;
 vec_cond_cmp.7 = vec_cond_cmp.6;
 _3 = VEC_COND_EXPR ;
?

So with the suggested patch, the EH should be gone as you suggested. Right?


Right, it should be on the comparison already from the start.

@@ -14221,9 +14221,13 @@ gimplify_expr (tree *expr_p, gimple_seq
*pre_p, gimple_seq *post_p,
  case VEC_COND_EXPR:
{
  enum gimplify_status r0, r1, r2;
-
  r0 = gimplify_expr (_OPERAND (*expr_p, 0), pre_p,
  post_p, is_gimple_condexpr, fb_rvalue);
+   tree xop0 = TREE_OPERAND (*expr_p, 0);
+   tmp = create_tmp_var_raw (TREE_TYPE (xop0), "vec_cond_cmp");
+   gimple_add_tmp_var (tmp);
+   gimplify_assign (tmp, xop0, pre_p);
+   TREE_OPERAND (*expr_p, 0) = tmp;
  r1 = gimplify_expr (_OPERAND (*expr_p, 1), pre_p,
  post_p, is_gimple_val, fb_rvalue);

all of VEC_COND_EXPR can now be a simple goto expr_3;


Works for me, thanks!



diff --git a/gcc/tree-ssa-forwprop.c b/gcc/tree-ssa-forwprop.c
index 494c9e9c20b..090fb52a2f1 100644
--- a/gcc/tree-ssa-forwprop.c
+++ b/gcc/tree-ssa-forwprop.c
@@ -3136,6 +3136,10 @@ pass_forwprop::execute (function *fun)
  if (code == COND_EXPR
  || code == VEC_COND_EXPR)
{
+   /* Do not propagate into VEC_COND_EXPRs.  */
+   if (code == VEC_COND_EXPR)
+ break;
+

err - remove the || code == VEC_COND_EXPR instead?


Yep.



@@ -2221,24 +2226,12 @@ expand_vector_operations (void)
   {
 gimple_stmt_iterator gsi;
 basic_block bb;
-  bool cfg_changed = false;

 FOR_EACH_BB_FN (bb, cfun)
-{
-  for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next ())
-   {
- expand_vector_operations_1 ();
- /* ???  If we do not cleanup EH then we will ICE in
-verification.  But in reality we have created wrong-code
-as we did not properly transition EH info and edges to
-the piecewise computations.  */
- if (maybe_clean_eh_stmt (gsi_stmt (gsi))
- && gimple_purge_dead_eh_edges (bb))
-   cfg_changed = true;
-   }
-}

I'm not sure about this.  Consider the C++ testcase where
the ?: is replaced by a division.  If veclower needs to replace
that with four scalrar division statements then the above
still applies - veclower does not correctly duplicate EH info
and EH edges to the individual divisions (and we do not know
which component might trap).

So please leave the above in.  You can try if using integer
division makes it break and add such a testcase if there's
no coverage for this in the testsuite.


I'm leaving that above. Can you please explain how can a division test-case
be created?


typedef long v2di __attribute__((vector_size(16)));

v2di foo (v2di a, v2di b)
{
   try
   {
 v2di res = a / b;
 return res;
 }
 catch (...)
 {
 return (v2di){};
 }
}

with -fnon-call-exceptions I see in t.ii.090t.ehdisp (correctly):

;;   basic block 2, loop depth 0
;;pred:   ENTRY
   [LP 1] _6 = a_4(D) / b_5(D);
;;succ:   5
;;3

while after t.ii.226t.veclower we have

;;   basic block 2, loop depth 0
;;pred:   ENTRY
   _13 = BIT_FIELD_REF ;
   _14 = BIT_FIELD_REF ;
   _15 = _13 / _14;
   _16 = BIT_FIELD_REF ;
   _17 = BIT_FIELD_REF ;
   _18 = _16 / _17;
   _6 = {_15, _18};
   res_7 = _6;
   _8 = res_7;
;;succ:   3

and all EH is gone and we'd ICE if you remove the above hunk.  Hopefully.


Yes, it ICEs then:


./xg++ -B. ~/Programming/testcases/ice.c -c -fnon-call-exceptions -O3
/home/marxin/Programming/testcases/ice.c: In function ‘v2di foo(v2di, v2di)’:
/home/marxin/Programming/testcases/ice.c:3:6: error: statement marked for 
throw, but doesn’t
3 | v2di foo (v2di a, v2di b)
  |  ^~~
_6 = {_12, _15};
during GIMPLE pass: veclower2
/home/marxin/Programming/testcases/ice.c:3:6: internal compiler error: 
verify_gimple failed
0x10e308a verify_gimple_in_cfg(function*, bool)

Re: [stage1][PATCH] Lower VEC_COND_EXPR into internal functions.

[Richard Biener via Gcc-patches]

On Mon, Jun 15, 2020 at 1:19 PM Martin Liška  wrote:
>
> On 6/15/20 9:14 AM, Richard Biener wrote:
> > On Fri, Jun 12, 2020 at 3:24 PM Martin Liška  wrote:
> >>
> >> On 6/12/20 11:43 AM, Richard Biener wrote:
> >>> So ... how far are you with enforcing a split VEC_COND_EXPR?
> >>> Thus can we avoid the above completely (even as intermediate
> >>> state)?
> >>
> >> Apparently, I'm quite close. Using the attached patch I see only 2 
> >> testsuite
> >> failures:
> >>
> >> FAIL: gcc.dg/tree-ssa/pr68714.c scan-tree-dump-times reassoc1 " <= " 1
> >> FAIL: gcc.target/i386/pr78102.c scan-assembler-times pcmpeqq 3
> >>
> >> The first one is about teaching reassoc about the SSA_NAMEs in 
> >> VEC_COND_EXPR. I haven't
> >> analyze the second failure.
> >>
> >> I'm also not sure about the gimlification change, I see a superfluous 
> >> assignments:
> >> vec_cond_cmp.5 = _1 == _2;
> >> vec_cond_cmp.6 = vec_cond_cmp.5;
> >> vec_cond_cmp.7 = vec_cond_cmp.6;
> >> _3 = VEC_COND_EXPR  >> }, { 0, 0, 0, 0, 0, 0, 0, 0 }>;
> >> ?
> >>
> >> So with the suggested patch, the EH should be gone as you suggested. Right?
> >
> > Right, it should be on the comparison already from the start.
> >
> > @@ -14221,9 +14221,13 @@ gimplify_expr (tree *expr_p, gimple_seq
> > *pre_p, gimple_seq *post_p,
> >  case VEC_COND_EXPR:
> >{
> >  enum gimplify_status r0, r1, r2;
> > -
> >  r0 = gimplify_expr (_OPERAND (*expr_p, 0), pre_p,
> >  post_p, is_gimple_condexpr, fb_rvalue);
> > +   tree xop0 = TREE_OPERAND (*expr_p, 0);
> > +   tmp = create_tmp_var_raw (TREE_TYPE (xop0), "vec_cond_cmp");
> > +   gimple_add_tmp_var (tmp);
> > +   gimplify_assign (tmp, xop0, pre_p);
> > +   TREE_OPERAND (*expr_p, 0) = tmp;
> >  r1 = gimplify_expr (_OPERAND (*expr_p, 1), pre_p,
> >  post_p, is_gimple_val, fb_rvalue);
> >
> > all of VEC_COND_EXPR can now be a simple goto expr_3;
>
> Works for me, thanks!
>
> >
> > diff --git a/gcc/tree-ssa-forwprop.c b/gcc/tree-ssa-forwprop.c
> > index 494c9e9c20b..090fb52a2f1 100644
> > --- a/gcc/tree-ssa-forwprop.c
> > +++ b/gcc/tree-ssa-forwprop.c
> > @@ -3136,6 +3136,10 @@ pass_forwprop::execute (function *fun)
> >  if (code == COND_EXPR
> >  || code == VEC_COND_EXPR)
> >{
> > +   /* Do not propagate into VEC_COND_EXPRs.  */
> > +   if (code == VEC_COND_EXPR)
> > + break;
> > +
> >
> > err - remove the || code == VEC_COND_EXPR instead?
>
> Yep.
>
> >
> > @@ -2221,24 +2226,12 @@ expand_vector_operations (void)
> >   {
> > gimple_stmt_iterator gsi;
> > basic_block bb;
> > -  bool cfg_changed = false;
> >
> > FOR_EACH_BB_FN (bb, cfun)
> > -{
> > -  for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next ())
> > -   {
> > - expand_vector_operations_1 ();
> > - /* ???  If we do not cleanup EH then we will ICE in
> > -verification.  But in reality we have created wrong-code
> > -as we did not properly transition EH info and edges to
> > -the piecewise computations.  */
> > - if (maybe_clean_eh_stmt (gsi_stmt (gsi))
> > - && gimple_purge_dead_eh_edges (bb))
> > -   cfg_changed = true;
> > -   }
> > -}
> >
> > I'm not sure about this.  Consider the C++ testcase where
> > the ?: is replaced by a division.  If veclower needs to replace
> > that with four scalrar division statements then the above
> > still applies - veclower does not correctly duplicate EH info
> > and EH edges to the individual divisions (and we do not know
> > which component might trap).
> >
> > So please leave the above in.  You can try if using integer
> > division makes it break and add such a testcase if there's
> > no coverage for this in the testsuite.
>
> I'm leaving that above. Can you please explain how can a division test-case
> be created?

typedef long v2di __attribute__((vector_size(16)));

v2di foo (v2di a, v2di b)
{
  try
  {
v2di res = a / b;
return res;
}
catch (...)
{
return (v2di){};
}
}

with -fnon-call-exceptions I see in t.ii.090t.ehdisp (correctly):

;;   basic block 2, loop depth 0
;;pred:   ENTRY
  [LP 1] _6 = a_4(D) / b_5(D);
;;succ:   5
;;3

while after t.ii.226t.veclower we have

;;   basic block 2, loop depth 0
;;pred:   ENTRY
  _13 = BIT_FIELD_REF ;
  _14 = BIT_FIELD_REF ;
  _15 = _13 / _14;
  _16 = BIT_FIELD_REF ;
  _17 = BIT_FIELD_REF ;
  _18 = _16 / _17;
  _6 = {_15, _18};
  res_7 = _6;
  _8 = res_7;
;;succ:   3

and all EH is gone and we'd ICE if you remove the above hunk.  Hopefully.

We still generate wrong-code obviously as we'd need to duplicate the
EH info on each component division (and split blocks and generate
extra EH edges).  That's a 

Re: [PATCH PR95638]Record/restore postorder, rather than update it

[Richard Biener via Gcc-patches]

On Mon, Jun 15, 2020 at 12:04 PM bin.cheng via Gcc-patches
 wrote:
>
> Hi,
> This simple patch fixes wrong code issue as reported.  I tried to update 
> postorder information after
> the second call to graphds_scc with alias dependence edges skipped.  This 
> wasn't working, and I
> realize it's hard to do.  This patch simply records postorder information 
> before the call and restores
> after.  It also fixes memory leak.
>
> Bootstrap and test on x86_64. Comments?

I don't see any obvious more clever thing to do thus OK.

Thanks,
Richard.

> Thanks,
> bin
>
> 2020-06-15  Bin Cheng  
>
> gcc/
> PR tree-optimization/95638
> * tree-loop-distribution.c (pg_edge_callback_data): New field.
> (loop_distribution::break_alias_scc_partitions): Record and 
> restore
> postorder information.  Fix memory leak.
>
> gcc/testsuite/
> PR tree-optimization/95638
> * g++.dg/tree-ssa/pr95638.C: New test.

Re: [RFC][vect] BB SLP reduction prototype

[Richard Biener]

On Tue, 9 Jun 2020, Andre Vieira (lists) wrote:

> Hi,
> 
> So this is my rework of the code you sent me, I have not included the
> 'permute' code you included as I can't figure out what it is meant to be
> doing. Maybe something to look at later.
> 
> I have also included three tests that show it working for some simple cases
> and even a nested one.
> 
> Unfortunately it will not handle other simple cases where reassoc doesn't put
> the reduction in the form of :
> sum0 = a + b;
> sum1 = c + sum0;
> ...
> 
> For instance a testcase I have been looking at is:
> unsigned int u32_single_abs_sum (unsigned int * a, unsigned int * b)
> {
>   unsigned int sub0 = a[0] - b[0];
>   unsigned int sub1 = a[1] - b[1];
>   unsigned int sub2 = a[2] - b[2];
>   unsigned int sub3 = a[3] - b[3];
>   unsigned int sum = sub0 + sub1;
>   sum += sub2;
>   sum += sub3;
>   return sum;
> }
> 
> Unfortunately, the code that reaches slp will look like:
>   _1 = *a_10(D);
>   _2 = *b_11(D);
>   _3 = MEM[(unsigned int *)a_10(D) + 4B];
>   _4 = MEM[(unsigned int *)b_11(D) + 4B];
>   _5 = MEM[(unsigned int *)a_10(D) + 8B];
>   _6 = MEM[(unsigned int *)b_11(D) + 8B];
>   _7 = MEM[(unsigned int *)a_10(D) + 12B];
>   _8 = MEM[(unsigned int *)b_11(D) + 12B];
>   _28 = _1 - _2;
>   _29 = _3 + _28;
>   _30 = _29 - _4;
>   _31 = _5 + _30;
>   _32 = _31 - _6;
>   _33 = _7 + _32;
>   sum_18 = _33 - _8;
>   return sum_18;
> 
> Which doesn't have the format expected as I described above... I am wondering
> how to teach it to support this. Maybe starting with your suggestion of making
> plus_expr and minus_expr have the same hash, so it groups all these statements
> together might be a start, but you'd still need to 'rebalance' the tree
> somehow I need to give this a bit more thought but I wanted to share what
> I have so far.

Yeah, I guess at the point you have the ordered_set of reduction
components you want to do a DFS-like walk (but starting where?)
figuring the "interesting" SSA edges and see which component you
can actually reach (and from which "final" component).  I guess
the final reduction component should be always the latest stmt
(even if you associate as (a[0] + a[1] + a[2]) - (b[0] + b[1] + b[2])).

I've attached the current version of the permutation code, originally
that wasn't the interesting pice but the reorg in SLP discovery was.
But now seeing your vectorize_slp_instance_root_stmt hunk and reflecting
what I intend to do with the permutation node we may want to represent
the reduction as a distinct SLP node reducing from N to 1 lane.
I want to use the permute node in the patch as a way to
do concat / split and lane select as well.  A reduction node would
differ in that it has a reduction operation and that it would reduce
all input lanes (but for _Complex we'd want 4 to 2 lane reductions
as well I guess).  Still the "root stmt" idea wasn't so much to
gobble actual code generation there but to record the output SSA
edges of the SLP graph entry.

In vect_analyze_slp where you set up things for SLP discovery
you shouldn't need to build a REDUC_GROUP but instead run
SLP discovery on the set of components only and if successful
build the reduction SLP node manually.  IIRC the patch I sent
you last time (with the permutation code) did arrange
vect_analyze_slp to do that for stores for example.  That
way SLP discovery should be unchanged and most of the reduction
validation should happen when analyzing the reduction operation.

For initial discovery in vect_slp_check_for_reductions we probably
want to factor out some common meta-data about (SLP) reductions
so we can share validation and maybe parts of the discovery code
with the loop aware variant [I'd like to get rid of the
REDUC_GROUP chaining for example].

> The code is severely lacking in comments for now btw...

Which is why I refrain from commenting on the actual patch details ;)

As a note for the casual reader - the vect_slp_check_for_reductions
was supposed to be a "cheap" O(n log n) way to discover general 
basic-block vectorization opportunities without "obvious" root
stmts to start greedy searching (currently roots include store groups
and vector typed CTORs).  While Andre only looks for reductions
in those candidates I originally invented the multi-level hashing scheme
to discover vectorization opportunities where both the ultimate vector
input and the output get built/decomposed from/to components.
It's actually simpler to leverage just that and not try to get
the reduction part working I guess ;)  For the reduction example
above it would vectorize the subtraction of a[] and b[] and then
extract all lanes from the result, doing the reduction operation
in scalar code.

Richard.From e8421124df9acda96c9c40853ad7e7d0ce97c115 Mon Sep 17 00:00:00 2001
From: Richard Biener 
Date: Wed, 25 Mar 2020 14:42:49 +0100
Subject: [PATCH] remove SLP_TREE_TWO_OPERATORS

This removes the SLP_TREE_TWO_OPERATORS hack in favor of having
explicit SLP nodes for both computations and the 

[PATCH PING] tree-ssa-threadbackward.c (profitable_jump_thread_path): Do not allow __builtin_constant_p.

[Ilya Leoshkevich via Gcc-patches]

On Thu, 2020-06-04 at 02:37 +0200, Ilya Leoshkevich wrote:
> Bootstrapped and regtested on x86_64-redhat-linux, ppc64le-redhat-
> linux
> and s390x-redhat-linux.
> 
> 
> Linux Kernel (specifically, drivers/leds/trigger/ledtrig-cpu.c) build
> with GCC 10 fails on s390 with "impossible constraint".
> 
> The problem is that jump threading makes __builtin_constant_p lie
> when
> an expression in question appears to be a constant on a threading
> path.
> 
> Fix by disallowing __builtin_constant_p on threading paths.
> 
> gcc/ChangeLog:
> 
> 2020-06-03  Ilya Leoshkevich  
> 
>   * tree-ssa-threadbackward.c
> (thread_jumps::profitable_jump_thread_path):
>   Do not allow __builtin_constant_p on a threading path.
> 
> gcc/testsuite/ChangeLog:
> 
> 2020-06-03  Ilya Leoshkevich  
> 
>   * gcc.target/s390/builtin-constant-p-threading.c: New test.
> ---
>  .../s390/builtin-constant-p-threading.c   | 46
> +++
>  gcc/tree-ssa-threadbackward.c |  7 ++-
>  2 files changed, 52 insertions(+), 1 deletion(-)
>  create mode 100644 gcc/testsuite/gcc.target/s390/builtin-constant-p-
> threading.c
> 
> diff --git a/gcc/testsuite/gcc.target/s390/builtin-constant-p-
> threading.c b/gcc/testsuite/gcc.target/s390/builtin-constant-p-
> threading.c
> new file mode 100644
> index 000..5f0acdce0b0
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/s390/builtin-constant-p-threading.c
> @@ -0,0 +1,46 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -march=z196 -mzarch" } */
> +
> +typedef struct
> +{
> +  int counter;
> +} atomic_t;
> +
> +static inline __attribute__ ((__gnu_inline__)) int
> +__atomic_add (int val, int *ptr)
> +{
> +  int old;
> +  asm volatile("laa %[old],%[val],%[ptr]\n"
> +: [old] "=d" (old), [ptr] "+Q"(*ptr)
> +: [val] "d" (val)
> +: "cc", "memory");
> +  return old;
> +}
> +
> +static inline __attribute__ ((__gnu_inline__)) void
> +__atomic_add_const (int val, int *ptr)
> +{
> +  asm volatile("asi %[ptr],%[val]\n"
> +: [ptr] "+Q" (*ptr)
> +: [val] "i" (val)
> +: "cc", "memory");
> +}
> +
> +static inline __attribute__ ((__gnu_inline__)) void
> +atomic_add (int i, atomic_t *v)
> +{
> +  if (__builtin_constant_p (i) && (i > -129) && (i < 128))
> +{
> +  __atomic_add_const (i, >counter);
> +  return;
> +}
> +  __atomic_add (i, >counter);
> +}
> +
> +static atomic_t num_active_cpus = { (0) };
> +
> +void
> +ledtrig_cpu (_Bool is_active)
> +{
> +  atomic_add (is_active ? 1 : -1, _active_cpus);
> +}
> diff --git a/gcc/tree-ssa-threadbackward.c b/gcc/tree-ssa-
> threadbackward.c
> index 327628f1662..668932f6d85 100644
> --- a/gcc/tree-ssa-threadbackward.c
> +++ b/gcc/tree-ssa-threadbackward.c
> @@ -259,8 +259,13 @@ thread_jumps::profitable_jump_thread_path
> (basic_block bbi, tree name,
>  !gsi_end_p (gsi);
>  gsi_next_nondebug ())
>   {
> +   /* Do not allow OpenACC loop markers and
> __builtin_constant_p on
> +  a threading path.  The latter is disallowed, because
> an
> +  expression being constant on a threading path does not
> mean it
> +  can be considered constant in the entire function.  */
> gimple *stmt = gsi_stmt (gsi);
> -   if (gimple_call_internal_p (stmt, IFN_UNIQUE))
> +   if (gimple_call_internal_p (stmt, IFN_UNIQUE)
> +   || gimple_call_builtin_p (stmt, BUILT_IN_CONSTANT_P))
>   {
> m_path.pop ();
> return NULL;

Gentle ping.

Re: [stage1][PATCH] Lower VEC_COND_EXPR into internal functions.

[Martin Liška]

On 6/15/20 9:14 AM, Richard Biener wrote:

On Fri, Jun 12, 2020 at 3:24 PM Martin Liška  wrote:


On 6/12/20 11:43 AM, Richard Biener wrote:

So ... how far are you with enforcing a split VEC_COND_EXPR?
Thus can we avoid the above completely (even as intermediate
state)?


Apparently, I'm quite close. Using the attached patch I see only 2 testsuite
failures:

FAIL: gcc.dg/tree-ssa/pr68714.c scan-tree-dump-times reassoc1 " <= " 1
FAIL: gcc.target/i386/pr78102.c scan-assembler-times pcmpeqq 3

The first one is about teaching reassoc about the SSA_NAMEs in VEC_COND_EXPR. I 
haven't
analyze the second failure.

I'm also not sure about the gimlification change, I see a superfluous 
assignments:
vec_cond_cmp.5 = _1 == _2;
vec_cond_cmp.6 = vec_cond_cmp.5;
vec_cond_cmp.7 = vec_cond_cmp.6;
_3 = VEC_COND_EXPR ;
?

So with the suggested patch, the EH should be gone as you suggested. Right?


Right, it should be on the comparison already from the start.

@@ -14221,9 +14221,13 @@ gimplify_expr (tree *expr_p, gimple_seq
*pre_p, gimple_seq *post_p,
 case VEC_COND_EXPR:
   {
 enum gimplify_status r0, r1, r2;
-
 r0 = gimplify_expr (_OPERAND (*expr_p, 0), pre_p,
 post_p, is_gimple_condexpr, fb_rvalue);
+   tree xop0 = TREE_OPERAND (*expr_p, 0);
+   tmp = create_tmp_var_raw (TREE_TYPE (xop0), "vec_cond_cmp");
+   gimple_add_tmp_var (tmp);
+   gimplify_assign (tmp, xop0, pre_p);
+   TREE_OPERAND (*expr_p, 0) = tmp;
 r1 = gimplify_expr (_OPERAND (*expr_p, 1), pre_p,
 post_p, is_gimple_val, fb_rvalue);

all of VEC_COND_EXPR can now be a simple goto expr_3;


Works for me, thanks!



diff --git a/gcc/tree-ssa-forwprop.c b/gcc/tree-ssa-forwprop.c
index 494c9e9c20b..090fb52a2f1 100644
--- a/gcc/tree-ssa-forwprop.c
+++ b/gcc/tree-ssa-forwprop.c
@@ -3136,6 +3136,10 @@ pass_forwprop::execute (function *fun)
 if (code == COND_EXPR
 || code == VEC_COND_EXPR)
   {
+   /* Do not propagate into VEC_COND_EXPRs.  */
+   if (code == VEC_COND_EXPR)
+ break;
+

err - remove the || code == VEC_COND_EXPR instead?


Yep.



@@ -2221,24 +2226,12 @@ expand_vector_operations (void)
  {
gimple_stmt_iterator gsi;
basic_block bb;
-  bool cfg_changed = false;

FOR_EACH_BB_FN (bb, cfun)
-{
-  for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next ())
-   {
- expand_vector_operations_1 ();
- /* ???  If we do not cleanup EH then we will ICE in
-verification.  But in reality we have created wrong-code
-as we did not properly transition EH info and edges to
-the piecewise computations.  */
- if (maybe_clean_eh_stmt (gsi_stmt (gsi))
- && gimple_purge_dead_eh_edges (bb))
-   cfg_changed = true;
-   }
-}

I'm not sure about this.  Consider the C++ testcase where
the ?: is replaced by a division.  If veclower needs to replace
that with four scalrar division statements then the above
still applies - veclower does not correctly duplicate EH info
and EH edges to the individual divisions (and we do not know
which component might trap).

So please leave the above in.  You can try if using integer
division makes it break and add such a testcase if there's
no coverage for this in the testsuite.


I'm leaving that above. Can you please explain how can a division test-case
be created?



What's missing from the patch is adjusting
verify_gimple_assign_ternary from

   if (((rhs_code == VEC_COND_EXPR || rhs_code == COND_EXPR)
? !is_gimple_condexpr (rhs1) : !is_gimple_val (rhs1))
   || !is_gimple_val (rhs2)
   || !is_gimple_val (rhs3))
 {
   error ("invalid operands in ternary operation");
   return true;

to the same with the rhs_code == VEC_COND_EXPR case removed.


Hmm. I'm not sure I've got this comment. Why do we want to change it
and is it done wright in the patch?



You'll likely figure the vectorizer still creates some VEC_COND_EXPRs
with embedded comparisons.


I've fixed 2 failing test-cases I mentioned in the previous email.

Martin



Thanks,
Richard.



Martin


>From 32a2fb841cfd15d17527e44c4dc119e25d643cf1 Mon Sep 17 00:00:00 2001
From: Martin Liska 
Date: Mon, 9 Mar 2020 13:23:03 +0100
Subject: [PATCH] Lower VEC_COND_EXPR into internal functions.

gcc/ChangeLog:

	* Makefile.in: Add new file.
	* expr.c (expand_expr_real_2): Add gcc_unreachable as we should
	not meet this condition.
	(do_store_flag):
	* gimplify.c (gimplify_expr): Gimplify first argument of
	VEC_COND_EXPR to be a SSA name.
	* internal-fn.c (vec_cond_mask_direct): New.
	(vec_cond_direct): Likewise.
	(vec_condu_direct): Likewise.
	(vec_condeq_direct): Likewise.
	(expand_vect_cond_optab_fn):  New.
	(expand_vec_cond_optab_fn): Likewise.
	

[COMMITTED] gcc: xtensa: make TARGET_HAVE_TLS definition static

[Max Filippov via Gcc-patches]

Remove TARGET_THREADPTR reference from TARGET_HAVE_TLS to avoid
static data initialization dependency on xtensa core configuration.

Tested with xtensa-linux-uclibc, no new regression failures.
Committed to master.

2020-06-15  Max Filippov  
gcc/
* config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
TARGET_THREADPTR reference.
(xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
targetm.have_tls instead of TARGET_HAVE_TLS.
(xtensa_option_override): Set targetm.have_tls to false in
configurations without THREADPTR.
---
 gcc/config/xtensa/xtensa.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index e370aa4623c1..be1eb21a0b60 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -275,7 +275,7 @@ static rtx xtensa_delegitimize_address (rtx);
 #define TARGET_SECONDARY_RELOAD xtensa_secondary_reload
 
 #undef TARGET_HAVE_TLS
-#define TARGET_HAVE_TLS (TARGET_THREADPTR && HAVE_AS_TLS)
+#define TARGET_HAVE_TLS HAVE_AS_TLS
 
 #undef TARGET_CANNOT_FORCE_CONST_MEM
 #define TARGET_CANNOT_FORCE_CONST_MEM xtensa_cannot_force_const_mem
@@ -602,7 +602,7 @@ constantpool_mem_p (rtx op)
 static bool
 xtensa_tls_symbol_p (rtx x)
 {
-  if (! TARGET_HAVE_TLS)
+  if (! targetm.have_tls)
 return false;
 
   return GET_CODE (x) == SYMBOL_REF && SYMBOL_REF_TLS_MODEL (x) != 0;
@@ -2025,7 +2025,7 @@ xtensa_mode_dependent_address_p (const_rtx addr,
 bool
 xtensa_tls_referenced_p (rtx x)
 {
-  if (! TARGET_HAVE_TLS)
+  if (! targetm.have_tls)
 return false;
 
   subrtx_iterator::array_type array;
@@ -,6 +,9 @@ xtensa_option_override (void)
   if (xtensa_windowed_abi == -1)
 xtensa_windowed_abi = TARGET_WINDOWED_ABI_DEFAULT;
 
+  if (! TARGET_THREADPTR)
+targetm.have_tls = false;
+
   /* Use CONST16 in the absence of L32R.
  Set it in the TARGET_OPTION_OVERRIDE to avoid dependency on xtensa
  configuration in the xtensa-common.c  */
-- 
2.20.1

[PATCH 1/2] gcc: xtensa: make register elimination data static

[Max Filippov via Gcc-patches]

Remove ABI reference from the ELIMINABLE_REGS to avoid static data
initialization dependency on xtensa core configuration.

2020-06-15  Max Filippov  
gcc/
* config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
(TARGET_CAN_ELIMINATE): New macro.
* config/xtensa/xtensa.h
(XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
(XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
(HARD_FRAME_POINTER_REGNUM): Define using
XTENSA_*_HARD_FRAME_POINTER_REGNUM.
(ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
---
 gcc/config/xtensa/xtensa.c | 16 
 gcc/config/xtensa/xtensa.h | 26 ++
 2 files changed, 34 insertions(+), 8 deletions(-)

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 550c9cdfd892..e3afb70cdf04 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -183,6 +183,8 @@ static unsigned int xtensa_hard_regno_nregs (unsigned int, 
machine_mode);
 static bool xtensa_hard_regno_mode_ok (unsigned int, machine_mode);
 static bool xtensa_modes_tieable_p (machine_mode, machine_mode);
 static HOST_WIDE_INT xtensa_constant_alignment (const_tree, HOST_WIDE_INT);
+static bool xtensa_can_eliminate (const int from ATTRIBUTE_UNUSED,
+ const int to);
 static HOST_WIDE_INT xtensa_starting_frame_offset (void);
 static unsigned HOST_WIDE_INT xtensa_asan_shadow_offset (void);
 
@@ -326,6 +328,9 @@ static rtx xtensa_delegitimize_address (rtx);
 #undef TARGET_CONSTANT_ALIGNMENT
 #define TARGET_CONSTANT_ALIGNMENT xtensa_constant_alignment
 
+#undef TARGET_CAN_ELIMINATE
+#define TARGET_CAN_ELIMINATE xtensa_can_eliminate
+
 #undef TARGET_STARTING_FRAME_OFFSET
 #define TARGET_STARTING_FRAME_OFFSET xtensa_starting_frame_offset
 
@@ -4411,6 +4416,17 @@ xtensa_constant_alignment (const_tree exp, HOST_WIDE_INT 
align)
   return align;
 }
 
+static bool
+xtensa_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
+{
+  gcc_assert (from == ARG_POINTER_REGNUM || from == FRAME_POINTER_REGNUM);
+
+  /* If we need a frame pointer, ARG_POINTER_REGNUM and FRAME_POINTER_REGNUM
+ can only eliminate to HARD_FRAME_POINTER_REGNUM.  */
+  return to == HARD_FRAME_POINTER_REGNUM
+|| (!frame_pointer_needed && to == STACK_POINTER_REGNUM);
+}
+
 /* Implement TARGET_STARTING_FRAME_OFFSET.  */
 
 static HOST_WIDE_INT
diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 8e1bcf823e46..fb5aee870dd5 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -314,8 +314,13 @@ extern int leaf_function;
 #define STACK_POINTER_REGNUM (GP_REG_FIRST + 1)
 
 /* Base register for access to local variables of the function.  */
-#define HARD_FRAME_POINTER_REGNUM (GP_REG_FIRST + \
-  (TARGET_WINDOWED_ABI ? 7 : 15))
+#define HARD_FRAME_POINTER_REGNUM \
+  (TARGET_WINDOWED_ABI \
+   ? XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM \
+   : XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM)
+
+#define XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM (GP_REG_FIRST + 7)
+#define XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM (GP_REG_FIRST + 15)
 
 /* The register number of the frame pointer register, which is used to
access automatic variables in the stack frame.  For Xtensa, this
@@ -434,12 +439,17 @@ enum reg_class
  || (flag_sanitize & SANITIZE_ADDRESS) != 0)
 
 /* The ARG_POINTER and FRAME_POINTER are not real Xtensa registers, so
-   they are eliminated to either the stack pointer or hard frame pointer.  */
-#define ELIMINABLE_REGS
\
-{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},  \
- { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
- { FRAME_POINTER_REGNUM,   STACK_POINTER_REGNUM},  \
- { FRAME_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM}}
+   they are eliminated to either the stack pointer or hard frame pointer.
+   Since hard frame pointer is different register in windowed and call0
+   ABIs list them both and only allow real HARD_FRAME_POINTER_REGNUM in
+   TARGET_CAN_ELIMINATE.  */
+#define ELIMINABLE_REGS
\
+{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},  \
+ { ARG_POINTER_REGNUM, XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM}, \
+ { ARG_POINTER_REGNUM, XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM},\
+ { FRAME_POINTER_REGNUM,   STACK_POINTER_REGNUM},  \
+ { FRAME_POINTER_REGNUM,   XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM}, \
+ { FRAME_POINTER_REGNUM,   XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM}}
 
 /* Specify the initial difference between the specified pair of registers.  */
 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, 

[PATCH 2/2] gcc: xtensa: add -mabi option for call0/windowed ABI

[Max Filippov via Gcc-patches]

2020-06-15  Max Filippov  
gcc/
* config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
assembler/linker.
* config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
* config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
* config/xtensa/xtensa.c (xtensa_option_override): Initialize
xtensa_windowed_abi if needed.
* config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
macro.
(TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
* config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
option variable.
(mabi=call0, mabi=windowed): New options.
* doc/invoke.texi: Document new -mabi= Xtensa-specific options.

gcc/testsuite/
* gcc.target/xtensa/mabi-call0.c: New test.
* gcc.target/xtensa/mabi-windowed.c: New test.

libgcc/
* configure: Regenerate.
* configure.ac: Use AC_COMPILE_IFELSE instead of manual
preprocessor invocation to check for __XTENSA_CALL0_ABI__.
---
 gcc/config/xtensa/elf.h   |  8 --
 gcc/config/xtensa/linux.h |  8 --
 gcc/config/xtensa/uclinux.h   |  9 +--
 gcc/config/xtensa/xtensa.c|  3 +++
 gcc/config/xtensa/xtensa.h|  3 ++-
 gcc/config/xtensa/xtensa.opt  | 11 
 gcc/doc/invoke.texi   | 26 ++-
 gcc/testsuite/gcc.target/xtensa/mabi-call0.c  | 13 ++
 .../gcc.target/xtensa/mabi-windowed.c | 13 ++
 libgcc/configure  | 24 -
 libgcc/configure.ac   | 14 +-
 11 files changed, 103 insertions(+), 29 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/xtensa/mabi-call0.c
 create mode 100644 gcc/testsuite/gcc.target/xtensa/mabi-windowed.c

diff --git a/gcc/config/xtensa/elf.h b/gcc/config/xtensa/elf.h
index 6fd589fed32b..48e2590e9b69 100644
--- a/gcc/config/xtensa/elf.h
+++ b/gcc/config/xtensa/elf.h
@@ -47,7 +47,9 @@ along with GCC; see the file COPYING3.  If not see
   %{mlongcalls:--longcalls} \
   %{mno-longcalls:--no-longcalls} \
   %{mauto-litpools:--auto-litpools} \
-  %{mno-auto-litpools:--no-auto-litpools}"
+  %{mno-auto-litpools:--no-auto-litpools} \
+  %{mabi=windowed:--abi-windowed} \
+  %{mabi=call0:--abi-call0}"
 
 #undef LIB_SPEC
 #define LIB_SPEC "-lc -lsim -lc -lhandlers-sim -lhal"
@@ -65,7 +67,9 @@ along with GCC; see the file COPYING3.  If not see
   %{!shared: \
 %{!static: \
   %{rdynamic:-export-dynamic} \
-%{static:-static}}}"
+%{static:-static}}} \
+  %{mabi=windowed:--abi-windowed} \
+  %{mabi=call0:--abi-call0}"
 
 #undef LOCAL_LABEL_PREFIX
 #define LOCAL_LABEL_PREFIX "."
diff --git a/gcc/config/xtensa/linux.h b/gcc/config/xtensa/linux.h
index 62a33a9bc101..bd20595c3243 100644
--- a/gcc/config/xtensa/linux.h
+++ b/gcc/config/xtensa/linux.h
@@ -44,7 +44,9 @@ along with GCC; see the file COPYING3.  If not see
   %{mlongcalls:--longcalls} \
   %{mno-longcalls:--no-longcalls} \
   %{mauto-litpools:--auto-litpools} \
-  %{mno-auto-litpools:--no-auto-litpools}"
+  %{mno-auto-litpools:--no-auto-litpools} \
+  %{mabi=windowed:--abi-windowed} \
+  %{mabi=call0:--abi-call0}"
 
 #define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
 
@@ -55,7 +57,9 @@ along with GCC; see the file COPYING3.  If not see
 %{!static: \
   %{rdynamic:-export-dynamic} \
   -dynamic-linker " GNU_USER_DYNAMIC_LINKER "} \
-%{static:-static}}"
+%{static:-static}} \
+  %{mabi=windowed:--abi-windowed} \
+  %{mabi=call0:--abi-call0}"
 
 #undef LOCAL_LABEL_PREFIX
 #define LOCAL_LABEL_PREFIX "."
diff --git a/gcc/config/xtensa/uclinux.h b/gcc/config/xtensa/uclinux.h
index 64ba26f39352..374d2947a0dd 100644
--- a/gcc/config/xtensa/uclinux.h
+++ b/gcc/config/xtensa/uclinux.h
@@ -51,10 +51,15 @@ along with GCC; see the file COPYING3.  If not see
   %{mlongcalls:--longcalls} \
   %{mno-longcalls:--no-longcalls} \
   %{mauto-litpools:--auto-litpools} \
-  %{mno-auto-litpools:--no-auto-litpools}"
+  %{mno-auto-litpools:--no-auto-litpools} \
+  %{mabi=windowed:--abi-windowed} \
+  %{mabi=call0:--abi-call0}"
 
 #undef LINK_SPEC
-#define LINK_SPEC "%{!no-elf2flt:%{!elf2flt*:-elf2flt}}"
+#define LINK_SPEC \
+ "%{!no-elf2flt:%{!elf2flt*:-elf2flt}} \
+  %{mabi=windowed:--abi-windowed} \
+  %{mabi=call0:--abi-call0}"
 
 #undef LOCAL_LABEL_PREFIX
 #define LOCAL_LABEL_PREFIX "."
diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index e3afb70cdf04..e370aa4623c1 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -2219,6 +2219,9 @@ xtensa_option_override (void)
   int regno;
   machine_mode mode;
 
+  if (xtensa_windowed_abi == -1)
+xtensa_windowed_abi = TARGET_WINDOWED_ABI_DEFAULT;
+
   /* Use CONST16 in the absence of L32R.
  Set it in the TARGET_OPTION_OVERRIDE to avoid dependency on xtensa
  configuration in the 

[COMMITTED 0/2] gcc: xtensa: implement -mabi option

[Max Filippov via Gcc-patches]

Hello,

this series implements -mabi option support for xtensa target allowing
to choose between windowed and call0 code generation.

Tested with xtensa-linux-uclibc, both windowed and call0, no new
regression failures. Committed to master.

Max Filippov (2):
  gcc: xtensa: make register elimination data static
  gcc: xtensa: add -mabi option for call0/windowed ABI

 gcc/config/xtensa/elf.h   |  8 +++--
 gcc/config/xtensa/linux.h |  8 +++--
 gcc/config/xtensa/uclinux.h   |  9 --
 gcc/config/xtensa/xtensa.c| 19 
 gcc/config/xtensa/xtensa.h| 29 +--
 gcc/config/xtensa/xtensa.opt  | 11 +++
 gcc/doc/invoke.texi   | 26 -
 gcc/testsuite/gcc.target/xtensa/mabi-call0.c  | 13 +
 .../gcc.target/xtensa/mabi-windowed.c | 13 +
 libgcc/configure  | 24 +++
 libgcc/configure.ac   | 14 -
 11 files changed, 137 insertions(+), 37 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/xtensa/mabi-call0.c
 create mode 100644 gcc/testsuite/gcc.target/xtensa/mabi-windowed.c

-- 
2.20.1

[PATCH PR95638]Record/restore postorder, rather than update it

[bin.cheng via Gcc-patches]

Hi,
This simple patch fixes wrong code issue as reported.  I tried to update 
postorder information after
the second call to graphds_scc with alias dependence edges skipped.  This 
wasn't working, and I
realize it's hard to do.  This patch simply records postorder information 
before the call and restores
after.  It also fixes memory leak.

Bootstrap and test on x86_64. Comments?

Thanks,
bin

2020-06-15  Bin Cheng  

gcc/
PR tree-optimization/95638
* tree-loop-distribution.c (pg_edge_callback_data): New field.
(loop_distribution::break_alias_scc_partitions): Record and restore
postorder information.  Fix memory leak.

gcc/testsuite/
PR tree-optimization/95638
* g++.dg/tree-ssa/pr95638.C: New test.

pr95638.txt
Description: Binary data

Re: [wwwdocs] Make plain text requirement more descriptive

[Jakub Jelinek via Gcc-patches]

On Mon, Jun 15, 2020 at 10:17:50AM +0100, Jonathan Wakely via Gcc-patches wrote:
> I noticed a missing space between a comma and ellipsis, but expanding
> the ellipsis seems more helpful anyway.
> 
> OK for wwwdocs?

Ok.

> commit d06fcccabee91cfd17d01b379ea5400fd787b6f3
> Author: Jonathan Wakely 
> Date:   Mon Jun 15 10:17:03 2020 +0100
> 
> Make plain text requirement more descriptive
> 
> diff --git a/htdocs/lists.html b/htdocs/lists.html
> index ea37aedc..b0c2248d 100644
> --- a/htdocs/lists.html
> +++ b/htdocs/lists.html
> @@ -166,7 +166,8 @@ this size, you should compress any attachments before 
> sending it to the list.
>  When posting messages, please select an appropriate list for the message
>  and try to avoid cross posting to several lists.
>  
> -Please send plain text (as opposed to HTML, RTF,...).
> +Please send plain text
> +(as opposed to HTML, RTF, or other types with fancy formatting).
>  
>  Do not include or reference confidentiality
>  notices, like:


Jakub

[wwwdocs] [committed] Use past tense for descriptions of historical mailing lists

[Jonathan Wakely via Gcc-patches]

Committed as obvious.


commit 94e51dd51b4cc699592cc40bf78687920a9a2f4a
Author: Jonathan Wakely 
Date:   Mon Jun 15 10:20:58 2020 +0100

Use past tense for descriptions of historical mailing lists

diff --git a/htdocs/lists.html b/htdocs/lists.html
index ea37aedc..df45edd7 100644
--- a/htdocs/lists.html
+++ b/htdocs/lists.html
@@ -120,8 +120,8 @@ before subscribing and posting to 
these lists.
 
 
   https://gcc.gnu.org/ml/gcc-prs/;>gcc-prs
-  was a read-only, relatively high volume list which tracks problem reports
-  as they are entered into our database.
+  was a read-only, relatively high volume list which tracked problem reports
+  as they were entered into our database.
 
   https://gcc.gnu.org/ml/java/;>java
   was the main discussion and development list for the Java language
@@ -129,27 +129,27 @@ before subscribing and posting 
to these lists.
 
   https://gcc.gnu.org/ml/java-announce/;>java-announce
   was a low-volume, moderated, announcements-only list.  Only announcements
-  related to the Java language front end or runtime library are posted
+  related to the Java language front end or runtime library were posted
   here.
 
   java-cvs
-  tracked checkins to the Java language compiler and runtime.  It is
-  not archived.  Messages sent here are also sent to
+  tracked checkins to the Java language compiler and runtime.  It was
+  not archived.  Messages sent here were also sent to
   gcc-cvs.
 
   https://gcc.gnu.org/ml/java-patches/;>java-patches
   was a list for submission and discussion of patches to libgcj, the
-  Java runtime.  Patches to GCJ, the Java language front end, should
-  go to both this list and gcc-patches.
+  Java runtime.  Patches to GCJ, the Java language front end, should have
+  gone to both this list and gcc-patches.
 
   https://gcc.gnu.org/ml/java-prs/;>java-prs
-  was a read-only list which tracks Java-related problem reports as
-  they are entered into our database.  Messages sent here are
+  was a read-only list which tracked Java-related problem reports as
+  they were entered into our database.  Messages sent here were
   also sent to gcc-prs.
 
   https://gcc.gnu.org/ml/libstdc++-prs/;>libstdc++-prs
   was formerly used by the libstdc++-v3 problem report database.
-  libstdc++-v3 now uses the main GCC database and the gcc-prs list.
+  libstdc++-v3 now uses the main GCC database and the gcc-bugs 
list.
 
 
 To post a message, just send mail to 
listname@gcc.gnu.org.

[wwwdocs] Make plain text requirement more descriptive

[Jonathan Wakely via Gcc-patches]

I noticed a missing space between a comma and ellipsis, but expanding
the ellipsis seems more helpful anyway.

OK for wwwdocs?


commit d06fcccabee91cfd17d01b379ea5400fd787b6f3
Author: Jonathan Wakely 
Date:   Mon Jun 15 10:17:03 2020 +0100

Make plain text requirement more descriptive

diff --git a/htdocs/lists.html b/htdocs/lists.html
index ea37aedc..b0c2248d 100644
--- a/htdocs/lists.html
+++ b/htdocs/lists.html
@@ -166,7 +166,8 @@ this size, you should compress any attachments before 
sending it to the list.
 When posting messages, please select an appropriate list for the message
 and try to avoid cross posting to several lists.
 
-Please send plain text (as opposed to HTML, RTF,...).
+Please send plain text
+(as opposed to HTML, RTF, or other types with fancy formatting).
 
 Do not include or reference confidentiality
 notices, like:

Re: [patch] Fix ICE in verify_sra_access_forest

[Richard Biener via Gcc-patches]

On Mon, Jun 15, 2020 at 10:23 AM Eric Botcazou  wrote:
>
> > The patch probably fixes only part of the issues with SRA and rev-storage.
>
> Well, this issue (coming from a bypass in SRA) is the first issue uncovered
> with rev-storage in SRA for years.
>
> > I see in build_ref_for_model:
> >
> >   /* The flag will be set on the record type.  */
> >   REF_REVERSE_STORAGE_ORDER (t) = 0;
> >
> > for the case there was a COMPONENT_REF, so this is for the case where
> > the model did not have that?
>
> No, it's the other way around: model->reverse is true so the flag will be set
> on the MEM out of build_ref_for_offset.  But the type of the MEM is aggregate,
> which means that the flag may not be set on the MEM; instead it should be set
> on the type itself, as indicated in the comment.

Ah OK.

> > Based on your assertion above can we derive TYPE_REVERSE_STORAGE_ORDER from
> > the passed in racc and thus set the flag correctly in build_ref_for_model
> > instead?
>
> Well, the code is a bypass that builds an access on the LHS from a model of
> the RHS(!), so things need to be patched up and I'd rather not introduce bugs
> elsewhere if possible...

Hmm, true.  So the patch is OK then.

Thanks,
Richard.

> --
> Eric Botcazou

Re: [PATCH] libgomp: added partial omp-tools.h for OMPD.

[Jakub Jelinek via Gcc-patches]

On Sat, Jun 13, 2020 at 10:29:27AM -0400, y2s1982 via Gcc-patches wrote:
> This patch adds a partial omp-tools.h from OpenMP which describes function
> prototypes and data types used for OMPD.
> 
> All feedback has been addressed.
> 
> 2020-06-13  Tony Sim  
> 
> libgomp/ChangeLog:
> 
>   * Makefile.am (nodist_libsubinclude_HEADERS): Add omp-tools.h.
>   * Makefile.in: Regenerate.
>   * omp-tools.h: New file.

LGTM.

Jakub

Re: [wwwdocs] Add note about keeping replies on the mailing list

[Jonathan Wakely via Gcc-patches]

On 15/06/20 09:39 +0100, Jonathan Wakely wrote:

I'd like to add this to our mailing list policies.

I can't count the number of times I've tried to help somebody on the
gcc-help list and they assume that means I want to be their personal
support person in a private email conversation.

This is unlikely to change anything, because nobody will read it, but
at least I can point to something.


Martin L. suggested mentioning "Reply All" so here's a revised patch.

OK for wwwdocs?


commit 10931e863014551b5eef03bb9fce705dc2e99fbb
Author: Jonathan Wakely 
Date:   Mon Jun 15 10:12:02 2020 +0100

Add note about keeping replies on the mailing list

diff --git a/htdocs/lists.html b/htdocs/lists.html
index ea37aedc..2a93293a 100644
--- a/htdocs/lists.html
+++ b/htdocs/lists.html
@@ -164,7 +164,11 @@ this size, you should compress any attachments before sending it to the list.
 We have a strong policy of not editing the web archives.
 
 When posting messages, please select an appropriate list for the message
-and try to avoid cross posting to several lists.
+and try to avoid cross posting to several lists.
+If somebody replies to your message, do not reply to that person only.
+Keep the conversation on the mailing list unless requested otherwise,
+e.g. by using "Reply All".
+
 
 Please send plain text (as opposed to HTML, RTF,...).
 

Re: [PATCH] vect: Use LOOP_VINFO_DATAREFS and LOOP_VINFO_DDRS consistently

[Richard Biener via Gcc-patches]

On Mon, Jun 15, 2020 at 9:34 AM Yangfei (Felix)  wrote:
>
> Hi Richard,
>
> > -Original Message-
> > From: Richard Biener [mailto:richard.guent...@gmail.com]
> > Sent: Monday, June 15, 2020 3:25 PM
> > To: Yangfei (Felix) 
> > Cc: gcc-patches@gcc.gnu.org
> > Subject: Re: [PATCH] vect: Use LOOP_VINFO_DATAREFS and
> > LOOP_VINFO_DDRS consistently
> >
> > On Sat, Jun 13, 2020 at 4:46 AM Yangfei (Felix) 
> > wrote:
> > >
> > > Hi,
> > >
> > > This is minor code refactorings in tree-vect-data-refs.c and 
> > > tree-vect-loop.c.
> > > Use LOOP_VINFO_DATAREFS and LOOP_VINFO_DDRS when possible and
> > rename
> > > several parameters to make code more consistent.
> > >
> > > Bootstrapped and tested on aarch64-linux-gnu.  OK?
> >
> > OK.
>
> Thanks for reviewing this.   Could you please help install it?

Pushed.  Please remember to verify the ChangeLog - I needed to
replace leading 8 spaces with tabs.

Richard.

> Regards,
> Felix

[PATCH][GCC] arm: Fix MVE scalar shift intrinsics code-gen.

[Srinath Parvathaneni]

Hello,

This patch modifies the MVE scalar shift RTL patterns. The current patterns
have wrong constraints and predicates due to which the values returned from
MVE scalar shift instructions are overwritten in the code-gen.

example:
$ cat x.c
#include "arm_mve.h"
int32_t  foo(int64_t acc, int shift)
{
  return sqrshrl_sat48 (acc, shift);
}

Code-gen before applying this patch:
$ arm-none-eabi-gcc -march=armv8.1-m.main+mve -mfloat-abi=hard -O2 -S
$  cat x.s
foo:
   push{r4, r5}
   sqrshrl r0, r1, #48, r2   > (a)
   mov r0, r4  > (b)
   pop {r4, r5}
   bx  lr

Code-gen after applying this patch:
foo:
   sqrshrl r0, r1, #48, r2
   bx  lr

In the current compiler the return value (r0) from sqrshrl (a) is getting
overwritten by the mov statement (b).
This patch fixes above issue.

Please refer to M-profile Vector Extension (MVE) intrinsics [1]for more details.
[1] 
https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics

Regression tested on arm-none-eabi and found no regressions.

Ok for master and gcc-10 branch?

Thanks,
Srinath.

gcc/ChangeLog:

2020-06-12  Srinath Parvathaneni  

* config/arm/mve.md (mve_uqrshll_sat_di): Correct the predicate
and constraint of all the operands.
(mve_sqrshrl_sat_di): Likewise.
(mve_uqrshl_si): Likewise.
(mve_sqrshr_si): Likewise.
(mve_uqshll_di): Likewise.
(mve_urshrl_di): Likewise.
(mve_uqshl_si): Likewise.
(mve_urshr_si): Likewise.
(mve_sqshl_si): Likewise.
(mve_srshr_si): Likewise.
(mve_srshrl_di): Likewise.
(mve_sqshll_di): Likewise.
* config/arm/predicates.md (arm_low_register_operand): Define.

gcc/testsuite/ChangeLog:

2020-06-12  Srinath Parvathaneni  

* gcc.target/arm/mve/intrinsics/mve_scalar_shifts1.c: New test.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts2.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts3.c: Likewise.
* gcc.target/arm/mve/intrinsics/mve_scalar_shifts4.c: Likewise.


diff
Description: diff

[wwwdocs] Add note about keeping replies on the mailing list

[Jonathan Wakely via Gcc-patches]

I'd like to add this to our mailing list policies.

I can't count the number of times I've tried to help somebody on the
gcc-help list and they assume that means I want to be their personal
support person in a private email conversation.

This is unlikely to change anything, because nobody will read it, but
at least I can point to something.

OK for wwwdocs?


commit eda8b12b3d9915c9d0d86fbae49085241299b4d2
Author: Jonathan Wakely 
Date:   Mon Jun 15 09:36:00 2020 +0100

Add note about keeping replies on the mailing list

diff --git a/htdocs/lists.html b/htdocs/lists.html
index ea37aedc..4251b2c0 100644
--- a/htdocs/lists.html
+++ b/htdocs/lists.html
@@ -164,7 +164,10 @@ this size, you should compress any attachments before 
sending it to the list.
 We have a strong policy of not editing the web archives.
 
 When posting messages, please select an appropriate list for the message
-and try to avoid cross posting to several lists.
+and try to avoid cross posting to several lists.
+If somebody replies to your message, do not reply to that person only;
+keep the conversation on the mailing list unless requested otherwise.
+
 
 Please send plain text (as opposed to HTML, RTF,...).
 

Re: [patch] Fix ICE in verify_sra_access_forest

[Eric Botcazou]

> The patch probably fixes only part of the issues with SRA and rev-storage.

Well, this issue (coming from a bypass in SRA) is the first issue uncovered 
with rev-storage in SRA for years.

> I see in build_ref_for_model:
> 
>   /* The flag will be set on the record type.  */
>   REF_REVERSE_STORAGE_ORDER (t) = 0;
> 
> for the case there was a COMPONENT_REF, so this is for the case where
> the model did not have that?

No, it's the other way around: model->reverse is true so the flag will be set 
on the MEM out of build_ref_for_offset.  But the type of the MEM is aggregate, 
which means that the flag may not be set on the MEM; instead it should be set 
on the type itself, as indicated in the comment.

> Based on your assertion above can we derive TYPE_REVERSE_STORAGE_ORDER from
> the passed in racc and thus set the flag correctly in build_ref_for_model
> instead?

Well, the code is a bypass that builds an access on the LHS from a model of 
the RHS(!), so things need to be patched up and I'd rather not introduce bugs 
elsewhere if possible...

-- 
Eric Botcazou

[Ada] Put_Image improvements for strings

[Pierre-Marie de Rodat]

Use string literal syntax for private types whose full type is string,
as was already done for visible string types. Double the double-quote
characters in the literal.  Disable Put_Image for unchecked unions, so
they'll just print the type name.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Bob Duff  

gcc/ada/

* exp_attr.adb (Put_Image): Use underlying type for strings.
Remove unchecked union processing.
* exp_put_image.adb (Tagged_Put_Image_Enabled): Use -gnatd_z to
enable default Put_Image for tagged types.  This allows testing
that feature.
(Build_String_Put_Image_Call): Set Conversion_OK flag.
(Make_Component_List_Attributes): Remove unchecked union
processing.
(Enable_Put_Image): Disable for unchecked unions.  Enable for
nonscalar types (which were mistakenly disabled in earlier
changes).
* debug.adb: Document -gnatd_z switch.
* libgnat/s-putima.adb (Put_Image_String, Put_Image_Wide_String,
Put_Image_Wide_Wide_String): Double double-quote characters.
Forget about special handling of control characters for now --
that's rare enough to not be a priority, and it's not clear what
the right thing to do is anyway.
* namet.adb: Minor: Improve debugger-friendliness.
* sinfo.ads: Minor: Add "???" comment.--- gcc/ada/debug.adb
+++ gcc/ada/debug.adb
@@ -170,7 +170,7 @@ package body Debug is
--  d_w
--  d_x
--  d_y
-   --  d_z
+   --  d_z  Enable Put_Image on tagged types
 
--  d_A  Stop generation of ALI file
--  d_B
@@ -993,6 +993,9 @@ package body Debug is
--   a call to routine Ada.Synchronous_Task_Control.Suspend_Until_True
--   or Ada.Synchronous_Barriers.Wait_For_Release.
 
+   --  d_z  Enable the default Put_Image on tagged types that are not
+   --   predefined.
+
--  d_A  Do not generate ALI files by setting Opt.Disable_ALI_File.
 
--  d_F  The compiler encodes the full path from an invocation construct to

--- gcc/ada/exp_attr.adb
+++ gcc/ada/exp_attr.adb
@@ -5505,20 +5505,7 @@ package body Exp_Attr is
Analyze (N);
return;
 
---  ???It would be nice to call Build_String_Put_Image_Call below
---  if U_Type is a standard string type, but it currently generates
---  something like:
---
--- Put_Image_String (Sink, String (X));
---
---  so if X is of a private type whose full type is "new String",
---  then the type conversion is illegal. To fix that, we would need
---  to do unchecked conversions of access values, taking care to
---  deal with thin and fat pointers properly. For now, we just fall
---  back to Build_Array_Put_Image_Procedure in these cases, so the
---  following says "Root_Type (Entity (Pref))" instead of "U_Type".
-
-elsif Is_Standard_String_Type (Root_Type (Entity (Pref))) then
+elsif Is_Standard_String_Type (U_Type) then
Rewrite (N, Build_String_Put_Image_Call (N));
Analyze (N);
return;
@@ -5558,21 +5545,6 @@ package body Exp_Attr is
 
 else
pragma Assert (Is_Record_Type (U_Type));
-
-   --  Program_Error is raised when calling the default
-   --  implementation of the Put_Image attribute of an
-   --  Unchecked_Union type. ???It would be friendlier to print a
-   --  canned string. See handling of unchecked unions in
-   --  exp_put_image.adb (which is not reachable).
-
-   if Is_Unchecked_Union (Base_Type (U_Type)) then
-  Rewrite (N,
-Make_Raise_Program_Error (Loc,
-  Reason => PE_Unchecked_Union_Restriction));
-  Set_Etype (N, Standard_Void_Type);
-  return;
-   end if;
-
Build_Record_Put_Image_Procedure
  (Loc, Full_Base (U_Type), Decl, Pname);
Insert_Action (N, Decl);

--- gcc/ada/exp_put_image.adb
+++ gcc/ada/exp_put_image.adb
@@ -27,6 +27,7 @@ with Atree;use Atree;
 with Einfo;use Einfo;
 with Exp_Tss;  use Exp_Tss;
 with Exp_Util;
+with Debug;use Debug;
 with Lib;  use Lib;
 with Namet;use Namet;
 with Nlists;   use Nlists;
@@ -44,7 +45,7 @@ with Uintp;use Uintp;
 
 package body Exp_Put_Image is
 
-   Tagged_Put_Image_Enabled : constant Boolean := False;
+   Tagged_Put_Image_Enabled : Boolean renames Debug_Flag_Underscore_Z;
--  ???Set True to enable Put_Image for at least some tagged types
 
---
@@ -410,18 +411,21 @@ package body Exp_Put_Image is
 
   --  Convert parameter to the required type (i.e. the type of the
   --  corresponding parameter), and call the appropriate routine.
+  --  We set the 

[Ada] Rewrite Sem_Eval.Predicates_Match predicate

[Pierre-Marie de Rodat]

This reimplements the predicate more efficiently and more strictly.
It is used to implement the part of the 4.9.1 (2/3) subclause that
pertains to predicates:

"A subtype statically matches another subtype of the same type if they
have statically matching constraints, all predicate specifications that
apply to them come from the same declarations, ..."

In particular it now takes into account all types of predicates.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Eric Botcazou  

gcc/ada/

* sem_eval.ads (Predicates_Match): Fix description.
* sem_eval.adb (Predicates_Match): Rewrite.--- gcc/ada/sem_eval.adb
+++ gcc/ada/sem_eval.adb
@@ -5621,40 +5621,42 @@ package body Sem_Eval is
--
 
function Predicates_Match (T1, T2 : Entity_Id) return Boolean is
-  Pred1 : Node_Id;
-  Pred2 : Node_Id;
+
+  function Have_Same_Rep_Item (Nam : Name_Id) return Boolean;
+  --  Return True if T1 and T2 have the same rep item for Nam
+
+  
+  -- Have_Same_Rep_Item --
+  
+
+  function Have_Same_Rep_Item (Nam : Name_Id) return Boolean is
+  begin
+ return Get_Rep_Item (T1, Nam) = Get_Rep_Item (T2, Nam);
+  end Have_Same_Rep_Item;
+
+   --  Start of processing for Predicates_Match
 
begin
   if Ada_Version < Ada_2012 then
  return True;
 
- --  Both types must have predicates or lack them
+  --  If T2 has no predicates, match if and only if T1 has none
+
+  elsif not Has_Predicates (T2) then
+ return not Has_Predicates (T1);
+
+  --  T2 has predicates, no match if T1 has none
 
-  elsif Has_Predicates (T1) /= Has_Predicates (T2) then
+  elsif not Has_Predicates (T1) then
  return False;
 
- --  Check matching predicates
+  --  Both T2 and T1 have predicates, check that they all come
+  --  from the same declarations.
 
   else
- Pred1 :=
-   Get_Rep_Item
- (T1, Name_Static_Predicate, Check_Parents => False);
- Pred2 :=
-   Get_Rep_Item
- (T2, Name_Static_Predicate, Check_Parents => False);
-
- --  Subtypes statically match if the predicate comes from the
- --  same declaration, which can only happen if one is a subtype
- --  of the other and has no explicit predicate.
-
- --  Suppress warnings on order of actuals, which is otherwise
- --  triggered by one of the two calls below.
-
- pragma Warnings (Off);
- return Pred1 = Pred2
-   or else (No (Pred1) and then Is_Subtype_Of (T1, T2))
-   or else (No (Pred2) and then Is_Subtype_Of (T2, T1));
- pragma Warnings (On);
+ return Have_Same_Rep_Item (Name_Static_Predicate)
+   and then Have_Same_Rep_Item (Name_Dynamic_Predicate)
+   and then Have_Same_Rep_Item (Name_Predicate);
   end if;
end Predicates_Match;
 

--- gcc/ada/sem_eval.ads
+++ gcc/ada/sem_eval.ads
@@ -482,10 +482,10 @@ package Sem_Eval is
--  then it returns False.
 
function Predicates_Match (T1, T2 : Entity_Id) return Boolean;
-   --  In Ada 2012, subtypes statically match if their static predicates
-   --  match as well. This function performs the required check that
-   --  predicates match. Separated out from Subtypes_Statically_Match so
-   --  that it can be used in specializing error messages.
+   --  In Ada 2012, subtypes statically match if their predicates match as
+   --  as well. This function performs the required check that predicates
+   --  match. Separated out from Subtypes_Statically_Match so that it can
+   --  be used in specializing error messages.
 
function Subtypes_Statically_Compatible
  (T1  : Entity_Id;

[Ada] Clean up error handling of 'Image

[Pierre-Marie de Rodat]

...in preparation for enabling 'Image for all types in Ada 2020, and
having it call 'Put_Image for nonscalar types, and for types with
user-defined 'Put_Image.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Bob Duff  

gcc/ada/

* sem_attr.adb (Check_Image_Type): New procedure for checking
the type, depending on language version. Disable the Ada 2020
support until the corresponding expander work is done.
(Analyze_Image_Attribute): Call Check_Image_Type.  Rearrange the
code to be simplier and more logical.  When P_Type is modified,
modify P_Base_Type accordingly.
* sem_util.adb (Is_Object_Image): Do not return False if the
prefix is a type. X'Image should be considered an image of an
object iff X is an object (albeit illegal pre-2020 if
nonscalar).--- gcc/ada/sem_attr.adb
+++ gcc/ada/sem_attr.adb
@@ -1414,56 +1414,65 @@ package body Sem_Attr is
   -
 
   procedure Analyze_Image_Attribute (Str_Typ : Entity_Id) is
+ procedure Check_Image_Type (Image_Type : Entity_Id);
+ --  Check that Image_Type is legal as the type of a prefix of 'Image.
+ --  Legality depends on the Ada language version.
+
+ procedure Check_Image_Type (Image_Type : Entity_Id) is
+ begin
+if False -- ???Disable 2020 feature until expander work is done
+  and then Ada_Version >= Ada_2020
+then
+   null; -- all types are OK
+elsif not Is_Scalar_Type (Image_Type) then
+   if Ada_Version >= Ada_2012 then
+  Error_Attr_P
+("prefix of % attribute must be a scalar type or a scalar "
+   & "object name");
+   else
+  Error_Attr_P ("prefix of % attribute must be a scalar type");
+   end if;
+end if;
+ end Check_Image_Type;
+
+  --  Start of processing for Analyze_Image_Attribute
+
   begin
  --  AI12-0124: The ARG has adopted the GNAT semantics of 'Img for
  --  scalar types, so that the prefix can be an object, a named value,
  --  or a type. If the prefix is an object, there is no argument.
 
- if Attr_Id = Attribute_Img
-   or else (Ada_Version >= Ada_2012 and then Is_Object_Image (P))
- then
+ if Is_Object_Image (P) then
 Check_E0;
 Set_Etype (N, Str_Typ);
+Check_Image_Type (Etype (P));
 
-if Attr_Id = Attribute_Img and then not Is_Object_Image (P) then
-   Error_Attr_P
- ("prefix of % attribute must be a scalar object name");
+if Attr_Id /= Attribute_Img and then Ada_Version < Ada_2012 then
+   Error_Attr_P ("prefix of % attribute must be a scalar type");
 end if;
  else
 Check_E1;
 Set_Etype (N, Str_Typ);
 
---  Check that the prefix type is scalar - much in the same way as
---  Check_Scalar_Type but with custom error messages to denote the
---  variants of 'Image attributes.
+--  ???It's not clear why 'Img should behave any differently than
+--  'Image.
 
-if Is_Entity_Name (P)
-  and then Is_Type (Entity (P))
-  and then Ekind (Entity (P)) = E_Incomplete_Type
+if Attr_Id = Attribute_Img then
+   Error_Attr_P
+ ("prefix of % attribute must be a scalar object name");
+end if;
+
+pragma Assert (Is_Entity_Name (P) and then Is_Type (Entity (P)));
+
+if Ekind (Entity (P)) = E_Incomplete_Type
   and then Present (Full_View (Entity (P)))
 then
P_Type := Full_View (Entity (P));
+   P_Base_Type := Base_Type (P_Type);
Set_Entity (P, P_Type);
 end if;
 
-if not Is_Entity_Name (P)
-  or else not Is_Type (Entity (P))
-  or else not Is_Scalar_Type (P_Type)
-then
-   if Ada_Version >= Ada_2012 then
-  Error_Attr_P
-("prefix of % attribute must be a scalar type or a scalar "
- & "object name");
-   else
-  Error_Attr_P ("prefix of % attribute must be a scalar type");
-   end if;
-
-elsif Is_Protected_Self_Reference (P) then
-   Error_Attr_P
- ("prefix of % attribute denotes current instance "
-  & "(RM 9.4(21/2))");
-end if;
-
+Check_Image_Type (P_Type);
 Resolve (E1, P_Base_Type);
 Validate_Non_Static_Attribute_Function_Call;
  end if;

--- gcc/ada/sem_util.adb
+++ gcc/ada/sem_util.adb
@@ -16797,13 +16797,6 @@ package body Sem_Util is
 
function Is_Object_Image (Prefix : Node_Id) 

[Ada] Passing actual parameter values to out formals when Default_Value is set

[Pierre-Marie de Rodat]

When the type of a scalar formal parameter of mode out has the
Default_Value aspect, the actual type is also required to have that
aspect (required now by AI12-0074, RM 6.4.1(5.3/4)), and the value of
the actual must be passed on calls (since the actual is guaranteed to be
initialized and deinitialization must be prevented in case the formal is
never assigned to). This was already working for simple cases, but was
not supported properly when the actual is a view conversion. The
compiler now initializes the temp created for such out parameters from
the result of converting the view conversion's operand to the formal's
base type.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Gary Dismukes  

gcc/ada/

* exp_ch6.adb (Add_Call_By_Copy_Code): In the case of a view
conversion passed to a scalar out-mode parameter where the
formal has Default_Value set, declare the copy temp with the
base type of the formal's subtype and initialize the copy temp
with the actual's value.--- gcc/ada/exp_ch6.adb
+++ gcc/ada/exp_ch6.adb
@@ -1446,6 +1446,25 @@ package body Exp_Ch6 is
  then
 Init := New_Occurrence_Of (Var, Loc);
 
+ --  View conversions when the formal type has the Default_Value aspect
+ --  require passing in the value of the conversion's operand. The type
+ --  of that operand also has Default_Value, as required by AI12-0074
+ --  (RM 6.4.1(5.3/4)). The subtype denoted by the subtype_indication
+ --  is changed to the base type of the formal subtype, to ensure that
+ --  the actual's value can be assigned without a constraint check
+ --  (note that no check is done on passing to an out parameter). Also
+ --  note that the two types necessarily share the same ancestor type,
+ --  as required by 6.4.1(5.2/4), so underlying base types will match.
+
+ elsif Ekind (Formal) = E_Out_Parameter
+   and then Is_Scalar_Type (Etype (F_Typ))
+   and then Nkind (Actual) = N_Type_Conversion
+   and then Present (Default_Aspect_Value (Etype (F_Typ)))
+ then
+Indic := New_Occurrence_Of (Base_Type (F_Typ), Loc);
+Init  := Convert_To
+   (Base_Type (F_Typ), New_Occurrence_Of (Var, Loc));
+
  else
 Init := Empty;
  end if;

[Ada] Allow uninitialized values on Big_Positive/Natural

[Pierre-Marie de Rodat]

The current Dynamic_Predicate prevents declaring a variable without also
initializing it at the same time.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Arnaud Charlet  

gcc/ada/

* libgnat/a-nbnbin.ads (Big_Positive, Big_Natural): Fix
predicate.--- gcc/ada/libgnat/a-nbnbin.ads
+++ gcc/ada/libgnat/a-nbnbin.ads
@@ -46,11 +46,15 @@ is
function To_Big_Integer (Arg : Integer) return Big_Integer;
 
subtype Big_Positive is Big_Integer
- with Dynamic_Predicate => Big_Positive > To_Big_Integer (0),
+ with Dynamic_Predicate =>
+(if Is_Valid (Big_Positive)
+ then Big_Positive > To_Big_Integer (0)),
   Predicate_Failure => (raise Constraint_Error);
 
subtype Big_Natural is Big_Integer
- with Dynamic_Predicate => Big_Natural >= To_Big_Integer (0),
+ with Dynamic_Predicate =>
+(if Is_Valid (Big_Natural)
+ then Big_Natural >= To_Big_Integer (0)),
   Predicate_Failure => (raise Constraint_Error);
 
function In_Range (Arg, Low, High : Big_Integer) return Boolean is

[Ada] Crash in tagged type constructor with task components

[Pierre-Marie de Rodat]

The compiler blows up processing a constructor function that returns a
limited private tagged type that implements an interface type whose full
view has a task type component.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Javier Miranda  

gcc/ada/

* restrict.ads (Set_Global_No_Tasking, Global_No_Tasking): New
subprograms.
* restrict.adb (Set_Global_No_Tasking, Global_No_Tasking): New
subprograms.
* sem_ch3.adb (Access_Definition): Do not skip building masters
since they may be required for BIP calls.
(Analyze_Subtype_Declaration): Propagate attribute
Is_Limited_Record in class-wide subtypes and subtypes with
cloned subtype attribute; propagate attribute
Is_Limited_Interface.
* sem_ch6.adb (Check_Anonymous_Return): Do not skip building
masters since they may be required for BIP calls. Use
Build_Master_Declaration to declare the _master variable.
(Create_Extra_Formals): Add decoration of Has_Master_Entity when
the _master formal is added.
* exp_ch3.adb (Init_Formals): Adding formal to decorate it with
attribute Has_Master_Entity when the _master formal is added.
(Build_Master): Do not skip building masters since they may be
required for BIP calls.
(Expand_N_Object_Declaration): Ensure activation chain and
master entity for objects initialized with BIP function calls.
* sem_prag.adb (Process_Restrictions_Or_Restriction_Warnings):
Adding support to detect and save restriction No_Tasking when
set in the run-time package System or in a global configuration
pragmas file.
* sem_util.adb (Current_Entity_In_Scope): Overload this
subprogram to allow searching for an entity by its Name.
* sem_util.ads (Current_Entity_In_Scope): Update comment.
* exp_ch4.adb (Expand_N_Allocator): Do not skip building masters
since they may be required for BIP calls.
* exp_ch6.ads (Might_Have_Tasks): New subprogram.
* exp_ch6.adb (Make_Build_In_Place_Call_In_Allocator): Add
support for BIP calls returning objects that may have tasks.
(Make_Build_In_Place_Call_In_Allocator): Build the activation
chain if the result might have tasks.
(Make_Build_In_Place_Iface_Call_In_Allocator): Build the class
wide master for the result type.
(Might_Have_Tasks): New subprogram.
(Needs_BIP_Task_Actuals): Returns False when restriction
No_Tasking is globally set.
* exp_ch9.ads (Build_Master_Declaration): New subprogram.
* exp_ch9.adb (Build_Activation_Chain_Entity): No action
performed when restriction No_Tasking is globally set.
(Build_Class_Wide_Master): No action performed when restriction
No_Tasking is globally set; use Build_Master_Declaration to
declare the _master variable.
(Build_Master_Declaration): New subprogram.
(Build_Master_Entity): No action performed when restriction
No_Tasking is globally set; added support to handle transient
scopes and _finalizer routines.
(Build_Master_Renaming): No action performed when restriction
No_Tasking is globally set.
(Build_Task_Activation_Call): Skip generating the call when
the chain is an ignored ghost entity.
(Find_Master_Scope): Generalize the code that detects transient
scopes with master entity.
* einfo.ads (Has_Nested_Subprogram): Minor comment reformatting.

patch.diff.gz
Description: application/gzip

[Ada] AI12-0260 Functions Is_Basic and To_Basic in Wide_Characters.Handling

[Pierre-Marie de Rodat]

This Ada 202x AI introduces new functions Is_Basic and To_Basic in
Ada.Wide_Characters.Handling.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Arnaud Charlet  

gcc/ada/

* libgnat/a-wichha.ads, libgnat/a-wichha.adb,
libgnat/a-wichun.ads, libgnat/a-wichun.adb (Is_Basic, To_Basic):
New.
* libgnat/s-utf_32.ads, libgnat/s-utf_32.adb (Is_UTF_32_Basic,
To_UTF_32_Basic, Decomposition_Search): New subprograms.
(Unicode_Decomposition): New table.

patch.diff.gz
Description: application/gzip

[Ada] T'Image calls T'Put_Image

[Pierre-Marie de Rodat]

In Ada 2020, T'Image calls T'Put_Image if there is an explicit
aspect_specification for Put_Image, or if U_Type'Image is illegal in
pre-2020 versions of Ada. Scalar types continue to use the old 'Image,
even in Ada 2020.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Bob Duff  

gcc/ada/

* exp_put_image.ads, exp_put_image.adb
(Image_Should_Call_Put_Image): New function to determine whether
the call to Put_Image should be generated.
(Build_Image_Call): New procedure to generate the call to
Put_Image.
* exp_imgv.adb (Expand_Image_Attribute): Use underlying types to
bypass privacy (only in Ada 2020). If
Image_Should_Call_Put_Image is True (which happens only in Ada
2020), then call Build_Image_Call.
* rtsfind.ads, rtsfind.adb: Add the necessary declarations in
Ada.Strings.Text_Output.Buffers.
* sem_attr.adb (Check_Image_Type): Enable the Ada 2020 case.
* libgnat/a-stoufo.ads, libgnat/a-stoufo.adb: Use the less
restrictive type that allows newline characters.--- gcc/ada/exp_imgv.adb
+++ gcc/ada/exp_imgv.adb
@@ -27,6 +27,7 @@ with Atree;use Atree;
 with Casing;   use Casing;
 with Checks;   use Checks;
 with Einfo;use Einfo;
+with Exp_Put_Image;
 with Exp_Util; use Exp_Util;
 with Lib;  use Lib;
 with Namet;use Namet;
@@ -477,7 +478,15 @@ package body Exp_Imgv is
   end if;
 
   Ptyp := Entity (Pref);
-  Rtyp := Root_Type (Ptyp);
+
+  --  Ada 2020 allows 'Image on private types, so we need to fetch the
+  --  underlying type.
+
+  if Ada_Version >= Ada_2020 then
+ Rtyp := Underlying_Type (Ptyp);
+  else
+ Rtyp := Root_Type (Ptyp);
+  end if;
 
   --  Enable speed-optimized expansion of user-defined enumeration types
   --  if we are compiling with optimizations enabled and enumeration type
@@ -524,7 +533,15 @@ package body Exp_Imgv is
 
   Enum_Case := False;
 
-  if Rtyp = Standard_Boolean then
+  --  If this is a case where Image should be transformed using Put_Image,
+  --  then do so. See Exp_Put_Image for details.
+
+  if Exp_Put_Image.Image_Should_Call_Put_Image (N) then
+ Rewrite (N, Exp_Put_Image.Build_Image_Call (N));
+ Analyze_And_Resolve (N, Standard_String, Suppress => All_Checks);
+ return;
+
+  elsif Rtyp = Standard_Boolean then
  Imid := RE_Image_Boolean;
  Tent := Rtyp;
 
@@ -587,8 +604,10 @@ package body Exp_Imgv is
   --  Only other possibility is user-defined enumeration type
 
   else
+ pragma Assert (Is_Enumeration_Type (Rtyp));
+
  if Discard_Names (First_Subtype (Ptyp))
-   or else No (Lit_Strings (Root_Type (Ptyp)))
+   or else No (Lit_Strings (Rtyp))
  then
 --  When pragma Discard_Names applies to the first subtype, build
 --  (Pref'Pos (Expr))'Img.
@@ -634,11 +653,24 @@ package body Exp_Imgv is
   --  Build first argument for call
 
   if Enum_Case then
- Arg_List := New_List (
-   Make_Attribute_Reference (Loc,
- Attribute_Name => Name_Pos,
- Prefix => New_Occurrence_Of (Ptyp, Loc),
- Expressions=> New_List (Expr)));
+ declare
+T : Entity_Id;
+ begin
+--  In Ada 2020 we need the underlying type here, because 'Image is
+--  allowed on private types.
+
+if Ada_Version >= Ada_2020 then
+   T := Rtyp;
+else
+   T := Ptyp;
+end if;
+
+Arg_List := New_List (
+  Make_Attribute_Reference (Loc,
+Attribute_Name => Name_Pos,
+Prefix => New_Occurrence_Of (T, Loc),
+Expressions=> New_List (Expr)));
+ end;
 
   --  AI12-0020: Ada 2020 allows 'Image for all types, including private
   --  types. If the full type is not a fixed-point type, then it is enough

--- gcc/ada/exp_put_image.adb
+++ gcc/ada/exp_put_image.adb
@@ -915,6 +915,79 @@ package body Exp_Put_Image is
   return Make_Defining_Identifier (Loc, Sname);
end Make_Put_Image_Name;
 
+   function Image_Should_Call_Put_Image (N : Node_Id) return Boolean is
+   begin
+  if Ada_Version < Ada_2020 then
+ return False;
+  end if;
+
+  --  In Ada 2020, T'Image calls T'Put_Image if there is an explicit
+  --  aspect_specification for Put_Image, or if U_Type'Image is illegal
+  --  in pre-2020 versions of Ada.
+
+  declare
+ U_Type : constant Entity_Id := Underlying_Type (Entity (Prefix (N)));
+  begin
+ if Present (TSS (U_Type, TSS_Put_Image)) then
+return True;
+ end if;
+
+ return not Is_Scalar_Type (U_Type);
+  end;
+   end Image_Should_Call_Put_Image;
+
+   function Build_Image_Call (N : Node_Id) return Node_Id is
+  --  For T'Image (X) 

[Ada] Fix analysis of Relaxed_Initialization for bodies-as-specs

[Pierre-Marie de Rodat]

Analysis of Relaxed_Initialization is heavily inspired by the existing
code for Global/Depends contract. There was one difference in dealing
with scope tables; it turns out that this difference was a mistake. Now
fixed.

Also, fix a mistake in querying the aspect property for subprogram
parameter, which needs to be examined by looking at the aspect of the
subprogram.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Piotr Trojanek  

gcc/ada/

* sem_ch13.adb (Analyze_Aspect_Relaxed_Initialization): Fix
dealing with scopes on subprogram bodies that act as specs.
* sem_util.adb (Has_Relaxed_Initialization): Fix trivial
mistake.--- gcc/ada/sem_ch13.adb
+++ gcc/ada/sem_ch13.adb
@@ -2203,6 +2203,10 @@ package body Sem_Ch13 is
--  Items that appear in the relaxed initialization aspect
--  expression of a subprogram; for detecting duplicates.
 
+   Restore_Scope : Boolean;
+   --  Will be set to True if we need to restore the scope table
+   --  after analyzing the aspect expression.
+
 --  Start of processing for Analyze_Aspect_Relaxed_Initialization
 
 begin
@@ -2231,17 +2235,23 @@ package body Sem_Ch13 is
elsif Is_Subprogram (E) then
   if Present (Expr) then
 
- --  Subprogram and its formal parameters must be visible
- --  when analyzing the aspect expression.
-
- pragma Assert (not In_Open_Scopes (E));
+ --  If we analyze subprogram body that acts as its own
+ --  spec, then the subprogram itself and its formals are
+ --  already installed; otherwise, we need to install them,
+ --  as they must be visible when analyzing the aspect
+ --  expression.
 
- Push_Scope (E);
-
- if Is_Generic_Subprogram (E) then
-Install_Generic_Formals (E);
+ if In_Open_Scopes (E) then
+Restore_Scope := False;
  else
-Install_Formals (E);
+Restore_Scope := True;
+Push_Scope (E);
+
+if Is_Generic_Subprogram (E) then
+   Install_Generic_Formals (E);
+else
+   Install_Formals (E);
+end if;
  end if;
 
  --  Aspect expression is either an aggregate with list of
@@ -2281,7 +2291,9 @@ package body Sem_Ch13 is
 Analyze_Relaxed_Parameter (E, Expr, Seen);
  end if;
 
- End_Scope;
+ if Restore_Scope then
+End_Scope;
+ end if;
   else
  Error_Msg_N ("missing expression for aspect %", N);
   end if;

--- gcc/ada/sem_util.adb
+++ gcc/ada/sem_util.adb
@@ -12511,7 +12511,8 @@ package body Sem_Util is
 
if Has_Aspect (Subp_Id, Aspect_Relaxed_Initialization) then
   Aspect_Expr :=
-Find_Value_Of_Aspect (E, Aspect_Relaxed_Initialization);
+Find_Value_Of_Aspect
+  (Subp_Id, Aspect_Relaxed_Initialization);
 
   --  Aspect expression is either an aggregate, e.g.:
   --

[Ada] Missing errors on aspect checking

[Pierre-Marie de Rodat]

Some aspects with no corresponding pragmas (Default_Value and
Default_Component_Value) did not have proper checking for rules in RM
13.1(9) and RM 13.1(10)), this is now fixed.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Arnaud Charlet  

gcc/ada/

* sem_attr.adb (Eval_Attribute): Protect against previous
errors.
* sem_ch13.adb (Analyze_Aspect_Default_Value): Remove redundant
error checking, handling in Analyze_Aspect_Specifications.
(Analyze_Aspect_Specifications): Refine error messages on
Default_[Component_]Value.
(Check_Aspect_Too_Late): New procedure.
(Rep_Item_Too_Late.Is_Derived_Type_With_Constraint): Remove,
dead code.
* aspects.ads (Is_Representation_Aspect): Default_Value is a
representation aspect.--- gcc/ada/aspects.ads
+++ gcc/ada/aspects.ads
@@ -450,7 +450,7 @@ package Aspects is
   Aspect_Default_Initial_Condition=> False,
   Aspect_Default_Iterator => False,
   Aspect_Default_Storage_Pool => True,
-  Aspect_Default_Value=> False,
+  Aspect_Default_Value=> True,
   Aspect_Depends  => False,
   Aspect_Dimension=> False,
   Aspect_Dimension_System => False,

--- gcc/ada/sem_attr.adb
+++ gcc/ada/sem_attr.adb
@@ -7269,13 +7269,19 @@ package body Sem_Attr is
 
procedure Eval_Attribute (N : Node_Id) is
   Loc   : constant Source_Ptr   := Sloc (N);
-  Aname : constant Name_Id  := Attribute_Name (N);
-  Id: constant Attribute_Id := Get_Attribute_Id (Aname);
-  P : constant Node_Id  := Prefix (N);
 
   C_Type : constant Entity_Id := Etype (N);
   --  The type imposed by the context
 
+  Aname : Name_Id;
+  --  Attribute_Name (N) after verification of validity of N
+
+  Id : Attribute_Id;
+  --  Get_Attribute_Id (Aname) after Aname is set
+
+  P : Node_Id;
+  --  Prefix (N) after verification of validity of N
+
   E1 : Node_Id;
   --  First expression, or Empty if none
 
@@ -7632,6 +7638,17 @@ package body Sem_Attr is
--  Start of processing for Eval_Attribute
 
begin
+  --  Return immediately if e.g. N has been rewritten or is malformed due
+  --  to previous errors.
+
+  if Nkind (N) /= N_Attribute_Reference then
+ return;
+  end if;
+
+  Aname := Attribute_Name (N);
+  Id:= Get_Attribute_Id (Aname);
+  P := Prefix (N);
+
   --  The To_Address attribute can be static, but it cannot be evaluated at
   --  compile time, so just return.
 

--- gcc/ada/sem_ch13.adb
+++ gcc/ada/sem_ch13.adb
@@ -229,6 +229,10 @@ package body Sem_Ch13 is
--  renaming_as_body. For tagged types, the specification is one of the
--  primitive specs.
 
+   procedure No_Type_Rep_Item (N : Node_Id);
+   --  Output message indicating that no type-related aspects can be
+   --  specified due to some property of the parent type.
+
procedure Register_Address_Clause_Check
  (N   : Node_Id;
   X   : Entity_Id;
@@ -885,6 +889,14 @@ package body Sem_Ch13 is
   --  This routine analyzes an Aspect_Default_[Component_]Value denoted by
   --  the aspect specification node ASN.
 
+  procedure Check_Aspect_Too_Late (N : Node_Id);
+  --  This procedure is similar to Rep_Item_Too_Late for representation
+  --  aspects that apply to type and that do not have a corresponding
+  --  pragma.
+  --  Used to check in particular that the expression associated with
+  --  aspect node N for the given type (entity) of the aspect does not
+  --  appear too late according to the rules in RM 13.1(9) and 13.1(10).
+
   procedure Inherit_Delayed_Rep_Aspects (ASN : Node_Id);
   --  As discussed in the spec of Aspects (see Aspect_Delay declaration),
   --  a derived type can inherit aspects from its parent which have been
@@ -918,47 +930,110 @@ package body Sem_Ch13 is
   --
 
   procedure Analyze_Aspect_Default_Value (ASN : Node_Id) is
- A_Id : constant Aspect_Id := Get_Aspect_Id (ASN);
  Ent  : constant Entity_Id := Entity (ASN);
  Expr : constant Node_Id   := Expression (ASN);
- Id   : constant Node_Id   := Identifier (ASN);
 
   begin
- Error_Msg_Name_1 := Chars (Id);
+ Set_Has_Default_Aspect (Base_Type (Ent));
 
- if not Is_Type (Ent) then
-Error_Msg_N ("aspect% can only apply to a type", Id);
-return;
+ if Is_Scalar_Type (Ent) then
+Set_Default_Aspect_Value (Base_Type (Ent), Expr);
+ else
+Set_Default_Aspect_Component_Value (Base_Type (Ent), Expr);
+ end if;
 
- elsif not Is_First_Subtype (Ent) then
-Error_Msg_N ("aspect% cannot apply to subtype", Id);
-return;
+ Check_Aspect_Too_Late (ASN);
+  end 

[Ada] Implement AI12-0343 Return Statement Checks

[Pierre-Marie de Rodat]

This implements the AI in all versions of the languages, since it is a
binding interpretation.  The goal of the AI is to clarify where three
checks prescribed by the 6.5 clause are done in the case of an extended
return statement (immediately after the return object is created or
immediately before it is returned) as well as to specify that predicate
checks must also be done immediately before it is returned.

The main implementation change is to arrange for the simple return
statement generated by the expansion of an extended return statement
to be analyzed with checks enabled (except for access checks), but
without doing the common accessibility check on the return object.

Another change is to remove the duplicate implementation of the check
prescribed by AI05-0073 and do it only in Expand_Simple_Function_Return
(this check is one of the three covered by AI12-0343).

This also prevents the compiler from generating duplicate predicate
checks for the expression initializing the return object, if any.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Eric Botcazou  

gcc/ada/

* einfo.ads (Return_Applies_To): Document special usage for E_Block.
* einfo.adb (Write_Field8_Name): Write it for E_Block too.
* exp_ch4.adb (Expand_N_Type_Conversion): Remove implementation of
the check prescribed by AI05-0073.
* exp_ch6.adb (Apply_CW_Accessibility_Check): New procedure to apply
the check prescribed by AI95-344 extracted from...
(Expand_N_Extended_Return_Statement): Apply the check prescribed by
AI95-344 to the expression, if present.  Suppress only access checks
when analyzing the rewritten result.
(Expand_Simple_Function_Return): ...here.  Rename local variable.
Call Apply_CW_Accessibility_Check to apply the check prescribed by
AI95-344, but do not do it for the simple return statement generated
by the expansion of an extended return statement.  Apply the check
prescribed by AI05-0073 to all functions returning anonymous access
type designating a specific tagged type, but not if the expression
was null or tag checks are suppressed for the type, and use Not In
operator rather than comparing the tags explicitly.
* sem.adb (Analyze): Handle all Suppress values.
* sem_ch6.adb (Analyze_Function_Return): Do not explicitly apply
predicate checks in the case of an extended return statement.
Do not apply an implicit conversion to the anonymous access result
type in the case of the simple return statement generated by the
expansion of an extended return statement.
(New_Overloaded_Entity): Small comment tweak.
* treepr.adb (Print_Node): Fix typo in flag string.

patch.diff.gz
Description: application/gzip

[Ada] Do expect task discriminants in Global and Depends contracts

[Pierre-Marie de Rodat]

This reverts a previous commit and reinstalls task discriminants for the
analysis of Global/Depends contracts (and their refined variants). Task
discriminants are rejected in those contracts, but need to be installed
for the analysis, as otherwise we get difficult to understand error
messages.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Piotr Trojanek  

gcc/ada/

* sem_prag.adb (Analyze_Depends_In_Decl_Part,
Analyze_Global_In_Decl_Part): Bring back task discriminants for
analysis of the Global/Depends contracts; add comments.--- gcc/ada/sem_prag.adb
+++ gcc/ada/sem_prag.adb
@@ -2001,7 +2001,14 @@ package body Sem_Prag is
Push_Scope (Spec_Id);
 
if Ekind (Spec_Id) = E_Task_Type then
-  null;
+
+  --  Task discriminants cannot appear in the [Refined_]Depends
+  --  contract, but must be present for the analysis so that we
+  --  can reject them with an informative error message.
+
+  if Has_Discriminants (Spec_Id) then
+ Install_Discriminants (Spec_Id);
+  end if;
 
elsif Is_Generic_Subprogram (Spec_Id) then
   Install_Generic_Formals (Spec_Id);
@@ -2789,7 +2796,14 @@ package body Sem_Prag is
 Push_Scope (Spec_Id);
 
 if Ekind (Spec_Id) = E_Task_Type then
-   null;
+
+   --  Task discriminants cannot appear in the [Refined_]Global
+   --  contract, but must be present for the analysis so that we
+   --  can reject them with an informative error message.
+
+   if Has_Discriminants (Spec_Id) then
+  Install_Discriminants (Spec_Id);
+   end if;
 
 elsif Is_Generic_Subprogram (Spec_Id) then
Install_Generic_Formals (Spec_Id);

[Ada] Use uniform type resolution for membership tests

[Pierre-Marie de Rodat]

This fixes an annoying discrepancy in the resolution of the type of
the elements of the choice list in a membership test.  Consider:

  Msg : String;

  if Msg not in "" | "bypass" then
...
  end if;

  if not (Msg in "" or else Msg in "bypass") then
...
  end if;

  function Func return String;
  function Func return Integer;

  if Func not in "" | "bypass" then
...
  end if;

In the former case, the type of the literals is resolved to the subtype
of Msg whereas, in the latter two cases, it is resolved to the base type.

Type resolution is a two-phase process here: first Analyze_Membership_Op
checks that the types (or the interpretations thereof) of the expression
and of all the elements of the choice list are compatible types; second,
Resolve_Membership_Op does the final resolution by picking a single type.

Resolve_Membership_Op invokes Intersect_Types to pick this single type,
which yields the base type in the case of strings, except in the former
case, where it directly uses the Etype of the left operand.

The change makes it so that Intersect_Types is invoked in all cases.

No functional changes.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Eric Botcazou  

gcc/ada/

* sem_res.adb (Resolve_Set_Membership): Remove local variable.
In the non-overloaded case, call Intersect_Types on the left
operand and the first alternative to get the resolution type.
But test the subtype of the left operand to give the warning.--- gcc/ada/sem_res.adb
+++ gcc/ada/sem_res.adb
@@ -9250,8 +9250,8 @@ package body Sem_Res is
   T : Entity_Id;
 
   procedure Resolve_Set_Membership;
-  --  Analysis has determined a unique type for the left operand. Use it to
-  --  resolve the disjuncts.
+  --  Analysis has determined a unique type for the left operand. Use it as
+  --  the basis to resolve the disjuncts.
 
   
   -- Resolve_Set_Membership --
@@ -9259,18 +9259,17 @@ package body Sem_Res is
 
   procedure Resolve_Set_Membership is
  Alt  : Node_Id;
- Ltyp : Entity_Id;
 
   begin
  --  If the left operand is overloaded, find type compatible with not
  --  overloaded alternative of the right operand.
 
+ Alt := First (Alternatives (N));
  if Is_Overloaded (L) then
-Ltyp := Empty;
-Alt := First (Alternatives (N));
+T := Empty;
 while Present (Alt) loop
if not Is_Overloaded (Alt) then
-  Ltyp := Intersect_Types (L, Alt);
+  T := Intersect_Types (L, Alt);
   exit;
else
   Next (Alt);
@@ -9280,15 +9279,15 @@ package body Sem_Res is
 --  Unclear how to resolve expression if all alternatives are also
 --  overloaded.
 
-if No (Ltyp) then
+if No (T) then
Error_Msg_N ("ambiguous expression", N);
 end if;
 
  else
-Ltyp := Etype (L);
+T := Intersect_Types (L, Alt);
  end if;
 
- Resolve (L, Ltyp);
+ Resolve (L, T);
 
  Alt := First (Alternatives (N));
  while Present (Alt) loop
@@ -9299,7 +9298,7 @@ package body Sem_Res is
 if not Is_Entity_Name (Alt)
   or else not Is_Type (Entity (Alt))
 then
-   Resolve (Alt, Ltyp);
+   Resolve (Alt, T);
 end if;
 
 Next (Alt);
@@ -9307,7 +9306,7 @@ package body Sem_Res is
 
  --  Check for duplicates for discrete case
 
- if Is_Discrete_Type (Ltyp) then
+ if Is_Discrete_Type (T) then
 declare
type Ent is record
   Alt : Node_Id;
@@ -9350,11 +9349,11 @@ package body Sem_Res is
  --  equality for the type. This may be confusing to users, and the
  --  following warning appears useful for the most common case.
 
- if Is_Scalar_Type (Ltyp)
-   and then Present (Get_User_Defined_Eq (Ltyp))
+ if Is_Scalar_Type (Etype (L))
+   and then Present (Get_User_Defined_Eq (Etype (L)))
  then
 Error_Msg_NE
-  ("membership test on& uses predefined equality?", N, Ltyp);
+  ("membership test on& uses predefined equality?", N, Etype (L));
 Error_Msg_N
   ("\even if user-defined equality exists (RM 4.5.2 (28.1/3)?", N);
  end if;

[Ada] Put_Image: Enable for access-to-subprogram types

[Pierre-Marie de Rodat]

Implement Put_Image for access-to-subprogram, including
access-to-protected-subprogram, and enable.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Bob Duff  

gcc/ada/

* libgnat/s-putima.ads, libgnat/s-putima.adb
(Put_Image_Access_Subp, Put_Image_Access_Prot): New procedures
for printing access-to-subprogram objects.  Remove an explicit
" ", because Put_Image includes the annoying leading blank.
* rtsfind.ads: Add new procedures in s-putima.
* exp_put_image.adb: Call new procedures as appropriate.--- gcc/ada/exp_put_image.adb
+++ gcc/ada/exp_put_image.adb
@@ -314,7 +314,11 @@ package body Exp_Put_Image is
  end if;
 
   elsif Is_Access_Type (U_Type) then
- if P_Size = System_Address_Size then
+ if Is_Access_Protected_Subprogram_Type (U_Type) then
+Lib_RE := RE_Put_Image_Access_Prot;
+ elsif Is_Access_Subprogram_Type (U_Type) then
+Lib_RE := RE_Put_Image_Access_Subp;
+ elsif P_Size = System_Address_Size then
 Lib_RE := RE_Put_Image_Thin_Pointer;
  else
 pragma Assert (P_Size = 2 * System_Address_Size);

--- gcc/ada/libgnat/s-putima.adb
+++ gcc/ada/libgnat/s-putima.adb
@@ -118,16 +118,20 @@ package body System.Put_Images is
generic
   type Designated (<>) is private;
   type Pointer is access all Designated;
-   procedure Put_Image_Pointer (S : in out Sink'Class; X : Pointer);
+   procedure Put_Image_Pointer
+ (S : in out Sink'Class; X : Pointer; Type_Kind : String);
 
-   procedure Put_Image_Pointer (S : in out Sink'Class; X : Pointer) is
+   procedure Put_Image_Pointer
+ (S : in out Sink'Class; X : Pointer; Type_Kind : String)
+   is
   function Cast is new Unchecked_Conversion
 (System.Address, Unsigned_Address);
begin
   if X = null then
  Put_UTF_8 (S, "null");
   else
- Put_UTF_8 (S, "(access ");
+ Put_UTF_8 (S, "(");
+ Put_UTF_8 (S, Type_Kind);
  Hex.Put_Image (S, Cast (X.all'Address));
  Put_UTF_8 (S, ")");
   end if;
@@ -135,10 +139,29 @@ package body System.Put_Images is
 
procedure Thin_Instance is new Put_Image_Pointer (Byte, Thin_Pointer);
procedure Put_Image_Thin_Pointer
- (S : in out Sink'Class; X : Thin_Pointer) renames Thin_Instance;
+ (S : in out Sink'Class; X : Thin_Pointer)
+   is
+   begin
+  Thin_Instance (S, X, "access");
+   end Put_Image_Thin_Pointer;
+
procedure Fat_Instance is new Put_Image_Pointer (Byte_String, Fat_Pointer);
procedure Put_Image_Fat_Pointer
- (S : in out Sink'Class; X : Fat_Pointer) renames Fat_Instance;
+ (S : in out Sink'Class; X : Fat_Pointer)
+   is
+   begin
+  Fat_Instance (S, X, "access");
+   end Put_Image_Fat_Pointer;
+
+   procedure Put_Image_Access_Subp (S : in out Sink'Class; X : Thin_Pointer) is
+   begin
+  Thin_Instance (S, X, "access subprogram");
+   end Put_Image_Access_Subp;
+
+   procedure Put_Image_Access_Prot (S : in out Sink'Class; X : Thin_Pointer) is
+   begin
+  Thin_Instance (S, X, "access protected subprogram");
+   end Put_Image_Access_Prot;
 
procedure Put_Image_String (S : in out Sink'Class; X : String) is
begin

--- gcc/ada/libgnat/s-putima.ads
+++ gcc/ada/libgnat/s-putima.ads
@@ -69,6 +69,12 @@ package System.Put_Images is
--  Print "null", or the address of the designated object as an unsigned
--  hexadecimal integer.
 
+   procedure Put_Image_Access_Subp (S : in out Sink'Class; X : Thin_Pointer);
+   --  For access-to-subprogram types
+
+   procedure Put_Image_Access_Prot (S : in out Sink'Class; X : Thin_Pointer);
+   --  For access-to-protected-subprogram types
+
procedure Put_Image_String (S : in out Sink'Class; X : String);
procedure Put_Image_Wide_String (S : in out Sink'Class; X : Wide_String);
procedure Put_Image_Wide_Wide_String

--- gcc/ada/rtsfind.ads
+++ gcc/ada/rtsfind.ads
@@ -1179,6 +1179,8 @@ package Rtsfind is
  RE_Put_Image_Long_Long_Unsigned,-- System.Put_Images
  RE_Put_Image_Thin_Pointer,  -- System.Put_Images
  RE_Put_Image_Fat_Pointer,   -- System.Put_Images
+ RE_Put_Image_Access_Subp,   -- System.Put_Images
+ RE_Put_Image_Access_Prot,   -- System.Put_Images
  RE_Put_Image_String,-- System.Put_Images
  RE_Put_Image_Wide_String,   -- System.Put_Images
  RE_Put_Image_Wide_Wide_String,  -- System.Put_Images
@@ -2580,6 +2582,8 @@ package Rtsfind is
  RE_Put_Image_Long_Long_Unsigned => System_Put_Images,
  RE_Put_Image_Thin_Pointer   => System_Put_Images,
  RE_Put_Image_Fat_Pointer=> System_Put_Images,
+ RE_Put_Image_Access_Subp=> System_Put_Images,
+ RE_Put_Image_Access_Prot=> System_Put_Images,
  RE_Put_Image_String => System_Put_Images,
  RE_Put_Image_Wide_String=> System_Put_Images,
 

[Ada] Implement AI12-0077 Has_Same_Storage on objects of size zero

[Pierre-Marie de Rodat]

This implements the AI in all versions of the language, since it is a
binding interpretation.  The point is to make 'Has_Same_Storage return
false for objects of size zero, as 'Overlaps_Storage already does.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Eric Botcazou  

gcc/ada/

* exp_attr.adb (Expand_N_Attribute_Reference) :
Do not do superfluous work.  Add the condition (X'Size /= 0) on
both paths and turn binary AND into short-circuit AND THEN.--- gcc/ada/exp_attr.adb
+++ gcc/ada/exp_attr.adb
@@ -3603,6 +3603,7 @@ package body Exp_Attr is
 
  --(X'address = Y'address)
  --  and then (X'Size = Y'Size)
+ --  and then (X'Size /= 0)  (AI12-0077)
 
  --  If both arguments have the same Etype the second conjunct can be
  --  omitted.
@@ -3622,27 +3623,39 @@ package body Exp_Attr is
  Attribute_Name => Name_Size,
  Prefix => New_Copy_Tree (X));
 
- Y_Size :=
-   Make_Attribute_Reference (Loc,
- Attribute_Name => Name_Size,
- Prefix => New_Copy_Tree (Y));
-
  if Etype (X) = Etype (Y) then
 Rewrite (N,
-  Make_Op_Eq (Loc,
-Left_Opnd  => X_Addr,
-Right_Opnd => Y_Addr));
+  Make_And_Then (Loc,
+Left_Opnd  =>
+  Make_Op_Eq (Loc,
+Left_Opnd  => X_Addr,
+Right_Opnd => Y_Addr),
+Right_Opnd =>
+  Make_Op_Ne (Loc,
+Left_Opnd  => X_Size,
+Right_Opnd => Make_Integer_Literal (Loc, 0;
  else
+Y_Size :=
+  Make_Attribute_Reference (Loc,
+Attribute_Name => Name_Size,
+Prefix => New_Copy_Tree (Y));
+
 Rewrite (N,
-  Make_Op_And (Loc,
+  Make_And_Then (Loc,
 Left_Opnd  =>
   Make_Op_Eq (Loc,
 Left_Opnd  => X_Addr,
 Right_Opnd => Y_Addr),
 Right_Opnd =>
-  Make_Op_Eq (Loc,
-Left_Opnd  => X_Size,
-Right_Opnd => Y_Size)));
+  Make_And_Then (Loc,
+Left_Opnd  =>
+  Make_Op_Eq (Loc,
+Left_Opnd  => X_Size,
+Right_Opnd => Y_Size),
+Right_Opnd =>
+  Make_Op_Ne (Loc,
+Left_Opnd  => New_Copy_Tree (X_Size),
+Right_Opnd => Make_Integer_Literal (Loc, 0);
  end if;
 
  Analyze_And_Resolve (N, Standard_Boolean);

[Ada] Link failure with call to expression function in precondition

[Pierre-Marie de Rodat]

A call to an exprewion function generated for a precondition that
applies to a null procedure leaves the freeze node for the expression
function in the wrong context. As a result the body of the function is
not properly compiled and the corresponding symbol is markea as
undefined, leading to a subsequent link error.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Ed Schonberg  

gcc/ada/

* freeze.adb (Freeze_Expression): When traversing the tree
looking for the proper insertion point for the freeze node of an
entity that is declared in an outer scope, set the candidate
subprogram body node properly.  Previous code has an off-by-one
error.--- gcc/ada/freeze.adb
+++ gcc/ada/freeze.adb
@@ -7379,10 +7379,16 @@ package body Freeze is
return;
 end if;
 
-exit when
-  Nkind (Parent_P) = N_Subprogram_Body
+--  If the parent is a subprogram body, the candidate insertion
+--  point is just ahead of it.
+
+if  Nkind (Parent_P) = N_Subprogram_Body
 and then Unique_Defining_Entity (Parent_P) =
-   Freeze_Outside_Subp;
+   Freeze_Outside_Subp
+then
+   P := Parent_P;
+   exit;
+end if;
 
 P := Parent_P;
  end loop;

[Ada] Bad access checks on if/case expression as actual

[Pierre-Marie de Rodat]

This patch corrects an issue in the compiler whereby conditional
expressions used directly as actuals for anonymous access types caused
the callee to fail to generate relevant accessibility checks.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Justin Squirek  

gcc/ada/

* exp_ch4.adb (Expand_N_Case_Expression): Set default value for
Target to silence potential warnings.
(Expand_N_If_Expression): Add calculation to check when the if
expression is used directly in the context of an actual of an
anonymous access type and add a special path to force expansion
of the if expression in this case.
* exp_ch6.adb (Expand_Branch): Generate an assignment to the
level temporary for a given branch.
(Expand_Call_Helper): Add expansion to allow for creating a
temporary to store associated accessiblity levels on each branch
of the conditional expression.  Also perform expansion of
function calls into expressions with actions, and fixup
references to N with Call_Node.
(Insert_Level_Assign): Move through nested conditional
expressions to each branch.
* sem_util.ads, sem_util.adb (Is_Anonymous_Access_Actual): Added
to detect when to force expansion of if expressions.--- gcc/ada/exp_ch4.adb
+++ gcc/ada/exp_ch4.adb
@@ -5314,7 +5314,7 @@ package body Exp_Ch4 is
   Case_Stmt  : Node_Id;
   Decl   : Node_Id;
   Expr   : Node_Id;
-  Target : Entity_Id;
+  Target : Entity_Id := Empty;
   Target_Typ : Entity_Id;
 
   In_Predicate : Boolean := False;
@@ -5771,11 +5771,21 @@ package body Exp_Ch4 is
   Elsex : constant Node_Id:= Next (Thenx);
   Typ   : constant Entity_Id  := Etype (N);
 
-  Actions : List_Id;
-  Decl: Node_Id;
-  Expr: Node_Id;
-  New_If  : Node_Id;
-  New_N   : Node_Id;
+  Actions  : List_Id;
+  Decl : Node_Id;
+  Expr : Node_Id;
+  New_If   : Node_Id;
+  New_N: Node_Id;
+
+  --  Determine if we are dealing with a special case of a conditional
+  --  expression used as an actual for an anonymous access type which
+  --  forces us to transform the if expression into an expression with
+  --  actions in order to create a temporary to capture the level of the
+  --  expression in each branch.
+
+  Force_Expand : constant Boolean := Is_Anonymous_Access_Actual (N);
+
+   --  Start of processing for Expand_N_If_Expression
 
begin
   --  Check for MINIMIZED/ELIMINATED overflow mode
@@ -5975,9 +5985,13 @@ package body Exp_Ch4 is
  end;
 
   --  For other types, we only need to expand if there are other actions
-  --  associated with either branch.
+  --  associated with either branch or we need to force expansion to deal
+  --  with if expressions used as an actual of an anonymous access type.
 
-  elsif Present (Then_Actions (N)) or else Present (Else_Actions (N)) then
+  elsif Present (Then_Actions (N))
+or else Present (Else_Actions (N))
+or else Force_Expand
+  then
 
  --  We now wrap the actions into the appropriate expression
 
@@ -6051,6 +6065,62 @@ package body Exp_Ch4 is
Analyze_And_Resolve (Elsex, Typ);
 end if;
 
+--  We must force expansion into an expression with actions when
+--  an if expression gets used directly as an actual for an
+--  anonymous access type.
+
+if Force_Expand then
+   declare
+  Cnn  : constant Entity_Id := Make_Temporary (Loc, 'C');
+  Acts : List_Id;
+   begin
+  Acts := New_List;
+
+  --  Generate:
+  --Cnn : Ann;
+
+  Decl :=
+Make_Object_Declaration (Loc,
+  Defining_Identifier => Cnn,
+  Object_Definition   => New_Occurrence_Of (Typ, Loc));
+  Append_To (Acts, Decl);
+
+  Set_No_Initialization (Decl);
+
+  --  Generate:
+  --if Cond then
+  --   Cnn := ;
+  --else
+  --   Cnn := ;
+  --end if;
+
+  New_If :=
+Make_Implicit_If_Statement (N,
+  Condition   => Relocate_Node (Cond),
+  Then_Statements => New_List (
+Make_Assignment_Statement (Sloc (Thenx),
+  Name   => New_Occurrence_Of (Cnn, Sloc (Thenx)),
+  Expression => Relocate_Node (Thenx))),
+
+  Else_Statements => New_List (
+Make_Assignment_Statement (Sloc (Elsex),
+  Name   => New_Occurrence_Of (Cnn, Sloc (Elsex)),
+

[Ada] Put_Image: Implement for private types with full real type

[Pierre-Marie de Rodat]

Implement Put_Image for private types whose full type is a fixed or
floating point type. Also implement 'Image for private types in general.
This affects integers and enumeration types.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Bob Duff  

gcc/ada/

* exp_imgv.adb (Expand_Image_Attribute): Allow private types.
Put_Image generates Image for numeric types, and private types
whose full type is numeric. This requires the Conversion_OK flag
for integer and floating-point types. For fixed point, we need
the extra conversion.
* exp_put_image.adb (Build_Elementary_Put_Image_Call): Remove
special handling of real types.
(Enable_Put_Image): Enable for reals.--- gcc/ada/exp_imgv.adb
+++ gcc/ada/exp_imgv.adb
@@ -640,8 +640,31 @@ package body Exp_Imgv is
  Prefix => New_Occurrence_Of (Ptyp, Loc),
  Expressions=> New_List (Expr)));
 
+  --  AI12-0020: Ada 2020 allows 'Image for all types, including private
+  --  types. If the full type is not a fixed-point type, then it is enough
+  --  to set the Conversion_OK flag. However, that would not work for
+  --  fixed-point types, because that flag changes the run-time semantics
+  --  of fixed-point type conversions; therefore, we must first convert to
+  --  Rtyp, and then to Tent.
+
   else
- Arg_List := New_List (Convert_To (Tent, Expr));
+ declare
+Conv : Node_Id;
+ begin
+if Ada_Version >= Ada_2020
+  and then Is_Private_Type (Etype (Expr))
+then
+   if Is_Fixed_Point_Type (Rtyp) then
+  Conv := Convert_To (Tent, OK_Convert_To (Rtyp, Expr));
+   else
+  Conv := OK_Convert_To (Tent, Expr);
+   end if;
+else
+   Conv := Convert_To (Tent, Expr);
+end if;
+
+Arg_List := New_List (Conv);
+ end;
   end if;
 
   --  Append Snn, Pnn arguments

--- gcc/ada/exp_put_image.adb
+++ gcc/ada/exp_put_image.adb
@@ -345,10 +345,6 @@ package body Exp_Put_Image is
  --
  --  Note that this is putting a leading space for reals.
 
- if Is_Real_Type (U_Type) then
-return Build_Unknown_Put_Image_Call (N);
- end if;
-
  declare
 Image : constant Node_Id :=
   Make_Attribute_Reference (Loc,
@@ -831,9 +827,6 @@ package body Exp_Put_Image is
   --
   --  Put_Image on tagged types triggers some bugs.
   --
-  --  Put_Image doesn't work for private types whose full type is real.
-  --  Disable for all real types, for simplicity.
-  --
   --  Put_Image doesn't work for access-to-protected types, because of
   --  confusion over their size. Disable for all access-to-subprogram
   --  types, just in case.
@@ -841,7 +834,6 @@ package body Exp_Put_Image is
   if Is_Remote_Types (Scope (Typ))
 or else (Is_Tagged_Type (Typ) and then In_Predefined_Unit (Typ))
 or else (Is_Tagged_Type (Typ) and then not Tagged_Put_Image_Enabled)
-or else Is_Real_Type (Typ)
 or else Is_Access_Subprogram_Type (Typ)
   then
  return False;

[Ada] Do not expect task discriminants in Global and Depends contracts

[Pierre-Marie de Rodat]

When the support for Global and Depends (and their Refined variants)
contracts was implemented, it wrongly allowed discriminants to appear in
these contracts. This was later fixed, but we still had task
discriminants installed when resolving the contract items.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Piotr Trojanek  

gcc/ada/

* sem_prag.adb (Analyze_Depends_In_Decl_Part,
Analyze_Global_In_Decl_Part): Do not install task discriminants
for analysis of the Global/Depends contracts.--- gcc/ada/sem_prag.adb
+++ gcc/ada/sem_prag.adb
@@ -2001,9 +2001,7 @@ package body Sem_Prag is
Push_Scope (Spec_Id);
 
if Ekind (Spec_Id) = E_Task_Type then
-  if Has_Discriminants (Spec_Id) then
- Install_Discriminants (Spec_Id);
-  end if;
+  null;
 
elsif Is_Generic_Subprogram (Spec_Id) then
   Install_Generic_Formals (Spec_Id);
@@ -2791,9 +2789,7 @@ package body Sem_Prag is
 Push_Scope (Spec_Id);
 
 if Ekind (Spec_Id) = E_Task_Type then
-   if Has_Discriminants (Spec_Id) then
-  Install_Discriminants (Spec_Id);
-   end if;
+   null;
 
 elsif Is_Generic_Subprogram (Spec_Id) then
Install_Generic_Formals (Spec_Id);

[Ada] Remove unreferenced and dubious Is_Renaming_Declaration

[Pierre-Marie de Rodat]

Routine Is_Renaming_Declaration was added to support the Ghost aspect in
SPARK, but later its only callee has been removed when handling of this
aspect was fixed; now it is unreferenced. Also, it is dubious whether we
ever needed this routine (and whether we needed to explicitly list
renaming node kinds in its body), because we already have an
N_Renaming_Declaration subtype.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Piotr Trojanek  

gcc/ada/

* sem_util.ads, sem_util.adb (Is_Renaming_Declaration): Remove.--- gcc/ada/sem_util.adb
+++ gcc/ada/sem_util.adb
@@ -18081,28 +18081,6 @@ package body Sem_Util is
   return False;
end Is_Renamed_Entry;
 
-   -
-   -- Is_Renaming_Declaration --
-   -
-
-   function Is_Renaming_Declaration (N : Node_Id) return Boolean is
-   begin
-  case Nkind (N) is
- when N_Exception_Renaming_Declaration
-| N_Generic_Function_Renaming_Declaration
-| N_Generic_Package_Renaming_Declaration
-| N_Generic_Procedure_Renaming_Declaration
-| N_Object_Renaming_Declaration
-| N_Package_Renaming_Declaration
-| N_Subprogram_Renaming_Declaration
-  =>
-return True;
-
- when others =>
-return False;
-  end case;
-   end Is_Renaming_Declaration;
-

-- Is_Reversible_Iterator --


--- gcc/ada/sem_util.ads
+++ gcc/ada/sem_util.ads
@@ -2000,9 +2000,6 @@ package Sem_Util is
function Is_Renamed_Entry (Proc_Nam : Entity_Id) return Boolean;
--  Return True if Proc_Nam is a procedure renaming of an entry
 
-   function Is_Renaming_Declaration (N : Node_Id) return Boolean;
-   --  Determine whether arbitrary node N denotes a renaming declaration
-
function Is_Reversible_Iterator (Typ : Entity_Id) return Boolean;
--  AI05-0139-2: Check whether Typ is derived from the predefined interface
--  Ada.Iterator_Interfaces.Reversible_Iterator.

[Ada] Do not expect Global or Depends on single protected objects

[Pierre-Marie de Rodat]

The Global and Depends contracts can only be attached to single task
objects, not to single protected objects.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Piotr Trojanek  

gcc/ada/

* contracts.adb (Analyze_Object_Contract): Do not expect
Global/Depends on single protected units.--- gcc/ada/contracts.adb
+++ gcc/ada/contracts.adb
@@ -1067,10 +1067,10 @@ package body Contracts is
 Analyze_External_Property_In_Decl_Part (Prag, NC_Val);
  end if;
 
- --  The anonymous object created for a single concurrent type carries
- --  pragmas Depends and Globat of the type.
+ --  The anonymous object created for a single task type carries
+ --  pragmas Depends and Global of the type.
 
- if Is_Single_Concurrent_Object (Obj_Id) then
+ if Is_Single_Task_Object (Obj_Id) then
 
 --  Analyze Global first, as Depends may mention items classified
 --  in the global categorization.

[Ada] Update 'Loop_Entry checking to match changes in 'Old rules.

[Pierre-Marie de Rodat]

AI12-0217 made changes in the rules for 'Old; make analogous changes for
'Loop_Entry. In particular, where the rules used to require that the
attribute prefix must "statically denote" an object in some cases, those
rules have been relaxed to say that the prefix must "statically name" an
object instead. The significance of this is that it is now ok, at least
in many cases, to name a subcomponent of a top-level object in the
attribute prefix, as opposed to only being able to name the top-level
object. An accompanying SPARK RM wording change will be forthcoming
soon. The changes for AI12-0217 included a fix in the old
Statically_Denotes_Object predicate which caused the old rules to be
enforced correctly - this had the effect of introducing a regression
which is corrected via this change.

Tested on x86_64-pc-linux-gnu, committed on trunk

2020-06-15  Steve Baird  

gcc/ada/

* sem_attr.adb (Analyze_Attribute): In the Loop_Entry case,
replace a call to Statically_Denotes_Object with a call to
Statically_Names_Object and clean up the preceding comment.--- gcc/ada/sem_attr.adb
+++ gcc/ada/sem_attr.adb
@@ -4541,13 +4541,13 @@ package body Sem_Attr is
 
  Check_References_In_Prefix (Loop_Id);
 
- --  The prefix must denote a static entity if the pragma does not
+ --  The prefix must statically name an object if the pragma does not
  --  apply to the innermost enclosing loop statement, or if it appears
- --  within a potentially unevaluated epxression.
+ --  within a potentially unevaluated expression.
 
  if Is_Entity_Name (P)
or else Nkind (Parent (P)) = N_Object_Renaming_Declaration
-   or else Statically_Denotes_Object (P)
+   or else Statically_Names_Object (P)
  then
 null;
 

RE: [PATCH] AArch64: Don't check for amdgcn-amdhsa at all on arm targets.

[Tamar Christina]

Hi Andrew,

> >
> > The amdgcn-amdhsa test seems to be running for all targets
> > unconditionally while only really makes sense for certain targets.
> > This patch adds an opt-out list and opts out arm targets.
> >
> > Regtested on aarch64-none-linux-gnu and no issues.
> >
> > Ok for master?
> 
> I don't think this is right.  It does make sense to have aarch64 to support 
> it as
> an offload; though someone needs to test out the GPU card on an ARM64
> server.

That seems contradictory to me. Someone should first test it then enable it.

> Maybe checking for *-*-elf *-*-eabi and returning false for those targets
> should be enough for most embedded targets.
> 

Ultimately this won't help me. My problem with the test isn't that it's running,
It's that it's very very loud. 

There doesn't seem to be any way to silence the result of the feature check as
is done with virtually every other feature check *but* this one.

Instead you get

xgcc: fatal error: GCC is not configured to support amdgcn-amdhsa as offload 
target^M
compilation terminated.^M
compiler exited with status 1

which gets confused with people thinking something is broken.  If this feature 
test can
somehow behave like the rest (e.g. don't spit out anything unless -v is passed 
to dejagnu)
then I would be happy.

Thanks,
Tamar

> Thanks,
> Andrew Pinski
> 
> >
> > Thanks,
> > Tamar
> >
> > gcc/testsuite/ChangeLog:
> >
> > * lib/target-supports.exp (check_effective_target_offload_gcn): Skip
> for
> > arm targets.
> >
> > --

Re: [PATCH] Add pattern for pointer-diff on addresses with same base/offset (PR 94234)

[Richard Biener via Gcc-patches]

On Fri, Jun 5, 2020 at 11:20 AM Feng Xue OS  wrote:
>
> As Marc suggested, removed the new pointer_diff rule, and add another rule to 
> fold
> convert-add expression. This new rule is:
>
>   (T)(A * C) +- (T)(B * C) -> (T) ((A +- B) * C)
>
> Regards,
> Feng
>
> ---
> 2020-06-01  Feng Xue  
>
> gcc/
> PR tree-optimization/94234
> * match.pd ((T)(A * C) +- (T)(B * C)) -> (T)((A +- B) * C): New
> simplification.
> * ((PTR_A + OFF) - (PTR_B + OFF)) -> (PTR_A - PTR_B): New
> simplification.
>
> gcc/testsuite/
> PR tree-optimization/94234
> * gcc.dg/pr94234.c: New test.
> ---
>  gcc/match.pd   | 28 
>  gcc/testsuite/gcc.dg/pr94234.c | 24 
>  2 files changed, 52 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.dg/pr94234.c
>
> diff --git a/gcc/match.pd b/gcc/match.pd
> index 33ee1a920bf..4f340bfe40a 100644
> --- a/gcc/match.pd
> +++ b/gcc/match.pd
> @@ -2515,6 +2515,9 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
>  && TREE_CODE (@2) == INTEGER_CST
>  && tree_int_cst_sign_bit (@2) == 0))
>   (minus (convert @1) (convert @2)
> +   (simplify
> +(pointer_diff (pointer_plus @0 @2) (pointer_plus @1 @2))
> + (pointer_diff @0 @1))

This new pattern is OK.  Please commit it separately.

> (simplify
>  (pointer_diff (pointer_plus @@0 @1) (pointer_plus @0 @2))
>  /* The second argument of pointer_plus must be interpreted as signed, and
> @@ -2526,6 +2529,31 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
>   (minus (convert (view_convert:stype @1))
> (convert (view_convert:stype @2)))
>
> +/* (T)(A * C) +- (T)(B * C) -> (T)((A +- B) * C) and
> +   (T)(A * C) +- (T)(A) -> (T)(A * (C +- 1)). */
> +(if (INTEGRAL_TYPE_P (type))
> + (for plusminus (plus minus)
> +  (simplify
> +   (plusminus (convert:s (mult:cs @0 @1)) (convert:s (mult:cs @0 @2)))
> +   (if (element_precision (type) <= element_precision (TREE_TYPE (@0))
> +   && (TYPE_OVERFLOW_UNDEFINED (type) || TYPE_OVERFLOW_WRAPS (type))
> +   && TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0)))
> +(convert (mult (plusminus @1 @2) @0
> +  (simplify
> +   (plusminus (convert @0) (convert@2 (mult:c@3 @0 @1)))
> +   (if (element_precision (type) <= element_precision (TREE_TYPE (@0))
> +   && (TYPE_OVERFLOW_UNDEFINED (type) || TYPE_OVERFLOW_WRAPS (type))
> +   && TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0))
> +   && single_use (@2) && single_use (@3))
> +(convert (mult (plusminus { build_one_cst (TREE_TYPE (@1)); } @1) @0
> +  (simplify
> +   (plusminus (convert@2 (mult:c@3 @0 @1)) (convert @0))
> +   (if (element_precision (type) <= element_precision (TREE_TYPE (@0))
> +   && (TYPE_OVERFLOW_UNDEFINED (type) || TYPE_OVERFLOW_WRAPS (type))
> +   && TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0))
> +   && single_use (@2) && single_use (@3))
> +(convert (mult (plusminus @1 { build_one_cst (TREE_TYPE (@1)); }) 
> @0))
> +

This shows the limit of pattern matching IMHO.  I'm also not convinced
it gets the
overflow cases correct (but I didn't spend too much time here).  Note we have
similar functionality implemented in fold_plusminus_mult_expr.  IMHO instead
of doing the above moving fold_plusminus_mult_expr to GIMPLE by executing
it from inside the forwprop pass would make more sense.  Or finally biting the
bullet and try to teach reassociation about how to handle signed arithmetic
with non-wrapping overflow behavior.

Richard.

>  /* (A * C) +- (B * C) -> (A+-B) * C and (A * C) +- A -> A * (C+-1).
>  Modeled after fold_plusminus_mult_expr.  */
>  (if (!TYPE_SATURATING (type)
> diff --git a/gcc/testsuite/gcc.dg/pr94234.c b/gcc/testsuite/gcc.dg/pr94234.c
> new file mode 100644
> index 000..3f7c7a5e58f
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/pr94234.c
> @@ -0,0 +1,24 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -fdump-tree-forwprop1" } */
> +
> +typedef __SIZE_TYPE__ size_t;
> +typedef __PTRDIFF_TYPE__ ptrdiff_t;
> +
> +ptrdiff_t foo (char *a, size_t n)
> +{
> +  char *b1 = a + 8 * n;
> +  char *b2 = a + 8 * (n - 1);
> +
> +  return b1 - b2;
> +}
> +
> +ptrdiff_t goo (char *a, size_t n, size_t m)
> +{
> +  char *b1 = a + 8 * n;
> +  char *b2 = a + 8 * (n + 1);
> +
> +  return (b1 + m) - (b2 + m);
> +}
> +
> +/* { dg-final { scan-tree-dump-times "return 8;" 1 "forwprop1" } } */
> +/* { dg-final { scan-tree-dump-times "return -8;" 1 "forwprop1" } } */
> --
>
>
> 
> From: Richard Biener 
> Sent: Thursday, June 4, 2020 4:30 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Feng Xue OS
> Subject: Re: [PATCH] Add pattern for pointer-diff on addresses with same 
> base/offset (PR 94234)
>
> On Wed, Jun 3, 2020 at 4:33 PM Marc Glisse  wrote:
> >
> > On Wed, 3 Jun 2020, Feng Xue OS via Gcc-patches wrote:
> >
> > >> Ah, looking at the PR, you decided to perform the operation as unsigned
> > >> because that has fewer NOP 

RE: [PATCH] vect: Use LOOP_VINFO_DATAREFS and LOOP_VINFO_DDRS consistently

[Yangfei (Felix)]

Hi Richard,

> -Original Message-
> From: Richard Biener [mailto:richard.guent...@gmail.com]
> Sent: Monday, June 15, 2020 3:25 PM
> To: Yangfei (Felix) 
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] vect: Use LOOP_VINFO_DATAREFS and
> LOOP_VINFO_DDRS consistently
> 
> On Sat, Jun 13, 2020 at 4:46 AM Yangfei (Felix) 
> wrote:
> >
> > Hi,
> >
> > This is minor code refactorings in tree-vect-data-refs.c and 
> > tree-vect-loop.c.
> > Use LOOP_VINFO_DATAREFS and LOOP_VINFO_DDRS when possible and
> rename
> > several parameters to make code more consistent.
> >
> > Bootstrapped and tested on aarch64-linux-gnu.  OK?
> 
> OK.

Thanks for reviewing this.   Could you please help install it?

Regards,
Felix

Re: [EXT] Re: [PATCH] Optimize and+or+sub into xor+not (PR94882)

[Richard Biener via Gcc-patches]

On Thu, Jun 4, 2020 at 5:09 PM Naveen Hurugalawadi  wrote:
>
> Hi,
>
> Thanks for reviewing the patch and sharing your comments.
>
> >> nop_convert4 cannot happen, constants will have been constant folded here.
> Removed.
>
> >> So I think it should be and the other patterns adjusted accordingly.
> Modified the remaining patterns accordingly.
>
> Please find attached the modified patch as per your suggestions.
> Bootstrapped and regression tested on x86_64-pc-linux-gnu.

OK.

Thanks and sorry for the delay.
Richard.

> Thanks,
> Naveen