Re: [PATCH] loading float member of parameter stored via int registers

[Richard Biener via Gcc-patches]

On Wed, 21 Dec 2022, Jiufu Guo wrote:

> Hi,
> 
> This patch is fixing an issue about parameter accessing if the
> parameter is struct type and passed through integer registers, and
> there is floating member is accessed. Like below code:
> 
> typedef struct DF {double a[4]; long l; } DF;
> double foo_df (DF arg){return arg.a[3];}
> 
> On ppc64le, with trunk gcc, "std 6,-24(1) ; lfd 1,-24(1)" is
> generated.  While instruction "mtvsrd 1, 6" would be enough for
> this case.

So why do we end up spilling for ppc?

struct X { int i; float f; };

float foo (struct X x)
{
  return x.f;
}

does pass the structure in $RDI on x86_64 and we manage (with 
optimization, with -O0 we spill) to generate

shrq$32, %rdi
movd%edi, %xmm0

and RTL expansion generates

(note 4 1 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(insn 2 4 3 2 (set (reg/v:DI 83 [ x ])
(reg:DI 5 di [ x ])) "t.c":4:1 -1
 (nil))
(note 3 2 6 2 NOTE_INSN_FUNCTION_BEG)
(insn 6 3 7 2 (parallel [
(set (reg:DI 85)
(ashiftrt:DI (reg/v:DI 83 [ x ])
(const_int 32 [0x20])))
(clobber (reg:CC 17 flags))
]) "t.c":5:11 -1
 (nil))
(insn 7 6 8 2 (set (reg:SI 86)
(subreg:SI (reg:DI 85) 0)) "t.c":5:11 -1
 (nil))

I would imagine that for the ppc case we only see the subreg here
which should be even easier to optimize.

So how's this not fixable by providing proper patterns / subreg
capabilities?  Looking a bit at the RTL we have the issue might
be that nothing seems to handle CSE of

(note 8 0 5 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(insn 5 8 7 2 (set (mem/c:DI (plus:DI (reg/f:DI 110 sfp)
(const_int 56 [0x38])) [2 arg+24 S8 A64])
(reg:DI 6 6)) "t.c":2:23 679 {*movdi_internal64}
 (expr_list:REG_DEAD (reg:DI 6 6)
(nil)))
(note 7 5 10 2 NOTE_INSN_FUNCTION_BEG)
(note 10 7 15 2 NOTE_INSN_DELETED)
(insn 15 10 16 2 (set (reg/i:DF 33 1)
(mem/c:DF (plus:DI (reg/f:DI 110 sfp)
(const_int 56 [0x38])) [1 arg.a[3]+0 S8 A64])) "t.c":2:40 
576 {*movdf_hardfloat64}
 (nil))

Possibly because the store and load happen in a different mode?  Can
you see why CSE doesn't handle this (producing a subreg)?  On
the GIMPLE side we'd happily do that (but we don't see the argument
setup).

Thanks,
Richard.

> This patch updates the behavior when loading floating members of a
> parameter: if that floating member is stored via integer register,
> then loading it as integer mode first, and converting it to floating
> mode.
> 
> I also thought of a method: before storing the register to stack,
> convert it to float mode first. While there are some cases that may
> still prefer to keep an integer register store.   
>
> 
> Bootstrap and regtest passes on ppc64{,le}.
> I would ask for help to review for comments and if this patch is
> acceptable for the trunk.
> 
> 
> BR,
> Jeff (Jiufu)
> 
>   PR target/108073
> 
> gcc/ChangeLog:
> 
>   * config/rs6000/rs6000.cc (TARGET_LOADING_INT_CONVERT_TO_FLOAT): New
>   macro definition.
>   (rs6000_loading_int_convert_to_float): New hook implement.
>   * doc/tm.texi: Regenerated.
>   * doc/tm.texi.in (loading_int_convert_to_float): New hook.
>   * expr.cc (expand_expr_real_1): Updated to use the new hook.
>   * target.def (loading_int_convert_to_float): New hook.
> 
> gcc/testsuite/ChangeLog:
> 
>   * g++.target/powerpc/pr102024.C: Update.
>   * gcc.target/powerpc/pr108073.c: New test.
> 
> ---
>  gcc/config/rs6000/rs6000.cc | 70 +
>  gcc/doc/tm.texi |  6 ++
>  gcc/doc/tm.texi.in  |  2 +
>  gcc/expr.cc | 15 +
>  gcc/target.def  | 11 
>  gcc/testsuite/g++.target/powerpc/pr102024.C |  2 +-
>  gcc/testsuite/gcc.target/powerpc/pr108073.c | 24 +++
>  7 files changed, 129 insertions(+), 1 deletion(-)
>  create mode 100644 gcc/testsuite/gcc.target/powerpc/pr108073.c
> 
> diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
> index b3a609f3aa3..af676eea276 100644
> --- a/gcc/config/rs6000/rs6000.cc
> +++ b/gcc/config/rs6000/rs6000.cc
> @@ -1559,6 +1559,9 @@ static const struct attribute_spec 
> rs6000_attribute_table[] =
>  #undef TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN
>  #define TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN 
> invalid_arg_for_unprototyped_fn
>  
> +#undef TARGET_LOADING_INT_CONVERT_TO_FLOAT
> +#define TARGET_LOADING_INT_CONVERT_TO_FLOAT 
> rs6000_loading_int_convert_to_float
> +
>  #undef TARGET_MD_ASM_ADJUST
>  #define TARGET_MD_ASM_ADJUST rs6000_md_asm_adjust
>  
> @@ -24018,6 +24021,73 @@ invalid_arg_for_unprototyped_fn (const_tree 
> typelist, const_tree funcdecl, const
> : NULL;
>  }
>  
> +/* Implement the TARGET_LOADING_INT_CONVERT_TO_FLOAT. */
> +static rtx
> +rs6000_loading_int_convert_to_float (machine_mode mode, rtx sou

Re: [Patch] gfortran.dg/read_dir.f90: Make PASS on Windows

[Tobias Burnus]

On 19.12.22 11:51, Tobias Burnus wrote:

On 19.12.22 10:26, Tobias Burnus wrote:

And here is a more light-wight variant, suggested by Nightstrike:

Using '.' instead of creating a new directory - and checking for
__WIN32__ instead for __MINGW32__.

[...]

I have now updated the heavy version. The #if check moved to C as those
macros aren't set in Fortran. (That's now https://gcc.gnu.org/PR108175 -
I thought that there was a PR before, but I couldn't find any.)


This variant has now been committed as
https://gcc.gnu.org/r13-4818-g18fc70aa9c753d17c00211cea9fa5bd843fe94fd

Tobias

-
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 
München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas 
Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht 
München, HRB 106955

Re: gcc-13/changes.html: Mention -fstrict-flex-arrays and its impact

[Richard Biener via Gcc-patches]

On Tue, 20 Dec 2022, Qing Zhao wrote:

> Hi,
> 
> This is the patch for mentioning -fstrict-flex-arrays and -Warray-bounds=2 
> changes in gcc-13/changes.html.
> 
> Let me know if you have any comment or suggestions.

Some copy editing below

> Thanks.
> 
> Qing.
> 
> ===
> From c022076169b4f1990b91f7daf4cc52c6c5535228 Mon Sep 17 00:00:00 2001
> From: Qing Zhao 
> Date: Tue, 20 Dec 2022 16:13:04 +
> Subject: [PATCH] gcc-13/changes: Mention -fstrict-flex-arrays and its impact.
> 
> ---
>  htdocs/gcc-13/changes.html | 15 +++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
> index 689178f9..47b3d40f 100644
> --- a/htdocs/gcc-13/changes.html
> +++ b/htdocs/gcc-13/changes.html
> @@ -39,6 +39,10 @@ a work-in-progress.
>  Legacy debug info compression option -gz=zlib-gnu was 
> removed
>and the option is ignored right now.
>  New debug info compression option value -gz=zstd has 
> been added.
> +-Warray-bounds=2 will no longer issue warnings for out 
> of bounds
> +  accesses to trailing struct members of one-element array type anymore. 
> Please
> +  add -fstrict-flex-arrays=level to control how the 
> compiler treat
> +  trailing arrays of structures as flexible array members. 

"Instead it diagnoses accesses to trailing arrays according to 
-fstrict-flex-arrays."

>  
>  
>  
> @@ -409,6 +413,17 @@ a work-in-progress.
>  Other significant improvements
>  
>  
> +Treating trailing arrays as flexible array 
> members
> +
> +
> + GCC can now control when to treat the trailing array of a structure as 
> a 
> + flexible array member for the purpose of accessing the elements of such
> + an array. By default, all trailing arrays of structures are treated as

all trailing arrays in aggregates are treated
 
> + flexible array members. Use the new command-line option
> + -fstrict-flex-array=level to control how GCC treats the 
> trailing
> + array of a structure as a flexible array member at different levels.

-fstrict-flex-arrays to control which trailing array
members are streated as flexible arrays.

I've also just now noticed that there's now a flag_strict_flex_arrays
check in the middle-end (in array bound diagnostics) but this option
isn't streamed or handled with LTO.  I think you want to replace that
with the appropriate DECL_NOT_FLEXARRAY check.  We might also want
to see how inlining accesses from TUs with different -fstrict-flex-arrays
setting behaves when accessing the same structure (and whether we might
want to issue an ODR style diagnostic there).

Thanks,
Richard.

[PATCH] loading float member of parameter stored via int registers

[Jiufu Guo via Gcc-patches]

Hi,

This patch is fixing an issue about parameter accessing if the
parameter is struct type and passed through integer registers, and
there is floating member is accessed. Like below code:

typedef struct DF {double a[4]; long l; } DF;
double foo_df (DF arg){return arg.a[3];}

On ppc64le, with trunk gcc, "std 6,-24(1) ; lfd 1,-24(1)" is
generated.  While instruction "mtvsrd 1, 6" would be enough for
this case.

This patch updates the behavior when loading floating members of a
parameter: if that floating member is stored via integer register,
then loading it as integer mode first, and converting it to floating
mode.

I also thought of a method: before storing the register to stack,
convert it to float mode first. While there are some cases that may
still prefer to keep an integer register store. 
 

Bootstrap and regtest passes on ppc64{,le}.
I would ask for help to review for comments and if this patch is
acceptable for the trunk.


BR,
Jeff (Jiufu)

PR target/108073

gcc/ChangeLog:

* config/rs6000/rs6000.cc (TARGET_LOADING_INT_CONVERT_TO_FLOAT): New
macro definition.
(rs6000_loading_int_convert_to_float): New hook implement.
* doc/tm.texi: Regenerated.
* doc/tm.texi.in (loading_int_convert_to_float): New hook.
* expr.cc (expand_expr_real_1): Updated to use the new hook.
* target.def (loading_int_convert_to_float): New hook.

gcc/testsuite/ChangeLog:

* g++.target/powerpc/pr102024.C: Update.
* gcc.target/powerpc/pr108073.c: New test.

---
 gcc/config/rs6000/rs6000.cc | 70 +
 gcc/doc/tm.texi |  6 ++
 gcc/doc/tm.texi.in  |  2 +
 gcc/expr.cc | 15 +
 gcc/target.def  | 11 
 gcc/testsuite/g++.target/powerpc/pr102024.C |  2 +-
 gcc/testsuite/gcc.target/powerpc/pr108073.c | 24 +++
 7 files changed, 129 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/pr108073.c

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index b3a609f3aa3..af676eea276 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -1559,6 +1559,9 @@ static const struct attribute_spec 
rs6000_attribute_table[] =
 #undef TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN
 #define TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN invalid_arg_for_unprototyped_fn
 
+#undef TARGET_LOADING_INT_CONVERT_TO_FLOAT
+#define TARGET_LOADING_INT_CONVERT_TO_FLOAT rs6000_loading_int_convert_to_float
+
 #undef TARGET_MD_ASM_ADJUST
 #define TARGET_MD_ASM_ADJUST rs6000_md_asm_adjust
 
@@ -24018,6 +24021,73 @@ invalid_arg_for_unprototyped_fn (const_tree typelist, 
const_tree funcdecl, const
  : NULL;
 }
 
+/* Implement the TARGET_LOADING_INT_CONVERT_TO_FLOAT. */
+static rtx
+rs6000_loading_int_convert_to_float (machine_mode mode, rtx source, rtx base)
+{
+  rtx src_base = XEXP (source, 0);
+  poly_uint64 offset = MEM_OFFSET (source);
+
+  if (GET_CODE (src_base) == PLUS && CONSTANT_P (XEXP (src_base, 1)))
+{
+  offset += INTVAL (XEXP (src_base, 1));
+  src_base = XEXP (src_base, 0);
+}
+
+  if (!rtx_equal_p (XEXP (base, 0), src_base))
+return NULL_RTX;
+
+  rtx temp_reg = gen_reg_rtx (word_mode);
+  rtx temp_mem = copy_rtx (source);
+  PUT_MODE (temp_mem, word_mode);
+
+  /* DI->DF */
+  if (word_mode == DImode && mode == DFmode)
+{
+  if (multiple_p (offset, GET_MODE_SIZE (word_mode)))
+   {
+ emit_move_insn (temp_reg, temp_mem);
+ rtx float_subreg = simplify_gen_subreg (mode, temp_reg, word_mode, 0);
+ rtx target_reg = gen_reg_rtx (mode);
+ emit_move_insn (target_reg, float_subreg);
+ return target_reg;
+   }
+  return NULL_RTX;
+}
+
+  /* Sub DI#->SF */
+  if (word_mode == DImode && mode == SFmode)
+{
+  poly_uint64 byte_off = 0;
+  if (multiple_p (offset, GET_MODE_SIZE (word_mode)))
+   byte_off = 0;
+  else if (multiple_p (offset - GET_MODE_SIZE (mode),
+  GET_MODE_SIZE (word_mode)))
+   byte_off = GET_MODE_SIZE (mode);
+  else
+   return NULL_RTX;
+
+  temp_mem = adjust_address (temp_mem, word_mode, -byte_off);
+  emit_move_insn (temp_reg, temp_mem);
+
+  /* little endia only? */
+  poly_uint64 high_off = subreg_highpart_offset (SImode, word_mode);
+  if (known_eq (byte_off, high_off))
+   {
+ temp_reg = expand_shift (RSHIFT_EXPR, word_mode, temp_reg,
+  GET_MODE_PRECISION (SImode), temp_reg, 0);
+   }
+  rtx subreg_si = gen_reg_rtx (SImode);
+  emit_move_insn (subreg_si,  gen_lowpart (SImode, temp_reg));
+  rtx float_subreg = simplify_gen_subreg (mode, subreg_si, SImode, 0);
+  rtx target_reg = gen_reg_rtx (mode);
+  emit_move_insn (target_reg, float_subreg);
+  return target_reg;
+}
+

答复: [PATCH] i386: correct division modeling in lujiazui.md

[Mayshao-oc]

>Ping. If there are any questions or concerns about the patch, please let me
>know: I'm interested in continuing this cleanup at least for older AMD models.
>
Thanks for your patch.
We are running benchmark on speccpu2017 to get the performance number， it takes 
some time. 
If we get the result , we will give feedback right away. 
BR 
Mayshao
>I noticed I had an extra line in my Changelog:
>
>>  (lua_sseicvt_si): Ditto.
>
>It got there accidentally and I will drop it.
>
>Alexander
>
>On Fri, 9 Dec 2022, Alexander Monakov wrote:
>
>> Model the divider in Lujiazui processors as a separate automaton to 
>> significantly reduce the overall model size. This should also result 
>> in improved accuracy, as pipe 0 should be able to accept new 
>> instructions while the divider is occupied.
>> 
>> It is unclear why integer divisions are modeled as if pipes 0-3 are 
>> all occupied. I've opted to keep a single-cycle reservation of all 
>> four pipes together, so GCC should continue trying to pack 
>> instructions around a division accordingly.
>> 
>> Currently top three symbols in insn-automata.o are:
>> 
>> 106102 r lujiazui_core_check
>> 106102 r lujiazui_core_transitions
>> 196123 r lujiazui_core_min_issue_delay
>> 
>> This patch shrinks all lujiazui tables to:
>> 
>> 3 r lujiazui_decoder_min_issue_delay
>> 20 r lujiazui_decoder_transitions
>> 32 r lujiazui_agu_min_issue_delay
>> 126 r lujiazui_agu_transitions
>> 304 r lujiazui_div_base
>> 352 r lujiazui_div_check
>> 352 r lujiazui_div_transitions
>> 1152 r lujiazui_core_min_issue_delay
>> 1592 r lujiazui_agu_translate
>> 1592 r lujiazui_core_translate
>> 1592 r lujiazui_decoder_translate
>> 1592 r lujiazui_div_translate
>> 3952 r lujiazui_div_min_issue_delay
>> 9216 r lujiazui_core_transitions
>> 
>> This continues the work on reducing i386 insn-automata.o size started 
>> with similar fixes for division and multiplication instructions in 
>> znver.md [1][2]. I plan to submit corresponding fixes for 
>> b[td]ver[123].md as well.
>> 
>> [1] 
>> https://inbox.sourceware.org/gcc-patches/23c795d6-403c-5927-e610-f0f12
>> 15f5...@ispras.ru/T/#m36e069d43d07d768d4842a779e26b4a0915cc543
>> [2] 
>> https://inbox.sourceware.org/gcc-patches/20221101162637.14238-1-amonak
>> o...@ispras.ru/
>> 
>> gcc/ChangeLog:
>> 
>>  PR target/87832
>>  * config/i386/lujiazui.md (lujiazui_div): New automaton.
>>  (lua_div): New unit.
>>  (lua_idiv_qi): Correct unit in the reservation.
>>  (lua_idiv_qi_load): Ditto.
>>  (lua_idiv_hi): Ditto.
>>  (lua_idiv_hi_load): Ditto.
>>  (lua_idiv_si): Ditto.
>>  (lua_idiv_si_load): Ditto.
>>  (lua_idiv_di): Ditto.
>>  (lua_idiv_di_load): Ditto.
>>  (lua_fdiv_SF): Ditto.
>>  (lua_fdiv_SF_load): Ditto.
>>  (lua_fdiv_DF): Ditto.
>>  (lua_fdiv_DF_load): Ditto.
>>  (lua_fdiv_XF): Ditto.
>>  (lua_fdiv_XF_load): Ditto.
>>  (lua_ssediv_SF): Ditto.
>>  (lua_ssediv_load_SF): Ditto.
>>  (lua_ssediv_V4SF): Ditto.
>>  (lua_ssediv_load_V4SF): Ditto.
>>  (lua_ssediv_V8SF): Ditto.
>>  (lua_ssediv_load_V8SF): Ditto.
>>  (lua_ssediv_SD): Ditto.
>>  (lua_ssediv_load_SD): Ditto.
>>  (lua_ssediv_V2DF): Ditto.
>>  (lua_ssediv_load_V2DF): Ditto.
>>  (lua_ssediv_V4DF): Ditto.
>>  (lua_ssediv_load_V4DF): Ditto.
>>  (lua_sseicvt_si): Ditto.
>> ---
>>  gcc/config/i386/lujiazui.md | 58 
>> +++--
>>  1 file changed, 30 insertions(+), 28 deletions(-)
>> 
>> diff --git a/gcc/config/i386/lujiazui.md b/gcc/config/i386/lujiazui.md 
>> index 9046c09f2..58a230c70 100644
>> --- a/gcc/config/i386/lujiazui.md
>> +++ b/gcc/config/i386/lujiazui.md
>> @@ -19,8 +19,8 @@
>>  
>>  ;; Scheduling for ZHAOXIN lujiazui processor.
>>  
>> -;; Modeling automatons for decoders, execution pipes and AGU pipes.
>> -(define_automaton "lujiazui_decoder,lujiazui_core,lujiazui_agu")
>> +;; Modeling automatons for decoders, execution pipes, AGU pipes, and 
>> divider.
>> +(define_automaton 
>> +"lujiazui_decoder,lujiazui_core,lujiazui_agu,lujiazui_div")
>>  
>>  ;; The rules for the decoder are simple:
>>  ;;  - an instruction with 1 uop can be decoded by any of the three @@ 
>> -55,6 +55,8 @@ (define_reservation "lua_decoder01" 
>> "lua_decoder0|lua_decoder1")  (define_cpu_unit 
>> "lua_p0,lua_p1,lua_p2,lua_p3" "lujiazui_core")  (define_cpu_unit 
>> "lua_p4,lua_p5" "lujiazui_agu")
>>  
>> +(define_cpu_unit "lua_div" "lujiazui_div")
>> +
>>  (define_reservation "lua_p03" "lua_p0|lua_p3")  (define_reservation 
>> "lua_p12" "lua_p1|lua_p2")  (define_reservation "lua_p1p2" 
>> "lua_p1+lua_p2") @@ -229,56 +231,56 @@ (define_insn_reservation 
>> "lua_idiv_qi" 21
>>(and (eq_attr "memory" "none")
>> (and (eq_attr "mode" "QI")
>>  (eq_attr "type" "idiv"
>> - "lua_decoder0,lua_p0p1p2p3*21")
>> + "lua_decoder0,lua_p0p1p2p3,lua_di

Re: [PATCHv2] Use toplevel configure for GMP and MPFR for gdb

[Andrew Pinski via Gcc-patches]

On Tue, Dec 20, 2022 at 10:59 AM Tom Tromey  wrote:
>
> > "Andrew" == apinski--- via Gdb-patches  
> > writes:
>
> Andrew> From: Andrew Pinski 
> Andrew> This patch uses the toplevel configure parts for GMP/MPFR for
> Andrew> gdb. The only thing is that gdb now requires MPFR for building.
> Andrew> Before it was a recommended but not required library.
> Andrew> Also this allows building of GMP and MPFR with the toplevel
> Andrew> directory just like how it is done for GCC.
> Andrew> We now error out in the toplevel configure of the version
> Andrew> of GMP and MPFR that is wrong.
>
> Andrew> OK after GDB 13 branches? Build gdb 3 ways:
> Andrew> with GMP and MPFR in the toplevel (static library used at that point 
> for both)
> Andrew> With only MPFR in the toplevel (GMP distro library used and MPFR 
> built from source)
> Andrew> With neither GMP and MPFR in the toplevel (distro libraries used)
>
> I think it's fine to move forward with this now.
> Thank you again for doing this.

Just to double check this is an approval?

Jeff,
  Just to double check this is still ok for gcc repo even if we are in stage 3?

Thanks,
Andrew Pinski


>
> Tom

Re: [PATCH] rs6000: Fix some issues related to Power10 fusion [PR104024]

[Kewen.Lin via Gcc-patches]

Hi Segher,

on 2022/12/20 21:19, Segher Boessenkool wrote:
> Hi!
> 
> On Mon, Dec 19, 2022 at 02:13:49PM +0800, Kewen.Lin wrote:
>> on 2022/12/15 06:29, Segher Boessenkool wrote:
>>> On Wed, Nov 30, 2022 at 04:30:13PM +0800, Kewen.Lin wrote:
 --- a/gcc/config/rs6000/genfusion.pl
 +++ b/gcc/config/rs6000/genfusion.pl
 @@ -167,7 +167,7 @@ sub gen_logical_addsubf
$inner_comp, $inner_inv, $inner_rtl, $inner_op, $both_commute, $c4,
$bc, $inner_arg0, $inner_arg1, $inner_exp, $outer_arg2, $outer_exp,
$ftype, $insn, $is_subf, $is_rsubf, $outer_32, $outer_42,$outer_name,
 -  $fuse_type);
 +  $fuse_type, $constraint_cond);
KIND: foreach $kind ('scalar','vector') {
@outer_ops = @logicals;
if ( $kind eq 'vector' ) {
 @@ -176,12 +176,14 @@ sub gen_logical_addsubf
  $pred = "altivec_register_operand";
  $constraint = "v";
  $fuse_type = "fused_vector";
 +$constraint_cond = "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode) && ";
} else {
  $vchr = "";
  $mode = "GPR";
  $pred = "gpc_reg_operand";
  $constraint = "r";
  $fuse_type = "fused_arith_logical";
 +$constraint_cond = "";
  push (@outer_ops, @addsub);
  push (@outer_ops, ( "rsubf" ));
}
>>>
>>> I don't like this at all.  Please use the "isa" attribute where needed?
>>> Or do you need more in some cases?  But, again, separate patch.
>>
>> This is to add one more condition for those define_insns, for example:
> 
> Sure, I understand that.  What I don't like is the generator program is
> much too big and unstructured already, and this doesn't help at all; it
> makes it quite a bit worse even.

OK.

> 
>> It's to avoid the pseudo whose mode isn't available for register constraint v
>> causes ICE during reload.  I'm not sure how the "isa" attribute helps here,
>> could you elaborate it?
> 
> Yeah, it doesn't help.  The condition implied by the isa attribute is
> not added to the insn condition automatically; doing that could be too
> expensive, and disruptive as well.  Something for stage 1 :-)
> 

OK, thanks for the clarification.  :)

 +  if (TARGET_POWER10
 +  && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION) == 0)
 +rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
 +  else if (!TARGET_POWER10 && TARGET_P10_FUSION)
 +rs6000_isa_flags &= ~OPTION_MASK_P10_FUSION;
>>>
>>> That's not right.  If you want something like this you should check for
>>> TARGET_POWER10 whenever you check for TARGET_P10_FUSION; but there
>>> really is no reason at all to disable P10 fusion on other CPUs (neither
>>> newer nor older!).
>>
>> Good point, and I just noticed that we should check tune setting instead
>> of TARGET_POWER10 here?  Something like:
>>
>> if (!(rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION))
>>   {
>> if (processor_target_table[tune_index].processor == PROCESSOR_POWER10)
>>   rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
>> else
>>   rs6000_isa_flags &= ~OPTION_MASK_P10_FUSION;
>>   }
> 
> Yeah that looks better :-)
> 

I'm going to test this and commit it first.  :)

> Maybe you can restructure the Perl code a bit in a first patch, and then
> add the insn condition?  If you're not comfortable with Perl, I'll deal
> with it, just update the patch.

OK, I'll give it a try, TBH I just fixed the place for insn condition, didn't
look into this script, with a quick look, I'm going to factor out the main
body from the multiple level loop, do you have some suggestions on which other
candidates to be restructured?

BR,
Kewen

Re: [PATCH] libgo: check if -lucontext is required for {make, set, get}context

[Ian Lance Taylor via Gcc-patches]

On Mon, Dec 19, 2022 at 8:59 AM  wrote:
>
> From: Sören Tempel 
>
> This patch is similar to the existing check for librt. If libucontext
> is installed and libucontext.a provides the aforementioned symbols, then
> it is added to $LIBS. If not, no error is emitted. We could,
> alternatively, also check libc.a for these symbols and thus prefer libc
> over libucontext if both are installed and provide the symbols. If
> deemed desirable, this could be achieved by changing the invocation
> to AC_SEARCH_LIBS([makecontext], [c ucontext]).
>
> This version of this patch has been tested on x86_64 Alpine Linux Edge
> (libucontext 1.2 + musl 1.2.3) and Arch Linux (glibc 2.36). On the
> latter, the check is a no-op and $LIBS is not modified.

Thanks.  I don't see a reason to check for all the functions.
Committed like so after testing on x86_64-pc-linux-gnu with glibc.

Ian
e1e810e2f1d4f6c45021741cb3f8d7f2be15926d
diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE
index d8c4e02d6e6..d123c746fb2 100644
--- a/gcc/go/gofrontend/MERGE
+++ b/gcc/go/gofrontend/MERGE
@@ -1,4 +1,4 @@
-9906861dc86c1733bb304d3d45b1534adb32712c
+ecc2a2e70e44fa76a75b12d0893bc1702b72a1b4
 
 The first line of this file holds the git revision number of the last
 merge done from the gofrontend repository.
diff --git a/libgo/configure b/libgo/configure
index 460fdad70a8..a607dbff68e 100755
--- a/libgo/configure
+++ b/libgo/configure
@@ -14818,6 +14818,63 @@ fi
 
 
 
+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for library containing 
makecontext" >&5
+$as_echo_n "checking for library containing makecontext... " >&6; }
+if ${ac_cv_search_makecontext+:} false; then :
+  $as_echo_n "(cached) " >&6
+else
+  ac_func_search_save_LIBS=$LIBS
+cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+/* end confdefs.h.  */
+
+/* Override any GCC internal prototype to avoid an error.
+   Use char because int might match the return type of a GCC
+   builtin and then its argument prototype would still apply.  */
+#ifdef __cplusplus
+extern "C"
+#endif
+char makecontext ();
+int
+main ()
+{
+return makecontext ();
+  ;
+  return 0;
+}
+_ACEOF
+for ac_lib in '' ucontext; do
+  if test -z "$ac_lib"; then
+ac_res="none required"
+  else
+ac_res=-l$ac_lib
+LIBS="-l$ac_lib  $ac_func_search_save_LIBS"
+  fi
+  if ac_fn_c_try_link "$LINENO"; then :
+  ac_cv_search_makecontext=$ac_res
+fi
+rm -f core conftest.err conftest.$ac_objext \
+conftest$ac_exeext
+  if ${ac_cv_search_makecontext+:} false; then :
+  break
+fi
+done
+if ${ac_cv_search_makecontext+:} false; then :
+
+else
+  ac_cv_search_makecontext=no
+fi
+rm conftest.$ac_ext
+LIBS=$ac_func_search_save_LIBS
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_search_makecontext" >&5
+$as_echo "$ac_cv_search_makecontext" >&6; }
+ac_res=$ac_cv_search_makecontext
+if test "$ac_res" != no; then :
+  test "$ac_res" = "none required" || LIBS="$ac_res $LIBS"
+
+fi
+
+
 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for library containing 
sched_yield" >&5
 $as_echo_n "checking for library containing sched_yield... " >&6; }
 if ${ac_cv_search_sched_yield+:} false; then :
diff --git a/libgo/configure.ac b/libgo/configure.ac
index 09554a37a23..a59aa091d1d 100644
--- a/libgo/configure.ac
+++ b/libgo/configure.ac
@@ -570,6 +570,9 @@ PTHREAD_LIBS=
 AC_CHECK_LIB([pthread], [pthread_create], PTHREAD_LIBS=-lpthread)
 AC_SUBST(PTHREAD_LIBS)
 
+dnl Test if -lucontext is required for makecontext.
+AC_SEARCH_LIBS([makecontext], [ucontext])
+
 dnl Test if -lrt is required for sched_yield or nanosleep or clock_gettime.
 AC_SEARCH_LIBS([sched_yield], [rt])
 AC_SEARCH_LIBS([nanosleep], [rt])

[PATCH, committed] rs6000: Fix the wrong location of OPTION_MASK_P10_FUSION setting hunk

[Kewen.Lin via Gcc-patches]

Hi,
 
The hunk for setting flag OPTION_MASK_P10_FUSION locates wrongly
between the if and else if block for OPTION_MASK_MMA.  This is
to fix this oversight accordingly.

Bootstrapped and regtested on powerpc64-linux-gnu P8 and
powerpc64le-linux-gnu P9 and P10.

IMO this is obvious, already committed in r13-4816-gfb73bfdb67789f.

BR,
Kewen
-
gcc/ChangeLog:

* config/rs6000/rs6000.cc (rs6000_option_override_internal): Fix the
location for OPTION_MASK_P10_FUSION flag setting.
---
 gcc/config/rs6000/rs6000.cc | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index eb7ad5e954f..88c865b6b4b 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -4369,10 +4369,6 @@ rs6000_option_override_internal (bool global_init_p)
   if (TARGET_POWER10 && (rs6000_isa_flags_explicit & OPTION_MASK_MMA) == 0)
 rs6000_isa_flags |= OPTION_MASK_MMA;

-  if (TARGET_POWER10
-  && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION) == 0)
-rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
-
   /* Turn off vector pair/mma options on non-power10 systems.  */
   else if (!TARGET_POWER10 && TARGET_MMA)
 {
@@ -4382,6 +4378,10 @@ rs6000_option_override_internal (bool global_init_p)
   rs6000_isa_flags &= ~OPTION_MASK_MMA;
 }

+  if (TARGET_POWER10
+  && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION) == 0)
+rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
+
   /* MMA requires SIMD support as ISA 3.1 claims and our implementation
  such as "*movoo" uses vector pair access which use VSX registers.
  So make MMA require VSX support here.  */
--
2.27.0

Re: [PATCH] rs6000: Raise error for __vector_{quad, pair} uses without MMA enabled [PR106736]

[Kewen.Lin via Gcc-patches]

on 2022/12/21 02:56, Segher Boessenkool wrote:
> On Wed, Dec 14, 2022 at 07:21:20PM +0800, Kewen.Lin wrote:
>> I'm going to push this next week if no objections.
> 
> Please do?
> 

Thanks!  Committed in r13-4814-g282462b39584ae.

BR,
Kewen

Re: [PATCH] fold-const: Treat fp conversion to a type with same mode as copy

[Kewen.Lin via Gcc-patches]

on 2022/12/20 20:14, Jakub Jelinek wrote:
> On Mon, Dec 19, 2022 at 04:11:59PM +0800, Kewen.Lin wrote:
>> In function fold_convert_const_real_from_real, when the modes of
>> two types involved in fp conversion are the same, we can simply
>> take it as copy, rebuild with the exactly same TREE_REAL_CST and
>> the target type.  It is more efficient and helps to avoid possible
>> unexpected signalling bit clearing in [1].
>>
>> Bootstrapped and regtested on x86_64-redhat-linux, aarch64-linux-gnu
>> and powerpc64{,le}-linux-gnu.
>>
>> Is it ok for trunk?
>>
>> [1] https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608533.html
>>
>> gcc/ChangeLog:
>>
>>  * fold-const.cc (fold_convert_const_real_from_real): Treat floating
>>  point conversion to a type with same mode as copy instead of normal
>>  convertFormat.
> 
> The patch is ok for trunk.  Thanks.
> 

Thanks!  Committed in r13-4815-g94cf7a2d95bf6d.

BR,
Kewen

Re: [PATCH RFA(tree)] c++: source position of lambda captures [PR84471]

[Jason Merrill via Gcc-patches]

On 12/20/22 14:39, Richard Biener wrote:




Am 20.12.2022 um 18:38 schrieb Jason Merrill :

On 12/20/22 07:07, Richard Biener wrote:

On Fri, Dec 2, 2022 at 4:46 PM Jason Merrill via Gcc-patches
 wrote:

Tested x86_64-pc-linux-gnu, OK for trunk?

-- 8< --

If the DECL_VALUE_EXPR of a VAR_DECL has EXPR_LOCATION set, then any use of
that variable looks like it has that location, which leads to the debugger
jumping back and forth for both lambdas and structured bindings.

Rather than fix all the uses, it seems simplest to remove any EXPR_LOCATION
when setting DECL_VALUE_EXPR.  So the cp/ hunks aren't necessary, but it
seems cleaner not to work to add a location that will immediately get
stripped.

 PR c++/84471
 PR c++/107504

gcc/cp/ChangeLog:

 * coroutines.cc (transform_local_var_uses): Don't
 specify a location for DECL_VALUE_EXPR.
 * decl.cc (cp_finish_decomp): Likewise.

gcc/ChangeLog:

 * tree.cc (decl_value_expr_insert): Clear EXPR_LOCATION.

gcc/testsuite/ChangeLog:

 * g++.dg/tree-ssa/value-expr1.C: New test.
 * g++.dg/tree-ssa/value-expr2.C: New test.
 * g++.dg/analyzer/pr93212.C: Move warning.
---
  gcc/cp/coroutines.cc|  4 ++--
  gcc/cp/decl.cc  | 12 +++---
  gcc/testsuite/g++.dg/analyzer/pr93212.C |  4 ++--
  gcc/testsuite/g++.dg/tree-ssa/value-expr1.C | 16 +
  gcc/testsuite/g++.dg/tree-ssa/value-expr2.C | 26 +
  gcc/tree.cc |  3 +++
  6 files changed, 52 insertions(+), 13 deletions(-)
  create mode 100644 gcc/testsuite/g++.dg/tree-ssa/value-expr1.C
  create mode 100644 gcc/testsuite/g++.dg/tree-ssa/value-expr2.C

diff --git a/gcc/cp/coroutines.cc b/gcc/cp/coroutines.cc
index 01a3e831ee5..a72bd6bbef0 100644
--- a/gcc/cp/coroutines.cc
+++ b/gcc/cp/coroutines.cc
@@ -2047,8 +2047,8 @@ transform_local_var_uses (tree *stmt, int *do_subtree, 
void *d)
 = lookup_member (lvd->coro_frame_type, local_var.field_id,
  /*protect=*/1, /*want_type=*/0,
  tf_warning_or_error);
- tree fld_idx = build3_loc (lvd->loc, COMPONENT_REF, TREE_TYPE (lvar),
-lvd->actor_frame, fld_ref, NULL_TREE);
+ tree fld_idx = build3 (COMPONENT_REF, TREE_TYPE (lvar),
+lvd->actor_frame, fld_ref, NULL_TREE);
   local_var.field_idx = fld_idx;
   SET_DECL_VALUE_EXPR (lvar, fld_idx);
   DECL_HAS_VALUE_EXPR_P (lvar) = true;
diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc
index 7af0b05d5f8..59e21581503 100644
--- a/gcc/cp/decl.cc
+++ b/gcc/cp/decl.cc
@@ -9133,9 +9133,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
count)
   if (processing_template_decl)
 continue;
   tree t = unshare_expr (dexp);
- t = build4_loc (DECL_SOURCE_LOCATION (v[i]), ARRAY_REF,
- eltype, t, size_int (i), NULL_TREE,
- NULL_TREE);
+ t = build4 (ARRAY_REF, eltype, t, size_int (i), NULL_TREE, NULL_TREE);
   SET_DECL_VALUE_EXPR (v[i], t);
   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
 }
@@ -9154,9 +9152,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
count)
   if (processing_template_decl)
 continue;
   tree t = unshare_expr (dexp);
- t = build1_loc (DECL_SOURCE_LOCATION (v[i]),
- i ? IMAGPART_EXPR : REALPART_EXPR, eltype,
- t);
+ t = build1 (i ? IMAGPART_EXPR : REALPART_EXPR, eltype, t);
   SET_DECL_VALUE_EXPR (v[i], t);
   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
 }
@@ -9180,9 +9176,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
count)
   tree t = unshare_expr (dexp);
   convert_vector_to_array_for_subscript (DECL_SOURCE_LOCATION (v[i]),
  &t, size_int (i));
- t = build4_loc (DECL_SOURCE_LOCATION (v[i]), ARRAY_REF,
- eltype, t, size_int (i), NULL_TREE,
- NULL_TREE);
+ t = build4 (ARRAY_REF, eltype, t, size_int (i), NULL_TREE, NULL_TREE);
   SET_DECL_VALUE_EXPR (v[i], t);
   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
 }
diff --git a/gcc/testsuite/g++.dg/analyzer/pr93212.C 
b/gcc/testsuite/g++.dg/analyzer/pr93212.C
index 41507e2b837..1029e8d547b 100644
--- a/gcc/testsuite/g++.dg/analyzer/pr93212.C
+++ b/gcc/testsuite/g++.dg/analyzer/pr93212.C
@@ -4,8 +4,8 @@
  auto lol()
  {
  int aha = 3;
-return [&aha] { // { dg-warning "dereferencing pointer '.*' to within stale 
stack frame" }
-return aha;
+return [&aha] {
+return aha; // { dg-warning "dereferencing pointer '.*' to within stale 
stack frame" }
  };
  /* TODO: may be worth special-casing the reporting of dangling
 referen

Re: [PATCH] libstdc++: Don't call 4-5 argument to_chars with chars_format{}

[Jonathan Wakely via Gcc-patches]

On Tue, 20 Dec 2022 at 08:47, Jakub Jelinek  wrote:
>
> Hi!
>
> In Fedora build libstdc++.so is built with assertions enabled and
> FAIL: 20_util/to_chars/float128_c++23.cc execution test
> was failing on all arches.  The problem is that it called 5 argument version
> of to_chars with chars_format{}, which C++ says is invalid:
> http://eel.is/c++draft/charconv.to.chars#12
> Preconditions: fmt has the value of one of the enumerators of chars_format.
>
> The following patch fixes it by skipping the second part of the test
> which needs the 5 argument to_chars for chars_format{}, but because
> it is strictly speaking invalid also for 4 argument to_chars, it uses
> 3 argument to_chars instead of 4 argument to_chars with last argument
> chars_format{}.
>
> Bootstrapped/regtested on {x86_64,i686,aarch64,powerpc64le,s390x}-linux, ok
> for trunk?

OK, thanks.

>
> 2022-12-20  Jakub Jelinek  
>
> * testsuite/20_util/to_chars/float16_c++23.cc (test): Use 3 argument
> std::to_chars if fmt is std::chars_format{}, rather than 4 argument.
> * testsuite/20_util/to_chars/float128_c++23.cc (test): Likewise, and
> skip second part of testing that requires 5 argument std::to_chars.
>
> --- libstdc++-v3/testsuite/20_util/to_chars/float16_c++23.cc.jj 2022-11-01 
> 22:45:50.653626818 +0100
> +++ libstdc++-v3/testsuite/20_util/to_chars/float16_c++23.cc2022-12-19 
> 16:23:28.989733811 +0100
> @@ -36,9 +36,16 @@ test(std::chars_format fmt = std::chars_
>for (int i = 0; i <= (unsigned short) ~0; ++i)
>  {
>u.s = i;
> -  auto [ptr1, ec1] = std::to_chars(str1, str1 + sizeof(str1), u.f, fmt);
> -  auto [ptr2, ec2] = std::to_chars(str2, str2 + sizeof(str2), 
> std::float32_t(u.f), fmt);
> -  VERIFY( ec1 == std::errc() && ec2 == std::errc());
> +  auto [ptr1, ec1] = (fmt == std::chars_format{}
> + ? std::to_chars(str1, str1 + sizeof(str1), u.f)
> + : std::to_chars(str1, str1 + sizeof(str1), u.f,
> + fmt));
> +  auto [ptr2, ec2] = (fmt == std::chars_format{}
> + ? std::to_chars(str2, str2 + sizeof(str2),
> + std::float32_t(u.f))
> + : std::to_chars(str2, str2 + sizeof(str2),
> + std::float32_t(u.f), fmt));
> +  VERIFY( ec1 == std::errc() && ec2 == std::errc() );
>  //std::cout << i << ' ' << std::string_view (str1, ptr1)
>  // << '\t' << std::string_view (str2, ptr2) << '\n';
>if (fmt == std::chars_format::fixed)
> --- libstdc++-v3/testsuite/20_util/to_chars/float128_c++23.cc.jj
> 2022-11-25 22:23:44.540104246 +0100
> +++ libstdc++-v3/testsuite/20_util/to_chars/float128_c++23.cc   2022-12-19 
> 16:24:49.142571475 +0100
> @@ -60,7 +60,9 @@ test(std::chars_format fmt = std::chars_
>char str1[1], str2[1];
>for (auto u : tests)
>  {
> -  auto [ptr1, ec1] = std::to_chars(str1, str1 + sizeof(str1), u, fmt);
> +  auto [ptr1, ec1] = (fmt == std::chars_format{}
> + ? std::to_chars(str1, str1 + sizeof(str1), u)
> + : std::to_chars(str1, str1 + sizeof(str1), u, fmt));
>VERIFY( ec1 == std::errc() );
>  //std::cout << u << ' ' << std::string_view (str1, ptr1) << '\n';
>if (fmt == std::chars_format::fixed)
> @@ -77,13 +79,14 @@ test(std::chars_format fmt = std::chars_
>VERIFY( ec4 == std::errc() && ptr4 == ptr1 );
>VERIFY( u == v );
>
> +  if (fmt == std::chars_format{})
> +   continue;
> +
>auto [ptr5, ec5] = std::to_chars(str1, str1 + sizeof(str1), u, fmt, 
> 90);
>VERIFY( ec5 == std::errc() );
>  //std::cout << u << ' ' << std::string_view (str1, ptr5) << '\n';
>v = 4.0f128;
> -  auto [ptr6, ec6] = std::from_chars(str1, ptr5, v,
> -fmt == std::chars_format{}
> -? std::chars_format::general : fmt);
> +  auto [ptr6, ec6] = std::from_chars(str1, ptr5, v, fmt);
>VERIFY( ec6 == std::errc() && ptr6 == ptr5 );
>if (fmt == std::chars_format::fixed && u > 0.0f128 && u < 0.01f128)
> VERIFY( v == 0.0 );
>
> Jakub
>

Re: Re: [PATCH] RISC-V: Fix incorrect annotation

[Palmer Dabbelt]

On Tue, 20 Dec 2022 15:33:11 PST (-0800), juzhe.zh...@rivai.ai wrote:

Thanks. I received an email from sourceware:
"You should now have write access to the source control repository for your 
project."
It seems that I can merge codes? However, I still don't know how to merge codes.


You should have a sourceware account, along with an associated private 
key.  With those you should be able to get push access via 
https://gcc.gnu.org/gitwrite.html





juzhe.zh...@rivai.ai
 
From: Jeff Law

Date: 2022-12-21 00:02
To: juzhe.zhong
CC: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; pal...@dabbelt.com
Subject: Re: [PATCH] RISC-V: Fix incorrect annotation
 
 
On 12/19/22 17:38, juzhe.zhong wrote:

Would you mind merging it for me？ I can‘t merge code.
Do you mean you do not have write access to the repository?  If so, that 
can be easily fixed.
 
https://sourceware.org/cgi-bin/pdw/ps_form.cgi
 
List me as your sponsor.
 
jeff
 

Re: Re: [PATCH] RISC-V: Fix incorrect annotation

[钟居哲]

Thanks. I received an email from sourceware:
"You should now have write access to the source control repository for your 
project."
It seems that I can merge codes? However, I still don't know how to merge codes.


juzhe.zh...@rivai.ai
 
From: Jeff Law
Date: 2022-12-21 00:02
To: juzhe.zhong
CC: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; pal...@dabbelt.com
Subject: Re: [PATCH] RISC-V: Fix incorrect annotation
 
 
On 12/19/22 17:38, juzhe.zhong wrote:
> Would you mind merging it for me？ I can‘t merge code.
Do you mean you do not have write access to the repository?  If so, that 
can be easily fixed.
 
https://sourceware.org/cgi-bin/pdw/ps_form.cgi
 
List me as your sponsor.
 
jeff
 

Re: testsuite: Fix pr55569.c excess errors

[Jonathan Yong via Gcc-patches]

On 12/20/22 16:55, Andrew Pinski wrote:

On Tue, Dec 20, 2022 at 1:22 AM Jonathan Yong via Gcc-patches
 wrote:


This fixes the following:


It is not obvious from the email, why this patch is needed but I
figured it was due to LLP64 targets or some other targets where long
is not the same size of the size_t type.
I think this patch is good but I cannot approve it. The commit message
should be improved to make a mention of LLP64 targets and long being a
smaller size than size_t.

Thanks,
Andrew



You are right that this is for LLP64 win32. I will change the subject to 
"testsuite: Fix pr55569.c excess errors on LLP64"


This fixes the following on LLP64 mingw-w64 target:

Excess errors:

gcc/testsuite/gcc.c-torture/compile/pr55569.c:13:12: warning: overflow 
in conversion from 'long long unsigned int' to 'long int' changes value 
from '4611686018427387903' to '-1' [-Woverflow]


gcc/testsuite/gcc.c-torture/compile/pr55569.c:13:34: warning: iteration 
2147483647 invokes undefined behavior [-Waggressive-loop-optimizations]

[PATCH]AArch64 relax constraints on FP16 insn PR108172

[Tamar Christina via Gcc-patches]

Hi All,

The move, load, load, store, dup, basically all the non arithmetic FP16
instructions use baseline armv8-a HF support, and so do not require the
Armv8.2-a extensions.  This relaxes the instructions.

Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.

Ok for master?

Thanks,
Tamar

gcc/ChangeLog:

PR target/108172
* config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): Relax
TARGET_SIMD_F16INST to TARGET_SIMD.
* config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Re-order.
* config/aarch64/iterators.md (VMOVE): Drop TARGET_SIMD_F16INST.

gcc/testsuite/ChangeLog:

PR target/108172
* gcc.target/aarch64/pr108172.c: New test.

--- inline copy of patch -- 
diff --git a/gcc/config/aarch64/aarch64-simd.md 
b/gcc/config/aarch64/aarch64-simd.md
index 
a62b6deaf4a57e570074d7d894e6fac13779f6fb..8a9f655d547285ec7bdc173086308d7d44a8d482
 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -164,7 +164,7 @@ (define_insn "*aarch64_simd_movv2hf"
"=w, m,  m,  w, ?r, ?w, ?r, w, w")
(match_operand:V2HF 1 "general_operand"
"m,  Dz, w,  w,  w,  r,  r, Dz, Dn"))]
-  "TARGET_SIMD_F16INST
+  "TARGET_SIMD
&& (register_operand (operands[0], V2HFmode)
|| aarch64_simd_reg_or_zero (operands[1], V2HFmode))"
"@
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 
73515c174fa4fe7830527e7eabd91c4648130ff4..d1c0476321b79bc6aded350d24ea5d556c796519
 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -3616,6 +3616,8 @@ aarch64_classify_vector_mode (machine_mode mode)
 case E_V4x2DFmode:
   return TARGET_FLOAT ? VEC_ADVSIMD | VEC_STRUCT : 0;
 
+/* 32-bit Advanced SIMD vectors.  */
+case E_V2HFmode:
 /* 64-bit Advanced SIMD vectors.  */
 case E_V8QImode:
 case E_V4HImode:
@@ -3634,7 +3636,6 @@ aarch64_classify_vector_mode (machine_mode mode)
 case E_V8BFmode:
 case E_V4SFmode:
 case E_V2DFmode:
-case E_V2HFmode:
   return TARGET_FLOAT ? VEC_ADVSIMD : 0;
 
 default:
diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md
index 
a521dbde1ec42c0c442a9ca3dd52c9727d116399..70742520984d30158e62a38c92abea82b2dac059
 100644
--- a/gcc/config/aarch64/iterators.md
+++ b/gcc/config/aarch64/iterators.md
@@ -204,8 +204,7 @@ (define_mode_iterator VALL_F16 [V8QI V16QI V4HI V8HI V2SI 
V4SI V2DI
 ;; All Advanced SIMD modes suitable for moving, loading, and storing
 ;; including V2HF
 (define_mode_iterator VMOVE [V8QI V16QI V4HI V8HI V2SI V4SI V2DI
-V4HF V8HF V4BF V8BF V2SF V4SF V2DF
-(V2HF "TARGET_SIMD_F16INST")])
+V2HF V4HF V8HF V4BF V8BF V2SF V4SF V2DF])
 
 
 ;; The VALL_F16 modes except the 128-bit 2-element ones.
diff --git a/gcc/testsuite/gcc.target/aarch64/pr108172.c 
b/gcc/testsuite/gcc.target/aarch64/pr108172.c
new file mode 100644
index 
..b29054fdb1d6e602755bc93089f1edec4eb53b8e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr108172.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O0" } */
+
+typedef _Float16 v4hf __attribute__ ((vector_size (8)));
+typedef _Float16 v2hf __attribute__ ((vector_size (4)));
+
+v4hf
+v4hf_abi_1 (v4hf a)
+{
+  return a;
+}
+
+v4hf
+v4hf_abi_3 (v4hf a, v4hf b, v4hf c)
+{
+  return c;
+}
+
+v4hf
+v4hf_abi_4 (v4hf a, v4hf b, v4hf c, v4hf d)
+{
+  return d;
+}
+
+v2hf
+v2hf_test (v2hf a, v2hf b, v2hf c, v2hf d)
+{
+  return b;
+}
+




-- 
diff --git a/gcc/config/aarch64/aarch64-simd.md 
b/gcc/config/aarch64/aarch64-simd.md
index 
a62b6deaf4a57e570074d7d894e6fac13779f6fb..8a9f655d547285ec7bdc173086308d7d44a8d482
 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -164,7 +164,7 @@ (define_insn "*aarch64_simd_movv2hf"
"=w, m,  m,  w, ?r, ?w, ?r, w, w")
(match_operand:V2HF 1 "general_operand"
"m,  Dz, w,  w,  w,  r,  r, Dz, Dn"))]
-  "TARGET_SIMD_F16INST
+  "TARGET_SIMD
&& (register_operand (operands[0], V2HFmode)
|| aarch64_simd_reg_or_zero (operands[1], V2HFmode))"
"@
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 
73515c174fa4fe7830527e7eabd91c4648130ff4..d1c0476321b79bc6aded350d24ea5d556c796519
 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -3616,6 +3616,8 @@ aarch64_classify_vector_mode (machine_mode mode)
 case E_V4x2DFmode:
   return TARGET_FLOAT ? VEC_ADVSIMD | VEC_STRUCT : 0;
 
+/* 32-bit Advanced SIMD vectors.  */
+case E_V2HFmode:
 /* 64-bit Advanced SIMD vectors.  */
 case E_V8QImode:
 case E_V4HImode:
@@ -3634,7 +3636,6 @@ aarch64_classify_vector_mode (machine_mode mode)
 case E_V8BFmode:
 case E_V4SFmode:
 case E_V2DFmode:
-case E_V2HFmode:
   return TA

Re: [PATCH] c++, tree: walk TREE_VEC (and VECTOR_CST) in natural order [PR101886]

[Jason Merrill via Gcc-patches]

On 12/20/22 10:30, Patrick Palka wrote:

Unfortunately the extract_autos_r fix in r13-4799-ga7c8036b26082d is
derailed by the fact that walk_tree_1 currently walks the elements of a
TREE_VEC in reverse, which means for A in the below testcase
extract_autos_r ends up adjusting the TEMPLATE_TYPE_IDX of the first
auto rather than the second one, and the first auto is the canonical
auto of level 2 and index 0, so we rightfully trigger the sanity check
added in that commit.

It seems TREE_VEC and VECTOR_CST are the only trees that we walk in
reverse, and this has been the case since r21884 whence the original
version of walk_tree_1 was introduced.  But that's arguably unnatural
and inconsistent with how we walk other compound trees such as
CONSTRUCTORs and EXPR_P trees.  So this patch makes walk_tree_1 walk
these trees in forward order, which fixes the below testcase.  This in
turn revealed that keep_template_parm builds up the list of found
template parameters in reverse, which previously compensated for the
TREE_VEC behavior, but now we should be building the list in the natural
order as well for sake of pretty printing parameter mappings.

Bootstrapped and regtested on x86_64-pc-linux-gnu with
--enable-languages=all,ada,go does this look OK for trunk?


OK.


PR c++/101886

gcc/cp/ChangeLog:

* pt.cc (find_template_parameter_info::parm_list_tail):
New data member.
(keep_template_parm): Use parm_list_tail to append rather
than prepend to parm_list.

gcc/ChangeLog:

* tree.cc (walk_tree_1) : Walk the elements
in the natural order.
: Likewise.

gcc/testsuite/ChangeLog:

* g++.dg/concepts/diagnostic12.C: Adjust expected order of
template parameters within parameter mapping.
* g++.dg/concepts/auto6.C: New test.
---
  gcc/cp/pt.cc | 13 +
  gcc/testsuite/g++.dg/concepts/auto6.C| 14 ++
  gcc/testsuite/g++.dg/concepts/diagnostic12.C |  2 +-
  gcc/tree.cc  | 20 ++--
  4 files changed, 34 insertions(+), 15 deletions(-)
  create mode 100644 gcc/testsuite/g++.dg/concepts/auto6.C

diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index 2b7b3756b68..df125a63785 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -10640,14 +10640,14 @@ for_each_template_parm (tree t, tree_fn_t fn, void* 
data,
  struct find_template_parameter_info
  {
explicit find_template_parameter_info (tree ctx_parms)
-: parm_list (NULL_TREE),
-  ctx_parms (ctx_parms),
+: ctx_parms (ctx_parms),
max_depth (TMPL_PARMS_DEPTH (ctx_parms))
{}
  
hash_set visited;

hash_set parms;
-  tree parm_list;
+  tree parm_list = NULL_TREE;
+  tree *parm_list_tail = &parm_list;
tree ctx_parms;
int max_depth;
  };
@@ -10693,7 +10693,12 @@ keep_template_parm (tree t, void* data)
if (TYPE_P (t))
  t = TYPE_MAIN_VARIANT (t);
if (!ftpi->parms.add (t))
-ftpi->parm_list = tree_cons (NULL_TREE, t, ftpi->parm_list);
+{
+  /* Append T to PARM_LIST.  */
+  tree node = build_tree_list (NULL_TREE, t);
+  *ftpi->parm_list_tail = node;
+  ftpi->parm_list_tail = &TREE_CHAIN (node);
+}
  
/* Verify the parameter we found has a valid index.  */

if (flag_checking)
diff --git a/gcc/testsuite/g++.dg/concepts/auto6.C 
b/gcc/testsuite/g++.dg/concepts/auto6.C
new file mode 100644
index 000..1f6d72e54cc
--- /dev/null
+++ b/gcc/testsuite/g++.dg/concepts/auto6.C
@@ -0,0 +1,14 @@
+// PR c++/101886
+// { dg-do compile { target c++17_only } }
+// { dg-options "-fconcepts-ts" }
+
+template struct A { };
+
+template
+void f() {
+  A a;
+  A b1 = a;
+  A b2 = a;
+}
+
+template void f();
diff --git a/gcc/testsuite/g++.dg/concepts/diagnostic12.C 
b/gcc/testsuite/g++.dg/concepts/diagnostic12.C
index 548ba9c1b3d..8086500760b 100644
--- a/gcc/testsuite/g++.dg/concepts/diagnostic12.C
+++ b/gcc/testsuite/g++.dg/concepts/diagnostic12.C
@@ -3,7 +3,7 @@
  
  template

concept c1 = requires (T t, Args... args) { *t; };
-// { dg-message "in requirements with .T t., .Args ... args. .with Args = \{\}; T = int" 
"" { target *-*-* } .-1 }
+// { dg-message "in requirements with .T t., .Args ... args. .with T = int; Args = \{\}" 
"" { target *-*-* } .-1 }
  
  static_assert(c1); // { dg-error "failed" }
  
diff --git a/gcc/tree.cc b/gcc/tree.cc

index 0a51f9ddb4d..92199bb6503 100644
--- a/gcc/tree.cc
+++ b/gcc/tree.cc
@@ -11310,12 +11310,12 @@ walk_tree_1 (tree *tp, walk_tree_fn func, void *data,
if (len == 0)
  break;
  
-	/* Walk all elements but the first.  */

-   while (--len)
- WALK_SUBTREE (TREE_VEC_ELT (*tp, len));
+   /* Walk all elements but the last.  */
+   for (int i = 0; i < len - 1; ++i)
+ WALK_SUBTREE (TREE_VEC_ELT (*tp, i));
  
-	/* Now walk the first one as a tail call.  */

-   WALK_SUBTREE_TAIL (TREE_VEC_ELT (*tp, 0));
+   /* Now walk the last one as a tail call

Re: [PATCH] Fortran: a C interoperable function cannot have the CLASS attribute [PR95375]

[Steve Kargl via Gcc-patches]

On Tue, Dec 20, 2022 at 09:40:23PM +0100, Harald Anlauf via Fortran wrote:
> 
> we obviously forgot to extend the C interoperability check of the
> type of function results to CLASS variables and thus did not reject
> them.  Wrong code could lead to an ICE, see testcase by Gerhard.
> 
> Regtested on x86_64-pc-linux-gnu.  OK for mainline?
> 

Yes.  Thanks for the patch.

--
Steve

[PATCH] Fortran: a C interoperable function cannot have the CLASS attribute [PR95375]

[Harald Anlauf via Gcc-patches]

Dear all,

we obviously forgot to extend the C interoperability check of the
type of function results to CLASS variables and thus did not reject
them.  Wrong code could lead to an ICE, see testcase by Gerhard.

Regtested on x86_64-pc-linux-gnu.  OK for mainline?

Thanks,
Harald

From dc22544c2412cf8810a4956f537a2f50e0711a05 Mon Sep 17 00:00:00 2001
From: Harald Anlauf 
Date: Tue, 20 Dec 2022 21:17:08 +0100
Subject: [PATCH] Fortran: a C interoperable function cannot have the CLASS
 attribute [PR95375]

gcc/fortran/ChangeLog:

	PR fortran/95375
	* decl.cc (verify_bind_c_sym): Extend interoperability check to
	CLASS variables.

gcc/testsuite/ChangeLog:

	PR fortran/95375
	* gfortran.dg/bind_c_procs_4.f90: New test.
---
 gcc/fortran/decl.cc  | 12 
 gcc/testsuite/gfortran.dg/bind_c_procs_4.f90 | 17 +
 2 files changed, 25 insertions(+), 4 deletions(-)
 create mode 100644 gcc/testsuite/gfortran.dg/bind_c_procs_4.f90

diff --git a/gcc/fortran/decl.cc b/gcc/fortran/decl.cc
index 1562dc22bc6..e593518a77e 100644
--- a/gcc/fortran/decl.cc
+++ b/gcc/fortran/decl.cc
@@ -5998,10 +5998,14 @@ verify_bind_c_sym (gfc_symbol *tmp_sym, gfc_typespec *ts,
 	}
 	  else
 	{
-  if (tmp_sym->ts.type == BT_DERIVED || ts->type == BT_DERIVED)
-gfc_error ("Type declaration %qs at %L is not C "
-   "interoperable but it is BIND(C)",
-   tmp_sym->name, &(tmp_sym->declared_at));
+	  if (tmp_sym->ts.type == BT_DERIVED || ts->type == BT_DERIVED
+		  || tmp_sym->ts.type == BT_CLASS || ts->type == BT_CLASS)
+		{
+		  gfc_error ("Type declaration %qs at %L is not C "
+			 "interoperable but it is BIND(C)",
+			 tmp_sym->name, &(tmp_sym->declared_at));
+		  retval = false;
+		}
   else if (warn_c_binding_type)
 gfc_warning (OPT_Wc_binding_type, "Variable %qs at %L "
  "may not be a C interoperable "
diff --git a/gcc/testsuite/gfortran.dg/bind_c_procs_4.f90 b/gcc/testsuite/gfortran.dg/bind_c_procs_4.f90
new file mode 100644
index 000..407d8bb9afc
--- /dev/null
+++ b/gcc/testsuite/gfortran.dg/bind_c_procs_4.f90
@@ -0,0 +1,17 @@
+! { dg-do compile }
+! PR fortran/95375 - ICE in add_use_op
+! Contributed by G.Steinmetz
+
+function f() result(n) bind(c)  ! { dg-error "not C interoperable" }
+  class(*), allocatable :: n
+end
+program p
+  interface
+ function f() result(n) bind(c)
+   integer :: n
+ end
+  end interface
+  if ( f() /= 0 ) stop
+end
+
+! { dg-prune-output "Type mismatch" }
--
2.35.3

Re: [C PATCH] remove same_translation_unit_p

[Joseph Myers]

On Tue, 20 Dec 2022, Martin Uecker via Gcc-patches wrote:

> Here is a patch to remove the unused function
> same_translation_unit_p and related code. The
> code to check for structural equivalency of
> structs / unions is kept (with some fixes)
> because it will be needed for C2X.

Could you repost this in development stage 1, since this is not a bug fix?

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: [PATCH RFA(tree)] c++: source position of lambda captures [PR84471]

[Richard Biener via Gcc-patches]

> Am 20.12.2022 um 18:38 schrieb Jason Merrill :
> 
> On 12/20/22 07:07, Richard Biener wrote:
>>> On Fri, Dec 2, 2022 at 4:46 PM Jason Merrill via Gcc-patches
>>>  wrote:
>>> 
>>> Tested x86_64-pc-linux-gnu, OK for trunk?
>>> 
>>> -- 8< --
>>> 
>>> If the DECL_VALUE_EXPR of a VAR_DECL has EXPR_LOCATION set, then any use of
>>> that variable looks like it has that location, which leads to the debugger
>>> jumping back and forth for both lambdas and structured bindings.
>>> 
>>> Rather than fix all the uses, it seems simplest to remove any EXPR_LOCATION
>>> when setting DECL_VALUE_EXPR.  So the cp/ hunks aren't necessary, but it
>>> seems cleaner not to work to add a location that will immediately get
>>> stripped.
>>> 
>>> PR c++/84471
>>> PR c++/107504
>>> 
>>> gcc/cp/ChangeLog:
>>> 
>>> * coroutines.cc (transform_local_var_uses): Don't
>>> specify a location for DECL_VALUE_EXPR.
>>> * decl.cc (cp_finish_decomp): Likewise.
>>> 
>>> gcc/ChangeLog:
>>> 
>>> * tree.cc (decl_value_expr_insert): Clear EXPR_LOCATION.
>>> 
>>> gcc/testsuite/ChangeLog:
>>> 
>>> * g++.dg/tree-ssa/value-expr1.C: New test.
>>> * g++.dg/tree-ssa/value-expr2.C: New test.
>>> * g++.dg/analyzer/pr93212.C: Move warning.
>>> ---
>>>  gcc/cp/coroutines.cc|  4 ++--
>>>  gcc/cp/decl.cc  | 12 +++---
>>>  gcc/testsuite/g++.dg/analyzer/pr93212.C |  4 ++--
>>>  gcc/testsuite/g++.dg/tree-ssa/value-expr1.C | 16 +
>>>  gcc/testsuite/g++.dg/tree-ssa/value-expr2.C | 26 +
>>>  gcc/tree.cc |  3 +++
>>>  6 files changed, 52 insertions(+), 13 deletions(-)
>>>  create mode 100644 gcc/testsuite/g++.dg/tree-ssa/value-expr1.C
>>>  create mode 100644 gcc/testsuite/g++.dg/tree-ssa/value-expr2.C
>>> 
>>> diff --git a/gcc/cp/coroutines.cc b/gcc/cp/coroutines.cc
>>> index 01a3e831ee5..a72bd6bbef0 100644
>>> --- a/gcc/cp/coroutines.cc
>>> +++ b/gcc/cp/coroutines.cc
>>> @@ -2047,8 +2047,8 @@ transform_local_var_uses (tree *stmt, int 
>>> *do_subtree, void *d)
>>> = lookup_member (lvd->coro_frame_type, local_var.field_id,
>>>  /*protect=*/1, /*want_type=*/0,
>>>  tf_warning_or_error);
>>> - tree fld_idx = build3_loc (lvd->loc, COMPONENT_REF, TREE_TYPE 
>>> (lvar),
>>> -lvd->actor_frame, fld_ref, NULL_TREE);
>>> + tree fld_idx = build3 (COMPONENT_REF, TREE_TYPE (lvar),
>>> +lvd->actor_frame, fld_ref, NULL_TREE);
>>>   local_var.field_idx = fld_idx;
>>>   SET_DECL_VALUE_EXPR (lvar, fld_idx);
>>>   DECL_HAS_VALUE_EXPR_P (lvar) = true;
>>> diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc
>>> index 7af0b05d5f8..59e21581503 100644
>>> --- a/gcc/cp/decl.cc
>>> +++ b/gcc/cp/decl.cc
>>> @@ -9133,9 +9133,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
>>> count)
>>>   if (processing_template_decl)
>>> continue;
>>>   tree t = unshare_expr (dexp);
>>> - t = build4_loc (DECL_SOURCE_LOCATION (v[i]), ARRAY_REF,
>>> - eltype, t, size_int (i), NULL_TREE,
>>> - NULL_TREE);
>>> + t = build4 (ARRAY_REF, eltype, t, size_int (i), NULL_TREE, 
>>> NULL_TREE);
>>>   SET_DECL_VALUE_EXPR (v[i], t);
>>>   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
>>> }
>>> @@ -9154,9 +9152,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
>>> count)
>>>   if (processing_template_decl)
>>> continue;
>>>   tree t = unshare_expr (dexp);
>>> - t = build1_loc (DECL_SOURCE_LOCATION (v[i]),
>>> - i ? IMAGPART_EXPR : REALPART_EXPR, eltype,
>>> - t);
>>> + t = build1 (i ? IMAGPART_EXPR : REALPART_EXPR, eltype, t);
>>>   SET_DECL_VALUE_EXPR (v[i], t);
>>>   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
>>> }
>>> @@ -9180,9 +9176,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
>>> count)
>>>   tree t = unshare_expr (dexp);
>>>   convert_vector_to_array_for_subscript (DECL_SOURCE_LOCATION 
>>> (v[i]),
>>>  &t, size_int (i));
>>> - t = build4_loc (DECL_SOURCE_LOCATION (v[i]), ARRAY_REF,
>>> - eltype, t, size_int (i), NULL_TREE,
>>> - NULL_TREE);
>>> + t = build4 (ARRAY_REF, eltype, t, size_int (i), NULL_TREE, 
>>> NULL_TREE);
>>>   SET_DECL_VALUE_EXPR (v[i], t);
>>>   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
>>> }
>>> diff --git a/gcc/testsuite/g++.dg/analyzer/pr93212.C 
>>> b/gcc/testsuite/g++.dg/analyzer/pr93212.C
>>> index 41507e2b837..1029e8d547b 100644
>>> --- a/gcc/testsuite/g++.dg/analyzer/pr93212.C
>>> +++ b/gcc/testsuite/g++.dg/analyzer/pr93212.C
>>> @@ -4,8 +4,8 @

[C PATCH] remove same_translation_unit_p

[Martin Uecker via Gcc-patches]

Here is a patch to remove the unused function
same_translation_unit_p and related code. The
code to check for structural equivalency of
structs / unions is kept (with some fixes)
because it will be needed for C2X.



c: Remove dead code related to type compatibility across TUs. 

Code to detect struct/unions across the same TU is not needed
anymore. Code for determining compatibility of tagged types is
preserved as it will be used for C2X. Some errors in the unused
code are fixed.

Bootstrapped with no regressions for x86_64-pc-linux-gnu.

gcc/c/
* c-decl.cc (set_type_context): Remove.
(pop_scope, diagnose_mismatched_decls, pushdecl):
Remove dead code.
* c-typeck.cc (comptypes_internal): Remove dead code.
(same_translation_unit_p): Remove.
(tagged_types_tu_compatible_p): Some fixes.




diff --git a/gcc/c/c-decl.cc b/gcc/c/c-decl.cc
index e47ca6718b3..307f7a09f5a 100644
--- a/gcc/c/c-decl.cc
+++ b/gcc/c/c-decl.cc
@@ -1155,16 +1155,6 @@ update_label_decls (struct c_scope *scope)
 }
 }
 
-/* Set the TYPE_CONTEXT of all of TYPE's variants to CONTEXT.  */
-
-static void
-set_type_context (tree type, tree context)
-{
-  for (type = TYPE_MAIN_VARIANT (type); type;
-   type = TYPE_NEXT_VARIANT (type))
-TYPE_CONTEXT (type) = context;
-}
-
 /* Exit a scope.  Restore the state of the identifier-decl mappings
that were in effect when this scope was entered.  Return a BLOCK
node containing all the DECLs in this scope that are of interest
@@ -1253,7 +1243,6 @@ pop_scope (void)
case ENUMERAL_TYPE:
case UNION_TYPE:
case RECORD_TYPE:
- set_type_context (p, context);
 
  /* Types may not have tag-names, in which case the type
 appears in the bindings list with b->id NULL.  */
@@ -1361,12 +1350,7 @@ pop_scope (void)
 the TRANSLATION_UNIT_DECL.  This makes
same_translation_unit_p
 work.  */
  if (scope == file_scope)
-   {
  DECL_CONTEXT (p) = context;
- if (TREE_CODE (p) == TYPE_DECL
- && TREE_TYPE (p) != error_mark_node)
-   set_type_context (TREE_TYPE (p), context);
-   }
 
  gcc_fallthrough ();
  /* Parameters go in DECL_ARGUMENTS, not BLOCK_VARS, and have
@@ -2308,21 +2292,18 @@ diagnose_mismatched_decls (tree newdecl, tree
olddecl,
{
  if (DECL_INITIAL (olddecl))
{
- /* If both decls are in the same TU and the new
declaration
-isn't overriding an extern inline reject the new
decl.
-In c99, no overriding is allowed in the same
translation
-unit.  */
- if ((!DECL_EXTERN_INLINE (olddecl)
-  || DECL_EXTERN_INLINE (newdecl)
-  || (!flag_gnu89_inline
-  && (!DECL_DECLARED_INLINE_P (olddecl)
-  || !lookup_attribute ("gnu_inline",
-DECL_ATTRIBUTES
(olddecl)))
-  && (!DECL_DECLARED_INLINE_P (newdecl)
-  || !lookup_attribute ("gnu_inline",
-DECL_ATTRIBUTES
(newdecl
- )
- && same_translation_unit_p (newdecl, olddecl))
+ /* If the new declaration isn't overriding an extern
inline
+reject the new decl. In c99, no overriding is allowed
+in the same translation unit.  */
+ if (!DECL_EXTERN_INLINE (olddecl)
+ || DECL_EXTERN_INLINE (newdecl)
+ || (!flag_gnu89_inline
+ && (!DECL_DECLARED_INLINE_P (olddecl)
+ || !lookup_attribute ("gnu_inline",
+   DECL_ATTRIBUTES
(olddecl)))
+ && (!DECL_DECLARED_INLINE_P (newdecl)
+ || !lookup_attribute ("gnu_inline",
+   DECL_ATTRIBUTES
(newdecl)
{
  auto_diagnostic_group d;
  error ("redefinition of %q+D", newdecl);
@@ -3350,18 +3331,11 @@ pushdecl (tree x)
 type to the composite of all the types of that declaration.
 After the consistency checks, it will be reset to the
 composite of the visible types only.  */
-  if (b && (TREE_PUBLIC (x) || same_translation_unit_p (x, b-
>decl))
- && b->u.type)
+  if (b && b->u.type)
TREE_TYPE (b->decl) = b->u.type;
 
-  /* The point of the same_translation_unit_p check here is,
-we want to detect a duplicate decl for a construct like
-foo() { extern bar(); } ... static bar();  but not if
-they are in different translation units.  In any case,
-the static does not go in the externals scope.  */
-  if (b
- && (TREE_PUBLIC (x) || sam

Re: [PATCHv2] Use toplevel configure for GMP and MPFR for gdb

[Tom Tromey]

> "Andrew" == apinski--- via Gdb-patches  
> writes:

Andrew> From: Andrew Pinski 
Andrew> This patch uses the toplevel configure parts for GMP/MPFR for
Andrew> gdb. The only thing is that gdb now requires MPFR for building.
Andrew> Before it was a recommended but not required library.
Andrew> Also this allows building of GMP and MPFR with the toplevel
Andrew> directory just like how it is done for GCC.
Andrew> We now error out in the toplevel configure of the version
Andrew> of GMP and MPFR that is wrong.

Andrew> OK after GDB 13 branches? Build gdb 3 ways:
Andrew> with GMP and MPFR in the toplevel (static library used at that point 
for both)
Andrew> With only MPFR in the toplevel (GMP distro library used and MPFR built 
from source)
Andrew> With neither GMP and MPFR in the toplevel (distro libraries used)

I think it's fine to move forward with this now.
Thank you again for doing this.

Tom

Re: [PATCH] rs6000: Raise error for __vector_{quad, pair} uses without MMA enabled [PR106736]

[Segher Boessenkool]

On Wed, Dec 14, 2022 at 07:21:20PM +0800, Kewen.Lin wrote:
> I'm going to push this next week if no objections.

Please do?


Segher

Re: testsuite: Fix pr55569.c excess errors

[Mike Stump via Gcc-patches]

On Dec 20, 2022, at 1:22 AM, Jonathan Yong via Gcc-patches 
 wrote:
> 
> This fixes the following:
> 
> Excess errors:
> 
> gcc/testsuite/gcc.c-torture/compile/pr55569.c:13:12: warning: overflow in 
> conversion from 'long long unsigned int' to 'long int' changes value from 
> '4611686018427387903' to '-1' [-Woverflow]
> 
> gcc/testsuite/gcc.c-torture/compile/pr55569.c:13:34: warning: iteration 
> 2147483647 invokes undefined behavior [-Waggressive-loop-optimizations]
> 
> Patch OK?

Ok.

Re: [PATCH v6, rs6000] Change mode and insn condition for VSX scalar extract/insert instructions

[Segher Boessenkool]

Hi!

On Mon, Dec 19, 2022 at 02:27:57PM +0800, HAO CHEN GUI wrote:
> This patch fixes several problems:
> 1. The exponent of double-precision can be put into a SImode register.
> So "xsxexpdp" doesn't require 64-bit environment. Also "xsxsigdp",
> "xsiexpdp" and "xsiexpdpf" can put exponent into a GPR register.
> 
> 2. "TARGET_64BIT" check in insn conditions should be replaced with
> "TARGET_POWERPC64" check.
> 
> 3. "lp64" check in test cases should be replaced with "has_arch_ppc64"
> check. "ilp32" check should be replaced with "dg-skip-if has_arch_ppc64".

These things are independent.  Please do independent patches (a series
is fine and even preferred, of course).  Not only is this much harder to
review the way it is, it was harder to write as well, write changelog
for, etc.  Often when you prepare patches it becomes apparent that you
should have structured things a bit differently.  That is a good time to
do exactly so :-)

> This patch keeps outer interfaces of these builtins unchanged.

Of course.  This patch doesn't edit any builtins, it changes only the
machine description.  "Of the corresponding builtins" :-)


Segher

Re: [PATCH RFA(tree)] c++: source position of lambda captures [PR84471]

[Jason Merrill via Gcc-patches]

On 12/20/22 07:07, Richard Biener wrote:

On Fri, Dec 2, 2022 at 4:46 PM Jason Merrill via Gcc-patches
 wrote:


Tested x86_64-pc-linux-gnu, OK for trunk?

-- 8< --

If the DECL_VALUE_EXPR of a VAR_DECL has EXPR_LOCATION set, then any use of
that variable looks like it has that location, which leads to the debugger
jumping back and forth for both lambdas and structured bindings.

Rather than fix all the uses, it seems simplest to remove any EXPR_LOCATION
when setting DECL_VALUE_EXPR.  So the cp/ hunks aren't necessary, but it
seems cleaner not to work to add a location that will immediately get
stripped.

 PR c++/84471
 PR c++/107504

gcc/cp/ChangeLog:

 * coroutines.cc (transform_local_var_uses): Don't
 specify a location for DECL_VALUE_EXPR.
 * decl.cc (cp_finish_decomp): Likewise.

gcc/ChangeLog:

 * tree.cc (decl_value_expr_insert): Clear EXPR_LOCATION.

gcc/testsuite/ChangeLog:

 * g++.dg/tree-ssa/value-expr1.C: New test.
 * g++.dg/tree-ssa/value-expr2.C: New test.
 * g++.dg/analyzer/pr93212.C: Move warning.
---
  gcc/cp/coroutines.cc|  4 ++--
  gcc/cp/decl.cc  | 12 +++---
  gcc/testsuite/g++.dg/analyzer/pr93212.C |  4 ++--
  gcc/testsuite/g++.dg/tree-ssa/value-expr1.C | 16 +
  gcc/testsuite/g++.dg/tree-ssa/value-expr2.C | 26 +
  gcc/tree.cc |  3 +++
  6 files changed, 52 insertions(+), 13 deletions(-)
  create mode 100644 gcc/testsuite/g++.dg/tree-ssa/value-expr1.C
  create mode 100644 gcc/testsuite/g++.dg/tree-ssa/value-expr2.C

diff --git a/gcc/cp/coroutines.cc b/gcc/cp/coroutines.cc
index 01a3e831ee5..a72bd6bbef0 100644
--- a/gcc/cp/coroutines.cc
+++ b/gcc/cp/coroutines.cc
@@ -2047,8 +2047,8 @@ transform_local_var_uses (tree *stmt, int *do_subtree, 
void *d)
 = lookup_member (lvd->coro_frame_type, local_var.field_id,
  /*protect=*/1, /*want_type=*/0,
  tf_warning_or_error);
- tree fld_idx = build3_loc (lvd->loc, COMPONENT_REF, TREE_TYPE (lvar),
-lvd->actor_frame, fld_ref, NULL_TREE);
+ tree fld_idx = build3 (COMPONENT_REF, TREE_TYPE (lvar),
+lvd->actor_frame, fld_ref, NULL_TREE);
   local_var.field_idx = fld_idx;
   SET_DECL_VALUE_EXPR (lvar, fld_idx);
   DECL_HAS_VALUE_EXPR_P (lvar) = true;
diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc
index 7af0b05d5f8..59e21581503 100644
--- a/gcc/cp/decl.cc
+++ b/gcc/cp/decl.cc
@@ -9133,9 +9133,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
count)
   if (processing_template_decl)
 continue;
   tree t = unshare_expr (dexp);
- t = build4_loc (DECL_SOURCE_LOCATION (v[i]), ARRAY_REF,
- eltype, t, size_int (i), NULL_TREE,
- NULL_TREE);
+ t = build4 (ARRAY_REF, eltype, t, size_int (i), NULL_TREE, NULL_TREE);
   SET_DECL_VALUE_EXPR (v[i], t);
   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
 }
@@ -9154,9 +9152,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
count)
   if (processing_template_decl)
 continue;
   tree t = unshare_expr (dexp);
- t = build1_loc (DECL_SOURCE_LOCATION (v[i]),
- i ? IMAGPART_EXPR : REALPART_EXPR, eltype,
- t);
+ t = build1 (i ? IMAGPART_EXPR : REALPART_EXPR, eltype, t);
   SET_DECL_VALUE_EXPR (v[i], t);
   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
 }
@@ -9180,9 +9176,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
count)
   tree t = unshare_expr (dexp);
   convert_vector_to_array_for_subscript (DECL_SOURCE_LOCATION (v[i]),
  &t, size_int (i));
- t = build4_loc (DECL_SOURCE_LOCATION (v[i]), ARRAY_REF,
- eltype, t, size_int (i), NULL_TREE,
- NULL_TREE);
+ t = build4 (ARRAY_REF, eltype, t, size_int (i), NULL_TREE, NULL_TREE);
   SET_DECL_VALUE_EXPR (v[i], t);
   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
 }
diff --git a/gcc/testsuite/g++.dg/analyzer/pr93212.C 
b/gcc/testsuite/g++.dg/analyzer/pr93212.C
index 41507e2b837..1029e8d547b 100644
--- a/gcc/testsuite/g++.dg/analyzer/pr93212.C
+++ b/gcc/testsuite/g++.dg/analyzer/pr93212.C
@@ -4,8 +4,8 @@
  auto lol()
  {
  int aha = 3;
-return [&aha] { // { dg-warning "dereferencing pointer '.*' to within stale 
stack frame" }
-return aha;
+return [&aha] {
+return aha; // { dg-warning "dereferencing pointer '.*' to within stale 
stack frame" }
  };
  /* TODO: may be worth special-casing the reporting of dangling
 references from lambdas, to highlight the declaration, and maybe fix
diff --git a/gcc/testsuite/g++.

Re: [PATCH 1/3] libstdc++: Improve output of default contract violation handler [PR107792]

[Jason Merrill via Gcc-patches]

On 12/20/22 05:49, Arsen Arsenović wrote:

From: Jonathan Wakely 

Make the output more readable. Don't output anything unless verbose
termination is enabled at configure-time.

libstdc++-v3/ChangeLog:

PR libstdc++/107792
PR libstdc++/107778
* src/experimental/contract.cc (handle_contract_violation): Make
output more readable.
---
Alright, updated to omit information that's defaulted.

Turns out your suggestion for dg-output was quite clever - because {} is
special in ARE, it's always prefixed by \ when escaping with curlies,
and so it never counds towards the "paired curly braces" rules, and
requires no extra escaping code at all!  That's quite a bit neater.

  libstdc++-v3/src/experimental/contract.cc | 50 ++-
  1 file changed, 39 insertions(+), 11 deletions(-)

diff --git a/libstdc++-v3/src/experimental/contract.cc 
b/libstdc++-v3/src/experimental/contract.cc
index c8d2697eddc..fbe8815a5c2 100644
--- a/libstdc++-v3/src/experimental/contract.cc
+++ b/libstdc++-v3/src/experimental/contract.cc
@@ -1,4 +1,5 @@
  // -*- C++ -*- std::experimental::contract_violation and friends
+
  // Copyright (C) 2019-2022 Free Software Foundation, Inc.
  //
  // This file is part of GCC.
@@ -23,19 +24,46 @@
  // .
  
  #include 

-#include 
+#if _GLIBCXX_HOSTED && _GLIBCXX_VERBOSE
+# include 
+#endif
  
  __attribute__ ((weak)) void

  handle_contract_violation (const std::experimental::contract_violation 
&violation)
  {
-  std::cerr << "default std::handle_contract_violation called: \n"
-<< " " << violation.file_name()
-<< " " << violation.line_number()
-<< " " << violation.function_name()
-<< " " << violation.comment()
-<< " " << violation.assertion_level()
-<< " " << violation.assertion_role()
-<< " " << (int)violation.continuation_mode()
-<< std::endl;
+#if _GLIBCXX_HOSTED && _GLIBCXX_VERBOSE
+  bool level_default_p = violation.assertion_level() == "default";
+  bool role_default_p = violation.assertion_role() == "default";
+  bool cont_mode_default_p = violation.continuation_mode()
+== std::experimental::contract_violation_continuation_mode::never_continue;
+
+  const char* modes[]{ "never", "maybe" }; // Must match enumerators in header.
+  std::cerr << "contract violation in function " << violation.function_name()
+<< " at " << violation.file_name() << ':' << violation.line_number()
+<< ": " << violation.comment();
+
+  const char* delimiter = "\n[";
+
+  if (!level_default_p)
+{
+  std::cerr << delimiter << "level:" << violation.assertion_level();
+  delimiter = ", ";
+}
+  if (!role_default_p)
+{
+  std::cerr << delimiter << "role:" << violation.assertion_role();
+  delimiter = ", ";
+}
+  if (!cont_mode_default_p)
+{
+  std::cerr << delimiter << "mode:"
+   << modes[(int)violation.continuation_mode() & 1];


I still think this should be "continuation: on/off".

Jason

Re: [PATCH 1/4] contracts: Lowercase {MAYBE,NEVER}_CONTINUE

[Jason Merrill via Gcc-patches]

On 12/15/22 12:39, Arsen Arsenović wrote:

Hi,

Jason Merrill  writes:


The lowercase constants are more consistent with the standard, and it is
unlikely that the uppercase versions would've been accepted.


OK.


Thanks.  Could you push this for me?  I don't have write access.


Done.

Jason

Re: testsuite: Fix pr55569.c excess errors

[Andrew Pinski via Gcc-patches]

On Tue, Dec 20, 2022 at 1:22 AM Jonathan Yong via Gcc-patches
 wrote:
>
> This fixes the following:

It is not obvious from the email, why this patch is needed but I
figured it was due to LLP64 targets or some other targets where long
is not the same size of the size_t type.
I think this patch is good but I cannot approve it. The commit message
should be improved to make a mention of LLP64 targets and long being a
smaller size than size_t.

Thanks,
Andrew

>
> Excess errors:
>
> gcc/testsuite/gcc.c-torture/compile/pr55569.c:13:12: warning: overflow
> in conversion from 'long long unsigned int' to 'long int' changes value
> from '4611686018427387903' to '-1' [-Woverflow]
>
> gcc/testsuite/gcc.c-torture/compile/pr55569.c:13:34: warning: iteration
> 2147483647 invokes undefined behavior [-Waggressive-loop-optimizations]
>
> Patch OK?

gcc-13/changes.html: Mention -fstrict-flex-arrays and its impact

[Qing Zhao via Gcc-patches]

Hi,

This is the patch for mentioning -fstrict-flex-arrays and -Warray-bounds=2 
changes in gcc-13/changes.html.

Let me know if you have any comment or suggestions.

Thanks.

Qing.

===
>From c022076169b4f1990b91f7daf4cc52c6c5535228 Mon Sep 17 00:00:00 2001
From: Qing Zhao 
Date: Tue, 20 Dec 2022 16:13:04 +
Subject: [PATCH] gcc-13/changes: Mention -fstrict-flex-arrays and its impact.

---
 htdocs/gcc-13/changes.html | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
index 689178f9..47b3d40f 100644
--- a/htdocs/gcc-13/changes.html
+++ b/htdocs/gcc-13/changes.html
@@ -39,6 +39,10 @@ a work-in-progress.
 Legacy debug info compression option -gz=zlib-gnu was 
removed
   and the option is ignored right now.
 New debug info compression option value -gz=zstd has been 
added.
+-Warray-bounds=2 will no longer issue warnings for out of 
bounds
+  accesses to trailing struct members of one-element array type anymore. 
Please
+  add -fstrict-flex-arrays=level to control how the compiler 
treat
+  trailing arrays of structures as flexible array members. 
 
 
 
@@ -409,6 +413,17 @@ a work-in-progress.
 Other significant improvements
 
 
+Treating trailing arrays as flexible array members
+
+
+ GCC can now control when to treat the trailing array of a structure as a 
+ flexible array member for the purpose of accessing the elements of such
+ an array. By default, all trailing arrays of structures are treated as 
+ flexible array members. Use the new command-line option
+ -fstrict-flex-array=level to control how GCC treats the 
trailing
+ array of a structure as a flexible array member at different levels.
+ 
+
 
 
 
-- 
2.31.1

Re: [PATCH] RISC-V: Fix incorrect annotation

[Jeff Law via Gcc-patches]

On 12/20/22 09:06, Palmer Dabbelt wrote:

On Tue, 20 Dec 2022 08:02:56 PST (-0800), jeffreya...@gmail.com wrote:



On 12/19/22 17:38, juzhe.zhong wrote:

Would you mind merging it for me？ I can‘t merge code.

Do you mean you do not have write access to the repository?  If so, that
can be easily fixed.

https://sourceware.org/cgi-bin/pdw/ps_form.cgi

List me as your sponsor.


Do we also need to add him to the write after approval section in 
MAINTAINERS?  We were trying to remember how to do this on IRC last 
night...

That's the first TODO once his write access is set up.

Jeff

Re: [PATCH] RISC-V: Fix incorrect annotation

[Palmer Dabbelt]

On Tue, 20 Dec 2022 08:02:56 PST (-0800), jeffreya...@gmail.com wrote:



On 12/19/22 17:38, juzhe.zhong wrote:

Would you mind merging it for me？ I can‘t merge code.

Do you mean you do not have write access to the repository?  If so, that
can be easily fixed.

https://sourceware.org/cgi-bin/pdw/ps_form.cgi

List me as your sponsor.


Do we also need to add him to the write after approval section in 
MAINTAINERS?  We were trying to remember how to do this on IRC last 
night...

Re: [PATCH] RISC-V: Fix incorrect annotation

[Jeff Law via Gcc-patches]

On 12/19/22 17:38, juzhe.zhong wrote:

Would you mind merging it for me？ I can‘t merge code.
Do you mean you do not have write access to the repository?  If so, that 
can be easily fixed.


https://sourceware.org/cgi-bin/pdw/ps_form.cgi

List me as your sponsor.

jeff

Re: [PATCH] RISC-V: Remove side effects of vsetvl/vsetvlmax intriniscs in properties

[Jeff Law via Gcc-patches]

On 12/20/22 07:51, juzhe.zh...@rivai.ai wrote:

From: Ju-Zhe Zhong 

gcc/ChangeLog:

 * config/riscv/riscv-vector-builtins-bases.cc: Remove side effects.

OK.
Jeff

Re: [PATCH] RISC-V: Remove side effects of vsetvl pattern in RTL.

[Jeff Law via Gcc-patches]

On 12/20/22 07:56, juzhe.zh...@rivai.ai wrote:

From: Ju-Zhe Zhong 

gcc/ChangeLog:

 * config/riscv/riscv-vector-builtins-bases.cc: Change it to no side 
effects.
 * config/riscv/vector.md (@vsetvl_no_side_effects): New pattern.

OK
jeff

Re: [PATCH 3/3] contrib: Add dg-out-generator.pl

[Jonathan Wakely via Gcc-patches]

On Tue, 20 Dec 2022 at 10:49, Arsen Arsenović  wrote:
>
> This script is a helper used to generate dg-output lines from an existing
> program output conveniently.  It takes care of escaping Tcl and ARE stuff.
>
> contrib/ChangeLog:
>
> * dg-out-generator.pl: New file.
> ---
>  contrib/dg-out-generator.pl | 79 +
>  1 file changed, 79 insertions(+)
>  create mode 100755 contrib/dg-out-generator.pl
>
> diff --git a/contrib/dg-out-generator.pl b/contrib/dg-out-generator.pl
> new file mode 100755
> index 000..663b00fa496
> --- /dev/null
> +++ b/contrib/dg-out-generator.pl
> @@ -0,0 +1,79 @@
> +#!/usr/bin/env perl
> +#
> +# Copyright (C) 2022 GCC Contributors.

As discussed on IRC, this form of copyright notice is novel, and
should probably be the usual FSF copyright notice instead, since you
have an assignment in place.

> +# Contributed by Arsen Arsenović.
> +#
> +# This script is free software; you can redistribute it and/or modify
> +# it under the terms of the GNU General Public License as published by
> +# the Free Software Foundation; either version 3, or (at your option)
> +# any later version.
> +
> +# This script reads program output on STDIN, and out of it produces a block 
> of
> +# dg-output lines that can be yanked at the end of a file.  It will escape
> +# special ARE and Tcl constructs automatically.
> +#
> +# Each argument passed on the standard input is treated as a string to be
> +# replaced by ``.*'' in the final result.  This is intended to mask out build
> +# paths, filenames, etc.
> +#
> +# Usage example:
> +
> +# $ g++-13 -fcontracts -o test \
> +#  'g++.dg/contracts/contracts-access1.C' && \
> +#   ./test |& dg-out-generator.pl 'g++.dg/contracts/contracts-access1.C'
> +# // { dg-output {contract violation in function Base::b at .*:11: pub > 
> 0(\n|\r\n|\r)*} }
> +# // { dg-output {\[level:default, role:default, continuation 
> mode:never\](\n|\r\n|\r)*} }
> +# // { dg-output {terminate called without an active exception(\n|\r\n|\r)*} 
> }
> +
> +# You can now freely dump the above into your testcase.
> +
> +use strict;
> +use warnings;
> +use POSIX 'floor';
> +
> +my $escapees = '(' . join ('|', map { quotemeta } @ARGV) . ')';
> +
> +sub gboundary($)
> +{
> +  my $str = shift;
> +  my $sz = 10.0;
> +  for (;;)
> +{
> +  my $bnd = join '', (map chr 64 + rand 27, 1 .. floor $sz);
> +  return $bnd unless index ($str, $bnd) >= 0;
> +  $sz += 0.1;
> +}
> +}
> +
> +while ()
> +  {
> +# Escape our escapees.
> +my $boundary;
> +if (@ARGV) {
> +  # Checking this is necessary to avoid a spurious .* between all
> +  # characters if no arguments are passed.
> +  $boundary = gboundary $_;
> +  s/$escapees/$boundary/g;
> +}
> +
> +# Quote stuff special in Tcl ARE.  This step also effectively nulls any
> +# concern about escaping.  As long as all curly braces are escaped, the
> +# string will, when passing through the braces rule of Tcl, be identical 
> to
> +# the input.
> +s/([[\]*+?{}()\\])/\\$1/g;
> +
> +# Newlines should be more tolerant.
> +s/\n$/(\\n|\\r\\n|\\r)*/;
> +
> +# Then split out the boundary, replacing it with .*.
> +s/$boundary/.*/g if defined $boundary;
> +
> +# Then, let's print it in a dg-output block.  If you'd prefer /* keep in
> +# mind that if your string contains */ it could terminate the comment
> +# early.  Maybe add an extra s!\*/!*()/!g or something.
> +print "// { dg-output {$_} }\n";
> +  }
> +
> +# File Local Vars:
> +# indent-tabs-mode: nil
> +# End:
> --
> 2.39.0
>

Re: [PATCH] RISC-V: Update vsetvl/vsetvlmax intrinsics to the latest api name.

[Jeff Law via Gcc-patches]

On 12/20/22 07:58, juzhe.zh...@rivai.ai wrote:

From: Ju-Zhe Zhong 

gcc/ChangeLog:

 * config/riscv/riscv-vector-builtins-shapes.cc (struct vsetvl_def): Add 
"__riscv_" prefix.

gcc/testsuite/ChangeLog:

 * gcc.target/riscv/rvv/base/vsetvl-1.c: Add "__riscv_" prefix.

OK
jeff

[PATCH] c++, tree: walk TREE_VEC (and VECTOR_CST) in natural order [PR101886]

[Patrick Palka via Gcc-patches]

Unfortunately the extract_autos_r fix in r13-4799-ga7c8036b26082d is
derailed by the fact that walk_tree_1 currently walks the elements of a
TREE_VEC in reverse, which means for A in the below testcase
extract_autos_r ends up adjusting the TEMPLATE_TYPE_IDX of the first
auto rather than the second one, and the first auto is the canonical
auto of level 2 and index 0, so we rightfully trigger the sanity check
added in that commit.

It seems TREE_VEC and VECTOR_CST are the only trees that we walk in
reverse, and this has been the case since r21884 whence the original
version of walk_tree_1 was introduced.  But that's arguably unnatural
and inconsistent with how we walk other compound trees such as
CONSTRUCTORs and EXPR_P trees.  So this patch makes walk_tree_1 walk
these trees in forward order, which fixes the below testcase.  This in
turn revealed that keep_template_parm builds up the list of found
template parameters in reverse, which previously compensated for the
TREE_VEC behavior, but now we should be building the list in the natural
order as well for sake of pretty printing parameter mappings.

Bootstrapped and regtested on x86_64-pc-linux-gnu with
--enable-languages=all,ada,go does this look OK for trunk?

PR c++/101886

gcc/cp/ChangeLog:

* pt.cc (find_template_parameter_info::parm_list_tail):
New data member.
(keep_template_parm): Use parm_list_tail to append rather
than prepend to parm_list.

gcc/ChangeLog:

* tree.cc (walk_tree_1) : Walk the elements
in the natural order.
: Likewise.

gcc/testsuite/ChangeLog:

* g++.dg/concepts/diagnostic12.C: Adjust expected order of
template parameters within parameter mapping.
* g++.dg/concepts/auto6.C: New test.
---
 gcc/cp/pt.cc | 13 +
 gcc/testsuite/g++.dg/concepts/auto6.C| 14 ++
 gcc/testsuite/g++.dg/concepts/diagnostic12.C |  2 +-
 gcc/tree.cc  | 20 ++--
 4 files changed, 34 insertions(+), 15 deletions(-)
 create mode 100644 gcc/testsuite/g++.dg/concepts/auto6.C

diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index 2b7b3756b68..df125a63785 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -10640,14 +10640,14 @@ for_each_template_parm (tree t, tree_fn_t fn, void* 
data,
 struct find_template_parameter_info
 {
   explicit find_template_parameter_info (tree ctx_parms)
-: parm_list (NULL_TREE),
-  ctx_parms (ctx_parms),
+: ctx_parms (ctx_parms),
   max_depth (TMPL_PARMS_DEPTH (ctx_parms))
   {}
 
   hash_set visited;
   hash_set parms;
-  tree parm_list;
+  tree parm_list = NULL_TREE;
+  tree *parm_list_tail = &parm_list;
   tree ctx_parms;
   int max_depth;
 };
@@ -10693,7 +10693,12 @@ keep_template_parm (tree t, void* data)
   if (TYPE_P (t))
 t = TYPE_MAIN_VARIANT (t);
   if (!ftpi->parms.add (t))
-ftpi->parm_list = tree_cons (NULL_TREE, t, ftpi->parm_list);
+{
+  /* Append T to PARM_LIST.  */
+  tree node = build_tree_list (NULL_TREE, t);
+  *ftpi->parm_list_tail = node;
+  ftpi->parm_list_tail = &TREE_CHAIN (node);
+}
 
   /* Verify the parameter we found has a valid index.  */
   if (flag_checking)
diff --git a/gcc/testsuite/g++.dg/concepts/auto6.C 
b/gcc/testsuite/g++.dg/concepts/auto6.C
new file mode 100644
index 000..1f6d72e54cc
--- /dev/null
+++ b/gcc/testsuite/g++.dg/concepts/auto6.C
@@ -0,0 +1,14 @@
+// PR c++/101886
+// { dg-do compile { target c++17_only } }
+// { dg-options "-fconcepts-ts" }
+
+template struct A { };
+
+template
+void f() {
+  A a;
+  A b1 = a;
+  A b2 = a;
+}
+
+template void f();
diff --git a/gcc/testsuite/g++.dg/concepts/diagnostic12.C 
b/gcc/testsuite/g++.dg/concepts/diagnostic12.C
index 548ba9c1b3d..8086500760b 100644
--- a/gcc/testsuite/g++.dg/concepts/diagnostic12.C
+++ b/gcc/testsuite/g++.dg/concepts/diagnostic12.C
@@ -3,7 +3,7 @@
 
 template
   concept c1 = requires (T t, Args... args) { *t; };
-// { dg-message "in requirements with .T t., .Args ... args. .with Args = 
\{\}; T = int" "" { target *-*-* } .-1 }
+// { dg-message "in requirements with .T t., .Args ... args. .with T = int; 
Args = \{\}" "" { target *-*-* } .-1 }
 
 static_assert(c1); // { dg-error "failed" }
 
diff --git a/gcc/tree.cc b/gcc/tree.cc
index 0a51f9ddb4d..92199bb6503 100644
--- a/gcc/tree.cc
+++ b/gcc/tree.cc
@@ -11310,12 +11310,12 @@ walk_tree_1 (tree *tp, walk_tree_fn func, void *data,
if (len == 0)
  break;
 
-   /* Walk all elements but the first.  */
-   while (--len)
- WALK_SUBTREE (TREE_VEC_ELT (*tp, len));
+   /* Walk all elements but the last.  */
+   for (int i = 0; i < len - 1; ++i)
+ WALK_SUBTREE (TREE_VEC_ELT (*tp, i));
 
-   /* Now walk the first one as a tail call.  */
-   WALK_SUBTREE_TAIL (TREE_VEC_ELT (*tp, 0));
+   /* Now walk the last one as a tail call.  */
+   WALK_SUBTREE_TAIL (TREE_VEC_ELT (*tp, len - 1));
   }
 

[PATCH] RISC-V: Update vsetvl/vsetvlmax intrinsics to the latest api name.

[juzhe . zhong]

From: Ju-Zhe Zhong 

gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-shapes.cc (struct vsetvl_def): Add 
"__riscv_" prefix.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vsetvl-1.c: Add "__riscv_" prefix.

---
 .../riscv/riscv-vector-builtins-shapes.cc |   1 +
 .../gcc.target/riscv/rvv/base/vsetvl-1.c  | 220 +-
 2 files changed, 111 insertions(+), 110 deletions(-)

diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc 
b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
index 24fc1c02341..bb2ee8767a0 100644
--- a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
@@ -93,6 +93,7 @@ struct vsetvl_def : public build_base
 /* vsetvl* instruction doesn't have C++ overloaded functions.  */
 if (overloaded_p)
   return nullptr;
+b.append_name ("__riscv_");
 b.append_name (instance.base_name);
 b.append_name (type_suffixes[instance.type.index].vsetvl);
 return b.finish_name ();
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl-1.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl-1.c
index 661f2c9170e..72f308433ef 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl-1.c
@@ -6,657 +6,657 @@
 
 size_t test_vsetvl_e8mf8_imm0()
 {
-  size_t vl = vsetvl_e8mf8(0);
+  size_t vl = __riscv_vsetvl_e8mf8(0);
   return vl;
 }
 
 size_t test_vsetvl_e8mf8_imm31()
 {
-  size_t vl = vsetvl_e8mf8(31);
+  size_t vl = __riscv_vsetvl_e8mf8(31);
   return vl;
 }
 
 size_t test_vsetvl_e8mf8_imm32()
 {
-  size_t vl = vsetvl_e8mf8(32);
+  size_t vl = __riscv_vsetvl_e8mf8(32);
   return vl;
 }
 
 size_t test_vsetvl_e8mf8(size_t avl)
 {
-  size_t vl = vsetvl_e8mf8(avl);
+  size_t vl = __riscv_vsetvl_e8mf8(avl);
   return vl;
 }
 
 size_t test_vsetvlmax_e8mf8()
 {
-  size_t vl = vsetvlmax_e8mf8();
+  size_t vl = __riscv_vsetvlmax_e8mf8();
   return vl;
 }
 
 size_t test_vsetvl_e8mf4_imm0()
 {
-  size_t vl = vsetvl_e8mf4(0);
+  size_t vl = __riscv_vsetvl_e8mf4(0);
   return vl;
 }
 
 size_t test_vsetvl_e8mf4_imm31()
 {
-  size_t vl = vsetvl_e8mf4(31);
+  size_t vl = __riscv_vsetvl_e8mf4(31);
   return vl;
 }
 
 size_t test_vsetvl_e8mf4_imm32()
 {
-  size_t vl = vsetvl_e8mf4(32);
+  size_t vl = __riscv_vsetvl_e8mf4(32);
   return vl;
 }
 
 size_t test_vsetvl_e8mf4(size_t avl)
 {
-  size_t vl = vsetvl_e8mf4(avl);
+  size_t vl = __riscv_vsetvl_e8mf4(avl);
   return vl;
 }
 
 size_t test_vsetvlmax_e8mf4()
 {
-  size_t vl = vsetvlmax_e8mf4();
+  size_t vl = __riscv_vsetvlmax_e8mf4();
   return vl;
 }
 
 size_t test_vsetvl_e8mf2_imm0()
 {
-  size_t vl = vsetvl_e8mf2(0);
+  size_t vl = __riscv_vsetvl_e8mf2(0);
   return vl;
 }
 
 size_t test_vsetvl_e8mf2_imm31()
 {
-  size_t vl = vsetvl_e8mf2(31);
+  size_t vl = __riscv_vsetvl_e8mf2(31);
   return vl;
 }
 
 size_t test_vsetvl_e8mf2_imm32()
 {
-  size_t vl = vsetvl_e8mf2(32);
+  size_t vl = __riscv_vsetvl_e8mf2(32);
   return vl;
 }
 
 size_t test_vsetvl_e8mf2(size_t avl)
 {
-  size_t vl = vsetvl_e8mf2(avl);
+  size_t vl = __riscv_vsetvl_e8mf2(avl);
   return vl;
 }
 
 size_t test_vsetvlmax_e8mf2()
 {
-  size_t vl = vsetvlmax_e8mf2();
+  size_t vl = __riscv_vsetvlmax_e8mf2();
   return vl;
 }
 
 size_t test_vsetvl_e8m1_imm0()
 {
-  size_t vl = vsetvl_e8m1(0);
+  size_t vl = __riscv_vsetvl_e8m1(0);
   return vl;
 }
 
 size_t test_vsetvl_e8m1_imm31()
 {
-  size_t vl = vsetvl_e8m1(31);
+  size_t vl = __riscv_vsetvl_e8m1(31);
   return vl;
 }
 
 size_t test_vsetvl_e8m1_imm32()
 {
-  size_t vl = vsetvl_e8m1(32);
+  size_t vl = __riscv_vsetvl_e8m1(32);
   return vl;
 }
 
 size_t test_vsetvl_e8m1(size_t avl)
 {
-  size_t vl = vsetvl_e8m1(avl);
+  size_t vl = __riscv_vsetvl_e8m1(avl);
   return vl;
 }
 
 size_t test_vsetvlmax_e8m1()
 {
-  size_t vl = vsetvlmax_e8m1();
+  size_t vl = __riscv_vsetvlmax_e8m1();
   return vl;
 }
 
 size_t test_vsetvl_e8m2_imm0()
 {
-  size_t vl = vsetvl_e8m2(0);
+  size_t vl = __riscv_vsetvl_e8m2(0);
   return vl;
 }
 
 size_t test_vsetvl_e8m2_imm31()
 {
-  size_t vl = vsetvl_e8m2(31);
+  size_t vl = __riscv_vsetvl_e8m2(31);
   return vl;
 }
 
 size_t test_vsetvl_e8m2_imm32()
 {
-  size_t vl = vsetvl_e8m2(32);
+  size_t vl = __riscv_vsetvl_e8m2(32);
   return vl;
 }
 
 size_t test_vsetvl_e8m2(size_t avl)
 {
-  size_t vl = vsetvl_e8m2(avl);
+  size_t vl = __riscv_vsetvl_e8m2(avl);
   return vl;
 }
 
 size_t test_vsetvlmax_e8m2()
 {
-  size_t vl = vsetvlmax_e8m2();
+  size_t vl = __riscv_vsetvlmax_e8m2();
   return vl;
 }
 
 size_t test_vsetvl_e8m4_imm0()
 {
-  size_t vl = vsetvl_e8m4(0);
+  size_t vl = __riscv_vsetvl_e8m4(0);
   return vl;
 }
 
 size_t test_vsetvl_e8m4_imm31()
 {
-  size_t vl = vsetvl_e8m4(31);
+  size_t vl = __riscv_vsetvl_e8m4(31);
   return vl;
 }
 
 size_t test_vsetvl_e8m4_imm32()
 {
-  size_t vl = vsetvl_e8m4(32);
+  size_t vl = __riscv_vsetvl_e8m4(32);
   return vl;
 }
 size_t test_vsetvl_e8m4(size_t avl)
 {
-  size_t vl = vsetvl_e8m4(avl);
+  

[PATCH] RISC-V: Remove side effects of vsetvl pattern in RTL.

[juzhe . zhong]

From: Ju-Zhe Zhong 

gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc: Change it to no side 
effects.
* config/riscv/vector.md (@vsetvl_no_side_effects): New pattern.

---
 .../riscv/riscv-vector-builtins-bases.cc  |  2 +-
 gcc/config/riscv/vector.md| 26 +++
 2 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc 
b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index 75879dea25a..c1193dbbfb5 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -75,7 +75,7 @@ public:
 
 /* MU.  */
 e.add_input_operand (Pmode, gen_int_mode (0, Pmode));
-return e.generate_insn (code_for_vsetvl (Pmode));
+return e.generate_insn (code_for_vsetvl_no_side_effects (Pmode));
   }
 };
 
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 84adbb9974a..98b8f701c92 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -565,6 +565,32 @@
   [(set_attr "type" "vsetvl")
(set_attr "mode" "")])
 
+;; It's emit by vsetvl/vsetvlmax intrinsics with no side effects.
+;; Since we have many optmization passes from "expand" to "reload_completed",
+;; such pattern can allow us gain benefits of these optimizations.
+(define_insn_and_split "@vsetvl_no_side_effects"
+  [(set (match_operand:P 0 "register_operand" "=r")
+   (unspec:P [(match_operand:P 1 "csr_operand" "rK")
+  (match_operand 2 "const_int_operand" "i")
+  (match_operand 3 "const_int_operand" "i")
+  (match_operand 4 "const_int_operand" "i")
+  (match_operand 5 "const_int_operand" "i")] UNSPEC_VSETVL))]
+  "TARGET_VECTOR"
+  "#"
+  "&& epilogue_completed"
+  [(parallel
+[(set (match_dup 0)
+ (unspec:P [(match_dup 1) (match_dup 2) (match_dup 3)
+(match_dup 4) (match_dup 5)] UNSPEC_VSETVL))
+ (set (reg:SI VL_REGNUM)
+ (unspec:SI [(match_dup 1) (match_dup 2) (match_dup 3)] UNSPEC_VSETVL))
+ (set (reg:SI VTYPE_REGNUM)
+ (unspec:SI [(match_dup 2) (match_dup 3) (match_dup 4)
+ (match_dup 5)] UNSPEC_VSETVL))])]
+  ""
+  [(set_attr "type" "vsetvl")
+   (set_attr "mode" "SI")])
+
 ;; RVV machine description matching format
 ;; (define_insn ""
 ;;   [(set (match_operand:MODE 0)
-- 
2.36.3

[PATCH] RISC-V: Remove side effects of vsetvl/vsetvlmax intriniscs in properties

[juzhe . zhong]

From: Ju-Zhe Zhong 

gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc: Remove side effects.

---
 gcc/config/riscv/riscv-vector-builtins-bases.cc | 5 -
 1 file changed, 5 deletions(-)

diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc 
b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index ffeb1b25fbc..75879dea25a 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -53,11 +53,6 @@ template
 class vsetvl : public function_base
 {
 public:
-  unsigned int call_properties (const function_instance &) const
-  {
-return CP_READ_CSR | CP_WRITE_CSR;
-  }
-
   rtx expand (function_expander &e) const override
   {
 if (VLMAX_P)
-- 
2.36.3

Re: [PATCH 1/2] Fix PR 105532: match.pd patterns calling tree_nonzero_bits with vector types

[Richard Biener via Gcc-patches]

On Sat, Nov 5, 2022 at 12:44 PM Richard Biener
 wrote:
>
> On Wed, Nov 2, 2022 at 10:47 PM apinski--- via Gcc-patches
>  wrote:
> >
> > From: Andrew Pinski 
> >
> > Even though this PR was reported with an ubsan issue, the problem is
> > tree_nonzero_bits is being called with an expression which is a vector type.
>
> It seems to me the semantics
> for vectors should be clear but the users didn't expect that result?
>
> > This fixes three patterns I noticed which does that.
> > And adds a testcase for one of the patterns.
> >
> > OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions
>
> OK.

You didn't push this yet?

> > gcc/ChangeLog:
> >
> > PR tree-optimization/105532
> > * match.pd (~(X >> Y) -> ~X >> Y): Check if it is an integral
> > type before calling tree_nonzero_bits.
> > (popcount(X) + popcount(Y)): Likewise.
> > (popcount(X&C1)): Likewise.
> >
> > gcc/testsuite/ChangeLog:
> >
> > * gcc.c-torture/compile/vector-shift-1.c: New test.
> > ---
> >  gcc/match.pd  | 25 +++
> >  .../gcc.c-torture/compile/vector-shift-1.c|  8 ++
> >  2 files changed, 22 insertions(+), 11 deletions(-)
> >  create mode 100644 gcc/testsuite/gcc.c-torture/compile/vector-shift-1.c
> >
> > diff --git a/gcc/match.pd b/gcc/match.pd
> > index 194ba8f5188..5833e05a926 100644
> > --- a/gcc/match.pd
> > +++ b/gcc/match.pd
> > @@ -1371,7 +1371,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
> > /* For logical right shifts, this is possible only if @0 doesn't
> >have MSB set and the logical right shift is changed into
> >arithmetic shift.  */
> > -   (if (!wi::neg_p (tree_nonzero_bits (@0)))
> > +   (if (INTEGRAL_TYPE_P (type)
> > +&& !wi::neg_p (tree_nonzero_bits (@0)))
> >  (with { tree stype = signed_type_for (TREE_TYPE (@0)); }
> >   (convert (rshift (bit_not! (convert:stype @0)) @1))
> >
> > @@ -7518,7 +7519,8 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
> >  /* popcount(X) + popcount(Y) is popcount(X|Y) when X&Y must be zero.  */
> >  (simplify
> >(plus (POPCOUNT:s @0) (POPCOUNT:s @1))
> > -  (if (wi::bit_and (tree_nonzero_bits (@0), tree_nonzero_bits (@1)) == 0)
> > +  (if (INTEGRAL_TYPE_P (type)
> > +   && wi::bit_and (tree_nonzero_bits (@0), tree_nonzero_bits (@1)) == 
> > 0)
> >  (POPCOUNT (bit_ior @0 @1
> >
> >  /* popcount(X) == 0 is X == 0, and related (in)equalities.  */
> > @@ -7550,15 +7552,16 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
> >  (for pfun (POPCOUNT PARITY)
> >(simplify
> >  (pfun @0)
> > -(with { wide_int nz = tree_nonzero_bits (@0); }
> > -  (switch
> > -   (if (nz == 1)
> > - (convert @0))
> > -   (if (wi::popcount (nz) == 1)
> > - (with { tree utype = unsigned_type_for (TREE_TYPE (@0)); }
> > -   (convert (rshift:utype (convert:utype @0)
> > -  { build_int_cst (integer_type_node,
> > -   wi::ctz (nz)); }
> > +(if (INTEGRAL_TYPE_P (type))
> > + (with { wide_int nz = tree_nonzero_bits (@0); }
> > +   (switch
> > +(if (nz == 1)
> > +  (convert @0))
> > +(if (wi::popcount (nz) == 1)
> > +  (with { tree utype = unsigned_type_for (TREE_TYPE (@0)); }
> > +(convert (rshift:utype (convert:utype @0)
> > +   { build_int_cst (integer_type_node,
> > +wi::ctz (nz)); 
> > })
> >
> >  #if GIMPLE
> >  /* 64- and 32-bits branchless implementations of popcount are detected:
> > diff --git a/gcc/testsuite/gcc.c-torture/compile/vector-shift-1.c 
> > b/gcc/testsuite/gcc.c-torture/compile/vector-shift-1.c
> > new file mode 100644
> > index 000..142ea56d5bb
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.c-torture/compile/vector-shift-1.c
> > @@ -0,0 +1,8 @@
> > +typedef unsigned char __attribute__((__vector_size__ (1))) U;
> > +
> > +U
> > +foo (U u)
> > +{
> > +  u = u == u;
> > +  return (~(u >> 255));
> > +}
> > --
> > 2.17.1
> >

[PATCH] d/104749 - document host GDC version requirement

[Richard Biener via Gcc-patches]

This documents that GDC 9.4 or later is required to build the D
language rather than GDC 9.1 which suffers from PR94240.

Pushed to trunk and gcc-12 branch.

PR d/104749
* install.texi (GDC): Document GDC 9.4 or later is required
to build the D language frontend.
---
 gcc/doc/install.texi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index ec31f0ac43e..5c0214b4e62 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -287,7 +287,7 @@ section.
 @item @anchor{GDC-prerequisite}GDC
 
 In order to build GDC, the D compiler, you need a working GDC
-compiler (GCC version 9.1 or later) and D runtime library,
+compiler (GCC version 9.4 or later) and D runtime library,
 @samp{libphobos}, as the D front end is written in D.
 
 Versions of GDC prior to 12 can be built with an ISO C++11 compiler, which can
-- 
2.35.3

Re: [PATCH] rs6000: Fix some issues related to Power10 fusion [PR104024]

[Segher Boessenkool]

Hi!

On Mon, Dec 19, 2022 at 02:13:49PM +0800, Kewen.Lin wrote:
> on 2022/12/15 06:29, Segher Boessenkool wrote:
> > On Wed, Nov 30, 2022 at 04:30:13PM +0800, Kewen.Lin wrote:
> >> --- a/gcc/config/rs6000/genfusion.pl
> >> +++ b/gcc/config/rs6000/genfusion.pl
> >> @@ -167,7 +167,7 @@ sub gen_logical_addsubf
> >>$inner_comp, $inner_inv, $inner_rtl, $inner_op, $both_commute, $c4,
> >>$bc, $inner_arg0, $inner_arg1, $inner_exp, $outer_arg2, $outer_exp,
> >>$ftype, $insn, $is_subf, $is_rsubf, $outer_32, $outer_42,$outer_name,
> >> -  $fuse_type);
> >> +  $fuse_type, $constraint_cond);
> >>KIND: foreach $kind ('scalar','vector') {
> >>@outer_ops = @logicals;
> >>if ( $kind eq 'vector' ) {
> >> @@ -176,12 +176,14 @@ sub gen_logical_addsubf
> >>  $pred = "altivec_register_operand";
> >>  $constraint = "v";
> >>  $fuse_type = "fused_vector";
> >> +$constraint_cond = "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode) && ";
> >>} else {
> >>  $vchr = "";
> >>  $mode = "GPR";
> >>  $pred = "gpc_reg_operand";
> >>  $constraint = "r";
> >>  $fuse_type = "fused_arith_logical";
> >> +$constraint_cond = "";
> >>  push (@outer_ops, @addsub);
> >>  push (@outer_ops, ( "rsubf" ));
> >>}
> > 
> > I don't like this at all.  Please use the "isa" attribute where needed?
> > Or do you need more in some cases?  But, again, separate patch.
> 
> This is to add one more condition for those define_insns, for example:

Sure, I understand that.  What I don't like is the generator program is
much too big and unstructured already, and this doesn't help at all; it
makes it quite a bit worse even.

> It's to avoid the pseudo whose mode isn't available for register constraint v
> causes ICE during reload.  I'm not sure how the "isa" attribute helps here,
> could you elaborate it?

Yeah, it doesn't help.  The condition implied by the isa attribute is
not added to the insn condition automatically; doing that could be too
expensive, and disruptive as well.  Something for stage 1 :-)

> >> +  if (TARGET_POWER10
> >> +  && (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION) == 0)
> >> +rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
> >> +  else if (!TARGET_POWER10 && TARGET_P10_FUSION)
> >> +rs6000_isa_flags &= ~OPTION_MASK_P10_FUSION;
> > 
> > That's not right.  If you want something like this you should check for
> > TARGET_POWER10 whenever you check for TARGET_P10_FUSION; but there
> > really is no reason at all to disable P10 fusion on other CPUs (neither
> > newer nor older!).
> 
> Good point, and I just noticed that we should check tune setting instead
> of TARGET_POWER10 here?  Something like:
> 
> if (!(rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION))
>   {
> if (processor_target_table[tune_index].processor == PROCESSOR_POWER10)
>   rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
> else
>   rs6000_isa_flags &= ~OPTION_MASK_P10_FUSION;
>   }

Yeah that looks better :-)

Maybe you can restructure the Perl code a bit in a first patch, and then
add the insn condition?  If you're not comfortable with Perl, I'll deal
with it, just update the patch.

Thanks,


Segher

Re: [PATCH v3] Add pattern to convert vector shift + bitwise and + multiply to vector compare in some cases.

[Manolis Tsamis]

On Tue, Dec 20, 2022 at 2:23 PM Manolis Tsamis  wrote:
>
> When using SWAR (SIMD in a register) techniques a comparison operation within
> such a register can be made by using a combination of shifts, bitwise and and
> multiplication. If code using this scheme is vectorized then there is 
> potential
> to replace all these operations with a single vector comparison, by 
> reinterpreting
> the vector types to match the width of the SWAR register.
>
> For example, for the test function packed_cmp_16_32, the original generated 
> code is:
>
> ldr q0, [x0]
> add w1, w1, 1
> ushrv0.4s, v0.4s, 15
> and v0.16b, v0.16b, v2.16b
> shl v1.4s, v0.4s, 16
> sub v0.4s, v1.4s, v0.4s
> str q0, [x0], 16
> cmp w2, w1
> bhi .L20
>
> with this pattern the above can be optimized to:
>
> ldr q0, [x0]
> add w1, w1, 1
> cmltv0.8h, v0.8h, #0
> str q0, [x0], 16
> cmp w2, w1
> bhi .L20
>
> The effect is similar for x86-64.
>
> gcc/ChangeLog:
>
> * match.pd: Simplify vector shift + bit_and + multiply in some cases.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/aarch64/swar_to_vec_cmp.c: New test.
>
> Signed-off-by: Manolis Tsamis 
>
> ---
>
> Changes in v3:
> - Changed pattern to use vec_cond_expr.
> - Changed pattern to work with VLA vector.
> - Added both expand_vec_cmp_expr_p and
>   expand_vec_cond_expr_p check.
> - Fixed type compatibility issues.
>
>  gcc/match.pd  | 61 
>  .../gcc.target/aarch64/swar_to_vec_cmp.c  | 72 +++
>  2 files changed, 133 insertions(+)
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/swar_to_vec_cmp.c
>
> diff --git a/gcc/match.pd b/gcc/match.pd
> index 67a0a682f31..320437f8aa3 100644
> --- a/gcc/match.pd
> +++ b/gcc/match.pd
> @@ -301,6 +301,67 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
>  (view_convert (bit_and:itype (view_convert @0)
>  (ne @1 { build_zero_cst (type); })))
>
> +/* In SWAR (SIMD within a register) code a signed comparison of packed data
> +   can be constructed with a particular combination of shift, bitwise and,
> +   and multiplication by constants.  If that code is vectorized we can
> +   convert this pattern into a more efficient vector comparison.  */
> +(simplify
> + (mult (bit_and (rshift @0 uniform_integer_cst_p@1)
> +   uniform_integer_cst_p@2)
> +uniform_integer_cst_p@3)
> + (with {
> +   tree rshift_cst = uniform_integer_cst_p (@1);
> +   tree bit_and_cst = uniform_integer_cst_p (@2);
> +   tree mult_cst = uniform_integer_cst_p (@3);
> +  }
> +  /* Make sure we're working with vectors and uniform vector constants.  */
> +  (if (VECTOR_TYPE_P (type)
> +   && tree_fits_uhwi_p (rshift_cst)
> +   && tree_fits_uhwi_p (mult_cst)
> +   && tree_fits_uhwi_p (bit_and_cst))
> +   /* Compute what constants would be needed for this to represent a packed
> +  comparison based on the shift amount denoted by RSHIFT_CST.  */
> +   (with {
> + HOST_WIDE_INT vec_elem_bits = vector_element_bits (type);
> + poly_int64 vec_nelts = TYPE_VECTOR_SUBPARTS (type);
> + poly_int64 vec_bits = vec_elem_bits * vec_nelts;
> + unsigned HOST_WIDE_INT cmp_bits_i, bit_and_i, mult_i;
> + unsigned HOST_WIDE_INT target_mult_i, target_bit_and_i;
> + cmp_bits_i = tree_to_uhwi (rshift_cst) + 1;
> + mult_i = tree_to_uhwi (mult_cst);
> + target_mult_i = (HOST_WIDE_INT_1U << cmp_bits_i) - 1;
> + bit_and_i = tree_to_uhwi (bit_and_cst);
> + target_bit_and_i = 0;
> +
> + /* The bit pattern in BIT_AND_I should be a mask for the least
> +   significant bit of each packed element that is CMP_BITS wide.  */
> + for (unsigned i = 0; i < vec_elem_bits / cmp_bits_i; i++)
> +   target_bit_and_i = (target_bit_and_i << cmp_bits_i) | 1U;
> +}
> +(if ((exact_log2 (cmp_bits_i)) >= 0
> +&& cmp_bits_i < HOST_BITS_PER_WIDE_INT
> +&& multiple_p (vec_bits, cmp_bits_i)
> +&& vec_elem_bits <= HOST_BITS_PER_WIDE_INT
> +&& target_mult_i == mult_i
> +&& target_bit_and_i == bit_and_i)
> + /* Compute the vector shape for the comparison and check if the target 
> is
> +   able to expand the comparison with that type.  */
> + (with {
> +   /* We're doing a signed comparison.  */
> +   tree cmp_type = build_nonstandard_integer_type (cmp_bits_i, 0);
> +   poly_int64 vector_type_nelts = exact_div (vec_bits, cmp_bits_i);
> +   tree vec_cmp_type = build_vector_type (cmp_type, vector_type_nelts);
> +   tree vec_truth_type = truth_type_for (vec_cmp_type);
> +   tree zeros = build_zero_cst (vec_cmp_type);
> +   tree ones = build_all_ones_cst (vec_cmp_type);
> +  }
> +  (if (expand_vec_cmp_expr_p (vec_cmp_type, vec_truth_type, LT_EXPR)
> + 

Re: [PATCH] PR tree-optimization/108139 - Don't use PHI equivalences in range-on-entry.

[Richard Biener via Gcc-patches]

On Mon, Dec 19, 2022 at 3:57 PM Andrew MacLeod via Gcc-patches
 wrote:
>
> our use of equivalences on range-on-entry calculations cause an issue
> through a PHI node when a back edge is involved.  ie
> a = VARYING
> <...>
> bb5
> b = PHI 
> bb6
> if (a != 0)
>   goto bb5
>
> since the value of b is undefined on the edge 2->5, we ignore it. The
> range of a on the edge 6->5 is ~[0,0]
> we calculate the range of b to be ~[0,0].   we also provide an
> equivalency between a and b.
>
> Unfortunately the on-entry code looks at equivalencies, and says, "hey,
> a and b are equivalent, so we can use the range of b instead"
>
> So it now thinks a is ~[0,0] and folds away the condition.
>
> The problem is that b can be considered equivalent to a, but the
> converse is not true, because there is a path (2->5) upon which a is not
> equivalent to b.  we have no way to represent a one way equivalence at
> the moment. This patch avoid using that relation in range-on-entry
> calculations.
>
> Perhaps next release I'll add a specific kind of one way equivalence for
> this kind of situation.
>
> Bootstraps on x86_64-pc-linux-gnu with no regressions. OK?

OK.  Note that equivalences across backedges can also result in
values from one cycle iteration to be used in another - a SSA def
in a SSA cycle can have different values.

Richard.

>
> Andrew

[PATCH v3] Add pattern to convert vector shift + bitwise and + multiply to vector compare in some cases.

[Manolis Tsamis]

When using SWAR (SIMD in a register) techniques a comparison operation within
such a register can be made by using a combination of shifts, bitwise and and
multiplication. If code using this scheme is vectorized then there is potential
to replace all these operations with a single vector comparison, by 
reinterpreting
the vector types to match the width of the SWAR register.

For example, for the test function packed_cmp_16_32, the original generated 
code is:

ldr q0, [x0]
add w1, w1, 1
ushrv0.4s, v0.4s, 15
and v0.16b, v0.16b, v2.16b
shl v1.4s, v0.4s, 16
sub v0.4s, v1.4s, v0.4s
str q0, [x0], 16
cmp w2, w1
bhi .L20

with this pattern the above can be optimized to:

ldr q0, [x0]
add w1, w1, 1
cmltv0.8h, v0.8h, #0
str q0, [x0], 16
cmp w2, w1
bhi .L20

The effect is similar for x86-64.

gcc/ChangeLog:

* match.pd: Simplify vector shift + bit_and + multiply in some cases.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/swar_to_vec_cmp.c: New test.

Signed-off-by: Manolis Tsamis 

---

Changes in v3:
- Changed pattern to use vec_cond_expr.
- Changed pattern to work with VLA vector.
- Added both expand_vec_cmp_expr_p and
  expand_vec_cond_expr_p check.
- Fixed type compatibility issues.

 gcc/match.pd  | 61 
 .../gcc.target/aarch64/swar_to_vec_cmp.c  | 72 +++
 2 files changed, 133 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/aarch64/swar_to_vec_cmp.c

diff --git a/gcc/match.pd b/gcc/match.pd
index 67a0a682f31..320437f8aa3 100644
--- a/gcc/match.pd
+++ b/gcc/match.pd
@@ -301,6 +301,67 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
 (view_convert (bit_and:itype (view_convert @0)
 (ne @1 { build_zero_cst (type); })))
 
+/* In SWAR (SIMD within a register) code a signed comparison of packed data
+   can be constructed with a particular combination of shift, bitwise and,
+   and multiplication by constants.  If that code is vectorized we can
+   convert this pattern into a more efficient vector comparison.  */
+(simplify
+ (mult (bit_and (rshift @0 uniform_integer_cst_p@1)
+   uniform_integer_cst_p@2)
+uniform_integer_cst_p@3)
+ (with {
+   tree rshift_cst = uniform_integer_cst_p (@1);
+   tree bit_and_cst = uniform_integer_cst_p (@2);
+   tree mult_cst = uniform_integer_cst_p (@3);
+  }
+  /* Make sure we're working with vectors and uniform vector constants.  */
+  (if (VECTOR_TYPE_P (type)
+   && tree_fits_uhwi_p (rshift_cst)
+   && tree_fits_uhwi_p (mult_cst)
+   && tree_fits_uhwi_p (bit_and_cst))
+   /* Compute what constants would be needed for this to represent a packed
+  comparison based on the shift amount denoted by RSHIFT_CST.  */
+   (with {
+ HOST_WIDE_INT vec_elem_bits = vector_element_bits (type);
+ poly_int64 vec_nelts = TYPE_VECTOR_SUBPARTS (type);
+ poly_int64 vec_bits = vec_elem_bits * vec_nelts;
+ unsigned HOST_WIDE_INT cmp_bits_i, bit_and_i, mult_i;
+ unsigned HOST_WIDE_INT target_mult_i, target_bit_and_i;
+ cmp_bits_i = tree_to_uhwi (rshift_cst) + 1;
+ mult_i = tree_to_uhwi (mult_cst);
+ target_mult_i = (HOST_WIDE_INT_1U << cmp_bits_i) - 1;
+ bit_and_i = tree_to_uhwi (bit_and_cst);
+ target_bit_and_i = 0;
+
+ /* The bit pattern in BIT_AND_I should be a mask for the least
+   significant bit of each packed element that is CMP_BITS wide.  */
+ for (unsigned i = 0; i < vec_elem_bits / cmp_bits_i; i++)
+   target_bit_and_i = (target_bit_and_i << cmp_bits_i) | 1U;
+}
+(if ((exact_log2 (cmp_bits_i)) >= 0
+&& cmp_bits_i < HOST_BITS_PER_WIDE_INT
+&& multiple_p (vec_bits, cmp_bits_i)
+&& vec_elem_bits <= HOST_BITS_PER_WIDE_INT
+&& target_mult_i == mult_i
+&& target_bit_and_i == bit_and_i)
+ /* Compute the vector shape for the comparison and check if the target is
+   able to expand the comparison with that type.  */
+ (with {
+   /* We're doing a signed comparison.  */
+   tree cmp_type = build_nonstandard_integer_type (cmp_bits_i, 0);
+   poly_int64 vector_type_nelts = exact_div (vec_bits, cmp_bits_i);
+   tree vec_cmp_type = build_vector_type (cmp_type, vector_type_nelts);
+   tree vec_truth_type = truth_type_for (vec_cmp_type);
+   tree zeros = build_zero_cst (vec_cmp_type);
+   tree ones = build_all_ones_cst (vec_cmp_type);
+  }
+  (if (expand_vec_cmp_expr_p (vec_cmp_type, vec_truth_type, LT_EXPR)
+  && expand_vec_cond_expr_p (vec_cmp_type, vec_truth_type, LT_EXPR))
+   (view_convert:type (vec_cond (lt:vec_truth_type
+(view_convert:vec_cmp_type @0)
+{ zeros; })
+  { ones; }

Re: [PATCH] fold-const: Treat fp conversion to a type with same mode as copy

[Jakub Jelinek via Gcc-patches]

On Mon, Dec 19, 2022 at 04:11:59PM +0800, Kewen.Lin wrote:
> In function fold_convert_const_real_from_real, when the modes of
> two types involved in fp conversion are the same, we can simply
> take it as copy, rebuild with the exactly same TREE_REAL_CST and
> the target type.  It is more efficient and helps to avoid possible
> unexpected signalling bit clearing in [1].
> 
> Bootstrapped and regtested on x86_64-redhat-linux, aarch64-linux-gnu
> and powerpc64{,le}-linux-gnu.
> 
> Is it ok for trunk?
> 
> [1] https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608533.html
> 
> gcc/ChangeLog:
> 
>   * fold-const.cc (fold_convert_const_real_from_real): Treat floating
>   point conversion to a type with same mode as copy instead of normal
>   convertFormat.

The patch is ok for trunk.  Thanks.

Jakub

Re: [PATCH RFA(tree)] c++: source position of lambda captures [PR84471]

[Richard Biener via Gcc-patches]

On Fri, Dec 2, 2022 at 4:46 PM Jason Merrill via Gcc-patches
 wrote:
>
> Tested x86_64-pc-linux-gnu, OK for trunk?
>
> -- 8< --
>
> If the DECL_VALUE_EXPR of a VAR_DECL has EXPR_LOCATION set, then any use of
> that variable looks like it has that location, which leads to the debugger
> jumping back and forth for both lambdas and structured bindings.
>
> Rather than fix all the uses, it seems simplest to remove any EXPR_LOCATION
> when setting DECL_VALUE_EXPR.  So the cp/ hunks aren't necessary, but it
> seems cleaner not to work to add a location that will immediately get
> stripped.
>
> PR c++/84471
> PR c++/107504
>
> gcc/cp/ChangeLog:
>
> * coroutines.cc (transform_local_var_uses): Don't
> specify a location for DECL_VALUE_EXPR.
> * decl.cc (cp_finish_decomp): Likewise.
>
> gcc/ChangeLog:
>
> * tree.cc (decl_value_expr_insert): Clear EXPR_LOCATION.
>
> gcc/testsuite/ChangeLog:
>
> * g++.dg/tree-ssa/value-expr1.C: New test.
> * g++.dg/tree-ssa/value-expr2.C: New test.
> * g++.dg/analyzer/pr93212.C: Move warning.
> ---
>  gcc/cp/coroutines.cc|  4 ++--
>  gcc/cp/decl.cc  | 12 +++---
>  gcc/testsuite/g++.dg/analyzer/pr93212.C |  4 ++--
>  gcc/testsuite/g++.dg/tree-ssa/value-expr1.C | 16 +
>  gcc/testsuite/g++.dg/tree-ssa/value-expr2.C | 26 +
>  gcc/tree.cc |  3 +++
>  6 files changed, 52 insertions(+), 13 deletions(-)
>  create mode 100644 gcc/testsuite/g++.dg/tree-ssa/value-expr1.C
>  create mode 100644 gcc/testsuite/g++.dg/tree-ssa/value-expr2.C
>
> diff --git a/gcc/cp/coroutines.cc b/gcc/cp/coroutines.cc
> index 01a3e831ee5..a72bd6bbef0 100644
> --- a/gcc/cp/coroutines.cc
> +++ b/gcc/cp/coroutines.cc
> @@ -2047,8 +2047,8 @@ transform_local_var_uses (tree *stmt, int *do_subtree, 
> void *d)
> = lookup_member (lvd->coro_frame_type, local_var.field_id,
>  /*protect=*/1, /*want_type=*/0,
>  tf_warning_or_error);
> - tree fld_idx = build3_loc (lvd->loc, COMPONENT_REF, TREE_TYPE 
> (lvar),
> -lvd->actor_frame, fld_ref, NULL_TREE);
> + tree fld_idx = build3 (COMPONENT_REF, TREE_TYPE (lvar),
> +lvd->actor_frame, fld_ref, NULL_TREE);
>   local_var.field_idx = fld_idx;
>   SET_DECL_VALUE_EXPR (lvar, fld_idx);
>   DECL_HAS_VALUE_EXPR_P (lvar) = true;
> diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc
> index 7af0b05d5f8..59e21581503 100644
> --- a/gcc/cp/decl.cc
> +++ b/gcc/cp/decl.cc
> @@ -9133,9 +9133,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
> count)
>   if (processing_template_decl)
> continue;
>   tree t = unshare_expr (dexp);
> - t = build4_loc (DECL_SOURCE_LOCATION (v[i]), ARRAY_REF,
> - eltype, t, size_int (i), NULL_TREE,
> - NULL_TREE);
> + t = build4 (ARRAY_REF, eltype, t, size_int (i), NULL_TREE, 
> NULL_TREE);
>   SET_DECL_VALUE_EXPR (v[i], t);
>   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
> }
> @@ -9154,9 +9152,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
> count)
>   if (processing_template_decl)
> continue;
>   tree t = unshare_expr (dexp);
> - t = build1_loc (DECL_SOURCE_LOCATION (v[i]),
> - i ? IMAGPART_EXPR : REALPART_EXPR, eltype,
> - t);
> + t = build1 (i ? IMAGPART_EXPR : REALPART_EXPR, eltype, t);
>   SET_DECL_VALUE_EXPR (v[i], t);
>   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
> }
> @@ -9180,9 +9176,7 @@ cp_finish_decomp (tree decl, tree first, unsigned int 
> count)
>   tree t = unshare_expr (dexp);
>   convert_vector_to_array_for_subscript (DECL_SOURCE_LOCATION (v[i]),
>  &t, size_int (i));
> - t = build4_loc (DECL_SOURCE_LOCATION (v[i]), ARRAY_REF,
> - eltype, t, size_int (i), NULL_TREE,
> - NULL_TREE);
> + t = build4 (ARRAY_REF, eltype, t, size_int (i), NULL_TREE, 
> NULL_TREE);
>   SET_DECL_VALUE_EXPR (v[i], t);
>   DECL_HAS_VALUE_EXPR_P (v[i]) = 1;
> }
> diff --git a/gcc/testsuite/g++.dg/analyzer/pr93212.C 
> b/gcc/testsuite/g++.dg/analyzer/pr93212.C
> index 41507e2b837..1029e8d547b 100644
> --- a/gcc/testsuite/g++.dg/analyzer/pr93212.C
> +++ b/gcc/testsuite/g++.dg/analyzer/pr93212.C
> @@ -4,8 +4,8 @@
>  auto lol()
>  {
>  int aha = 3;
> -return [&aha] { // { dg-warning "dereferencing pointer '.*' to within 
> stale stack frame" }
> -return aha;
> +return [&aha] {
> +return aha; // { dg-warning "dereferencing pointer '.*' to within 
> stale stack frame" }
>  };
>  /* TODO: may be worth special-casi

[PATCH] libgfortran: Replace mutex with rwlock

[Lipeng Zhu via Gcc-patches]

This patch try to introduce the rwlock and split the read/write to
unit_root tree and unit_cache with rwlock instead of the mutex to
increase CPU efficiency. In the get_gfc_unit function, the percentage
to step into the insert_unit function is around 30%, in most instances,
we can get the unit in the phase of reading the unit_cache or unit_root
tree. So split the read/write phase by rwlock would be an approach to
make it more parallel.

BTW, the IPC metrics can gain around 9x in our test
server with 220 cores. The benchmark we used is
https://github.com/rwesson/NEAT

libgcc/ChangeLog:

* gthr-posix.h (__GTHREAD_RWLOCK_INIT): New macro
(__gthrw): New function
(__gthread_rwlock_rdlock): New function
(__gthread_rwlock_tryrdlock): New function
(__gthread_rwlock_wrlock): New function
(__gthread_rwlock_trywrlock): New function
(__gthread_rwlock_unlock): New function

libgfortran/ChangeLog:

* io/async.c (DEBUG_LINE): New
* io/async.h (RWLOCK_DEBUG_ADD): New macro
(CHECK_RDLOCK): New macro
(CHECK_WRLOCK): New macro
(TAIL_RWLOCK_DEBUG_QUEUE): New macro
(IN_RWLOCK_DEBUG_QUEUE): New macro
(RDLOCK): New macro
(WRLOCK): New macro
(RWUNLOCK): New macro
(RD_TO_WRLOCK): New macro
(INTERN_RDLOCK): New macro
(INTERN_WRLOCK): New macro
(INTERN_RWUNLOCK): New macro
* io/io.h (internal_proto): Define unit_rwlock
* io/transfer.c (st_read_done_worker): Relace unit_lock with unit_rwlock
(st_write_done_worker): Relace unit_lock with unit_rwlock
* io/unit.c (get_gfc_unit): Relace unit_lock with unit_rwlock
(if): Relace unit_lock with unit_rwlock
(close_unit_1): Relace unit_lock with unit_rwlock
(close_units): Relace unit_lock with unit_rwlock
(newunit_alloc): Relace unit_lock with unit_rwlock
* io/unix.c (flush_all_units): Relace unit_lock with unit_rwlock
---
 libgcc/gthr-posix.h   |  52 +
 libgfortran/io/async.c|   4 +
 libgfortran/io/async.h| 151 ++
 libgfortran/io/io.h   |  15 ++--
 libgfortran/io/transfer.c |   8 +-
 libgfortran/io/unit.c |  65 
 libgfortran/io/unix.c |  16 ++--
 7 files changed, 265 insertions(+), 46 deletions(-)

diff --git a/libgcc/gthr-posix.h b/libgcc/gthr-posix.h
index f1a5ab8e075..358948e8ae8 100644
--- a/libgcc/gthr-posix.h
+++ b/libgcc/gthr-posix.h
@@ -48,6 +48,7 @@ typedef pthread_t __gthread_t;
 typedef pthread_key_t __gthread_key_t;
 typedef pthread_once_t __gthread_once_t;
 typedef pthread_mutex_t __gthread_mutex_t;
+typedef pthread_rwlock_t __gthread_rwlock_t;
 typedef pthread_mutex_t __gthread_recursive_mutex_t;
 typedef pthread_cond_t __gthread_cond_t;
 typedef struct timespec __gthread_time_t;
@@ -58,6 +59,7 @@ typedef struct timespec __gthread_time_t;
 
 #define __GTHREAD_MUTEX_INIT PTHREAD_MUTEX_INITIALIZER
 #define __GTHREAD_MUTEX_INIT_FUNCTION __gthread_mutex_init_function
+#define __GTHREAD_RWLOCK_INIT PTHREAD_RWLOCK_INITIALIZER
 #define __GTHREAD_ONCE_INIT PTHREAD_ONCE_INIT
 #if defined(PTHREAD_RECURSIVE_MUTEX_INITIALIZER)
 #define __GTHREAD_RECURSIVE_MUTEX_INIT PTHREAD_RECURSIVE_MUTEX_INITIALIZER
@@ -135,6 +137,11 @@ __gthrw(pthread_mutexattr_init)
 __gthrw(pthread_mutexattr_settype)
 __gthrw(pthread_mutexattr_destroy)
 
+__gthrw(pthread_rwlock_rdlock)
+__gthrw(pthread_rwlock_tryrdlock)
+__gthrw(pthread_rwlock_wrlock)
+__gthrw(pthread_rwlock_trywrlock)
+__gthrw(pthread_rwlock_unlock)
 
 #if defined(_LIBOBJC) || defined(_LIBOBJC_WEAK)
 /* Objective-C.  */
@@ -885,6 +892,51 @@ __gthread_cond_destroy (__gthread_cond_t* __cond)
   return __gthrw_(pthread_cond_destroy) (__cond);
 }
 
+static inline int
+__gthread_rwlock_rdlock (__gthread_rwlock_t *__rwlock)
+{
+  if (__gthread_active_p ())
+return __gthrw_(pthread_rwlock_rdlock) (__rwlock);
+  else
+return 0;
+}
+
+static inline int
+__gthread_rwlock_tryrdlock (__gthread_rwlock_t *__rwlock)
+{
+  if (__gthread_active_p ())
+return __gthrw_(pthread_rwlock_tryrdlock) (__rwlock);
+  else
+return 0;
+}
+
+static inline int
+__gthread_rwlock_wrlock (__gthread_rwlock_t *__rwlock)
+{
+  if (__gthread_active_p ())
+return __gthrw_(pthread_rwlock_wrlock) (__rwlock);
+  else
+return 0;
+}
+
+static inline int
+__gthread_rwlock_trywrlock (__gthread_rwlock_t *__rwlock)
+{
+  if (__gthread_active_p ())
+return __gthrw_(pthread_rwlock_trywrlock) (__rwlock);
+  else
+return 0;
+}
+
+static inline int
+__gthread_rwlock_unlock (__gthread_rwlock_t *__rwlock)
+{
+  if (__gthread_active_p ())
+return __gthrw_(pthread_rwlock_unlock) (__rwlock);
+  else
+return 0;
+}
+
 #endif /* _LIBOBJC */
 
 #endif /* ! GCC_GTHR_POSIX_H */
diff --git a/libgfortran/io/async.c b/libgfortran/io/async.c
index 912b39ea302..f0bde979da4 100644
--- a/libgfortran/io/async.c
+++ b/libgfortran/io/async.c
@@ -42,6 +42,10 @@ DEBUG_LINE (__thread const char *aio_prefix = MPREFIX);
 
 DEBUG_LINE (__gthread_mutex_t debug_queue_lock = __GTHREAD_MUTEX_IN

[PATCH 3/3] contrib: Add dg-out-generator.pl

[Arsen Arsenović via Gcc-patches]

This script is a helper used to generate dg-output lines from an existing
program output conveniently.  It takes care of escaping Tcl and ARE stuff.

contrib/ChangeLog:

* dg-out-generator.pl: New file.
---
 contrib/dg-out-generator.pl | 79 +
 1 file changed, 79 insertions(+)
 create mode 100755 contrib/dg-out-generator.pl

diff --git a/contrib/dg-out-generator.pl b/contrib/dg-out-generator.pl
new file mode 100755
index 000..663b00fa496
--- /dev/null
+++ b/contrib/dg-out-generator.pl
@@ -0,0 +1,79 @@
+#!/usr/bin/env perl
+#
+# Copyright (C) 2022 GCC Contributors.
+# Contributed by Arsen Arsenović.
+#
+# This script is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+
+# This script reads program output on STDIN, and out of it produces a block of
+# dg-output lines that can be yanked at the end of a file.  It will escape
+# special ARE and Tcl constructs automatically.
+#
+# Each argument passed on the standard input is treated as a string to be
+# replaced by ``.*'' in the final result.  This is intended to mask out build
+# paths, filenames, etc.
+#
+# Usage example:
+
+# $ g++-13 -fcontracts -o test \
+#  'g++.dg/contracts/contracts-access1.C' && \
+#   ./test |& dg-out-generator.pl 'g++.dg/contracts/contracts-access1.C'
+# // { dg-output {contract violation in function Base::b at .*:11: pub > 
0(\n|\r\n|\r)*} }
+# // { dg-output {\[level:default, role:default, continuation 
mode:never\](\n|\r\n|\r)*} }
+# // { dg-output {terminate called without an active exception(\n|\r\n|\r)*} }
+
+# You can now freely dump the above into your testcase.
+
+use strict;
+use warnings;
+use POSIX 'floor';
+
+my $escapees = '(' . join ('|', map { quotemeta } @ARGV) . ')';
+
+sub gboundary($)
+{
+  my $str = shift;
+  my $sz = 10.0;
+  for (;;)
+{
+  my $bnd = join '', (map chr 64 + rand 27, 1 .. floor $sz);
+  return $bnd unless index ($str, $bnd) >= 0;
+  $sz += 0.1;
+}
+}
+
+while ()
+  {
+# Escape our escapees.
+my $boundary;
+if (@ARGV) {
+  # Checking this is necessary to avoid a spurious .* between all
+  # characters if no arguments are passed.
+  $boundary = gboundary $_;
+  s/$escapees/$boundary/g;
+}
+
+# Quote stuff special in Tcl ARE.  This step also effectively nulls any
+# concern about escaping.  As long as all curly braces are escaped, the
+# string will, when passing through the braces rule of Tcl, be identical to
+# the input.
+s/([[\]*+?{}()\\])/\\$1/g;
+
+# Newlines should be more tolerant.
+s/\n$/(\\n|\\r\\n|\\r)*/;
+
+# Then split out the boundary, replacing it with .*.
+s/$boundary/.*/g if defined $boundary;
+
+# Then, let's print it in a dg-output block.  If you'd prefer /* keep in
+# mind that if your string contains */ it could terminate the comment
+# early.  Maybe add an extra s!\*/!*()/!g or something.
+print "// { dg-output {$_} }\n";
+  }
+
+# File Local Vars:
+# indent-tabs-mode: nil
+# End:
-- 
2.39.0

[PATCH 2/3] contracts: Update testsuite against new default viol. handler format

[Arsen Arsenović via Gcc-patches]

This change was almost entirely mechanical.  Save for two files which had very
short matches, these changes were produced by two seds and a Perl script, for
the more involved cases.  The latter will be added in a subsequent commit.  The
former are as follows:

sed -E -i "/dg-output/s/default std::handle_contract_violation called: \
(\S+) (\S+) (\S+(<[A-Za-z0-9, ]*)?>?)\
/contract violation in function \3 at \1:\2: /" *.C
sed -i '/dg-output/s/  */ /g'

Whichever files remained failing after the above changes were checked-out,
re-ran, with output extracted, and ran through dg-out-generator.pl.

gcc/testsuite/ChangeLog:

* g++.dg/contracts/contracts-access1.C: Convert to new default
violation handler.
* g++.dg/contracts/contracts-config1.C: Ditto.
* g++.dg/contracts/contracts-constexpr1.C: Ditto.
* g++.dg/contracts/contracts-ctor-dtor1.C: Ditto.
* g++.dg/contracts/contracts-deduced2.C: Ditto.
* g++.dg/contracts/contracts-friend1.C: Ditto.
* g++.dg/contracts/contracts-multiline1.C: Ditto.
* g++.dg/contracts/contracts-post3.C: Ditto.
* g++.dg/contracts/contracts-pre10.C: Ditto.
* g++.dg/contracts/contracts-pre2.C: Ditto.
* g++.dg/contracts/contracts-pre2a2.C: Ditto.
* g++.dg/contracts/contracts-pre3.C: Ditto.
* g++.dg/contracts/contracts-pre4.C: Ditto.
* g++.dg/contracts/contracts-pre5.C: Ditto.
* g++.dg/contracts/contracts-pre7.C: Ditto.
* g++.dg/contracts/contracts-pre9.C: Ditto.
* g++.dg/contracts/contracts-redecl3.C: Ditto.
* g++.dg/contracts/contracts-redecl4.C: Ditto.
* g++.dg/contracts/contracts-redecl6.C: Ditto.
* g++.dg/contracts/contracts-redecl7.C: Ditto.
* g++.dg/contracts/contracts-tmpl-spec1.C: Ditto.
* g++.dg/contracts/contracts-tmpl-spec2.C: Ditto.
* g++.dg/contracts/contracts-tmpl-spec3.C: Ditto.
* g++.dg/contracts/contracts10.C: Ditto.
* g++.dg/contracts/contracts19.C: Ditto.
* g++.dg/contracts/contracts25.C: Ditto.
* g++.dg/contracts/contracts3.C: Ditto.
* g++.dg/contracts/contracts35.C: Ditto.
* g++.dg/contracts/contracts5.C: Ditto.
* g++.dg/contracts/contracts7.C: Ditto.
* g++.dg/contracts/contracts9.C: Ditto.
---
 .../g++.dg/contracts/contracts-access1.C  |  36 +--
 .../g++.dg/contracts/contracts-config1.C  |  30 ++-
 .../g++.dg/contracts/contracts-constexpr1.C   |  16 +-
 .../g++.dg/contracts/contracts-ctor-dtor1.C   |  96 
 .../g++.dg/contracts/contracts-deduced2.C |  20 +-
 .../g++.dg/contracts/contracts-friend1.C  |  10 +-
 .../g++.dg/contracts/contracts-multiline1.C   |   2 +-
 .../g++.dg/contracts/contracts-post3.C|   2 +-
 .../g++.dg/contracts/contracts-pre10.C| 122 ++
 .../g++.dg/contracts/contracts-pre2.C |  36 +--
 .../g++.dg/contracts/contracts-pre2a2.C   |   6 +-
 .../g++.dg/contracts/contracts-pre3.C | 156 ++--
 .../g++.dg/contracts/contracts-pre4.C |  12 +-
 .../g++.dg/contracts/contracts-pre5.C |  24 +-
 .../g++.dg/contracts/contracts-pre7.C |  24 +-
 .../g++.dg/contracts/contracts-pre9.C |  24 +-
 .../g++.dg/contracts/contracts-redecl3.C  |  36 +--
 .../g++.dg/contracts/contracts-redecl4.C  |  24 +-
 .../g++.dg/contracts/contracts-redecl6.C  |  36 +--
 .../g++.dg/contracts/contracts-redecl7.C  |  18 +-
 .../g++.dg/contracts/contracts-tmpl-spec1.C   |  26 +-
 .../g++.dg/contracts/contracts-tmpl-spec2.C   | 230 +++---
 .../g++.dg/contracts/contracts-tmpl-spec3.C   |  27 +-
 gcc/testsuite/g++.dg/contracts/contracts10.C  |  16 +-
 gcc/testsuite/g++.dg/contracts/contracts19.C  |   4 +-
 gcc/testsuite/g++.dg/contracts/contracts25.C  |   8 +-
 gcc/testsuite/g++.dg/contracts/contracts3.C   |   2 +-
 gcc/testsuite/g++.dg/contracts/contracts35.C  |  16 +-
 gcc/testsuite/g++.dg/contracts/contracts5.C   |   2 +-
 gcc/testsuite/g++.dg/contracts/contracts7.C   |   2 +-
 gcc/testsuite/g++.dg/contracts/contracts9.C   |  24 +-
 31 files changed, 594 insertions(+), 493 deletions(-)

diff --git a/gcc/testsuite/g++.dg/contracts/contracts-access1.C 
b/gcc/testsuite/g++.dg/contracts/contracts-access1.C
index a3a29821017..414b29a1613 100644
--- a/gcc/testsuite/g++.dg/contracts/contracts-access1.C
+++ b/gcc/testsuite/g++.dg/contracts/contracts-access1.C
@@ -107,22 +107,22 @@ int main()
   return 0;
 }
 
-// { dg-output "default std::handle_contract_violation called: .*.C 11 Base::b 
.*(\n|\r\n|\r)*" }
-// { dg-output "default std::handle_contract_violation called: .*.C 12 Base::b 
.*(\n|\r\n|\r)*" }
-// { dg-output "default std::handle_contract_violation called: .*.C 13 Base::b 
.*(\n|\r\n|\r)*" }
-// { dg-output "default std::handle_contract_violation called: .*.C 26 
Child::fun .*(\n|\r\n|\r)*" }
-// { dg-output "default std::handle_contract_violation called: .*.C 27 
Child::fun .*(\n|\r\n|\r)*"

[PATCH 1/3] libstdc++: Improve output of default contract violation handler [PR107792]

[Arsen Arsenović via Gcc-patches]

From: Jonathan Wakely 

Make the output more readable. Don't output anything unless verbose
termination is enabled at configure-time.

libstdc++-v3/ChangeLog:

PR libstdc++/107792
PR libstdc++/107778
* src/experimental/contract.cc (handle_contract_violation): Make
output more readable.
---
Alright, updated to omit information that's defaulted.

Turns out your suggestion for dg-output was quite clever - because {} is
special in ARE, it's always prefixed by \ when escaping with curlies,
and so it never counds towards the "paired curly braces" rules, and
requires no extra escaping code at all!  That's quite a bit neater.

 libstdc++-v3/src/experimental/contract.cc | 50 ++-
 1 file changed, 39 insertions(+), 11 deletions(-)

diff --git a/libstdc++-v3/src/experimental/contract.cc 
b/libstdc++-v3/src/experimental/contract.cc
index c8d2697eddc..fbe8815a5c2 100644
--- a/libstdc++-v3/src/experimental/contract.cc
+++ b/libstdc++-v3/src/experimental/contract.cc
@@ -1,4 +1,5 @@
 // -*- C++ -*- std::experimental::contract_violation and friends
+
 // Copyright (C) 2019-2022 Free Software Foundation, Inc.
 //
 // This file is part of GCC.
@@ -23,19 +24,46 @@
 // .
 
 #include 
-#include 
+#if _GLIBCXX_HOSTED && _GLIBCXX_VERBOSE
+# include 
+#endif
 
 __attribute__ ((weak)) void
 handle_contract_violation (const std::experimental::contract_violation 
&violation)
 {
-  std::cerr << "default std::handle_contract_violation called: \n"
-<< " " << violation.file_name()
-<< " " << violation.line_number()
-<< " " << violation.function_name()
-<< " " << violation.comment()
-<< " " << violation.assertion_level()
-<< " " << violation.assertion_role()
-<< " " << (int)violation.continuation_mode()
-<< std::endl;
+#if _GLIBCXX_HOSTED && _GLIBCXX_VERBOSE
+  bool level_default_p = violation.assertion_level() == "default";
+  bool role_default_p = violation.assertion_role() == "default";
+  bool cont_mode_default_p = violation.continuation_mode()
+== std::experimental::contract_violation_continuation_mode::never_continue;
+
+  const char* modes[]{ "never", "maybe" }; // Must match enumerators in header.
+  std::cerr << "contract violation in function " << violation.function_name()
+<< " at " << violation.file_name() << ':' << violation.line_number()
+<< ": " << violation.comment();
+
+  const char* delimiter = "\n[";
+
+  if (!level_default_p)
+{
+  std::cerr << delimiter << "level:" << violation.assertion_level();
+  delimiter = ", ";
+}
+  if (!role_default_p)
+{
+  std::cerr << delimiter << "role:" << violation.assertion_role();
+  delimiter = ", ";
+}
+  if (!cont_mode_default_p)
+{
+  std::cerr << delimiter << "mode:"
+   << modes[(int)violation.continuation_mode() & 1];
+  delimiter = ", ";
+}
+
+  if (delimiter[0] == ',')
+std::cerr << ']';
+
+  std::cerr << std::endl;
+#endif
 }
-
-- 
2.39.0

[PATCH] aarch64: Fix plugin header install

[Jakub Jelinek via Gcc-patches]

Hi!

The r13-2943-g11a113d501ff64 made aarch64.h include
aarch64-option-extensions.def, but that file isn't installed
for building plugins.

The following patch should fix that, ok for trunk if it
passes bootstrap/regtest + building plugin against it?

2022-12-20  Jakub Jelinek  

* config/aarch64/t-aarch64 (OPTIONS_H_EXTRA): Add
aarch64-option-extensions.def.

--- gcc/config/aarch64/t-aarch64.jj 2022-04-04 13:55:46.001615509 +0200
+++ gcc/config/aarch64/t-aarch642022-12-20 11:31:03.245651809 +0100
@@ -22,7 +22,8 @@ TM_H += $(srcdir)/config/aarch64/aarch64
 OPTIONS_H_EXTRA += $(srcdir)/config/aarch64/aarch64-cores.def \
   $(srcdir)/config/aarch64/aarch64-arches.def \
   $(srcdir)/config/aarch64/aarch64-fusion-pairs.def \
-  $(srcdir)/config/aarch64/aarch64-tuning-flags.def
+  $(srcdir)/config/aarch64/aarch64-tuning-flags.def \
+  $(srcdir)/config/aarch64/aarch64-option-extensions.def
 
 $(srcdir)/config/aarch64/aarch64-tune.md: s-aarch64-tune-md; @true
 s-aarch64-tune-md: $(srcdir)/config/aarch64/gentune.sh \

Jakub

[PATCH] libgfortran: Replace mutex with rwlock

[Lipeng Zhu via Gcc-patches]

This patch try to introduce the rwlock and split the read/write to
unit_root tree and unit_cache with rwlock instead of the mutex to
increase CPU efficiency. In the get_gfc_unit function, the percentage
to step into the insert_unit function is around 30%, in most instances,
we can get the unit in the phase of reading the unit_cache or unit_root
tree. So split the read/write phase by rwlock would be an approach to
make it more parallel.

BTW, the IPC metrics can increase from 0.25 to 2.2 in the Intel
SRP server with 220 cores. The benchmark we used is
https://github.com/rwesson/NEAT

libgcc/ChangeLog:

* gthr-posix.h (__GTHREAD_RWLOCK_INIT): New macro
(__gthrw): New function
(__gthread_rwlock_rdlock): New function
(__gthread_rwlock_tryrdlock): New function
(__gthread_rwlock_wrlock): New function
(__gthread_rwlock_trywrlock): New function
(__gthread_rwlock_unlock): New function

libgfortran/ChangeLog:

* io/async.c (DEBUG_LINE): New
* io/async.h (RWLOCK_DEBUG_ADD): New macro
(CHECK_RDLOCK): New macro
(CHECK_WRLOCK): New macro
(TAIL_RWLOCK_DEBUG_QUEUE): New macro
(IN_RWLOCK_DEBUG_QUEUE): New macro
(RDLOCK): New macro
(WRLOCK): New macro
(RWUNLOCK): New macro
(RD_TO_WRLOCK): New macro
(INTERN_RDLOCK): New macro
(INTERN_WRLOCK): New macro
(INTERN_RWUNLOCK): New macro
* io/io.h (internal_proto): Define unit_rwlock
* io/transfer.c (st_read_done_worker): Relace unit_lock with unit_rwlock
(st_write_done_worker): Relace unit_lock with unit_rwlock
* io/unit.c (get_gfc_unit): Relace unit_lock with unit_rwlock
(if): Relace unit_lock with unit_rwlock
(close_unit_1): Relace unit_lock with unit_rwlock
(close_units): Relace unit_lock with unit_rwlock
(newunit_alloc): Relace unit_lock with unit_rwlock
* io/unix.c (flush_all_units): Relace unit_lock with unit_rwlock
---
 libgcc/gthr-posix.h   |  52 +
 libgfortran/io/async.c|   4 +
 libgfortran/io/async.h| 151 ++
 libgfortran/io/io.h   |  15 ++--
 libgfortran/io/transfer.c |   8 +-
 libgfortran/io/unit.c |  65 
 libgfortran/io/unix.c |  16 ++--
 7 files changed, 265 insertions(+), 46 deletions(-)

diff --git a/libgcc/gthr-posix.h b/libgcc/gthr-posix.h
index f1a5ab8e075..358948e8ae8 100644
--- a/libgcc/gthr-posix.h
+++ b/libgcc/gthr-posix.h
@@ -48,6 +48,7 @@ typedef pthread_t __gthread_t;
 typedef pthread_key_t __gthread_key_t;
 typedef pthread_once_t __gthread_once_t;
 typedef pthread_mutex_t __gthread_mutex_t;
+typedef pthread_rwlock_t __gthread_rwlock_t;
 typedef pthread_mutex_t __gthread_recursive_mutex_t;
 typedef pthread_cond_t __gthread_cond_t;
 typedef struct timespec __gthread_time_t;
@@ -58,6 +59,7 @@ typedef struct timespec __gthread_time_t;
 
 #define __GTHREAD_MUTEX_INIT PTHREAD_MUTEX_INITIALIZER
 #define __GTHREAD_MUTEX_INIT_FUNCTION __gthread_mutex_init_function
+#define __GTHREAD_RWLOCK_INIT PTHREAD_RWLOCK_INITIALIZER
 #define __GTHREAD_ONCE_INIT PTHREAD_ONCE_INIT
 #if defined(PTHREAD_RECURSIVE_MUTEX_INITIALIZER)
 #define __GTHREAD_RECURSIVE_MUTEX_INIT PTHREAD_RECURSIVE_MUTEX_INITIALIZER
@@ -135,6 +137,11 @@ __gthrw(pthread_mutexattr_init)
 __gthrw(pthread_mutexattr_settype)
 __gthrw(pthread_mutexattr_destroy)
 
+__gthrw(pthread_rwlock_rdlock)
+__gthrw(pthread_rwlock_tryrdlock)
+__gthrw(pthread_rwlock_wrlock)
+__gthrw(pthread_rwlock_trywrlock)
+__gthrw(pthread_rwlock_unlock)
 
 #if defined(_LIBOBJC) || defined(_LIBOBJC_WEAK)
 /* Objective-C.  */
@@ -885,6 +892,51 @@ __gthread_cond_destroy (__gthread_cond_t* __cond)
   return __gthrw_(pthread_cond_destroy) (__cond);
 }
 
+static inline int
+__gthread_rwlock_rdlock (__gthread_rwlock_t *__rwlock)
+{
+  if (__gthread_active_p ())
+return __gthrw_(pthread_rwlock_rdlock) (__rwlock);
+  else
+return 0;
+}
+
+static inline int
+__gthread_rwlock_tryrdlock (__gthread_rwlock_t *__rwlock)
+{
+  if (__gthread_active_p ())
+return __gthrw_(pthread_rwlock_tryrdlock) (__rwlock);
+  else
+return 0;
+}
+
+static inline int
+__gthread_rwlock_wrlock (__gthread_rwlock_t *__rwlock)
+{
+  if (__gthread_active_p ())
+return __gthrw_(pthread_rwlock_wrlock) (__rwlock);
+  else
+return 0;
+}
+
+static inline int
+__gthread_rwlock_trywrlock (__gthread_rwlock_t *__rwlock)
+{
+  if (__gthread_active_p ())
+return __gthrw_(pthread_rwlock_trywrlock) (__rwlock);
+  else
+return 0;
+}
+
+static inline int
+__gthread_rwlock_unlock (__gthread_rwlock_t *__rwlock)
+{
+  if (__gthread_active_p ())
+return __gthrw_(pthread_rwlock_unlock) (__rwlock);
+  else
+return 0;
+}
+
 #endif /* _LIBOBJC */
 
 #endif /* ! GCC_GTHR_POSIX_H */
diff --git a/libgfortran/io/async.c b/libgfortran/io/async.c
index 912b39ea302..f0bde979da4 100644
--- a/libgfortran/io/async.c
+++ b/libgfortran/io/async.c
@@ -42,6 +42,10 @@ DEBUG_LINE (__thread const char *aio_prefix = MPREFIX);
 
 DEBUG_LINE (__gthread_mutex_t debug_queue_lock = __

testsuite: Fix pr55569.c excess errors

[Jonathan Yong via Gcc-patches]

This fixes the following:

Excess errors:

gcc/testsuite/gcc.c-torture/compile/pr55569.c:13:12: warning: overflow 
in conversion from 'long long unsigned int' to 'long int' changes value 
from '4611686018427387903' to '-1' [-Woverflow]


gcc/testsuite/gcc.c-torture/compile/pr55569.c:13:34: warning: iteration 
2147483647 invokes undefined behavior [-Waggressive-loop-optimizations]


Patch OK?From 11cc6c38c4b44849110240da3ed553fcc3b35d05 Mon Sep 17 00:00:00 2001
From: Jonathan Yong <10wa...@gmail.com>
Date: Tue, 20 Dec 2022 09:16:16 +
Subject: [PATCH] testsuite: Fix pr55569.c excess errors

This fixes the following:

Excess errors:
gcc/testsuite/gcc.c-torture/compile/pr55569.c:13:12: warning: overflow in conversion from 'long long unsigned int' to 'long int' changes value from '4611686018427387903' to '-1' [-Woverflow]
gcc/testsuite/gcc.c-torture/compile/pr55569.c:13:34: warning: iteration 2147483647 invokes undefined behavior [-Waggressive-loop-optimizations]

gcc/testsuite/ChangeLog:
	* gcc.c-torture/compile/pr55569.c: fix excess errors.

Signed-off-by: Jonathan Yong <10wa...@gmail.com>
---
 gcc/testsuite/gcc.c-torture/compile/pr55569.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr55569.c b/gcc/testsuite/gcc.c-torture/compile/pr55569.c
index cf274cdbb99..6c2c7c7b6f7 100644
--- a/gcc/testsuite/gcc.c-torture/compile/pr55569.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr55569.c
@@ -4,7 +4,7 @@ int *bar (void);
 void
 foo (void)
 {
-  long x;
+  __INTPTR_TYPE__ x;
   int *y = bar ();
 
   /* The loop below may be optimized to a call to memset with a size
-- 
2.39.0

[PATCH] libstdc++: Don't call 4-5 argument to_chars with chars_format{}

[Jakub Jelinek via Gcc-patches]

Hi!

In Fedora build libstdc++.so is built with assertions enabled and
FAIL: 20_util/to_chars/float128_c++23.cc execution test
was failing on all arches.  The problem is that it called 5 argument version
of to_chars with chars_format{}, which C++ says is invalid:
http://eel.is/c++draft/charconv.to.chars#12
Preconditions: fmt has the value of one of the enumerators of chars_format.

The following patch fixes it by skipping the second part of the test
which needs the 5 argument to_chars for chars_format{}, but because
it is strictly speaking invalid also for 4 argument to_chars, it uses
3 argument to_chars instead of 4 argument to_chars with last argument
chars_format{}.

Bootstrapped/regtested on {x86_64,i686,aarch64,powerpc64le,s390x}-linux, ok
for trunk?

2022-12-20  Jakub Jelinek  

* testsuite/20_util/to_chars/float16_c++23.cc (test): Use 3 argument
std::to_chars if fmt is std::chars_format{}, rather than 4 argument.
* testsuite/20_util/to_chars/float128_c++23.cc (test): Likewise, and
skip second part of testing that requires 5 argument std::to_chars.

--- libstdc++-v3/testsuite/20_util/to_chars/float16_c++23.cc.jj 2022-11-01 
22:45:50.653626818 +0100
+++ libstdc++-v3/testsuite/20_util/to_chars/float16_c++23.cc2022-12-19 
16:23:28.989733811 +0100
@@ -36,9 +36,16 @@ test(std::chars_format fmt = std::chars_
   for (int i = 0; i <= (unsigned short) ~0; ++i)
 {
   u.s = i;
-  auto [ptr1, ec1] = std::to_chars(str1, str1 + sizeof(str1), u.f, fmt);
-  auto [ptr2, ec2] = std::to_chars(str2, str2 + sizeof(str2), 
std::float32_t(u.f), fmt);
-  VERIFY( ec1 == std::errc() && ec2 == std::errc());
+  auto [ptr1, ec1] = (fmt == std::chars_format{}
+ ? std::to_chars(str1, str1 + sizeof(str1), u.f)
+ : std::to_chars(str1, str1 + sizeof(str1), u.f,
+ fmt));
+  auto [ptr2, ec2] = (fmt == std::chars_format{}
+ ? std::to_chars(str2, str2 + sizeof(str2),
+ std::float32_t(u.f))
+ : std::to_chars(str2, str2 + sizeof(str2),
+ std::float32_t(u.f), fmt));
+  VERIFY( ec1 == std::errc() && ec2 == std::errc() );
 //std::cout << i << ' ' << std::string_view (str1, ptr1)
 // << '\t' << std::string_view (str2, ptr2) << '\n';
   if (fmt == std::chars_format::fixed)
--- libstdc++-v3/testsuite/20_util/to_chars/float128_c++23.cc.jj
2022-11-25 22:23:44.540104246 +0100
+++ libstdc++-v3/testsuite/20_util/to_chars/float128_c++23.cc   2022-12-19 
16:24:49.142571475 +0100
@@ -60,7 +60,9 @@ test(std::chars_format fmt = std::chars_
   char str1[1], str2[1];
   for (auto u : tests)
 {
-  auto [ptr1, ec1] = std::to_chars(str1, str1 + sizeof(str1), u, fmt);
+  auto [ptr1, ec1] = (fmt == std::chars_format{}
+ ? std::to_chars(str1, str1 + sizeof(str1), u)
+ : std::to_chars(str1, str1 + sizeof(str1), u, fmt));
   VERIFY( ec1 == std::errc() );
 //std::cout << u << ' ' << std::string_view (str1, ptr1) << '\n';
   if (fmt == std::chars_format::fixed)
@@ -77,13 +79,14 @@ test(std::chars_format fmt = std::chars_
   VERIFY( ec4 == std::errc() && ptr4 == ptr1 );
   VERIFY( u == v );
 
+  if (fmt == std::chars_format{})
+   continue;
+
   auto [ptr5, ec5] = std::to_chars(str1, str1 + sizeof(str1), u, fmt, 90);
   VERIFY( ec5 == std::errc() );
 //std::cout << u << ' ' << std::string_view (str1, ptr5) << '\n';
   v = 4.0f128;
-  auto [ptr6, ec6] = std::from_chars(str1, ptr5, v,
-fmt == std::chars_format{}
-? std::chars_format::general : fmt);
+  auto [ptr6, ec6] = std::from_chars(str1, ptr5, v, fmt);
   VERIFY( ec6 == std::errc() && ptr6 == ptr5 );
   if (fmt == std::chars_format::fixed && u > 0.0f128 && u < 0.01f128)
VERIFY( v == 0.0 );

Jakub

[COMMITTED] rust: fix link serialization [PR108113]

[Marc Poulhiès via Gcc-patches]

The Make-lang.in was missing the link serialization support.

PR rust/108113

gcc/rust
* Make-lang.in (rust.serial): New variable.
(rust1$(exeext)): Depend on $(rust.prev). Call LINK_PROGRESS.

Signed-off-by: Marc Poulhiès 
---
Already reviewed and ACKed by Jakub: https://github.com/Rust-GCC/gccrs/pull/1704

bootstrapped on x86_64-linux with --enable-link-serialization=1  
--enable-languages=c,c++,rust,lto.
Committed on master.

 gcc/rust/Make-lang.in | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/gcc/rust/Make-lang.in b/gcc/rust/Make-lang.in
index 681ac7b3fee..713582cfe0c 100644
--- a/gcc/rust/Make-lang.in
+++ b/gcc/rust/Make-lang.in
@@ -35,6 +35,8 @@ GCCRS_TARGET_INSTALL_NAME := $(target_noncanonical)-$(shell 
echo gccrs|sed '$(pr
 # Define the names for selecting rust in LANGUAGES.
 rust: rust1$(exeext)
 
+rust.serial = rust1$(exeext)
+
 # Tell GNU make to ignore files by these names if they exist.
 .PHONY: rust
 
@@ -163,9 +165,11 @@ RUST_ALL_OBJS = $(GRS_OBJS) $(RUST_TARGET_OBJS)
 rust_OBJS = $(RUST_ALL_OBJS) rust/rustspec.o
 
 # The compiler itself is called rust1 (formerly grs1)
-rust1$(exeext): $(RUST_ALL_OBJS) attribs.o $(BACKEND) $(LIBDEPS)
+rust1$(exeext): $(RUST_ALL_OBJS) attribs.o $(BACKEND) $(LIBDEPS) $(rust.prev)
+   @$(call LINK_PROGRESS,$(INDEX.rust),start)
+$(LLINKER) $(ALL_LINKERFLAGS) $(LDFLAGS) -o $@ \
  $(RUST_ALL_OBJS) attribs.o $(BACKEND) $(LIBS) $(BACKENDLIBS)
+   @$(call LINK_PROGRESS,$(INDEX.rust),end)
 
 # Build hooks.
 
-- 
2.39.0

[PING] nvptx: Support global constructors/destructors via 'collect2'

[Thomas Schwinge]

Hi!

Ping.


Minor change in the attached
"nvptx: Support global constructors/destructors via 'collect2'": for
'atexit', add '#include ' to 'libgcc/config/nvptx/crt0.c'.


Grüße
 Thomas


On 2022-12-02T14:35:35+0100, I wrote:
> Hi!
>
> On 2022-12-01T22:13:38+0100, I wrote:
>> I'm working on support for global constructors/destructors with
>> GCC/nvptx
>
> See "nvptx: Support global constructors/destructors via 'collect2'"
> attached; OK to push?  (... with 'gcc/doc/install.texi' accordingly
> updated once 
> "'nm'" and newlib
> 
> "nvptx: Implement '_exit' instead of 'exit'" have been merged; any
> comments to those?)
>
> Per my quick scanning of 'gcc/config.gcc' history, for more than two
> decades, there was a clear trend to remove 'use_collect2=yes'
> configurations; now finally a new one is being added -- making sure we're
> not slowly dispensing with the need for the early 1990s piece of work
> that 'gcc/collect2*' is...  ;'-P
>
>
> Grüße
>  Thomas


-
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München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas 
Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht 
München, HRB 106955
>From 0e7cf5a9f83c3a82eafa126886e5d92651bfbb30 Mon Sep 17 00:00:00 2001
From: Thomas Schwinge 
Date: Sun, 13 Nov 2022 14:19:30 +0100
Subject: [PATCH] nvptx: Support global constructors/destructors via 'collect2'

The function attributes 'constructor', 'destructor', and 'init_priority' now
work, as do the C++ features making use of this.  Test cases with effective
target 'global_constructor' and 'init_priority' now generally work, and
'check-gcc-c++' test results greatly improve; no more "sorry, unimplemented:
global constructors not supported on this target".

This depends on  "'nm'"
generally, and for global destructors support: newlib

"nvptx: Implement '_exit' instead of 'exit'".

	gcc/
	* collect2.cc (write_c_file_glob): Allow for
	'COLLECT2_MAIN_REFERENCE' override.
	* config.gcc : Set 'use_collect2=yes'.
	* config/nvptx/nvptx.h: Adjust.
	gcc/testsuite/
	* gcc.dg/no_profile_instrument_function-attr-1.c: GCC/nvptx is
	'NO_DOT_IN_LABEL' but not 'NO_DOLLAR_IN_LABEL', so '$' may apper
	in identifiers.
	* lib/target-supports.exp
	(check_effective_target_global_constructor): Enable for nvptx.
	libgcc/
	* config.host : Add 'crtbegin.o',
	'crtend.o' to 'extra_parts'.
	* config/nvptx/crt0.c: Invoke '__do_global_ctors',
	'__do_global_dtors'.
	* config/nvptx/crtstuff.c: New.
	* config/nvptx/t-nvptx: Adjust.
---
 gcc/collect2.cc   |  4 ++
 gcc/config.gcc|  1 +
 gcc/config/nvptx/nvptx.h  | 35 ++-
 .../no_profile_instrument_function-attr-1.c   |  2 +-
 gcc/testsuite/lib/target-supports.exp |  3 +-
 libgcc/config.host|  2 +-
 libgcc/config/nvptx/crt0.c|  6 ++
 libgcc/config/nvptx/crtstuff.c| 58 +++
 libgcc/config/nvptx/t-nvptx   | 15 -
 9 files changed, 119 insertions(+), 7 deletions(-)
 create mode 100644 libgcc/config/nvptx/crtstuff.c

diff --git a/gcc/collect2.cc b/gcc/collect2.cc
index d81c7f28f16a..945a9ff86dda 100644
--- a/gcc/collect2.cc
+++ b/gcc/collect2.cc
@@ -2238,8 +2238,12 @@ write_c_file_glob (FILE *stream, const char *name ATTRIBUTE_UNUSED)
 fprintf (stream, "\tdereg_frame,\n");
   fprintf (stream, "\t0\n};\n\n");
 
+# ifdef COLLECT2_MAIN_REFERENCE
+  fprintf (stream, "%s\n\n", COLLECT2_MAIN_REFERENCE);
+# else
   fprintf (stream, "extern entry_pt %s;\n", NAME__MAIN);
   fprintf (stream, "entry_pt *__main_reference = %s;\n\n", NAME__MAIN);
+# endif
 }
 #endif /* ! LD_INIT_SWITCH */
 
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 951902338205..fec67d7b6e40 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2784,6 +2784,7 @@ nvptx-*)
 	tm_file="${tm_file} newlib-stdint.h"
 	use_gcc_stdint=wrap
 	tmake_file="nvptx/t-nvptx"
+	use_collect2=yes
 	if test x$enable_as_accelerator = xyes; then
 		extra_programs="${extra_programs} mkoffload\$(exeext)"
 		tm_file="${tm_file} nvptx/offload.h"
diff --git a/gcc/config/nvptx/nvptx.h b/gcc/config/nvptx/nvptx.h
index dc676dcb5fc5..235c1e4d99d5 100644
--- a/gcc/config/nvptx/nvptx.h
+++ b/gcc/config/nvptx/nvptx.h
@@ -35,7 +35,39 @@
'../../gcc.cc:asm_options', 'HAVE_GNU_AS'.  */
 #define ASM_SPEC "%{v}"
 
-#define STARTFILE_SPEC "%{mmainkernel:crt0.o%s}"
+#define STARTFILE_SPEC \
+  STARTFILE_SPEC_MMAINKERNEL \
+  " " STARTFILE_SPEC_CDTOR
+
+#define ENDFILE_SPEC \
+  ENDFILE_SPEC_CDTOR
+
+#define STARTFILE_SPEC_MMAINKERNEL "%{mmainkernel:crt0.o%s}"
+
+/* Support for global construct