[PATCH] Fix fc-prototypes usage with C_INT64_T and non LP64 Targets.

2023-03-29 Thread Andrew Pinski via Gcc-patches
The problem here is we were outputing long_long instead of
"long long". This was just an oversight and a missing check.

Committed as obvious after a bootstrap/test on x86_64-linux-gnu.

gcc/fortran/ChangeLog:

* dump-parse-tree.cc (get_c_type_name): Fix "long_long"
type name to be "long long". Add a comment on why adding
2 to the name too.
---
 gcc/fortran/dump-parse-tree.cc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/fortran/dump-parse-tree.cc b/gcc/fortran/dump-parse-tree.cc
index 3b24bdc1a6c..f4490da6a19 100644
--- a/gcc/fortran/dump-parse-tree.cc
+++ b/gcc/fortran/dump-parse-tree.cc
@@ -3696,7 +3696,10 @@ get_c_type_name (gfc_typespec *ts, gfc_array_spec *as, 
const char **pre,
  if (c_interop_kinds_table[i].f90_type == ts->type
  && c_interop_kinds_table[i].value == ts->kind)
{
+ /* Skip over 'c_'. */
  *type_name = c_interop_kinds_table[i].name + 2;
+ if (strcmp (*type_name, "long_long") == 0)
+   *type_name = "long long";
  if (strcmp (*type_name, "signed_char") == 0)
*type_name = "signed char";
  else if (strcmp (*type_name, "size_t") == 0)
-- 
2.17.1



Re: [PATCH 2/2] c++: duplicate "use of deleted fn" diagnostic [PR106880]

2023-03-29 Thread Jason Merrill via Gcc-patches

On 3/23/23 17:18, Patrick Palka wrote:

Here we're issuing a duplicate diagnostic for the use of the deleted
foo, first from the CALL_EXPR case of tsubst_copy_and_build (which
doesn't exit early upon failure), and again from from build_over_call
when rebuilding the substituted CALL_EXPR.

We can fix this by exiting early upon failure of the first call, but
this first call should always be redundant since build_over_call (or
another subroutine of finish_call_expr) ought to reliably call mark_used
for a suitable DECL_P callee anyway.

So this patch just gets rid of the first call to mark_used.

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk?


OK.


PR c++/106880

gcc/cp/ChangeLog:

* pt.cc (tsubst_copy_and_build) : Don't call
mark_used.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/deleted16.C: New test.
---
  gcc/cp/pt.cc   |  6 --
  gcc/testsuite/g++.dg/cpp0x/deleted16.C | 11 +++
  2 files changed, 11 insertions(+), 6 deletions(-)
  create mode 100644 gcc/testsuite/g++.dg/cpp0x/deleted16.C

diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index 9b3cc1c..060d2d38504 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -21176,12 +21176,6 @@ tsubst_copy_and_build (tree t,
  }
  }
  
-	/* Remember that there was a reference to this entity.  */

-   if (function != NULL_TREE
-   && DECL_P (function)
-   && !mark_used (function, complain) && !(complain & tf_error))
- RETURN (error_mark_node);
-
if (!maybe_fold_fn_template_args (function, complain))
  return error_mark_node;
  
diff --git a/gcc/testsuite/g++.dg/cpp0x/deleted16.C b/gcc/testsuite/g++.dg/cpp0x/deleted16.C

new file mode 100644
index 000..93cfb51eb3d
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp0x/deleted16.C
@@ -0,0 +1,11 @@
+// PR c++/106880
+// Verify we don't emit a "use of deleted function" diagnostic twice.
+// { dg-do compile { target c++11 } }
+
+void foo() = delete;
+
+template
+void f(T t) { foo(t); } // { dg-bogus "deleted function.*deleted function" }
+// { dg-error "deleted function" "" { target *-*-*} 
.-1 }
+
+template void f(int);




Re: [PATCH] c++: Avoid informs without a warning [PR109278]

2023-03-29 Thread Jason Merrill via Gcc-patches

On 3/29/23 16:57, Jakub Jelinek wrote:

On Wed, Mar 29, 2023 at 04:35:15PM -0400, Jason Merrill wrote:

On the following testcase we emit notes in
maybe_inform_about_fndecl_for_bogus_argument_init
despite no warning/error being printed before it.
This is for the extended floating point type conversions where pedwarn
is used, and complained is used there for 2 different purposes,
one is whether an unspecific error should be emitted if we haven't
complained otherwise, and one whether
maybe_inform_about_fndecl_for_bogus_argument_init should be called.
For the 2 pedwarns, currently it sets complained to true regardless of
whether pedwarn succeeded, which results in the undesirable notes printed
with -w.  If complained is initialized to result of pedwarn, we would
emit an error later on.

So, the following patch makes complained a tristate, the additional
error isn't printed if complained != 0, and
maybe_inform_about_fndecl_for_bogus_argument_init is called only if
complained == 1, so if pedwarn returns false, we can use complained = -1
to tell later code not to emit an error and not to call
maybe_inform_about_fndecl_for_bogus_argument_init.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2023-03-25  Jakub Jelinek  

PR c++/109278
* call.cc (convert_like_internal): If pedwarn for extended float
type conversions doesn't report anything, avoid calling
maybe_inform_about_fndecl_for_bogus_argument_init.


I think we want the same handling for all the complained = permerror cases
as well.


I think it isn't really needed in those cases.
If I have say:
int foo (int);
int a = foo ({ { 1 } });
int bar (bool);
decltype (nullptr) n;
int b = bar (n);
and compile with -fpermissive -w (which is I think the only way how to get
permerror return false), then it will later reach that:
   if (!complained && expr != error_mark_node)
 {
   range_label_for_type_mismatch label (TREE_TYPE (expr), totype);
   gcc_rich_location richloc (loc, );
   complained = permerror (,
   "invalid conversion from %qH to %qI",
   TREE_TYPE (expr), totype);
 }
   if (complained)
 maybe_inform_about_fndecl_for_bogus_argument_init (fn, argnum);
in current trunk or complained == 1 in the latter condition with the
patch.  !complained is true, so it will call permerror, but because
of -fpermissive -w neither that permerror will emit anything and will set
complained to false, so maybe_inform_about_fndecl_for_bogus_argument_init
is not called.  If I compile the above just with -fpermissive, it prints
the 2 warnings and 2 informs, if without -fpermissive, it prints the 2
errors and 2 informs.


Ah, makes sense.  The patch is OK.


If you want, I can add the above snippet as 3 testcases (normal,
-fpermissive and -fpermissive -w).

Jakub





[PATCH] Support vector conversion for AVX512 vcvtudq2pd/vcvttps2udq/vcvttpd2udq.

2023-03-29 Thread liuhongt via Gcc-patches
There's some typo for the standard pattern name for unsigned_{float,fix},
it should be floatunsmn2/fixuns_truncmn2, not ufloatmn2/ufix_truncmn2
in current trunk, the patch fix the typo.

Also vcvttps2udq is available under AVX512VL, so it can be generated
directly instead of being emulated via vcvttps2dq.

Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}
Ok for GCC14 stage1{or maybe for trunk)?

gcc/ChangeLog:

PR target/85048
* config/i386/sse.md (floatuns2):
Generate vcvtudq2ps under AVX512VL.
(fixuns_truncv4dfv4si2): New expander.
(floatuns2): New expander.

gcc/testsuite/ChangeLog:

* g++.target/i386/pr85048.C: New test.
---
 gcc/config/i386/sse.md  | 18 --
 gcc/testsuite/g++.target/i386/pr85048.C | 33 +
 2 files changed, 49 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/g++.target/i386/pr85048.C

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 172ec3bea4f..9c2bd468c65 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -8014,8 +8014,9 @@ (define_expand "fixuns_trunc2"
(match_operand:VF1 1 "register_operand")]
   "TARGET_SSE2"
 {
-  if (mode == V16SFmode)
-emit_insn (gen_ufix_truncv16sfv16si2 (operands[0],
+  /* AVX512 support vcvttps2udq for all 128/256/512-bit vectors.  */
+  if (mode == V16SFmode || TARGET_AVX512VL)
+emit_insn (gen_ufix_trunc2 (operands[0],
  operands[1]));
   else
 {
@@ -8413,6 +8414,12 @@ (define_insn "*floatv2div2sf2_mask_1"
(set_attr "prefix" "evex")
(set_attr "mode" "V4SF")])
 
+(define_expand "floatuns2"
+  [(set (match_operand:VF2_512_256VL 0 "register_operand")
+   (unsigned_float:VF2_512_256VL
+ (match_operand: 1 "nonimmediate_operand")))]
+   "TARGET_AVX512F")
+
 (define_insn "ufloat2"
   [(set (match_operand:VF2_512_256VL 0 "register_operand" "=v")
(unsigned_float:VF2_512_256VL
@@ -8694,6 +8701,13 @@ (define_insn "fix_truncv4dfv4si2"
(set_attr "prefix" "maybe_evex")
(set_attr "mode" "OI")])
 
+
+/* The standard pattern name is fixuns_truncmn2.  */
+(define_expand "fixuns_truncv4dfv4si2"
+  [(set (match_operand:V4SI 0 "register_operand")
+   (unsigned_fix:V4SI (match_operand:V4DF 1 "nonimmediate_operand")))]
+  "TARGET_AVX512VL && TARGET_AVX512F")
+
 (define_insn "ufix_truncv4dfv4si2"
   [(set (match_operand:V4SI 0 "register_operand" "=v")
(unsigned_fix:V4SI (match_operand:V4DF 1 "nonimmediate_operand" "vm")))]
diff --git a/gcc/testsuite/g++.target/i386/pr85048.C 
b/gcc/testsuite/g++.target/i386/pr85048.C
new file mode 100644
index 000..52973c18ebd
--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr85048.C
@@ -0,0 +1,33 @@
+/* PR target/85048 */
+/* { dg-do compile }  */
+/* { dg-options "-std=c++17 -O2 -mavx512vl -mavx512dq 
-mprefer-vector-width=512" } */
+/* { dg-final { scan-assembler-times {(?n)vcvtudq2pd[ \t]+} 2 } } */
+/* { dg-final { scan-assembler-times {(?n)vcvttps2udq[ \t]+} 2 } } */
+/* { dg-final { scan-assembler-times {(?n)vcvttpd2udqy?[ \t]+} 1 } } */
+
+#include 
+
+template 
+using V [[gnu::vector_size(Size)]] = T;
+
+template  V cvt4(V x) {
+return V{To(x[0]), To(x[1]), To(x[2]), To(x[3])};
+}
+template  V cvt8(V x) {
+return V{
+To(x[0]), To(x[1]), To(x[2]), To(x[3]),
+To(x[4]), To(x[5]), To(x[6]), To(x[7])
+};
+}
+
+#define _(name, from, to, size) \
+auto name(V x) { return cvt##size(x); }
+// integral -> double
+_(vcvtudq2pd, uint32_t, double, 4)
+_(vcvtudq2pd, uint32_t, double, 8)
+
+_( cvttps2udq, float, uint32_t,  4)
+_(vcvttps2udq, float, uint32_t,  8)
+
+// double -> integral
+_(vcvttpd2udq, double, uint32_t, 4)
-- 
2.39.1.388.g2fc9e9ca3c



[GCC14 QUEUE PATCH] RISC-V: Optimize fault only first load

2023-03-29 Thread juzhe . zhong
From: Juzhe-Zhong 

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Adapt PASS.
* config/riscv/vector-iterators.md: New unspec.
* config/riscv/vector.md: Optimize fault only first load pattern.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/vsetvl/ffload-1.c: New test.
* gcc.target/riscv/rvv/vsetvl/ffload-2.c: New test.
* gcc.target/riscv/rvv/vsetvl/ffload-3.c: New test.
* gcc.target/riscv/rvv/vsetvl/ffload-4.c: New test.
* gcc.target/riscv/rvv/vsetvl/ffload-5.c: New test.
* gcc.target/riscv/rvv/vsetvl/ffload-6.c: New test.
* gcc.target/riscv/rvv/vsetvl/ffload-7.c: New test.

---
 gcc/config/riscv/riscv-vsetvl.cc  |  3 +-
 gcc/config/riscv/vector-iterators.md  |  1 +
 gcc/config/riscv/vector.md| 10 -
 .../gcc.target/riscv/rvv/vsetvl/ffload-1.c| 21 +++
 .../gcc.target/riscv/rvv/vsetvl/ffload-2.c| 28 ++
 .../gcc.target/riscv/rvv/vsetvl/ffload-3.c| 28 ++
 .../gcc.target/riscv/rvv/vsetvl/ffload-4.c| 37 +++
 .../gcc.target/riscv/rvv/vsetvl/ffload-5.c| 29 +++
 .../gcc.target/riscv/rvv/vsetvl/ffload-6.c| 29 +++
 .../gcc.target/riscv/rvv/vsetvl/ffload-7.c| 32 
 10 files changed, 216 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-3.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-5.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-6.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-7.c

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index 58568b45010..4d043c0645b 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -4003,7 +4003,8 @@ pass_vsetvl::cleanup_insns (void) const
  if (!has_vl_op (rinsn) || !REG_P (get_vl (rinsn)))
continue;
  rtx avl = get_vl (rinsn);
- if (count_occurrences (PATTERN (rinsn), avl, 0) == 1)
+ if (count_occurrences (PATTERN (rinsn), avl, 0) == 1
+ || fault_first_load_p (rinsn))
{
  /* Get the list of uses for the new instruction.  */
  auto attempt = crtl->ssa->new_change_attempt ();
diff --git a/gcc/config/riscv/vector-iterators.md 
b/gcc/config/riscv/vector-iterators.md
index 34e486e48ca..8fff61eff30 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -80,6 +80,7 @@
   UNSPEC_VRGATHEREI16
   UNSPEC_VCOMPRESS
   UNSPEC_VLEFF
+  UNSPEC_MODIFY_VL
 ])
 
 (define_mode_iterator V [
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index b0a4d4cea69..92adfb06122 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -7537,7 +7537,15 @@
  (unspec:V
[(match_operand:V 3 "memory_operand" "m, m, m,  
   m")] UNSPEC_VLEFF)
  (match_operand:V 2 "vector_merge_operand"  "   vu, 0,vu,  
   0")))
-   (set (reg:SI VL_REGNUM) (unspec:SI [(match_dup 0)] UNSPEC_VLEFF))]
+   (set (reg:SI VL_REGNUM)
+ (unspec:SI
+   [(if_then_else:V
+  (unspec:
+   [(match_dup 1) (match_dup 4) (match_dup 5)
+(match_dup 6) (match_dup 7)
+(reg:SI VL_REGNUM) (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
+  (unspec:V [(match_dup 3)] UNSPEC_VLEFF)
+  (match_dup 2))] UNSPEC_MODIFY_VL))]
   "TARGET_VECTOR"
   "vleff.v\t%0,%3%p1"
   [(set_attr "type" "vldff")
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c 
b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c
new file mode 100644
index 000..b2b7eafa945
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize 
-fno-schedule-insns -fno-schedule-insns2" } */
+
+#include "riscv_vector.h"
+
+void f (int8_t * restrict in, int8_t * restrict out, int n, int cond,size_t 
*new_vl,size_t *new_vl2)
+{
+  size_t vl = 101;
+  
+  vint8mf8_t v = __riscv_vle8_v_i8mf8 (in, vl);
+  __riscv_vse8_v_i8mf8 (out, v, vl);
+  vbool64_t mask = __riscv_vlm_v_b64 (in + 100, vl);
+  vint8mf8_t v2 = __riscv_vle8ff_v_i8mf8_tumu (mask, v, in + 100, new_vl, vl);
+  __riscv_vse8_v_i8mf8 (out + 100, v2, *new_vl);
+  v2 = __riscv_vle8ff_v_i8mf8_tumu (mask, v2, in + 200, new_vl2, vl);
+  __riscv_vse8_v_i8mf8 (out + 200, v2, *new_vl2);
+}
+
+/* { dg-final { scan-assembler-times 
{vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*mu} 2 { target { no-opts 
"-O0" no-opts "-g" no-opts 

Re: [committed] libstdc++: Use std::remove_cv_t in std::optional::transform [PR109340]

2023-03-29 Thread Jonathan Wakely via Gcc-patches

On 30/03/23 00:39 +0100, Jonathan Wakely wrote:

Tested powerpc64le-linux. Pushed to trunk.

-- >8 --

We need to strip cv-qualifiers from the result of the callable passed to
std::optional::transform.

For std::expected::transform and std::expected::transform_error I
noticed we were stripping cv-qualifiers but were also incorrectly
stripping references.

libstdc++-v3/ChangeLog:

PR libstdc++/109340
* include/std/expected (expected::transform): Use
std::remove_cv_t instead of std::remove_cvref_t.
(expected::transform_error): Likewise.
(expected::transform): Likewise.
(expected::transform_error): Likewise.
* include/std/optional (transform): Use std::remove_cv_t.
* testsuite/20_util/optional/monadic/pr109340.cc: New test.


Oops, I put the wrong PR number in the commit message and the name of
the new test. I've renamed it to pr109242.cc now.




[committed] libstdc++: Fix constexpr functions in

2023-03-29 Thread Jonathan Wakely via Gcc-patches
Tested powerpc64le-linux. Pushed to trunk.

-- >8 --

Change ip::basic_endpoint to work in constant expressions, but only for
C++20 and later (due to the use of a union, which cannot change active
member in constexpr evaluation until C++20).

During constant evaluation we cannot inspect the common initial sequence
of basic_endpoint's union members to check whether sin_family == AF_INET
or AF_INET6.  This means we need to store an additional boolean member
that remembers whether we have a v4 or v6 address. The address type can
change behind our backs if a user copies an address to the data()
pointer and then calls resize(n), so we need to inspect the sa_family_t
member in the union after a resize and update the boolean. POSIX only
guarantees that the sa_family_t member of each protocol-specific address
structure is at the same offset and of the same type, not that there is
a common initial sequence. The check in resize is done using memcmp, so
that we avoid accessing an inactive member of the union if the
sockaddr_in and sockaddr_in6 structures do not have a common initial
sequence that includes the sa_family_t member.

libstdc++-v3/ChangeLog:

* include/experimental/internet (ip::make_address): Implement
missing overload.
(ip::address_v4::broadcast()): Avoid undefined shift.
(ip::basic_endpoint): Fix member functions for constexpr.
(ip::basic_endpoint::_M_is_v6): Replace member function with
data member, adjust member functions using it.
(ip::basic_endpoint::resize): Update _M_is_v6 based on sockaddr
content.
* testsuite/experimental/net/internet/address/v4/cons.cc: Fix
constexpr checks to work in C++14.
* testsuite/experimental/net/internet/address/v4/creation.cc:
Likewise.
* testsuite/experimental/net/internet/endpoint/cons.cc:
Likewise.
* testsuite/experimental/net/internet/network/v4/cons.cc:
Likewise.
* testsuite/experimental/net/internet/network/v4/members.cc:
Likewise.
* testsuite/experimental/net/internet/endpoint/extensible.cc: New test.
---
 libstdc++-v3/include/experimental/internet| 103 +-
 .../net/internet/address/v4/cons.cc   |  16 ++-
 .../net/internet/address/v4/creation.cc   |  14 ++-
 .../net/internet/endpoint/cons.cc |  29 +++--
 .../net/internet/endpoint/extensible.cc   |  47 
 .../net/internet/network/v4/cons.cc   |  17 ++-
 .../net/internet/network/v4/members.cc|  20 ++--
 7 files changed, 185 insertions(+), 61 deletions(-)
 create mode 100644 
libstdc++-v3/testsuite/experimental/net/internet/endpoint/extensible.cc

diff --git a/libstdc++-v3/include/experimental/internet 
b/libstdc++-v3/include/experimental/internet
index cae07f466da..dff81b456ab 100644
--- a/libstdc++-v3/include/experimental/internet
+++ b/libstdc++-v3/include/experimental/internet
@@ -977,7 +977,8 @@ namespace ip
   { return make_address(__str, __throw_on_error{"make_address"}); }
 
   inline address
-  make_address(const string& __str, error_code& __ec) noexcept; // TODO
+  make_address(const string& __str, error_code& __ec) noexcept
+  { return make_address(__str.c_str(), __ec); }
 
   inline address
   make_address(const string& __str)
@@ -1275,7 +1276,12 @@ namespace ip
 
 constexpr address_v4
 broadcast() const noexcept
-{ return address_v4{_M_addr.to_uint() | (0xu >> _M_prefix_len)}; }
+{
+  auto __b = _M_addr.to_uint();
+  if (_M_prefix_len < 32)
+   __b |= 0xu >> _M_prefix_len;
+  return address_v4{__b};
+}
 
 address_v4_range
 hosts() const noexcept
@@ -1510,19 +1516,31 @@ namespace ip
   basic_endpoint() noexcept : _M_data()
   { _M_data._M_v4.sin_family = protocol_type::v4().family(); }
 
-  constexpr
+  _GLIBCXX20_CONSTEXPR
   basic_endpoint(const protocol_type& __proto,
 port_type __port_num) noexcept
   : _M_data()
   {
-   __glibcxx_assert(__proto == protocol_type::v4()
- || __proto == protocol_type::v6());
-
-   _M_data._M_v4.sin_family = __proto.family();
-   _M_data._M_v4.sin_port = address_v4::_S_hton_16(__port_num);
+   if (__proto == protocol_type::v4())
+ {
+   _M_data._M_v4.sin_family = __proto.family();
+   _M_data._M_v4.sin_port = address_v4::_S_hton_16(__port_num);
+ }
+   else if (__proto == protocol_type::v6())
+ {
+   std::_Construct(&_M_data._M_v6);
+   _M_data._M_v6.sin6_family = __proto.family();
+   _M_data._M_v6.sin6_port = address_v4::_S_hton_16(__port_num);
+   _M_is_v6 = true;
+ }
+   else
+ {
+   __glibcxx_assert(__proto == protocol_type::v4()
+  || __proto == protocol_type::v6());
+ }
   }
 
-  constexpr
+  _GLIBCXX20_CONSTEXPR
   basic_endpoint(const 

[committed] libstdc++: Apply small fix from LWG 3843 to std::expected

2023-03-29 Thread Jonathan Wakely via Gcc-patches
Tested powerpc64le-linux. Pushed to trunk.

-- >8 --

LWG 3843 adds some type requirements to std::expected::value to ensure
that it can correctly copy the error value if it needs to throw an
exception. We don't need to do anything to enforce that, because it will
already be ill-formed if the type can't be copied. The issue also makes
a small drive-by fix to ensure that a const E& is copied from the
non-const value()& overload, which this change implements.

libstdc++-v3/ChangeLog:

* include/std/expected (expected::value() &): Use const lvalue
for unex member passed to bad_expected_access constructor, as
per LWG 3843.
---
 libstdc++-v3/include/std/expected | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/libstdc++-v3/include/std/expected 
b/libstdc++-v3/include/std/expected
index cb5754e2a68..058188248bb 100644
--- a/libstdc++-v3/include/std/expected
+++ b/libstdc++-v3/include/std/expected
@@ -736,7 +736,8 @@ namespace __expected
   {
if (_M_has_value) [[likely]]
  return _M_val;
-   _GLIBCXX_THROW_OR_ABORT(bad_expected_access<_Er>(_M_unex));
+   const auto& __unex = _M_unex;
+   _GLIBCXX_THROW_OR_ABORT(bad_expected_access<_Er>(__unex));
   }
 
   constexpr const _Tp&&
-- 
2.39.2



[committed] libstdc++: Use std::remove_cv_t in std::optional::transform [PR109340]

2023-03-29 Thread Jonathan Wakely via Gcc-patches
Tested powerpc64le-linux. Pushed to trunk.

-- >8 --

We need to strip cv-qualifiers from the result of the callable passed to
std::optional::transform.

For std::expected::transform and std::expected::transform_error I
noticed we were stripping cv-qualifiers but were also incorrectly
stripping references.

libstdc++-v3/ChangeLog:

PR libstdc++/109340
* include/std/expected (expected::transform): Use
std::remove_cv_t instead of std::remove_cvref_t.
(expected::transform_error): Likewise.
(expected::transform): Likewise.
(expected::transform_error): Likewise.
* include/std/optional (transform): Use std::remove_cv_t.
* testsuite/20_util/optional/monadic/pr109340.cc: New test.
---
 libstdc++-v3/include/std/expected | 36 ++-
 libstdc++-v3/include/std/optional |  8 ++---
 .../20_util/optional/monadic/pr109340.cc  | 35 ++
 3 files changed, 59 insertions(+), 20 deletions(-)
 create mode 100644 libstdc++-v3/testsuite/20_util/optional/monadic/pr109340.cc

diff --git a/libstdc++-v3/include/std/expected 
b/libstdc++-v3/include/std/expected
index 567a5195e8d..cb5754e2a68 100644
--- a/libstdc++-v3/include/std/expected
+++ b/libstdc++-v3/include/std/expected
@@ -154,8 +154,12 @@ namespace __expected
 
   template
 using __result = remove_cvref_t>;
+  template
+using __result_xform = remove_cv_t>;
   template
 using __result0 = remove_cvref_t>;
+  template
+using __result0_xform = remove_cv_t>;
 
   template
 concept __can_be_unexpected
@@ -953,7 +957,7 @@ namespace __expected
constexpr auto
transform(_Fn&& __f) &
{
- using _Up = __expected::__result<_Fn, _Tp&>;
+ using _Up = __expected::__result_xform<_Fn, _Tp&>;
  using _Res = expected<_Up, _Er>;
 
  if (has_value())
@@ -969,7 +973,7 @@ namespace __expected
constexpr auto
transform(_Fn&& __f) const &
{
- using _Up = __expected::__result<_Fn, const _Tp&>;
+ using _Up = __expected::__result_xform<_Fn, const _Tp&>;
  using _Res = expected<_Up, _Er>;
 
  if (has_value())
@@ -985,7 +989,7 @@ namespace __expected
constexpr auto
transform(_Fn&& __f) &&
{
- using _Up = __expected::__result<_Fn, _Tp>;
+ using _Up = __expected::__result_xform<_Fn, _Tp>;
  using _Res = expected<_Up, _Er>;
 
  if (has_value())
@@ -1001,7 +1005,7 @@ namespace __expected
constexpr auto
transform(_Fn&& __f) const &&
{
- using _Up = __expected::__result<_Fn, const _Tp>;
+ using _Up = __expected::__result_xform<_Fn, const _Tp>;
  using _Res = expected<_Up, _Er>;
 
  if (has_value())
@@ -1017,7 +1021,7 @@ namespace __expected
constexpr auto
transform_error(_Fn&& __f) &
{
- using _Gr = __expected::__result<_Fn, _Er&>;
+ using _Gr = __expected::__result_xform<_Fn, _Er&>;
  using _Res = expected<_Tp, _Gr>;
 
  if (has_value())
@@ -1033,7 +1037,7 @@ namespace __expected
constexpr auto
transform_error(_Fn&& __f) const &
{
- using _Gr = __expected::__result<_Fn, const _Er&>;
+ using _Gr = __expected::__result_xform<_Fn, const _Er&>;
  using _Res = expected<_Tp, _Gr>;
 
  if (has_value())
@@ -1049,7 +1053,7 @@ namespace __expected
constexpr auto
transform_error(_Fn&& __f) &&
{
- using _Gr = __expected::__result<_Fn, _Er&&>;
+ using _Gr = __expected::__result_xform<_Fn, _Er&&>;
  using _Res = expected<_Tp, _Gr>;
 
  if (has_value())
@@ -1065,7 +1069,7 @@ namespace __expected
constexpr auto
transform_error(_Fn&& __f) const &&
{
- using _Gr = __expected::__result<_Fn, const _Er&&>;
+ using _Gr = __expected::__result_xform<_Fn, const _Er&&>;
  using _Res = expected<_Tp, _Gr>;
 
  if (has_value())
@@ -1630,7 +1634,7 @@ namespace __expected
constexpr auto
transform(_Fn&& __f) &
{
- using _Up = __expected::__result0<_Fn>;
+ using _Up = __expected::__result0_xform<_Fn>;
  using _Res = expected<_Up, _Er>;
 
  if (has_value())
@@ -1643,7 +1647,7 @@ namespace __expected
constexpr auto
transform(_Fn&& __f) const &
{
- using _Up = __expected::__result0<_Fn>;
+ using _Up = __expected::__result0_xform<_Fn>;
  using _Res = expected<_Up, _Er>;
 
  if (has_value())
@@ -1656,7 +1660,7 @@ namespace __expected
constexpr auto
transform(_Fn&& __f) &&
{
- using _Up = __expected::__result0<_Fn>;
+ using _Up = __expected::__result0_xform<_Fn>;
  using _Res = expected<_Up, _Er>;
 
  if (has_value())
@@ -1669,7 +1673,7 @@ namespace __expected
constexpr auto
transform(_Fn&& 

[committed] libstdc++: Enforce requirements on template argument of std::optional

2023-03-29 Thread Jonathan Wakely via Gcc-patches
Tested powerpc64le-linux. Pushed to trunk.

-- >8 --

The standard does not allow std::optional, std::optional,
std::optional etc. and although we do give errors, they come from
down inside the internals of std::optional. We could improve the static
assertions at the top of the class so that users get a more precise
diagnostic:

optional:721:21: error: static assertion failed
721 |   static_assert(is_object_v<_Tp> && !is_array_v<_Tp>);

libstdc++-v3/ChangeLog:

* include/std/optional (optional): Adjust static assertion to
reject arrays and functions as well as references.
* testsuite/20_util/optional/requirements_neg.cc: New test.
---
 libstdc++-v3/include/std/optional |  2 +-
 .../20_util/optional/requirements_neg.cc  | 24 +++
 2 files changed, 25 insertions(+), 1 deletion(-)
 create mode 100644 libstdc++-v3/testsuite/20_util/optional/requirements_neg.cc

diff --git a/libstdc++-v3/include/std/optional 
b/libstdc++-v3/include/std/optional
index 62ff87a3387..90bf74143f4 100644
--- a/libstdc++-v3/include/std/optional
+++ b/libstdc++-v3/include/std/optional
@@ -718,7 +718,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
 {
   static_assert(!is_same_v, nullopt_t>);
   static_assert(!is_same_v, in_place_t>);
-  static_assert(!is_reference_v<_Tp>);
+  static_assert(is_object_v<_Tp> && !is_array_v<_Tp>);
 
 private:
   using _Base = _Optional_base<_Tp>;
diff --git a/libstdc++-v3/testsuite/20_util/optional/requirements_neg.cc 
b/libstdc++-v3/testsuite/20_util/optional/requirements_neg.cc
new file mode 100644
index 000..688c305803e
--- /dev/null
+++ b/libstdc++-v3/testsuite/20_util/optional/requirements_neg.cc
@@ -0,0 +1,24 @@
+// { dg-do compile { target c++17 } }
+
+#include 
+
+// T shall be a type other than cv in_place_t or cv nullopt_t
+// that meets the Cpp17Destructible requirements
+
+std::optional o1;// { dg-error "here" }
+std::optional o2;  // { dg-error "here" }
+std::optional o3;   // { dg-error "here" }
+std::optional o4; // { dg-error "here" }
+std::optional o5;  // { dg-error "here" }
+std::optional o6;// { dg-error "here" }
+std::optional o7; // { dg-error "here" }
+std::optional o8; // { dg-error "here" }
+
+// { dg-error "static assertion failed" "" { target *-*-* } 0 }
+
+// { dg-prune-output "forming pointer to reference type" }
+// { dg-prune-output "union may not have reference type" }
+// { dg-prune-output "function returning an array" }
+// { dg-prune-output "flexible array member .* in union" }
+// { dg-prune-output "function returning a function" }
+// { dg-prune-output "invalidly declared function type" }
-- 
2.39.2



[committed] CRIS: Make rtx-cost 0 for many CONST_INT "quick" operands

2023-03-29 Thread Hans-Peter Nilsson via Gcc-patches
Stepping through a gdb session inspecting costs that cause
gcc.dg/tree-ssa/slsr-13.c to fail, exposed that before this
patch, cris_rtx_costs told that a shift of 1 of a register
costs 5, while adding two registers costs 4.

Making the cost of a quick-immediate constant equal to using
a register (default 0) reflects actual performance and
size-cost better.  It also happens to make
gcc.dg/tree-ssa/slsr-13.c pass with what looks like better
code being generated, and improves coremark performance by
0.4%.

But, blindly doing this for *all* valid operands that fit
the "quick-immediate" addressing mode, trips interaction
with other factors*, with the end result mixed at best.  So,
do this only for MINUS and logical operations for the time
being, and only for modes that fit in one register.

*) Examples of "other factors":

- A bad default implementation of insn_cost or actually,
pattern_cost, that looks only at the set_src_cost and
furthermore sees such a cost of 0 as invalid.  (Compare to
the more sane set_rtx_cost.)  This naturally tripped up
combine and ifcvt, causing all sorts of changes, good and
bad.

- Having the same cost, to compare a register with 0 as with
-31..31, means a compare insn of an eliminable form no
longer looks preferable.

* config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
for many quick operands, for register-sized modes.
---
 gcc/config/cris/cris.cc | 23 ++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/gcc/config/cris/cris.cc b/gcc/config/cris/cris.cc
index 641e7ea25fb1..05dead9c0778 100644
--- a/gcc/config/cris/cris.cc
+++ b/gcc/config/cris/cris.cc
@@ -1884,7 +1884,28 @@ cris_rtx_costs (rtx x, machine_mode mode, int 
outer_code, int opno,
if (val == 0)
  *total = 0;
else if (val < 32 && val >= -32)
- *total = 1;
+ switch (outer_code)
+   {
+ /* For modes that fit in one register we tell they cost
+the same as with register operands.  DImode operations
+needs careful consideration for more basic reasons:
+shifting by a non-word-size amount needs more
+operations than an addition by a register pair.
+Deliberately excluding SET, PLUS and comparisons and
+also not including the full -64..63 range for (PLUS
+and) MINUS.  */
+   case MINUS: case ASHIFT: case LSHIFTRT:
+   case ASHIFTRT: case AND: case IOR:
+ if (GET_MODE_SIZE(mode) <= UNITS_PER_WORD)
+   {
+ *total = 0;
+ break;
+   }
+ /* FALL THROUGH.  */
+   default:
+ *total = 1;
+ break;
+   }
/* Eight or 16 bits are a word and cycle more expensive.  */
else if (val <= 32767 && val >= -32768)
  *total = 2;
-- 
2.30.2



Re: [pushed] wwwdocs: gcc-4.7: Adjust dwarfstd.org links

2023-03-29 Thread Andrew Pinski via Gcc-patches
On Wed, Mar 29, 2023 at 3:08 PM Gerald Pfeifer  wrote:
>
> Business as usual - 301 Moved Permanently.

Just FYI, dwarfstd is now hosted by sourceware too. So I doubt these
URLs will change after this.

Thanks,
Andrew

>
> Gerald
> ---
>  htdocs/gcc-4.7/changes.html | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/htdocs/gcc-4.7/changes.html b/htdocs/gcc-4.7/changes.html
> index f98f108c..91159f1f 100644
> --- a/htdocs/gcc-4.7/changes.html
> +++ b/htdocs/gcc-4.7/changes.html
> @@ -994,13 +994,13 @@ void set_portb (uint8_t value)
>  GCC now supports various new GNU extensions to the DWARF debugging
>  information format, like
>   -href="https://www.dwarfstd.org/ShowIssue.php?issue=100909.1;>entry
> +href="https://dwarfstd.org/issues/100909.1.html;>entry
>  value and  -href="https://www.dwarfstd.org/ShowIssue.php?issue=100909.2;>call
> +href="https://dwarfstd.org/issues/100909.2.html;>call
>  site information,  -href="https://www.dwarfstd.org/ShowIssue.php?issue=140425.1;>typed DWARF 
> stack
> +href="https://dwarfstd.org/issues/140425.1.html;>typed DWARF stack
>  or  -href="https://www.dwarfstd.org/ShowIssue.php?issue=110722.1;>a
> +href="https://dwarfstd.org/issues/110722.1.html;>a
>  more compact macro representation.  Support for these extensions
>  has been added to GDB 7.4. They can be disabled through the
>  -gstrict-dwarf command-line option.
> --
> 2.39.2


Re: [PATCH RFC] c++: lambda mangling alias issues [PR107897]

2023-03-29 Thread Martin Jambor
Hello,

On Wed, Mar 08 2023, Jason Merrill via Gcc-patches wrote:
> On 3/8/23 11:15, Jason Merrill wrote:
>> On 3/8/23 10:53, Jan Hubicka wrote:
[...]
>>> We have n->reset () for that which is used in similar situation when
>>> frontends overwrites extern inline function by its different offline
>>> implementation.
>> 
>> The problem there is that reset() is a member of cgraph_node, not 
>> symtab_node, and I need something that works for variables as well.
>> 
>>> reset doesn't call remove_from_same_comdat_group probably because it was
>>> never used on anything in comdat group.  So I think it would make sense
>>> to call n->reset() here and add remove_from_same_comdat_group into that.
>
> How about moving it to symtab_node and using dyn_cast for the cgraph 
> bits, like this:
> From 1d869ceb04573727e59be6518903133c8654069a Mon Sep 17 00:00:00 2001
> From: Jason Merrill 
> Date: Mon, 6 Mar 2023 15:33:45 -0500
> Subject: [PATCH] c++: lambda mangling alias issues [PR107897]
> To: gcc-patches@gcc.gnu.org
>
> In 107897, by the time we are looking at the mangling clash, the
> alias has already been removed from the symbol table by analyze_functions,
> so we can't look at n->cpp_implicit_alias.  So just assume that it's an
> alias if it's internal.
>
> In 108887 the problem is that removing the mangling alias from the symbol
> table confuses analyze_functions, because it ended up as first_analyzed
> somehow, so it becomes a dangling pointer.  Fixed by clearing various flags
> to neutralize the alias.
>
>   PR c++/107897
>   PR c++/108887
>
> gcc/ChangeLog:
>
>   * cgraph.h: Move reset() from cgraph_node to symtab_node.
>   * cgraphunit.cc (symtab_node::reset): Adjust.
>
> gcc/cp/ChangeLog:
>
>   * decl2.cc (record_mangling): Use symtab_node::reset.

The patch is OK.

Thanks,

Martin


[pushed] wwwdocs: gcc-4.7: Adjust dwarfstd.org links

2023-03-29 Thread Gerald Pfeifer
Business as usual - 301 Moved Permanently.

Gerald
---
 htdocs/gcc-4.7/changes.html | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/htdocs/gcc-4.7/changes.html b/htdocs/gcc-4.7/changes.html
index f98f108c..91159f1f 100644
--- a/htdocs/gcc-4.7/changes.html
+++ b/htdocs/gcc-4.7/changes.html
@@ -994,13 +994,13 @@ void set_portb (uint8_t value)
 GCC now supports various new GNU extensions to the DWARF debugging
 information format, like
 https://www.dwarfstd.org/ShowIssue.php?issue=100909.1;>entry
+href="https://dwarfstd.org/issues/100909.1.html;>entry
 value and https://www.dwarfstd.org/ShowIssue.php?issue=100909.2;>call
+href="https://dwarfstd.org/issues/100909.2.html;>call
 site information, https://www.dwarfstd.org/ShowIssue.php?issue=140425.1;>typed DWARF 
stack
+href="https://dwarfstd.org/issues/140425.1.html;>typed DWARF stack
 or https://www.dwarfstd.org/ShowIssue.php?issue=110722.1;>a
+href="https://dwarfstd.org/issues/110722.1.html;>a
 more compact macro representation.  Support for these extensions
 has been added to GDB 7.4. They can be disabled through the
 -gstrict-dwarf command-line option.
-- 
2.39.2


Re: [PATCH 1/2] c++: improve "NTTP argument considered unused" fix [PR53164, PR105848]

2023-03-29 Thread Jason Merrill via Gcc-patches

On 3/27/23 09:30, Patrick Palka wrote:

On Thu, 23 Mar 2023, Patrick Palka wrote:


r13-995-g733a792a2b2e16 worked around the problem of FUNCTION_DECL
template arguments not always getting marked as odr-used by redundantly
calling mark_used on the substituted ADDR_EXPR callee of a CALL_EXPR.
This is just a narrow workaround however, since using a FUNCTION_DECL as
a template argument alone should constitutes an odr-use; we shouldn't
need to subsequently e.g. call the function or take its address.


Agreed.  But why didn't we already wrap it in an ADDR_EXPR?  Even for 
reference tparms convert_nontype_argument should do that.



This patch fixes this in a more general way at template specialization
time by walking the template arguments of the specialization and calling
mark_used on all entities used within.  As before, the call to mark_used
as it worst a no-op, but it compensates for the situation where we end up
forming a specialization from a template context in which mark_used is
inhibited.  Another approach would be to call mark_used whenever we
substitute a TEMPLATE_PARM_INDEX, but that would result in many more
redundant calls to mark_used compared to this approach.

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk?

PR c++/53164
PR c++/105848

gcc/cp/ChangeLog:

* pt.cc (instantiate_class_template): Call
mark_template_arguments_used.
(tsubst_copy_and_build) : Revert r13-995 change.
(mark_template_arguments_used): Define.
(instantiate_template): Call mark_template_arguments_used.

gcc/testsuite/ChangeLog:

* g++.dg/template/fn-ptr3a.C: New test.
* g++.dg/template/fn-ptr4.C: New test.
---
  gcc/cp/pt.cc | 51 
  gcc/testsuite/g++.dg/template/fn-ptr3a.C | 25 
  gcc/testsuite/g++.dg/template/fn-ptr4.C  | 14 +++
  3 files changed, 74 insertions(+), 16 deletions(-)
  create mode 100644 gcc/testsuite/g++.dg/template/fn-ptr3a.C
  create mode 100644 gcc/testsuite/g++.dg/template/fn-ptr4.C

diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index 7e4a8de0c8b..9b3cc1c 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -220,6 +220,7 @@ static tree make_argument_pack (tree);
  static tree enclosing_instantiation_of (tree tctx);
  static void instantiate_body (tree pattern, tree args, tree d, bool nested);
  static tree maybe_dependent_member_ref (tree, tree, tsubst_flags_t, tree);
+static void mark_template_arguments_used (tree);
  
  /* Make the current scope suitable for access checking when we are

 processing T.  T can be FUNCTION_DECL for instantiated function
@@ -12142,6 +12143,9 @@ instantiate_class_template (tree type)
cp_unevaluated_operand = 0;
c_inhibit_evaluation_warnings = 0;
  }
+
+  mark_template_arguments_used (INNERMOST_TEMPLATE_ARGS (args));
+
/* Use #pragma pack from the template context.  */
saved_maximum_field_alignment = maximum_field_alignment;
maximum_field_alignment = TYPE_PRECISION (pattern);
@@ -21173,22 +21177,10 @@ tsubst_copy_and_build (tree t,
  }
  
  	/* Remember that there was a reference to this entity.  */

-   if (function != NULL_TREE)
- {
-   tree inner = function;
-   if (TREE_CODE (inner) == ADDR_EXPR
-   && TREE_CODE (TREE_OPERAND (inner, 0)) == FUNCTION_DECL)
- /* We should already have called mark_used when taking the
-address of this function, but do so again anyway to make
-sure it's odr-used: at worst this is a no-op, but if we
-obtained this FUNCTION_DECL as part of ahead-of-time overload
-resolution then that call to mark_used wouldn't have marked it
-odr-used yet (53164).  */
- inner = TREE_OPERAND (inner, 0);
-   if (DECL_P (inner)
-   && !mark_used (inner, complain) && !(complain & tf_error))
- RETURN (error_mark_node);
- }
+   if (function != NULL_TREE
+   && DECL_P (function)
+   && !mark_used (function, complain) && !(complain & tf_error))
+ RETURN (error_mark_node);
  
  	if (!maybe_fold_fn_template_args (function, complain))

  return error_mark_node;
@@ -21883,6 +21875,31 @@ check_instantiated_args (tree tmpl, tree args, 
tsubst_flags_t complain)
return result;
  }
  
+/* Call mark_used on each entity within the template arguments ARGS of some

+   template specialization, to ensure that each such entity is considered
+   odr-used regardless of whether the specialization was first formed in a
+   template context.
+
+   This function assumes push_to_top_level has been called beforehand, and
+   that processing_template_decl has been set iff the template arguments
+   are dependent.  */
+
+static void
+mark_template_arguments_used (tree args)
+{
+  gcc_checking_assert (TMPL_ARGS_DEPTH (args) == 1);
+
+  if (processing_template_decl)
+  

Re: [PATCH] c++: Avoid informs without a warning [PR109278]

2023-03-29 Thread Jakub Jelinek via Gcc-patches
On Wed, Mar 29, 2023 at 04:35:15PM -0400, Jason Merrill wrote:
> > On the following testcase we emit notes in
> > maybe_inform_about_fndecl_for_bogus_argument_init
> > despite no warning/error being printed before it.
> > This is for the extended floating point type conversions where pedwarn
> > is used, and complained is used there for 2 different purposes,
> > one is whether an unspecific error should be emitted if we haven't
> > complained otherwise, and one whether
> > maybe_inform_about_fndecl_for_bogus_argument_init should be called.
> > For the 2 pedwarns, currently it sets complained to true regardless of
> > whether pedwarn succeeded, which results in the undesirable notes printed
> > with -w.  If complained is initialized to result of pedwarn, we would
> > emit an error later on.
> > 
> > So, the following patch makes complained a tristate, the additional
> > error isn't printed if complained != 0, and
> > maybe_inform_about_fndecl_for_bogus_argument_init is called only if
> > complained == 1, so if pedwarn returns false, we can use complained = -1
> > to tell later code not to emit an error and not to call
> > maybe_inform_about_fndecl_for_bogus_argument_init.
> > 
> > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
> > 
> > 2023-03-25  Jakub Jelinek  
> > 
> > PR c++/109278
> > * call.cc (convert_like_internal): If pedwarn for extended float
> > type conversions doesn't report anything, avoid calling
> > maybe_inform_about_fndecl_for_bogus_argument_init.
> 
> I think we want the same handling for all the complained = permerror cases
> as well.

I think it isn't really needed in those cases.
If I have say:
int foo (int);
int a = foo ({ { 1 } });
int bar (bool);
decltype (nullptr) n;
int b = bar (n);
and compile with -fpermissive -w (which is I think the only way how to get
permerror return false), then it will later reach that:
  if (!complained && expr != error_mark_node)
{
  range_label_for_type_mismatch label (TREE_TYPE (expr), totype);
  gcc_rich_location richloc (loc, );
  complained = permerror (,
  "invalid conversion from %qH to %qI",
  TREE_TYPE (expr), totype);
}
  if (complained)
maybe_inform_about_fndecl_for_bogus_argument_init (fn, argnum);
in current trunk or complained == 1 in the latter condition with the
patch.  !complained is true, so it will call permerror, but because
of -fpermissive -w neither that permerror will emit anything and will set
complained to false, so maybe_inform_about_fndecl_for_bogus_argument_init
is not called.  If I compile the above just with -fpermissive, it prints
the 2 warnings and 2 informs, if without -fpermissive, it prints the 2
errors and 2 informs.

If you want, I can add the above snippet as 3 testcases (normal,
-fpermissive and -fpermissive -w).

Jakub



Re: [PATCH] c++: Avoid informs without a warning [PR109278]

2023-03-29 Thread Jason Merrill via Gcc-patches

On 3/25/23 06:08, Jakub Jelinek wrote:

Hi!

On the following testcase we emit notes in
maybe_inform_about_fndecl_for_bogus_argument_init
despite no warning/error being printed before it.
This is for the extended floating point type conversions where pedwarn
is used, and complained is used there for 2 different purposes,
one is whether an unspecific error should be emitted if we haven't
complained otherwise, and one whether
maybe_inform_about_fndecl_for_bogus_argument_init should be called.
For the 2 pedwarns, currently it sets complained to true regardless of
whether pedwarn succeeded, which results in the undesirable notes printed
with -w.  If complained is initialized to result of pedwarn, we would
emit an error later on.

So, the following patch makes complained a tristate, the additional
error isn't printed if complained != 0, and
maybe_inform_about_fndecl_for_bogus_argument_init is called only if
complained == 1, so if pedwarn returns false, we can use complained = -1
to tell later code not to emit an error and not to call
maybe_inform_about_fndecl_for_bogus_argument_init.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2023-03-25  Jakub Jelinek  

PR c++/109278
* call.cc (convert_like_internal): If pedwarn for extended float
type conversions doesn't report anything, avoid calling
maybe_inform_about_fndecl_for_bogus_argument_init.


I think we want the same handling for all the complained = permerror 
cases as well.



* g++.dg/cpp23/ext-floating15.C: New test.

--- gcc/cp/call.cc.jj   2023-03-23 15:24:33.074801422 +0100
+++ gcc/cp/call.cc  2023-03-24 22:29:06.328140170 +0100
@@ -8296,7 +8296,7 @@ convert_like_internal (conversion *convs
  || SCALAR_TYPE_P (totype))
&& convs->kind != ck_base)
  {
-  bool complained = false;
+  int complained = 0;
conversion *t = convs;
  
/* Give a helpful error if this is bad because of excess braces.  */

@@ -8328,14 +8328,18 @@ convert_like_internal (conversion *convs
totype))
  {
  case 2:
-   pedwarn (loc, 0, "converting to %qH from %qI with greater "
-"conversion rank", totype, TREE_TYPE (expr));
-   complained = true;
+   if (pedwarn (loc, 0, "converting to %qH from %qI with greater "
+"conversion rank", totype, TREE_TYPE (expr)))
+ complained = 1;
+   else if (!complained)
+ complained = -1;
break;
  case 3:
-   pedwarn (loc, 0, "converting to %qH from %qI with unordered "
-"conversion ranks", totype, TREE_TYPE (expr));
-   complained = true;
+   if (pedwarn (loc, 0, "converting to %qH from %qI with unordered "
+"conversion ranks", totype, TREE_TYPE (expr)))
+ complained = 1;
+   else if (!complained)
+ complained = -1;
break;
  default:
break;
@@ -8389,7 +8393,7 @@ convert_like_internal (conversion *convs
  "invalid conversion from %qH to %qI",
  TREE_TYPE (expr), totype);
}
-  if (complained)
+  if (complained == 1)
maybe_inform_about_fndecl_for_bogus_argument_init (fn, argnum);
  
return cp_convert (totype, expr, complain);

--- gcc/testsuite/g++.dg/cpp23/ext-floating15.C.jj  2023-03-24 
22:38:40.358890548 +0100
+++ gcc/testsuite/g++.dg/cpp23/ext-floating15.C 2023-03-24 22:38:18.484204916 
+0100
@@ -0,0 +1,11 @@
+// PR c++/109278
+// { dg-do compile { target float128 } }
+// { dg-options "-w" }
+
+void foo (long double);// { dg-bogus "initializing argument 1 of" }
+
+void
+bar (_Float128 x)
+{
+  foo (x);
+}

Jakub





Re: [PATCH] c++: NTTP constraint depending on outer args [PR109160]

2023-03-29 Thread Jason Merrill via Gcc-patches

On 3/17/23 11:26, Patrick Palka wrote:

Here we're crashing during satisfaction for the NTTP 'C auto' from
do_auto_deduction ultimately because convert_template_argument / unify
don't pass all outer template arguments to do_auto_deduction, and during
satisfaction we need to know all arguments.  While these callers do
pass some outer arguments, they are only sufficient to properly
substitute the 'auto' and are not necessarily the complete set.

Fortunately it seems it's possible to obtain the full set of outer
arguments from these callers via convert_template_argument's IN_DECL
parameter and unify's TPARMS parameter.  So this patch adds a TMPL
parameter to do_auto_deduction, used only during adc_unify deduction,
which contains the (partially instantiated) template corresponding to
this auto and from which we can obtain all outer template arguments for
satisfaction.

This patch also adjusts the IN_DECL argument passed to
coerce_template_parms from tsubst_decl so that we could in turn safely
assume convert_template_argument's IN_DECL is always a TEMPLATE_DECL,
and thus could pass it as-is to do_auto_deduction.  (tsubst_decl seems
to be the only caller that passes a non-empty non-template IN_DECL to
coerce_template_parms.)

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk/12?

PR c++/109160

gcc/cp/ChangeLog:

* cp-tree.h (do_auto_deduction): Add defaulted TMPL parameter.
* pt.cc (convert_template_argument): Pass IN_DECL as TMPL to
do_auto_deduction.
(tsubst_decl) : Pass TMPL instead of T as
IN_DECL to coerce_template_parms.
(unify) : Pass the corresponding
template as TMPL to do_auto_deduction.
(do_auto_deduction): Document default arguments.  Use TMPL
to obtain a full set of template arguments for satisfaction
in the adc_unify case.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-placeholder12.C: New test.
---
  gcc/cp/cp-tree.h  |  3 +-
  gcc/cp/pt.cc  | 30 ++-
  .../g++.dg/cpp2a/concepts-placeholder12.C | 29 ++
  3 files changed, 53 insertions(+), 9 deletions(-)
  create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-placeholder12.C

diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
index dfc1c845768..e7190c5cc62 100644
--- a/gcc/cp/cp-tree.h
+++ b/gcc/cp/cp-tree.h
@@ -7324,7 +7324,8 @@ extern tree do_auto_deduction   (tree, 
tree, tree,
   auto_deduction_context
 = adc_unspecified,
 tree = NULL_TREE,
-int = LOOKUP_NORMAL);
+int = LOOKUP_NORMAL,
+tree = NULL_TREE);
  extern tree type_uses_auto(tree);
  extern tree type_uses_auto_or_concept (tree);
  extern void append_type_to_template_for_access_check (tree, tree, tree,
diff --git a/gcc/cp/pt.cc b/gcc/cp/pt.cc
index ddbd73371b9..6400b686a58 100644
--- a/gcc/cp/pt.cc
+++ b/gcc/cp/pt.cc
@@ -8638,7 +8638,7 @@ convert_template_argument (tree parm,
else if (tree a = type_uses_auto (t))
{
  t = do_auto_deduction (t, arg, a, complain, adc_unify, args,
-LOOKUP_IMPLICIT);
+LOOKUP_IMPLICIT, in_decl);
  if (t == error_mark_node)
return error_mark_node;
}
@@ -15243,7 +15243,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain)
 the template.  */
  argvec = (coerce_template_parms
(DECL_TEMPLATE_PARMS (gen_tmpl),
-argvec, t, complain));
+argvec, tmpl, complain));
if (argvec == error_mark_node)
  RETURN (error_mark_node);
hash = spec_hasher::hash (gen_tmpl, argvec);
@@ -24655,7 +24655,9 @@ unify (tree tparms, tree targs, tree parm, tree arg, 
int strict,
  if (tree a = type_uses_auto (tparm))
{
  tparm = do_auto_deduction (tparm, arg, a,
-complain, adc_unify, targs);
+complain, adc_unify, targs,
+LOOKUP_NORMAL,
+TPARMS_PRIMARY_TEMPLATE (tparms)); >   
   if (tparm == error_mark_node)
return 1;
}
@@ -30643,13 +30645,20 @@ unparenthesized_id_or_class_member_access_p (tree 
init)
 adc_requirement contexts to communicate the necessary template arguments
 to satisfaction.  OUTER_TARGS is ignored in other contexts.
  
-   For partial-concept-ids, extra args may be appended to the list of deduced

-   template 

'g++.dg/modules/modules.exp': don't leak local 'unsupported' proc [PR108899] (was: [PATCH] testsuite: Fix up modules.exp [PR108899])

2023-03-29 Thread Thomas Schwinge
Hi!

This changed needs more attention I'm afraid:

On 2023-02-23T15:18:04+0100, Jakub Jelinek via Gcc-patches 
 wrote:
> On Wed, Feb 22, 2023 at 02:33:42PM -0300, Alexandre Oliva via Gcc-patches 
> wrote:
>> When a multi-source module is found to be unsupported, we fail
>> module_cmi_p and subsequent sources.  Override proc unsupported to
>> mark the result in module_do, and test it to skip module_cmp_p and
>> subsequent related tests.
>>
>> for  gcc/testsuite/ChangeLog
>>
>>  * g++.dg/modules/modules.exp: Override unsupported to update
>>  module_do, and test it after dg-test.

That's commit r13-6288-g5344482c4d3ae0618fa8f5ed38f8309db43fdb82
"testsuite: Skip module_cmi_p and related unsupported module test":

--- gcc/testsuite/g++.dg/modules/modules.exp
+++ gcc/testsuite/g++.dg/modules/modules.exp
@@ -315,6 +315,17 @@ proc module-check-requirements { tests } {
 # cleanup any detritus from previous run
 cleanup_module_files [find $DEFAULT_REPO *.gcm]

+# Override unsupported to set the second element of module_do to "N",
+# so that, after an unsupported result in dg-test, we can skip rather
+# than fail subsequent related tests.
+set module_do {"compile" "P"}
+rename unsupported saved-unsupported
+proc unsupported { args } {
+global module_do
+lset module_do 1 "N"
+return [saved-unsupported $args]
+}
+
 # not grouped tests, sadly tcl doesn't have negated glob
 foreach test [prune [lsort [find $srcdir/$subdir {*.[CH]}]] \
  "$srcdir/$subdir/*_?.\[CH\]"] {
@@ -327,6 +338,9 @@ foreach test [prune [lsort [find $srcdir/$subdir 
{*.[CH]}]] \
set module_cmis {}
verbose "Testing $nshort $std" 1
dg-test $test "$std" $DEFAULT_MODFLAGS
+   if { [lindex $module_do 1] == "N" } {
+   continue
+   }
set testcase [string range $test [string length "$srcdir/"] end]
cleanup_module_files [module_cmi_p $testcase $module_cmis]
}
@@ -372,6 +386,9 @@ foreach src [lsort [find $srcdir/$subdir {*_a.[CHX}]] {
}
}
dg-test -keep-output $test "$std" $DEFAULT_MODFLAGS
+   if { [lindex $module_do 1] == "N" } {
+   break
+   }
set testcase [string range $test [string length "$srcdir/"] 
end]
lappend mod_files [module_cmi_p $testcase $module_cmis]
}

First, I'm seeing this change my 'g++.dg/modules/modules.exp' '*.sum'
output as follows:

-UNSUPPORTED: g++.dg/modules/explicit-bool-1_a.H -std=c++17
 PASS: g++.dg/modules/explicit-bool-1_a.H -std=c++2a (test for excess 
errors)
 PASS: g++.dg/modules/explicit-bool-1_a.H -std=c++2b (test for excess 
errors)
-UNSUPPORTED: g++.dg/modules/explicit-bool-1_b.C -std=c++17
 PASS: g++.dg/modules/explicit-bool-1_b.C -std=c++2a (test for excess 
errors)
 PASS: g++.dg/modules/explicit-bool-1_b.C -std=c++2b (test for excess 
errors)
 PASS: g++.dg/modules/export-1.C -std=c++17  (test for errors, line 10)
@@ -7247,6 +7245,7 @@
 PASS: g++.dg/modules/xtreme-tr1_b.C -std=c++17 (test for excess errors)
 PASS: g++.dg/modules/xtreme-tr1_b.C -std=c++2a (test for excess errors)
 PASS: g++.dg/modules/xtreme-tr1_b.C -std=c++2b (test for excess errors)
+UNSUPPORTED: {g++.dg/modules/explicit-bool-1_a.H -std=c++17}

I assume that the second UNSUPPORTED:

-UNSUPPORTED: g++.dg/modules/explicit-bool-1_b.C -std=c++17

... disappears is the intention of this patch?

But surely the curly braces in:

-UNSUPPORTED: g++.dg/modules/explicit-bool-1_a.H -std=c++17

+UNSUPPORTED: {g++.dg/modules/explicit-bool-1_a.H -std=c++17}

... are not intentional?  (Alexandre?)


But worse, the latter also "bleeds into" all other testing that's
executing as part of the same 'runtest' invocation (that is, further
'*.exp' files).  (I've ranted before about how much I don't like this
aspect of DejaGnu/'runtest'...)  For example (random; there are many,
many more):

[...]
 PASS: c-c++-common/tsan/sanitize-thread-macro.c   -O0  (test for excess 
errors)
-UNSUPPORTED: c-c++-common/tsan/sanitize-thread-macro.c   -O2
[...]
 PASS: g++.dg/tsan/pr88018.C   -O0  (test for excess errors)
-UNSUPPORTED: g++.dg/tsan/pr88018.C   -O2
[...]
+UNSUPPORTED: {c-c++-common/tsan/sanitize-thread-macro.c   -O2 }
+UNSUPPORTED: {g++.dg/tsan/pr88018.C   -O2 }
[...]

That's undesirable.


Per Jakub:

> This patch breaks testing with more than one set of options in
> target board, like
> make check-g++ RUNTESTFLAGS='--target_board=unix\{-m32,-m64\} modules.exp'
> yields:
> ...
>   === g++ Summary for unix/-m32 ===
>
> # of expected passes  7217
> # of unexpected failures  1
> # of expected failures18
> # of unsupported tests2
> Running target 

Re: [PATCH] c++,coroutines: Stabilize names of promoted slot vars [PR101118].

2023-03-29 Thread Jason Merrill via Gcc-patches

On 3/26/23 12:54, Iain Sandoe wrote:

Tested on x86_64-darwin21, x86-64-linux-gnu
OK for trunk?
Iain

When we need to 'promote' a value (i.e. store it in the coroutine frame) it
is given a frame entry name.  This was based on the DECL_UID for slot vars.
However, when LTO is used, the names from multiple TUs become visible at the
same time, and the DECL_UIDs usually differ between units.  This leads to a
"ODR mismatch" warning for the frame type.

The fix here is to use a counter instead of the DECL_UID which makes a name
that is stable between TUs for each frame layout (one per coroutine func).

Signed-off-by: Iain Sandoe 

PR c++/101118

gcc/cp/ChangeLog:

* coroutines.cc: Add counter for promoted slot vars.
(flatten_await_stmt): Use slot vars counter instead of DECL_UID
to generate the frame entry name for promoted target expression
slot variables.
(morph_fn_to_coro): Reset the slot vars counter at the start of
each coroutine function.
---
  gcc/cp/coroutines.cc | 8 +++-
  1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/gcc/cp/coroutines.cc b/gcc/cp/coroutines.cc
index a2189e43db8..359a5bf46ff 100644
--- a/gcc/cp/coroutines.cc
+++ b/gcc/cp/coroutines.cc
@@ -2726,6 +2726,11 @@ struct var_nest_node
var_nest_node *else_cl;
  };
  
+/* This is used to make a stable, but unique-per-function, sequence number for

+   each TARGET_EXPR slot variable that we 'promote' to a frame entry.  It needs
+   to be stable because the frame type is visible to LTO ODR checking.  */
+static unsigned tmpno = 0;


How about using temps_used->elements() for the index instead of a 
separate static counter?



  /* This is called for single statements from the co-await statement walker.
 It checks to see if the statement contains any initializers for awaitables
 and if any of these capture items by reference.  */
@@ -2889,7 +2894,7 @@ flatten_await_stmt (var_nest_node *n, hash_set 
*promoted,
  tree init = t;
  temps_used->add (init);
  tree var_type = TREE_TYPE (init);
- char *buf = xasprintf ("D.%d", DECL_UID (TREE_OPERAND (init, 0)));
+ char *buf = xasprintf ("T%03u", tmpno++);
  tree var = build_lang_decl (VAR_DECL, get_identifier (buf), var_type);
  DECL_ARTIFICIAL (var) = true;
  free (buf);
@@ -4374,6 +4379,7 @@ morph_fn_to_coro (tree orig, tree *resumer, tree 
*destroyer)
  {
gcc_checking_assert (orig && TREE_CODE (orig) == FUNCTION_DECL);
  
+  tmpno = 0;

*resumer = error_mark_node;
*destroyer = error_mark_node;
if (!coro_function_valid_p (orig))




Backport of 15 patches to gcc 12 branch (mostly analyzer)

2023-03-29 Thread David Malcolm via Gcc-patches
I've backported the following patches to the releases/gcc-12 branch
(shown in reverse chronological order):

r12-9367-g7903e0bca00384:
  analyzer: fix ICE on certain longjmp calls [PR109094]
Cherrypicked from r13-6749-g430d7d88c1a123.

r12-9366-g833d822ff0e834:
  analyzer: fix uninit false +ves reading from DECL_HARD_REGISTER [PR108968]
Cherrypicked from r13-6749-g430d7d88c1a123.

r12-9365-g98558117ba870d:
  analyzer: fix further overzealous state purging [PR108733]
Cherrypicked from r13-5745-g77bb54b1b07add.

r12-9365-g98558117ba870d:
  analyzer: fix overzealous state purging with on-stack structs [PR108704]
Cherrypicked from r13-5745-g77bb54b1b07add.

r12-9363-gdbe78fc879a854:
  doc: add notes about limitations of -fanalyzer
Cherrypicked from r13-5613-ga90316c6ceddfb.

r12-9362-g02fbda165b7417:
  analyzer: use __attribute__((nonnull)) at top level of analysis [PR106325]
Backported from r13-4520-gdcfc7ac94dbcf6.

r12-9361-gd49b47112fed83:
  analyzer: update internal docs
Cherrypicked from r13-4518-g14b0d6c4bd973c.

r12-9360-ga7cc8ecefb72f0:
  analyzer: handle comparisons against negated symbolic values [PR107948]
Cherrypicked from r13-4456-g0b737090a69624.

r12-9359-g1c66f1c6d69dbe:
  analyzer: fix folding of '(PTR + 0) => PTR' [PR105784]
Cherrypicked from r13-4398-g3a32fb2eaa761a.

r12-9358-ge7f7483d50069f:
  analyzer: fix feasibility false +ve on jumps through function ptrs [PR107582]
Cherrypicked from r13-4158-ga7aef0a5a2b7e2.

r12-9357-g111fb5d3cafd0f:
  analyzer: handle (NULL == ) [PR107345]
Cherrypicked from r13-3468-g18faaeb3af42f3.

r12-9356-gb414c17e072c1e:
  analyzer: fold -(-(VAL)) to VAL
Cherrypicked from r13-3075-g7f42f7adfa69fe.

r12-9355-gc63e5a234d0193:
  analyzer: better fix for -Wanalyzer-use-of-uninitialized-value [PR106573]
Cherrypicked from r13-2053-gca123e019bb92f.

r12-9354-g62a565e56763c6:
  analyzer: fix missing -Wanalyzer-use-of-uninitialized-value on special-cased 
functions [PR106573]
Backported from r13-2007-gbddd8d86e3036e, dropping the test case
fd-uninit-1.c.

r12-9353-ge7a92f415c8295:
  jit: update docs to reflect .c to .cc renaming
Cherrypicked from r13-1878-gb8ce0c4361c267.

Dave



Re: [PATCH] Generate vpblendd instead of vpblendw for V4SI under AVX2.

2023-03-29 Thread Uros Bizjak via Gcc-patches
On Wed, Mar 29, 2023 at 9:21 AM liuhongt  wrote:
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}
> Ok for GCC14 stage-1(or maybe trunk)?
>
> gcc/ChangeLog:
>
> * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
> vpblendd instead of vpblendw for V4SI under avx2.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/i386/pr88828-0.c: Adjust testcase.

Looks safe, so OK for trunk.

Thanks,
Uros.

> ---
>  gcc/config/i386/i386-expand.cc| 18 ++
>  gcc/testsuite/gcc.target/i386/pr88828-0.c |  2 +-
>  2 files changed, 15 insertions(+), 5 deletions(-)
>
> diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
> index c1300dc4e26..1c436262ee5 100644
> --- a/gcc/config/i386/i386-expand.cc
> +++ b/gcc/config/i386/i386-expand.cc
> @@ -19069,10 +19069,20 @@ expand_vec_perm_blend (struct expand_vec_perm_d *d)
>goto do_subreg;
>
>  case E_V4SImode:
> -  for (i = 0; i < 4; ++i)
> -   mask |= (d->perm[i] >= 4 ? 3 : 0) << (i * 2);
> -  vmode = V8HImode;
> -  goto do_subreg;
> +  if (TARGET_AVX2)
> +   {
> + /* Use vpblendd instead of vpblendw.  */
> + for (i = 0; i < nelt; ++i)
> +   mask |= ((unsigned HOST_WIDE_INT) (d->perm[i] >= nelt)) << i;
> + break;
> +   }
> +  else
> +   {
> + for (i = 0; i < 4; ++i)
> +   mask |= (d->perm[i] >= 4 ? 3 : 0) << (i * 2);
> + vmode = V8HImode;
> + goto do_subreg;
> +   }
>
>  case E_V16QImode:
>/* See if bytes move in pairs so we can use pblendw with
> diff --git a/gcc/testsuite/gcc.target/i386/pr88828-0.c 
> b/gcc/testsuite/gcc.target/i386/pr88828-0.c
> index 3ddb2d13526..441c441b51d 100644
> --- a/gcc/testsuite/gcc.target/i386/pr88828-0.c
> +++ b/gcc/testsuite/gcc.target/i386/pr88828-0.c
> @@ -1,5 +1,5 @@
>  /* { dg-do compile } */
> -/* { dg-options "-O2 -msse4.2" } */
> +/* { dg-options "-O2 -msse4.2 -mno-avx2" } */
>
>  typedef int v4si __attribute__((vector_size(16)));
>  typedef float v4sf __attribute__((vector_size(16)));
> --
> 2.39.1.388.g2fc9e9ca3c
>


Merge from trunk to gccgo branch

2023-03-29 Thread Ian Lance Taylor via Gcc-patches
I merged trunk revision aa8f4242efc99f24de73c59d53996f28db28c13f to
the gccgo branch.

Ian


Re: [PATCH] c++: ICE on loopy var tmpl auto deduction [PR109300]

2023-03-29 Thread Jason Merrill via Gcc-patches

On 3/28/23 13:37, Patrick Palka wrote:

Now that we resolve non-dependent variable template-ids ahead of time,
cp_finish_decl needs to handle a new invalid situation: we can end up
trying to instantiate a variable template with deduced return type
before we fully parsed (and attached) its initializer.

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this OK for
trunK?

PR c++/109300

gcc/cp/ChangeLog:

* decl.cc (cp_finish_decl): Diagnose ordinary auto deduction
with no initializer instead of asserting.

gcc/testsuite/ChangeLog:

* g++.dg/cpp1y/var-templ79.C: New test.
---
  gcc/cp/decl.cc   | 15 ++-
  gcc/testsuite/g++.dg/cpp1y/var-templ79.C |  5 +
  2 files changed, 19 insertions(+), 1 deletion(-)
  create mode 100644 gcc/testsuite/g++.dg/cpp1y/var-templ79.C

diff --git a/gcc/cp/decl.cc b/gcc/cp/decl.cc
index 20b980f68c8..2c91693b99d 100644
--- a/gcc/cp/decl.cc
+++ b/gcc/cp/decl.cc
@@ -8276,7 +8276,20 @@ cp_finish_decl (tree decl, tree init, bool 
init_const_expr_p,
  return;
}
  
-	  gcc_assert (CLASS_PLACEHOLDER_TEMPLATE (auto_node));

+ if (CLASS_PLACEHOLDER_TEMPLATE (auto_node))
+   /* Class deduction with no initializer is OK.  */;
+ else
+   {
+ /* Ordinary auto deduction without an initializer, a situation
+which grokdeclarator already catches and rejects for the most
+part.  But we can still get here if we're instantiating a
+variable template before we've fully parsed (and attached) its
+initializer, e.g. template auto x = x;  */


In the case of recursively dependent instantiation I'd hope to have an 
error_mark_node initializer, rather than none?



+ error_at (DECL_SOURCE_LOCATION (decl),
+   "declaration of %q#D has no initializer", decl);
+ TREE_TYPE (decl) = error_mark_node;
+ return;
+   }
}
d_init = init;
if (d_init)
diff --git a/gcc/testsuite/g++.dg/cpp1y/var-templ79.C 
b/gcc/testsuite/g++.dg/cpp1y/var-templ79.C
new file mode 100644
index 000..3c0d276153a
--- /dev/null
+++ b/gcc/testsuite/g++.dg/cpp1y/var-templ79.C
@@ -0,0 +1,5 @@
+// PR c++/109300
+// { dg-do compile { target c++14 } }
+
+template
+auto x = x; // { dg-error "" }




Re: [RFC] Fix for c++/PR12341

2023-03-29 Thread Jason Merrill via Gcc-patches

On 3/29/23 07:36, Benjamin Priour wrote:
Hi, below is my first patch ever. I ran the testsuites against trunk 
20230322, everything seems OK to me, but as it is my first submission 
I'd like to be sure of it.

Thanks a lot for the review !


Thanks!

Please see https://gcc.gnu.org/contribute.html#patches for more info on 
submitting patches.  Specifically, the subject line needs a component 
tag, and the body of the message needs more description of the change.


Instead of writing your own lookup_basevardecls you might want to adjust 
lookup_member/lookup_field_r to have a mode that skips the most derived 
type (lfi->type).


Jason


diff --git a/gcc/cp/class.cc b/gcc/cp/class.cc
index 68b62086340..147a7458488 100644
--- a/gcc/cp/class.cc
+++ b/gcc/cp/class.cc
@@ -3080,6 +3080,109 @@ warn_hidden (tree t)
        }
  }

+
+/* Lookup the inheritance hierarchy of T for any non-static field that have
+    the indicated NAME.  */
+static void
+lookup_basevardecls (tree name, tree t, vec *base_vardecls)
+{
+  /* Find non-static fields in T with the indicated NAME.  */
+  for (tree field = TYPE_FIELDS(t); field; field = DECL_CHAIN(field))


In GCC we put a space before (


+    {
+      /* Going with the same policy as warn_hidden with base class's 
members

+      non visible from child, i.e. do not distinguish.
+      A justification might be to not omit warning in the following case:
+
+      class Ancestor {
+          friend void foo_accessor(Ancestor *);
+
+          private:
+            int x;
+      };
+
+      class Descendant : public Ancestor {
+          public:
+            int x;
+      }
+
+      void foo_accessor(Ancestor *anc) {
+        ...
+        anc->x;
+        ...
+      }
+
+      foo_accessor(new Descendant());
+       */
+      if (TREE_CODE (field) == FIELD_DECL
+        && !DECL_ARTIFICIAL(field)
+        && DECL_NAME(field) == name)
+        {
+             base_vardecls->safe_push (field);
+        /* Return upon first match, as there cannot be two data members
+        named equally in the same RECORD_TYPE.
+        Moreover, avoid redundant warnings by not diving deeper into
+        T inheritance hierarchy. */
+        return;
+        }
+    }
+
+  int n_baseclasses = BINFO_N_BASE_BINFOS (TYPE_BINFO (t));
+  /* Go one step up the inheritance hierarchy.  */
+  for (int i = 0; i < n_baseclasses; i++)
+    {
+      tree basetype = BINFO_TYPE (BINFO_BASE_BINFO (TYPE_BINFO (t), i));
+      lookup_basevardecls (name, basetype, base_vardecls);
+    }
+}
+
+
+/* Warn about non-static fields name hiding. */
+static void
+warn_name_hiding(tree t)
+{
+  if (is_empty_class(t) || CLASSTYPE_NEARLY_EMPTY_P(t))
+    return;
+
+  for (tree field = TYPE_FIELDS(t); field; field = DECL_CHAIN(field))
+    {
+    /* Skip if field is not a user-defined non-static data member. */
+    if (TREE_CODE(field) != FIELD_DECL || DECL_ARTIFICIAL(field))
+      continue;
+
+    unsigned j;
+    tree name = DECL_NAME(field);


I think you also need to skip unnamed bit-fields.


+    /* Not sure about the size parameter of auto_vec */
+    auto_vec base_vardecls;
+    tree binfo;
+    tree base_binfo;
+      /* Iterate through all of the base classes looking for possibly
+      shadowed non-static data members. */
+    for (binfo = TYPE_BINFO (t), j = 0;
+        BINFO_BASE_ITERATE (binfo, j, base_binfo); j++)
+      {
+        tree basetype = BINFO_TYPE(base_binfo);
+        lookup_basevardecls(name, basetype, _vardecls);
+      }
+
+    /* field was not found among the base classes */
+    if (base_vardecls.is_empty())
+      continue;
+
+    /* Emit a warning for each field similarly named
+    found in the base class hierarchy */
+    for (tree base_vardecl : base_vardecls)
+      if (base_vardecl)
+        {
+          auto_diagnostic_group d;
+          if (warning_at (location_of (field),
+              OPT_Wshadow,
+              "%qD might shadow %qD.", field, base_vardecl))
+      inform (location_of (base_vardecl), "  %qD name already in use 
here.", base_vardecl);

+             }
+    }
+}
+
+
  /* Recursive helper for finish_struct_anon.  */

  static void
@@ -7654,6 +7757,8 @@ finish_struct_1 (tree t)

    if (warn_overloaded_virtual)
      warn_hidden (t);
+  if (warn_shadow)
+    warn_name_hiding(t);

    /* Class layout, assignment of virtual table slots, etc., is now
       complete.  Give the back end a chance to tweak the visibility of
diff --git a/gcc/testsuite/g++.dg/warn/pr12341-1.C 
b/gcc/testsuite/g++.dg/warn/pr12341-1.C

new file mode 100644
index 000..2c8f63d3b4f
--- /dev/null
+++ b/gcc/testsuite/g++.dg/warn/pr12341-1.C
@@ -0,0 +1,51 @@
+// PR c++/12341
+/* { dg-do compile } */
+/* { dg-options -Wshadow } */
+
+class A {
+protected:
+  int aaa; /* { dg-line A_def_aaa } */
+};
+
+class B : public A {
+public:
+  int aaa; /* { dg-line B_shadowing_aaa } */
+  /* { dg-warning "'B::aaa' might shadow 'A::aaa'." "" { target *-*-* } 
.-1 } */
+  /* { dg-note "'A::aaa' name already 

recomputation and PR 109154

2023-03-29 Thread Andrew MacLeod via Gcc-patches
The patch, or a slight variation (attached), in the PR allows us to 
generate better ranges be recomputing longer instruction sequences on 
outgoing edges.


This in fact also fixes
XPASS: gcc.dg/Walloca-13.c  (test for bogus messages, line 11)

   [local count: 1073741824]:
  _1 = p_5(D) - q_6(D);
  _2 = _1 /[ex] 4;
  n_7 = (long unsigned int) _2;
  _11 = (long unsigned int) _1;
  if (_11 <= 396)
    goto ; [33.00%]
  else
    goto ; [67.00%]

   [local count: 354334800]:
  _3 = __builtin_alloca (n_7);

Where _2 was recomputed before, but n_7 was not.  Now it is, and we 
correctly do not issue the warning any more.  awesome.,


however, as seems to be the case often, better ranges result in, I now get:

FAIL: 23_containers/vector/bool/allocator/copy.cc (test for excess errors)

because we now generate:

/opt/notnfs/amacleod/master/build/x86_64-pc-linux-gnu/libstdc++-v3/include/bits/stl_algobase.h:437: 
warning: ‘void* __builtin_memmove(void*, const void*, long unsigned 
int)’ writing between 9 and 9223372036854775807 bytes into a region of 
size 8 overflows the destination [-Wstringop-overflow=]


 I see:

 
    _216 = operator new (8);

_216 : [irange] long unsigned int * [1, +INF]
  ..

     [local count: 86938296]:
    D.245552 ={v} {CLOBBER(eol)};
    _74 = v1.D.217578._M_impl.D.217043._M_start.D.58619._M_p;
    _638 = (long int) _74;
    _261 = -_638;
    _383 = (long unsigned int) _261;
    if (_638 < -8)
  goto ; [90.00%]
    else
  goto ; [10.00%]

_261 : [irange] long int [-9223372036854775807, +INF]
_383 : [irange] long unsigned int [0, 
9223372036854775807][9223372036854775809, +INF]

8->12  (T) _74 :    [irange] _Bit_type * [1, +INF]
8->12  (T) _261 :   [irange] long int [9, +INF] NONZERO 
0x7fff
8->12  (T) _383 :   [irange] long unsigned int [9, 
9223372036854775807] NONZERO 0x7fff

8->12  (T) _638 :   [irange] long int [-INF, -9]

=== BB 12 
_74 [irange] _Bit_type * [9223372036854775808, 18446744073709551607]
_383    [irange] long unsigned int [9, 9223372036854775807] NONZERO 
0x7fff

     [local count: 78244465]:
    __builtin_memmove (_216, _74, _383);



The change is that we now recompute _383 which we didnt before. so we 
are seeing memmove being called on what is effectively:

memmove (operator new (8), _74, [9, 9223372036854775807])
And thus the warning.

IS this one of the warnings that has been causing issues?  and now Im 
triggering it again?



Back at fixup_cfg3 time, it looks like:

 _261 = __last$D58797$_M_p_245 - _247;
  _262 = _261 > 8;
  _263 = (long int) _262;
  _264 = __builtin_expect (_263, 1);
  if (_264 != 0)
    goto ; [90.00%]
  else
    goto ; [10.00%]
..
   [local count: 78244465]:
  _265 = (long unsigned int) _261;
  __builtin_memmove (_246, _247, _265);

So the builtin expect certainly implies it is expecting to have a value > 8

Early on the code looks like:
_1 = __last_10(D) - __first_11(D);
  _Num_12 = _1 /[ex] 8;
  _2 = _Num_12 > 1;
  _3 = (long int) _2;
  _4 = __builtin_expect (_3, 1);
  if (_4 != 0)
    goto ; [INV]
  else
    goto ; [INV]

   :
  _Num.28_5 = (long unsigned int) _Num_12;
  _6 = _Num.28_5 * 8;
  __builtin_memmove (__result_14(D), __first_11(D), _6);


SO it does still do basically the same thing.

Im not sure whether this is pointing out something real or another false 
positive...


Andrew
commit 358d0ca44faf2e20fbacd0f74386308b5ca52cd4
Author: Andrew MacLeod 
Date:   Tue Mar 28 12:16:34 2023 -0400

Add recursive GORI recompuations with a depth limit.

diff --git a/gcc/gimple-range-gori.cc b/gcc/gimple-range-gori.cc
index 6e8dfa85ca8..5f4313b27dd 100644
--- a/gcc/gimple-range-gori.cc
+++ b/gcc/gimple-range-gori.cc
@@ -1308,7 +1308,7 @@ gori_compute::compute_operand1_and_operand2_range (vrange ,
 // direct dependent is exported, it may also change the computed value of NAME.
 
 bool
-gori_compute::may_recompute_p (tree name, basic_block bb)
+gori_compute::may_recompute_p (tree name, basic_block bb, int depth)
 {
   tree dep1 = depend1 (name);
   tree dep2 = depend2 (name);
@@ -1322,22 +1322,36 @@ gori_compute::may_recompute_p (tree name, basic_block bb)
   if (is_a (s) || gimple_has_side_effects (s))
 return false;
 
-  // If edge is specified, check if NAME can be recalculated on that edge.
-  if (bb)
-return ((is_export_p (dep1, bb))
-	|| (dep2 && is_export_p (dep2, bb)));
+  if (!dep2)
+{
+  // -1 indicates a default param, convert it to the real default.
+  if (depth == -1)
+	{
+	  depth = (int)param_ranger_recompute_depth;
+	  gcc_checking_assert (depth >= 1);
+	}
 
-  return (is_export_p (dep1)) || (dep2 && is_export_p (dep2));
+  bool res = (bb ? is_export_p (dep1, bb) : is_export_p (dep1));
+  if (res || depth <= 1)
+	return res;
+  // Check another level of recomputation.
+  return may_recompute_p (dep1, bb, --depth);
+}
+  // Two dependencies terminate the depth of the search.
+ 

Re: [PATCH] libiberty: Make strstr.c in libiberty ANSI compliant

2023-03-29 Thread Jakub Jelinek via Gcc-patches
On Fri, Nov 13, 2020 at 11:53:43AM -0700, Jeff Law via Gcc-patches wrote:
> 
> On 5/1/20 6:06 PM, Seija Kijin via Gcc-patches wrote:
> > The original code in libiberty says "FIXME" and then says it has not been
> > validated to be ANSI compliant. However, this patch changes the function to
> > match implementations that ARE compliant, and such code is in the public
> > domain.
> >
> > I ran the test results, and there are no test failures.
> 
> Thanks.  This seems to be the standard "simple" strstr implementation. 
> There's significantly faster implementations available, but I doubt it's
> worth the effort as the version in this file only gets used if there is
> no system strstr.c.

Except that PR109306 says the new version is non-compliant and
is certainly slower than what we used to have.  The only problem I see
on the old version (sure, it is not very fast version) is that for
strstr ("abcd", "") it returned "abcd"+4 rather than "abcd" because
strchr in that case changed p to point to the last character and then
strncmp returned 0.

The question reported in PR109306 is whether memcmp is required not to
access characters beyond the first difference or not.
For all of memcmp/strcmp/strncmp, C17 says:
"The sign of a nonzero value returned by the comparison functions memcmp, 
strcmp, and strncmp
is determined by the sign of the difference between the values of the first 
pair of characters (both
interpreted as unsigned char) that differ in the objects being compared."
but then in memcmp description says:
"The memcmp function compares the first n characters of the object pointed to 
by s1 to the first n
characters of the object pointed to by s2."
rather than something similar to strncmp wording:
"The strncmp function compares not more than n characters (characters that 
follow a null character
are not compared) from the array pointed to by s1 to the array pointed to by
s2."
So, while for strncmp it seems clearly well defined when there is zero
terminator before reaching the n, for memcmp it is unclear if say
int
memcmp (const void *s1, const void *s2, size_t n)
{
  int ret = 0;
  size_t i;
  const unsigned char *p1 = (const unsigned char *) s1;
  const unsigned char *p2 = (const unsigned char *) s2;

  for (i = n; i; i--)
if (p1[i - 1] != p2[i - 1])
  ret = p1[i - 1] < p2[i - 1] ? -1 : 1;
  return ret;
}
wouldn't be valid implementation (one which always compares all characters
and just returns non-zero from the first one that differs).

So, shouldn't we just revert and handle the len == 0 case correctly?

I think almost nothing really uses it, but still, the old version
at least worked nicer with a fast strchr.
Could as well strncmp (p + 1, s2 + 1, len - 1) if that is preferred
because strchr already compared the first character.

2023-03-29  Jakub Jelinek  

PR other/109306
* strstr.c: Revert the 2020-11-13 changes.
(strstr): Return s1 if len is 0.

--- libiberty/strstr.c.jj   2020-11-14 10:40:11.346408311 +0100
+++ libiberty/strstr.c  2023-03-29 16:30:11.163602758 +0200
@@ -16,20 +16,25 @@ length, the function returns @var{string
 
 */
 
 #include 
 
-extern int memcmp (const void *, const void *, size_t);
+extern char *strchr (const char *, int);
+extern int strncmp (const void *, const void *, size_t);
 extern size_t strlen (const char *);
 
 char *
 strstr (const char *s1, const char *s2)
 {
+  const char *p = s1;
   const size_t len = strlen (s2);
-  while (*s1)
+
+  if (!len)
+return s1;
+
+  for (; (p = strchr (p, *s2)) != 0; p++)
 {
-  if (!memcmp (s1, s2, len))
-   return (char *)s1;
-  ++s1;
+  if (strncmp (p, s2, len) == 0)
+   return (char *)p;
 }
   return (0);
 }


Jakub



[RFA][Bug target/108892 ][13 regression] Force re-recognition after changing RTL structure of an insn

2023-03-29 Thread Jeff Law
So as mentioned in the PR the underlying issue here is combine changes 
the form of an existing insn, but fails to force re-recognition.  As a 
result other parts of the compiler blow up.





  /* Temporarily replace the set's source with the
 contents of the REG_EQUAL note.  The insn will
 be deleted or recognized by try_combine.  */
  rtx orig_src = SET_SRC (set); 
  rtx orig_dest = SET_DEST (set); 
  if (GET_CODE (SET_DEST (set)) == ZERO_EXTRACT)

SET_DEST (set) = XEXP (SET_DEST (set), 0);
  SET_SRC (set) = note;
  i2mod = temp;
  i2mod_old_rhs = copy_rtx (orig_src);
  i2mod_new_rhs = copy_rtx (note);
  next = try_combine (insn, i2mod, NULL, NULL,
  _direct_jump_p, 
  last_combined_insn);

  i2mod = NULL;
  if (next)
{
  statistics_counter_event (cfun, "insn-with-note combine", 
1);
  goto retry;
} 
  SET_SRC (set) = orig_src;

  SET_DEST (set) = orig_dest;



This code replaces the SET_SRC of an insn in the RTL stream with the 
contents of a REG_EQUAL note.  So given an insn like this:



(insn 122 117 127 2 (set (reg:DI 157 [ _46 ])
(ior:DI (reg:DI 200)
(reg:DI 251))) "j.c":14:5 -1
 (expr_list:REG_EQUAL (const_int 25769803782 [0x60006])
(nil)))


It replaces the (ior ...) with a (const_int ...).  The resulting insn is 
passed to try_combine which will try to recognize it, then use it in a 
combination attempt.  Recognition succeeds with the special 
define_insn_and_split pattern in the risc-v backend resulting in:



(insn 122 117 127 2 (set (reg:DI 157 [ _46 ])
(const_int 25769803782 [0x60006])) "j.c":14:5 177 
{*mvconst_internal}
 (expr_list:REG_EQUAL (const_int 25769803782 [0x60006])
(nil)))


This is as-expected.  Now assume we were unable to combine anything, so 
try_combine returns NULL_RTX.  The quoted code above restores SET_SRC 
(and SET_DEST) resulting in:



(insn 122 117 127 2 (set (reg:DI 157 [ _46 ])
(ior:DI (reg:DI 200)
(reg:DI 251))) "j.c":14:5 177 {*mvconst_internal}
 (expr_list:REG_EQUAL (const_int 25769803782 [0x60006])
(nil)))



But this doesn't get re-recognized and we ICE later in LRA.

The fix is trivial, reset the INSN_CODE to force re-recognition in the 
case where try_combine fails.


Bootstrapped and regression tested on x86_64 and riscv.   OK for the trunk?

Jeffgcc/
* combine.cc (combine_instructions): Force re-recognition when
potentially changing the underlying RTL structure of an insn.

gcc/testsuite/
* gcc.c-torture/compile/pr108892.c: New test

diff --git a/gcc/combine.cc b/gcc/combine.cc
index 053879500b7..22bf8e1ec89 100644
--- a/gcc/combine.cc
+++ b/gcc/combine.cc
@@ -1416,6 +1416,7 @@ combine_instructions (rtx_insn *f, unsigned int nregs)
  statistics_counter_event (cfun, "insn-with-note combine", 
1);
  goto retry;
}
+ INSN_CODE (temp) = -1;
  SET_SRC (set) = orig_src;
  SET_DEST (set) = orig_dest;
}
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr108892.c 
b/gcc/testsuite/gcc.c-torture/compile/pr108892.c
new file mode 100644
index 000..d7fecd54ecf
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr108892.c
@@ -0,0 +1,23 @@
+typedef char __attribute__((__vector_size__ (64))) U;
+typedef int __attribute__((__vector_size__ (64))) V;
+
+int g;
+U u;
+
+static inline __attribute__((__always_inline__)) void
+bar (short a, short b, V w)
+{
+  V v = __builtin_shufflevector ((V) { }, a % (0 != w), 17, 22, 20, 15,
+20, 23, 17, 20, 16, 21, 16, 19, 18, 14, 15,
+14) ^ b;
+  g *= __builtin_memcmp_eq (0, 0, 2);
+  v |= 6;
+  __builtin_ilogb (0);
+  u = (U) w + (U) v;
+}
+
+void
+foo (void)
+{
+  bar (5, 4, (V){30, 4, 1, 5, 6});
+}


[PATCH V1] RISCV: Modified validation information for contracts-tmpl-spec2.C

2023-03-29 Thread shiyulong
From: yulong 

This patch fixes the problem of the contracts-tmpl-spec2.c running failure.

When run the dejagnu test, I find that the output is inconsistent with that 
verified
in the testcase. So I try to modify it, and then it can be passed.

gcc/testsuite/ChangeLog:

* g++.dg/contracts/contracts-tmpl-spec2.C:delete some output information

---
 gcc/testsuite/g++.dg/contracts/contracts-tmpl-spec2.C | 6 --
 1 file changed, 6 deletions(-)

diff --git a/gcc/testsuite/g++.dg/contracts/contracts-tmpl-spec2.C 
b/gcc/testsuite/g++.dg/contracts/contracts-tmpl-spec2.C
index 82117671b2d..17048584ac9 100644
--- a/gcc/testsuite/g++.dg/contracts/contracts-tmpl-spec2.C
+++ b/gcc/testsuite/g++.dg/contracts/contracts-tmpl-spec2.C
@@ -369,15 +369,9 @@ int main(int, char**)
 // { dg-output {contract violation in function G3::f at .*:148: s 
> 2(\n|\r\n|\r)} }
 // { dg-output {\[continue:on\](\n|\r\n|\r)} }
 // { dg-output {G3 full int double(\n|\r\n|\r)} }
-// { dg-output {contract violation in function G3::f at .*:124: t 
> 0(\n|\r\n|\r)} }
-// { dg-output {\[continue:on\](\n|\r\n|\r)} }
-// { dg-output {contract violation in function G3::f at .*:125: s 
> 0(\n|\r\n|\r)} }
-// { dg-output {\[continue:on\](\n|\r\n|\r)} }
 // { dg-output {G3 general T S(\n|\r\n|\r)} }
 // { dg-output {contract violation in function G3::f at .*:139: t > 
1(\n|\r\n|\r)} }
 // { dg-output {\[continue:on\](\n|\r\n|\r)} }
-// { dg-output {contract violation in function G3::f at .*:140: s > 
1(\n|\r\n|\r)} }
-// { dg-output {\[continue:on\](\n|\r\n|\r)} }
 // { dg-output {G3 partial int S(\n|\r\n|\r)} }
 // { dg-output {G3 full int C(\n|\r\n|\r)} }
 // { dg-output {G3 full int C(\n|\r\n|\r)} }
-- 
2.25.1



Re: [PATCH] configure: deprecate --enable-link-mutex option

2023-03-29 Thread Martin Liška
On 3/29/23 15:05, Richard Biener wrote:
> I wonder if we can simply alias --enable-link-mutex to
> --enable-link-serialization though.

Sure, we can. Do you want it for gcc-13 as well?

Cheers,
Martin


Re: [PATCH] configure: deprecate --enable-link-mutex option

2023-03-29 Thread Richard Biener via Gcc-patches
On Wed, Mar 29, 2023 at 3:01 PM Jakub Jelinek via Gcc-patches
 wrote:
>
> On Wed, Mar 29, 2023 at 02:55:01PM +0200, Martin Liška wrote:
> > Ready to be installed?
> > Thanks,
> > Martin
> >
> >   PR bootstrap/109310
> >
> > gcc/ChangeLog:
> >
> >   * configure.ac: Emit a warning for deprecated option
> >   --enable-link-mutex.
> >   * configure: Regenerate.
>
> LGTM.

I wonder if we can simply alias --enable-link-mutex to
--enable-link-serialization though.

> > diff --git a/gcc/configure b/gcc/configure
> > index 15086578533..09ae93ade1a 100755
> > --- a/gcc/configure
> > +++ b/gcc/configure
> > @@ -31468,6 +31468,7 @@ $as_echo "$do_link_mutex" >&6; }
> >
> >  if test "$do_link_mutex" = "yes"; then
> > DO_LINK_MUTEX=true
> > +   echo gcc/configure: WARNING: --enable-link-mutex is deprecated and will 
> > be removed in the next release, use --enable-link-serialization instead 1>&2
> >  else
> > DO_LINK_MUTEX=false
> >  fi
> > diff --git a/gcc/configure.ac b/gcc/configure.ac
> > index 120151c474a..13c1a85851c 100644
> > --- a/gcc/configure.ac
> > +++ b/gcc/configure.ac
> > @@ -7013,6 +7013,7 @@ AC_MSG_RESULT($do_link_mutex)
> >
> >  if test "$do_link_mutex" = "yes"; then
> > DO_LINK_MUTEX=true
> > +   echo gcc/configure: WARNING: --enable-link-mutex is deprecated and will 
> > be removed in the next release, use --enable-link-serialization instead 1>&2
> >  else
> > DO_LINK_MUTEX=false
> >  fi
> > --
> > 2.40.0
>
> Jakub
>


Re: [PATCH] configure: deprecate --enable-link-mutex option

2023-03-29 Thread Martin Liška
On 3/29/23 15:02, Andreas Schwab wrote:
> On Mär 29 2023, Martin Liška wrote:
> 
>> diff --git a/gcc/configure.ac b/gcc/configure.ac
>> index 120151c474a..13c1a85851c 100644
>> --- a/gcc/configure.ac
>> +++ b/gcc/configure.ac
>> @@ -7013,6 +7013,7 @@ AC_MSG_RESULT($do_link_mutex)
>>  
>>  if test "$do_link_mutex" = "yes"; then
>> DO_LINK_MUTEX=true
>> +   echo gcc/configure: WARNING: --enable-link-mutex is deprecated and will 
>> be removed in the next release, use --enable-link-serialization instead 1>&2
> 
> Please use AC_MSG_WARN.
> 

Good point Andreas, installed as 8b2766e87db.

Thanks,
Martin


Re: [PATCH] configure: deprecate --enable-link-mutex option

2023-03-29 Thread Andreas Schwab via Gcc-patches
On Mär 29 2023, Martin Liška wrote:

> diff --git a/gcc/configure.ac b/gcc/configure.ac
> index 120151c474a..13c1a85851c 100644
> --- a/gcc/configure.ac
> +++ b/gcc/configure.ac
> @@ -7013,6 +7013,7 @@ AC_MSG_RESULT($do_link_mutex)
>  
>  if test "$do_link_mutex" = "yes"; then
> DO_LINK_MUTEX=true
> +   echo gcc/configure: WARNING: --enable-link-mutex is deprecated and will 
> be removed in the next release, use --enable-link-serialization instead 1>&2

Please use AC_MSG_WARN.

-- 
Andreas Schwab, SUSE Labs, sch...@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."


Re: [PATCH] configure: deprecate --enable-link-mutex option

2023-03-29 Thread Jakub Jelinek via Gcc-patches
On Wed, Mar 29, 2023 at 02:55:01PM +0200, Martin Liška wrote:
> Ready to be installed?
> Thanks,
> Martin
> 
>   PR bootstrap/109310
> 
> gcc/ChangeLog:
> 
>   * configure.ac: Emit a warning for deprecated option
>   --enable-link-mutex.
>   * configure: Regenerate.

LGTM.

> diff --git a/gcc/configure b/gcc/configure
> index 15086578533..09ae93ade1a 100755
> --- a/gcc/configure
> +++ b/gcc/configure
> @@ -31468,6 +31468,7 @@ $as_echo "$do_link_mutex" >&6; }
>  
>  if test "$do_link_mutex" = "yes"; then
> DO_LINK_MUTEX=true
> +   echo gcc/configure: WARNING: --enable-link-mutex is deprecated and will 
> be removed in the next release, use --enable-link-serialization instead 1>&2
>  else
> DO_LINK_MUTEX=false
>  fi
> diff --git a/gcc/configure.ac b/gcc/configure.ac
> index 120151c474a..13c1a85851c 100644
> --- a/gcc/configure.ac
> +++ b/gcc/configure.ac
> @@ -7013,6 +7013,7 @@ AC_MSG_RESULT($do_link_mutex)
>  
>  if test "$do_link_mutex" = "yes"; then
> DO_LINK_MUTEX=true
> +   echo gcc/configure: WARNING: --enable-link-mutex is deprecated and will 
> be removed in the next release, use --enable-link-serialization instead 1>&2
>  else
> DO_LINK_MUTEX=false
>  fi
> -- 
> 2.40.0

Jakub



[PATCH] configure: deprecate --enable-link-mutex option

2023-03-29 Thread Martin Liška
Ready to be installed?
Thanks,
Martin

PR bootstrap/109310

gcc/ChangeLog:

* configure.ac: Emit a warning for deprecated option
--enable-link-mutex.
* configure: Regenerate.
---
 gcc/configure| 1 +
 gcc/configure.ac | 1 +
 2 files changed, 2 insertions(+)

diff --git a/gcc/configure b/gcc/configure
index 15086578533..09ae93ade1a 100755
--- a/gcc/configure
+++ b/gcc/configure
@@ -31468,6 +31468,7 @@ $as_echo "$do_link_mutex" >&6; }
 
 if test "$do_link_mutex" = "yes"; then
DO_LINK_MUTEX=true
+   echo gcc/configure: WARNING: --enable-link-mutex is deprecated and will be 
removed in the next release, use --enable-link-serialization instead 1>&2
 else
DO_LINK_MUTEX=false
 fi
diff --git a/gcc/configure.ac b/gcc/configure.ac
index 120151c474a..13c1a85851c 100644
--- a/gcc/configure.ac
+++ b/gcc/configure.ac
@@ -7013,6 +7013,7 @@ AC_MSG_RESULT($do_link_mutex)
 
 if test "$do_link_mutex" = "yes"; then
DO_LINK_MUTEX=true
+   echo gcc/configure: WARNING: --enable-link-mutex is deprecated and will be 
removed in the next release, use --enable-link-serialization instead 1>&2
 else
DO_LINK_MUTEX=false
 fi
-- 
2.40.0



RE: arm: Fix MVE vcreate definition

2023-03-29 Thread Kyrylo Tkachov via Gcc-patches


> -Original Message-
> From: Stam Markianos-Wright 
> Sent: Wednesday, March 29, 2023 11:50 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov 
> Subject: arm: Fix MVE vcreate definition
> 
> Hi all,
> 
> I just found a bug that goes back to the initial merge of
> the MVE backend: The vcreate intrinsic has had it's vector
> lanes mixed up, compared to what was intended (as per
> the ACLE) definition. This is also a discrepancy with clang:
> https://godbolt.org/z/4n93e5aqj
> 
> This patches simply switches the operands around and
> makes the tests more specific on the input registers
> (I do not touch the output Q regs as they vary based
> on softfp/hardfp or the input registers when the input
> is a constant, since, in that case, a single register
> is loaded with a constant and then the same register is
> used twice as "vmov q0[2], q0[0], r2, r2" and the reg
> num might also not always be guaranteed).
> 
> No regressions on MVE tesctsuite configurations or in
> the CMSIS-NN testsuite.
> 
> Ok for trunk? (Despite this being late in Stage 4, sorry
> about that!)

Ok, since this is a wrong-code fix.
This needs backports as well, right?
Thanks,
Kyrill

> 
> Thanks,
> Stamatis Markianos-Wright
> 
> gcc/ChangeLog:
> 
>      * config/arm/mve.md (mve_vcvtq_n_to_f_): Swap
> operands.
>    (mve_vcreateq_f): Swap operands.
> 
> gcc/testsuite/ChangeLog:
> 
>      * gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Tighten test.
>      * gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Tighten test.
>      * gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Tighten test.
>      * gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Tighten test.
>      * gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Tighten test.
>      * gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Tighten test.
>      * gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Tighten test.
>      * gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Tighten test.
>      * gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Tighten test.
>      * gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Tighten test.


[PATCH] tree-optimization/107561 - reduce -Wstringop-overflow false positives

2023-03-29 Thread Richard Biener via Gcc-patches
The following tells pointer-query to prefer a zero size when we
are querying for the size range for a write into an object we've
determined is of zero size.  That avoids diagnostics about really
varying size arguments that just get a meaningful range for example
because they are multiplied by an element size.

I've adjusted only one call to get_size_range since that's what
I have a testcase for.  I think this is the most sensible
"workaround" for some of the false positives we see.

Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.

OK if it succeeds?

Thanks,
Richard.

PR tree-optimization/107561
* gimple-ssa-warn-access.cc (get_size_range): Add flags
argument and pass it on.
(check_access): When querying for the size range pass
SR_ALLOW_ZERO when the known destination size is zero.

* g++.dg/pr71488.C: Remove XFAILed bogus diagnostic again.
* g++.dg/warn/Warray-bounds-16.C: Likewise.
---
 gcc/gimple-ssa-warn-access.cc| 19 +--
 gcc/testsuite/g++.dg/pr71488.C   |  1 -
 gcc/testsuite/g++.dg/warn/Warray-bounds-16.C |  1 -
 3 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/gcc/gimple-ssa-warn-access.cc b/gcc/gimple-ssa-warn-access.cc
index 88d44690ade..b3de4b77924 100644
--- a/gcc/gimple-ssa-warn-access.cc
+++ b/gcc/gimple-ssa-warn-access.cc
@@ -1198,10 +1198,10 @@ warn_for_access (location_t loc, tree func, tree expr, 
int opt,
 
 static void
 get_size_range (range_query *query, tree bound, gimple *stmt, tree range[2],
-   const offset_int bndrng[2])
+   int flags, const offset_int bndrng[2])
 {
   if (bound)
-get_size_range (query, bound, stmt, range);
+get_size_range (query, bound, stmt, range, flags);
 
   if (!bndrng || (bndrng[0] == 0 && bndrng[1] == HOST_WIDE_INT_M1U))
 return;
@@ -1347,7 +1347,12 @@ check_access (GimpleOrTree exp, tree dstwrite,
   /* Set RANGE to that of DSTWRITE if non-null, bounded by PAD->DST_BNDRNG
  if valid.  */
   gimple *stmt = pad ? pad->stmt : nullptr;
-  get_size_range (rvals, dstwrite, stmt, range, pad ? pad->dst_bndrng : NULL);
+  get_size_range (rvals, dstwrite, stmt, range,
+ /* If the destination has known zero size prefer a zero
+size range to avoid false positives if that's a
+possibility.  */
+ integer_zerop (dstsize) ? SR_ALLOW_ZERO : 0,
+ pad ? pad->dst_bndrng : NULL);
 
   tree func = get_callee_fndecl (exp);
   /* Read vs write access by built-ins can be determined from the const
@@ -1442,7 +1447,8 @@ check_access (GimpleOrTree exp, tree dstwrite,
 {
   /* Set RANGE to that of MAXREAD, bounded by PAD->SRC_BNDRNG if
 PAD is nonnull and BNDRNG is valid.  */
-  get_size_range (rvals, maxread, stmt, range, pad ? pad->src_bndrng : 
NULL);
+  get_size_range (rvals, maxread, stmt, range, 0,
+ pad ? pad->src_bndrng : NULL);
 
   location_t loc = get_location (exp);
   tree size = dstsize;
@@ -1489,7 +1495,8 @@ check_access (GimpleOrTree exp, tree dstwrite,
 {
   /* Set RANGE to that of MAXREAD, bounded by PAD->SRC_BNDRNG if
 PAD is nonnull and BNDRNG is valid.  */
-  get_size_range (rvals, maxread, stmt, range, pad ? pad->src_bndrng : 
NULL);
+  get_size_range (rvals, maxread, stmt, range, 0,
+ pad ? pad->src_bndrng : NULL);
   /* Set OVERREAD for reads starting just past the end of an object.  */
   overread = pad->src.sizrng[1] - pad->src.offrng[0] < pad->src_bndrng[0];
   range[0] = wide_int_to_tree (sizetype, pad->src_bndrng[0]);
@@ -2679,7 +2686,7 @@ pass_waccess::check_strncmp (gcall *stmt)
   /* Determine the range of the bound first and bail if it fails; it's
  cheaper than computing the size of the objects.  */
   tree bndrng[2] = { NULL_TREE, NULL_TREE };
-  get_size_range (m_ptr_qry.rvals, bound, stmt, bndrng, adata1.src_bndrng);
+  get_size_range (m_ptr_qry.rvals, bound, stmt, bndrng, 0, adata1.src_bndrng);
   if (!bndrng[0] || integer_zerop (bndrng[0]))
 return;
 
diff --git a/gcc/testsuite/g++.dg/pr71488.C b/gcc/testsuite/g++.dg/pr71488.C
index a89e6465a94..ffe30f1afeb 100644
--- a/gcc/testsuite/g++.dg/pr71488.C
+++ b/gcc/testsuite/g++.dg/pr71488.C
@@ -3,7 +3,6 @@
 // { dg-options "-O3 -std=c++11" }
 // { dg-additional-options "-msse4" { target sse4_runtime } }
 // { dg-require-effective-target c++11 }
-// { dg-bogus "size 0 overflows" "pr107561" { xfail *-*-* } 0 }
 
 #include 
 
diff --git a/gcc/testsuite/g++.dg/warn/Warray-bounds-16.C 
b/gcc/testsuite/g++.dg/warn/Warray-bounds-16.C
index 49d3437fa1b..89cbadb91c7 100644
--- a/gcc/testsuite/g++.dg/warn/Warray-bounds-16.C
+++ b/gcc/testsuite/g++.dg/warn/Warray-bounds-16.C
@@ -20,7 +20,6 @@ struct S
 
 for (int i = 0; i < m; i++)
   new (p + i) int (); /* { dg-bogus "bounds" "pr102690" { xfail *-*-* } } 
*/
-// { dg-bogus "size 0 

[PATCH] tree-optimization/109331 - make sure to clean up the CFG after forwprop

2023-03-29 Thread Richard Biener via Gcc-patches
When forwprop discovers unreachable code or makes decisions based
on unreachable edges make sure to cleanup the CFG since otherwise
SSA form can become invalid.

Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.

PR tree-optimization/109331
* tree-ssa-forwprop.cc (pass_forwprop::execute): When we
discover a taken edge make sure to cleanup the CFG.

* gcc.dg/torture/pr109331.c: New testcase.
---
 gcc/testsuite/gcc.dg/torture/pr109331.c | 16 
 gcc/tree-ssa-forwprop.cc|  6 +-
 2 files changed, 21 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.dg/torture/pr109331.c

diff --git a/gcc/testsuite/gcc.dg/torture/pr109331.c 
b/gcc/testsuite/gcc.dg/torture/pr109331.c
new file mode 100644
index 000..72c57b9b74c
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/pr109331.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+
+char *ustol_dpp;
+void ustol(int flags)
+{
+  char *s;
+  if (s)
+flags |= 3;
+  switch (flags & 3)
+  case 3:
+while (*s)
+case '+':
+  ++s;
+  if (flags)
+ustol_dpp = s;
+}
diff --git a/gcc/tree-ssa-forwprop.cc b/gcc/tree-ssa-forwprop.cc
index bb0fa306312..9b567440ba4 100644
--- a/gcc/tree-ssa-forwprop.cc
+++ b/gcc/tree-ssa-forwprop.cc
@@ -4046,7 +4046,11 @@ pass_forwprop::execute (function *fun)
 
   /* Mark outgoing exectuable edges.  */
   if (edge e = find_taken_edge (bb, NULL))
-   e->flags |= EDGE_EXECUTABLE;
+   {
+ e->flags |= EDGE_EXECUTABLE;
+ if (EDGE_COUNT (bb->succs) > 1)
+   cfg_changed = true;
+   }
   else
{
  FOR_EACH_EDGE (e, ei, bb->succs)
-- 
2.35.3


[RFC] Fix for c++/PR12341

2023-03-29 Thread Benjamin Priour via Gcc-patches
Hi, below is my first patch ever. I ran the testsuites against trunk
20230322, everything seems OK to me, but as it is my first submission I'd
like to be sure of it.
Thanks a lot for the review !

diff --git a/gcc/cp/class.cc b/gcc/cp/class.cc
index 68b62086340..147a7458488 100644
--- a/gcc/cp/class.cc
+++ b/gcc/cp/class.cc
@@ -3080,6 +3080,109 @@ warn_hidden (tree t)
   }
 }

+
+/* Lookup the inheritance hierarchy of T for any non-static field that have
+the indicated NAME.  */
+static void
+lookup_basevardecls (tree name, tree t, vec *base_vardecls)
+{
+  /* Find non-static fields in T with the indicated NAME.  */
+  for (tree field = TYPE_FIELDS(t); field; field = DECL_CHAIN(field))
+{
+  /* Going with the same policy as warn_hidden with base class's
members
+  non visible from child, i.e. do not distinguish.
+  A justification might be to not omit warning in the following case:
+
+  class Ancestor {
+  friend void foo_accessor(Ancestor *);
+
+  private:
+int x;
+  };
+
+  class Descendant : public Ancestor {
+  public:
+int x;
+  }
+
+  void foo_accessor(Ancestor *anc) {
+...
+anc->x;
+...
+  }
+
+  foo_accessor(new Descendant());
+   */
+  if (TREE_CODE (field) == FIELD_DECL
+&& !DECL_ARTIFICIAL(field)
+&& DECL_NAME(field) == name)
+{
+ base_vardecls->safe_push (field);
+/* Return upon first match, as there cannot be two data members
+named equally in the same RECORD_TYPE.
+Moreover, avoid redundant warnings by not diving deeper into
+T inheritance hierarchy. */
+return;
+}
+}
+
+  int n_baseclasses = BINFO_N_BASE_BINFOS (TYPE_BINFO (t));
+  /* Go one step up the inheritance hierarchy.  */
+  for (int i = 0; i < n_baseclasses; i++)
+{
+  tree basetype = BINFO_TYPE (BINFO_BASE_BINFO (TYPE_BINFO (t), i));
+  lookup_basevardecls (name, basetype, base_vardecls);
+}
+}
+
+
+/* Warn about non-static fields name hiding. */
+static void
+warn_name_hiding(tree t)
+{
+  if (is_empty_class(t) || CLASSTYPE_NEARLY_EMPTY_P(t))
+return;
+
+  for (tree field = TYPE_FIELDS(t); field; field = DECL_CHAIN(field))
+{
+/* Skip if field is not a user-defined non-static data member. */
+if (TREE_CODE(field) != FIELD_DECL || DECL_ARTIFICIAL(field))
+  continue;
+
+unsigned j;
+tree name = DECL_NAME(field);
+/* Not sure about the size parameter of auto_vec */
+auto_vec base_vardecls;
+tree binfo;
+tree base_binfo;
+  /* Iterate through all of the base classes looking for possibly
+  shadowed non-static data members. */
+for (binfo = TYPE_BINFO (t), j = 0;
+BINFO_BASE_ITERATE (binfo, j, base_binfo); j++)
+  {
+tree basetype = BINFO_TYPE(base_binfo);
+lookup_basevardecls(name, basetype, _vardecls);
+  }
+
+/* field was not found among the base classes */
+if (base_vardecls.is_empty())
+  continue;
+
+/* Emit a warning for each field similarly named
+found in the base class hierarchy */
+for (tree base_vardecl : base_vardecls)
+  if (base_vardecl)
+{
+  auto_diagnostic_group d;
+  if (warning_at (location_of (field),
+  OPT_Wshadow,
+  "%qD might shadow %qD.", field, base_vardecl))
+  inform (location_of (base_vardecl), "  %qD name already in use
here.", base_vardecl);
+ }
+}
+}
+
+
 /* Recursive helper for finish_struct_anon.  */

 static void
@@ -7654,6 +7757,8 @@ finish_struct_1 (tree t)

   if (warn_overloaded_virtual)
 warn_hidden (t);
+  if (warn_shadow)
+warn_name_hiding(t);

   /* Class layout, assignment of virtual table slots, etc., is now
  complete.  Give the back end a chance to tweak the visibility of
diff --git a/gcc/testsuite/g++.dg/warn/pr12341-1.C
b/gcc/testsuite/g++.dg/warn/pr12341-1.C
new file mode 100644
index 000..2c8f63d3b4f
--- /dev/null
+++ b/gcc/testsuite/g++.dg/warn/pr12341-1.C
@@ -0,0 +1,51 @@
+// PR c++/12341
+/* { dg-do compile } */
+/* { dg-options -Wshadow } */
+
+class A {
+protected:
+  int aaa; /* { dg-line A_def_aaa } */
+};
+
+class B : public A {
+public:
+  int aaa; /* { dg-line B_shadowing_aaa } */
+  /* { dg-warning "'B::aaa' might shadow 'A::aaa'." "" { target *-*-* }
.-1 } */
+  /* { dg-note "'A::aaa' name already in use here." "" { target *-*-* }
A_def_aaa } */
+private:
+  int bbb; /* { dg-line B_def_bbb } */
+};
+
+class C : public B {
+public:
+  int bbb; /* { dg-warning "'C::bbb' might shadow 'B::bbb'." } */
+  /* { dg-note "'B::bbb' name already in use here." "" { target *-*-* }
B_def_bbb } */
+};
+
+class D {
+protected:
+  int bbb; /* { dg-line D_def_bbb } */
+  int ddd; /* { dg-line D_def_ddd } */
+};
+
+class E : protected D {
+private:
+  int eee;
+};
+
+// all first-level base classes must be considered.
+class Bi : protected B, private E {

arm: Fix MVE vcreate definition

2023-03-29 Thread Stamatis Markianos-Wright via Gcc-patches

Hi all,

I just found a bug that goes back to the initial merge of
the MVE backend: The vcreate intrinsic has had it's vector
lanes mixed up, compared to what was intended (as per
the ACLE) definition. This is also a discrepancy with clang:
https://godbolt.org/z/4n93e5aqj

This patches simply switches the operands around and
makes the tests more specific on the input registers
(I do not touch the output Q regs as they vary based
on softfp/hardfp or the input registers when the input
is a constant, since, in that case, a single register
is loaded with a constant and then the same register is
used twice as "vmov q0[2], q0[0], r2, r2" and the reg
num might also not always be guaranteed).

No regressions on MVE tesctsuite configurations or in
the CMSIS-NN testsuite.

Ok for trunk? (Despite this being late in Stage 4, sorry
about that!)

Thanks,
Stamatis Markianos-Wright

gcc/ChangeLog:

    * config/arm/mve.md (mve_vcvtq_n_to_f_): Swap operands.
  (mve_vcreateq_f): Swap operands.

gcc/testsuite/ChangeLog:

    * gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Tighten test.
    * gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Tighten test.
    * gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Tighten test.
    * gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Tighten test.
    * gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Tighten test.
    * gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Tighten test.
    * gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Tighten test.
    * gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Tighten test.
    * gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Tighten test.
    * gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Tighten test.
diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index d913ca24f8ea8d2fcadea972e037ede6f9cf36f9..a3589b19edd7398f66f8dc51276cf94345ec66a5 100644
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -763,7 +763,7 @@
 	 VCREATEQ_F))
   ]
   "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
-  "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1"
+  "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2"
   [(set_attr "type" "mve_move")
(set_attr "length""8")])
 
@@ -778,7 +778,7 @@
 	 VCREATEQ))
   ]
   "TARGET_HAVE_MVE"
-  "vmov %q0[2], %q0[0], %Q2, %Q1\;vmov %q0[3], %q0[1], %R2, %R1"
+  "vmov %q0[2], %q0[0], %Q1, %Q2\;vmov %q0[3], %q0[1], %R1, %R2"
   [(set_attr "type" "mve_move")
(set_attr "length""8")])
 
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
index 0458bb1bb7cd6a3f898f3138f86d9c52374ae48d..8d6764d893834bb751ba79476f67ef5111ee1775 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
@@ -12,8 +12,8 @@ extern "C" {
 /*
 **foo:
 **	...
-**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
-**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
 **	...
 */
 float16x8_t
@@ -39,4 +39,4 @@ foo1 ()
 }
 #endif
 
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
index af782b5ac5379f6890af03c3f5ae6ef41492f623..6ab05ced809ec38eb5b72123120a0c822cf3e351 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
@@ -12,8 +12,8 @@ extern "C" {
 /*
 **foo:
 **	...
-**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
-**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
 **	...
 */
 float32x4_t
@@ -39,4 +39,4 @@ foo1 ()
 }
 #endif
 
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
index 8a3e91843f8cdece415d685b13710e4d250d8da0..290637595a4a26c019abcb6e85f1741d72ade93f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
@@ -12,8 +12,8 @@ extern "C" {
 /*
 **foo:
 **	...
-**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
-**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r0, r2
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r1, r3
 **	...
 */
 int16x8_t
@@ -39,4 +39,4 @@ foo1 ()
 }
 #endif
 
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c 

RE: Re: [PATCH v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.

2023-03-29 Thread Li, Pan2 via Gcc-patches
Cool. Thank you all for this, have a nice day!

Pan

From: juzhe.zh...@rivai.ai 
Sent: Wednesday, March 29, 2023 5:35 PM
To: rguenther ; Li, Pan2 
Cc: gcc-patches ; Kito.cheng ; 
Wang, Yanzhang 
Subject: Re: Re: [PATCH v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.

Thanks Richard && Pan.

Pan has passed the bootstrap and I will merge this patch when GCC 14 is open (I 
have write access now).


juzhe.zh...@rivai.ai

From: Richard Biener
Date: 2023-03-29 17:24
To: pan2.li
CC: gcc-patches; 
juzhe.zhong; 
kito.cheng; 
yanzhang.wang
Subject: Re: [PATCH v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.
On Wed, 29 Mar 2023, pan2...@intel.com wrote:

> From: Pan Li mailto:pan2...@intel.com>>
>
> In most architecture the precision_size of vbool*_t types are caculated
> like as the multiple of the type size.  For example:
> precision_size = type_size * 8 (aka, bit count per bytes).
>
> Unfortunately, some architecture like RISC-V will adjust the precision_size
> for the vbool*_t in order to align the ISA. For example as below.
> type_size  = [1, 1, 1, 1,  2,  4,  8]
> precision_size = [1, 2, 4, 8, 16, 32, 64]
>
> Then the precision_size of RISC-V vbool*_t will not be the multiple of the
> type_size. This PATCH try to enrich this case when comparing the vn_reference.
>
> Given we have the below code:
> void test_vbool8_then_vbool16(int8_t * restrict in, int8_t * restrict out) {
> vbool8_t v1 = *(vbool8_t*)in;
> vbool16_t v2 = *(vbool16_t*)in;
>
> *(vbool8_t*)(out + 100) = v1;
> *(vbool16_t*)(out + 200) = v2;
> }
>
> Before this PATCH:
> csrrt0,vlenb
> sllit1,t0,1
> csrra3,vlenb
> sub sp,sp,t1
> sllia4,a3,1
> add a4,a4,sp
> addia2,a1,100
> vsetvli a5,zero,e8,m1,ta,ma
> sub a3,a4,a3
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a2)
> vsm.v   v24,0(a3)
> addia1,a1,200
> csrrt0,vlenb
> vsetvli a4,zero,e8,mf2,ta,ma
> sllit1,t0,1
> vlm.v   v24,0(a3)
> vsm.v   v24,0(a1)
> add sp,sp,t1
> jr  ra
>
> After this PATCH:
> addia3,a1,100
> vsetvli a4,zero,e8,m1,ta,ma
> addia1,a1,200
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a3)
> vsetvli a5,zero,e8,mf2,ta,ma
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a1)
> ret

OK if this passes bootstrap / regtest.

Thanks,
Richard.

> PR 109272
>
> gcc/ChangeLog:
>
> * tree-ssa-sccvn.cc (vn_reference_eq):
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/pr108185-4.c:
> * gcc.target/riscv/rvv/base/pr108185-5.c:
> * gcc.target/riscv/rvv/base/pr108185-6.c:
>
> Signed-off-by: Pan Li mailto:pan2...@intel.com>>
> ---
>  .../gcc.target/riscv/rvv/base/pr108185-4.c|  2 +-
>  .../gcc.target/riscv/rvv/base/pr108185-5.c|  2 +-
>  .../gcc.target/riscv/rvv/base/pr108185-6.c|  2 +-
>  gcc/tree-ssa-sccvn.cc | 20 +++
>  4 files changed, 23 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> index ea3c360d756..e70284fada8 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> @@ -65,4 +65,4 @@ test_vbool8_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 15 } } */
> +/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> index 9fc659d2402..575a7842cdf 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> @@ -65,4 +65,4 @@ test_vbool16_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 14 } } */
> +/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> 

Re: [PATCH] range-op-float: Use get_nan_state in float_widen_lhs_range

2023-03-29 Thread Aldy Hernandez via Gcc-patches




On 3/28/23 10:50, Aldy Hernandez wrote:



On 3/28/23 09:54, Jakub Jelinek wrote:

Hi!

On Wed, Mar 22, 2023 at 07:32:44AM +0100, Aldy Hernandez wrote:

* value-range.cc (frange::set): Add nan_state argument.
* value-range.h (class nan_state): New.
(frange::get_nan_state): New.


The following patch makes use of those changes in float_widen_lhs_range.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?


LGTM.
Aldy


2023-03-28  Jakub Jelinek  

* range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
as 4th argument to set to avoid clear_nan and union_ calls.

--- gcc/range-op-float.cc.jj    2023-03-23 15:25:47.119740274 +0100
+++ gcc/range-op-float.cc    2023-03-27 13:28:18.847264635 +0200
@@ -2262,12 +2262,7 @@ float_widen_lhs_range (tree type, const
   or real_max_representable (type) as upper bound.  */
    bool save_flag_finite_math_only = flag_finite_math_only;
    flag_finite_math_only = false;
-  ret.set (type, lb, ub);
-  if (lhs.kind () != VR_VARYING)
-    {
-  ret.clear_nan ();
-  ret.union_ (lhs);
-    }
+  ret.set (type, lb, ub, lhs.get_nan_state ());
    flag_finite_math_only = save_flag_finite_math_only;
    return ret;


I just noticed we're still doing the flag_finite_math_only hack.  We 
should add some sort of flag to the setter to avoid reducing the range. 
I suppose this can wait to the next release.


Aldy



Re: Re: [PATCH v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.

2023-03-29 Thread juzhe.zh...@rivai.ai
Thanks Richard && Pan.

Pan has passed the bootstrap and I will merge this patch when GCC 14 is open (I 
have write access now).



juzhe.zh...@rivai.ai
 
From: Richard Biener
Date: 2023-03-29 17:24
To: pan2.li
CC: gcc-patches; juzhe.zhong; kito.cheng; yanzhang.wang
Subject: Re: [PATCH v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.
On Wed, 29 Mar 2023, pan2...@intel.com wrote:
 
> From: Pan Li 
> 
> In most architecture the precision_size of vbool*_t types are caculated
> like as the multiple of the type size.  For example:
> precision_size = type_size * 8 (aka, bit count per bytes).
> 
> Unfortunately, some architecture like RISC-V will adjust the precision_size
> for the vbool*_t in order to align the ISA. For example as below.
> type_size  = [1, 1, 1, 1,  2,  4,  8]
> precision_size = [1, 2, 4, 8, 16, 32, 64]
> 
> Then the precision_size of RISC-V vbool*_t will not be the multiple of the
> type_size. This PATCH try to enrich this case when comparing the vn_reference.
> 
> Given we have the below code:
> void test_vbool8_then_vbool16(int8_t * restrict in, int8_t * restrict out) {
> vbool8_t v1 = *(vbool8_t*)in;
> vbool16_t v2 = *(vbool16_t*)in;
> 
> *(vbool8_t*)(out + 100) = v1;
> *(vbool16_t*)(out + 200) = v2;
> }
> 
> Before this PATCH:
> csrrt0,vlenb
> sllit1,t0,1
> csrra3,vlenb
> sub sp,sp,t1
> sllia4,a3,1
> add a4,a4,sp
> addia2,a1,100
> vsetvli a5,zero,e8,m1,ta,ma
> sub a3,a4,a3
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a2)
> vsm.v   v24,0(a3)
> addia1,a1,200
> csrrt0,vlenb
> vsetvli a4,zero,e8,mf2,ta,ma
> sllit1,t0,1
> vlm.v   v24,0(a3)
> vsm.v   v24,0(a1)
> add sp,sp,t1
> jr  ra
> 
> After this PATCH:
> addia3,a1,100
> vsetvli a4,zero,e8,m1,ta,ma
> addia1,a1,200
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a3)
> vsetvli a5,zero,e8,mf2,ta,ma
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a1)
> ret
 
OK if this passes bootstrap / regtest.
 
Thanks,
Richard.
 
> PR 109272
> 
> gcc/ChangeLog:
> 
> * tree-ssa-sccvn.cc (vn_reference_eq):
> 
> gcc/testsuite/ChangeLog:
> 
> * gcc.target/riscv/rvv/base/pr108185-4.c:
> * gcc.target/riscv/rvv/base/pr108185-5.c:
> * gcc.target/riscv/rvv/base/pr108185-6.c:
> 
> Signed-off-by: Pan Li 
> ---
>  .../gcc.target/riscv/rvv/base/pr108185-4.c|  2 +-
>  .../gcc.target/riscv/rvv/base/pr108185-5.c|  2 +-
>  .../gcc.target/riscv/rvv/base/pr108185-6.c|  2 +-
>  gcc/tree-ssa-sccvn.cc | 20 +++
>  4 files changed, 23 insertions(+), 3 deletions(-)
> 
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> index ea3c360d756..e70284fada8 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> @@ -65,4 +65,4 @@ test_vbool8_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 15 } } */
> +/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> index 9fc659d2402..575a7842cdf 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> @@ -65,4 +65,4 @@ test_vbool16_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 14 } } */
> +/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> index 98275e5267d..95a11d37016 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> @@ -65,4 +65,4 @@ test_vbool32_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf2,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { 

Re: [PATCH v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.

2023-03-29 Thread Richard Biener via Gcc-patches
On Wed, 29 Mar 2023, pan2...@intel.com wrote:

> From: Pan Li 
> 
> In most architecture the precision_size of vbool*_t types are caculated
> like as the multiple of the type size.  For example:
> precision_size = type_size * 8 (aka, bit count per bytes).
> 
> Unfortunately, some architecture like RISC-V will adjust the precision_size
> for the vbool*_t in order to align the ISA. For example as below.
> type_size  = [1, 1, 1, 1,  2,  4,  8]
> precision_size = [1, 2, 4, 8, 16, 32, 64]
> 
> Then the precision_size of RISC-V vbool*_t will not be the multiple of the
> type_size. This PATCH try to enrich this case when comparing the vn_reference.
> 
> Given we have the below code:
> void test_vbool8_then_vbool16(int8_t * restrict in, int8_t * restrict out) {
> vbool8_t v1 = *(vbool8_t*)in;
> vbool16_t v2 = *(vbool16_t*)in;
> 
> *(vbool8_t*)(out + 100) = v1;
> *(vbool16_t*)(out + 200) = v2;
> }
> 
> Before this PATCH:
> csrrt0,vlenb
> sllit1,t0,1
> csrra3,vlenb
> sub sp,sp,t1
> sllia4,a3,1
> add a4,a4,sp
> addia2,a1,100
> vsetvli a5,zero,e8,m1,ta,ma
> sub a3,a4,a3
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a2)
> vsm.v   v24,0(a3)
> addia1,a1,200
> csrrt0,vlenb
> vsetvli a4,zero,e8,mf2,ta,ma
> sllit1,t0,1
> vlm.v   v24,0(a3)
> vsm.v   v24,0(a1)
> add sp,sp,t1
> jr  ra
> 
> After this PATCH:
> addia3,a1,100
> vsetvli a4,zero,e8,m1,ta,ma
> addia1,a1,200
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a3)
> vsetvli a5,zero,e8,mf2,ta,ma
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a1)
> ret

OK if this passes bootstrap / regtest.

Thanks,
Richard.

>   PR 109272
> 
> gcc/ChangeLog:
> 
>   * tree-ssa-sccvn.cc (vn_reference_eq):
> 
> gcc/testsuite/ChangeLog:
> 
>   * gcc.target/riscv/rvv/base/pr108185-4.c:
>   * gcc.target/riscv/rvv/base/pr108185-5.c:
>   * gcc.target/riscv/rvv/base/pr108185-6.c:
> 
> Signed-off-by: Pan Li 
> ---
>  .../gcc.target/riscv/rvv/base/pr108185-4.c|  2 +-
>  .../gcc.target/riscv/rvv/base/pr108185-5.c|  2 +-
>  .../gcc.target/riscv/rvv/base/pr108185-6.c|  2 +-
>  gcc/tree-ssa-sccvn.cc | 20 +++
>  4 files changed, 23 insertions(+), 3 deletions(-)
> 
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> index ea3c360d756..e70284fada8 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> @@ -65,4 +65,4 @@ test_vbool8_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 15 } } */
> +/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> index 9fc659d2402..575a7842cdf 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> @@ -65,4 +65,4 @@ test_vbool16_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 14 } } */
> +/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> index 98275e5267d..95a11d37016 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> @@ -65,4 +65,4 @@ test_vbool32_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf2,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 13 } } */
> +/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> diff --git a/gcc/tree-ssa-sccvn.cc b/gcc/tree-ssa-sccvn.cc
> index 6b8d38b270c..567df3cb2c6 100644
> --- a/gcc/tree-ssa-sccvn.cc
> +++ 

RE: [PATCH] [RISC-V]: Bugfix for RVV vbool*_t vn_reference_equal.

2023-03-29 Thread Li, Pan2 via Gcc-patches
Thank you Biener for the professional suggestion. That make it more clean and 
simple, and update the PATCH v2 for this already.

Pan

-Original Message-
From: Richard Biener  
Sent: Wednesday, March 29, 2023 4:10 PM
To: Li, Pan2 
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com; 
rguent...@suse.de; Wang, Yanzhang 
Subject: Re: [PATCH] [RISC-V]: Bugfix for RVV vbool*_t vn_reference_equal.

On Wed, Mar 29, 2023 at 9:55 AM Pan Li via Gcc-patches 
 wrote:
>
> From: Pan Li 
>
> In most architecture the precision_size of vbool*_t types are 
> caculated like as the multiple of the type size.  For example:
> precision_size = type_size * 8 (aka, bit count per bytes).
>
> Unfortunately, some architecture like RISC-V will adjust the 
> precision_size for the vbool*_t in order to align the ISA. For example as 
> below.
> type_size  = [1, 1, 1, 1,  2,  4,  8]
> precision_size = [1, 2, 4, 8, 16, 32, 64]
>
> Then the precision_size of RISC-V vbool*_t will not be the multiple of 
> the type_size. This PATCH try to enrich this case when comparing the 
> vn_reference.
>
> Given we have the below code:
> void test_vbool8_then_vbool16(int8_t * restrict in, int8_t * restrict out) {
> vbool8_t v1 = *(vbool8_t*)in;
> vbool16_t v2 = *(vbool16_t*)in;
>
> *(vbool8_t*)(out + 100) = v1;
> *(vbool16_t*)(out + 200) = v2;
> }
>
> Before this PATCH:
> csrrt0,vlenb
> sllit1,t0,1
> csrra3,vlenb
> sub sp,sp,t1
> sllia4,a3,1
> add a4,a4,sp
> addia2,a1,100
> vsetvli a5,zero,e8,m1,ta,ma
> sub a3,a4,a3
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a2)
> vsm.v   v24,0(a3)
> addia1,a1,200
> csrrt0,vlenb
> vsetvli a4,zero,e8,mf2,ta,ma
> sllit1,t0,1
> vlm.v   v24,0(a3)
> vsm.v   v24,0(a1)
> add sp,sp,t1
> jr  ra
>
> After this PATCH:
> addia3,a1,100
> vsetvli a4,zero,e8,m1,ta,ma
> addia1,a1,200
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a3)
> vsetvli a5,zero,e8,mf2,ta,ma
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a1)
> ret
>
> PR 109272
>
> gcc/ChangeLog:
>
> * tree-ssa-sccvn.cc (vn_reference_eq):
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/pr108185-4.c:
> * gcc.target/riscv/rvv/base/pr108185-5.c:
> * gcc.target/riscv/rvv/base/pr108185-6.c:
> ---
>  .../gcc.target/riscv/rvv/base/pr108185-4.c  |  2 +-
>  .../gcc.target/riscv/rvv/base/pr108185-5.c  |  2 +-
>  .../gcc.target/riscv/rvv/base/pr108185-6.c  |  2 +-
>  gcc/tree-ssa-sccvn.cc   | 13 +
>  4 files changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> index ea3c360d756..e70284fada8 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> @@ -65,4 +65,4 @@ test_vbool8_then_vbool64(int8_t * restrict in, 
> int8_t * restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 } } */
> -/* { dg-final { scan-assembler-times 
> {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 15 } } */
> +/* { dg-final { scan-assembler-times 
> +{vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> index 9fc659d2402..575a7842cdf 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> @@ -65,4 +65,4 @@ test_vbool16_then_vbool64(int8_t * restrict in, 
> int8_t * restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 } } */
> -/* { dg-final { scan-assembler-times 
> {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 14 } } */
> +/* { dg-final { scan-assembler-times 
> +{vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> index 98275e5267d..95a11d37016 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> @@ -65,4 +65,4 @@ test_vbool32_then_vbool64(int8_t * restrict in, 
> int8_t * restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf2,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { 

[PATCH v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.

2023-03-29 Thread Pan Li via Gcc-patches
From: Pan Li 

In most architecture the precision_size of vbool*_t types are caculated
like as the multiple of the type size.  For example:
precision_size = type_size * 8 (aka, bit count per bytes).

Unfortunately, some architecture like RISC-V will adjust the precision_size
for the vbool*_t in order to align the ISA. For example as below.
type_size  = [1, 1, 1, 1,  2,  4,  8]
precision_size = [1, 2, 4, 8, 16, 32, 64]

Then the precision_size of RISC-V vbool*_t will not be the multiple of the
type_size. This PATCH try to enrich this case when comparing the vn_reference.

Given we have the below code:
void test_vbool8_then_vbool16(int8_t * restrict in, int8_t * restrict out) {
vbool8_t v1 = *(vbool8_t*)in;
vbool16_t v2 = *(vbool16_t*)in;

*(vbool8_t*)(out + 100) = v1;
*(vbool16_t*)(out + 200) = v2;
}

Before this PATCH:
csrrt0,vlenb
sllit1,t0,1
csrra3,vlenb
sub sp,sp,t1
sllia4,a3,1
add a4,a4,sp
addia2,a1,100
vsetvli a5,zero,e8,m1,ta,ma
sub a3,a4,a3
vlm.v   v24,0(a0)
vsm.v   v24,0(a2)
vsm.v   v24,0(a3)
addia1,a1,200
csrrt0,vlenb
vsetvli a4,zero,e8,mf2,ta,ma
sllit1,t0,1
vlm.v   v24,0(a3)
vsm.v   v24,0(a1)
add sp,sp,t1
jr  ra

After this PATCH:
addia3,a1,100
vsetvli a4,zero,e8,m1,ta,ma
addia1,a1,200
vlm.v   v24,0(a0)
vsm.v   v24,0(a3)
vsetvli a5,zero,e8,mf2,ta,ma
vlm.v   v24,0(a0)
vsm.v   v24,0(a1)
ret

PR 109272

gcc/ChangeLog:

* tree-ssa-sccvn.cc (vn_reference_eq):

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr108185-4.c:
* gcc.target/riscv/rvv/base/pr108185-5.c:
* gcc.target/riscv/rvv/base/pr108185-6.c:

Signed-off-by: Pan Li 
---
 .../gcc.target/riscv/rvv/base/pr108185-4.c|  2 +-
 .../gcc.target/riscv/rvv/base/pr108185-5.c|  2 +-
 .../gcc.target/riscv/rvv/base/pr108185-6.c|  2 +-
 gcc/tree-ssa-sccvn.cc | 20 +++
 4 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
index ea3c360d756..e70284fada8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
@@ -65,4 +65,4 @@ test_vbool8_then_vbool64(int8_t * restrict in, int8_t * 
restrict out) {
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
-/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 15 
} } */
+/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
index 9fc659d2402..575a7842cdf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
@@ -65,4 +65,4 @@ test_vbool16_then_vbool64(int8_t * restrict in, int8_t * 
restrict out) {
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
-/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 14 
} } */
+/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
index 98275e5267d..95a11d37016 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
@@ -65,4 +65,4 @@ test_vbool32_then_vbool64(int8_t * restrict in, int8_t * 
restrict out) {
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf2,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
-/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 13 
} } */
+/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
diff --git a/gcc/tree-ssa-sccvn.cc b/gcc/tree-ssa-sccvn.cc
index 6b8d38b270c..567df3cb2c6 100644
--- a/gcc/tree-ssa-sccvn.cc
+++ b/gcc/tree-ssa-sccvn.cc
@@ -799,6 +799,26 @@ vn_reference_eq (const_vn_reference_t const vr1, 
const_vn_reference_t const vr2)
   && (TYPE_PRECISION (vr2->type)
   != TREE_INT_CST_LOW (TYPE_SIZE (vr2->type
 return false;
+  else if (VECTOR_BOOLEAN_TYPE_P (vr1->type)
+  && VECTOR_BOOLEAN_TYPE_P (vr2->type))
+{
+  /* 

Re: [Patch, fortran] PR87477 - [meta-bug] [F03] issues concerning the ASSOCIATE statement

2023-03-29 Thread Paul Richard Thomas via Gcc-patches
Hi Manfred,

Indeed I do :-) Thanks for the spot. I have decided that it will be less
messy if I roll all the testcases into one or, perhaps two =>
associate_xx.f90

Forgetting the space before the final brace seems to be rife!

Cheers

Paul


On Wed, 29 Mar 2023 at 09:24, Manfred Schwarb  wrote:

> Am 28.03.23 um 23:04 schrieb Paul Richard Thomas via Fortran:
> > Hi All,
> >
> > I have made a start on ASSOCIATE issues. Some of the low(-ish) hanging
> > fruit are already fixed but I have yet to check that they a really fixed
> > and to close them:
> > pr102106, pr102111, pr104430, pr106048, pr85510, pr87460, pr92960 &
> pr93338
> >
> > The attached patch picks up those PRs involving deferred length
> characters
> > in one guise or another. I believe that it is all pretty straightforward.
> > Structure constructors with allocatable, deferred length, character array
> > components just weren't implemented and so this is the biggest part of
> the
> > patch. I found two other, non-associate PRs(106918 &  105205) that are
> > fixed and there are probably more.
> >
> > The chunk in trans-io.cc is something of a kludge, which I will come back
> > to. Some descriptors come through with a data pointer that looks as if it
> > should be OK but
> >
> > I thought to submit this now to get it out of the way. The ratio of PRs
> > fixed to the size of the patch warrants this. The next stage is going to
> be
> > rather messy and so "I might take a little while" (cross talk between
> > associate and select type, in particular).
> >
> > Regtests OK - good for mainline?
> >
>
> Paul, you have some "dg-do-run" and "dg-do-compile" statements in your
> testcases,
> could you change them into their single-minus-sign variants?
>
> Cheers,
> Manfred
>
>
> BTW: I just ran my script again and found the following testsuite issues
> (note that outer-most
> braces need to be space-padded):
>
> ./c-interop/removed-restrictions-1.f90:! { dg-do compile}
> ./c-interop/removed-restrictions-2.f90:! { dg-do compile}
> ./c-interop/removed-restrictions-3.f90:! { dg-do compile}
> ./c-interop/removed-restrictions-4.f90:! { dg-do compile}
> ./c-interop/tkr.f90:! { dg-do compile}
> ./c-interop/c407c-1.f90:! { dg-do compile}
> ./c-interop/deferred-character-1.f90:! { dg-do compile}
> ./c-interop/allocatable-optional-pointer.f90:! { dg-do compile}
> ./c-interop/c407a-1.f90:! { dg-do compile}
> ./c-interop/c407b-1.f90:! { dg-do compile}
> ./c-interop/c407b-2.f90:! { dg-do compile}
> ./c-interop/c535a-1.f90:! { dg-do compile}
> ./c-interop/c535a-2.f90:! { dg-do compile}
> ./c-interop/c535b-1.f90:! { dg-do compile}
> ./c-interop/c535b-2.f90:! { dg-do compile}
> ./c-interop/c535b-3.f90:! { dg-do compile}
> ./c-interop/c535c-1.f90:! { dg-do compile}
> ./c-interop/c535c-2.f90:! { dg-do compile}
> ./gomp/affinity-clause-1.f90:! { dg final { scan-tree-dump-times "#pragma
> omp task affinity\\(iterator\\(integer\\(kind=4\\)
> i=D\\.\[0-9\]+:5:1\\):b\\\[\\(.* ? \\+ -1\\\]\\)
> affinity\\(iterator\\(integer\\(kind=4\\)
> i=D\\.\[0-9\]+:5:1\\):d\\\[\\(\\(integer\\(kind=8\\)\\) i \\+ -1\\) \\*
> 6\\\]\\)"  1 "original" } }
> ./class_result_10.f90:! { dg-do run}
> ./pr103258.f90:! { dg-do compile}
> ./dtio_35.f90:! { dg-compile }
> ./pr93835.f08:! {dg-do run }
> ./pr59107.f90:! { dg-compile }
>
>
>
> > Cheers
> >
> > Paul
> >
> > Fortran: Fix some of the bugs in associate [PR87477]
> >
> > 2023-03-28  Paul Thomas  
> >
> > gcc/fortran
> > PR fortran/87477
> > * trans-array.cc (gfc_conv_expr_descriptor): Guard string len
> > expression in condition.
> > (duplicate_allocatable): Make element type more explicit with
> > 'eltype'.
> > * trans-expr.cc (gfc_get_expr_charlen): Retain last charlen in
> > 'previous' and use if end expression in substring reference is
> > null.
> > (gfc_conv_string_length): Use gfc_conv_expr_descriptor if
> > 'expr_flat' is an array.
> > (gfc_trans_alloc_subarray_assign): If this is a deferred string
> > length component, store the string length in the hidden comp.
> > Update the typespec length accordingly. Generate a new type
> > spec for the call to gfc_duplicate-allocatable in this case.
> > * trans-io.cc (gfc_trans_transfer): Scalarize transfer of
> > deferred character array components.
> >
> >
> > gcc/testsuite/
> > PR fortran/92994
> > * gfortran.dg/finalize_51.f90 : Update an error message.
> >
> > PR fortran/85686
> > * gfortran.dg/pr85686.f90 : New test
> >
> > PR fortran/88247
> > * gfortran.dg/pr88247.f90 : New test
> >
> > PR fortran/91941
> > * gfortran.dg/pr91941.f90 : New test
> >
> > PR fortran/92779
> > * gfortran.dg/pr92779.f90 : New test
> >
> > PR fortran/93339
> > * gfortran.dg/pr93339.f90 : New test
> >
> > PR fortran/93813
> > * gfortran.dg/pr93813.f90 : New test
> >
> > PR fortran/100948
> > * gfortran.dg/pr100948.f90 : New test
> >
> > PR fortran/102106
> > * gfortran.dg/pr102106.f90 : New test
> >
> > PR fortran/105205
> > * gfortran.dg/pr105205.f90 : New test
> >
> > PR fortran/106918
> > * 

Re: Re: [PATCH] Changed vector size

2023-03-29 Thread Richard Biener via Gcc-patches
On Wed, Mar 29, 2023 at 10:35 AM 陈逸轩  wrote:
>
> Thanks for your suggestion!But I met the issue that if I declare a int type 
> variable,this variable can't be converted to vector type. Could you teach me 
> more detail?

I don't understand what you mean.  I have pushed a fix.

Richard.

> Best regards!
> Yixuan Chen
>
> Richard Biener richard.guent...@gmail.comwrote:
> > On Mon, Mar 27, 2023 at 12:37 PM  wrote:
> > >
> > > From: Yixuan Chen 
> > >
> > > Observed a vint type "ABS_EXPR" followed by extra 3 int type "ABS_EXPR". 
> > > If want to test absolute value optimization for vector, maybe don't need 
> > > 4 times.
> >
> > A better solution would be to scan a dump before the veclower pass?
> >
> > > gcc/testsuite/ChangeLog:
> > >
> > > 2023-03-27  Yixuan Chen  
> > >
> > > * g++.dg/pr94920.C: Declare the vector size as long as int.
> > >
> > > ---
> > >  gcc/testsuite/g++.dg/pr94920.C | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/gcc/testsuite/g++.dg/pr94920.C 
> > > b/gcc/testsuite/g++.dg/pr94920.C
> > > index 126b00478d2..498bef93b3a 100644
> > > --- a/gcc/testsuite/g++.dg/pr94920.C
> > > +++ b/gcc/testsuite/g++.dg/pr94920.C
> > > @@ -2,7 +2,7 @@
> > >  /* { dg-do compile } */
> > >  /* { dg-options "-O2 -Wno-psabi -fdump-tree-optimized" } */
> > >
> > > -typedef int __attribute__((vector_size(4*sizeof(int vint;
> > > +typedef int __attribute__((vector_size(sizeof(int vint;
> > >
> > >  /* Same form as PR.  */
> > >  __attribute__((noipa)) unsigned int foo(int x) {
> > > --
> > > 2.40.0
> > >


[PATCH] scan generic vector tests before lowering

2023-03-29 Thread Richard Biener via Gcc-patches
The g++.dg/pr94920.C testcase looks for a specific number of
ABS_EXPRs but the vector example is prone to vector lowering so
the following instead of scanning the optimized dump scans the
forwprop1 dump which is before vector lowering and the point the
transforms should have happened.

Tested on riscv64-linux (where it previously failed) and x86_64-linux.

Pushed.

Richard.

* g++.dg/pr94920.C: Scan forwprop1 instead of optimized.
---
 gcc/testsuite/g++.dg/pr94920.C | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/g++.dg/pr94920.C b/gcc/testsuite/g++.dg/pr94920.C
index 126b00478d2..65ece36f8cc 100644
--- a/gcc/testsuite/g++.dg/pr94920.C
+++ b/gcc/testsuite/g++.dg/pr94920.C
@@ -1,6 +1,6 @@
 /* PR tree-optimization/94920 */
 /* { dg-do compile } */
-/* { dg-options "-O2 -Wno-psabi -fdump-tree-optimized" } */
+/* { dg-options "-O2 -Wno-psabi -fdump-tree-forwprop1" } */
 
 typedef int __attribute__((vector_size(4*sizeof(int vint;
 
@@ -60,4 +60,4 @@ __attribute__((noipa)) int qux(int x) {
 return (x >= 0 ? x : 0) + (x >= 0 ? x : 0);
 }
 
-/* { dg-final {scan-tree-dump-times " ABS_EXPR " 6 "optimized" } } */
+/* { dg-final {scan-tree-dump-times " ABS_EXPR " 6 "forwprop1" } } */
-- 
2.35.3


Re: Re: [PATCH] Changed vector size

2023-03-29 Thread 陈逸轩
Thanks for your suggestion!But I met the issue that if I declare a int type 
variable,this variable can't be converted to vector type. Could you teach me 
more detail?

Best regards!
Yixuan Chen  

Richard Biener richard.guent...@gmail.comwrote:
> On Mon, Mar 27, 2023 at 12:37 PM  wrote:
> >
> > From: Yixuan Chen 
> >
> > Observed a vint type "ABS_EXPR" followed by extra 3 int type "ABS_EXPR". If 
> > want to test absolute value optimization for vector, maybe don't need 4 
> > times.
> 
> A better solution would be to scan a dump before the veclower pass?
> 
> > gcc/testsuite/ChangeLog:
> >
> > 2023-03-27  Yixuan Chen  
> >
> > * g++.dg/pr94920.C: Declare the vector size as long as int.
> >
> > ---
> >  gcc/testsuite/g++.dg/pr94920.C | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/gcc/testsuite/g++.dg/pr94920.C b/gcc/testsuite/g++.dg/pr94920.C
> > index 126b00478d2..498bef93b3a 100644
> > --- a/gcc/testsuite/g++.dg/pr94920.C
> > +++ b/gcc/testsuite/g++.dg/pr94920.C
> > @@ -2,7 +2,7 @@
> >  /* { dg-do compile } */
> >  /* { dg-options "-O2 -Wno-psabi -fdump-tree-optimized" } */
> >
> > -typedef int __attribute__((vector_size(4*sizeof(int vint;
> > +typedef int __attribute__((vector_size(sizeof(int vint;
> >
> >  /* Same form as PR.  */
> >  __attribute__((noipa)) unsigned int foo(int x) {
> > --
> > 2.40.0
> >


[PATCH] tree-optimization/109327 - forwprop stmt removal issue

2023-03-29 Thread Richard Biener via Gcc-patches
There's interfering between the to_removed queue and other mechanisms
removing stmts, in this case remove_prop_source_from_use.  The following
makes the to_remove queue draining more permissive.

Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.

PR tree-optimization/109327
* tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
already removed stmts when draining to_remove.

* gcc.dg/pr109327.c: New testcase.
---
 gcc/testsuite/gcc.dg/pr109327.c | 15 +++
 gcc/tree-ssa-forwprop.cc|  4 
 2 files changed, 19 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/pr109327.c

diff --git a/gcc/testsuite/gcc.dg/pr109327.c b/gcc/testsuite/gcc.dg/pr109327.c
new file mode 100644
index 000..827b26f148e
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr109327.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O -fno-tree-ccp" } */
+
+int a;
+void b(int c) {}
+int main()
+{
+  int d = 0, *e = 
+  if (d) {
+int *f = e;
+while (a)
+  b(e != f);
+  }
+  return 0;
+}
diff --git a/gcc/tree-ssa-forwprop.cc b/gcc/tree-ssa-forwprop.cc
index 5eccc7a89b5..bb0fa306312 100644
--- a/gcc/tree-ssa-forwprop.cc
+++ b/gcc/tree-ssa-forwprop.cc
@@ -4061,6 +4061,10 @@ pass_forwprop::execute (function *fun)
   while (!to_remove.is_empty())
 {
   gimple *stmt = to_remove.pop ();
+  /* For example remove_prop_source_from_use can remove stmts queued
+for removal.  Deal with this gracefully.  */
+  if (!gimple_bb (stmt))
+   continue;
   if (dump_file && (dump_flags & TDF_DETAILS))
{
  fprintf (dump_file, "Removing dead stmt ");
-- 
2.35.3


Re: [Patch, fortran] PR87477 - [meta-bug] [F03] issues concerning the ASSOCIATE statement

2023-03-29 Thread Manfred Schwarb via Gcc-patches
Am 28.03.23 um 23:04 schrieb Paul Richard Thomas via Fortran:
> Hi All,
>
> I have made a start on ASSOCIATE issues. Some of the low(-ish) hanging
> fruit are already fixed but I have yet to check that they a really fixed
> and to close them:
> pr102106, pr102111, pr104430, pr106048, pr85510, pr87460, pr92960 & pr93338
>
> The attached patch picks up those PRs involving deferred length characters
> in one guise or another. I believe that it is all pretty straightforward.
> Structure constructors with allocatable, deferred length, character array
> components just weren't implemented and so this is the biggest part of the
> patch. I found two other, non-associate PRs(106918 &  105205) that are
> fixed and there are probably more.
>
> The chunk in trans-io.cc is something of a kludge, which I will come back
> to. Some descriptors come through with a data pointer that looks as if it
> should be OK but
>
> I thought to submit this now to get it out of the way. The ratio of PRs
> fixed to the size of the patch warrants this. The next stage is going to be
> rather messy and so "I might take a little while" (cross talk between
> associate and select type, in particular).
>
> Regtests OK - good for mainline?
>

Paul, you have some "dg-do-run" and "dg-do-compile" statements in your 
testcases,
could you change them into their single-minus-sign variants?

Cheers,
Manfred


BTW: I just ran my script again and found the following testsuite issues (note 
that outer-most
braces need to be space-padded):

./c-interop/removed-restrictions-1.f90:! { dg-do compile}
./c-interop/removed-restrictions-2.f90:! { dg-do compile}
./c-interop/removed-restrictions-3.f90:! { dg-do compile}
./c-interop/removed-restrictions-4.f90:! { dg-do compile}
./c-interop/tkr.f90:! { dg-do compile}
./c-interop/c407c-1.f90:! { dg-do compile}
./c-interop/deferred-character-1.f90:! { dg-do compile}
./c-interop/allocatable-optional-pointer.f90:! { dg-do compile}
./c-interop/c407a-1.f90:! { dg-do compile}
./c-interop/c407b-1.f90:! { dg-do compile}
./c-interop/c407b-2.f90:! { dg-do compile}
./c-interop/c535a-1.f90:! { dg-do compile}
./c-interop/c535a-2.f90:! { dg-do compile}
./c-interop/c535b-1.f90:! { dg-do compile}
./c-interop/c535b-2.f90:! { dg-do compile}
./c-interop/c535b-3.f90:! { dg-do compile}
./c-interop/c535c-1.f90:! { dg-do compile}
./c-interop/c535c-2.f90:! { dg-do compile}
./gomp/affinity-clause-1.f90:! { dg final { scan-tree-dump-times "#pragma omp 
task affinity\\(iterator\\(integer\\(kind=4\\) i=D\\.\[0-9\]+:5:1\\):b\\\[\\(.* 
? \\+ -1\\\]\\) affinity\\(iterator\\(integer\\(kind=4\\) 
i=D\\.\[0-9\]+:5:1\\):d\\\[\\(\\(integer\\(kind=8\\)\\) i \\+ -1\\) \\* 
6\\\]\\)"  1 "original" } }
./class_result_10.f90:! { dg-do run}
./pr103258.f90:! { dg-do compile}
./dtio_35.f90:! { dg-compile }
./pr93835.f08:! {dg-do run }
./pr59107.f90:! { dg-compile }



> Cheers
>
> Paul
>
> Fortran: Fix some of the bugs in associate [PR87477]
>
> 2023-03-28  Paul Thomas  
>
> gcc/fortran
> PR fortran/87477
> * trans-array.cc (gfc_conv_expr_descriptor): Guard string len
> expression in condition.
> (duplicate_allocatable): Make element type more explicit with
> 'eltype'.
> * trans-expr.cc (gfc_get_expr_charlen): Retain last charlen in
> 'previous' and use if end expression in substring reference is
> null.
> (gfc_conv_string_length): Use gfc_conv_expr_descriptor if
> 'expr_flat' is an array.
> (gfc_trans_alloc_subarray_assign): If this is a deferred string
> length component, store the string length in the hidden comp.
> Update the typespec length accordingly. Generate a new type
> spec for the call to gfc_duplicate-allocatable in this case.
> * trans-io.cc (gfc_trans_transfer): Scalarize transfer of
> deferred character array components.
>
>
> gcc/testsuite/
> PR fortran/92994
> * gfortran.dg/finalize_51.f90 : Update an error message.
>
> PR fortran/85686
> * gfortran.dg/pr85686.f90 : New test
>
> PR fortran/88247
> * gfortran.dg/pr88247.f90 : New test
>
> PR fortran/91941
> * gfortran.dg/pr91941.f90 : New test
>
> PR fortran/92779
> * gfortran.dg/pr92779.f90 : New test
>
> PR fortran/93339
> * gfortran.dg/pr93339.f90 : New test
>
> PR fortran/93813
> * gfortran.dg/pr93813.f90 : New test
>
> PR fortran/100948
> * gfortran.dg/pr100948.f90 : New test
>
> PR fortran/102106
> * gfortran.dg/pr102106.f90 : New test
>
> PR fortran/105205
> * gfortran.dg/pr105205.f90 : New test
>
> PR fortran/106918
> * gfortran.dg/pr106918.f90 : New test



[r13-6873 Regression] FAIL: gcc.dg/guality/pr54200.c -Os -DPREVENT_OPTIMIZATION line 20 z == 3 on Linux/x86_64

2023-03-29 Thread haochen.jiang via Gcc-patches
On Linux/x86_64,

776a5bb5894315ab144dc74222fc580fde8fdd87 is the first bad commit
commit 776a5bb5894315ab144dc74222fc580fde8fdd87
Author: Richard Biener 
Date:   Wed Mar 22 10:05:19 2023 +0100

rtl-optimization/109237 - speedup bb_is_just_return

caused

FAIL: gcc.dg/guality/pr54200.c  -Og -DPREVENT_OPTIMIZATION  line 20 z == 3
FAIL: gcc.dg/guality/pr54200.c   -Os  -DPREVENT_OPTIMIZATION  line 20 z == 3

with GCC configured with

../../gcc/configure 
--prefix=/export/users/haochenj/src/gcc-bisect/master/master/r13-6873/usr 
--enable-clocale=gnu --with-system-zlib --with-demangler-in-ld 
--with-fpmath=sse --enable-languages=c,c++,fortran --enable-cet --without-isl 
--enable-libmpx x86_64-linux --disable-bootstrap

To reproduce:

$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="guality.exp=gcc.dg/guality/pr54200.c --target_board='unix{-m64}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="guality.exp=gcc.dg/guality/pr54200.c --target_board='unix{-m64\ 
-march=cascadelake}'"

(Please do not reply to this email, for question about this report, contact me 
at haochen dot jiang at intel.com)


Re: [PATCHv2, rs6000] rs6000: correct vector sign extend built-ins on Big Endian [PR108812]

2023-03-29 Thread Kewen.Lin via Gcc-patches
Hi Haochen,

on 2023/3/28 15:45, HAO CHEN GUI wrote:
> Hi,
>   This patch removes byte reverse operation before vector integer sign
> extension on big endian. These built-ins require to sign extend the element
> of the input vector that would fall in the least significant portion of the
> result element. So both BE and LE should do the same operation and the byte
> reversion is no need. This patch fixes it. Now these built-ins have the same
> behavior on all compilers.
> 

I noticed that this patch leaves expander vsignextend_v2di_v1ti alone, I think
we need to remove it together, because the reversing results in the behavior
on BE isn't consistent with what the documentation says.

The others looks good to me.  Thanks!

BR,
Kewen

>   The unnecessary expand patterns are removed and the names of insn pattern
> are set to the same style. Also the test case is modified.
> 
>   The patch passed regression test on Power Linux platforms.
> 
> Thanks
> Gui Haochen
> 
> ChangeLog
> rs6000: correct vector sign extend builtins on Big Endian
> 
> gcc/
>   PR target/108812
>   * config/rs6000/vsx.md (vsx_sign_extend_qi_): Rename to...
>   (vsx_sign_extend_v16qi_): ... this.
>   (vsx_sign_extend_hi_): Rename to...
>   (vsx_sign_extend_v8hi_): ... this.
>   (vsx_sign_extend_si_v2di): Rename to...
>   (vsx_sign_extend_v4si_v2di): ... this.
>   (vsignextend_qi_): Remove.
>   (vsignextend_hi_): Remove.
>   (vsignextend_si_v2di): Remove.
>   (*xxspltib__split): Replace gen_vsx_sign_extend_qi_v2di with
>   gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
>   with gen_vsx_sign_extend_v16qi_v4si.
>   * config/rs6000/rs6000.md (split for DI constant generation):
>   Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
>   (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
>   with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
>   with gen_vsx_sign_extend_v16qi_si.
>   * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
>   Set bif-pattern to vsx_sign_extend_v16qi_v2di.
>   (__builtin_altivec_vsignextsb2w): Set bif-pattern to
>   vsx_sign_extend_v16qi_v4si.
>   (__builtin_altivec_visgnextsh2d): Set bif-pattern to
>   vsx_sign_extend_v8hi_v2di.
>   (__builtin_altivec_vsignextsh2w): Set bif-pattern to
>   vsx_sign_extend_v8hi_v4si.
>   (__builtin_altivec_vsignextsw2d): Set bif-pattern to
>   vsx_sign_extend_si_v2di.
>   * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
>   gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
>   gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
>   gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
> 
> gcc/testsuite/
>   PR target/108812
>   * gcc.target/powerpc/p9-sign_extend-runnable.c: Set different expected
>   vectors for Big Endian.
> 
> patch.diff
> diff --git a/gcc/config/rs6000/rs6000-builtin.cc 
> b/gcc/config/rs6000/rs6000-builtin.cc
> index 90ab39dc258..c66cff17681 100644
> --- a/gcc/config/rs6000/rs6000-builtin.cc
> +++ b/gcc/config/rs6000/rs6000-builtin.cc
> @@ -2840,17 +2840,17 @@ lxvrse_expand_builtin (rtx target, insn_code icode, 
> rtx *op,
>if (icode == CODE_FOR_vsx_lxvrbx)
>  {
>temp1  = simplify_gen_subreg (V16QImode, tiscratch, TImode, 0);
> -  emit_insn (gen_vsx_sign_extend_qi_v2di (discratch, temp1));
> +  emit_insn (gen_vsx_sign_extend_v16qi_v2di (discratch, temp1));
>  }
>else if (icode == CODE_FOR_vsx_lxvrhx)
>  {
>temp1  = simplify_gen_subreg (V8HImode, tiscratch, TImode, 0);
> -  emit_insn (gen_vsx_sign_extend_hi_v2di (discratch, temp1));
> +  emit_insn (gen_vsx_sign_extend_v8hi_v2di (discratch, temp1));
>  }
>else if (icode == CODE_FOR_vsx_lxvrwx)
>  {
>temp1  = simplify_gen_subreg (V4SImode, tiscratch, TImode, 0);
> -  emit_insn (gen_vsx_sign_extend_si_v2di (discratch, temp1));
> +  emit_insn (gen_vsx_sign_extend_v4si_v2di (discratch, temp1));
>  }
>else if (icode == CODE_FOR_vsx_lxvrdx)
>  discratch = simplify_gen_subreg (V2DImode, tiscratch, TImode, 0);
> diff --git a/gcc/config/rs6000/rs6000-builtins.def 
> b/gcc/config/rs6000/rs6000-builtins.def
> index f76f54793d7..55e9cf9ece9 100644
> --- a/gcc/config/rs6000/rs6000-builtins.def
> +++ b/gcc/config/rs6000/rs6000-builtins.def
> @@ -2687,19 +2687,19 @@
>  VRLWNM altivec_vrlwnm {}
> 
>const vsll __builtin_altivec_vsignextsb2d (vsc);
> -VSIGNEXTSB2D vsignextend_qi_v2di {}
> +VSIGNEXTSB2D vsx_sign_extend_v16qi_v2di {}
> 
>const vsi __builtin_altivec_vsignextsb2w (vsc);
> -VSIGNEXTSB2W vsignextend_qi_v4si {}
> +VSIGNEXTSB2W vsx_sign_extend_v16qi_v4si {}
> 
>const vsll __builtin_altivec_visgnextsh2d (vss);
> -VSIGNEXTSH2D vsignextend_hi_v2di {}
> +VSIGNEXTSH2D vsx_sign_extend_v8hi_v2di {}
> 
>const vsi 

Re: [PATCH] [RISC-V]: Bugfix for RVV vbool*_t vn_reference_equal.

2023-03-29 Thread Richard Biener via Gcc-patches
On Wed, Mar 29, 2023 at 9:55 AM Pan Li via Gcc-patches
 wrote:
>
> From: Pan Li 
>
> In most architecture the precision_size of vbool*_t types are caculated
> like as the multiple of the type size.  For example:
> precision_size = type_size * 8 (aka, bit count per bytes).
>
> Unfortunately, some architecture like RISC-V will adjust the precision_size
> for the vbool*_t in order to align the ISA. For example as below.
> type_size  = [1, 1, 1, 1,  2,  4,  8]
> precision_size = [1, 2, 4, 8, 16, 32, 64]
>
> Then the precision_size of RISC-V vbool*_t will not be the multiple of the
> type_size. This PATCH try to enrich this case when comparing the vn_reference.
>
> Given we have the below code:
> void test_vbool8_then_vbool16(int8_t * restrict in, int8_t * restrict out) {
> vbool8_t v1 = *(vbool8_t*)in;
> vbool16_t v2 = *(vbool16_t*)in;
>
> *(vbool8_t*)(out + 100) = v1;
> *(vbool16_t*)(out + 200) = v2;
> }
>
> Before this PATCH:
> csrrt0,vlenb
> sllit1,t0,1
> csrra3,vlenb
> sub sp,sp,t1
> sllia4,a3,1
> add a4,a4,sp
> addia2,a1,100
> vsetvli a5,zero,e8,m1,ta,ma
> sub a3,a4,a3
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a2)
> vsm.v   v24,0(a3)
> addia1,a1,200
> csrrt0,vlenb
> vsetvli a4,zero,e8,mf2,ta,ma
> sllit1,t0,1
> vlm.v   v24,0(a3)
> vsm.v   v24,0(a1)
> add sp,sp,t1
> jr  ra
>
> After this PATCH:
> addia3,a1,100
> vsetvli a4,zero,e8,m1,ta,ma
> addia1,a1,200
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a3)
> vsetvli a5,zero,e8,mf2,ta,ma
> vlm.v   v24,0(a0)
> vsm.v   v24,0(a1)
> ret
>
> PR 109272
>
> gcc/ChangeLog:
>
> * tree-ssa-sccvn.cc (vn_reference_eq):
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/pr108185-4.c:
> * gcc.target/riscv/rvv/base/pr108185-5.c:
> * gcc.target/riscv/rvv/base/pr108185-6.c:
> ---
>  .../gcc.target/riscv/rvv/base/pr108185-4.c  |  2 +-
>  .../gcc.target/riscv/rvv/base/pr108185-5.c  |  2 +-
>  .../gcc.target/riscv/rvv/base/pr108185-6.c  |  2 +-
>  gcc/tree-ssa-sccvn.cc   | 13 +
>  4 files changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> index ea3c360d756..e70284fada8 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
> @@ -65,4 +65,4 @@ test_vbool8_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 15 } } */
> +/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> index 9fc659d2402..575a7842cdf 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
> @@ -65,4 +65,4 @@ test_vbool16_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 14 } } */
> +/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c 
> b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> index 98275e5267d..95a11d37016 100644
> --- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
> @@ -65,4 +65,4 @@ test_vbool32_then_vbool64(int8_t * restrict in, int8_t * 
> restrict out) {
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf2,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times 
> {vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
>  /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> -/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 13 } } */
> +/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 
> 12 } } */
> diff --git a/gcc/tree-ssa-sccvn.cc b/gcc/tree-ssa-sccvn.cc
> index 6b8d38b270c..c6dfa8fd9a3 100644
> --- a/gcc/tree-ssa-sccvn.cc
> +++ b/gcc/tree-ssa-sccvn.cc
> @@ -799,6 +799,19 @@ 

[PATCH] [RISC-V]: Bugfix for RVV vbool*_t vn_reference_equal.

2023-03-29 Thread Pan Li via Gcc-patches
From: Pan Li 

In most architecture the precision_size of vbool*_t types are caculated
like as the multiple of the type size.  For example:
precision_size = type_size * 8 (aka, bit count per bytes).

Unfortunately, some architecture like RISC-V will adjust the precision_size
for the vbool*_t in order to align the ISA. For example as below.
type_size  = [1, 1, 1, 1,  2,  4,  8]
precision_size = [1, 2, 4, 8, 16, 32, 64]

Then the precision_size of RISC-V vbool*_t will not be the multiple of the
type_size. This PATCH try to enrich this case when comparing the vn_reference.

Given we have the below code:
void test_vbool8_then_vbool16(int8_t * restrict in, int8_t * restrict out) {
vbool8_t v1 = *(vbool8_t*)in;
vbool16_t v2 = *(vbool16_t*)in;

*(vbool8_t*)(out + 100) = v1;
*(vbool16_t*)(out + 200) = v2;
}

Before this PATCH:
csrrt0,vlenb
sllit1,t0,1
csrra3,vlenb
sub sp,sp,t1
sllia4,a3,1
add a4,a4,sp
addia2,a1,100
vsetvli a5,zero,e8,m1,ta,ma
sub a3,a4,a3
vlm.v   v24,0(a0)
vsm.v   v24,0(a2)
vsm.v   v24,0(a3)
addia1,a1,200
csrrt0,vlenb
vsetvli a4,zero,e8,mf2,ta,ma
sllit1,t0,1
vlm.v   v24,0(a3)
vsm.v   v24,0(a1)
add sp,sp,t1
jr  ra

After this PATCH:
addia3,a1,100
vsetvli a4,zero,e8,m1,ta,ma
addia1,a1,200
vlm.v   v24,0(a0)
vsm.v   v24,0(a3)
vsetvli a5,zero,e8,mf2,ta,ma
vlm.v   v24,0(a0)
vsm.v   v24,0(a1)
ret

PR 109272

gcc/ChangeLog:

* tree-ssa-sccvn.cc (vn_reference_eq):

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr108185-4.c:
* gcc.target/riscv/rvv/base/pr108185-5.c:
* gcc.target/riscv/rvv/base/pr108185-6.c:
---
 .../gcc.target/riscv/rvv/base/pr108185-4.c  |  2 +-
 .../gcc.target/riscv/rvv/base/pr108185-5.c  |  2 +-
 .../gcc.target/riscv/rvv/base/pr108185-6.c  |  2 +-
 gcc/tree-ssa-sccvn.cc   | 13 +
 4 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
index ea3c360d756..e70284fada8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-4.c
@@ -65,4 +65,4 @@ test_vbool8_then_vbool64(int8_t * restrict in, int8_t * 
restrict out) {
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
-/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 15 
} } */
+/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
index 9fc659d2402..575a7842cdf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-5.c
@@ -65,4 +65,4 @@ test_vbool16_then_vbool64(int8_t * restrict in, int8_t * 
restrict out) {
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf4,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
-/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 14 
} } */
+/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c 
b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
index 98275e5267d..95a11d37016 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr108185-6.c
@@ -65,4 +65,4 @@ test_vbool32_then_vbool64(int8_t * restrict in, int8_t * 
restrict out) {
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf2,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times 
{vsetvli\s+[a-x][0-9]+,\s*zero,\s*e8,\s*mf8,\s*ta,\s*ma} 1 } } */
 /* { dg-final { scan-assembler-times {vlm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
-/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 13 
} } */
+/* { dg-final { scan-assembler-times {vsm\.v\s+v[0-9]+,\s*0\([a-x][0-9]+\)} 12 
} } */
diff --git a/gcc/tree-ssa-sccvn.cc b/gcc/tree-ssa-sccvn.cc
index 6b8d38b270c..c6dfa8fd9a3 100644
--- a/gcc/tree-ssa-sccvn.cc
+++ b/gcc/tree-ssa-sccvn.cc
@@ -799,6 +799,19 @@ vn_reference_eq (const_vn_reference_t const vr1, 
const_vn_reference_t const vr2)
   && (TYPE_PRECISION (vr2->type)
   != TREE_INT_CST_LOW (TYPE_SIZE (vr2->type
 return false;
+  else if (VECTOR_BOOLEAN_TYPE_P (vr1->type)
+  && VECTOR_BOOLEAN_TYPE_P (vr2->type)
+  && 

[PATCH] Generate vpblendd instead of vpblendw for V4SI under AVX2.

2023-03-29 Thread liuhongt via Gcc-patches
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}
Ok for GCC14 stage-1(or maybe trunk)?

gcc/ChangeLog:

* config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
vpblendd instead of vpblendw for V4SI under avx2.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr88828-0.c: Adjust testcase.
---
 gcc/config/i386/i386-expand.cc| 18 ++
 gcc/testsuite/gcc.target/i386/pr88828-0.c |  2 +-
 2 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index c1300dc4e26..1c436262ee5 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -19069,10 +19069,20 @@ expand_vec_perm_blend (struct expand_vec_perm_d *d)
   goto do_subreg;
 
 case E_V4SImode:
-  for (i = 0; i < 4; ++i)
-   mask |= (d->perm[i] >= 4 ? 3 : 0) << (i * 2);
-  vmode = V8HImode;
-  goto do_subreg;
+  if (TARGET_AVX2)
+   {
+ /* Use vpblendd instead of vpblendw.  */
+ for (i = 0; i < nelt; ++i)
+   mask |= ((unsigned HOST_WIDE_INT) (d->perm[i] >= nelt)) << i;
+ break;
+   }
+  else
+   {
+ for (i = 0; i < 4; ++i)
+   mask |= (d->perm[i] >= 4 ? 3 : 0) << (i * 2);
+ vmode = V8HImode;
+ goto do_subreg;
+   }
 
 case E_V16QImode:
   /* See if bytes move in pairs so we can use pblendw with
diff --git a/gcc/testsuite/gcc.target/i386/pr88828-0.c 
b/gcc/testsuite/gcc.target/i386/pr88828-0.c
index 3ddb2d13526..441c441b51d 100644
--- a/gcc/testsuite/gcc.target/i386/pr88828-0.c
+++ b/gcc/testsuite/gcc.target/i386/pr88828-0.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2 -msse4.2" } */
+/* { dg-options "-O2 -msse4.2 -mno-avx2" } */
 
 typedef int v4si __attribute__((vector_size(16)));
 typedef float v4sf __attribute__((vector_size(16)));
-- 
2.39.1.388.g2fc9e9ca3c



[PATCH v2] sched: Change no_real_insns_p to no_real_nondebug_insns_p [PR108273]

2023-03-29 Thread Kewen.Lin via Gcc-patches
Hi,

By addressing Alexander's comments, against v1 this
patch v2 mainly:

  - Rename no_real_insns_p to no_real_nondebug_insns_p;
  - Introduce enum rgn_bb_deps_free_action for three
kinds of actions to free deps;
  - Change function free_deps_for_bb_no_real_insns_p to
resolve_forw_deps which only focuses on forward deps;
  - Extend the handlings to cover dbg-cnt sched_block,
add one test case for it;
  - Move free_trg_info call in schedule_region to an
appropriate place.

One thing I'm not sure about is the change in function
sched_rgn_local_finish, currently the invocation to
sched_rgn_local_free is guarded with !sel_sched_p (),
so I just follow it, but the initialization of those
structures (in sched_rgn_local_init) isn't guarded
with !sel_sched_p (), it looks odd.



As PR108273 shows, when there is one block which only has
NOTE_P and LABEL_P insns at non-debug mode while has some
extra DEBUG_INSN_P insns at debug mode, after scheduling
it, the DFA states would be different between debug mode
and non-debug mode.  Since at non-debug mode, the block
meets no_real_insns_p, it gets skipped; while at debug
mode, it gets scheduled, even it only has NOTE_P, LABEL_P
and DEBUG_INSN_P, the call of function advance_one_cycle
will change the DFA state.  PR108519 also shows this issue
issue can be exposed by some scheduler changes.

This patch is to change function no_real_insns_p to
function no_real_nondebug_insns_p by taking debug insn into
account, which make us not try to schedule for the block
having only NOTE_P, LABEL_P and DEBUG_INSN_P insns,
resulting in consistent DFA states between non-debug and
debug mode.

Changing no_real_insns_p to no_real_nondebug_insns_p caused
ICE when doing free_block_dependencies, the root cause is
that we create dependencies for debug insns, those
dependencies are expected to be resolved during scheduling
insns, but which gets skipped after this change.
By checking the code, it looks it's reasonable to skip to
compute block dependences for no_real_nondebug_insns_p
blocks.  There is also another issue, which gets exposed
in SPEC2017 bmks build at option -O2 -g, is that we could
skip to schedule some block, which already gets dependency
graph built so has dependencies computed and rgn_n_insns
accumulated, then the later verification on if the graph
becomes exhausted by scheduling would fail as follow:

  /* Sanity check: verify that all region insns were
 scheduled.  */
gcc_assert (sched_rgn_n_insns == rgn_n_insns);

, and also some forward deps aren't resovled.

As Alexander pointed out, the current debug count handling
also suffers the similar issue, so this patch handles these
two cases together: one is for some block gets skipped by
!dbg_cnt (sched_block), the other is for some block which
is not no_real_nondebug_insns_p initially but becomes
no_real_nondebug_insns_p due to speculative scheduling.

This patch can be bootstrapped and regress-tested on
x86_64-redhat-linux, aarch64-linux-gnu and
powerpc64{,le}-linux-gnu.

I also verified this patch can pass SPEC2017 both intrate
and fprate bmks building at -g -O2/-O3.

Any thoughts?

BR,
Kewen

PR rtl-optimization/108273

gcc/ChangeLog:

* haifa-sched.cc (no_real_insns_p): Rename to ...
(no_real_nondebug_insns_p): ... this, and consider DEBUG_INSN_P insn.
* sched-ebb.cc (schedule_ebb): Replace no_real_insns_p with
no_real_nondebug_insns_p.
* sched-int.h (no_real_insns_p): Rename to ...
(no_real_nondebug_insns_p): ... this.
* sched-rgn.cc (enum rgn_bb_deps_free_action): New enum.
(bb_deps_free_actions): New static variable.
(compute_block_dependences): Skip for no_real_nondebug_insns_p.
(resolve_forw_deps): New function.
(free_block_dependencies): Check bb_deps_free_actions and call
function resolve_forw_deps for RGN_BB_DEPS_FREE_ARTICIAL.
(compute_priorities): Replace no_real_insns_p with
no_real_nondebug_insns_p.
(schedule_region): Replace no_real_insns_p with
no_real_nondebug_insns_p, set RGN_BB_DEPS_FREE_ARTICIAL if the block
get dependencies computed before but skipped now, fix up count
sched_rgn_n_insns for it too.  Call free_trg_info when the block
gets scheduled, and move sched_rgn_local_finish after the loop
of free_block_dependencies loop.
(sched_rgn_local_init): Allocate and compute bb_deps_free_actions.
(sched_rgn_local_finish): Free bb_deps_free_actions.
* sel-sched.cc (sel_region_target_finish): Replace no_real_insns_p with
no_real_nondebug_insns_p.

gcc/testsuite/ChangeLog:

* gcc.target/powerpc/pr108273.c: New test.
---
 gcc/haifa-sched.cc  |   9 +-
 gcc/sched-ebb.cc|   2 +-
 gcc/sched-int.h |   2 +-
 gcc/sched-rgn.cc| 148 +++-
 gcc/sel-sched.cc

[PATCH] tree-optimization/109154 - improve if-conversion for vectorization

2023-03-29 Thread Richard Biener via Gcc-patches
With multi-argument PHIs and now doing VN on the if-converted blocks
the optimization of CSEing condition and negated condition doesn't
work well anymore.  The following restores this a little bit for
the case of a single inverted condition into a COND_EXPR where
we can instead swap the COND_EXPR arms.  The same optimization
is already done for the case of two-argument PHIs.

This avoids one comparison/mask for the testcase at hand.

Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.

PR tree-optimization/109154
* tree-if-conv.cc (gen_phi_arg_condition): Handle single
inverted condition specially by inverting at the caller.
(gen_phi_arg_condition): Swap COND_EXPR arms if requested.
---
 gcc/tree-if-conv.cc | 24 +++-
 1 file changed, 19 insertions(+), 5 deletions(-)

diff --git a/gcc/tree-if-conv.cc b/gcc/tree-if-conv.cc
index ca1abd8656c..3494dccfe62 100644
--- a/gcc/tree-if-conv.cc
+++ b/gcc/tree-if-conv.cc
@@ -1873,11 +1873,12 @@ convert_scalar_cond_reduction (gimple *reduc, 
gimple_stmt_iterator *gsi,
   return rhs;
 }
 
-/* Produce condition for all occurrences of ARG in PHI node.  */
+/* Produce condition for all occurrences of ARG in PHI node.  Set *INVERT
+   as to whether the condition is inverted.  */
 
 static tree
 gen_phi_arg_condition (gphi *phi, vec *occur,
-  gimple_stmt_iterator *gsi)
+  gimple_stmt_iterator *gsi, bool *invert)
 {
   int len;
   int i;
@@ -1885,6 +1886,7 @@ gen_phi_arg_condition (gphi *phi, vec *occur,
   tree c;
   edge e;
 
+  *invert = false;
   len = occur->length ();
   gcc_assert (len > 0);
   for (i = 0; i < len; i++)
@@ -1896,6 +1898,13 @@ gen_phi_arg_condition (gphi *phi, vec *occur,
  cond = c;
  break;
}
+  /* If we have just a single inverted predicate, signal that and
+instead invert the COND_EXPR arms.  */
+  if (len == 1 && TREE_CODE (c) == TRUTH_NOT_EXPR)
+   {
+ c = TREE_OPERAND (c, 0);
+ *invert = true;
+   }
   c = force_gimple_operand_gsi (gsi, unshare_expr (c),
true, NULL_TREE, true, GSI_SAME_STMT);
   if (cond != NULL_TREE)
@@ -2116,9 +2125,14 @@ predicate_scalar_phi (gphi *phi, gimple_stmt_iterator 
*gsi)
lhs = make_temp_ssa_name (type, NULL, "_ifc_");
  else
lhs = res;
- cond = gen_phi_arg_condition (phi, indexes, gsi);
- rhs = fold_build_cond_expr (type, unshare_expr (cond),
- arg0, arg1);
+ bool invert;
+ cond = gen_phi_arg_condition (phi, indexes, gsi, );
+ if (invert)
+   rhs = fold_build_cond_expr (type, unshare_expr (cond),
+   arg1, arg0);
+ else
+   rhs = fold_build_cond_expr (type, unshare_expr (cond),
+   arg0, arg1);
  new_stmt = gimple_build_assign (lhs, rhs);
  gsi_insert_before (gsi, new_stmt, GSI_SAME_STMT);
  update_stmt (new_stmt);
-- 
2.35.3