date:20230526

On Fri, 26 May 2023, Martin Uecker via Gcc-patches wrote:

> c: -Wstringop-overflow for parameters with forward-declared sizes
> 
> Warnings from -Wstringop-overflow do not appear for parameters declared
> as VLAs when the bound refers to a parameter forward declaration. This
> is fixed by splitting the loop that passes through parameters into two,
> first only recording the positions of all possible size expressions
> and then processing the parameters.
> 
> PR c/109970
> 
> gcc/c-family:
> 
> * c-attribs.cc (build_attr_access_from_parms): Split loop to first
> record all parameters.
> 
> gcc/testsuite:
> 
> * gcc.dg/pr109970.c: New test.
> 

OK.

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: [V8][PATCH 2/2] Update documentation to clarify a GCC extension [PR77650]

On Fri, 26 May 2023, Qing Zhao via Gcc-patches wrote:

> Another question:   is it better for me to rearrange the Patch 1/2 and Patch 
> 2/2 a little bit, 
> to put the FE , doc change and corresponding testing case together into one 
> patch, (you have approved the FE part of change in Patch 1/2).
> and then the mid-end change to tree-ojbect-size.cc and the corresponding 
> testing cases to another patch?

I don't really see this patch as needing to be split up into multiple 
parts at all.

-- 
Joseph S. Myers
jos...@codesourcery.com

[PATCH] PR target/107172: Avoid "unusual" MODE_CC comparisons in simplify-rtx.cc

2023-05-26 Thread Roger Sayle


I believe that a better (or supplementary) fix to PR target/107172 is to
avoid
producing incorrect (but valid) RTL in simplify_const_relational_operation
when
presented with questionable (obviously invalid) expressions, such as those
produced during combine.  Just as with the "first do no harm" clause with
the
Hippocratic Oath, simplify-rtx (probably) shouldn't unintentionally
transform
invalid RTL expressions, into incorrect (non-equivalent) but valid RTL that
may be inappropriately recognized by recog.

In this specific case, many GCC backends represent their flags register via
MODE_CC, whose representation is intentionally "opaque" to the middle-end.
The only use of MODE_CC comprehensible to the middle-end's RTL optimizers
is relational comparisons between the result of a COMPARE rtx (op0) and zero
(op1).  Any other uses of MODE_CC should be left alone, and some might argue
indicate representational issues in the backend.

In practice, CPUs occasionally have numerous instructions that affect the
flags register(s) other than comparisons [AVR's setc, powerpc's mtcrf,
x86's clc, stc and cmc and x86_64's ptest that sets C and Z flags in
non-obvious ways, c.f. PR target/109973].  Currently care has to be taken,
wrapping these in UNSPEC, to avoid combine inappropriately merging flags
setters with flags consumers (such as conditional jumps).  It's safer to
teach simplify_const_relational_operation not to modify expressions that
it doesn't understand/recognize.

This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
and make -k check, both with and without --target_board=unix{-m32}
with no new failures.  Ok for mainline?


2023-05-26  Roger Sayle  

gcc/ChangeLog
* simplify-rtx.cc (simplify_const_relational_operation): Return
early
if we have a MODE_CC comparison that isn't a COMPARE against
const0_rtx.


Thanks in advance,
Roger
--

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index d4aeebc..d6444b4 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -6120,6 +6120,12 @@ simplify_const_relational_operation (enum rtx_code code,
  || (GET_MODE (op0) == VOIDmode
  && GET_MODE (op1) == VOIDmode));
 
+  /* We only handle MODE_CC comparisons that are COMPARE against zero.  */
+  if (GET_MODE_CLASS (mode) == MODE_CC
+  && (op1 != const0_rtx
+ || GET_CODE (op0) != COMPARE))
+return NULL_RTX;
+
   /* If op0 is a compare, extract the comparison arguments from it.  */
   if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
 {

[C PATCH] -Wstringop-overflow for parameters with forward-declared sizes

2023-05-26 Thread Martin Uecker via Gcc-patches



This is a minor change so that parameter that have
forward declarations for with -Wstringop-overflow.


Bootstrapped and regression tested on x86_64. 



c: -Wstringop-overflow for parameters with forward-declared sizes

Warnings from -Wstringop-overflow do not appear for parameters declared
as VLAs when the bound refers to a parameter forward declaration. This
is fixed by splitting the loop that passes through parameters into two,
first only recording the positions of all possible size expressions
and then processing the parameters.

PR c/109970

gcc/c-family:

* c-attribs.cc (build_attr_access_from_parms): Split loop to first
record all parameters.

gcc/testsuite:

* gcc.dg/pr109970.c: New test.

diff --git a/gcc/c-family/c-attribs.cc b/gcc/c-family/c-attribs.cc
index 072cfb69147..e2792ca6898 100644
--- a/gcc/c-family/c-attribs.cc
+++ b/gcc/c-family/c-attribs.cc
@@ -5278,6 +5278,15 @@ build_attr_access_from_parms (tree parms, bool 
skip_voidptr)
   tree argtype = TREE_TYPE (arg);
   if (DECL_NAME (arg) && INTEGRAL_TYPE_P (argtype))
arg2pos.put (arg, argpos);
+}
+
+  argpos = 0;
+  for (tree arg = parms; arg; arg = TREE_CHAIN (arg), ++argpos)
+{
+  if (!DECL_P (arg))
+   continue;
+
+  tree argtype = TREE_TYPE (arg);
 
   tree argspec = DECL_ATTRIBUTES (arg);
   if (!argspec)
diff --git a/gcc/testsuite/gcc.dg/pr109970.c b/gcc/testsuite/gcc.dg/pr109970.c
new file mode 100644
index 000..d234e10455f
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr109970.c
@@ -0,0 +1,15 @@
+/* PR109970
+ * { dg-do compile }
+ * { dg-options "-Wstringop-overflow" }
+ * */
+
+void bar(int x, char buf[x]);
+void foo(int x; char buf[x], int x);
+
+int main()
+{
+   char buf[10];
+   bar(11, buf);   /* { dg-warning "accessing 11 bytes in a region of size 
10" } */
+   foo(buf, 11);   /* { dg-warning "accessing 11 bytes in a region of size 
10" } */
+}
+

Re: [V1][PATCH 1/3] Provide element_count attribute to flexible array member field (PR108896)

2023-05-26 Thread Qing Zhao via Gcc-patches




> On May 26, 2023, at 2:15 PM, Joseph Myers  wrote:
> 
> On Fri, 26 May 2023, Qing Zhao via Gcc-patches wrote:
> 
>>> What if the string is a wide string?  I don't expect that to work (either 
>>> as a matter of interface design, or in the present code), but I think that 
>>> case should have a specific check and error.
>> 
>> Dump question: how to check whether the string is a wide string? -:)
> 
> By examining the element type; the only valid case for the attribute would 
> be an element type of (const) char.  (I think it's reasonable to reject 
> all of char8_t, char16_t, char32_t, wchar_t strings in this context.)

Okay, will study a little bit and do this.
Thanks

Qing
> 
> -- 
> Joseph S. Myers
> jos...@codesourcery.com

Re: [V8][PATCH 2/2] Update documentation to clarify a GCC extension [PR77650]

2023-05-26 Thread Qing Zhao via Gcc-patches

Thank you for the suggestion.


> On May 26, 2023, at 1:59 PM, Joseph Myers  wrote:
> 
> On Thu, 25 May 2023, Qing Zhao via Gcc-patches wrote:
> 
>>> On May 25, 2023, at 4:51 PM, Joseph Myers  wrote:
>>> 
>>> The documentation in this case is OK, though claims about how a future 
>>> version will behave have a poor track record (we tend to end up with such 
>>> claims persisting in the documentation even though the change in question 
>>> didn't get made and might sometimes no longer be considered desirable).
>> Then, do you have any suggestions on this claim? Shall we delete it from 
>> the doc? Or keep it?
> 
> My suggestion would be just to say the feature is deprecated without 
> saying what a future version will do - 

I will modify the doc as:

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 17ef80e75cc..e8a8be93ff1 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -1792,8 +1792,8 @@ consistently.  Any code relying on this case should be 
modified to ensure
 that flexible array members only end up at the ends of structures.
 
 Please use the warning option @option{-Wflex-array-member-not-at-end} to
-identify all such cases in the source code and modify them.  This warning
-will be on by default starting from GCC 15.
+identify all such cases in the source code and modify them.  This extension
+is now deprecated.
 @end itemize
 
Let me know if you have see any issue with the above.


> also make sure to say it's 
> deprecated in the GCC 14 release notes, and then if GCC 15 starts to warn, 
> put something in the GCC 15 release notes as well.

Okay, will add this to my todo list.

Another question:   is it better for me to rearrange the Patch 1/2 and Patch 
2/2 a little bit, 
to put the FE , doc change and corresponding testing case together into one 
patch, (you have approved the FE part of change in Patch 1/2).
and then the mid-end change to tree-ojbect-size.cc and the corresponding 
testing cases to another patch?


Thank you!

Qing
> 
> -- 
> Joseph S. Myers
> jos...@codesourcery.com

[committed][Patch] Fortran/OpenMP: Add parsing support for allocators/allocate directives

2023-05-26 Thread Tobias Burnus


I have now re-diffed the patch and cleaned up some comments, and spend
some time proof reading it myself. And have now committed it as
r14-1301-gd64e8e1224708e7f5b87c531aeb26f1ed07f91ff

As the subject line states, it adds parsing support for "!$omp allocate"
as declarative directive and (if preceded by an executable
statement/directive) as deprecated alias for '!$omp allocators', which
is also supported. — After successful checking, it fails with the usual
"sorry, not yet implemented".

Like always, comments and suggestions are welcome.

Tobias

PS: The real challenge will be to get 'allocators' working as gfortran
currently calls malloc/free/realloc directly and this will not work well
if memory is allocated differently, e.g., by omp_alloc and friends. But
that's a separate issue, unrelated this parsing + error-diagnostic patch.

Probably simpler, especially for stack variables, would be the support
for the declarative 'allocate' directive (in C/C++/Fortran. Except for
some C++ template-handling polishing, the parsing support is there, but
middle-end wiring is still required.)

PPS: I filed a PR regarding the handling of 'structure elements' with
allocators, https://gcc.gnu.org/PR109998

PPPS: I remarked before:

On 21.12.22 16:51, Tobias Burnus wrote:

On 14.12.22 11:47, Tobias Burnus wrote:


This patch adds parsing/argument-checking support for
  '!$omp allocators allocate([align(int),allocator(a) :] list)'


This follow-up patch additionally adds parsing support for both
declarative and allocate-stmt-associated '!$omp allocate' directives –
and replaces my previous patch.

OK for mainline?

 * * *

The code requires in line with OpenMP 5.1 that an executable statement
comes before an '!$omp allocate' that is associated with a Fortran
ALLOCATE stmt, which is diagnosed.

Note: There is a spec change/regression related to permitting structure
elements; while OpenMP 5.0/5.1 did permit them in the
allocate-stmt-associated "!$omp allocate", OpenMP 5.2 stopped doing –
and '!$omp allocators' never permitted it. — For allocate that's seems
to be the accidental result from "permitted unless stated otherwise" to
"rejected unless stated otherwise". For 'allocators', it is the result
of the original 'allocate' clause which should have been extended for
'allocators' - or should not.

In any case, that's tracked now in OpenMP's spec issue #3437.

Thoughts? – The code rejects var%comp and var(1)%comp etc. for now –
besides the unclear spec status, I admittedly did this also to make
checking easier (like for duplicated entries, entry same as in ALLOCATE
except for tailing array spec etc.).

 * * *

This patch replaced both my previous patch in this thread and also
Abid's patch


"[PATCH 1/5] [gfortran] Add parsing support for allocate directive
(OpenMP 5.0)."
https://gcc.gnu.org/pipermail/gcc-patches/2022-October/603258.html


In his patch set, later patches actually add allocater support for
allocatables/pointers, only – but there issues with regards to the used
allocator (see patches + patch review).

As my attached patch raises a sorry, it neither addresses that issue nor
is it affected by that issue.

-
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 
München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas 
Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht 
München, HRB 106955
commit d64e8e1224708e7f5b87c531aeb26f1ed07f91ff
Author: Tobias Burnus 
Date:   Fri May 26 20:39:33 2023 +0200

Fortran/OpenMP: Add parsing support for allocators/allocate directives

gcc/fortran/ChangeLog:

* dump-parse-tree.cc (show_omp_namelist): Update allocator, fix
align dump.
(show_omp_node, show_code_node): Handle EXEC_OMP_ALLOCATE.
* gfortran.h (enum gfc_statement): Add ST_OMP_ALLOCATE and ..._EXEC.
(enum gfc_exec_op): Add EXEC_OMP_ALLOCATE.
(struct gfc_omp_namelist): Add 'allocator' to 'u2' union.
(struct gfc_namespace): Add omp_allocate.
(gfc_resolve_omp_allocate): New.
* match.cc (gfc_free_omp_namelist): Free 'u2.allocator'.
* match.h (gfc_match_omp_allocate, gfc_match_omp_allocators): New.
* openmp.cc (gfc_omp_directives): Uncomment allocate/allocators.
(gfc_match_omp_variable_list): Add bool arg for
rejecting listening common-block vars separately.
(gfc_match_omp_clauses): Update for u2.allocators.
(OMP_ALLOCATORS_CLAUSES, gfc_match_omp_allocate,
gfc_match_omp_allocators, is_predefined_allocator,
gfc_resolve_omp_allocate): New.
(resolve_omp_clauses): Update 'allocate' clause checks.
(omp_code_to_statement, gfc_resolve_omp_directive): Handle
OMP ALLOCATE/ALLOCATORS.
* parse.cc (in_exec_part): New global var.
(check_omp_allocate_stmt, parse_openmp_allocate_block): New.

Re: [PATCH v2] i386: Allow -mlarge-data-threshold with -mcmodel=large

2023-05-26 Thread Fangrui Song via Gcc-patches

On Fri, May 26, 2023 at 12:11 AM Jan Beulich  wrote:
>
> On 25.05.2023 18:11, Fangrui Song wrote:
> > On 2023-05-25, Jan Beulich wrote:
> >> On 25.05.2023 17:16, Fangrui Song wrote:
> >>> --- a/gcc/doc/invoke.texi
> >>> +++ b/gcc/doc/invoke.texi
> >>> @@ -32942,9 +32942,10 @@ the cache line size.  @samp{compat} is the 
> >>> default.
> >>>
> >>>  @opindex mlarge-data-threshold
> >>>  @item -mlarge-data-threshold=@var{threshold}
> >>> -When @option{-mcmodel=medium} is specified, data objects larger than
> >>> -@var{threshold} are placed in the large data section.  This value must 
> >>> be the
> >>> -same across all objects linked into the binary, and defaults to 65535.
> >>> +When @option{-mcmodel=medium} or @option{-mcmodel=large} is specified, 
> >>> data
> >>> +objects larger than @var{threshold} are placed in large data sections.  
> >>> This
> >>> +value must be the same across all objects linked into the binary, and 
> >>> defaults
> >>> +to 65535.
> >>
> >> Where's the "must be the same" requirement coming from?
> >
> > It's an existing requirement.  I think it may be related to discouraging
> > different COMDAT sections names due to different -mlarge-data-threshold=.
> > I don't think it makes sense but did not feel strongly dropping it.
> >
> > Happy to drop the requirement if I revise this patch.
>
> I understand that this isn't something you introduce, but it still stuck
> me as odd. Therefore I thought I'd suggest to take the opportunity to at
> least soften the language, unless of course there's a real reason behind
> it.

Dropping "This value must be the same across all objects linked into
the binary" looks good to me.

> >> As to the default - to remain compatible with earlier versions, shouldn't
> >> large model code default to "infinity"?
> >>
> >> Jan
> >
> > I have thought about this compatibility need and feel that it is very
> > unlikly to be needed.  GNU ld has supported large data sections since
> > 2005
> > (https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=3b22753a67cf616514de804ef6d5ed5e90a7d883).
> > Users' programs with the internal linker scripts will still be working
> > and -fdata-sections sections will be combined.
>
> Well, the concern clearly is about custom scripts. Imo ...
>
> > First, -mcmodel=large use cases are rare enough.  Rare perhaps
> > -mcmodel=largel was considered theoretic excercise  in
> > trying to reach feature completion
> > (https://groups.google.com/g/x86-64-abi/c/jnQdJeabxiU/m/NNuA0P7pAQAJ),
> > without this patch -mcmodel=large object files don't interract well with
> > existing -mcmodel=small object files.
>
> ... the more exotic a project, the more likely it is that they're using
> custom scripts.
>
> > Moreover, if a user expects a specific section prefix with
> > -mcmodel=large, that's a brittle assumption. I think it's fair to say
> > that the fault is on the user side and GCC doesn't need to work around
> > their issues.
>
> I guess I don't really see what you base this on. Without any special
> options, expecting data to end up in .data/.bss/.rodata (and variants
> thereof) looks like quite reasonable an assumption to me.
>
> Jan

Making -mlarge-data-threshold= default value for
-mcmodel={medium,large} seems quite odd to me.

The default value is 65536, which is larger than most data objects
that we may encounter in practice.
I want to investigate how often users use -mcmodel=large but it is
quite difficult. Many are for AIX and/or powerpc.
I have tried to be considerate but I am not sure we have users in the
intersection of the three sets: -mcmodel=large, data objects larger
than 65536, using linker script in a way that orphan sections .ldata
will cause trouble.


-- 
宋方睿

[PATCH] Replace a HWI_COMPUTABLE_MODE_P with wide-int in simplify-rtx.cc.

2023-05-26 Thread Roger Sayle


This patch enhances one of the optimizations in simplify_binary_operation_1
to allow it to simplify RTL expressions in modes than HOST_WIDE_INT by
replacing a use of HWI_COMPUTABLE_MODE_P and UINTVAL with wide_int.

The motivating example is a pending x86_64 backend patch that produces
the following RTL in combine:

(and:TI (zero_extend:TI (reg:DI 89))
(const_wide_int 0x0))

where the AND is redundant, as the mask, ~0LL, is DImode's MODE_MASK.
There's already an optimization that catches this for narrower modes,
transforming (and:HI (zero_extend:HI (reg:QI x)) (const_int 0xff))
into (zero_extend:HI (reg:QI x)), but this currently only handles
CONST_INT not CONST_WIDE_INT.  Fixed by upgrading this transformation
to use wide_int, specifically rtx_mode_t and wi::mask.

This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
and make -k check, both with and without --target_board=unix{-m32}
with no new failures.  Ok for mainline?


2023-05-23  Roger Sayle  

gcc/ChangeLog
* simplify-rtx.cc (simplify_binary_operation_1) : Use wide-int
instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
(and (extend X) C) as (zero_extend (and X C)), to also optimize
modes wider than HOST_WIDE_INT.


Thanks in advance,
Roger
--

diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index d4aeebc..8dc880b 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -3826,15 +3826,16 @@ simplify_context::simplify_binary_operation_1 (rtx_code 
code,
 there are no nonzero bits of C outside of X's mode.  */
   if ((GET_CODE (op0) == SIGN_EXTEND
   || GET_CODE (op0) == ZERO_EXTEND)
- && CONST_INT_P (trueop1)
- && HWI_COMPUTABLE_MODE_P (mode)
- && (~GET_MODE_MASK (GET_MODE (XEXP (op0, 0)))
- & UINTVAL (trueop1)) == 0)
+ && CONST_SCALAR_INT_P (trueop1)
+ && is_a  (mode, _mode)
+ && is_a  (GET_MODE (XEXP (op0, 0)), _mode)
+ && (wi::mask (GET_MODE_PRECISION (inner_mode), true,
+   GET_MODE_PRECISION (int_mode))
+ & rtx_mode_t (trueop1, mode)) == 0)
{
  machine_mode imode = GET_MODE (XEXP (op0, 0));
- tem = simplify_gen_binary (AND, imode, XEXP (op0, 0),
-gen_int_mode (INTVAL (trueop1),
-  imode));
+ tem = immed_wide_int_const (rtx_mode_t (trueop1, mode), imode);
+ tem = simplify_gen_binary (AND, imode, XEXP (op0, 0), tem);
  return simplify_gen_unary (ZERO_EXTEND, mode, tem, imode);
}

Re: [V1][PATCH 1/3] Provide element_count attribute to flexible array member field (PR108896)

On Fri, 26 May 2023, Qing Zhao via Gcc-patches wrote:

> > What if the string is a wide string?  I don't expect that to work (either 
> > as a matter of interface design, or in the present code), but I think that 
> > case should have a specific check and error.
> 
> Dump question: how to check whether the string is a wide string? -:)

By examining the element type; the only valid case for the attribute would 
be an element type of (const) char.  (I think it's reasonable to reject 
all of char8_t, char16_t, char32_t, wchar_t strings in this context.)

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: [V8][PATCH 2/2] Update documentation to clarify a GCC extension [PR77650]

On Thu, 25 May 2023, Qing Zhao via Gcc-patches wrote:

> > On May 25, 2023, at 4:51 PM, Joseph Myers  wrote:
> > 
> > The documentation in this case is OK, though claims about how a future 
> > version will behave have a poor track record (we tend to end up with such 
> > claims persisting in the documentation even though the change in question 
> > didn't get made and might sometimes no longer be considered desirable).
> Then, do you have any suggestions on this claim? Shall we delete it from 
> the doc? Or keep it?

My suggestion would be just to say the feature is deprecated without 
saying what a future version will do - also make sure to say it's 
deprecated in the GCC 14 release notes, and then if GCC 15 starts to warn, 
put something in the GCC 15 release notes as well.

-- 
Joseph S. Myers
jos...@codesourcery.com

Re: [PATCH] RISC-V: Add autovec sign/zero extension and truncation.

2023-05-26 Thread Jeff Law via Gcc-patches





On 5/25/23 03:03, Robin Dapp wrote:

Hi,

this patch implements the autovec expanders for sign and zero extension
patterns as well as the accompanying truncations.  In order to use them
additional mode_attr iterators as well as vectorizer hooks are required.
Using these hooks we can e.g. vectorize with VNx4QImode as base mode
and extend VNx4SI to VNx4DI.  They are still going to be expanded in the
future.

vf4 and vf8 truncations are emulated by truncating two and three times
respectively.

The patch also adds tests and changes some expectations for already
existing ones.

Combine does not yet handle binary operations of two widened operands
as we are missing the necessary split/rewrite patterns.  These will be
added at a later time.

Co-authored-by: Juzhe Zhong 

riscv.exp testsuite is unchanged.  zero-scratch-regs-3.c seems
to FAIL in vcondu but that already happens on trunk.
Yea, I bisected the zero-scratch-regs-3 failure and passed it off to 
Juzhe last night.  It's already been fixed on the trunk.




Regards
  Robin

gcc/ChangeLog:

* config/riscv/autovec.md (2): New
expander.
(2): Dito.
(2): Dito.
(trunc2): Dito.
(trunc2): Dito.
(trunc2): Dito.
* config/riscv/riscv-protos.h (riscv_v_ext_mode_p): Declare.
(vectorize_related_mode): Define.
(autovectorize_vector_modes): Define.
* config/riscv/riscv-v.cc (vectorize_related_mode): Implement
hook.
(autovectorize_vector_modes): Implement hook.
* config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): Export.
(riscv_autovectorize_vector_modes): Implement target hook.
(riscv_vectorize_related_mode): Implement target hook.
(TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
(TARGET_VECTORIZE_RELATED_MODE): Define.
* config/riscv/vector-iterators.md: Add lowercase versions of
mode_attr iterators.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/binop/shift-rv32gcv.c: Adjust
expectation.
* gcc.target/riscv/rvv/autovec/binop/shift-rv64gcv.c: Dito.
* gcc.target/riscv/rvv/autovec/binop/vdiv-run.c: Dito.
* gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv.c: Dito.
* gcc.target/riscv/rvv/autovec/binop/vdiv-rv64gcv.c: Dito.
* gcc.target/riscv/rvv/autovec/binop/vdiv-template.h: Dito.
* gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c: Dito.
* gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c: Dito.
* gcc.target/riscv/rvv/autovec/zve32f_zvl128b-2.c: Dito.
* gcc.target/riscv/rvv/autovec/zve32x_zvl128b-2.c: Dito.
* gcc.target/riscv/rvv/autovec/zve64d-2.c: Dito.
* gcc.target/riscv/rvv/autovec/zve64f-2.c: Dito.
* gcc.target/riscv/rvv/autovec/zve64x-2.c: Dito.
* gcc.target/riscv/rvv/rvv.exp: Add new conversion tests.
* gcc.target/riscv/rvv/vsetvl/avl_single-38.c: Do not vectorize.
* gcc.target/riscv/rvv/vsetvl/avl_single-47.c: Dito.
* gcc.target/riscv/rvv/vsetvl/avl_single-48.c: Dito.
* gcc.target/riscv/rvv/vsetvl/avl_single-49.c: Dito.
* gcc.target/riscv/rvv/vsetvl/imm_switch-8.c: Dito.
* gcc.target/riscv/rvv/autovec/conversions/vncvt-run.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vncvt-rv32gcv.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vncvt-rv64gcv.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vncvt-template.h: New test.
* gcc.target/riscv/rvv/autovec/conversions/vsext-run.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vsext-rv32gcv.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vsext-rv64gcv.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vsext-template.h: New test.
* gcc.target/riscv/rvv/autovec/conversions/vzext-run.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vzext-rv32gcv.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vzext-rv64gcv.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vzext-template.h: New test.
---







+/* If the given VECTOR_MODE is an RVV mode,  first get the largest number
+   of units that fit into a full vector at the given ELEMENT_MODE.
+   We will have the vectorizer call us with a successively decreasing
+   number of units (as specified in autovectorize_vector_modes).
+   The starting mode is always the one specified by preferred_simd_mode. */
+opt_machine_mode
+vectorize_related_mode (machine_mode vector_mode, scalar_mode element_mode,
+   poly_uint64 nunits)
+{
+  /* TODO: We will support RVV VLS auto-vectorization mode in the future. */
+  poly_uint64 min_units;
+  if (riscv_v_ext_mode_p (vector_mode)
I think Juzhe already noted this needs to change.  That may mean the 
code to expose riscv_v_ext_mode_p can be dropped.


OK for the trunk with that change.

jeff

Re: [PATCH v2] RISC-V: Implement autovec abs, vneg, vnot.

2023-05-26 Thread Jeff Law via Gcc-patches





On 5/25/23 08:43, Robin Dapp wrote:

Beside, V2 patch should change this:
emit_vlmax_masked_insn (unsigned icode, int op_num, rtx *ops)

change it into emit_vlmax_masked_mu_insn .


V3 is inline with these changes.

This patch implements abs2, vneg2 and vnot2 expanders
for integer vector registers and adds tests for them.

gcc/ChangeLog:

* config/riscv/autovec.md (2): Add vneg/vnot.
(abs2): Add.
* config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
Declare.
* config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
function.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/rvv.exp: Add unop tests.
* gcc.target/riscv/rvv/autovec/unop/abs-run.c: New test.
* gcc.target/riscv/rvv/autovec/unop/abs-rv32gcv.c: New test.
* gcc.target/riscv/rvv/autovec/unop/abs-rv64gcv.c: New test.
* gcc.target/riscv/rvv/autovec/unop/abs-template.h: New test.
* gcc.target/riscv/rvv/autovec/unop/vneg-run.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vneg-rv32gcv.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vneg-rv64gcv.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vneg-template.h: New test.
* gcc.target/riscv/rvv/autovec/unop/vnot-run.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vnot-rv32gcv.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vnot-rv64gcv.c: New test.
* gcc.target/riscv/rvv/autovec/unop/vnot-template.h: New test.

OK for the trunk.  BUt one comment inline...




+
+;; 
---
+;; - ABS expansion to vmslt and vneg
+;; 
---
+
+(define_expand "abs2"
+  [(set (match_operand:VI 0 "register_operand")
+(match_operand:VI 1 "register_operand"))]
+  "TARGET_VECTOR"
+{
+  rtx zero = gen_const_vec_duplicate (mode, GEN_INT (0));
+  machine_mode mask_mode = riscv_vector::get_mask_mode (mode).require ();
+  rtx mask = gen_reg_rtx (mask_mode);
+  riscv_vector::expand_vec_cmp (mask, LT, operands[1], zero);
+
+  rtx ops[] = {operands[0], mask, operands[1], operands[1]};
+  riscv_vector::emit_vlmax_masked_mu_insn (code_for_pred (NEG, mode),
+  riscv_vector::RVV_UNOP_MU, ops);
+  DONE;
+})
So I'm a bit surprised we needed this.  Presumably we needed to expose 
the vector abs because the vectorizer doesn't have any code to 
synthesize abs from other primitives?


WRT the actual synthesis...  It looks like you're building a mask based 
on which elements are < 0 then doing a masked negation to flip them. 
Would this synthesis be better:


  t = -x;
  res = max (x, t);

That's the preferred synthesis at the gimple->rtl border for scalars.

Anyway, if we think that's a better synthesis, we can adjust as a 
follow-up patch.


So again, OK for the trunk.

jeff

Re: [PATCH] Convert ipcp_vr_lattice to type agnostic framework.

2023-05-26 Thread Martin Jambor

Hello,

On Mon, May 22 2023, Aldy Hernandez wrote:
> I've adjusted the patch with some minor cleanups that came up when I
> implemented the rest of the IPA revamp.
>
> Rested.  OK?
>
> On Wed, May 17, 2023 at 4:31 PM Aldy Hernandez  wrote:
>>
>> This converts the lattice to store ranges in Value_Range instead of
>> value_range (*) to make it type agnostic, and adjust all users
>> accordingly.
>>
>> I think it is a good example on converting from static ranges to more
>> general, type agnostic ones.
>>
>> I've been careful to make sure Value_Range never ends up on GC, since
>> it contains an int_range_max and can expand on-demand onto the heap.
>> Longer term storage for ranges should be done with vrange_storage, as
>> per the previous patch ("Provide an API for ipa_vr").
>>
>> (*) I do know the Value_Range naming versus value_range is quite
>> annoying, but it was a judgement call last release for the eventual
>> migration to having "value_range" be a type agnostic range object.  We
>> will ultimately rename Value_Range to value_range.

It is quite confusing for an unsuspecting reader indeed.

>>
>> OK for trunk?

I guess I need to rely on that you know what you are doing :-)
I have seen in other messages that you measure the compile time
effects of your patches, do you look at memory use as well?

I am happy with the overall approach, I just have the following
comments, questions and a few concerns:


>>
>> gcc/ChangeLog:
>>
>> * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
>> (ipcp_vr_lattice::print): Call dump method.
>> (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
>> Value_Range.
>> (ipcp_vr_lattice::meet_with_1): Make argument a reference.
>> (ipcp_vr_lattice::set_to_bottom): Add type argument.
>> (set_all_contains_variable): Same.
>> (initialize_node_lattices): Pass type when appropriate.
>> (ipa_vr_operation_and_type_effects): Make type agnostic.
>> (ipa_value_range_from_jfunc): Same.
>> (propagate_vr_across_jump_function): Same.
>> (propagate_constants_across_call): Same.
>> * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
>> (evaluate_properties_for_edge): Same.
>> * ipa-prop.cc (ipcp_update_vr): Same.
>> * ipa-prop.h (ipa_value_range_from_jfunc): Same.
>> (ipa_range_set_and_normalize): Same.
>> ---
>>  gcc/ipa-cp.cc| 159 +++
>>  gcc/ipa-fnsummary.cc |  16 ++---
>>  gcc/ipa-prop.cc  |   2 +-
>>  gcc/ipa-prop.h   |  19 ++
>>  4 files changed, 101 insertions(+), 95 deletions(-)
>>
>> diff --git a/gcc/ipa-cp.cc b/gcc/ipa-cp.cc
>> index d4b9d4ac27e..bd5b1da17b2 100644
>> --- a/gcc/ipa-cp.cc
>> +++ b/gcc/ipa-cp.cc
>> @@ -343,20 +343,29 @@ private:
>>  class ipcp_vr_lattice
>>  {
>>  public:
>> -  value_range m_vr;
>> +  Value_Range m_vr;
>>
>>inline bool bottom_p () const;
>>inline bool top_p () const;
>> -  inline bool set_to_bottom ();
>> -  bool meet_with (const value_range *p_vr);
>> +  inline bool set_to_bottom (tree type);

Requiring a type when setting a lattice to bottom makes for a weird
interface, can't we set the underlying Value_Range to whatever...

>> +  bool meet_with (const vrange _vr);
>>bool meet_with (const ipcp_vr_lattice );
>> -  void init () { gcc_assert (m_vr.undefined_p ()); }
>> +  void init (tree type);
>>void print (FILE * f);
>>
>>  private:
>> -  bool meet_with_1 (const value_range *other_vr);
>> +  bool meet_with_1 (const vrange _vr);
>>  };
>>
>> +inline void
>> +ipcp_vr_lattice::init (tree type)
>> +{
>> +  if (type)
>> +m_vr.set_type (type);
>> +
>> +  // Otherwise m_vr will default to unsupported_range.

...this does?

All users of the lattice check it for not being bottom first, so it
should be safe.

If it is not possible for some reason, then I guess we should add a bool
flag to ipcp_vr_lattice instead, rather than looking up types of
unusable lattices.  ipcp_vr_lattices don't live for long.

>> +}
>> +
>>  /* Structure containing lattices for a parameter itself and for pieces of
>> aggregates that are passed in the parameter or by a reference in a 
>> parameter
>> plus some other useful flags.  */
>> @@ -585,7 +594,7 @@ ipcp_bits_lattice::print (FILE *f)
>>  void
>>  ipcp_vr_lattice::print (FILE * f)
>>  {
>> -  dump_value_range (f, _vr);
>> +  m_vr.dump (f);
>>  }
>>
>>  /* Print all ipcp_lattices of all functions to F.  */
>> @@ -1016,14 +1025,14 @@ set_agg_lats_contain_variable (class 
>> ipcp_param_lattices *plats)
>>  bool
>>  ipcp_vr_lattice::meet_with (const ipcp_vr_lattice )
>>  {
>> -  return meet_with_1 (_vr);
>> +  return meet_with_1 (other.m_vr);
>>  }
>>
>>  /* Meet the current value of the lattice with value range described by VR
>> lattice.  */
>>
>>  bool
>> -ipcp_vr_lattice::meet_with (const value_range *p_vr)
>> +ipcp_vr_lattice::meet_with (const vrange _vr)
>>  {
>>return meet_with_1

Re: [V1][PATCH 0/3] New attribute "element_count" to annotate bounds for C99 FAM(PR108896)

2023-05-26 Thread Kees Cook via Gcc-patches

On Thu, May 25, 2023 at 04:14:47PM +, Qing Zhao wrote:
> This patch set introduces a new attribute "element_count" to annotate bounds 
> for C99 flexible array member.

Thank you for this work! I'm really excited to start using it in the
Linux kernel. I'll give this a spin, but I know you've already been
testing this series against the test cases I created earlier, so I don't
expect any problems. :)

One bike-shedding note: with the recent "-fbounds-safety" RFC posted for
LLVM, we may want to consider renaming "element_count" to "counted_by":
https://discourse.llvm.org/t/rfc-enforcing-bounds-safety-in-c-fbounds-safety/

Thanks again!

-Kees

-- 
Kees Cook

Re: [PATCH] libstdc++: Correct NTTP and simd_mask ctor call

On Fri, 26 May 2023 at 12:11, Matthias Kretz via Libstdc++ <
libstd...@gcc.gnu.org> wrote:

> OK for master and all backports (after 11.4 is done)?
>

OK



>
> tested on powerpc64le-linux-gnu and x86_64-pc-linux-gnu
>
> --- 8< 
>
> Signed-off-by: Matthias Kretz 
>
> libstdc++-v3/ChangeLog:
>
> PR libstdc++/109822
> * include/experimental/bits/simd.h (to_native): Use int NTTP
> as specified in PTS2.
> (to_compatible): Likewise. Add missing tag to call mask
> generator ctor.
> * testsuite/experimental/simd/pr109822_cast_functions.cc: New
> test.
> ---
>  libstdc++-v3/include/experimental/bits/simd.h |  7 ++-
>  .../simd/pr109822_cast_functions.cc   | 63 +++
>  2 files changed, 67 insertions(+), 3 deletions(-)
>  create mode 100644 libstdc++-v3/testsuite/experimental/simd/
> pr109822_cast_functions.cc
>
>
> --
> ──
>  Dr. Matthias Kretz   https://mattkretz.github.io
>  GSI Helmholtz Centre for Heavy Ion Research   https://gsi.de
>  stdₓ::simd
> ──

Re: [PATCH] libstdc++: Simplify calculation of expected value in simd test

On Fri, 26 May 2023 at 12:09, Matthias Kretz via Libstdc++ <
libstd...@gcc.gnu.org> wrote:

> OK for master and all backports (after 11.4 is done)?
>

OK



>
> tested on powerpc64le-linux-gnu
>
> --- 8< 
>
> This avoids a failure on PR109964.
>
> Signed-off-by: Matthias Kretz 
>
> libstdc++-v3/ChangeLog:
>
> * testsuite/experimental/simd/tests/integer_operators.cc:
> Compute expected value differently to avoid getting turned into
> a vector shift.
> ---
>  .../experimental/simd/tests/integer_operators.cc | 9 -
>  1 file changed, 4 insertions(+), 5 deletions(-)
>
>
> --
> ──
>  Dr. Matthias Kretz   https://mattkretz.github.io
>  GSI Helmholtz Centre for Heavy Ion Research   https://gsi.de
>  stdₓ::simd
> ──

Re: [PATCH] libstdc++: Fix test assumptions on long and long double

On Fri, 26 May 2023 at 12:03, Matthias Kretz via Libstdc++ <
libstd...@gcc.gnu.org> wrote:

> OK for master and all backports (after 11.4 is done)
>

OK



>
> tested on powerpc64le-linux-gnu (with 64-bit long double)
>
> --- 8< 
>
> Expect that long might not fit into the long double mantissa bits.
>
> Signed-off-by: Matthias Kretz 
>
> libstdc++-v3/ChangeLog:
>
> * testsuite/experimental/simd/tests/operator_cvt.cc: Make long
> double <-> (u)long conversion tests conditional on sizeof(long
> double) and sizeof(long).
> ---
>  .../experimental/simd/tests/operator_cvt.cc   | 30 +++
>  1 file changed, 24 insertions(+), 6 deletions(-)
>
>
> --
> ──
>  Dr. Matthias Kretz   https://mattkretz.github.io
>  GSI Helmholtz Centre for Heavy Ion Research   https://gsi.de
>  stdₓ::simd
> ──

[r14-1246 Regression] FAIL: gcc.target/i386/pr98434-1.c scan-assembler-times vpsrlvw[\\t ]*%ymm 2 on Linux/x86_64

2023-05-26 Thread haochen.jiang via Gcc-patches

On Linux/x86_64,

52ff3f7b863da1011b73c0ab3b11f6c78b6451c7 is the first bad commit
commit 52ff3f7b863da1011b73c0ab3b11f6c78b6451c7
Author: Uros Bizjak 
Date:   Thu May 25 19:40:26 2023 +0200

i386: Use 2x-wider modes when emulating QImode vector instructions

caused

FAIL: gcc.target/i386/avx512bw-pr95488-1.c scan-assembler-times vpmovwb 2
FAIL: gcc.target/i386/avx512bw-pr95488-1.c scan-assembler-times vpmovzxbw 4
FAIL: gcc.target/i386/avx512bw-pr95488-1.c scan-assembler-times 
vpmullw[^\n]*zmm 2
FAIL: gcc.target/i386/avx512vl-pr95488-1.c scan-assembler-times vpmovwb 4
FAIL: gcc.target/i386/avx512vl-pr95488-1.c scan-assembler-times vpmovzxbw 8
FAIL: gcc.target/i386/avx512vl-pr95488-1.c scan-assembler-times 
vpmullw[^\n]*xmm 2
FAIL: gcc.target/i386/avx512vl-pr95488-1.c scan-assembler-times 
vpmullw[^\n]*ymm 2
FAIL: gcc.target/i386/pr98434-1.c scan-assembler-times vpsllvw[\\t ]*%zmm 2
FAIL: gcc.target/i386/pr98434-1.c scan-assembler-times vpsravw[\\t ]*%xmm 2
FAIL: gcc.target/i386/pr98434-1.c scan-assembler-times vpsrlvw[\\t ]*%ymm 2

with GCC configured with

../../gcc/configure 
--prefix=/export/users/haochenj/src/gcc-bisect/master/master/r14-1246/usr 
--enable-clocale=gnu --with-system-zlib --with-demangler-in-ld 
--with-fpmath=sse --enable-languages=c,c++,fortran --enable-cet --without-isl 
--enable-libmpx x86_64-linux --disable-bootstrap

To reproduce:

$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/avx512bw-pr95488-1.c 
--target_board='unix{-m32}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/avx512bw-pr95488-1.c 
--target_board='unix{-m32\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/avx512bw-pr95488-1.c 
--target_board='unix{-m64}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/avx512bw-pr95488-1.c 
--target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/avx512vl-pr95488-1.c 
--target_board='unix{-m32}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/avx512vl-pr95488-1.c 
--target_board='unix{-m32\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/avx512vl-pr95488-1.c 
--target_board='unix{-m64}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/avx512vl-pr95488-1.c 
--target_board='unix{-m64\ -march=cascadelake}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/pr98434-1.c --target_board='unix{-m32}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/pr98434-1.c --target_board='unix{-m32\ 
-march=cascadelake}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/pr98434-1.c --target_board='unix{-m64}'"
$ cd {build_dir}/gcc && make check 
RUNTESTFLAGS="i386.exp=gcc.target/i386/pr98434-1.c --target_board='unix{-m64\ 
-march=cascadelake}'"

(Please do not reply to this email, for question about this report, contact me 
at haochen dot jiang at intel.com)

Re: [patch] amdgcn: Change -m(no-)xnack to -mxnack=(on,off,any)

2023-05-26 Thread Andrew Stubbs

OK.

Andrew
On 26/05/2023 15:58, Tobias Burnus wrote:
(Update the syntax of the amdgcn commandline option in anticipation of
later patches;
while -m(no-)xnack is in mainline since r12-2396-gaad32a00b7d2b6 (for
PR100208),
-mxsnack (contrary to -msram-ecc) is currently mostly a stub for later
patches
and is documented as such in invoke.texi. Thus, this change should have
no (or

only a minimal) affect on users.)

GCC currently supports for GCN -mxnack / -mno-xnack arguments, matching
+xnack and -xnack when passed to the LLVM linker. However, since V4 the
latter
supports three states, besides on/off there is now also unspecified.
That matches
the semantic of sram(-)ecc, which GCC already implements as 'on'/'off'
and 'any'.

Cf.
https://llvm.org/docs/AMDGPUUsage.html#target-features>> and
https://gcc.gnu.org/onlinedocs/gcc-13.1.0/gcc/AMD-GCN-Options.html>>

The attached patch uses the sram-ecc flag syntax now also for xnack.
Note that currently only 'no' is supported which is ensured via a 'sorry'.
Hence, the default is 'no'. I assume we want to change the default once
XNACK is working - therefore, the documentation does only states the
current

default as a comment.

The changes were picked from the patch "amdgcn: Support XNACK mode" at
-
https://gcc.gnu.org/pipermail/gcc-patches/2022-July/597991.html>> - OG12 0229066ecb24421d48e3e0d56f31c30cc1affdab

- OG13 cbc3dd01de8788587a2b641efcb838058303b5ab
but only includes all changes related to the commandline option changes,
excluding the other changes like those to isns.

It additionally updates invoke.texi (using the wording from -msram-ecc).
(I actually encountered this issue because of the non-updated manual.)

Tested with full bootstrap, regtesting running, but not expecting
surprised.

OK for mainline?

Tobias

PS: For FIJI, "" is passed – that's ensured by NO_XNACK in the ASM_SPEC
and the 'switch' later in output_file_start (unchanged), otherwise 'xnack-'
is used (via the default in gcn.opt for the compiler and via XNACKOPT for
the command line.)
-
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201,
80634 München; Gesellschaft mit beschränkter Haftung; Geschäftsführer:
Thomas Heurung, Frank Thürauf; Sitz der Gesellschaft: München;
Registergericht München, HRB 106955

Re: [PATCH V5, 2/2] PR target/105325: Fix memory constraints for power10 fusion.

2023-05-26 Thread Segher Boessenkool

On Wed, May 10, 2023 at 11:40:00AM -0400, Michael Meissner wrote:
> This patch applies stricter predicates and constraints for LD and LWA
> instructions with power10 fusion.  These instructions are DS-form 
> instructions,
> which means that the bottom 2 bits of the address must be 0.

The low two bits of the offset, yes.

> --- a/gcc/config/rs6000/genfusion.pl
> +++ b/gcc/config/rs6000/genfusion.pl
> @@ -129,6 +129,12 @@ sub print_ld_cmpi_p10
>print "  \"\"\n";
>print "  [(set_attr \"type\" \"fused_load_cmpi\")\n";
>print "   (set_attr \"cost\" \"8\")\n";
> +
> +  if ($extend eq "sign")
> +{
> +  print "   (set_attr \"sign_extend\" \"yes\")\n";
> +}

You never ever need backslashes like this in Perl code, btw.  For
example:
  print qq{   (set_attr "sign_extend" "yes")\n};
or
  print qq/   (set_attr "sign_extend" "yes")\n/;
or
print <<"HERE"
   (set_attr "sign_extend" "yes")
HERE
or millions of other ways, all of which are much nicer than cramped code
that tries to look like C (but has very different semantics in all ways
that matter).  (Also zillions of ways that are worse still, but that is
the price of freedom maybe :-) )

> -  # Memory predicate to use.
> +  # Memory predicate to use.  For LWA, use the special LWA_OPERAND.

Explain *why*?  It is obvious *what*!

Maybe just split the series into more patches?
> @@ -0,0 +1,26 @@
> +/* { dg-do assemble } */
> +/* { dg-require-effective-target lp64 } */
> +/* { dg-require-effective-target power10_ok } */

power10_ok should no longer exist, btw.  Technical debt has to be
repaid :-/

This patch is readable btw.  Thanks :-)

Segher

[patch] amdgcn: Change -m(no-)xnack to -mxnack=(on,off,any)

2023-05-26 Thread Tobias Burnus


(Update the syntax of the amdgcn commandline option in anticipation of later 
patches;
while -m(no-)xnack is in mainline since r12-2396-gaad32a00b7d2b6 (for PR100208),
-mxsnack (contrary to -msram-ecc) is currently mostly a stub for later patches
and is documented as such in invoke.texi. Thus, this change should have no (or
only a minimal) affect on users.)


GCC currently supports for GCN -mxnack / -mno-xnack arguments, matching
+xnack and -xnack when passed to the LLVM linker. However, since V4 the latter
supports three states, besides on/off there is now also unspecified. That 
matches
the semantic of sram(-)ecc, which GCC already implements as 'on'/'off' and 
'any'.

Cf. https://llvm.org/docs/AMDGPUUsage.html#target-features
and https://gcc.gnu.org/onlinedocs/gcc-13.1.0/gcc/AMD-GCN-Options.html


The attached patch uses the sram-ecc flag syntax now also for xnack.
Note that currently only 'no' is supported which is ensured via a 'sorry'.
Hence, the default is 'no'. I assume we want to change the default once
XNACK is working - therefore, the documentation does only states the current
default as a comment.

The changes were picked from the patch "amdgcn: Support XNACK mode" at
- https://gcc.gnu.org/pipermail/gcc-patches/2022-July/597991.html
- OG12 0229066ecb24421d48e3e0d56f31c30cc1affdab
- OG13 cbc3dd01de8788587a2b641efcb838058303b5ab
but only includes all changes related to the commandline option changes,
excluding the other changes like those to isns.

It additionally updates invoke.texi (using the wording from -msram-ecc).
(I actually encountered this issue because of the non-updated manual.)

Tested with full bootstrap, regtesting running, but not expecting surprised.
OK for mainline?

Tobias

PS: For FIJI, "" is passed – that's ensured by NO_XNACK in the ASM_SPEC
and the 'switch' later in output_file_start (unchanged), otherwise 'xnack-'
is used (via the default in gcn.opt for the compiler and via XNACKOPT for
the command line.)
-
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634 
München; Gesellschaft mit beschränkter Haftung; Geschäftsführer: Thomas 
Heurung, Frank Thürauf; Sitz der Gesellschaft: München; Registergericht 
München, HRB 106955
amdgcn: Change -m(no-)xnack to -mxnack=(on,off,any)

Since object code target ID V4, xnack has the values unspecified, '+' and '-',
which with this commit is represented in GCC as 'any', 'on', and 'off',
following the precidence for 'sram(-)ecc' and -msram-ecc=.

The current default was 'no' and is now 'off'; however, once XNACK is
implemented, the default should be probably 'any'.

This commit updates the commandline options to permit the new tristate and
updates the documentation. As the feature itself is currently not really
supported in GCC, the change should not affect real-world users.

The XNACK feature allows memory load instructions to restart safely following
a page-miss interrupt.  This is useful for shared-memory devices, like APUs,
and to implement OpenMP Unified Shared Memory.

2023-05-26  Andrew Stubbs  
	Tobias Burnus  

	* config/gcn/gcn-hsa.h (XNACKOPT): New macro.
	(ASM_SPEC): Use XNACKOPT.
	* config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
	(enum hsaco_attr_type): ... this, and generalize the names.
	(TARGET_XNACK): New macro.
	* config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
	but -mxnack=off.
	(output_file_start): Update xnack handling.
	(gcn_hsa_declare_function_name): Use TARGET_XNACK.
	* config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
	(sram_ecc_type): Rename to ...
	(hsaco_attr_type: ... this.)
	* config/gcn/mkoffload.c (SET_XNACK_ANY): New macro.
	(TEST_XNACK): Delete.
	(TEST_XNACK_ANY): New macro.
	(TEST_XNACK_ON): New macro.
   	(main): Support the new -mxnack=on/off/any syntax.
	* doc/invoke.texi (-mxnack): Update for new syntax.

 gcc/config/gcn/gcn-hsa.h|  6 +-
 gcc/config/gcn/gcn-opts.h   | 10 ++
 gcc/config/gcn/gcn.cc   | 19 +++
 gcc/config/gcn/gcn.opt  | 20 ++--
 gcc/config/gcn/mkoffload.cc | 21 +++--
 gcc/doc/invoke.texi | 14 --
 6 files changed, 55 insertions(+), 35 deletions(-)

diff --git a/gcc/config/gcn/gcn-hsa.h b/gcc/config/gcn/gcn-hsa.h
index 51b0509a8a6..0b5610bbcbe 100644
--- a/gcc/config/gcn/gcn-hsa.h
+++ b/gcc/config/gcn/gcn-hsa.h
@@ -82,11 +82,15 @@ extern unsigned int gcn_local_sym_hash (const char *name);
configuration.  The name of the attribute also changed.  */
 #define SRAMOPT "msram-ecc=on:-mattr=+sramecc;msram-ecc=off:-mattr=-sramecc"
 
+/* Replace once XNACK is supported:
+   #define XNACKOPT "mxnack=on:-mattr=+xnack;mxnack=off:-mattr=-xnack"  */
+#define XNACKOPT "!mnack=*:-mattr=-xnack;mnack=*:-mattr=-xnack"
+
 /* Use LLVM assembler and linker options.  */
 #define ASM_SPEC  "-triple=amdgcn--amdhsa "  \
 		  "%:last_arg(%{march=*:-mcpu=%*}) " \
 		  "%{!march=*|march=fiji:--amdhsa-code-object-version=3} " \
-

Re: [PATCH V5, 1/2] PR target/105325: Rewrite genfusion.pl's gen_ld_cmpi_p10 function.

2023-05-26 Thread Segher Boessenkool

Hi Mike,

On Wed, May 10, 2023 at 11:38:55AM -0400, Michael Meissner wrote:
> This patch rewrites the gen_ld_cmpi_p10 function in genfusion.pl to be 
> clearer.

That is not at all what I asked for, even if I would agree the code is
nicer to read now (I don't).

What I asked for, what is needed, is for your patches to be readable.
This is a prerequisite for them to be reviewable, which is a
prerequisite for them to be approvable.  One way to do that is to split
out refactorings (which I asked for) and rewrites (which you did) to
earlier patches in the series.  Pure refactoring are easy to review:
they change exactly nothing in what code is executed.  Rewrites are much
harder to review.  But even then we can hope you didn't slip up once in
a hundred lines of code, sure.

The later patches can then be much more readable because there isn't so
much noise mixed in.

> Assuming I can check this in, I will
> also commit to the active GCC branches after a burn-in period.

No, you will never do that.  You always need approval for that.  We have
these procedures for a reason.  We do not want other things than what
was approved committed, doubly so if *nothing* was approved.

>   * config/rs6000/genfusion.pl (mode_to_ldst_char): Delete.

This is a regression.

> +# Print the insns for load and compare with -1/0/1.
> +# Arguments:
> +# lmode  -- Integer mode ("DI", "SI", "HI", or "QI").
> +# result -- "clobber", "GPR", or $lmode
> +# ccmode -- Sign vs. unsigned ("CC" or "CCUNS").
> +# mem_format -- Memory format ("d" or "ds").
> +# cmpl   -- Suffix for compare ("l" or "")
> +# const_pred -- Predicate for constant (i.e. -1/0/1 or 0/1).
> +# extend -- "sign", "zero", or "none".
> +# echr   -- Suffix for load ("a", "z", or "").
> +# load   -- Load instruction (i.e. "ld", "lwa", "lwz", etc.)
> +# np -- enum non_prefixed_form for memory type
> +# constraint -- constraint to use
> +# mem_pred   -- predicate for the memory operation

If you need a huge block comment for your sub argument, that is a
not-so-subtle hint that you need to refactor.  Or if this was supposed
to be a refactoring, that something went terribly wrong :-(

Segher

[PATCH] Add COMPLEX_VECTOR_INT modes

2023-05-26 Thread Andrew Stubbs


Hi all,

I want to implement a vector DIVMOD libfunc for amdgcn, but I can't just 
do it because the GCC middle-end models DIVMOD's return value as 
"complex int" type, and there are no vector equivalents of that type.


Therefore, this patch adds minimal support for "complex vector int" 
modes.  I have not attempted to provide any means to use these modes 
from C, so they're really only useful for DIVMOD.  The actual libfunc 
implementation will pack the data into wider vector modes manually.


A knock-on effect of this is that I needed to increase the range of 
"mode_unit_size" (several of the vector modes supported by amdgcn exceed 
the previous 255-byte limit).


Since this change would add a large number of new, unused modes to many 
architectures, I have elected to *not* enable them, by default, in 
machmode.def (where the other complex modes are created).  The new modes 
are therefore inactive on all architectures but amdgcn, for now.


OK for mainline?  (I've not done a full test yet, but I will.)

Thanks

AndrewAdd COMPLEX_VECTOR_INT modes for amdgcn

This enables only minimal support for complex types containing integer
vectors with the intention of allowing vectorized divmod libfunc operations
(these return a pair of integers modelled as a complex number).

There's no way to declare variables of this mode in the front-end, and no
attempt to support it everywhere that complex modes can exist; the only
use-case, at present, is the implicit use by divmod calls generated by
the middle-end.

In order to prevent unexpected problems with other architectures these
modes are only enabled for amdgcn.

gcc/ChangeLog:

* config/gcn/gcn-modes.def: Initialize COMPLEX_VECTOR_INT modes.
* genmodes.cc (complex_class): Support MODE_COMPLEX_VECTOR_INT.
(complete_mode): Likewise.
(emit_mode_unit_size): Upgrade mode_unit_size type to short.
(emit_mode_adjustments): Support MODE_COMPLEX_VECTOR_INT.
* machmode.def: Mention MODE_COMPLEX_VECTOR_INT.
* machmode.h (mode_to_unit_size): Upgrade type to short.
* mode-classes.def: Add MODE_COMPLEX_VECTOR_INT.
* stor-layout.cc (int_mode_for_mode): Support MODE_COMPLEX_VECTOR_INT.
* tree.cc (build_complex_type): Allow VECTOR_INTEGER_TYPE_P.

diff --git a/gcc/config/gcn/gcn-modes.def b/gcc/config/gcn/gcn-modes.def
index 1357bec825d..486168fbeb3 100644
--- a/gcc/config/gcn/gcn-modes.def
+++ b/gcc/config/gcn/gcn-modes.def
@@ -121,3 +121,6 @@ ADJUST_ALIGNMENT (V2TI, 16);
 ADJUST_ALIGNMENT (V2HF, 2);
 ADJUST_ALIGNMENT (V2SF, 4);
 ADJUST_ALIGNMENT (V2DF, 8);
+
+/* These are used for vectorized divmod.  */
+COMPLEX_MODES (VECTOR_INT);
diff --git a/gcc/genmodes.cc b/gcc/genmodes.cc
index 715787b8f48..d472ee5a9a3 100644
--- a/gcc/genmodes.cc
+++ b/gcc/genmodes.cc
@@ -125,6 +125,7 @@ complex_class (enum mode_class c)
 case MODE_INT: return MODE_COMPLEX_INT;
 case MODE_PARTIAL_INT: return MODE_COMPLEX_INT;
 case MODE_FLOAT: return MODE_COMPLEX_FLOAT;
+case MODE_VECTOR_INT: return MODE_COMPLEX_VECTOR_INT;
 default:
   error ("no complex class for class %s", mode_class_names[c]);
   return MODE_RANDOM;
@@ -382,6 +383,7 @@ complete_mode (struct mode_data *m)
 
 case MODE_COMPLEX_INT:
 case MODE_COMPLEX_FLOAT:
+case MODE_COMPLEX_VECTOR_INT:
   /* Complex modes should have a component indicated, but no more.  */
   validate_mode (m, UNSET, UNSET, SET, UNSET, UNSET);
   m->ncomponents = 2;
@@ -1173,10 +1175,10 @@ inline __attribute__((__always_inline__))\n\
 #else\n\
 extern __inline__ __attribute__((__always_inline__, __gnu_inline__))\n\
 #endif\n\
-unsigned char\n\
+unsigned short\n\
 mode_unit_size_inline (machine_mode mode)\n\
 {\n\
-  extern CONST_MODE_UNIT_SIZE unsigned char mode_unit_size[NUM_MACHINE_MODES];\
+  extern CONST_MODE_UNIT_SIZE unsigned short 
mode_unit_size[NUM_MACHINE_MODES];\
 \n\
   gcc_assert (mode >= 0 && mode < NUM_MACHINE_MODES);\n\
   switch (mode)\n\
@@ -1683,7 +1685,7 @@ emit_mode_unit_size (void)
   int c;
   struct mode_data *m;
 
-  print_maybe_const_decl ("%sunsigned char", "mode_unit_size",
+  print_maybe_const_decl ("%sunsigned short", "mode_unit_size",
  "NUM_MACHINE_MODES", adj_bytesize);
 
   for_all_modes (c, m)
@@ -1873,6 +1875,7 @@ emit_mode_adjustments (void)
{
case MODE_COMPLEX_INT:
case MODE_COMPLEX_FLOAT:
+case MODE_COMPLEX_VECTOR_INT:
  printf ("  mode_size[E_%smode] = 2*s;\n", m->name);
  printf ("  mode_unit_size[E_%smode] = s;\n", m->name);
  printf ("  mode_base_align[E_%smode] = s & (~s + 1);\n",
@@ -1920,6 +1923,7 @@ emit_mode_adjustments (void)
{
case MODE_COMPLEX_INT:
case MODE_COMPLEX_FLOAT:
+   case MODE_COMPLEX_VECTOR_INT:
  printf ("  mode_base_align[E_%smode] = s;\n", m->name);
  break;
 
diff --git a/gcc/machmode.def

[PATCH] RISC-V: Allow all const_vec_duplicates as constants.

2023-05-26 Thread Robin Dapp

Hi,

as we can always broadcast an integer constant to a vector register
allow them in riscv_const_insns.  We need as many instructions as
it takes to generate the constant and one vmv.vx.

Regards
 Robin

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_const_insns): Allow
const_vec_duplicates.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c: Add vmv.v.x
tests.
* gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv64.c: Dito.
* gcc.target/riscv/rvv/autovec/vmv-imm-run.c: Dito.
* gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c: Dito.
* gcc.target/riscv/rvv/autovec/vmv-imm-rv64.c: Dito.
* gcc.target/riscv/rvv/autovec/vmv-imm-template.h: Dito.
---
 gcc/config/riscv/riscv.cc | 22 --
 .../riscv/rvv/autovec/vmv-imm-fixed-rv32.c|  3 +-
 .../riscv/rvv/autovec/vmv-imm-fixed-rv64.c|  3 +-
 .../riscv/rvv/autovec/vmv-imm-run.c   |  8 ++
 .../riscv/rvv/autovec/vmv-imm-rv32.c  |  3 +-
 .../riscv/rvv/autovec/vmv-imm-rv64.c  |  3 +-
 .../riscv/rvv/autovec/vmv-imm-template.h  | 74 ++-
 7 files changed, 73 insertions(+), 43 deletions(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index c2acab08b89..5e0b515fe7a 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -1297,12 +1297,22 @@ riscv_const_insns (rtx x)
  }
  }
 
-   /* Constants from -16 to 15 can be loaded with vmv.v.i.
-  The Wc0, Wc1 constraints are already covered by the
-  vi constraint so we do not need to check them here
-  separately.  */
-   if (satisfies_constraint_vi (x))
- return 1;
+   rtx elt;
+   if (const_vec_duplicate_p (x, ))
+ {
+   /* Constants from -16 to 15 can be loaded with vmv.v.i.
+  The Wc0, Wc1 constraints are already covered by the
+  vi constraint so we do not need to check them here
+  separately.  */
+   if (satisfies_constraint_vi (x))
+ return 1;
+
+   /* A const duplicate vector can always be broadcast from
+  a general-purpose register.  This means we need as many
+  insns as it takes to load the constant into the GPR
+  and one vmv.v.x.  */
+   return 1 + riscv_integer_cost (INTVAL (elt));
+ }
 
/* TODO: We may support more const vector in the future.  */
return x == CONST0_RTX (GET_MODE (x)) ? 1 : 0;
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c
index 631ea3bf268..e8d017f7339 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv32.c
@@ -3,4 +3,5 @@
 
 #include "vmv-imm-template.h"
 
-/* { dg-final { scan-assembler-times "vmv.v.i" 32 } } */
+/* { dg-final { scan-assembler-times {vmv.v.i} 32 } } */
+/* { dg-final { scan-assembler-times {vmv.v.x} 8 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv64.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv64.c
index 7ded6cc18d2..f85ad4117d3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-fixed-rv64.c
@@ -3,4 +3,5 @@
 
 #include "vmv-imm-template.h"
 
-/* { dg-final { scan-assembler-times "vmv.v.i" 32 } } */
+/* { dg-final { scan-assembler-times {vmv.v.i} 32 } } */
+/* { dg-final { scan-assembler-times {vmv.v.x} 8 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c
index 22b1958af81..79099a37bdd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c
@@ -53,4 +53,12 @@ int main ()
   TEST_POS(uint64_t, 13)
   TEST_POS(uint64_t, 14)
   TEST_POS(uint64_t, 15)
+  TEST_POS(uint32_t, 16)
+  TEST_POS(uint32_t, 123)
+  TEST_POS(uint32_t, 255)
+  TEST_POS(uint32_t, 999)
+  TEST_POS(uint32_t, 32701)
+  TEST_POS(uint32_t, 65535)
+  TEST_POS(uint32_t, 65536)
+  TEST_POS(uint32_t, 923423)
 }
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c
index c419256cd45..6843bc6018d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-rv32.c
@@ -3,4 +3,5 @@
 
 #include "vmv-imm-template.h"
 
-/* { dg-final { scan-assembler-times "vmv.v.i" 32 } } */
+/* { dg-final { scan-assembler-times {vmv.v.i} 32 } } */
+/* { dg-final { scan-assembler-times {vmv.v.x} 8 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-rv64.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-rv64.c
index e386166f95e..39fb2a6cc7b 100644
---

Re: [Ping][PATCH] RISC-V: Optimize the MASK opt generation

2023-05-26 Thread Jeff Law via Gcc-patches





On 5/26/23 03:00, Feng Wang wrote:

Ping, I will rebase if the change is fine to you, thanks!

Not forgotten.  I think Palmer owns this from a review standpoint.

We're tracking RISC-V specific patches here:



https://patchwork.sourceware.org/project/gcc/list/?seriesRISC-V==




You'll see your patch near the bottom of the list.

jeff

Re: [V1][PATCH 1/3] Provide element_count attribute to flexible array member field (PR108896)

2023-05-26 Thread Qing Zhao via Gcc-patches



> On May 25, 2023, at 5:02 PM, Joseph Myers  wrote:
> 
> What happens if the field giving the number of elements is in a contained 
> anonymous structure or union?
> 
> struct s {
>  struct { size_t count; };
>  int array[] __attribute__ ((element_count ("count")));
> };
> 
> This ought to work - a general principle in C is that anonymous structures 
> and unions are transparent as far as name lookup for fields is concerned.  
> But I don't see any testcases for it and I'm not sure it would work with 
> the present code.
Will check on this and add testing case for this case.
> 
> What if the string is a wide string?  I don't expect that to work (either 
> as a matter of interface design, or in the present code), but I think that 
> case should have a specific check and error.

Dump question: how to check whether the string is a wide string? -:)

> 
> What happens in the case where -fexec-charset specifies a 
> non-ASCII-compatible character set?  I expect that to work OK with the 
> existing code, because translation of string literals to the execution 
> character set is disabled in __attribute__ parsing, but having a testcase 
> for it would be good.
Okay, will check on this and add test case.
> 
> What happens if the field referenced for the element count does not have 
> integer type?  I'd expect an error, but don't see one in the code or tests 
> here.
Yes, that’s right, will add this.

Thanks a lot.

Qing

> 
> -- 
> Joseph S. Myers
> jos...@codesourcery.com

Re: [PATCH] RISC-V: Add the option "-mdisable-multilib-check" to avoid multilib checks breaking the compilation.

2023-05-26 Thread Maciej W. Rozycki

On Tue, 23 May 2023, Jin Ma via Gcc-patches wrote:

> When testing a extension, it is often necessary for a certain program not to
> need some kind of extension, such as the bitmanip extension, to evaluate the
> performance or codesize of the extension. However, the current multilib rules
> will report an error when it is not a superset of the MULTILIB_REQUIRED list,
> which will cause the program to be unable to link normally, thus failing to
> achieve the expected purpose.

 Hmm, I have troubles understanding what is going on here.  What do you 
refer to by saying: "it is not a superset of the MULTILIB_REQUIRED list"?  

 There should be no problem with linking compiled modules together that 
make use of different extensions, with the static linker figuring out the 
combined set of extensions actually required at run time for the program 
loader to consider, as long as the modules do not have contradicting 
requirements, e.g. big vs little endianness or RV32 vs RV64.

 Can you give me a specific example (compilation options and multilibs 
available) of a failure you refer to?

 Is this something that could be solved without resorting to a possibly 
dangerous hack, by making use of MULTILIB_REUSE?

  Maciej

[PATCH V2] RISC-V: Add RVV FMA auto-vectorization support

2023-05-26 Thread juzhe . zhong

From: Juzhe-Zhong 

This patch support FMA auto-vectorization pattern.
1. Let's RA decide vmacc or vmadd.
2. Fix bug of vector.md which generate incorrect information to VSETVL
   PASS when testing ternop-3.c.

gcc/ChangeLog:

* config/riscv/autovec.md (fma4): New pattern.
(*fma): Ditto.
* config/riscv/riscv-protos.h (enum insn_type): New enum.
(emit_vlmax_ternary_insn): New function.
* config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
* config/riscv/vector.md: Fix vimuladd instruction bug.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/rvv.exp: Add ternary tests
* gcc.target/riscv/rvv/autovec/ternop/ternop-1.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop-2.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop-3.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-3.c: New test.

---
 gcc/config/riscv/autovec.md   |  65 +++
 gcc/config/riscv/riscv-protos.h   |   2 +
 gcc/config/riscv/riscv-v.cc   |  20 
 gcc/config/riscv/vector.md|   2 +-
 .../riscv/rvv/autovec/ternop/ternop-1.c   |  28 +
 .../riscv/rvv/autovec/ternop/ternop-2.c   |  34 ++
 .../riscv/rvv/autovec/ternop/ternop-3.c   |  33 ++
 .../riscv/rvv/autovec/ternop/ternop_run-1.c   |  84 ++
 .../riscv/rvv/autovec/ternop/ternop_run-2.c   | 104 ++
 .../riscv/rvv/autovec/ternop/ternop_run-3.c   | 104 ++
 gcc/testsuite/gcc.target/riscv/rvv/rvv.exp|   2 +
 11 files changed, 477 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop-3.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run-2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run-3.c

diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
index 7fe4d94de39..04825df1210 100644
--- a/gcc/config/riscv/autovec.md
+++ b/gcc/config/riscv/autovec.md
@@ -373,3 +373,68 @@
 DONE;
   }
 )
+
+;; =
+;; == Ternary arithmetic
+;; =
+
+;; -
+;;  [INT] VMACC and VMADD
+;; -
+;; Includes:
+;; - vmacc
+;; - vmadd
+;; -
+
+;; We can't expand FMA for the following reasons:
+;; 1. Before RA, we don't know which multiply-add instruction is the ideal one.
+;;The vmacc is the ideal instruction when operands[3] overlaps operands[0].
+;;The vmadd is the ideal instruction when operands[1|2] overlaps 
operands[0].
+;; 2. According to vector.md, the multiply-add patterns has 'merge' operand 
which
+;;is the operands[5]. Since operands[5] should overlap operands[0], this 
operand
+;;should be allocated the same regno as operands[1|2|3].
+;; 3. The 'merge' operand is always a real merge operand and we don't allow 
undefined
+;;operand.
+;; 4. The operation of FMA pattern needs VLMAX vsetlvi which needs a VL 
operand.
+;;
+;; In this situation, we design the codegen of FMA as follows:
+;; 1. clobber a scratch in the expand pattern of FMA.
+;; 2. Let's RA decide which input operand (operands[1|2|3]) overlap 
operands[0].
+;; 3. Generate instructions (vmacc or vmadd) according to the register 
allocation
+;;result after reload_completed.
+(define_expand "fma4"
+  [(parallel
+[(set (match_operand:VI 0 "register_operand" "=vr")
+ (plus:VI
+   (mult:VI
+ (match_operand:VI 1 "register_operand" " vr")
+ (match_operand:VI 2 "register_operand" " vr"))
+   (match_operand:VI 3 "register_operand"   " vr")))
+ (clobber (match_scratch:SI 4))])]
+  "TARGET_VECTOR"
+  {})
+
+(define_insn_and_split "*fma"
+  [(set (match_operand:VI 0 "register_operand" "=vr, vr, ?")
+   (plus:VI
+ (mult:VI
+   (match_operand:VI 1 "register_operand" " %0, vr,   vr")
+   (match_operand:VI 2 "register_operand" " vr, vr,   vr"))
+ (match_operand:VI 3 "register_operand"   " vr,  0,   vr")))
+   (clobber (match_scratch:SI 4 "=r,r,r"))]
+  "TARGET_VECTOR"
+  "#"
+  "&& reload_completed"
+  [(const_int 0)]
+  {
+PUT_MODE (operands[4], Pmode);
+riscv_vector::emit_vlmax_vsetvl (mode, operands[4]);
+

Re: [PATCH] RISC-V: Add RVV FMA auto-vectorization support

Hi Juzhe,

>>> Can you explain these two points (3 and 4, maybe 2) a bit in the comments?
>>> I.e. what makes fma different from a normal insn?
> You can take a lookt at vector.md. The ternary instruction pattern has 
> operands[0] operands[1] operands[2] operands[3] operands[4] operands[5] :
> 
> operands[0] = operands[1] ? operands[2] * operands[3] + operands[4] : 
> operands[5]
> These operands are not necessary the same RTX but we should make them overlap.
> Why have operands[5] ? Since we will have len_cond_fma.
> So I want to lower simple fma pattern into patterns I define in vector.md.
> operands[5] should be operands[1] if operands[1] overlap operand[0] --->vmacc
> or operands[3] if operands[3] overlap operand[0] -->vmadd

yes, the general principle is clear (it's same for other insns as well).
My point was to make sure we document that a bit more verbosely in the
comments so future readers will immediately know what they are dealing
with.

Thanks
 Robin

[PATCH] libstdc++: Correct NTTP and simd_mask ctor call

OK for master and all backports (after 11.4 is done)?

tested on powerpc64le-linux-gnu and x86_64-pc-linux-gnu

--- 8< 

Signed-off-by: Matthias Kretz 

libstdc++-v3/ChangeLog:

PR libstdc++/109822
* include/experimental/bits/simd.h (to_native): Use int NTTP
as specified in PTS2.
(to_compatible): Likewise. Add missing tag to call mask
generator ctor.
* testsuite/experimental/simd/pr109822_cast_functions.cc: New
test.
---
 libstdc++-v3/include/experimental/bits/simd.h |  7 ++-
 .../simd/pr109822_cast_functions.cc   | 63 +++
 2 files changed, 67 insertions(+), 3 deletions(-)
 create mode 100644 libstdc++-v3/testsuite/experimental/simd/
pr109822_cast_functions.cc


--
──
 Dr. Matthias Kretz   https://mattkretz.github.io
 GSI Helmholtz Centre for Heavy Ion Research   https://gsi.de
 stdₓ::simd
──diff --git a/libstdc++-v3/include/experimental/bits/simd.h b/libstdc++-v3/include/experimental/bits/simd.h
index 26f08f83ab0..f94b8361ab0 100644
--- a/libstdc++-v3/include/experimental/bits/simd.h
+++ b/libstdc++-v3/include/experimental/bits/simd.h
@@ -3304,7 +3304,7 @@ to_native(const fixed_size_simd<_Tp, _Np>& __x)
 return {__mem, vector_aligned};
   }
 
-template 
+template 
   _GLIBCXX_SIMD_INTRINSIC
   enable_if_t<(_Np == native_simd_mask<_Tp>::size()), native_simd_mask<_Tp>>
   to_native(const fixed_size_simd_mask<_Tp, _Np>& __x)
@@ -3315,7 +3315,7 @@ to_native(const fixed_size_simd_mask<_Tp, _Np>& __x)
   }
 
 // to_compatible {{{2
-template 
+template 
   _GLIBCXX_SIMD_INTRINSIC enable_if_t<(_Np == simd<_Tp>::size()), simd<_Tp>>
   to_compatible(const simd<_Tp, simd_abi::fixed_size<_Np>>& __x)
   {
@@ -3324,12 +3324,13 @@ to_compatible(const simd<_Tp, simd_abi::fixed_size<_Np>>& __x)
 return {__mem, vector_aligned};
   }
 
-template 
+template 
   _GLIBCXX_SIMD_INTRINSIC
   enable_if_t<(_Np == simd_mask<_Tp>::size()), simd_mask<_Tp>>
   to_compatible(const simd_mask<_Tp, simd_abi::fixed_size<_Np>>& __x)
   {
 return simd_mask<_Tp>(
+	 __private_init,
 	 [&](auto __i) constexpr _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { return __x[__i]; });
   }
 
diff --git a/libstdc++-v3/testsuite/experimental/simd/pr109822_cast_functions.cc b/libstdc++-v3/testsuite/experimental/simd/pr109822_cast_functions.cc
new file mode 100644
index 000..3deafbf7a1f
--- /dev/null
+++ b/libstdc++-v3/testsuite/experimental/simd/pr109822_cast_functions.cc
@@ -0,0 +1,63 @@
+// { dg-options "-std=gnu++17" }
+// { dg-do compile { target c++17 } }
+
+#include 
+
+namespace stdx = std::experimental;
+
+template 
+  void
+  test01()
+  {
+using M = typename V::mask_type;
+[[maybe_unused]] auto x = to_fixed_size(V());
+[[maybe_unused]] auto k = to_fixed_size(M());
+if constexpr (stdx::simd::size() == V::size())
+  {
+	[[maybe_unused]] auto xx = to_compatible(x);
+	[[maybe_unused]] auto kk = to_compatible(k);
+	x = to_fixed_size(xx);
+	k = to_fixed_size(kk);
+  }
+if constexpr (stdx::native_simd::size() == V::size())
+  {
+	[[maybe_unused]] auto xx = to_native(x);
+	[[maybe_unused]] auto kk = to_native(k);
+	x = to_fixed_size(xx);
+	k = to_fixed_size(kk);
+  }
+  }
+
+template 
+  void
+  iterate_abis()
+  {
+test01>();
+test01>();
+test01>();
+test01>();
+test01 - 4>>();
+  }
+
+int
+main()
+{
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+  iterate_abis();
+}

[PATCH] libstdc++: Simplify calculation of expected value in simd test

OK for master and all backports (after 11.4 is done)?

tested on powerpc64le-linux-gnu

--- 8< 

This avoids a failure on PR109964.

Signed-off-by: Matthias Kretz 

libstdc++-v3/ChangeLog:

* testsuite/experimental/simd/tests/integer_operators.cc:
Compute expected value differently to avoid getting turned into
a vector shift.
---
 .../experimental/simd/tests/integer_operators.cc | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)


--
──
 Dr. Matthias Kretz   https://mattkretz.github.io
 GSI Helmholtz Centre for Heavy Ion Research   https://gsi.de
 stdₓ::simd
──diff --git a/libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc b/libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc
index 7a2bc085e49..08ad49ca710 100644
--- a/libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc
+++ b/libstdc++-v3/testsuite/experimental/simd/tests/integer_operators.cc
@@ -179,11 +179,10 @@ for (int s = 1; s < nbits; ++s)
 	  for (int j = 0; j < 100; ++j)
 	{
 	  const V seq([&](auto i) -> T { return (j + i) % n_promo_bits; });
-	  COMPARE(V(1) >> seq, V([&](auto i) { return T(T(1) >> seq[i]); }))
-		<< "seq = " << seq;
-	  COMPARE(make_value_unknown(V(1)) >> make_value_unknown(seq),
-		V([&](auto i) { return T(T(1) >> seq[i]); }))
-		<< "seq = " << seq;
+	  const V expect([&](auto i) { return seq[i] == 0 ? T(1) : T(0); });
+	  COMPARE(V(1) >> seq, expect) << "\nseq = " << seq;
+	  COMPARE(make_value_unknown(V(1)) >> make_value_unknown(seq), expect)
+		<< "\nseq = " << seq;
 	}
 	  for_constexpr([](auto shift_ic) {
 	constexpr int shift = shift_ic;

[PATCH] libstdc++: Fix test assumptions on long and long double

OK for master and all backports (after 11.4 is done)

tested on powerpc64le-linux-gnu (with 64-bit long double)

--- 8< 

Expect that long might not fit into the long double mantissa bits.

Signed-off-by: Matthias Kretz 

libstdc++-v3/ChangeLog:

* testsuite/experimental/simd/tests/operator_cvt.cc: Make long
double <-> (u)long conversion tests conditional on sizeof(long
double) and sizeof(long).
---
 .../experimental/simd/tests/operator_cvt.cc   | 30 +++
 1 file changed, 24 insertions(+), 6 deletions(-)


--
──
 Dr. Matthias Kretz   https://mattkretz.github.io
 GSI Helmholtz Centre for Heavy Ion Research   https://gsi.de
 stdₓ::simd
──diff --git a/libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc b/libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc
index c1acfdf10e0..9b6cb38ff82 100644
--- a/libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc
+++ b/libstdc++-v3/testsuite/experimental/simd/tests/operator_cvt.cc
@@ -219,8 +219,6 @@ namespace simd_abi
 	binary_op_return_type();
 	binary_op_return_type();
 	binary_op_return_type();
-	binary_op_return_type();
-	binary_op_return_type();
 	binary_op_return_type();
 	binary_op_return_type();
 
@@ -230,8 +228,6 @@ namespace simd_abi
 	binary_op_return_type, ushort>();
 	binary_op_return_type, int>();
 	binary_op_return_type, uint>();
-	binary_op_return_type, long>();
-	binary_op_return_type, ulong>();
 	binary_op_return_type, float>();
 	binary_op_return_type, double>();
 	binary_op_return_type, vf64>();
@@ -244,8 +240,6 @@ namespace simd_abi
 	binary_op_return_type, ushort>();
 	binary_op_return_type, int>();
 	binary_op_return_type, uint>();
-	binary_op_return_type, long>();
-	binary_op_return_type, ulong>();
 	binary_op_return_type, float>();
 	binary_op_return_type, double>();
 
@@ -257,6 +251,24 @@ namespace simd_abi
 	VERIFY((is_substitution_failure, ullong>));
 	VERIFY((is_substitution_failure, llong>));
 	VERIFY((is_substitution_failure, ullong>));
+	if constexpr (sizeof(long) == sizeof(llong))
+	  {
+		VERIFY((is_substitution_failure));
+		VERIFY((is_substitution_failure));
+		VERIFY((is_substitution_failure, long>));
+		VERIFY((is_substitution_failure, ulong>));
+		VERIFY((is_substitution_failure, long>));
+		VERIFY((is_substitution_failure, ulong>));
+	  }
+	else
+	  {
+		binary_op_return_type();
+		binary_op_return_type();
+		binary_op_return_type, long>();
+		binary_op_return_type, ulong>();
+		binary_op_return_type, long>();
+		binary_op_return_type, ulong>();
+	  }
 	  }
 	else
 	  {
@@ -266,6 +278,12 @@ namespace simd_abi
 	binary_op_return_type, ullong>();
 	binary_op_return_type, llong>();
 	binary_op_return_type, ullong>();
+	binary_op_return_type();
+	binary_op_return_type();
+	binary_op_return_type, long>();
+	binary_op_return_type, ulong>();
+	binary_op_return_type, long>();
+	binary_op_return_type, ulong>();
 	  }
 
 	VERIFY((is_substitution_failure, vldouble>));

[committed] libstdc++: Resolve -Wsign-compare issue

pushed to master, will backport later

tested on x86_64-pc-linux-gnu and powerpc64le-linux-gnu

--- 8< 


Signed-off-by: Matthias Kretz 

libstdc++-v3/ChangeLog:

* include/experimental/bits/simd_ppc.h (_S_bit_shift_left):
Negative __y is UB, so prefer signed compare.
---
 libstdc++-v3/include/experimental/bits/simd_ppc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


--
──
 Dr. Matthias Kretz   https://mattkretz.github.io
 GSI Helmholtz Centre for Heavy Ion Research   https://gsi.de
 stdₓ::simd
──diff --git a/libstdc++-v3/include/experimental/bits/simd_ppc.h b/libstdc++-v3/include/experimental/bits/simd_ppc.h
index 2ea7234bd99..34daa530f02 100644
--- a/libstdc++-v3/include/experimental/bits/simd_ppc.h
+++ b/libstdc++-v3/include/experimental/bits/simd_ppc.h
@@ -64,7 +64,7 @@ _S_bit_shift_left(_SimdWrapper<_Tp, _Np> __x, int __y)
 	__x = _Base::_S_bit_shift_left(__x, __y);
 	if constexpr (sizeof(_Tp) < sizeof(int))
 	  {
-	if (__y >= sizeof(_Tp) * __CHAR_BIT__)
+	if (__y >= int(sizeof(_Tp) * __CHAR_BIT__))
 	  return {};
 	  }
 	return __x;

Re: Re: [PATCH] RISC-V: Add RVV FMA auto-vectorization support

2023-05-26 Thread 钟居哲


Hi, Robin.

>> Can you explain these two points (3 and 4, maybe 2) a bit in the comments?
>> I.e. what makes fma different from a normal insn?
You can take a lookt at vector.md. The ternary instruction pattern has 
operands[0] operands[1] operands[2] operands[3] operands[4] operands[5] :

operands[0] = operands[1] ? operands[2] * operands[3] + operands[4] : 
operands[5]
These operands are not necessary the same RTX but we should make them overlap.
Why have operands[5] ? Since we will have len_cond_fma.
So I want to lower simple fma pattern into patterns I define in vector.md.
operands[5] should be operands[1] if operands[1] overlap operand[0] --->vmacc
or operands[3] if operands[3] overlap operand[0] -->vmadd

>>We only have three alternatives here.
Address in V2.

>>We have a bit of naming overlap between "insn" an "op" already.  I would go
>>with just ternay_insn or tern_insn here.  That the insn_types have OP in
>>their name is unfortunate but let's keep that for now.
Ok


>>Can we call data_mode dest_mode here?  data_mode imho only makes sense in
>>the context of conditionals where we have a comparison mode and a data mode.
>>I mean you could argue we always have a data mode and a mask mode so the
>>naming makes sense again but then we should get rid of dest_mode.

ok

>> __restrict vs restrict.

ok

>>Why the difference here?  Why do we need to restrict the optimization here
>>anyway?
Ok


>>Btw. any reason why you don't include fms, vnmsac in the patch?  Wouldn't the
>>patterns be really similar or do you have other plans for those?  Not needed
>>for this patch, just curious.
I want to make patch small and simple enough to review. After this patch is 
merged,
I will post fms.

Thanks.


juzhe.zh...@rivai.ai
 
From: Robin Dapp
Date: 2023-05-26 18:16
To: juzhe.zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; palmer; palmer; jeffreyalaw; pan2.li
Subject: Re: [PATCH] RISC-V: Add RVV FMA auto-vectorization support
Hi Juzhe,
 
> +;; We can't expand FMA for the following reasons:
 
But we do :)  We just haven't selected the proper alternative yet.
 
> +;; 1. Before RA, we don't know which multiply-add instruction is the ideal 
> one.
> +;;The vmacc is the ideal instruction when operands[3] overlaps 
> operands[0].
> +;;The vmadd is the ideal instruction when operands[1|2] overlaps 
> operands[0].
> +;; 2. According to vector.md, the multiply-add patterns has 'merge' operand 
> which
> +;;is the operands[5]. Since operands[5] should overlap operands[0], this 
> operand
> +;;should be allocated the same regno as operands[1|2|3].
> +;; 3. The 'merge' operand is always a real merge operand and we don't allow 
> undefined
> +;;operand.
> +;; 3. The operation of FMA pattern needs VLMAX vsetlvi which needs a VL 
> operand.
 
Can you explain these two points (3 and 4, maybe 2) a bit in the comments?
I.e. what makes fma different from a normal insn?
 
> +(define_insn_and_split "*fma"
> +  [(set (match_operand:VI 0 "register_operand" "=vr, vr, ?")
> + (plus:VI
> +   (mult:VI
> + (match_operand:VI 1 "register_operand" " %0, vr,   vr")
> + (match_operand:VI 2 "register_operand" " vr, vr,   vr"))
> +   (match_operand:VI 3 "register_operand"   " vr,  0,   vr")))
> +   (clobber (match_scratch:SI 4 "=r,r,r"))]
> +  "TARGET_VECTOR"
> +  "#"
> +  "&& reload_completed"
> +  [(const_int 0)]
> +  {
> +PUT_MODE (operands[4], Pmode);
> +riscv_vector::emit_vlmax_vsetvl (mode, operands[4]);
> +if (which_alternative == 3)
 
We only have three alternatives here.
 
> +  emit_insn (gen_rtx_SET (operands[0], operands[3]));
> +rtx ops[] = {operands[0], operands[1], operands[2], operands[3], 
> operands[0]};
> +riscv_vector::emit_vlmax_ternop_insn (code_for_pred_mul_plus 
> (mode),
> +   riscv_vector::RVV_TERNOP, ops, operands[4]);
> +DONE;
> +  }
> +  [(set_attr "type" "vimuladd")
> +   (set_attr "mode" "")])
> diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
> index 36419c95bbd..86b2798fb5e 100644
> --- a/gcc/config/riscv/riscv-protos.h
> +++ b/gcc/config/riscv/riscv-protos.h
> @@ -140,6 +140,7 @@ enum insn_type
>RVV_MERGE_OP = 4,
>RVV_CMP_OP = 4,
>RVV_CMP_MU_OP = RVV_CMP_OP + 2, /* +2 means mask and maskoff operand.  */
> +  RVV_TERNOP = 5,
>  };
 
> +emit_vlmax_ternop_insn (unsigned icode, int op_num, rtx *ops, rtx vl)
 
We have a bit of naming overlap between "insn" an "op" already.  I would go
with just ternay_insn or tern_insn here.  That the insn_types have OP in
their name is unfortunate but let's keep that for now. 
 
> +  machine_mode data_mode = GET_MODE (ops[0]);
> +  machine_mode mask_mode = get_mask_mode (data_mode).require ();
> +  /* We have a maximum of 11 operands for RVV instruction patterns according 
> to
> +   * vector.md.  */
> +  insn_expander<11> e (/*OP_NUM*/ op_num, /*HAS_DEST_P*/ true,
> +/*FULLY_UNMASKED_P*/ true,
> +/*USE_REAL_MERGE_P*/ true, /*HAS_AVL_P*/ true,
> +

Re: [PATCH 3/3] xtensa: Rework 'setmemsi' insn pattern

2023-05-26 Thread Max Filippov via Gcc-patches

On Thu, May 25, 2023 at 8:13 AM Takayuki 'January June' Suwa
 wrote:
>
> In order to reject voodoo estimation logic with lots of magic numbers,
> this patch revises the code to measure the costs of the three memset
> methods based on the actual emission size of the insn sequence
> corresponding to each method and choose the smallest one.
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa-protos.h
> (xtensa_expand_block_set_unrolled_loop,
> xtensa_expand_block_set_small_loop): Remove.
> (xtensa_expand_block_set): New prototype.
> * config/xtensa/xtensa.cc
> (xtensa_expand_block_set_libcall): New subfunction.
> (xtensa_expand_block_set_unrolled_loop,
> xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
> (xtensa_expand_block_set): New function that calls the above
> subfunctions.
> * config/xtensa/xtensa.md (memsetsi): Change to invoke only
> xtensa_expand_block_set().
> ---
>  gcc/config/xtensa/xtensa-protos.h |   3 +-
>  gcc/config/xtensa/xtensa.cc   | 319 --
>  gcc/config/xtensa/xtensa.md   |   4 +-
>  3 files changed, 172 insertions(+), 154 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

--
Thanks.
-- Max

Re: [PATCH 2/3] xtensa: Add 'subtraction from constant' insn pattern

2023-05-26 Thread Max Filippov via Gcc-patches

On Thu, May 25, 2023 at 8:13 AM Takayuki 'January June' Suwa
 wrote:
>
> This patch makes try to eliminate using temporary pseudo for
> '(minus:SI (const_int) (reg:SI))' if the addition of negative constant
> value can be emitted in a single machine instruction.
>
> /* example */
> int test0(int x) {
>   return 1 - x;
> }
> int test1(int x) {
>   return 100 - x;
> }
> int test2(int x) {
>   return 25600 - x;
> }
>
> ;; before
> test0:
> movi.n  a9, 1
> sub a2, a9, a2
> ret.n
> test1:
> movia9, 0x64
> sub a2, a9, a2
> ret.n
> test2:
> movi.n  a9, 0x19
> sllia9, a9, 10
> sub a2, a9, a2
> ret.n
>
> ;; after
> test0:
> addi.n  a2, a2, -1
> neg a2, a2
> ret.n
> test1:
> addia2, a2, -100
> neg a2, a2
> ret.n
> test2:
> addmi   a2, a2, -0x6400
> neg a2, a2
> ret.n
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
> New prototype.
> * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
> New function.
> * config/xtensa/constraints.md (O):
> Change to use the above function.
> * config/xtensa/xtensa.md (*subsi3_from_const):
> New insn_and_split pattern.
> ---
>  gcc/config/xtensa/constraints.md  |  2 +-
>  gcc/config/xtensa/xtensa-protos.h |  1 +
>  gcc/config/xtensa/xtensa.cc   |  7 +++
>  gcc/config/xtensa/xtensa.md   | 24 
>  4 files changed, 33 insertions(+), 1 deletion(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master.

-- 
Thanks.
-- Max

Re: [PATCH 1/3] xtensa: Addendum of the commit e33d2dcb463161a110ac345a451132ce8b2b23d9

2023-05-26 Thread Max Filippov via Gcc-patches

On Thu, May 25, 2023 at 8:13 AM Takayuki 'January June' Suwa
 wrote:
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
> Retract excessive line folding, and correct the value of
> the "length" insn attribute related to TARGET_DENSITY.
> (*extzvsi-1bit_addsubx): Ditto.
> ---
>  gcc/config/xtensa/xtensa.md | 11 ++-
>  1 file changed, 6 insertions(+), 5 deletions(-)

Regtested for target=xtensa-linux-uclibc, no new regressions.
Committed to master with a more readable subject line.

-- 
Thanks.
-- Max

Re: [PATCH] RISC-V: Add RVV FMA auto-vectorization support

Hi Juzhe,

> +;; We can't expand FMA for the following reasons:

But we do :)  We just haven't selected the proper alternative yet.

> +;; 1. Before RA, we don't know which multiply-add instruction is the ideal 
> one.
> +;;The vmacc is the ideal instruction when operands[3] overlaps 
> operands[0].
> +;;The vmadd is the ideal instruction when operands[1|2] overlaps 
> operands[0].
> +;; 2. According to vector.md, the multiply-add patterns has 'merge' operand 
> which
> +;;is the operands[5]. Since operands[5] should overlap operands[0], this 
> operand
> +;;should be allocated the same regno as operands[1|2|3].
> +;; 3. The 'merge' operand is always a real merge operand and we don't allow 
> undefined
> +;;operand.
> +;; 3. The operation of FMA pattern needs VLMAX vsetlvi which needs a VL 
> operand.

Can you explain these two points (3 and 4, maybe 2) a bit in the comments?
I.e. what makes fma different from a normal insn?

> +(define_insn_and_split "*fma"
> +  [(set (match_operand:VI 0 "register_operand" "=vr, vr, ?")
> + (plus:VI
> +   (mult:VI
> + (match_operand:VI 1 "register_operand" " %0, vr,   vr")
> + (match_operand:VI 2 "register_operand" " vr, vr,   vr"))
> +   (match_operand:VI 3 "register_operand"   " vr,  0,   vr")))
> +   (clobber (match_scratch:SI 4 "=r,r,r"))]
> +  "TARGET_VECTOR"
> +  "#"
> +  "&& reload_completed"
> +  [(const_int 0)]
> +  {
> +PUT_MODE (operands[4], Pmode);
> +riscv_vector::emit_vlmax_vsetvl (mode, operands[4]);
> +if (which_alternative == 3)

We only have three alternatives here.

> +  emit_insn (gen_rtx_SET (operands[0], operands[3]));
> +rtx ops[] = {operands[0], operands[1], operands[2], operands[3], 
> operands[0]};
> +riscv_vector::emit_vlmax_ternop_insn (code_for_pred_mul_plus 
> (mode),
> +   riscv_vector::RVV_TERNOP, ops, 
> operands[4]);
> +DONE;
> +  }
> +  [(set_attr "type" "vimuladd")
> +   (set_attr "mode" "")])
> diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
> index 36419c95bbd..86b2798fb5e 100644
> --- a/gcc/config/riscv/riscv-protos.h
> +++ b/gcc/config/riscv/riscv-protos.h
> @@ -140,6 +140,7 @@ enum insn_type
>RVV_MERGE_OP = 4,
>RVV_CMP_OP = 4,
>RVV_CMP_MU_OP = RVV_CMP_OP + 2, /* +2 means mask and maskoff operand.  */
> +  RVV_TERNOP = 5,
>  };

> +emit_vlmax_ternop_insn (unsigned icode, int op_num, rtx *ops, rtx vl)

We have a bit of naming overlap between "insn" an "op" already.  I would go
with just ternay_insn or tern_insn here.  That the insn_types have OP in
their name is unfortunate but let's keep that for now. 

> +  machine_mode data_mode = GET_MODE (ops[0]);
> +  machine_mode mask_mode = get_mask_mode (data_mode).require ();
> +  /* We have a maximum of 11 operands for RVV instruction patterns according 
> to
> +   * vector.md.  */
> +  insn_expander<11> e (/*OP_NUM*/ op_num, /*HAS_DEST_P*/ true,
> +/*FULLY_UNMASKED_P*/ true,
> +/*USE_REAL_MERGE_P*/ true, /*HAS_AVL_P*/ true,
> +/*VLMAX_P*/ true,
> +/*DEST_MODE*/ data_mode, /*MASK_MODE*/ mask_mode);

Can we call data_mode dest_mode here?  data_mode imho only makes sense in
the context of conditionals where we have a comparison mode and a data mode.
I mean you could argue we always have a data mode and a mask mode so the
naming makes sense again but then we should get rid of dest_mode.

> +  /* According to LRA mov pattern in vector.md, we have a clobber operand
> + to be used ad VL operand.  */
> +  e.set_vl (vl);

How does the LRA mov pattern (mov_lra?) come into play here?  I know the same
line is already in emit_vlmax_insn but it also is odd there.  What we actually
do is pass either NULL as length (before lra/reload) or a pre-allocated scratch
that we can use as vlmax length.

> +#include 
> +
> +#define TEST_TYPE(TYPE)  
>   \
> +  __attribute__ ((noipa)) void ternop_##TYPE (TYPE *__restrict dst,  
>   \
> +   TYPE *__restrict a,  \
> +   TYPE *__restrict b, int n)   \

> +#define TEST_TYPE(TYPE)  
>   \
> +  __attribute__ ((noipa)) void ternop_##TYPE (TYPE *restrict dest1,  
>   \
> +   TYPE *restrict dest2,\
> +   TYPE *restrict dest3,\
> +   TYPE *restrict src1, \
> +   TYPE *restrict src2, int n)  

__restrict vs restrict.

> +int __attribute__ ((optimize (1))) main ()
> +int __attribute__ ((optimize (0))) main ()
Why the difference here?  Why do we need to restrict the optimization here
anyway?

Btw. any reason why you don't include

Re: [PATCH RFC] c++: use __cxa_call_terminate for MUST_NOT_THROW [PR97720]

2023-05-26 Thread Bernhard Reutner-Fischer via Gcc-patches

On Wed, 24 May 2023 at 19:56, Jason Merrill via Libstdc++ <
libstd...@gcc.gnu.org> wrote:

> Middle-end folks: any thoughts about how best to make the change described
> in
> the last paragraph below?
>
> Library folks: any thoughts on the changes to __cxa_call_terminate?
>

I see no harm in exporting it (with the adjusted signature). The "looks
standard but isn't" name is a little unfortunate, but not a big deal.


>
> -- 8< --
>
> [except.handle]/7 says that when we enter std::terminate due to a throw,
> that is considered an active handler.  We already implemented that properly
> for the case of not finding a handler (__cxa_throw calls __cxa_begin_catch
> before std::terminate) and the case of finding a callsite with no landing
> pad (the personality function calls __cxa_call_terminate which calls
> __cxa_begin_catch), but for the case of a throw in a try/catch in a
> noexcept
> function, we were emitting a cleanup that calls std::terminate directly
> without ever calling __cxa_begin_catch to handle the exception.
>
> A straightforward way to fix this seems to be calling __cxa_call_terminate
> instead.  However, that requires exporting it from libstdc++, which we have
> not previously done.  Despite the name, it isn't actually part of the ABI
> standard.  Nor is __cxa_call_unexpected, as far as I can tell, but that one
> is also used by clang.  For this case they use __clang_call_terminate; it
> seems reasonable to me for us to stick with __cxa_call_terminate.
>
> I also change __cxa_call_terminate to take void* for simplicity in the
> front
> end (and consistency with __cxa_call_unexpected) but that isn't necessary
> if
> it's undesirable for some reason.
>
> This patch does not fix the issue that representing the noexcept as a
> cleanup is wrong, and confuses the handler search; since it looks like a
> cleanup in the EH tables, the unwinder keeps looking until it finds the
> catch in main(), which it should never have gotten to.  Without the
> try/catch in main, the unwinder would reach the end of the stack and say no
> handler was found.  The noexcept is a handler, and should be treated as
> one,
> as it is when the landing pad is omitted.
>
> The best fix for that issue seems to me to be to represent an
> ERT_MUST_NOT_THROW after an ERT_TRY in an action list as though it were an
> ERT_ALLOWED_EXCEPTIONS (since indeed it is an exception-specification).
> The
> actual code generation shouldn't need to change (apart from the change made
> by this patch), only the action table entry.
>
> PR c++/97720
>
> gcc/cp/ChangeLog:
>
> * cp-tree.h (enum cp_tree_index): Add CPTI_CALL_TERMINATE_FN.
> (call_terminate_fn): New macro.
> * cp-gimplify.cc (gimplify_must_not_throw_expr): Use it.
> * except.cc (init_exception_processing): Set it.
> (cp_protect_cleanup_actions): Return it.
>
> gcc/ChangeLog:
>
> * tree-eh.cc (lower_resx): Pass the exception pointer to the
> failure_decl.
> * except.h: Tweak comment.
>
> libstdc++-v3/ChangeLog:
>
> * libsupc++/eh_call.cc (__cxa_call_terminate): Take void*.
> * config/abi/pre/gnu.ver: Add it.
>
> gcc/testsuite/ChangeLog:
>
> * g++.dg/eh/terminate2.C: New test.
> ---
>  gcc/cp/cp-tree.h |  2 ++
>  gcc/except.h |  2 +-
>  gcc/cp/cp-gimplify.cc|  2 +-
>  gcc/cp/except.cc |  5 -
>  gcc/testsuite/g++.dg/eh/terminate2.C | 30 
>  gcc/tree-eh.cc   | 16 ++-
>  libstdc++-v3/libsupc++/eh_call.cc|  4 +++-
>  libstdc++-v3/config/abi/pre/gnu.ver  |  7 +++
>  8 files changed, 63 insertions(+), 5 deletions(-)
>  create mode 100644 gcc/testsuite/g++.dg/eh/terminate2.C
>
> diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h
> index a1b882f11fe..a8465a988b5 100644
> --- a/gcc/cp/cp-tree.h
> +++ b/gcc/cp/cp-tree.h
> @@ -217,6 +217,7 @@ enum cp_tree_index
> definitions.  */
>  CPTI_ALIGN_TYPE,
>  CPTI_TERMINATE_FN,
> +CPTI_CALL_TERMINATE_FN,
>  CPTI_CALL_UNEXPECTED_FN,
>
>  /* These are lazily inited.  */
> @@ -358,6 +359,7 @@ extern GTY(()) tree cp_global_trees[CPTI_MAX];
>  /* Exception handling function declarations.  */
>  #define terminate_fn   cp_global_trees[CPTI_TERMINATE_FN]
>  #define call_unexpected_fn
>  cp_global_trees[CPTI_CALL_UNEXPECTED_FN]
> +#define call_terminate_fn
> cp_global_trees[CPTI_CALL_TERMINATE_FN]
>  #define get_exception_ptr_fn
>  cp_global_trees[CPTI_GET_EXCEPTION_PTR_FN]
>  #define begin_catch_fn
>  cp_global_trees[CPTI_BEGIN_CATCH_FN]
>  #define end_catch_fn   cp_global_trees[CPTI_END_CATCH_FN]
> diff --git a/gcc/except.h b/gcc/except.h
> index 5ecdbc0d1dc..378a9e4cb77 100644
> --- a/gcc/except.h
> +++ b/gcc/except.h
> @@ -155,7 +155,7 @@ struct GTY(()) eh_region_d
>  struct eh_region_u_must_not_throw {
>/* A function decl to be invoked if this region

[PATCH] RISC-V: Add RVV FMA auto-vectorization support

2023-05-26 Thread juzhe . zhong

From: Juzhe-Zhong 

This patch support FMA auto-vectorization pattern.
1. Let's RA decide vmacc or vmadd.
2. Fix bug of vector.md which generate incorrect information to VSETVL
   PASS when testing ternop-3.c.

gcc/ChangeLog:

* config/riscv/autovec.md (fma4): New pattern.
(*fma): Ditto.
* config/riscv/riscv-protos.h (enum insn_type): Add ternary enum.
(emit_vlmax_ternop_insn): New function.
* config/riscv/riscv-v.cc (emit_vlmax_ternop_insn): Ditto.
* config/riscv/vector.md: Fix ternary patterns bug.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/rvv.exp: Add ternop tests.
* gcc.target/riscv/rvv/autovec/ternop/ternop-1.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop-2.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop-3.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-2.c: New test.
* gcc.target/riscv/rvv/autovec/ternop/ternop_run-3.c: New test.

---
 gcc/config/riscv/autovec.md   |  65 +++
 gcc/config/riscv/riscv-protos.h   |   2 +
 gcc/config/riscv/riscv-v.cc   |  22 
 gcc/config/riscv/vector.md|   2 +-
 .../riscv/rvv/autovec/ternop/ternop-1.c   |  27 +
 .../riscv/rvv/autovec/ternop/ternop-2.c   |  33 ++
 .../riscv/rvv/autovec/ternop/ternop-3.c   |  33 ++
 .../riscv/rvv/autovec/ternop/ternop_run-1.c   |  84 ++
 .../riscv/rvv/autovec/ternop/ternop_run-2.c   | 104 ++
 .../riscv/rvv/autovec/ternop/ternop_run-3.c   | 104 ++
 gcc/testsuite/gcc.target/riscv/rvv/rvv.exp|   2 +
 11 files changed, 477 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop-3.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run-1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run-2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/ternop/ternop_run-3.c

diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
index 7fe4d94de39..ba1240014dc 100644
--- a/gcc/config/riscv/autovec.md
+++ b/gcc/config/riscv/autovec.md
@@ -373,3 +373,68 @@
 DONE;
   }
 )
+
+;; =
+;; == Ternary arithmetic
+;; =
+
+;; -
+;;  [INT] VMACC and VMADD
+;; -
+;; Includes:
+;; - vmacc
+;; - vmadd
+;; -
+
+;; We can't expand FMA for the following reasons:
+;; 1. Before RA, we don't know which multiply-add instruction is the ideal one.
+;;The vmacc is the ideal instruction when operands[3] overlaps operands[0].
+;;The vmadd is the ideal instruction when operands[1|2] overlaps 
operands[0].
+;; 2. According to vector.md, the multiply-add patterns has 'merge' operand 
which
+;;is the operands[5]. Since operands[5] should overlap operands[0], this 
operand
+;;should be allocated the same regno as operands[1|2|3].
+;; 3. The 'merge' operand is always a real merge operand and we don't allow 
undefined
+;;operand.
+;; 3. The operation of FMA pattern needs VLMAX vsetlvi which needs a VL 
operand.
+;;
+;; In this situation, we design the codegen of FMA as follows:
+;; 1. clobber a scratch in the expand pattern of FMA.
+;; 2. Let's RA decide which input operand (operands[1|2|3]) overlap 
operands[0].
+;; 3. Generate instructions (vmacc or vmadd) according to the register 
allocation
+;;result after reload_completed.
+(define_expand "fma4"
+  [(parallel
+[(set (match_operand:VI 0 "register_operand" "=vr")
+ (plus:VI
+   (mult:VI
+ (match_operand:VI 1 "register_operand" " vr")
+ (match_operand:VI 2 "register_operand" " vr"))
+   (match_operand:VI 3 "register_operand"   " vr")))
+ (clobber (match_scratch:SI 4))])]
+  "TARGET_VECTOR"
+  {})
+
+(define_insn_and_split "*fma"
+  [(set (match_operand:VI 0 "register_operand" "=vr, vr, ?")
+   (plus:VI
+ (mult:VI
+   (match_operand:VI 1 "register_operand" " %0, vr,   vr")
+   (match_operand:VI 2 "register_operand" " vr, vr,   vr"))
+ (match_operand:VI 3 "register_operand"   " vr,  0,   vr")))
+   (clobber (match_scratch:SI 4 "=r,r,r"))]
+  "TARGET_VECTOR"
+  "#"
+  "&& reload_completed"
+  [(const_int 0)]
+  {
+PUT_MODE (operands[4], Pmode);
+riscv_vector::emit_vlmax_vsetvl (mode, operands[4]);
+

[Ping][PATCH] RISC-V: Optimize the MASK opt generation

2023-05-26 Thread Feng Wang

Ping, I will rebase if the change is fine to you, thanks!

On 2023-03-01 09:46  Feng Wang wrote:
>
>The Mask flag in the single TargetVariable is not enough due to more
>and more extensions were added.So I optimize the defination of Mask
>flag, please refer to the below case:
>There are some new MASK flags for 'v' extension(ZVL32B,ZVL64B,...,ZVL65536B),
>but these MASK flags can't store into x_target_flags,because the total number
>of MASK flags exceed 32. In this patch we can write it like this in this 
>scence.
>
>TargetVariable
>int riscv_zvl_flags
>
>Mask(ZVL32B) in TargetVariable(riscv_zvl_flags)
>
>The corresponding MASK and TARGET will be automatically generated.
>
>gcc/ChangeLog:
>
>    * config/riscv/riscv-opts.h   Delete below definations
>    (MASK_ZICSR): Delete;
>    (MASK_ZIFENCEI): Delete;
>    (TARGET_ZICSR): Delete;
>    (TARGET_ZIFENCEI): Delete;
>    (MASK_ZAWRS): Delete;
>    (TARGET_ZAWRS): Delete;
>    (MASK_ZBA): Delete;
>    (MASK_ZBB): Delete;
>    (MASK_ZBC): Delete;
>    (MASK_ZBS): Delete;
>    (TARGET_ZBA): Delete;
>    (TARGET_ZBB): Delete;
>    (TARGET_ZBC): Delete;
>    (TARGET_ZBS): Delete;
>    (MASK_ZFINX): Delete;
>    (MASK_ZDINX): Delete;
>    (MASK_ZHINX): Delete;
>    (MASK_ZHINXMIN): Delete;
>    (TARGET_ZFINX): Delete;
>    (TARGET_ZDINX): Delete;
>    (TARGET_ZHINX): Delete;
>    (TARGET_ZHINXMIN): Delete;
>    (MASK_ZBKB): Delete;
>    (MASK_ZBKC): Delete;
>    (MASK_ZBKX): Delete;
>    (MASK_ZKNE): Delete;
>    (MASK_ZKND): Delete;
>    (MASK_ZKNH): Delete;
>    (MASK_ZKR): Delete;
>    (MASK_ZKSED): Delete;
>    (MASK_ZKSH): Delete;
>    (MASK_ZKT): Delete;
>    (TARGET_ZBKB): Delete;
>    (TARGET_ZBKC): Delete;
>    (TARGET_ZBKX): Delete;
>    (TARGET_ZKNE): Delete;
>    (TARGET_ZKND): Delete;
>    (TARGET_ZKNH): Delete;
>    (TARGET_ZKR): Delete;
>    (TARGET_ZKSED): Delete;
>    (TARGET_ZKSH): Delete;
>    (TARGET_ZKT): Delete;
>    (MASK_VECTOR_ELEN_32): Delete;
>    (MASK_VECTOR_ELEN_64): Delete;
>    (MASK_VECTOR_ELEN_FP_32): Delete;
>    (MASK_VECTOR_ELEN_FP_64): Delete;
>    (TARGET_VECTOR_ELEN_32): Delete;
>    (TARGET_VECTOR_ELEN_64): Delete;
>    (TARGET_VECTOR_ELEN_FP_32): Delete;
>    (TARGET_VECTOR_ELEN_FP_64): Delete;
>    (MASK_ZVL32B): Delete;
>    (MASK_ZVL64B): Delete;
>    (MASK_ZVL128B): Delete;
>    (MASK_ZVL256B): Delete;
>    (MASK_ZVL512B): Delete;
>    (MASK_ZVL1024B): Delete;
>    (MASK_ZVL2048B): Delete;
>    (MASK_ZVL4096B): Delete;
>    (MASK_ZVL8192B): Delete;
>    (MASK_ZVL16384B): Delete;
>    (MASK_ZVL32768B): Delete;
>    (MASK_ZVL65536B): Delete;
>    (TARGET_ZVL32B): Delete;
>    (TARGET_ZVL64B): Delete;
>    (TARGET_ZVL128B): Delete;
>    (TARGET_ZVL256B): Delete;
>    (TARGET_ZVL512B): Delete;
>    (TARGET_ZVL1024B): Delete;
>    (TARGET_ZVL2048B): Delete;
>    (TARGET_ZVL4096B): Delete;
>    (TARGET_ZVL8192B): Delete;
>    (TARGET_ZVL16384B): Delete;
>    (TARGET_ZVL32768B): Delete;
>    (TARGET_ZVL65536B): Delete;
>    (MASK_ZICBOZ): Delete;
>    (MASK_ZICBOM): Delete;
>    (MASK_ZICBOP): Delete;
>    (TARGET_ZICBOZ): Delete;
>    (TARGET_ZICBOM): Delete;
>    (TARGET_ZICBOP): Delete;
>    (MASK_ZFHMIN): Delete;
>    (MASK_ZFH): Delete;
>    (TARGET_ZFHMIN): Delete;
>    (TARGET_ZFH): Delete;
>    (MASK_ZMMUL): Delete;
>    (TARGET_ZMMUL): Delete;
>    (MASK_SVINVAL): Delete;
>    (MASK_SVNAPOT): Delete;
>    (TARGET_SVINVAL): Delete;
>    (TARGET_SVNAPOT): Delete;
>    * config/riscv/riscv.opt: Add new Mask defination.
>    * opt-functions.awk:  Add new function to find the index
>  of target variable from extra_target_vars.
>    * opt-read.awk:   Add new function to store the Mask flags.
>    * opth-gen.awk:   Add new function to output the defination of
>  Mask Macro and Target Macro.
>---
> gcc/config/riscv/riscv-opts.h | 115 --
> gcc/config/riscv/riscv.opt    |  90 ++
> gcc/opt-functions.awk |  11 
> gcc/opt-read.awk  |  16 -
> gcc/opth-gen.awk  |  22 +++
> 5 files changed, 138 insertions(+), 116 deletions(-)
>
>diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
>index 25fd85b09b1..7cf28838cb5 100644
>--- a/gcc/config/riscv/riscv-opts.h
>+++ b/gcc/config/riscv/riscv-opts.h
>@@ -66,121 +66,6 @@ enum stack_protector_guard {
>   SSP_TLS,/* per-thread canary in TLS block */
>   SSP_GLOBAL  /* global canary */
> };
>-
>-#define MASK_ZICSR    (1 << 0)
>-#define MASK_ZIFENCEI (1 << 1)
>-
>-#define TARGET_ZICSR    ((riscv_zi_subext &

Re: [PATCH] RISC-V: Optimize the MASK opt generation

2023-05-26 Thread Feng Wang

On 2023-03-01 09:46  Feng Wang wrote:
>
>The Mask flag in the single TargetVariable is not enough due to more
>and more extensions were added.So I optimize the defination of Mask
>flag, please refer to the below case:
>There are some new MASK flags for 'v' extension(ZVL32B,ZVL64B,...,ZVL65536B),
>but these MASK flags can't store into x_target_flags,because the total number
>of MASK flags exceed 32. In this patch we can write it like this in this 
>scence.
>
>TargetVariable
>int riscv_zvl_flags
>
>Mask(ZVL32B) in TargetVariable(riscv_zvl_flags)
>
>The corresponding MASK and TARGET will be automatically generated.
>
>gcc/ChangeLog:
>
>    * config/riscv/riscv-opts.h   Delete below definations
>    (MASK_ZICSR): Delete;
>    (MASK_ZIFENCEI): Delete;
>    (TARGET_ZICSR): Delete;
>    (TARGET_ZIFENCEI): Delete;
>    (MASK_ZAWRS): Delete;
>    (TARGET_ZAWRS): Delete;
>    (MASK_ZBA): Delete;
>    (MASK_ZBB): Delete;
>    (MASK_ZBC): Delete;
>    (MASK_ZBS): Delete;
>    (TARGET_ZBA): Delete;
>    (TARGET_ZBB): Delete;
>    (TARGET_ZBC): Delete;
>    (TARGET_ZBS): Delete;
>    (MASK_ZFINX): Delete;
>    (MASK_ZDINX): Delete;
>    (MASK_ZHINX): Delete;
>    (MASK_ZHINXMIN): Delete;
>    (TARGET_ZFINX): Delete;
>    (TARGET_ZDINX): Delete;
>    (TARGET_ZHINX): Delete;
>    (TARGET_ZHINXMIN): Delete;
>    (MASK_ZBKB): Delete;
>    (MASK_ZBKC): Delete;
>    (MASK_ZBKX): Delete;
>    (MASK_ZKNE): Delete;
>    (MASK_ZKND): Delete;
>    (MASK_ZKNH): Delete;
>    (MASK_ZKR): Delete;
>    (MASK_ZKSED): Delete;
>    (MASK_ZKSH): Delete;
>    (MASK_ZKT): Delete;
>    (TARGET_ZBKB): Delete;
>    (TARGET_ZBKC): Delete;
>    (TARGET_ZBKX): Delete;
>    (TARGET_ZKNE): Delete;
>    (TARGET_ZKND): Delete;
>    (TARGET_ZKNH): Delete;
>    (TARGET_ZKR): Delete;
>    (TARGET_ZKSED): Delete;
>    (TARGET_ZKSH): Delete;
>    (TARGET_ZKT): Delete;
>    (MASK_VECTOR_ELEN_32): Delete;
>    (MASK_VECTOR_ELEN_64): Delete;
>    (MASK_VECTOR_ELEN_FP_32): Delete;
>    (MASK_VECTOR_ELEN_FP_64): Delete;
>    (TARGET_VECTOR_ELEN_32): Delete;
>    (TARGET_VECTOR_ELEN_64): Delete;
>    (TARGET_VECTOR_ELEN_FP_32): Delete;
>    (TARGET_VECTOR_ELEN_FP_64): Delete;
>    (MASK_ZVL32B): Delete;
>    (MASK_ZVL64B): Delete;
>    (MASK_ZVL128B): Delete;
>    (MASK_ZVL256B): Delete;
>    (MASK_ZVL512B): Delete;
>    (MASK_ZVL1024B): Delete;
>    (MASK_ZVL2048B): Delete;
>    (MASK_ZVL4096B): Delete;
>    (MASK_ZVL8192B): Delete;
>    (MASK_ZVL16384B): Delete;
>    (MASK_ZVL32768B): Delete;
>    (MASK_ZVL65536B): Delete;
>    (TARGET_ZVL32B): Delete;
>    (TARGET_ZVL64B): Delete;
>    (TARGET_ZVL128B): Delete;
>    (TARGET_ZVL256B): Delete;
>    (TARGET_ZVL512B): Delete;
>    (TARGET_ZVL1024B): Delete;
>    (TARGET_ZVL2048B): Delete;
>    (TARGET_ZVL4096B): Delete;
>    (TARGET_ZVL8192B): Delete;
>    (TARGET_ZVL16384B): Delete;
>    (TARGET_ZVL32768B): Delete;
>    (TARGET_ZVL65536B): Delete;
>    (MASK_ZICBOZ): Delete;
>    (MASK_ZICBOM): Delete;
>    (MASK_ZICBOP): Delete;
>    (TARGET_ZICBOZ): Delete;
>    (TARGET_ZICBOM): Delete;
>    (TARGET_ZICBOP): Delete;
>    (MASK_ZFHMIN): Delete;
>    (MASK_ZFH): Delete;
>    (TARGET_ZFHMIN): Delete;
>    (TARGET_ZFH): Delete;
>    (MASK_ZMMUL): Delete;
>    (TARGET_ZMMUL): Delete;
>    (MASK_SVINVAL): Delete;
>    (MASK_SVNAPOT): Delete;
>    (TARGET_SVINVAL): Delete;
>    (TARGET_SVNAPOT): Delete;
>    * config/riscv/riscv.opt: Add new Mask defination.
>    * opt-functions.awk:  Add new function to find the index
>  of target variable from extra_target_vars.
>    * opt-read.awk:   Add new function to store the Mask flags.
>    * opth-gen.awk:   Add new function to output the defination of
>  Mask Macro and Target Macro.
>---
> gcc/config/riscv/riscv-opts.h | 115 --
> gcc/config/riscv/riscv.opt    |  90 ++
> gcc/opt-functions.awk |  11 
> gcc/opt-read.awk  |  16 -
> gcc/opth-gen.awk  |  22 +++
> 5 files changed, 138 insertions(+), 116 deletions(-)
>
>diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
>index 25fd85b09b1..7cf28838cb5 100644
>--- a/gcc/config/riscv/riscv-opts.h
>+++ b/gcc/config/riscv/riscv-opts.h
>@@ -66,121 +66,6 @@ enum stack_protector_guard {
>   SSP_TLS,/* per-thread canary in TLS block */
>   SSP_GLOBAL  /* global canary */
> };
>-
>-#define MASK_ZICSR    (1 << 0)
>-#define MASK_ZIFENCEI (1 << 1)
>-
>-#define TARGET_ZICSR    ((riscv_zi_subext & MASK_ZICSR) != 0)
>-#define TARGET_ZIFENCEI ((riscv_zi_subext &

Re: [i386 PATCH] A minor code clean-up: Use NULL_RTX instead of nullptr

On Thu, 25 May 2023 18:58:04 +0200
Bernhard Reutner-Fischer  wrote:

> On Wed, 24 May 2023 18:54:06 +0100
> "Roger Sayle"  wrote:
> 
> > My understanding is that GCC's preferred null value for rtx is NULL_RTX
> > (and for tree is NULL_TREE), and by being typed allows strict type checking,
> > and use with function polymorphism and template instantiation.
> > C++'s nullptr is preferred over NULL and 0 for pointer types that don't
> > have a defined null of the correct type.
> > 
> > This minor clean-up uses NULL_RTX consistently in i386-expand.cc.  
> 
> Oh. Well, i can't resist cleanups :)

> (and handle nullptr too, and the same game for tree)

so like the attached. And
sed -e 's/RTX/TREE/g' -e 's/rtx/tree/g' \
  < ~/coccinelle/gcc-rtx-null.0.cocci \
  > ~/coccinelle/gcc-tree-null.0.cocci

I do not know if we want to shorten explicit NULL comparisons.
 foo == NULL => !foo and foo != NULL => foo
Left them alone in the form they were written.

See the attached result of the rtx hunks, someone would have to build
it and hack git-commit-mklog.py --changelog 'Use NULL_RTX.'
to print("{}.".format(random.choice(['Ditto', 'Same', 'Likewise']))) ;)

> 
> Just a thought..

cheers,


gcc-rtx-null.0.cocci
Description: Binary data
diff --git a/gcc/alias.cc b/gcc/alias.cc
index 7dc7e06de07..f1925ab3de2 100644
--- a/gcc/alias.cc
+++ b/gcc/alias.cc
@@ -1725,7 +1725,7 @@ get_reg_known_value (unsigned int regno)
   if (regno < vec_safe_length (reg_known_value))
 	return (*reg_known_value)[regno];
 }
-  return NULL;
+  return NULL_RTX;
 }
 
 /* Set it.  */
diff --git a/gcc/auto-inc-dec.cc b/gcc/auto-inc-dec.cc
index 1486e8c679a..568fae7b906 100644
--- a/gcc/auto-inc-dec.cc
+++ b/gcc/auto-inc-dec.cc
@@ -428,7 +428,7 @@ move_dead_notes (rtx_insn *to_insn, rtx_insn *from_insn, rtx pattern)
 {
   rtx note;
   rtx next_note;
-  rtx prev_note = NULL;
+  rtx prev_note = NULL_RTX;
 
   for (note = REG_NOTES (from_insn); note; note = next_note)
 {
diff --git a/gcc/bb-reorder.cc b/gcc/bb-reorder.cc
index 615d5426a34..e42e4593a6a 100644
--- a/gcc/bb-reorder.cc
+++ b/gcc/bb-reorder.cc
@@ -1477,7 +1477,7 @@ sjlj_fix_up_crossing_landing_pad (basic_block old_bb)
 	rtx_insn *insn = BB_END (e->src);
 	rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
 
-	gcc_assert (note != NULL);
+	gcc_assert (note != NULL_RTX);
 	const unsigned old_index = INTVAL (XEXP (note, 0));
 
 	/* Generate the new landing-pad structure.  */
@@ -1525,7 +1525,7 @@ dw2_fix_up_crossing_landing_pad (eh_landing_pad old_lp, basic_block old_bb)
 	rtx_insn *insn = BB_END (e->src);
 	rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
 
-	gcc_assert (note != NULL);
+	gcc_assert (note != NULL_RTX);
 	gcc_checking_assert (INTVAL (XEXP (note, 0)) == old_lp->index);
 	XEXP (note, 0) = GEN_INT (new_lp->index);
 
diff --git a/gcc/builtins.cc b/gcc/builtins.cc
index 8400adaf5b4..48df3d4d193 100644
--- a/gcc/builtins.cc
+++ b/gcc/builtins.cc
@@ -985,7 +985,7 @@ expand_builtin_setjmp_receiver (rtx receiver_label)
 	}
 }
 
-  if (receiver_label != NULL && targetm.have_builtin_setjmp_receiver ())
+  if (receiver_label != NULL_RTX && targetm.have_builtin_setjmp_receiver ())
 emit_insn (targetm.gen_builtin_setjmp_receiver (receiver_label));
   else if (targetm.have_nonlocal_goto_receiver ())
 emit_insn (targetm.gen_nonlocal_goto_receiver ());
@@ -4118,7 +4118,7 @@ expand_builtin_strncpy (tree exp, rtx target)
 static rtx
 gen_memset_value_from_prev (by_pieces_prev *prev, fixed_size_mode mode)
 {
-  rtx target = nullptr;
+  rtx target = NULL_RTX;
   if (prev != nullptr && prev->data != nullptr)
 {
   /* Use the previous data in the same mode.  */
@@ -4179,7 +4179,7 @@ gen_memset_value_from_prev (by_pieces_prev *prev, fixed_size_mode mode)
 		break;
 		  }
 	  }
-	  if (target == nullptr)
+	  if (target == NULL_RTX)
 	prev_rtx = copy_to_reg (prev_rtx);
 	}
 
@@ -4203,7 +4203,7 @@ builtin_memset_read_str (void *data, void *prev,
 
   rtx target = gen_memset_value_from_prev ((by_pieces_prev *) prev,
 	   mode);
-  if (target != nullptr)
+  if (target != NULL_RTX)
 return target;
   rtx src = gen_int_mode (*c, QImode);
 
@@ -4250,7 +4250,7 @@ builtin_memset_gen_str (void *data, void *prev,
 return (rtx) data;
 
   target = gen_memset_value_from_prev ((by_pieces_prev *) prev, mode);
-  if (target != nullptr)
+  if (target != NULL_RTX)
 return target;
 
   if (VECTOR_MODE_P (mode))
@@ -6278,11 +6278,11 @@ expand_builtin_atomic_compare_exchange (machine_mode mode, tree exp,
 is_weak = true;
 
   if (target == const0_rtx)
-target = NULL;
+target = NULL_RTX;
 
   /* Lest the rtl backend create a race condition with an imporoper store
  to memory, always create a new pseudo for OLDVAL.  */
-  oldval = NULL;
+  oldval = NULL_RTX;
 
   if (!expand_atomic_compare_and_swap (, , mem, expect, desired,
    is_weak, success, failure))
@@ -6387,8 +6387,8 @@ expand_ifn_atomic_compare_exchange (gcall *call)

Re: [PATCH] RISC-V: Optimize TARGET_XTHEADCONDMOV

2023-05-26 Thread Philipp Tomsich

LGTM.  Happy to move this forward, once it receives an OK from one of you.

--Philipp.

On Fri, 26 May 2023 at 02:53, Die Li  wrote:
>
> This patch allows less instructions to be used when TARGET_XTHEADCONDMOV is 
> enabled.
>
> Provide an example from the existing testcases.
>
> Testcase:
> int ConEmv_imm_imm_reg(int x, int y){
>   if (x == 1000) return 10;
>   return y;
> }
>
> Cflags:
> -O2 -march=rv64gc_xtheadcondmov -mabi=lp64d
>
> before patch:
> ConEmv_imm_imm_reg:
> addia5,a0,-1000
> li  a0,10
> th.mvneza0,zero,a5
> th.mveqza1,zero,a5
> or  a0,a0,a1
> ret
>
> after patch:
> ConEmv_imm_imm_reg:
> addia5,a0,-1000
> li  a0,10
> th.mvneza0,a1,a5
> ret
>
> Signed-off-by: Die Li 
>
> gcc/ChangeLog:
>
> * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided): 
> Delete.
> (riscv_expand_conditional_move):  Reuse the TARGET_SFB_ALU expand 
> process for TARGET_XTHEADCONDMOV
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/xtheadcondmov-indirect-rv32.c: Update the output.
> * gcc.target/riscv/xtheadcondmov-indirect-rv64.c: Likewise.
> ---
>  gcc/config/riscv/riscv.cc | 44 +++--
>  .../riscv/xtheadcondmov-indirect-rv32.c   | 48 +++
>  .../riscv/xtheadcondmov-indirect-rv64.c   | 48 +++
>  3 files changed, 42 insertions(+), 98 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 09fc9e5d95e..8b8ac9181ba 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -3442,37 +3442,6 @@ riscv_expand_conditional_branch (rtx label, rtx_code 
> code, rtx op0, rtx op1)
>emit_jump_insn (gen_condjump (condition, label));
>  }
>
> -/* Helper to emit two one-sided conditional moves for the movecc.  */
> -
> -static void
> -riscv_expand_conditional_move_onesided (rtx dest, rtx cons, rtx alt,
> -   rtx_code code, rtx op0, rtx op1)
> -{
> -  machine_mode mode = GET_MODE (dest);
> -
> -  gcc_assert (GET_MODE_CLASS (mode) == MODE_INT);
> -  gcc_assert (reg_or_0_operand (cons, mode));
> -  gcc_assert (reg_or_0_operand (alt, mode));
> -
> -  riscv_emit_int_compare (, , , true);
> -  rtx cond = gen_rtx_fmt_ee (code, mode, op0, op1);
> -
> -  rtx tmp1 = gen_reg_rtx (mode);
> -  rtx tmp2 = gen_reg_rtx (mode);
> -
> -  emit_insn (gen_rtx_SET (tmp1, gen_rtx_IF_THEN_ELSE (mode, cond,
> - cons, const0_rtx)));
> -
> -  /* We need to expand a sequence for both blocks and we do that such,
> - that the second conditional move will use the inverted condition.
> - We use temporaries that are or'd to the dest register.  */
> -  cond = gen_rtx_fmt_ee ((code == EQ) ? NE : EQ, mode, op0, op1);
> -  emit_insn (gen_rtx_SET (tmp2, gen_rtx_IF_THEN_ELSE (mode, cond,
> - alt, const0_rtx)));
> -
> -  emit_insn (gen_rtx_SET (dest, gen_rtx_IOR (mode, tmp1, tmp2)));
> - }
> -
>  /* Emit a cond move: If OP holds, move CONS to DEST; else move ALT to DEST.
> Return 0 if expansion failed.  */
>
> @@ -3483,6 +3452,7 @@ riscv_expand_conditional_move (rtx dest, rtx op, rtx 
> cons, rtx alt)
>rtx_code code = GET_CODE (op);
>rtx op0 = XEXP (op, 0);
>rtx op1 = XEXP (op, 1);
> +  bool need_eq_ne_p = false;
>
>if (TARGET_XTHEADCONDMOV
>&& GET_MODE_CLASS (mode) == MODE_INT
> @@ -3492,14 +3462,12 @@ riscv_expand_conditional_move (rtx dest, rtx op, rtx 
> cons, rtx alt)
>&& GET_MODE (op0) == mode
>&& GET_MODE (op1) == mode
>&& (code == EQ || code == NE))
> +need_eq_ne_p = true;
> +
> +  if (need_eq_ne_p || (TARGET_SFB_ALU
> +  && GET_MODE (op0) == word_mode))
>  {
> -  riscv_expand_conditional_move_onesided (dest, cons, alt, code, op0, 
> op1);
> -  return true;
> -}
> -  else if (TARGET_SFB_ALU
> -  && GET_MODE (op0) == word_mode)
> -{
> -  riscv_emit_int_compare (, , );
> +  riscv_emit_int_compare (, , , need_eq_ne_p);
>rtx cond = gen_rtx_fmt_ee (code, GET_MODE (op0), op0, op1);
>
>/* The expander allows (const_int 0) for CONS for the benefit of
> diff --git a/gcc/testsuite/gcc.target/riscv/xtheadcondmov-indirect-rv32.c 
> b/gcc/testsuite/gcc.target/riscv/xtheadcondmov-indirect-rv32.c
> index 9afdc2eabfd..e2b135f3d00 100644
> --- a/gcc/testsuite/gcc.target/riscv/xtheadcondmov-indirect-rv32.c
> +++ b/gcc/testsuite/gcc.target/riscv/xtheadcondmov-indirect-rv32.c
> @@ -1,15 +1,13 @@
>  /* { dg-do compile } */
>  /* { dg-options "-O2 -march=rv32gc_xtheadcondmov -mabi=ilp32 
> -mriscv-attribute" } */
> -/* { dg-skip-if "" { *-*-* } { "-O0" "-Os" "-Og" } } */
> +/* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-Os" "-Og" "-O3" "-Oz" "-flto"} } 
> */
>  /* { dg-final { check-function-bodies "**" ""  } } */
>
>  /*
>

[COMMITTED] ada: Use truncation for dynamic conversions from floating point to fixed point

From: Eric Botcazou 

This changes the implementation of dynamic conversions from floating-point
to ordinary fixed-point types, from rounding (to the nearest number) to
truncation (toward zero), so as to make them consistent with both static
conversions between these types and also the value of the Machine_Rounds
attribute, which is False for all fixed-point types with GNAT.

The rounding is still available under the debug switch -gnatd.N for the
sake of backward compatibility with the previous implementation.

gcc/ada/

* debug.adb (d.N): Document new usage.
* exp_ch4.adb (Expand_N_Type_Conversion): Copy the Float_Truncate
flag when rewriting a floating-point to fixed-point conversion as
a floating-point to integer conversion.
* exp_fixd.adb: Add with and use clauses for Debug.
(Expand_Convert_Fixed_To_Fixed): Generate a truncation in all cases
except if the result is explicitly rounded.
(Expand_Convert_Integer_To_Fixed): Likewise.
(Expand_Convert_Float_To_Fixed): Generate a truncation for all kind
of fixed-point types, except if the result is explicitly rounded, or
-gnatd.N is specified and the type is an ordinary fixed-point type.
* sinfo.ads (Float_Truncate): Document usage for floating-point to
fixed-point conversions.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/debug.adb|  6 +-
 gcc/ada/exp_ch4.adb  |  7 +--
 gcc/ada/exp_fixd.adb | 41 ++---
 gcc/ada/sinfo.ads|  5 +++--
 4 files changed, 35 insertions(+), 24 deletions(-)

diff --git a/gcc/ada/debug.adb b/gcc/ada/debug.adb
index 9566e095d1a..fd94203faf8 100644
--- a/gcc/ada/debug.adb
+++ b/gcc/ada/debug.adb
@@ -125,7 +125,7 @@ package body Debug is
--  d.K  Do not reject components in extensions overlapping with parent
--  d.L  Depend on back end for limited types in if and case expressions
--  d.M  Relaxed RM semantics
-   --  d.N
+   --  d.N  Use rounding when converting from floating point to fixed point
--  d.O  Dump internal SCO tables
--  d.P  Previous (non-optimized) handling of length comparisons
--  d.Q  Previous (incomplete) style check for binary operators
@@ -906,6 +906,10 @@ package body Debug is
--  d.M  Relaxed RM semantics. This flag sets Opt.Relaxed_RM_Semantics
--   See Opt.Relaxed_RM_Semantics for more details.
 
+   --  d.N  Use rounding instead of truncation when dynamically converting from
+   --   a floating-point type to an ordinary fixed-point type, for the sake
+   --   of compatibility with earlier versions of the compiler.
+
--  d.O  Dump internal SCO tables. Before outputting the SCO information to
--   the ALI file, the internal SCO tables (SCO_Table/SCO_Unit_Table)
--   are dumped for debugging purposes.
diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb
index 5c9c6686c01..7be240bce0e 100644
--- a/gcc/ada/exp_ch4.adb
+++ b/gcc/ada/exp_ch4.adb
@@ -12150,8 +12150,12 @@ package body Exp_Ch4 is
Expr_Id : constant Entity_Id := Make_Temporary (Loc, 'T', Conv);
Int_Typ : constant Entity_Id :=
  Small_Integer_Type_For (RM_Size (Btyp), Uns => False);
+   Trunc   : constant Boolean   := Float_Truncate (Conv);
 
 begin
+   Conv := Convert_To (Int_Typ, Expression (Conv));
+   Set_Float_Truncate (Conv, Trunc);
+
--  Generate a temporary with the integer value. Required in the
--  CCG compiler to ensure that run-time checks reference this
--  integer expression (instead of the resulting fixed-point
@@ -12163,8 +12167,7 @@ package body Exp_Ch4 is
Defining_Identifier => Expr_Id,
Object_Definition   => New_Occurrence_Of (Int_Typ, Loc),
Constant_Present=> True,
-   Expression  =>
- Convert_To (Int_Typ, Expression (Conv;
+   Expression  => Conv));
 
--  Create integer objects for range checking of result.
 
diff --git a/gcc/ada/exp_fixd.adb b/gcc/ada/exp_fixd.adb
index 61c2f923f08..b7a996ab615 100644
--- a/gcc/ada/exp_fixd.adb
+++ b/gcc/ada/exp_fixd.adb
@@ -25,6 +25,7 @@
 
 with Atree;  use Atree;
 with Checks; use Checks;
+with Debug;  use Debug;
 with Einfo;  use Einfo;
 with Einfo.Entities; use Einfo.Entities;
 with Einfo.Utils;use Einfo.Utils;
@@ -1624,13 +1625,14 @@ package body Exp_Fixd is
 
   --  Fall through to use floating-point for the close result set case,
   --  as a result of the numerator or denominator of the small ratio not
-  --  being a sufficiently small integer.
+  --  being sufficiently small. See also Expand_Convert_Float_To_Fixed.
 
   Set_Result (N,
 Build_Multiply (N,
   Fpt_Value (Expr),

[COMMITTED] ada: Crash on function returning allocated object containing tasks

From: Javier Miranda 

The frontend crashes when a function returns an object of a
limited type that may have task components, has discriminants,
and the object is created with an allocator.

gcc/ada/

* exp_ch4.adb
(Expand_N_Allocator): If an allocator with constraints is called
in the return statement of a function returning a general access
type, then propagate to the itype the master of the general
access type (since it is the master associated with the
returned object).

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_ch4.adb | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb
index f894da5..5c9c6686c01 100644
--- a/gcc/ada/exp_ch4.adb
+++ b/gcc/ada/exp_ch4.adb
@@ -4991,6 +4991,25 @@ package body Exp_Ch4 is
 Expand_N_Full_Type_Declaration
   (Parent (Base_Type (PtrT)));
 
+ --  When the allocator has a subtype indication then a
+ --  constraint is present and an itype has been added by
+ --  Analyze_Allocator as the subtype of this allocator.
+
+ --  If an allocator with constraints is called in the
+ --  return statement of a function returning a general
+ --  access type, then propagate to the itype the master
+ --  of the general access type (since it is the master
+ --  associated with the returned object).
+
+ elsif Is_Itype (PtrT)
+   and then Ekind (Current_Scope) = E_Function
+   and then Ekind (Etype (Current_Scope))
+  = E_General_Access_Type
+   and then In_Return_Value (N)
+ then
+Set_Master_Id (PtrT,
+  Master_Id (Etype (Current_Scope)));
+
  --  The only other possibility is an itype. For this
  --  case, the master must exist in the context. This is
  --  the case when the allocator initializes an access
-- 
2.40.0

[COMMITTED] ada: Complete contracts of SPARK units

From: Yannick Moy 

SPARK units in the standard library (both Ada and GNAT ones) should have
subprograms correctly annotated with contracts, so that a SPARK subprogram
should always return (not fail or raise an exception) under the conditions
expressed in its precondition, unless it is a procedure annotated with
Might_Not_Return.

gcc/ada/

* libgnat/a-calend.ads: Mark with SPARK_Mode=>Off the functions which 
may
raise Time_Error.
* libgnat/a-ngelfu.ads: Mark with SPARK_Mode=>Off the functions which 
may
lead to an overflow (which is not the case of Tan with one parameter for
example, or Arctanh or Arcoth, despite their mathematical range covering
the reals).
* libgnat/a-textio.ads: Remove Always_Return annotation from functions, 
as
this is now compulsory for functions to always return in SPARK.
* libgnat/i-cstrin.ads: Add Might_Not_Return annotation to Update 
procedure
which may not return.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnat/a-calend.ads |   8 +--
 gcc/ada/libgnat/a-ngelfu.ads |   6 ++
 gcc/ada/libgnat/a-textio.ads | 108 +++
 gcc/ada/libgnat/i-cstrin.ads |  16 --
 4 files changed, 80 insertions(+), 58 deletions(-)

diff --git a/gcc/ada/libgnat/a-calend.ads b/gcc/ada/libgnat/a-calend.ads
index 2771cb5aa50..d67bf071c0e 100644
--- a/gcc/ada/libgnat/a-calend.ads
+++ b/gcc/ada/libgnat/a-calend.ads
@@ -102,16 +102,16 @@ is
 
function "+" (Left : Time; Right : Duration) return Time
with
- Global => null;
+ SPARK_Mode => Off;
function "+" (Left : Duration; Right : Time) return Time
with
- Global => null;
+ SPARK_Mode => Off;
function "-" (Left : Time; Right : Duration) return Time
with
- Global => null;
+ SPARK_Mode => Off;
function "-" (Left : Time; Right : Time) return Duration
with
- Global => null;
+ SPARK_Mode => Off;
--  The first three functions will raise Time_Error if the resulting time
--  value is less than the start of Ada time in UTC or greater than the
--  end of Ada time in UTC. The last function will raise Time_Error if the
diff --git a/gcc/ada/libgnat/a-ngelfu.ads b/gcc/ada/libgnat/a-ngelfu.ads
index f6d6c9643af..ae06ea710eb 100644
--- a/gcc/ada/libgnat/a-ngelfu.ads
+++ b/gcc/ada/libgnat/a-ngelfu.ads
@@ -116,14 +116,17 @@ is
  Post => (if X = 0.0 then Tan'Result = 0.0);
 
function Tan (X, Cycle : Float_Type'Base) return Float_Type'Base with
+ SPARK_Mode => Off,  --  Tan can overflow for some values of X and Cycle
  Pre  => Cycle > 0.0
and then abs Float_Type'Base'Remainder (X, Cycle) /= 0.25 * Cycle,
  Post => (if X = 0.0 then Tan'Result = 0.0);
 
function Cot (X : Float_Type'Base) return Float_Type'Base with
+ SPARK_Mode => Off,  --  Cot can overflow for some values of X
  Pre => X /= 0.0;
 
function Cot (X, Cycle : Float_Type'Base) return Float_Type'Base with
+ SPARK_Mode => Off,  --  Cot can overflow for some values of X and Cycle
  Pre => Cycle > 0.0
and then X /= 0.0
and then Float_Type'Base'Remainder (X, Cycle) /= 0.0
@@ -176,9 +179,11 @@ is
  Post => (if X > 0.0 and then Y = 0.0 then Arccot'Result = 0.0);
 
function Sinh (X : Float_Type'Base) return Float_Type'Base with
+ SPARK_Mode => Off,  --  Sinh can overflow for some values of X
  Post => (if X = 0.0 then Sinh'Result = 0.0);
 
function Cosh (X : Float_Type'Base) return Float_Type'Base with
+ SPARK_Mode => Off,  --  Cosh can overflow for some values of X
  Post => Cosh'Result >= 1.0
and then (if X = 0.0 then Cosh'Result = 1.0);
 
@@ -187,6 +192,7 @@ is
and then (if X = 0.0 then Tanh'Result = 0.0);
 
function Coth (X : Float_Type'Base) return Float_Type'Base with
+ SPARK_Mode => Off,  --  Coth can overflow for some values of X
  Pre  => X /= 0.0,
  Post => abs Coth'Result >= 1.0;
 
diff --git a/gcc/ada/libgnat/a-textio.ads b/gcc/ada/libgnat/a-textio.ads
index 713116e3e39..9cedab6a222 100644
--- a/gcc/ada/libgnat/a-textio.ads
+++ b/gcc/ada/libgnat/a-textio.ads
@@ -132,11 +132,13 @@ is
  Post => not Is_Open (File),
  Global   => (In_Out => File_System),
  Annotate => (GNATprove, Always_Return);
+
procedure Delete (File : in out File_Type) with
  Pre  => Is_Open (File),
  Post => not Is_Open (File),
  Global   => (In_Out => File_System),
  Annotate => (GNATprove, Might_Not_Return);
+
procedure Reset  (File : in out File_Type; Mode : File_Mode) with
  Pre  => Is_Open (File),
  Post =>
@@ -147,6 +149,7 @@ is
  and then Page_Length (File) = 0)),
  Global   => (In_Out => File_System),
  Annotate => (GNATprove, Might_Not_Return);
+
procedure Reset  (File : in out File_Type) with
  Pre  => Is_Open (File),
  Post =>
@@ -159,21 +162,19 @@ is
  Annotate

[COMMITTED] ada: Remove redundant guard against empty lists

From: Piotr Trojanek 

There is no need to guard against routine Contains being called on
No_Elist, because it will return False. Code cleanup related to handling
of primitive operations in GNATprove; semantics is unaffected.

gcc/ada/

* sem_prag.adb (Record_Possible_Body_Reference): Remove call to Present.
* sem_util.adb (Find_Untagged_Type_Of): Likewise.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_prag.adb | 4 +---
 gcc/ada/sem_util.adb | 1 -
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/gcc/ada/sem_prag.adb b/gcc/ada/sem_prag.adb
index 96ea17209f3..5363d2bee80 100644
--- a/gcc/ada/sem_prag.adb
+++ b/gcc/ada/sem_prag.adb
@@ -32644,9 +32644,7 @@ package body Sem_Prag is
  if Nkind (Context) = N_Package_Body then
 Spec_Id := Corresponding_Spec (Context);
 
-if Present (Abstract_States (Spec_Id))
-  and then Contains (Abstract_States (Spec_Id), State_Id)
-then
+if Contains (Abstract_States (Spec_Id), State_Id) then
if No (Body_References (State_Id)) then
   Set_Body_References (State_Id, New_Elmt_List);
end if;
diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
index e11eded398d..9d12ee71d93 100644
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -6524,7 +6524,6 @@ package body Sem_Util is
   begin
  while Present (E) and then E /= Prim loop
 if not Is_Tagged_Type (E)
-  and then Present (Direct_Primitive_Operations (E))
   and then Contains (Direct_Primitive_Operations (E), Prim)
 then
return E;
-- 
2.40.0

[COMMITTED] ada: Fix double free on finalization of Vector in array aggregate

From: Eric Botcazou 

The handling of finalization is delicate during the expansion of aggregates
since the generated assignments must not cause the finalization of the RHS.
That's why the No_Ctrl_Actions flag is set on them and the adjustments are
generated manually.

This was not done in the case of an array of array with controlled component
when its subaggregates are not expanded in place but instead are replaced by
temporaries, leading to double free or memory corruption.

gcc/ada/

* exp_aggr.adb (Initialize_Array_Component): Remove obsolete code.
(Expand_Array_Aggregate): In the case where a temporary is created
and the parent is an assignment statement with No_Ctrl_Actions set,
set Is_Ignored_Transient on the temporary.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_aggr.adb | 27 +--
 1 file changed, 9 insertions(+), 18 deletions(-)

diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb
index 1dcbfade86c..a6a7d810185 100644
--- a/gcc/ada/exp_aggr.adb
+++ b/gcc/ada/exp_aggr.adb
@@ -1422,24 +1422,6 @@ package body Exp_Aggr is
 Expression => New_Copy_Tree (Init_Expr));
 Set_No_Ctrl_Actions (Init_Stmt);
 
---  If this is an aggregate for an array of arrays, each
---  subaggregate will be expanded as well, and even with
---  No_Ctrl_Actions the assignments of inner components will
---  require attachment in their assignments to temporaries. These
---  temporaries must be finalized for each subaggregate. Generate:
-
---begin
---   Arr_Comp := Init_Expr;
---end;
-
-if Finalization_OK and then Is_Array_Type (Comp_Typ) then
-   Init_Stmt :=
- Make_Block_Statement (Loc,
-   Handled_Statement_Sequence =>
- Make_Handled_Sequence_Of_Statements (Loc,
-   Statements => New_List (Init_Stmt)));
-end if;
-
 Append_To (Blk_Stmts, Init_Stmt);
 
 --  Adjust the tag due to a possible view conversion. Generate:
@@ -7072,6 +7054,15 @@ package body Exp_Aggr is
and then Parent_Kind = N_Allocator
  then
 Establish_Transient_Scope (N, Manage_Sec_Stack => False);
+
+ --  If the parent is an assignment for which no controlled actions
+ --  should take place, prevent the temporary from being finalized.
+
+ elsif Parent_Kind = N_Assignment_Statement
+   and then No_Ctrl_Actions (Parent_Node)
+ then
+Mutate_Ekind (Tmp, E_Variable);
+Set_Is_Ignored_Transient (Tmp);
  end if;
 
  Insert_Action (N, Tmp_Decl);
-- 
2.40.0

Re: Re: decremnt IV patch create fails on PowerPC

2023-05-26 Thread juzhe.zh...@rivai.ai

Hi, Richi. Thanks for your analysis and helps.

>> We could simply retain the original
>> incrementing IV for loop control and add the decrementing
>> IV for computing LEN in addition to that and leave IVOPTs
>> sorting out to eventually merge them (or not).

I am not sure how to do that. Could you give me more informations?

I somehow understand your concern is that variable amount of IV will make
IVOPT fails. 

I have seen similar situation in LLVM (when apply variable IV,
they failed to interleave the vectorize code). I am not sure whether they
are the same reason for that.

For RVV, we not only want decrement IV style in vectorization but also
we want to apply SELECT_VL in single-rgroup which is most happen cases (LLVM 
also only apply get_vector_length in single vector length).

>>You can do some testing with a cross compiler, alternatively
>>there are powerpc machines in the GCC compile farm.

It seems that Power is ok with decrement IV since most cases are improved.

I think Richard may help to explain decrement IV more clearly.

Thanks

juzhe.zh...@rivai.ai

From: Richard Biener
Date: 2023-05-26 14:46
To: 钟居哲
CC: gcc-patches; richard.sandiford; linkw
Subject: Re: decremnt IV patch create fails on PowerPC
On Fri, 26 May 2023, ??? wrote:

> Yesterday's patch has been approved (decremnt IV support):
> https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619663.html 
> 
> However, it creates fails on PowerPC:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109971 
> 
> I am really sorry for causing inconvinience.
> 
> I wonder as we disccussed:
> +  /* If we're vectorizing a loop that uses length "controls" and
> + can iterate more than once, we apply decrementing IV approach
> + in loop control.  */
> +  if (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P (loop_vinfo)
> +  && !LOOP_VINFO_LENS (loop_vinfo).is_empty ()
> +  && LOOP_VINFO_PARTIAL_LOAD_STORE_BIAS (loop_vinfo) == 0
> +  && !(LOOP_VINFO_NITERS_KNOWN_P (loop_vinfo)
> +&& known_le (LOOP_VINFO_INT_NITERS (loop_vinfo),
> + LOOP_VINFO_VECT_FACTOR (loop_vinfo
> +LOOP_VINFO_USING_DECREMENTING_IV_P (loop_vinfo) = true;
> 
> This conditions can not disable decrement IV on PowerPC.
> Should I add a target hook for it?

No.  I've put some analysis in the PR.  To me the question is
why (without that SELECT_VL case) we need a decrementing IV
_for the loop control_?  We could simply retain the original
incrementing IV for loop control and add the decrementing
IV for computing LEN in addition to that and leave IVOPTs
sorting out to eventually merge them (or not).

Alternatively avoid the variable decrement as I wrote in the
PR and do the exit test based on the previous IV value.

But as said all this won't work for the SELECT_VL case, but
then it's availability is something to key off rather than a
new target hook?

> The patch I can only do bootstrap and regression on X86.
> I didn't have an environment to test PowerPC. I am really sorry.

You can do some testing with a cross compiler, alternatively
there are powerpc machines in the GCC compile farm.

Richard.

[COMMITTED] ada: Remove leftover code for counting protected entries

From: Piotr Trojanek 

We used to count protected entries by iterating over component
declarations, but then switched to iterating over entities and
left some code that is no longer needed. Cleanup; semantics is
unaffected (maybe except fixing an assertion failure in developer
builds when there is pragma among entry family declarations).

gcc/ada/

* exp_ch9.adb
(Build_Entry_Count_Expression): Remove loop over component declaration;
consequently remove a parameter that is no longer used; adapt callers.
(Make_Task_Create_Call): Refine type of a local variable.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_ch9.adb | 25 +
 1 file changed, 5 insertions(+), 20 deletions(-)

diff --git a/gcc/ada/exp_ch9.adb b/gcc/ada/exp_ch9.adb
index 68f1290cab4..b0e3632b8c8 100644
--- a/gcc/ada/exp_ch9.adb
+++ b/gcc/ada/exp_ch9.adb
@@ -154,8 +154,7 @@ package body Exp_Ch9 is
--  N is the enclosing construct.
 
function Build_Entry_Count_Expression
- (Concurrent_Type : Node_Id;
-  Component_List  : List_Id;
+ (Concurrent_Type : Entity_Id;
   Loc : Source_Ptr) return Node_Id;
--  Compute number of entries for concurrent object. This is a count of
--  simple entries, followed by an expression that computes the length
@@ -1428,14 +1427,12 @@ package body Exp_Ch9 is
--
 
function Build_Entry_Count_Expression
- (Concurrent_Type : Node_Id;
-  Component_List  : List_Id;
+ (Concurrent_Type : Entity_Id;
   Loc : Source_Ptr) return Node_Id
is
   Eindx  : Nat;
   Ent: Entity_Id;
   Ecount : Node_Id;
-  Comp   : Node_Id;
   Lo : Node_Id;
   Hi : Node_Id;
   Typ: Entity_Id;
@@ -1459,13 +1456,8 @@ package body Exp_Ch9 is
   --  Loop through entry families building the addition nodes
 
   Ent := First_Entity (Concurrent_Type);
-  Comp := First (Component_List);
   while Present (Ent) loop
  if Ekind (Ent) = E_Entry_Family then
-while Chars (Ent) /= Chars (Defining_Identifier (Comp)) loop
-   Next (Comp);
-end loop;
-
 Typ := Entry_Index_Type (Ent);
 Hi := Type_High_Bound (Typ);
 Lo := Type_Low_Bound  (Typ);
@@ -9248,7 +9240,7 @@ package body Exp_Ch9 is
  declare
 Entry_Count_Expr   : constant Node_Id :=
Build_Entry_Count_Expression
- (Prot_Typ, Cdecls, Loc);
+ (Prot_Typ, Loc);
 Num_Attach_Handler : Nat := 0;
 Protection_Subtype : Node_Id;
 Ritem  : Node_Id;
@@ -14232,7 +14224,7 @@ package body Exp_Ch9 is
   Tdec   : Node_Id;
   Tdef   : Node_Id;
   Tnam   : Name_Id;
-  Ttyp   : Node_Id;
+  Ttyp   : Entity_Id;
 
begin
   Ttyp := Corresponding_Concurrent_Type (Task_Rec);
@@ -14453,14 +14445,7 @@ package body Exp_Ch9 is
 
  --  where a,b... are the entry family names for the task definition
 
- Ecount :=
-   Build_Entry_Count_Expression
- (Ttyp,
-  Component_Items
-(Component_List
-   (Type_Definition
-  (Parent (Corresponding_Record_Type (Ttyp),
-  Loc);
+ Ecount := Build_Entry_Count_Expression (Ttyp, Loc);
  Append_To (Args, Ecount);
 
  --  Master parameter. This is a reference to the _Master parameter of
-- 
2.40.0

[COMMITTED] ada: Reorder components in Ada.Containers.Bounded_Doubly_Linked_Lists

From: Eric Botcazou 

gcc/ada/

* libgnat/a-cbdlli.ads (List): Move Nodes component to the end.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnat/a-cbdlli.ads | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ada/libgnat/a-cbdlli.ads b/gcc/ada/libgnat/a-cbdlli.ads
index 961a00726c4..b8810536458 100644
--- a/gcc/ada/libgnat/a-cbdlli.ads
+++ b/gcc/ada/libgnat/a-cbdlli.ads
@@ -276,12 +276,12 @@ private
type Node_Array is array (Count_Type range <>) of Node_Type;
 
type List (Capacity : Count_Type) is tagged record
-  Nodes  : Node_Array (1 .. Capacity);
   Free   : Count_Type'Base := -1;
   First  : Count_Type := 0;
   Last   : Count_Type := 0;
   Length : Count_Type := 0;
   TC : aliased Tamper_Counts;
+  Nodes  : Node_Array (1 .. Capacity);
end record with Put_Image => Put_Image;
 
procedure Put_Image
-- 
2.40.0

[COMMITTED] ada: Corrections to premature-references rules

From: Bob Duff 

This patch corrects the implementation of RM-8.3(17),
which says that a record extension is self-hidden until "record".
Previously, such premature references could cause a compiler crash.

gcc/ada/

* sem_ch3.adb
(Build_Derived_Record_Type): Temporarily set the state of the
Derived_Type to "self-hidden" while processing constraints
and discriminants of a record extension.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_ch3.adb | 22 +-
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/gcc/ada/sem_ch3.adb b/gcc/ada/sem_ch3.adb
index ff52e05324c..634b1cb4a38 100644
--- a/gcc/ada/sem_ch3.adb
+++ b/gcc/ada/sem_ch3.adb
@@ -9206,10 +9206,14 @@ package body Sem_Ch3 is
   then
  --  First, we must analyze the constraint (see comment in point 5.)
  --  The constraint may come from the subtype indication of the full
- --  declaration.
+ --  declaration. Temporarily set the state of the Derived_Type to
+ --  "self-hidden" (see RM-8.3(17)).
 
  if Constraint_Present then
+pragma Assert (Is_Not_Self_Hidden (Derived_Type));
+Set_Is_Not_Self_Hidden (Derived_Type, False);
 New_Discrs := Build_Discriminant_Constraints (Parent_Type, Indic);
+Set_Is_Not_Self_Hidden (Derived_Type);
 
  --  If there is no explicit constraint, there might be one that is
  --  inherited from a constrained parent type. In that case verify that
@@ -9507,11 +9511,19 @@ package body Sem_Ch3 is
   if Discriminant_Specs then
  Set_Has_Unknown_Discriminants (Derived_Type, False);
 
- --  The following call initializes fields Has_Discriminants and
- --  Discriminant_Constraint, unless we are processing the completion
- --  of a private type declaration.
+ --  The following call to Check_Or_Process_Discriminants initializes
+ --  fields Has_Discriminants and Discriminant_Constraint, unless we
+ --  are processing the completion of a private type declaration.
+ --  Temporarily set the state of the Derived_Type to "self-hidden"
+ --  (see RM-8.3(17)), unless it is already the case.
 
- Check_Or_Process_Discriminants (N, Derived_Type);
+ if Is_Not_Self_Hidden (Derived_Type) then
+Set_Is_Not_Self_Hidden (Derived_Type, False);
+Check_Or_Process_Discriminants (N, Derived_Type);
+Set_Is_Not_Self_Hidden (Derived_Type);
+ else
+Check_Or_Process_Discriminants (N, Derived_Type);
+ end if;
 
  --  For untagged types, the constraint on the Parent_Type must be
  --  present and is used to rename the discriminants.
-- 
2.40.0

[COMMITTED] ada: Fix crash on 'Img as generic actual function

From: Bob Duff 

'Image is allowed as an actual for a generic formal function.
This patch fixes a crash when 'Img is used instead of 'Image
in that context.

Misc cleanups.

gcc/ada/

* exp_put_image.adb (Build_Image_Call): Treat 'Img the same as
'Image.
* exp_imgv.adb (Expand_Image_Attribute): If Discard_Names, expand
to 'Image instead of 'Img.
* snames.ads-tmpl, par-ch4.adb, sem_attr.adb, sem_attr.ads:
Cleanups: Rename Attribute_Class_Array to be Attribute_Set. Remove
unnecessary qualifications. DRY: Don't repeat "True".

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_imgv.adb  |  9 -
 gcc/ada/exp_put_image.adb |  4 +++-
 gcc/ada/par-ch4.adb   | 22 +++---
 gcc/ada/sem_attr.adb  | 25 -
 gcc/ada/sem_attr.ads  |  4 ++--
 gcc/ada/snames.ads-tmpl   |  2 +-
 6 files changed, 33 insertions(+), 33 deletions(-)

diff --git a/gcc/ada/exp_imgv.adb b/gcc/ada/exp_imgv.adb
index 257f65badd0..a31ce1d8c8f 100644
--- a/gcc/ada/exp_imgv.adb
+++ b/gcc/ada/exp_imgv.adb
@@ -762,7 +762,7 @@ package body Exp_Imgv is
--  Snn (1 .. Pnn) then occurs as in the other cases. A special case is
--  when pragma Discard_Names applies, in which case we replace expr by:
 
-   -- (rt'Pos (expr))'Img
+   -- (rt'Pos (expr))'Image
 
--  So that the result is a space followed by the decimal value for the
--  position of the enumeration value in the enumeration type.
@@ -1211,8 +1211,8 @@ package body Exp_Imgv is
or else No (Lit_Strings (Rtyp))
  then
 --  When pragma Discard_Names applies to the first subtype, build
---  (Long_Long_Integer (Pref'Pos (Expr)))'Img. The conversion is
---  there to avoid applying 'Img directly in Universal_Integer,
+--  (Long_Long_Integer (Pref'Pos (Expr)))'Image. The conversion is
+--  there to avoid applying 'Image directly in Universal_Integer,
 --  which can be a very large type. See also the handling of 'Val.
 
 Rewrite (N,
@@ -1223,8 +1223,7 @@ package body Exp_Imgv is
 Prefix => Pref,
 Attribute_Name => Name_Pos,
 Expressions=> New_List (Expr))),
-Attribute_Name =>
-  Name_Img));
+Attribute_Name => Name_Image));
 Analyze_And_Resolve (N, Standard_String);
 return;
 
diff --git a/gcc/ada/exp_put_image.adb b/gcc/ada/exp_put_image.adb
index c194237aa20..9eda3231c6b 100644
--- a/gcc/ada/exp_put_image.adb
+++ b/gcc/ada/exp_put_image.adb
@@ -1126,7 +1126,9 @@ package body Exp_Put_Image is
   --  Attribute names that will be mapped to the corresponding result types
   --  and functions.
 
-  Attribute_Name_Id : constant Name_Id := Attribute_Name (N);
+  Attribute_Name_Id : constant Name_Id :=
+(if Attribute_Name (N) = Name_Img then Name_Image
+ else Attribute_Name (N));
 
   Result_Typ: constant Entity_Id :=
 (case Image_Name_Id'(Attribute_Name_Id) is
diff --git a/gcc/ada/par-ch4.adb b/gcc/ada/par-ch4.adb
index 2505eb629ab..52f2b02361a 100644
--- a/gcc/ada/par-ch4.adb
+++ b/gcc/ada/par-ch4.adb
@@ -34,17 +34,17 @@ package body Ch4 is
 
--  Attributes that cannot have arguments
 
-   Is_Parameterless_Attribute : constant Attribute_Class_Array :=
- (Attribute_Base => True,
-  Attribute_Body_Version => True,
-  Attribute_Class=> True,
-  Attribute_External_Tag => True,
-  Attribute_Img  => True,
-  Attribute_Loop_Entry   => True,
-  Attribute_Old  => True,
-  Attribute_Result   => True,
-  Attribute_Stub_Type=> True,
-  Attribute_Version  => True,
+   Is_Parameterless_Attribute : constant Attribute_Set :=
+ (Attribute_Base |
+  Attribute_Body_Version |
+  Attribute_Class|
+  Attribute_External_Tag |
+  Attribute_Img  |
+  Attribute_Loop_Entry   |
+  Attribute_Old  |
+  Attribute_Result   |
+  Attribute_Stub_Type|
+  Attribute_Version  |
   Attribute_Type_Key => True,
   others => False);
--  This map contains True for parameterless attributes that return a string
diff --git a/gcc/ada/sem_attr.adb b/gcc/ada/sem_attr.adb
index 39103279fa7..8257d4b3536 100644
--- a/gcc/ada/sem_attr.adb
+++ b/gcc/ada/sem_attr.adb
@@ -104,8 +104,8 @@ package body Sem_Attr is
--  In Ada 83 mode, these are the only recognized attributes. In other Ada
--  modes all these attributes are recognized, even if removed in Ada 95.
 
-   Attribute_83 : constant Attribute_Class_Array := Attribute_Class_Array'(
-  Attribute_Address  |
+   Attribute_83 : constant Attribute_Set :=
+ (Attribute_Address  |
   Attribute_Aft

[COMMITTED] ada: Reject thin 'Unrestricted_Access value to aliased constrained array

From: Eric Botcazou 

This rejects the Unrestricted_Access attribute applied to an aliased array
with a constrained nominal subtype when its type is resolved to be a thin
pointer.  The reason is that supporting this case would require the aliased
array to contain its bounds, and this is the case only for aliased arrays
whose nominal subtype is unconstrained.

gcc/ada/

* sem_attr.adb (Is_Thin_Pointer_To_Unc_Array): New predicate.
(Resolve_Attribute): Apply the static matching legality rule to an
Unrestricted_Access attribute applied to an aliased prefix if the
type is a thin pointer.  Call Is_Thin_Pointer_To_Unc_Array for the
aliasing legality rule as well.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_attr.adb | 74 ++--
 1 file changed, 51 insertions(+), 23 deletions(-)

diff --git a/gcc/ada/sem_attr.adb b/gcc/ada/sem_attr.adb
index efea03670c3..39103279fa7 100644
--- a/gcc/ada/sem_attr.adb
+++ b/gcc/ada/sem_attr.adb
@@ -10982,6 +10982,9 @@ package body Sem_Attr is
   --  Returns True if Declared_Entity is declared within the declarative
   --  region of Generic_Unit; otherwise returns False.
 
+  function Is_Thin_Pointer_To_Unc_Array (T : Entity_Id) return Boolean;
+  --  Return True if T is a thin pointer to an unconstrained array type
+
   --
   -- Declared_Within_Generic_Unit --
   --
@@ -11009,6 +11012,28 @@ package body Sem_Attr is
  return False;
   end Declared_Within_Generic_Unit;
 
+  --
+  -- Is_Thin_Pointer_To_Unc_Array --
+  --
+
+  function Is_Thin_Pointer_To_Unc_Array (T : Entity_Id) return Boolean is
+  begin
+ if Is_Access_Type (T)
+   and then Has_Size_Clause (T)
+   and then RM_Size (T) = System_Address_Size
+ then
+declare
+   DT : constant Entity_Id := Designated_Type (T);
+
+begin
+   return Is_Array_Type (DT) and then not Is_Constrained (DT);
+end;
+
+ else
+return False;
+ end if;
+  end Is_Thin_Pointer_To_Unc_Array;
+
--  Start of processing for Resolve_Attribute
 
begin
@@ -11484,9 +11509,7 @@ package body Sem_Attr is
end if;
 end if;
 
-if Attr_Id in Attribute_Access | Attribute_Unchecked_Access
-  and then (Ekind (Btyp) = E_General_Access_Type
- or else Ekind (Btyp) = E_Anonymous_Access_Type)
+if Ekind (Btyp) in E_General_Access_Type | E_Anonymous_Access_Type
 then
--  Ada 2005 (AI-230): Check the accessibility of anonymous
--  access types for stand-alone objects, record and array
@@ -11494,6 +11517,7 @@ package body Sem_Attr is
--  the level is the same of the enclosing composite type.
 
if Ada_Version >= Ada_2005
+ and then Attr_Id = Attribute_Access
  and then (Is_Local_Anonymous_Access (Btyp)
 
 --  Handle cases where Btyp is the anonymous access
@@ -11501,7 +11525,6 @@ package body Sem_Attr is
 
 or else Nkind (Associated_Node_For_Itype (Btyp)) =
 N_Object_Declaration)
- and then Attr_Id = Attribute_Access
 
  --  Verify that static checking is OK (namely that we aren't
  --  in a specific context requiring dynamic checks on
@@ -11540,7 +11563,9 @@ package body Sem_Attr is
   end if;
end if;
 
-   if Is_Dependent_Component_Of_Mutable_Object (P) then
+   if Attr_Id /= Attribute_Unrestricted_Access
+ and then Is_Dependent_Component_Of_Mutable_Object (P)
+   then
   Error_Msg_F
 ("illegal attribute for discriminant-dependent component",
  P);
@@ -11555,7 +11580,19 @@ package body Sem_Attr is
   Nom_Subt := Base_Type (Nom_Subt);
end if;
 
-   if Is_Tagged_Type (Designated_Type (Typ)) then
+   --  We do not enforce static matching for Unrestricted_Access
+   --  except for a thin pointer to an unconstrained array type,
+   --  because, in this case, the designated object must contain
+   --  its bounds, which means that it must have an unconstrained
+   --  nominal subtype (and be aliased, as will be checked below).
+
+   if Attr_Id = Attribute_Unrestricted_Access
+ and then not (Is_Thin_Pointer_To_Unc_Array (Typ)
+and then Is_Aliased_View (Original_Node (P)))
+   then
+  null;
+
+

[COMMITTED] ada: Fix typos "statment" and "condtion"

From: Bob Duff 

...caused by moving code here from Atree.

gcc/ada/

* einfo.ads: Add comma.
* contracts.adb: Fix typos.
* exp_attr.adb: Likewise.
* exp_ch5.adb: Likewise.
* exp_ch6.adb: Likewise.
* lib-xref.adb: Likewise.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/contracts.adb | 4 ++--
 gcc/ada/einfo.ads | 2 +-
 gcc/ada/exp_attr.adb  | 2 +-
 gcc/ada/exp_ch5.adb   | 2 +-
 gcc/ada/exp_ch6.adb   | 2 +-
 gcc/ada/lib-xref.adb  | 2 +-
 6 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/gcc/ada/contracts.adb b/gcc/ada/contracts.adb
index e2df8b96a65..d3ceaa92e10 100644
--- a/gcc/ada/contracts.adb
+++ b/gcc/ada/contracts.adb
@@ -1640,7 +1640,7 @@ package body Contracts is
   -- return
   --Result_Obj : constant Typ := _Wrapped_Statements
   -- do
-  --
+  --
   -- end return;
   --  end;
 
@@ -1658,7 +1658,7 @@ package body Contracts is
   --
   --  begin
   -- _Wrapped_Statements;
-  -- 
+  -- 
   --  end;
 
   --  Create Identifier
diff --git a/gcc/ada/einfo.ads b/gcc/ada/einfo.ads
index ef5201a68ff..39efb932f90 100644
--- a/gcc/ada/einfo.ads
+++ b/gcc/ada/einfo.ads
@@ -4762,7 +4762,7 @@ package Einfo is
 
 --Wrapped_Statements
 --   Defined in functions, procedures, entries, and entry families. Refers
---   to the entity of the _Wrapped_Statements procedure which gets
+--   to the entity of the _Wrapped_Statements procedure, which gets
 --   generated as part of the expansion of contracts and postconditions
 --   and contains its enclosing subprogram's original source declarations
 --   and statements.
diff --git a/gcc/ada/exp_attr.adb b/gcc/ada/exp_attr.adb
index 7235a164e0a..6b498eb2d77 100644
--- a/gcc/ada/exp_attr.adb
+++ b/gcc/ada/exp_attr.adb
@@ -5051,7 +5051,7 @@ package body Exp_Attr is
  if Present (Subp) then
 Ins_Nod := Subp;
 
- --  General case where the postcondtion checks occur after the call
+ --  General case where the postcondition checks occur after the call
  --  to _Wrapped_Statements.
 
  else
diff --git a/gcc/ada/exp_ch5.adb b/gcc/ada/exp_ch5.adb
index b4d931195d8..30af98b3fc0 100644
--- a/gcc/ada/exp_ch5.adb
+++ b/gcc/ada/exp_ch5.adb
@@ -3972,7 +3972,7 @@ package body Exp_Ch5 is
 
  Declarations : constant List_Id := New_List (Selector_Decl);
 
-  --  Start of processing for Expand_General_Case_Statment
+  --  Start of processing for Expand_General_Case_Statement
 
   begin
  if Present (Choice_Index_Decl) then
diff --git a/gcc/ada/exp_ch6.adb b/gcc/ada/exp_ch6.adb
index b2408140bef..50d66e34ff7 100644
--- a/gcc/ada/exp_ch6.adb
+++ b/gcc/ada/exp_ch6.adb
@@ -3090,7 +3090,7 @@ package body Exp_Ch6 is
  --  Start of processing for Insert_Level_Assign
 
  begin
---  Examine further nested condtionals
+--  Examine further nested conditionals
 
 pragma Assert (Nkind (Branch) =
 N_Expression_With_Actions);
diff --git a/gcc/ada/lib-xref.adb b/gcc/ada/lib-xref.adb
index b45c601f865..3d6b29862b3 100644
--- a/gcc/ada/lib-xref.adb
+++ b/gcc/ada/lib-xref.adb
@@ -706,7 +706,7 @@ package body Lib.Xref is
 Set_Referenced (E);
 
  --  For the case where the entity is on the left hand side of an
- --  assignment statment, we do nothing here.
+ --  assignment statement, we do nothing here.
 
  --  The processing for Analyze_Assignment_Statement will set the
  --  Referenced_As_LHS flag.
-- 
2.40.0

[COMMITTED] ada: Simplify iteration over record component items with possible pragmas

From: Piotr Trojanek 

Code cleanup; semantics is unaffected.

gcc/ada/

* sem_util.adb (Is_Null_Record_Definition): Use First_Non_Pragma and
Next_Non_Pragma to ignore pragmas within component list.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_util.adb | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
index 64c12cc7ecf..e11eded398d 100644
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -18699,19 +18699,17 @@ package body Sem_Util is
  return True;
   end if;
 
-  Item := First (Component_Items (Component_List (Record_Def)));
+  Item := First_Non_Pragma (Component_Items (Component_List (Record_Def)));
 
   while Present (Item) loop
  if Nkind (Item) = N_Component_Declaration
and then Is_Internal_Name (Chars (Defining_Identifier (Item)))
  then
 null;
- elsif Nkind (Item) = N_Pragma then
-null;
  else
 return False;
  end if;
- Item := Next (Item);
+ Next_Non_Pragma (Item);
   end loop;
 
   return True;
-- 
2.40.0

[COMMITTED] ada: Fix detection of non-static expressions in records with pragmas

From: Piotr Trojanek 

When iterating over record components we must ignore pragmas.
Minor bug, as pragmas within record components do not appear often.

gcc/ada/

* sem_cat.adb (Check_Non_Static_Default_Expr): Detect components inside
loop, not in the loop condition itself.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_cat.adb | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/gcc/ada/sem_cat.adb b/gcc/ada/sem_cat.adb
index 09560e6179a..13dff3dbdd9 100644
--- a/gcc/ada/sem_cat.adb
+++ b/gcc/ada/sem_cat.adb
@@ -346,14 +346,13 @@ package body Sem_Cat is
 
   if Null_Present (Recdef) then
  return;
-  else
- Component_Decl := First (Component_Items (Component_List (Recdef)));
   end if;
 
-  while Present (Component_Decl)
-and then Nkind (Component_Decl) = N_Component_Declaration
-  loop
- if Present (Expression (Component_Decl))
+  Component_Decl := First (Component_Items (Component_List (Recdef)));
+
+  while Present (Component_Decl) loop
+ if Nkind (Component_Decl) = N_Component_Declaration
+   and then Present (Expression (Component_Decl))
and then Nkind (Expression (Component_Decl)) /= N_Null
and then not Is_OK_Static_Expression (Expression (Component_Decl))
 
-- 
2.40.0

[COMMITTED] ada: Default initialize entity to avoid CodePeer message

From: Yannick Moy 

CodePeer issues a false alarm when reading local entity Component later
if not initialized by default. Fix this.

gcc/ada/

* sem_aggr.adb (Resolve_Record_Aggregate): Add dummy initialization and
assertion that clarifies when we reassigned to a useful value.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_aggr.adb | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/gcc/ada/sem_aggr.adb b/gcc/ada/sem_aggr.adb
index 858ae635fc2..fd0779e66d7 100644
--- a/gcc/ada/sem_aggr.adb
+++ b/gcc/ada/sem_aggr.adb
@@ -6004,6 +6004,7 @@ package body Sem_Aggr is
 end if;
 
 while Present (Selectr) loop
+   Component := Empty;
New_Assoc := First (New_Assoc_List);
while Present (New_Assoc) loop
   Component := First (Choices (New_Assoc));
@@ -6019,6 +6020,11 @@ package body Sem_Aggr is
   Next (New_Assoc);
end loop;
 
+   --  If we found an association, then this is a legal component
+   --  of the type in question.
+
+   pragma Assert (if Present (New_Assoc) then Present (Component));
+
--  If no association, this is not a legal component of the type
--  in question, unless its association is provided with a box.
 
-- 
2.40.0

[COMMITTED] ada: Fix internal error on Big_Integer conversion ghost instance

From: Eric Botcazou 

The problem is that the ghost mode of the instance is used to analyze the
parent of the generic body, whose own ghost mode has nothing to do with it.

gcc/ada/

* sem_ch12.adb (Instantiate_Package_Body): Set the ghost mode to
that of the instance only after loading the generic's parent.
(Instantiate_Subprogram_Body): Likewise.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_ch12.adb | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/gcc/ada/sem_ch12.adb b/gcc/ada/sem_ch12.adb
index 4fefcc8fb46..a9a3e322917 100644
--- a/gcc/ada/sem_ch12.adb
+++ b/gcc/ada/sem_ch12.adb
@@ -11911,12 +11911,6 @@ package body Sem_Ch12 is
  return;
   end if;
 
-  --  The package being instantiated may be subject to pragma Ghost. Set
-  --  the mode now to ensure that any nodes generated during instantiation
-  --  are properly marked as Ghost.
-
-  Set_Ghost_Mode (Act_Decl_Id);
-
   Expander_Mode_Save_And_Set (Body_Info.Expander_Status);
 
   --  Re-establish the state of information on which checks are suppressed.
@@ -12029,6 +12023,12 @@ package body Sem_Ch12 is
  Instantiation_Node := Inst_Node;
   end if;
 
+  --  The package being instantiated may be subject to pragma Ghost. Set
+  --  the mode now to ensure that any nodes generated during instantiation
+  --  are properly marked as Ghost.
+
+  Set_Ghost_Mode (Act_Decl_Id);
+
   if Present (Gen_Body_Id) then
  Save_Env (Gen_Unit, Act_Decl_Id);
  Style_Check := False;
@@ -12468,12 +12468,6 @@ package body Sem_Ch12 is
  return;
   end if;
 
-  --  The subprogram being instantiated may be subject to pragma Ghost. Set
-  --  the mode now to ensure that any nodes generated during instantiation
-  --  are properly marked as Ghost.
-
-  Set_Ghost_Mode (Act_Decl_Id);
-
   Expander_Mode_Save_And_Set (Body_Info.Expander_Status);
 
   --  Re-establish the state of information on which checks are suppressed.
@@ -12511,6 +12505,12 @@ package body Sem_Ch12 is
 
   Instantiation_Node := Inst_Node;
 
+  --  The subprogram being instantiated may be subject to pragma Ghost. Set
+  --  the mode now to ensure that any nodes generated during instantiation
+  --  are properly marked as Ghost.
+
+  Set_Ghost_Mode (Act_Decl_Id);
+
   if Present (Gen_Body_Id) then
  Gen_Body := Unit_Declaration_Node (Gen_Body_Id);
 
-- 
2.40.0

[COMMITTED] ada: Cleanups in handling of aggregates

From: Piotr Trojanek 

Assorted cleanups related to recent fixes of aggregate handling for
GNATprove; semantics is unaffected.

gcc/ada/

* sem_aggr.adb
(Resolve_Record_Aggregate): Remove useless assignment.
* sem_aux.adb
(Has_Variant_Part): Remove useless guard; this routine is only called
on type entities (and now will crash in other cases).
* sem_ch3.adb
(Create_Constrained_Components): Only assign Assoc_List when necessary;
tune whitespace.
(Is_Variant_Record): Refactor repeated calls to Parent.
* sem_util.adb
(Gather_Components): Assert that discriminant association has just one
choice in component_association; refactor repeated calls to Next.
* sem_util.ads
(Gather_Components): Tune whitespace in comment.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_aggr.adb |  1 -
 gcc/ada/sem_aux.adb  |  4 
 gcc/ada/sem_ch3.adb  | 34 ++
 gcc/ada/sem_util.adb | 10 ++
 gcc/ada/sem_util.ads |  1 -
 5 files changed, 24 insertions(+), 26 deletions(-)

diff --git a/gcc/ada/sem_aggr.adb b/gcc/ada/sem_aggr.adb
index e7643277460..858ae635fc2 100644
--- a/gcc/ada/sem_aggr.adb
+++ b/gcc/ada/sem_aggr.adb
@@ -5674,7 +5674,6 @@ package body Sem_Aggr is
 
   --  STEP 6: Find component Values
 
-  Component := Empty;
   Component_Elmt := First_Elmt (Components);
 
   --  First scan the remaining positional associations in the aggregate.
diff --git a/gcc/ada/sem_aux.adb b/gcc/ada/sem_aux.adb
index 658110f98d2..e7e096fa1cf 100644
--- a/gcc/ada/sem_aux.adb
+++ b/gcc/ada/sem_aux.adb
@@ -728,10 +728,6 @@ package body Sem_Aux is
   CList : Node_Id;
 
begin
-  if not Is_Type (Typ) then
- return False;
-  end if;
-
   FSTyp := First_Subtype (Typ);
 
   if not Has_Discriminants (FSTyp) then
diff --git a/gcc/ada/sem_ch3.adb b/gcc/ada/sem_ch3.adb
index fb4f5badd4e..ff52e05324c 100644
--- a/gcc/ada/sem_ch3.adb
+++ b/gcc/ada/sem_ch3.adb
@@ -15161,8 +15161,8 @@ package body Sem_Ch3 is
   Loc : constant Source_Ptr := Sloc (Subt);
   Comp_List   : constant Elist_Id   := New_Elmt_List;
   Parent_Type : constant Entity_Id  := Etype (Typ);
-  Assoc_List  : constant List_Id:= New_List;
 
+  Assoc_List: List_Id;
   Discr_Val : Elmt_Id;
   Errors: Boolean;
   New_C : Entity_Id;
@@ -15191,8 +15191,10 @@ package body Sem_Ch3 is
 
   procedure Collect_Fixed_Components (Typ : Entity_Id) is
   begin
-  --  Build association list for discriminants, and find components of the
-  --  variant part selected by the values of the discriminants.
+ --  Build association list for discriminants, and find components of
+ --  the variant part selected by the values of the discriminants.
+
+ Assoc_List := New_List;
 
  Old_C := First_Discriminant (Typ);
  Discr_Val := First_Elmt (Constraints);
@@ -15293,13 +15295,13 @@ package body Sem_Ch3 is
   ---
 
   function Is_Variant_Record (T : Entity_Id) return Boolean is
+ Decl : constant Node_Id := Parent (T);
   begin
- return Nkind (Parent (T)) = N_Full_Type_Declaration
-   and then Nkind (Type_Definition (Parent (T))) = N_Record_Definition
-   and then Present (Component_List (Type_Definition (Parent (T
+ return Nkind (Decl) = N_Full_Type_Declaration
+   and then Nkind (Type_Definition (Decl)) = N_Record_Definition
+   and then Present (Component_List (Type_Definition (Decl)))
and then
- Present
-   (Variant_Part (Component_List (Type_Definition (Parent (T);
+ Present (Variant_Part (Component_List (Type_Definition (Decl;
   end Is_Variant_Record;
 
--  Start of processing for Create_Constrained_Components
@@ -15427,10 +15429,10 @@ package body Sem_Ch3 is
  Gather_Components
(Typ,
 Component_List (Type_Definition (Parent (Typ))),
-Governed_By  => Assoc_List,
-Into => Comp_List,
-Report_Errors=> Errors,
-Allow_Compile_Time   => True);
+Governed_By=> Assoc_List,
+Into   => Comp_List,
+Report_Errors  => Errors,
+Allow_Compile_Time => True);
  pragma Assert (not Errors or else Serious_Errors_Detected > 0);
 
  Create_All_Components;
@@ -15450,10 +15452,10 @@ package body Sem_Ch3 is
  Gather_Components
(Typ,
 Component_List (Type_Definition (Parent (Parent_Type))),
-Governed_By  => Assoc_List,
-Into => Comp_List,
-Report_Errors=> Errors,
-Allow_Compile_Time   => True);
+

[COMMITTED] ada: Fix handling of Global contracts inside generic subprograms

From: Piotr Trojanek 

Routine Get_Argument works differently for generic units (as explained
in its comment), but it failed to reliably detect such units when their
kind is temporarily made non-generic (for resolving recursive calls, as
explained in the comment at the end of Is_Generic_Declaration_Or_Body).

With this patch the frontend will look at the decorated expression of
the Global contract attached to the Global aspect; previously it was
looking at the undecorated expression attached to the corresponding
pragma.

gcc/ada/

* sem_prag.adb (Get_Argument): Improve detection of generic units.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_prag.adb | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/sem_prag.adb b/gcc/ada/sem_prag.adb
index d66e5612135..96ea17209f3 100644
--- a/gcc/ada/sem_prag.adb
+++ b/gcc/ada/sem_prag.adb
@@ -31650,7 +31650,9 @@ package body Sem_Prag is
   --  to save the global references in the generic context.
 
   if From_Aspect_Specification (Prag)
-and then (Present (Context_Id) and then Is_Generic_Unit (Context_Id))
+and then Present (Context_Id)
+and then
+  Is_Generic_Declaration_Or_Body (Unit_Declaration_Node (Context_Id))
   then
  return Corresponding_Aspect (Prag);
 
-- 
2.40.0

[COMMITTED] ada: Minor doc clarification

From: Yannick Moy 

Pattern Matching extension does not apply yet to case expressions.
This is worth stating clearly, as this is a natural use of pattern
matching to program in more functional style.

gcc/ada/

* doc/gnat_rm/gnat_language_extensions.rst: Be more explicit on
pattern matching limitation.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/doc/gnat_rm/gnat_language_extensions.rst | 2 +-
 gcc/ada/gnat_rm.texi | 2 +-
 gcc/ada/gnat_ugn.texi| 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst 
b/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst
index 5646141d454..220345d9b38 100644
--- a/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst
+++ b/gcc/ada/doc/gnat_rm/gnat_language_extensions.rst
@@ -119,7 +119,7 @@ 
https://github.com/AdaCore/ada-spark-rfcs/blob/master/prototyped/rfc-conditional
 Case pattern matching
 -
 
-The selector for a case statement may be of a composite type, subject to
+The selector for a case statement (but not yet for a case expression) may be 
of a composite type, subject to
 some restrictions (described below). Aggregate syntax is used for choices
 of such a case statement; however, in cases where a "normal" aggregate would
 require a discrete value, a discrete subtype may be used instead; box
diff --git a/gcc/ada/gnat_rm.texi b/gcc/ada/gnat_rm.texi
index 6abf8f02be5..0c841fd7dba 100644
--- a/gcc/ada/gnat_rm.texi
+++ b/gcc/ada/gnat_rm.texi
@@ -28623,7 +28623,7 @@ Link to the original RFC:
 @subsection Case pattern matching
 
 
-The selector for a case statement may be of a composite type, subject to
+The selector for a case statement (but not yet for a case expression) may be 
of a composite type, subject to
 some restrictions (described below). Aggregate syntax is used for choices
 of such a case statement; however, in cases where a “normal” aggregate would
 require a discrete value, a discrete subtype may be used instead; box
diff --git a/gcc/ada/gnat_ugn.texi b/gcc/ada/gnat_ugn.texi
index e1242068f56..be234881f37 100644
--- a/gcc/ada/gnat_ugn.texi
+++ b/gcc/ada/gnat_ugn.texi
@@ -29479,8 +29479,8 @@ to permit their use in free software.
 
 @printindex ge
 
-@anchor{gnat_ugn/gnat_utility_programs switches-related-to-project-files}@w{   
   }
 @anchor{cf}@w{  }
+@anchor{gnat_ugn/gnat_utility_programs switches-related-to-project-files}@w{   
   }
 
 @c %**end of body
 @bye
-- 
2.40.0

[COMMITTED] ada: Cleanup expansion of membership operators into attribute Valid

From: Piotr Trojanek 

Code cleanup; semantics is unaffected.

gcc/ada/

* exp_ch4.adb (Is_OK_Object_Reference): Replace loop with a call to
Unqual_Conv; consequently, change object from variable to constant;
replace an IF statement with an AND THEN expression.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_ch4.adb | 26 --
 1 file changed, 4 insertions(+), 22 deletions(-)

diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb
index 48692c06f01..438cd45ef0e 100644
--- a/gcc/ada/exp_ch4.adb
+++ b/gcc/ada/exp_ch4.adb
@@ -6492,34 +6492,16 @@ package body Exp_Ch4 is
  
 
  function Is_OK_Object_Reference (Nod : Node_Id) return Boolean is
-Obj_Ref : Node_Id;
+Obj_Ref : constant Node_Id := Original_Node (Nod);
+--  The original operand
 
  begin
---  Inspect the original operand
-
-Obj_Ref := Original_Node (Nod);
-
 --  The object reference must be a source construct, otherwise the
 --  codefix suggestion may refer to nonexistent code from a user
 --  perspective.
 
-if Comes_From_Source (Obj_Ref) then
-   loop
-  if Nkind (Obj_Ref) in
-   N_Type_Conversion |
-   N_Unchecked_Type_Conversion |
-   N_Qualified_Expression
-  then
- Obj_Ref := Expression (Obj_Ref);
-  else
- exit;
-  end if;
-   end loop;
-
-   return Is_Object_Reference (Obj_Ref);
-end if;
-
-return False;
+return Comes_From_Source (Obj_Ref)
+  and then Is_Object_Reference (Unqual_Conv (Obj_Ref));
  end Is_OK_Object_Reference;
 
   --  Start of processing for Substitute_Valid_Test
-- 
2.40.0

[COMMITTED] ada: Fix iteration over component items with pragmas

From: Piotr Trojanek 

Component items in a record declaration might include pragmas, which
must be ignored when detecting components with default expressions.

More a code cleanup than a bugfix, as it only affects artificial corner
cases. Found while fixing missing legality checks for variant component
declarations.

gcc/ada/

* sem_ch3.adb (Check_CPP_Type_Has_No_Defaults): Iterate with
First_Non_Pragma and Next_Non_Pragma.
* exp_dist.adb (Append_Record_Traversal): Likewise.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_dist.adb | 4 ++--
 gcc/ada/sem_ch3.adb  | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/ada/exp_dist.adb b/gcc/ada/exp_dist.adb
index 8f62bef2c64..f025b5656c6 100644
--- a/gcc/ada/exp_dist.adb
+++ b/gcc/ada/exp_dist.adb
@@ -8304,7 +8304,7 @@ package body Exp_Dist is
 CI := Component_Items (Clist);
 VP := Variant_Part (Clist);
 
-Item := First (CI);
+Item := First_Non_Pragma (CI);
 while Present (Item) loop
Def := Defining_Identifier (Item);
 
@@ -8313,7 +8313,7 @@ package body Exp_Dist is
 (Stmts, Container, Counter, Rec, Def);
end if;
 
-   Next (Item);
+   Next_Non_Pragma (Item);
 end loop;
 
 if Present (VP) then
diff --git a/gcc/ada/sem_ch3.adb b/gcc/ada/sem_ch3.adb
index 9e32dea5c02..fb4f5badd4e 100644
--- a/gcc/ada/sem_ch3.adb
+++ b/gcc/ada/sem_ch3.adb
@@ -12312,7 +12312,7 @@ package body Sem_Ch3 is
   --  Check all components to ensure no default expressions
 
   if Present (Clist) then
- Comp := First (Component_Items (Clist));
+ Comp := First_Non_Pragma (Component_Items (Clist));
  while Present (Comp) loop
 if Present (Expression (Comp)) then
Error_Msg_N
@@ -12320,7 +12320,7 @@ package body Sem_Ch3 is
   & "default expression", Expression (Comp));
 end if;
 
-Next (Comp);
+Next_Non_Pragma (Comp);
  end loop;
   end if;
end Check_CPP_Type_Has_No_Defaults;
-- 
2.40.0

[COMMITTED] ada: Tune detection of expression functions within a declare expression

From: Piotr Trojanek 

Code cleanup; semantics is unaffected.

gcc/ada/

* sem_ch4.adb (Check_Action_OK): Replace low-level test with a
high-level routine.
* sem_ch13.adb (Is_Predicate_Static): Likewise.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_ch13.adb | 2 +-
 gcc/ada/sem_ch4.adb  | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/ada/sem_ch13.adb b/gcc/ada/sem_ch13.adb
index b13af26b561..958b26ebb0d 100644
--- a/gcc/ada/sem_ch13.adb
+++ b/gcc/ada/sem_ch13.adb
@@ -14261,7 +14261,7 @@ package body Sem_Ch13 is
   --   transformed into just "(S /= 0)", which would appear to be
   --   a predicate-static expression (and therefore legal).
 
-  if Original_Node (Expr) /= Expr then
+  if Is_Rewrite_Substitution (Expr) then
 
  --  Emit warnings for predicates that are always True or always False
  --  and were not originally expressed as Boolean literals.
diff --git a/gcc/ada/sem_ch4.adb b/gcc/ada/sem_ch4.adb
index a85c988fe46..c8bb99b6716 100644
--- a/gcc/ada/sem_ch4.adb
+++ b/gcc/ada/sem_ch4.adb
@@ -2371,11 +2371,11 @@ package body Sem_Ch4 is
  if not Comes_From_Source (N) or else not Comes_From_Source (A) then
 
 --  If, for example, an (illegal) expression function is
---  transformed into a"vanilla" function then we don't want to
+--  transformed into a "vanilla" function then we don't want to
 --  allow it just because Comes_From_Source is now False. So look
 --  at the Original_Node.
 
-if A /= Original_Node (A) then
+if Is_Rewrite_Substitution (A) then
Check_Action_OK (Original_Node (A));
 end if;
 
-- 
2.40.0

[COMMITTED] ada: Simplify expansion of set membership

From: Piotr Trojanek 

Code cleanup; semantics is unaffected.

gcc/ada/

* exp_ch4.adb (Expand_Set_Membership): Simplify by using Evolve_Or_Else.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_ch4.adb | 17 +++--
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/gcc/ada/exp_ch4.adb b/gcc/ada/exp_ch4.adb
index 438cd45ef0e..f894da5 100644
--- a/gcc/ada/exp_ch4.adb
+++ b/gcc/ada/exp_ch4.adb
@@ -13198,8 +13198,6 @@ package body Exp_Ch4 is
 
procedure Expand_Set_Membership (N : Node_Id) is
   Lop : constant Node_Id := Left_Opnd (N);
-  Alt : Node_Id;
-  Res : Node_Id;
 
   function Make_Cond (Alt : Node_Id) return Node_Id;
   --  If the alternative is a subtype mark, create a simple membership
@@ -13228,23 +13226,22 @@ package body Exp_Ch4 is
  return Cond;
   end Make_Cond;
 
+  --  Local variables
+
+  Alt : Node_Id;
+  Res : Node_Id := Empty;
+
--  Start of processing for Expand_Set_Membership
 
begin
   Remove_Side_Effects (Lop);
 
-  Alt := First (Alternatives (N));
-  Res := Make_Cond (Alt);
-  Next (Alt);
-
   --  We use left associativity as in the equivalent boolean case. This
   --  kind of canonicalization helps the optimizer of the code generator.
 
+  Alt := First (Alternatives (N));
   while Present (Alt) loop
- Res :=
-   Make_Or_Else (Sloc (Alt),
- Left_Opnd  => Res,
- Right_Opnd => Make_Cond (Alt));
+ Evolve_Or_Else (Res, Make_Cond (Alt));
  Next (Alt);
   end loop;
 
-- 
2.40.0

[COMMITTED] ada: Reorder components in Ada.Containers.Restricted_Doubly_Linked_Lists

From: Eric Botcazou 

An instantiation of the package compiled with -gnatw.q yields:
  warning: in instantiation at a-crdlli.ads:317 [-gnatw.q]
  warning: record layout may cause performance issues [-gnatw.q]
  warning: in instantiation at a-crdlli.ads:317 [-gnatw.q]
  warning:
   component "Nodes" whose length depends on a discriminant [-gnatw.q]
  warning: in instantiation at a-crdlli.ads:317 [-gnatw.q]
  warning: comes too early and was moved down [-gnatw.q]

gcc/ada/

* libgnat/a-crdlli.ads (List): Move Nodes component to the end.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnat/a-crdlli.ads | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ada/libgnat/a-crdlli.ads b/gcc/ada/libgnat/a-crdlli.ads
index d9c45177ddd..fa4fe15e420 100644
--- a/gcc/ada/libgnat/a-crdlli.ads
+++ b/gcc/ada/libgnat/a-crdlli.ads
@@ -314,11 +314,11 @@ private
type Node_Array is array (Count_Type range <>) of Node_Type;
 
type List (Capacity : Count_Type) is tagged limited record
-  Nodes  : Node_Array (1 .. Capacity);
   Free   : Count_Type'Base := -1;
   First  : Count_Type := 0;
   Last   : Count_Type := 0;
   Length : Count_Type := 0;
+  Nodes  : Node_Array (1 .. Capacity);
end record;
 
type List_Access is access all List;
-- 
2.40.0

[COMMITTED] ada: Minor tweak in condition

From: Eric Botcazou 

gcc/ada/

* sem_util.adb (Compile_Time_Constraint_Error): Test the Ekind.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_util.adb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
index aabd01747fc..ea5be2ff4b5 100644
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -6110,7 +6110,7 @@ package body Sem_Util is
 
  Conc_Typ : constant Entity_Id :=
(if Present (Init_Proc_Type)
-  and then Init_Proc_Type in E_Record_Type_Id
+  and then Ekind (Init_Proc_Type) = E_Record_Type
 then Corresponding_Concurrent_Type (Init_Proc_Type)
 else Empty);
 
-- 
2.40.0

[COMMITTED] ada: Crash on loop in dispatching conditional entry call

From: Javier Miranda 

gcc/ada/

* exp_ch9.adb
(Expand_N_Conditional_Entry_Call): Factorize code to avoid
duplicating subtrees; required to avoid problems when the copied
code has implicit labels.
* sem_util.ads (New_Copy_Separate_List): Removed.
(New_Copy_Separate_Tree): Removed.
* sem_util.adb (New_Copy_Separate_List): Removed.
(New_Copy_Separate_Tree): Removed.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_ch9.adb  |  38 +++
 gcc/ada/sem_util.adb | 107 ---
 gcc/ada/sem_util.ads |  10 
 3 files changed, 30 insertions(+), 125 deletions(-)

diff --git a/gcc/ada/exp_ch9.adb b/gcc/ada/exp_ch9.adb
index df4a083e96b..68f1290cab4 100644
--- a/gcc/ada/exp_ch9.adb
+++ b/gcc/ada/exp_ch9.adb
@@ -7712,7 +7712,7 @@ package body Exp_Ch9 is
-- or else K = Ada.Tags.TK_Tagged
--   then
--  ;
-   --  
+   --  --   (code factorized after if-stmt)
 
--   else
--  S :=
@@ -7737,11 +7737,14 @@ package body Exp_Ch9 is
--;
-- end if;
 
-   -- 
+   -- --   (code factorized after if-stmt)
--  else
-- 
+   -- goto L0; -- skip triggering statements
--  end if;
--   end if;
+   --   
+   --   L0:
--end;
 
procedure Expand_N_Conditional_Entry_Call (N : Node_Id) is
@@ -7757,6 +7760,8 @@ package body Exp_Ch9 is
   Decl   : Node_Id;
   Decls  : List_Id;
   Formals: List_Id;
+  Label  : Node_Id;
+  Label_Id   : Entity_Id := Empty;
   Lim_Typ_Stmts  : List_Id;
   N_Stats: List_Id;
   Obj: Entity_Id;
@@ -7883,12 +7888,13 @@ package body Exp_Ch9 is
  --   then
  --  
  --   end if;
- --   
+ --   --   (code factorized after if-stmt)
  --else
  --   
+ --   goto L0; --  skip triggering statements
  --end if;
 
- N_Stats := New_Copy_Separate_List (Statements (Alt));
+ N_Stats := New_List;
 
  Prepend_To (N_Stats,
Make_Implicit_If_Statement (N,
@@ -7922,6 +7928,14 @@ package body Exp_Ch9 is
  Then_Statements =>
New_List (Blk)));
 
+ Label_Id := Make_Identifier (Loc, New_External_Name ('L', 0));
+ Set_Entity (Label_Id,
+   Make_Defining_Identifier (Loc, Chars (Label_Id)));
+
+ Append_To (Else_Statements (N),
+   Make_Goto_Statement (Loc,
+ Name => New_Occurrence_Of (Entity (Label_Id), Loc)));
+
  Append_To (Conc_Typ_Stmts,
Make_Implicit_If_Statement (N,
  Condition   => New_Occurrence_Of (B, Loc),
@@ -7930,15 +7944,14 @@ package body Exp_Ch9 is
 
  --  Generate:
  --;
- --
+ ----(code factorized after if-stmt)
 
- Lim_Typ_Stmts := New_Copy_Separate_List (Statements (Alt));
- Prepend_To (Lim_Typ_Stmts, New_Copy_Tree (Blk));
+ Lim_Typ_Stmts := New_List (New_Copy_Tree (Blk));
 
  --  Generate:
  --if K = Ada.Tags.TK_Limited_Tagged
  -- or else K = Ada.Tags.TK_Tagged
- --   then
+ --then
  --   Lim_Typ_Stmts
  --else
  --   Conc_Typ_Stmts
@@ -7950,6 +7963,15 @@ package body Exp_Ch9 is
  Then_Statements => Lim_Typ_Stmts,
  Else_Statements => Conc_Typ_Stmts));
 
+ Label := Make_Label (Loc, Label_Id);
+ Append_To (Decls,
+   Make_Implicit_Label_Declaration (Loc,
+ Defining_Identifier => Entity (Label_Id),
+ Label_Construct => Label));
+
+ Append_List_To (Stmts, Statements (Alt)); --  triggering-statements
+ Append_To (Stmts, Label);
+
  Rewrite (N,
Make_Block_Statement (Loc,
  Declarations =>
diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
index d15e20b81a7..64c12cc7ecf 100644
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -22886,113 +22886,6 @@ package body Sem_Util is
   end if;
end New_Copy_List_Tree;
 
-   
-   -- New_Copy_Separate_List --
-   
-
-   function New_Copy_Separate_List (List : List_Id) return List_Id is
-   begin
-  if List = No_List then
- return No_List;
-
-  else
- declare
-List_Copy : constant List_Id := New_List;
-N : Node_Id := First (List);
-
- begin
-while Present (N) loop
-   Append (New_Copy_Separate_Tree (N), List_Copy);
-   Next (N);
-end loop;
-
-return List_Copy;
- end;
-  end if;
-   end New_Copy_Separate_List;
-
-

[COMMITTED] ada: Duplicate declaration of _master entity

From: Javier Miranda 

gcc/ada/

* exp_ch9.adb (Build_Class_Wide_Master): Remember internal blocks
that have a task master entity declaration.
(Build_Master_Entity): Code cleanup.
* sem_util.ads (Is_Internal_Block): New subprogram.
* sem_util.adb (Is_Internal_Block): New subprogram.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_ch9.adb  | 48 +++-
 gcc/ada/sem_util.adb | 10 +
 gcc/ada/sem_util.ads |  5 +
 3 files changed, 40 insertions(+), 23 deletions(-)

diff --git a/gcc/ada/exp_ch9.adb b/gcc/ada/exp_ch9.adb
index e0eeec49c01..df4a083e96b 100644
--- a/gcc/ada/exp_ch9.adb
+++ b/gcc/ada/exp_ch9.adb
@@ -1219,9 +1219,9 @@ package body Exp_Ch9 is
   then
  declare
 Ins_Nod : Node_Id;
+Par_Nod : Node_Id;
 
  begin
-Set_Has_Master_Entity (Master_Scope);
 Master_Decl := Build_Master_Declaration (Loc);
 
 --  Ensure that the master declaration is placed before its use
@@ -1231,6 +1231,30 @@ package body Exp_Ch9 is
Ins_Nod := Parent (Ins_Nod);
 end loop;
 
+Par_Nod := Parent (List_Containing (Ins_Nod));
+
+--  For internal blocks created by Wrap_Loop_Statement, Wrap_
+--  Statements_In_Block, and Build_Abort_Undefer_Block, remember
+--  that they have a task master entity declaration; required by
+--  Build_Master_Entity to avoid creating another master entity,
+--  and also ensures that subsequent calls to Find_Master_Scope
+--  return this scope as the master scope of Typ.
+
+if Is_Internal_Block (Par_Nod) then
+   Set_Has_Master_Entity (Entity (Identifier (Par_Nod)));
+
+elsif Nkind (Par_Nod) = N_Handled_Sequence_Of_Statements
+  and then Is_Internal_Block (Parent (Par_Nod))
+then
+   Set_Has_Master_Entity (Entity (Identifier (Parent (Par_Nod;
+
+--  Otherwise remember that this scope has an associated task
+--  master entity declaration.
+
+else
+   Set_Has_Master_Entity (Master_Scope);
+end if;
+
 Insert_Before (First (List_Containing (Ins_Nod)), Master_Decl);
 Analyze (Master_Decl);
 
@@ -3169,28 +3193,6 @@ package body Exp_Ch9 is
  Par := Parent (Obj_Or_Typ);
   end if;
 
-  --  For transient scopes check if the master entity is already defined
-
-  if Is_Type (Obj_Or_Typ)
-and then Ekind (Scope (Obj_Or_Typ)) = E_Block
-and then Is_Internal (Scope (Obj_Or_Typ))
-  then
- declare
-Master_Scope : constant Entity_Id :=
- Find_Master_Scope (Obj_Or_Typ);
- begin
-if Has_Master_Entity (Master_Scope)
-  or else Is_Finalizer (Master_Scope)
-then
-   return;
-end if;
-
-if Present (Current_Entity_In_Scope (Name_uMaster)) then
-   return;
-end if;
- end;
-  end if;
-
   --  When creating a master for a record component which is either a task
   --  or access-to-task, the enclosing record is the master scope and the
   --  proper insertion point is the component list.
diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
index d0e0fcd3da1..9967bd20506 100644
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -17640,6 +17640,16 @@ package body Sem_Util is
   return False;
end Is_Inlinable_Expression_Function;
 
+   ---
+   -- Is_Internal_Block --
+   ---
+
+   function Is_Internal_Block (N : Node_Id) return Boolean is
+   begin
+  return Nkind (N) = N_Block_Statement
+and then Is_Internal (Entity (Identifier (N)));
+   end Is_Internal_Block;
+
-
-- Is_Iterator --
-
diff --git a/gcc/ada/sem_util.ads b/gcc/ada/sem_util.ads
index 185cf2ceabd..4333c495ae7 100644
--- a/gcc/ada/sem_util.ads
+++ b/gcc/ada/sem_util.ads
@@ -2101,6 +2101,11 @@ package Sem_Util is
-- 9. Nominal subtype of the returned object statically compatible
--with the result subtype of the expression function.
 
+   function Is_Internal_Block (N : Node_Id) return Boolean;
+   pragma Inline (Is_Internal_Block);
+   --  Determine if N is an N_Block_Statement with an internal label. See
+   --  Add_Block_Identifier.
+
function Is_Iterator (Typ : Entity_Id) return Boolean;
--  AI05-0139-2: Check whether Typ is one of the predefined interfaces in
--  Ada.Iterator_Interfaces, or it is derived from one.
-- 
2.40.0

[COMMITTED] ada: Remove redundant protection against empty lists

From: Piotr Trojanek 

Calls to Length on No_List intentionally return 0, so explicit guards
against No_List are unnecessary. Code cleanup; semantics is unaffected.

gcc/ada/

* sem_ch13.adb (Check_Component_List): Local variable Compl is now
a constant; a nested block is no longer needed.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_ch13.adb | 238 +--
 1 file changed, 116 insertions(+), 122 deletions(-)

diff --git a/gcc/ada/sem_ch13.adb b/gcc/ada/sem_ch13.adb
index 593e6f8c169..b13af26b561 100644
--- a/gcc/ada/sem_ch13.adb
+++ b/gcc/ada/sem_ch13.adb
@@ -11978,163 +11978,157 @@ package body Sem_Ch13 is
 Sbit : Uint;
 Abit : out Uint)
  is
-Compl : Integer;
+Compl : constant Natural :=
+  Natural (List_Length (Component_Items (CL)) + List_Length (DS));
 
- begin
-Compl := Integer (List_Length (Component_Items (CL)));
-
-if DS /= No_List then
-   Compl := Compl + Integer (List_Length (DS));
-end if;
-
-declare
-   Comps : array (Natural range 0 .. Compl) of Entity_Id;
-   --  Gather components (zero entry is for sort routine)
+Comps : array (Natural range 0 .. Compl) of Entity_Id;
+--  Gather components (zero entry is for sort routine)
 
-   Ncomps : Natural := 0;
-   --  Number of entries stored in Comps (starting at Comps (1))
+Ncomps : Natural := 0;
+--  Number of entries stored in Comps (starting at Comps (1))
 
-   Citem : Node_Id;
-   --  One component item or discriminant specification
+Citem : Node_Id;
+--  One component item or discriminant specification
 
-   Nbit  : Uint;
-   --  Starting bit for next component
+Nbit  : Uint;
+--  Starting bit for next component
 
-   CEnt  : Entity_Id;
-   --  Component entity
+CEnt  : Entity_Id;
+--  Component entity
 
-   Variant : Node_Id;
-   --  One variant
+Variant : Node_Id;
+--  One variant
 
-   function Lt (Op1, Op2 : Natural) return Boolean;
-   --  Compare routine for Sort
+function Lt (Op1, Op2 : Natural) return Boolean;
+--  Compare routine for Sort
 
-   procedure Move (From : Natural; To : Natural);
-   --  Move routine for Sort
+procedure Move (From : Natural; To : Natural);
+--  Move routine for Sort
 
-   package Sorting is new GNAT.Heap_Sort_G (Move, Lt);
+package Sorting is new GNAT.Heap_Sort_G (Move, Lt);
 
-   
-   -- Lt --
-   
+
+-- Lt --
+
 
-   function Lt (Op1, Op2 : Natural) return Boolean is
-  K1 : constant Boolean :=
-Known_Component_Bit_Offset (Comps (Op1));
-  K2 : constant Boolean :=
-Known_Component_Bit_Offset (Comps (Op2));
-  --  Record representation clauses can be incomplete, so the
-  --  Component_Bit_Offsets can be unknown.
-   begin
-  if K1 then
- if K2 then
-return Component_Bit_Offset (Comps (Op1))
- < Component_Bit_Offset (Comps (Op2));
- else
-return True;
- end if;
+function Lt (Op1, Op2 : Natural) return Boolean is
+   K1 : constant Boolean :=
+ Known_Component_Bit_Offset (Comps (Op1));
+   K2 : constant Boolean :=
+ Known_Component_Bit_Offset (Comps (Op2));
+   --  Record representation clauses can be incomplete, so the
+   --  Component_Bit_Offsets can be unknown.
+begin
+   if K1 then
+  if K2 then
+ return Component_Bit_Offset (Comps (Op1))
+  < Component_Bit_Offset (Comps (Op2));
   else
- return K2;
+ return True;
   end if;
-   end Lt;
+   else
+  return K2;
+   end if;
+end Lt;
 
-   --
-   -- Move --
-   --
-
-   procedure Move (From : Natural; To : Natural) is
-   begin
-  Comps (To) := Comps (From);
-   end Move;
+--
+-- Move --
+--
 
+procedure Move (From : Natural; To : Natural) is
 begin
-   --  Gather

[COMMITTED] ada: Simplify expansion of positional aggregates

From: Piotr Trojanek 

Code cleanup; semantics is unaffected.

gcc/ada/

* exp_aggr.adb (Build_Constrained_Type): Use List_Length to count
expressions in consecutive subaggregates.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_aggr.adb | 12 +++-
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb
index bbc0f408abc..60449fbeb2d 100644
--- a/gcc/ada/exp_aggr.adb
+++ b/gcc/ada/exp_aggr.adb
@@ -5837,7 +5837,6 @@ package body Exp_Aggr is
   procedure Build_Constrained_Type (Positional : Boolean) is
  Loc  : constant Source_Ptr := Sloc (N);
  Agg_Type : constant Entity_Id  := Make_Temporary (Loc, 'A');
- Comp : Node_Id;
  Decl : Node_Id;
  Typ  : constant Entity_Id := Etype (N);
  Indexes  : constant List_Id   := New_List;
@@ -5853,19 +5852,14 @@ package body Exp_Aggr is
 Sub_Agg := N;
 
 for D in 1 .. Number_Dimensions (Typ) loop
-   Sub_Agg := First (Expressions (Sub_Agg));
-
-   Comp := Sub_Agg;
-   Num := 0;
-   while Present (Comp) loop
-  Num := Num + 1;
-  Next (Comp);
-   end loop;
+   Num := List_Length (Expressions (Sub_Agg));
 
Append_To (Indexes,
  Make_Range (Loc,
Low_Bound  => Make_Integer_Literal (Loc, 1),
High_Bound => Make_Integer_Literal (Loc, Num)));
+
+   Sub_Agg := First (Expressions (Sub_Agg));
 end loop;
 
  else
-- 
2.40.0

[COMMITTED] ada: Remove redundant guards from handling of record components

From: Piotr Trojanek 

Call to First on empty list is intentionally returning Empty.

gcc/ada/

* sem_util.adb (Gather_Components): Remove guard for empty list of
components.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_util.adb | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/gcc/ada/sem_util.adb b/gcc/ada/sem_util.adb
index ea5be2ff4b5..d0e0fcd3da1 100644
--- a/gcc/ada/sem_util.adb
+++ b/gcc/ada/sem_util.adb
@@ -9748,14 +9748,9 @@ package body Sem_Util is
 
   if No (Comp_List) or else Null_Present (Comp_List) then
  return;
-
-  elsif Present (Component_Items (Comp_List)) then
- Comp_Item := First (Component_Items (Comp_List));
-
-  else
- Comp_Item := Empty;
   end if;
 
+  Comp_Item := First (Component_Items (Comp_List));
   while Present (Comp_Item) loop
 
  --  Skip the tag of a tagged record, as well as all items that are not
-- 
2.40.0

[COMMITTED] ada: Remove Is_Descendant_Of_Address flag from Standard_Address

From: Eric Botcazou 

It breaks the Allow_Integer_Address special mode.

Add new standard_address parameters to gigi and alphabetize others, this is
necessary when addresses are not treated like integers.

gcc/ada/

* back_end.adb (Call_Back_End): Add gigi_standard_address to the
signature of the gigi procedure and alphabetize other parameters.
Pass Standard_Address as actual parameter for it.
* cstand.adb (Create_Standard): Do not set Is_Descendant_Of_Address
on Standard_Address.
* gcc-interface/gigi.h (gigi): Add a standard_address parameter and
alphabetize others.
* gcc-interface/trans.cc (gigi): Likewise.  Record a builtin address
type and save it as the type for Standard.Address.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/back_end.adb   | 10 ++
 gcc/ada/cstand.adb |  2 --
 gcc/ada/gcc-interface/gigi.h   |  5 +++--
 gcc/ada/gcc-interface/trans.cc | 16 +++-
 4 files changed, 20 insertions(+), 13 deletions(-)

diff --git a/gcc/ada/back_end.adb b/gcc/ada/back_end.adb
index 23f5abe955e..bc370e9e9c7 100644
--- a/gcc/ada/back_end.adb
+++ b/gcc/ada/back_end.adb
@@ -103,11 +103,12 @@ package body Back_End is
  number_file   : Nat;
 
  file_info_ptr : Address;
+ gigi_standard_address : Entity_Id;
  gigi_standard_boolean : Entity_Id;
- gigi_standard_integer : Entity_Id;
  gigi_standard_character   : Entity_Id;
- gigi_standard_long_long_float : Entity_Id;
  gigi_standard_exception_type  : Entity_Id;
+ gigi_standard_integer : Entity_Id;
+ gigi_standard_long_long_float : Entity_Id;
  gigi_operating_mode   : Back_End_Mode_Type);
 
   pragma Import (C, gigi);
@@ -171,11 +172,12 @@ package body Back_End is
  number_file=> Num_Source_Files,
 
  file_info_ptr => File_Info_Array'Address,
+ gigi_standard_address => Standard_Address,
  gigi_standard_boolean => Standard_Boolean,
- gigi_standard_integer => Standard_Integer,
  gigi_standard_character   => Standard_Character,
- gigi_standard_long_long_float => Standard_Long_Long_Float,
  gigi_standard_exception_type  => Standard_Exception_Type,
+ gigi_standard_integer => Standard_Integer,
+ gigi_standard_long_long_float => Standard_Long_Long_Float,
  gigi_operating_mode   => Mode);
end Call_Back_End;
 
diff --git a/gcc/ada/cstand.adb b/gcc/ada/cstand.adb
index d4a420deda9..fbd5888b198 100644
--- a/gcc/ada/cstand.adb
+++ b/gcc/ada/cstand.adb
@@ -1370,11 +1370,9 @@ package body CStand is
 
   --  Standard_Address is not user visible, but is used internally. It is
   --  an unsigned type mod 2**System_Address_Size with System.Address size.
-  --  We flag it as Is_Descendant_Of_Address for code generation purposes.
 
   Standard_Address := New_Standard_Entity ("standard_address");
   Build_Unsigned_Integer_Type (Standard_Address, System_Address_Size);
-  Set_Is_Descendant_Of_Address (Standard_Address);
 
   --  Note: universal integer and universal real are constructed as fully
   --  formed signed numeric types, with parameters corresponding to the
diff --git a/gcc/ada/gcc-interface/gigi.h b/gcc/ada/gcc-interface/gigi.h
index fee0450a338..ec85ce44bc3 100644
--- a/gcc/ada/gcc-interface/gigi.h
+++ b/gcc/ada/gcc-interface/gigi.h
@@ -245,11 +245,12 @@ extern void gigi (Node_Id gnat_root,
  struct List_Header *list_headers_ptr,
  Nat number_file,
  struct File_Info_Type *file_info_ptr,
+ Entity_Id standard_address,
  Entity_Id standard_boolean,
- Entity_Id standard_integer,
  Entity_Id standard_character,
- Entity_Id standard_long_long_float,
  Entity_Id standard_exception_type,
+ Entity_Id standard_integer,
+ Entity_Id standard_long_long_float,
  Int gigi_operating_mode);
 
 #ifdef __cplusplus
diff --git a/gcc/ada/gcc-interface/trans.cc b/gcc/ada/gcc-interface/trans.cc
index c26f1b6e1ac..13f438c424b 100644
--- a/gcc/ada/gcc-interface/trans.cc
+++ b/gcc/ada/gcc-interface/trans.cc
@@ -290,11 +290,12 @@ gigi (Node_Id gnat_root,
   struct List_Header *list_headers_ptr,
   Nat number_file,
   struct File_Info_Type *file_info_ptr,
+  Entity_Id standard_address,
   Entity_Id standard_boolean,
-  Entity_Id standard_integer,
   Entity_Id standard_character,
-  Entity_Id standard_long_long_float,
   Entity_Id standard_exception_type,
+  Entity_Id standard_integer,
+  Entity_Id standard_long_long_float,
   Int gigi_operating_mode)
 {
   Node_Id gnat_iter;
@@ -375,14

[COMMITTED] ada: Use context variables in expansion of aggregates

From: Piotr Trojanek 

Code cleanup; semantics is unaffected.

gcc/ada/

* exp_aggr.adb
(Build_Constrained_Type): Remove local constants that were shadowing
equivalent global constants; replace a wrapper that calls
Make_Integer_Literal with a numeric literal; remove explicit
Aliased_Present parameter which is equivalent to the default value.
(Check_Bounds): Remove unused initial value.
(Expand_Array_Aggregate): Use aggregate type from the context.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_aggr.adb | 17 +++--
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb
index 60449fbeb2d..1dcbfade86c 100644
--- a/gcc/ada/exp_aggr.adb
+++ b/gcc/ada/exp_aggr.adb
@@ -5835,11 +5835,9 @@ package body Exp_Aggr is
   
 
   procedure Build_Constrained_Type (Positional : Boolean) is
- Loc  : constant Source_Ptr := Sloc (N);
- Agg_Type : constant Entity_Id  := Make_Temporary (Loc, 'A');
+ Agg_Type : constant Entity_Id := Make_Temporary (Loc, 'A');
  Decl : Node_Id;
- Typ  : constant Entity_Id := Etype (N);
- Indexes  : constant List_Id   := New_List;
+ Indexes  : constant List_Id := New_List;
  Num  : Nat;
  Sub_Agg  : Node_Id;
 
@@ -5851,12 +5849,12 @@ package body Exp_Aggr is
  if Positional then
 Sub_Agg := N;
 
-for D in 1 .. Number_Dimensions (Typ) loop
+for D in 1 .. Aggr_Dimension loop
Num := List_Length (Expressions (Sub_Agg));
 
Append_To (Indexes,
  Make_Range (Loc,
-   Low_Bound  => Make_Integer_Literal (Loc, 1),
+   Low_Bound  => Make_Integer_Literal (Loc, Uint_1),
High_Bound => Make_Integer_Literal (Loc, Num)));
 
Sub_Agg := First (Expressions (Sub_Agg));
@@ -5867,7 +5865,7 @@ package body Exp_Aggr is
 --  is not processable by the back end, therefore not necessarily
 --  positional. Retrieve each dimension bounds (computed earlier).
 
-for D in 1 .. Number_Dimensions (Typ) loop
+for D in 1 .. Aggr_Dimension loop
Append_To (Indexes,
  Make_Range (Loc,
Low_Bound  => Aggr_Low  (D),
@@ -5883,7 +5881,6 @@ package body Exp_Aggr is
Discrete_Subtype_Definitions => Indexes,
Component_Definition =>
  Make_Component_Definition (Loc,
-   Aliased_Present=> False,
Subtype_Indication =>
  New_Occurrence_Of (Component_Type (Typ), Loc;
 
@@ -5904,7 +5901,7 @@ package body Exp_Aggr is
  Ind_Bounds  : constant Range_Nodes :=
Get_Index_Bounds (Index_Bounds_Node);
 
- Cond : Node_Id := Empty;
+ Cond : Node_Id;
 
   begin
  --  For a null array aggregate check that high bound (i.e., low
@@ -6954,7 +6951,7 @@ package body Exp_Aggr is
   --  If this is an array of tasks, it will be expanded into build-in-place
   --  assignments. Build an activation chain for the tasks now.
 
-  if Has_Task (Etype (N)) then
+  if Has_Task (Typ) then
  Build_Activation_Chain_Entity (N);
   end if;
 
-- 
2.40.0

[COMMITTED] ada: Use computed value from os_constants to define sigset_t

From: Doug Rupp 

Remove hard coded definition and conform to standard usage of using
computed os_constants for opaque type declarations.

gcc/ada/

* libgnarl/s-osinte__qnx.ads (sigset_t): Modify
declaration to use system.os_constants computed
value. Align it.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/libgnarl/s-osinte__qnx.ads | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/gcc/ada/libgnarl/s-osinte__qnx.ads 
b/gcc/ada/libgnarl/s-osinte__qnx.ads
index 3aa727f158f..3282abe8869 100644
--- a/gcc/ada/libgnarl/s-osinte__qnx.ads
+++ b/gcc/ada/libgnarl/s-osinte__qnx.ads
@@ -562,8 +562,10 @@ package System.OS_Interface is
 
 private
 
-   type sigset_t is array (1 .. 2) of Interfaces.Unsigned_32;
+   type sigset_t is
+ array (0 .. OS_Constants.SIZEOF_sigset - 1) of unsigned_char;
pragma Convention (C, sigset_t);
+   for sigset_t'Alignment use Interfaces.C.unsigned_long'Alignment;
 
type pid_t is new int;
 
-- 
2.40.0

[COMMITTED] ada: Fix missing finalization in library-level instance body

From: Eric Botcazou 

This extends the delaying mechanism present in the cases where the instance
is not at library level, so as to wait until after the instantiation of the
body is performed, before generating the finalizer of the compilation unit.

gcc/ada/

* einfo.ads (Delay_Cleanups): Document new usage.
* exp_ch7.ads (Build_Finalizer): New declaration.
* exp_ch7.adb (Build_Finalizer.Process_Declarations): Do not treat
library-level package instantiations specially.
(Build_Finalizer): Return early for package bodies and specs that
are not compilation units instead of using a more convoluted test.
(Expand_N_Package_Body): Do not build a finalizer if Delay_Cleanups
is set on the defining entity.
(Expand_N_Package_Declaration): Likewise.
* inline.ads (Pending_Body_Info): Reorder and add Fin_Scop.
(Add_Pending_Instantiation): Add Fin_Scop parameter.
* inline.adb (Add_Pending_Instantiation): Likewise and copy it into
the Pending_Body_Info appended to Pending_Instantiations.
(Add_Scope_To_Clean): Change parameter name to Scop and remove now
irrelevant processing.
(Cleanup_Scopes): Deal with scopes that are package specs or bodies.
(Instantiate_Body): For package instantiations, deal specially with
scopes that are package bodies and with scopes that are dynamic.
Pass the resulting scope to Add_Scope_To_Clean directly.
* sem_ch12.adb (Analyze_Package_Instantiation): In the case where a
body is needed, compute the enclosing finalization scope and pass it
in the call to Add_Pending_Instantiation.
(Inline_Instance_Body): Adjust aggregate passed in the calls to
Instantiate_Package_Body.
(Load_Parent_Of_Generic): Likewise.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/einfo.ads|  12 ++--
 gcc/ada/exp_ch7.adb  | 133 +
 gcc/ada/exp_ch7.ads  |  23 +++
 gcc/ada/inline.adb   | 154 ++-
 gcc/ada/inline.ads   |  14 ++--
 gcc/ada/sem_ch12.adb | 114 +---
 6 files changed, 222 insertions(+), 228 deletions(-)

diff --git a/gcc/ada/einfo.ads b/gcc/ada/einfo.ads
index 7dc2bd178cc..ef5201a68ff 100644
--- a/gcc/ada/einfo.ads
+++ b/gcc/ada/einfo.ads
@@ -864,12 +864,12 @@ package Einfo is
 --   and IN OUT parameters in the absence of errors).
 
 --Delay_Cleanups
---   Defined in entities that have finalization lists (subprograms
---   blocks, and tasks). Set if there are pending generic body
---   instantiations for the corresponding entity. If this flag is
---   set, then generation of cleanup actions for the corresponding
---   entity must be delayed, since the insertion of the generic body
---   may affect cleanup generation (see Inline for further details).
+--   Defined in entities that have finalization lists (subprograms, blocks
+--   and tasks) or finalizers (package specs and bodies). Set if there are
+--   pending package body instantiations for the corresponding entity. If
+--   it is set, then generation of cleanup actions for the corresponding
+--   entity must be delayed, since the insertion of the package bodies may
+--   affect cleanup generation (see Inline for further details).
 
 --Delta_Value
 --   Defined in fixed and decimal types. Points to a universal real
diff --git a/gcc/ada/exp_ch7.adb b/gcc/ada/exp_ch7.adb
index 98a62970cd0..1586e8fbfca 100644
--- a/gcc/ada/exp_ch7.adb
+++ b/gcc/ada/exp_ch7.adb
@@ -281,29 +281,6 @@ package body Exp_Ch7 is
--  does not contain the above constructs, the routine returns an empty
--  list.
 
-   procedure Build_Finalizer
- (N   : Node_Id;
-  Clean_Stmts : List_Id;
-  Mark_Id : Entity_Id;
-  Top_Decls   : List_Id;
-  Defer_Abort : Boolean;
-  Fin_Id  : out Entity_Id);
-   --  N may denote an accept statement, block, entry body, package body,
-   --  package spec, protected body, subprogram body, or a task body. Create
-   --  a procedure which contains finalization calls for all controlled objects
-   --  declared in the declarative or statement region of N. The calls are
-   --  built in reverse order relative to the original declarations. In the
-   --  case of a task body, the routine delays the creation of the finalizer
-   --  until all statements have been moved to the task body procedure.
-   --  Clean_Stmts may contain additional context-dependent code used to abort
-   --  asynchronous calls or complete tasks (see Build_Cleanup_Statements).
-   --  Mark_Id is the secondary stack used in the current context or Empty if
-   --  missing. Top_Decls is the list on which the declaration of the finalizer
-   --  is attached in the non-package case. Defer_Abort indicates that the
-   --  statements passed in perform actions that require

[COMMITTED] ada: Handle new Controlling_Tag format when converting to SCIL

From: Ghjuvan Lacambre 

This commit fixes two CodePeer crashes that were introduced when the
format of the controlling tag changed.

gcc/ada/

* exp_disp.adb (Expand_Dispatching_Call): Handle new Controlling_Tag.
* sem_scil.adb (Check_SCIL_Node): Treat N_Object_Renaming_Declaration as
N_Object_Declaration.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_disp.adb | 34 ++
 gcc/ada/sem_scil.adb |  5 +++--
 2 files changed, 29 insertions(+), 10 deletions(-)

diff --git a/gcc/ada/exp_disp.adb b/gcc/ada/exp_disp.adb
index e7cae38d553..494ead7c144 100644
--- a/gcc/ada/exp_disp.adb
+++ b/gcc/ada/exp_disp.adb
@@ -1133,18 +1133,36 @@ package body Exp_Disp is
 Set_SCIL_Controlling_Tag (SCIL_Node,
   Parent (Entity (Prefix (Controlling_Tag;
 
- --  For a direct reference of the tag of the type the SCIL node
- --  references the internal object declaration containing the tag
- --  of the type.
+ --  Depending on whether a dereference is involved, the SCIL node
+ --  references the corresponding object/parameter declaration or
+ --  the internal object declaration containing the tag of the type.
 
  elsif Nkind (Controlling_Tag) = N_Attribute_Reference
 and then Attribute_Name (Controlling_Tag) = Name_Tag
  then
-Set_SCIL_Controlling_Tag (SCIL_Node,
-  Parent
-(Node
-  (First_Elmt
-(Access_Disp_Table (Entity (Prefix (Controlling_Tag)));
+declare
+   Prefix_Node : constant Node_Id   := Prefix (Controlling_Tag);
+   Ent : constant Entity_Id := Entity
+ (if Nkind (Prefix_Node) = N_Explicit_Dereference then
+Prefix (Prefix_Node)
+  else
+Prefix_Node);
+
+begin
+   if Ekind (Ent) in E_Record_Type
+   | E_Record_Subtype
+   | E_Record_Type_With_Private
+   then
+  Set_SCIL_Controlling_Tag (SCIL_Node,
+Parent
+  (Node
+(First_Elmt
+  (Access_Disp_Table (Ent);
+
+   else
+  Set_SCIL_Controlling_Tag (SCIL_Node, Parent (Ent));
+   end if;
+end;
 
  --  Interfaces are not supported. For now we leave the SCIL node
  --  decorated with the Controlling_Tag. More work needed here???
diff --git a/gcc/ada/sem_scil.adb b/gcc/ada/sem_scil.adb
index 7c75c9d66bc..da8fab69a97 100644
--- a/gcc/ada/sem_scil.adb
+++ b/gcc/ada/sem_scil.adb
@@ -88,8 +88,9 @@ package body Sem_SCIL is
 --  object or parameter declaration. Interface types are still
 --  unsupported.
 
-elsif Nkind (Ctrl_Tag) in
-N_Object_Declaration | N_Parameter_Specification
+elsif Nkind (Ctrl_Tag) in N_Object_Renaming_Declaration
+| N_Object_Declaration
+| N_Parameter_Specification
 then
Ctrl_Typ := Etype (Defining_Identifier (Ctrl_Tag));
 
-- 
2.40.0

[COMMITTED] ada: Fix late extra formals creation

From: Ronan Desplanques 

Before this patch, in some situations, a subprogram call could be
expanded before the extra formals for the subprogram were created.

This patch fixes the problem in those situations.

gcc/ada/

* sem_ch6.adb (Analyze_Subprogram_Body_Helper): Create extra formals
in more situations.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/sem_ch6.adb | 1 +
 1 file changed, 1 insertion(+)

diff --git a/gcc/ada/sem_ch6.adb b/gcc/ada/sem_ch6.adb
index 6df1c8dedd3..c58a5488cd2 100644
--- a/gcc/ada/sem_ch6.adb
+++ b/gcc/ada/sem_ch6.adb
@@ -3907,6 +3907,7 @@ package body Sem_Ch6 is
and then Serious_Errors_Detected = 0
  then
 Set_Has_Delayed_Freeze (Spec_Id);
+Create_Extra_Formals (Spec_Id);
 Freeze_Before (N, Spec_Id);
  end if;
   end if;
-- 
2.40.0

[COMMITTED] ada: Refine types for an accessibility-checking routine

From: Piotr Trojanek 

Code cleanup related to work on expression functions for GNATprove
(which require accessibility checks even when they are not expanded
and thus have no explicit return statements).

gcc/ada/

* accessibility.adb
(Is_Formal_Of_Current_Function): This routine expects an entity
reference and not the entity itself, so its parameter is a Node_Id
and not an Entity_Id.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/accessibility.adb | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/ada/accessibility.adb b/gcc/ada/accessibility.adb
index c65c26d8875..bc897d1ef18 100644
--- a/gcc/ada/accessibility.adb
+++ b/gcc/ada/accessibility.adb
@@ -1153,7 +1153,7 @@ package body Accessibility is
   --  Obtain the first selector or choice from a given association
 
   function Is_Formal_Of_Current_Function
-(Assoc_Expr : Entity_Id) return Boolean;
+(Assoc_Expr : Node_Id) return Boolean;
   --  Predicate to test if a given expression associated with a
   --  discriminant is a formal parameter to the function in which the
   --  return construct we checking applies to.
@@ -1180,7 +1180,7 @@ package body Accessibility is
   ---
 
   function Is_Formal_Of_Current_Function
-(Assoc_Expr : Entity_Id) return Boolean is
+(Assoc_Expr : Node_Id) return Boolean is
   begin
  return Is_Entity_Name (Assoc_Expr)
   and then Enclosing_Subprogram
-- 
2.40.0

[COMMITTED] ada: Fix another couple of unchecked conversions to Ada.Tags.Tag

From: Eric Botcazou 

They are problematic on platforms where the provenance of pointers must be
tracked throughout their lifetime.

gcc/ada/

* exp_sel.adb: Add clauses for Sem_Util, remove them for Opt, Sinfo
and Sinfo.Nodes.
(Build_K): Always use 'Tag of the object.
(Build_S_Assignment): Likewise.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_sel.adb | 71 +++--
 1 file changed, 17 insertions(+), 54 deletions(-)

diff --git a/gcc/ada/exp_sel.adb b/gcc/ada/exp_sel.adb
index 66019be8e58..39ebb91139d 100644
--- a/gcc/ada/exp_sel.adb
+++ b/gcc/ada/exp_sel.adb
@@ -27,10 +27,8 @@ with Einfo;  use Einfo;
 with Einfo.Entities; use Einfo.Entities;
 with Nlists; use Nlists;
 with Nmake;  use Nmake;
-with Opt;use Opt;
 with Rtsfind;use Rtsfind;
-with Sinfo;  use Sinfo;
-with Sinfo.Nodes;use Sinfo.Nodes;
+with Sem_Util;   use Sem_Util;
 with Snames; use Snames;
 with Stand;  use Stand;
 with Tbuild; use Tbuild;
@@ -151,18 +149,12 @@ package body Exp_Sel is
   Obj   : Entity_Id) return Entity_Id
is
   K: constant Entity_Id := Make_Temporary (Loc, 'K');
-  Tag_Node : Node_Id;
+  Tag_Node : constant Node_Id   :=
+Make_Attribute_Reference (Loc,
+  Prefix => New_Copy_Tree (Obj),
+  Attribute_Name => Name_Tag);
 
begin
-  if Tagged_Type_Expansion then
- Tag_Node := Unchecked_Convert_To (RTE (RE_Tag), Obj);
-  else
- Tag_Node :=
-   Make_Attribute_Reference (Loc,
- Prefix => Obj,
- Attribute_Name => Name_Tag);
-  end if;
-
   Append_To (Decls,
 Make_Object_Declaration (Loc,
   Defining_Identifier => K,
@@ -172,6 +164,7 @@ package body Exp_Sel is
 Make_Function_Call (Loc,
   Name => New_Occurrence_Of (RTE (RE_Get_Tagged_Kind), Loc),
   Parameter_Associations => New_List (Tag_Node;
+
   return K;
end Build_K;
 
@@ -202,48 +195,18 @@ package body Exp_Sel is
   Obj  : Entity_Id;
   Call_Ent : Entity_Id) return Node_Id
is
-  Typ : constant Entity_Id := Etype (Obj);
-
begin
-  if Tagged_Type_Expansion then
- return
-   Make_Assignment_Statement (Loc,
- Name   => New_Occurrence_Of (S, Loc),
- Expression =>
-   Make_Function_Call (Loc,
- Name => New_Occurrence_Of (RTE (RE_Get_Offset_Index), Loc),
- Parameter_Associations => New_List (
-   Unchecked_Convert_To (RTE (RE_Tag), Obj),
-   Make_Integer_Literal (Loc, DT_Position (Call_Ent);
-
-  --  VM targets
-
-  else
- return
-   Make_Assignment_Statement (Loc,
- Name   => New_Occurrence_Of (S, Loc),
- Expression =>
-   Make_Function_Call (Loc,
- Name => New_Occurrence_Of (RTE (RE_Get_Offset_Index), Loc),
-
- Parameter_Associations => New_List (
-
- --  Obj_Typ
-
-   Make_Attribute_Reference (Loc,
- Prefix => Obj,
- Attribute_Name => Name_Tag),
-
- --  Iface_Typ
-
-   Make_Attribute_Reference (Loc,
- Prefix => New_Occurrence_Of (Typ, Loc),
- Attribute_Name => Name_Tag),
-
- --  Position
-
-   Make_Integer_Literal (Loc, DT_Position (Call_Ent);
-  end if;
+  return
+Make_Assignment_Statement (Loc,
+  Name   => New_Occurrence_Of (S, Loc),
+  Expression =>
+Make_Function_Call (Loc,
+  Name => New_Occurrence_Of (RTE (RE_Get_Offset_Index), Loc),
+  Parameter_Associations => New_List (
+Make_Attribute_Reference (Loc,
+  Prefix => New_Copy_Tree (Obj),
+  Attribute_Name => Name_Tag),
+Make_Integer_Literal (Loc, DT_Position (Call_Ent);
end Build_S_Assignment;
 
 end Exp_Sel;
-- 
2.40.0

[COMMITTED] ada: Clean style in expansion of array aggregates

From: Piotr Trojanek 

Code cleanup only; semantics is unaffected.

gcc/ada/

* exp_aggr.adb
(Build_Array_Aggr_Code): Change variable to constant.
(Check_Same_Aggr_Bounds): Fix style; remove unused initial value.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/exp_aggr.adb | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb
index de4d5a785fc..bbc0f408abc 100644
--- a/gcc/ada/exp_aggr.adb
+++ b/gcc/ada/exp_aggr.adb
@@ -2305,7 +2305,7 @@ package body Exp_Aggr is
   Assoc  : Node_Id;
   Choice : Node_Id;
   Expr   : Node_Id;
-  Typ: Entity_Id;
+  Typ: constant Entity_Id := Etype (N);
 
   Bounds : Range_Nodes;
   Low: Node_Id renames Bounds.First;
@@ -2323,12 +2323,10 @@ package body Exp_Aggr is
--  Start of processing for Build_Array_Aggr_Code
 
begin
-  --  First before we start, a special case. if we have a bit packed
+  --  First before we start, a special case. If we have a bit packed
   --  array represented as a modular type, then clear the value to
   --  zero first, to ensure that unused bits are properly cleared.
 
-  Typ := Etype (N);
-
   if Present (Typ)
 and then Is_Bit_Packed_Array (Typ)
 and then Is_Modular_Integer_Type (Packed_Array_Impl_Type (Typ))
@@ -6002,8 +6000,8 @@ package body Exp_Aggr is
   
 
   procedure Check_Same_Aggr_Bounds (Sub_Aggr : Node_Id; Dim : Pos) is
- Sub_Bounds : constant Range_Nodes
-   := Get_Index_Bounds (Aggregate_Bounds (Sub_Aggr));
+ Sub_Bounds : constant Range_Nodes :=
+   Get_Index_Bounds (Aggregate_Bounds (Sub_Aggr));
  Sub_Lo : Node_Id renames Sub_Bounds.First;
  Sub_Hi : Node_Id renames Sub_Bounds.Last;
  --  The bounds of this specific subaggregate
@@ -6015,7 +6013,7 @@ package body Exp_Aggr is
  Ind_Typ : constant Entity_Id := Aggr_Index_Typ (Dim);
  --  The index type for this dimension.xxx
 
- Cond  : Node_Id := Empty;
+ Cond  : Node_Id;
  Assoc : Node_Id;
  Expr  : Node_Id;
 
-- 
2.40.0

[COMMITTED] ada: Add missing guards in Selected_Range_Checks

From: Eric Botcazou 

gcc/ada/

* checks.adb (Selected_Range_Checks): Add guards to protect calls
to Expr_Value on bounds.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/checks.adb | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/ada/checks.adb b/gcc/ada/checks.adb
index 0d472964ff5..6525982aef9 100644
--- a/gcc/ada/checks.adb
+++ b/gcc/ada/checks.adb
@@ -10826,6 +10826,8 @@ package body Checks is
 
if not Check_Added
  and then Is_Fixed_Lower_Bound_Index_Subtype (T_Typ)
+ and then Known_LB
+ and then Known_T_LB
  and then Expr_Value (LB) /= Expr_Value (T_LB)
then
   Add_Check
-- 
2.40.0

[COMMITTED] ada: Enhance Is_Null_Range and Not_Null_Range predicates

From: Eric Botcazou 

Both predicates bail out if the bounds of the range are not known at compile
time, whereas Compile_Time_Compare can deal with them in specific cases.

gcc/ada/

* sem_eval.ads (Is_Null_Range): Remove requirements of compile-time
known bounds and add WARNING line.
(Not_Null_Range): Remove requirements of compile-time known bounds.
* sem_eval.adb (Is_Null_Range): Fall back to Compile_Time_Compare.
(Not_Null_Range): Likewise.
* fe.h (Is_Null_Range): New predicate.

Tested on x86_64-pc-linux-gnu, committed on master.

---
 gcc/ada/fe.h |  2 ++
 gcc/ada/sem_eval.adb |  8 +---
 gcc/ada/sem_eval.ads | 10 --
 3 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/gcc/ada/fe.h b/gcc/ada/fe.h
index 2d8f299903d..f283064c728 100644
--- a/gcc/ada/fe.h
+++ b/gcc/ada/fe.h
@@ -300,8 +300,10 @@ extern Boolean Is_Derived_Type 
(Entity_Id);
 /* sem_eval: */
 
 #define Compile_Time_Known_Value   sem_eval__compile_time_known_value
+#define Is_Null_Range  sem_eval__is_null_range
 
 extern Boolean Compile_Time_Known_Value(Node_Id);
+extern Boolean Is_Null_Range   (Node_Id, Node_Id);
 
 /* sem_util: */
 
diff --git a/gcc/ada/sem_eval.adb b/gcc/ada/sem_eval.adb
index 905e7ff55b7..4608b1b18c1 100644
--- a/gcc/ada/sem_eval.adb
+++ b/gcc/ada/sem_eval.adb
@@ -5416,8 +5416,9 @@ package body Sem_Eval is
return Expr_Value_R (Lo) > Expr_Value_R (Hi);
 end if;
  end;
+
   else
- return False;
+ return Compile_Time_Compare (Lo, Hi, Assume_Valid => False) = GT;
   end if;
end Is_Null_Range;
 
@@ -6028,10 +6029,11 @@ package body Sem_Eval is
return Expr_Value_R (Lo) <= Expr_Value_R (Hi);
 end if;
  end;
+
   else
- return False;
+ return
+   Compile_Time_Compare (Lo, Hi, Assume_Valid => False) in Compare_LE;
   end if;
-
end Not_Null_Range;
 
-
diff --git a/gcc/ada/sem_eval.ads b/gcc/ada/sem_eval.ads
index c2e2b4589b8..5cb97ba057d 100644
--- a/gcc/ada/sem_eval.ads
+++ b/gcc/ada/sem_eval.ads
@@ -409,9 +409,9 @@ package Sem_Eval is
--  an entity with Is_Known_Valid set, or Assume_No_Invalid_Values is True.
 
function Is_Null_Range (Lo : Node_Id; Hi : Node_Id) return Boolean;
-   --  Returns True if it can guarantee that Lo .. Hi is a null range. If it
-   --  cannot (because the value of Lo or Hi is not known at compile time) then
-   --  it returns False.
+   --  Returns True if it can guarantee that Lo .. Hi is a null range
+
+   --  WARNING: There is a matching C declaration of this subprogram in fe.h
 
function Is_OK_Static_Expression (N : Node_Id) return Boolean;
--  An OK static expression is one that is static in the RM definition sense
@@ -485,9 +485,7 @@ package Sem_Eval is
--  per RM 4.9(38/2). N is a node only used to post warnings.
 
function Not_Null_Range (Lo : Node_Id; Hi : Node_Id) return Boolean;
-   --  Returns True if it can guarantee that Lo .. Hi is not a null range. If
-   --  it cannot (because the value of Lo or Hi is not known at compile time)
-   --  then it returns False.
+   --  Returns True if it can guarantee that Lo .. Hi is not a null range
 
function Predicates_Compatible (T1, T2 : Entity_Id) return Boolean;
--  In Ada 2012, subtypes are statically compatible if the predicates are
-- 
2.40.0

[RFC][PATCH] Improve generating FMA by adding a widening_mul pass

2023-05-26 Thread Di Zhao OS via Gcc-patches

As GCC's reassociation pass does not have knowledge of FMA, when
transforming expression lists to parallel, it reduces the
opportunities to generate FMAs. Currently there's a workaround
on AArch64 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84114),
that is, to disable the parallelization with floating-point additions.
However, this approach may cause regressions. For example, in the
code below there are only floating-point additions when calculating
"result += array[j]", and rewriting to parallel is better:

// Compile with -Ofast on aarch64
float foo (int n, float in)
{
  float array[8] = { 0.1, 1.0, 1.1, 100.0, 10.5, 0.5, 0.01, 9.9 };
  float result = 0.0;
  for (int i = 0; i < n; i++)
{
  if (i % 10)
for (unsigned j = 0; j < 8; j++)
  array[j] *= in;

  for (unsigned j = 0; j < 8; j++)
   result += array[j];
}
  return result;
}

To improve this, one option is to count the number of MUL_EXPRs in an
operator list before rewriting to parallel, and allow the rewriting
when there's none (or 1 MUL_EXPR). This is simple and unlikely to
introduce regressions. However it lacks flexibility and can not handle
more general cases.

Here's an attempt to address the issue more generally.

1. Added an additional widening_mul pass before the original reassoc2
pass. The new pass is limited to only insert FMA, and leave other
operations like convert_mult_to_widen to the old late widening_mul pass,
in case other optimizations between the two passes could be hindered.

2. On some platforms, for a very long FMA chain, rewriting to parallel
can be faster. Extended the original "deferring" logic so that all
conversions to FMA can be deferred. Introduced a new parameter
op-count-prefer-reassoc to control this behavior.

3. Additionally, the new widening_mul pass calls execute_reassoc first,
to avoid losing opportunities such as folding constants and
undistributing.

However, changing the sequence of generating FMA and reassociation may
expose more FMA chains that are slow (see commit 4a0d0ed2).
To reduce possible regressions, improved handling the slow FMA chain by:

1. Modified result_of_phi to support checking an additional FADD/FMUL.

2. On some CPUs, rather than removing the whole FMA chain, only skipping
a few candidates may generate faster code. Added new parameter
fskip-fma-heuristic to control this behavior.

This patch also solves https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98350.

Thanks,
Di Zhao



0001-Improve-generating-FMA-by-adding-a-widening_mul-pass.patch
Description: 0001-Improve-generating-FMA-by-adding-a-widening_mul-pass.patch

Re: [PATCH v2] i386: Allow -mlarge-data-threshold with -mcmodel=large

2023-05-26 Thread Jan Beulich via Gcc-patches

On 25.05.2023 18:11, Fangrui Song wrote:
> On 2023-05-25, Jan Beulich wrote:
>> On 25.05.2023 17:16, Fangrui Song wrote:
>>> --- a/gcc/doc/invoke.texi
>>> +++ b/gcc/doc/invoke.texi
>>> @@ -32942,9 +32942,10 @@ the cache line size.  @samp{compat} is the default.
>>>
>>>  @opindex mlarge-data-threshold
>>>  @item -mlarge-data-threshold=@var{threshold}
>>> -When @option{-mcmodel=medium} is specified, data objects larger than
>>> -@var{threshold} are placed in the large data section.  This value must be 
>>> the
>>> -same across all objects linked into the binary, and defaults to 65535.
>>> +When @option{-mcmodel=medium} or @option{-mcmodel=large} is specified, data
>>> +objects larger than @var{threshold} are placed in large data sections.  
>>> This
>>> +value must be the same across all objects linked into the binary, and 
>>> defaults
>>> +to 65535.
>>
>> Where's the "must be the same" requirement coming from?
> 
> It's an existing requirement.  I think it may be related to discouraging
> different COMDAT sections names due to different -mlarge-data-threshold=.
> I don't think it makes sense but did not feel strongly dropping it.
> 
> Happy to drop the requirement if I revise this patch.

I understand that this isn't something you introduce, but it still stuck
me as odd. Therefore I thought I'd suggest to take the opportunity to at
least soften the language, unless of course there's a real reason behind
it.

>> As to the default - to remain compatible with earlier versions, shouldn't
>> large model code default to "infinity"?
>>
>> Jan
> 
> I have thought about this compatibility need and feel that it is very
> unlikly to be needed.  GNU ld has supported large data sections since
> 2005
> (https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=3b22753a67cf616514de804ef6d5ed5e90a7d883).
> Users' programs with the internal linker scripts will still be working
> and -fdata-sections sections will be combined.

Well, the concern clearly is about custom scripts. Imo ...

> First, -mcmodel=large use cases are rare enough.  Rare perhaps
> -mcmodel=largel was considered theoretic excercise  in
> trying to reach feature completion
> (https://groups.google.com/g/x86-64-abi/c/jnQdJeabxiU/m/NNuA0P7pAQAJ),
> without this patch -mcmodel=large object files don't interract well with
> existing -mcmodel=small object files.

... the more exotic a project, the more likely it is that they're using
custom scripts.

> Moreover, if a user expects a specific section prefix with
> -mcmodel=large, that's a brittle assumption. I think it's fair to say
> that the fault is on the user side and GCC doesn't need to work around
> their issues.

I guess I don't really see what you base this on. Without any special
options, expecting data to end up in .data/.bss/.rodata (and variants
thereof) looks like quite reasonable an assumption to me.

Jan

Re: [PATCH] genmatch: Emit debug message right before "return x" instead of earlier

2023-05-26 Thread Richard Biener via Gcc-patches

On Fri, May 26, 2023 at 4:59 AM Andrew Pinski via Gcc-patches
 wrote:
>
> This is based on the review of 
> https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619342.html .
> Instead of emitting debug message even if we don't apply a pattern, this 
> fixes the issue
> by only emitting it if it the pattern finally succeeded.
>
> OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

OK

Thanks,
Richard.

> gcc/ChangeLog:
>
> * genmatch.cc (emit_debug_printf): New function.
> (dt_simplify::gen_1): Emit printf into the code
> before the `return true` or returning the folded result
> instead of emitting it always.
> ---
>  gcc/genmatch.cc | 33 ++---
>  1 file changed, 22 insertions(+), 11 deletions(-)
>
> diff --git a/gcc/genmatch.cc b/gcc/genmatch.cc
> index 177c13d87cb..bd6ce3a28f8 100644
> --- a/gcc/genmatch.cc
> +++ b/gcc/genmatch.cc
> @@ -3359,6 +3359,21 @@ dt_operand::gen (FILE *f, int indent, bool gimple, int 
> depth)
>  }
>  }
>
> +/* Emit a fprintf to the debug file to the file F, with the INDENT from
> +   either the RESULT location or the S's match location if RESULT is null. */
> +static void
> +emit_debug_printf (FILE *f, int indent, class simplify *s, operand *result)
> +{
> +  fprintf_indent (f, indent, "if (UNLIKELY (debug_dump)) "
> +  "fprintf (dump_file, \"%s ",
> +  s->kind == simplify::SIMPLIFY
> +  ? "Applying pattern" : "Matching expression");
> +  fprintf (f, "%%s:%%d, %%s:%%d\\n\", ");
> +  output_line_directive (f,
> +result ? result->location : s->match->location, true,
> +true);
> +  fprintf (f, ", __FILE__, __LINE__);\n");
> +}
>
>  /* Generate code for the '(if ...)', '(with ..)' and actual transform
> step of a '(simplify ...)' or '(match ...)'.  This handles everything
> @@ -3488,21 +3503,12 @@ dt_simplify::gen_1 (FILE *f, int indent, bool gimple, 
> operand *result)
>needs_label = true;
>  }
>
> -  fprintf_indent (f, indent, "if (UNLIKELY (debug_dump)) "
> -  "fprintf (dump_file, \"%s ",
> -  s->kind == simplify::SIMPLIFY
> -  ? "Applying pattern" : "Matching expression");
> -  fprintf (f, "%%s:%%d, %%s:%%d\\n\", ");
> -  output_line_directive (f,
> -result ? result->location : s->match->location, true,
> -true);
> -  fprintf (f, ", __FILE__, __LINE__);\n");
> -
>fprintf_indent (f, indent, "{\n");
>indent += 2;
>if (!result)
>  {
>/* If there is no result then this is a predicate implementation.  */
> +  emit_debug_printf (f, indent, s, result);
>fprintf_indent (f, indent, "return true;\n");
>  }
>else if (gimple)
> @@ -3593,6 +3599,7 @@ dt_simplify::gen_1 (FILE *f, int indent, bool gimple, 
> operand *result)
> }
>else
> gcc_unreachable ();
> +  emit_debug_printf (f, indent, s, result);
>fprintf_indent (f, indent, "return true;\n");
>  }
>else /* GENERIC */
> @@ -3646,7 +3653,10 @@ dt_simplify::gen_1 (FILE *f, int indent, bool gimple, 
> operand *result)
> , indexes);
> }
>   if (is_predicate)
> -   fprintf_indent (f, indent, "return true;\n");
> +   {
> + emit_debug_printf (f, indent, s, result);
> + fprintf_indent (f, indent, "return true;\n");
> +   }
>   else
> {
>   fprintf_indent (f, indent, "tree _r;\n");
> @@ -3712,6 +3722,7 @@ dt_simplify::gen_1 (FILE *f, int indent, bool gimple, 
> operand *result)
>   i);
> }
> }
> + emit_debug_printf (f, indent, s, result);
>   fprintf_indent (f, indent, "return _r;\n");
> }
>  }
> --
> 2.31.1
>

Re: decremnt IV patch create fails on PowerPC

2023-05-26 Thread Richard Biener via Gcc-patches

On Fri, 26 May 2023, ??? wrote:

> Yesterday's patch has been approved (decremnt IV support):
> https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619663.html 
> 
> However, it creates fails on PowerPC:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109971 
> 
> I am really sorry for causing inconvinience.
> 
> I wonder as we disccussed:
> +  /* If we're vectorizing a loop that uses length "controls" and
> + can iterate more than once, we apply decrementing IV approach
> + in loop control.  */
> +  if (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P (loop_vinfo)
> +  && !LOOP_VINFO_LENS (loop_vinfo).is_empty ()
> +  && LOOP_VINFO_PARTIAL_LOAD_STORE_BIAS (loop_vinfo) == 0
> +  && !(LOOP_VINFO_NITERS_KNOWN_P (loop_vinfo)
> +&& known_le (LOOP_VINFO_INT_NITERS (loop_vinfo),
> + LOOP_VINFO_VECT_FACTOR (loop_vinfo
> +LOOP_VINFO_USING_DECREMENTING_IV_P (loop_vinfo) = true;
> 
> This conditions can not disable decrement IV on PowerPC.
> Should I add a target hook for it?

No.  I've put some analysis in the PR.  To me the question is
why (without that SELECT_VL case) we need a decrementing IV
_for the loop control_?  We could simply retain the original
incrementing IV for loop control and add the decrementing
IV for computing LEN in addition to that and leave IVOPTs
sorting out to eventually merge them (or not).

Alternatively avoid the variable decrement as I wrote in the
PR and do the exit test based on the previous IV value.

But as said all this won't work for the SELECT_VL case, but
then it's availability is something to key off rather than a
new target hook?

> The patch I can only do bootstrap and regression on X86.
> I didn't have an environment to test PowerPC. I am really sorry.

You can do some testing with a cross compiler, alternatively
there are powerpc machines in the GCC compile farm.

Richard.

Re: [PATCH] RISC-V: Add autovec sign/zero extension and truncation.

> I realize that both TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES and
> TARGET_VECTORIZE_RELATED_MODE will partially enable some
> auto-vectorization even preferred_simd_mode does not enable
> auto-vectorization when we don't specify
> --param=riscv-autovec-preference.
> 
> So plz add autovec_use_vlmax_p into both these target hook
> implementation.

Yes, changed it.  I think that's still minor enough as to not warrant
a separate V2.  Will wait for Kito for final verdict on this and
commit with both changes if nothing else comes up.

Regards
 Robin

RE: [PATCH] RISC-V: Eliminate the magic number in riscv-v.cc

2023-05-26 Thread Li, Pan2 via Gcc-patches

Thanks Robin.

Sorry for not mentioned that it depends on another patch 
https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619536.html, which is in the 
reviewing queue.

Yes, totally agree we can remove the comments for some parameters excepts the 
Boolean ones, as well as the term data related. I can file another PATCH to 
make it happen due to it is another thing besides magic number elimination.

Pan

-Original Message-
From: Robin Dapp  
Sent: Friday, May 26, 2023 2:24 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: rdapp@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang, 
Yanzhang 
Subject: Re: [PATCH] RISC-V: Eliminate the magic number in riscv-v.cc

Hi,

> This patch would like to remove the magic number in the riscv-v.cc, 
> and align the same value to one macro.

> diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc 
> index 458020ce0a1..20b589bf51b 100644
> --- a/gcc/config/riscv/riscv-v.cc
> +++ b/gcc/config/riscv/riscv-v.cc
> @@ -351,13 +351,15 @@ emit_vlmax_insn (unsigned icode, int op_num, rtx 
> *ops, rtx vl)  {
>machine_mode data_mode = GET_MODE (ops[0]);
>machine_mode mask_mode = get_mask_mode (data_mode).require ();
> -  /* We have a maximum of 11 operands for RVV instruction patterns according 
> to
> -   * vector.md.  */
> -  insn_expander<11> e (/*OP_NUM*/ op_num, /*HAS_DEST_P*/ true,
> -/*FULLY_UNMASKED_P*/ true,
> -/*USE_REAL_MERGE_P*/ false, /*HAS_AVL_P*/ true,
> -/*VLMAX_P*/ true,
> -/*DEST_MODE*/ data_mode, /*MASK_MODE*/ mask_mode);
> +  insn_expander e (/*OP_NUM*/ op_num,
> +   /*HAS_DEST_P*/ true,
> +   /*FULLY_UNMASKED_P*/ true,
> +   /*USE_REAL_MERGE_P*/ false,
> +   /*HAS_AVL_P*/ true,
> +   /*VLMAX_P*/ true,
> +   /*DEST_MODE*/ data_mode,
> +   /*MASK_MODE*/ mask_mode);

I don't see where RVV_INSN_OPERANDS_MAX is defined.  Maybe you missed to 
include that hunk?

Apart from that maybe you could also remove the comments for dest_mode, 
mask_mode and op_num?  I think the general "custom" is to just add them for 
bool arguments and name non-bool arguments descriptively.  Here that could mean 
renaming data_mode to dest_mode where appropriate (usually data_mode is used to 
distinguish between data mode and comparison mode in conditionals, not in 
regular insns where everything is "data").

Regards
 Robin

Re: [PATCH] RISC-V: Eliminate the magic number in riscv-v.cc