Re: [PATCH] Use subreg_regno instead of subreg_regno_offset
Hello. - Original Message - From: "Bernd Schmidt"Sent: Tuesday, October 27, 2015 1:50 PM On 10/26/2015 11:46 PM, Anatoliy Sokolov wrote: This patch change code 'REGNO (subreg) + subreg_regno_offset (...)' with subreg_regno (subreg). Index: gcc/reg-stack.c === --- gcc/reg-stack.c(revision 229083) +++ gcc/reg-stack.c(working copy) @@ -416,11 +416,7 @@ rtx subreg; if (STACK_REG_P (subreg = SUBREG_REG (*pat))) { Isn't this wrong? subreg_regno wants to be called with a SUBREG, but here we already had subreg = SUBREG_REG (*pat). Fixed. @@ -5522,12 +5516,7 @@ op0 = SUBREG_REG (op0); code0 = GET_CODE (op0); if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER) - op0 = gen_rtx_REG (word_mode, - (REGNO (op0) + - subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)), - GET_MODE (SUBREG_REG (orig_op0)), - SUBREG_BYTE (orig_op0), - GET_MODE (orig_op0; + op0 = gen_rtx_REG (word_mode, subreg_regno (op0)); } Same problem as in the reg-stack code? The existing code was using orig_op0 to get the subreg, you've changed it to use op0 which is already the SUBREG_REG. No promblens here. At this point op0 is equivalent orig_op0. New value to op0 can be assigned later. With an x86 test you're not exercising reload, and even on other targets this is not a frequently used path. I've stopped reviewing here, I think this is a good example of the kind of cleanup patch we _shouldn't_ be doing. We've proved it's risky, and unless these cleanup patches were a preparation for functional changes, we should just leave the code alone IMO. Bernd Ok. In any case, a revised patch. Anatoly. Index: gcc/caller-save.c === --- gcc/caller-save.c (revision 229560) +++ gcc/caller-save.c (working copy) @@ -991,31 +991,25 @@ add_stored_regs (rtx reg, const_rtx setter, void *data) { int regno, endregno, i; - machine_mode mode = GET_MODE (reg); - int offset = 0; if (GET_CODE (setter) == CLOBBER) return; - if (GET_CODE (reg) == SUBREG + if (SUBREG_P (reg) && REG_P (SUBREG_REG (reg)) - && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER) + && HARD_REGISTER_P (SUBREG_REG (reg))) { - offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)), - GET_MODE (SUBREG_REG (reg)), - SUBREG_BYTE (reg), - GET_MODE (reg)); - regno = REGNO (SUBREG_REG (reg)) + offset; + regno = subreg_regno (reg); endregno = regno + subreg_nregs (reg); } - else + else if (REG_P (reg) + && HARD_REGISTER_P (reg)) { - if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) - return; - - regno = REGNO (reg) + offset; - endregno = end_hard_regno (mode, regno); + regno = REGNO (reg); + endregno = end_hard_regno (GET_MODE (reg), regno); } + else +return; for (i = regno; i < endregno; i++) SET_REGNO_REG_SET ((regset) data, i); Index: gcc/df-scan.c === --- gcc/df-scan.c (revision 229560) +++ gcc/df-scan.c (working copy) @@ -2587,8 +2587,7 @@ if (GET_CODE (reg) == SUBREG) { - regno += subreg_regno_offset (regno, GET_MODE (SUBREG_REG (reg)), - SUBREG_BYTE (reg), GET_MODE (reg)); + regno = subreg_regno (reg); endregno = regno + subreg_nregs (reg); } else Index: gcc/reg-stack.c === --- gcc/reg-stack.c (revision 229560) +++ gcc/reg-stack.c (working copy) @@ -416,11 +416,7 @@ rtx subreg; if (STACK_REG_P (subreg = SUBREG_REG (*pat))) { - int regno_off = subreg_regno_offset (REGNO (subreg), - GET_MODE (subreg), - SUBREG_BYTE (*pat), - GET_MODE (*pat)); - *pat = FP_MODE_REG (REGNO (subreg) + regno_off, + *pat = FP_MODE_REG (subreg_regno (*pat), GET_MODE (subreg)); return pat; } Index: gcc/reload.c === --- gcc/reload.c(revision 229560) +++ gcc/reload.c(working copy) @@ -2253,10 +2253,7 @@ i = REGNO (SUBREG_REG (x)); if (i >= FIRST_PSEUDO_REGISTER) goto slow; - i += subreg_regno_offset (REGNO (SUBREG_REG (x)), - GET_MODE
Re: Remove redundant test for global_regs
- Original Message - From: "Jeff Law"Sent: Friday, September 04, 2015 11:22 PM Hello. Index: gcc/cse.c === --- gcc/cse.c (revision 226953) +++ gcc/cse.c (working copy) @@ -463,7 +463,7 @@ A reg wins if it is either the frame pointer or designated as fixed. */ #define FIXED_REGNO_P(N) \ ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ - || fixed_regs[N] || global_regs[N]) + || TEST_HARD_REG_BIT (fixed_reg_set, N)) So why not continue to test fixed_regs here (ie, just drop the global_regs test)? It's a single memory reference and a test against zero. Using TEST_HARD_REG_BIT likely still hits memory, but then on many architectures you're then going to have to do masking/shifting to get the bit you want to look at. That seems to me like a step backwards. The fixed_regs array duplicate information from the fixed_reg_set. Мore practical to use an HARD_REG_SET as there are many useful function as hard_reg_set_subset_p, range_in_hard_reg_set_p, etc. I propose to remove fixed_regs array use from GCC midle end and allow to use it in TARGET_CONDITIONAL_REGISTER_USAGE target hook only. This will isolate the bit the back end interface from the rest of GCC and simplify implementation FIXED_REGISTERS target macro as target hook. Anatoly.
Re[2]: [patch] Remove two maintainers of avr port
Hello. Denis Chertykov cherty...@gmail.com writes: 2014-03-07 Denis Chertykov cherty...@gmail.com * MAINTAINERS: Remove avr maintainers: Anatoly Sokolov and Eric Weddington Don't maintainers usually retain their write-after-approval status even if they step down from the maintainership? Rainer Please retain me write-after-approval status. I must return to active work on the GCC. May I commit this? 2014-03-07 Anatoly Sokolov ae...@post.ru * MAINTAINERS: Add myself. Index: MAINTAINERS === --- MAINTAINERS (revision 208419) +++ MAINTAINERS (working copy) @@ -526,6 +526,7 @@ Jan Sjodin jan.sjo...@amd.com Edward Smith-Rowland 3dw...@verizon.net Jayant Sonar rsonar.jay...@gmail.com +Anatoly Sokolovae...@post.ru Michael Sokolovmsoko...@ivan.harhan.org Richard Stallman r...@gnu.org Basile Starynkevitch bas...@starynkevitch.net Anatoly.
Re: [patch] Remove two maintainers of avr port
Hello. Please retain me write-after-approval status. I must return to active work on the GCC in the near future. Anatoly. - Original Message - From: Denis Chertykov cherty...@gmail.com To: gcc-patches gcc-patches@gcc.gnu.org; Анатолий Соколов ae...@post.ru; Eric Weddington eric.wedding...@gmail.com Sent: Friday, March 07, 2014 8:56 PM Subject: [patch] Remove two maintainers of avr port Committed. 2014-03-07 Denis Chertykov cherty...@gmail.com * MAINTAINERS: Remove avr maintainers: Anatoly Sokolov and Eric Weddington Index: MAINTAINERS === --- MAINTAINERS (revision 208404) +++ MAINTAINERS (working copy) @@ -51,8 +51,6 @@ arm port Paul Brook p...@codesourcery.com arm port Ramana Radhakrishnan ramana.radhakrish...@arm.com avr port Denis Chertykov cherty...@gmail.com -avr port Anatoly Sokolov ae...@post.ru -avr port Eric Weddington eric.wedding...@atmel.com bfin port Bernd Schmidt ber...@codesourcery.com bfin port Jie Zhang jzhang...@gmail.com c6x port Bernd Schmidt ber...@codesourcery.com Denis.
Re[2]: [BFIN] Hookize PREFERRED_RELOAD_CLASS
Hi, Jie. On Jan 6, 2012, Jie Zhang jzhang...@gmail.com wrote: Hi Anatoly, The patch looks OK. But I cannot apply your patch by saving your email as a patch file. If you take a look at this: I attach the patch. Anatoly. bfin_prc.diff Description: Binary data
[SCORE] Hookize PREFERRED_RELOAD_CLASS
Hi. This patch removes obsolete PREFERRED_RELOAD_CLASS macro from the SCORE back end in the GCC and introduces equivalent TARGET_PREFERRED_RELOAD_CLASS target hook. Untested. OK to install? * config/score/score.h (PREFERRED_RELOAD_CLASS): Remove. * config/score/score-protos.h (score_preferred_reload_class): Remove. * config/score/score.c (TARGET_PREFERRED_RELOAD_CLASS: Define. (score_preferred_reload_class): Make static. Change return and 'rclass' argument type to reg_class_t. Index: gcc/config/score/score.h === --- gcc/config/score/score.h(revision 182917) +++ gcc/config/score/score.h(working copy) @@ -405,9 +405,6 @@ extern enum reg_class score_char_to_clas #define REGNO_OK_FOR_INDEX_P(NUM) 0 -#define PREFERRED_RELOAD_CLASS(X, CLASS) \ - score_preferred_reload_class (X, CLASS) - /* If we need to load shorts byte-at-a-time, then we need a scratch. */ #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ score_secondary_reload_class (CLASS, MODE, X) Index: gcc/config/score/score-protos.h === --- gcc/config/score/score-protos.h (revision 182917) +++ gcc/config/score/score-protos.h (working copy) @@ -57,8 +57,6 @@ extern enum reg_class score_secondary_re rtx x); extern rtx score_function_value (const_tree valtype, const_tree func, enum machine_mode mode); -extern enum reg_class score_preferred_reload_class (rtx x, -enum reg_class rclass); extern HOST_WIDE_INT score_initial_elimination_offset (int from, int to); extern void score_print_operand (FILE *file, rtx op, int letter); extern void score_print_operand_address (FILE *file, rtx addr); Index: gcc/config/score/score.c === --- gcc/config/score/score.c(revision 182917) +++ gcc/config/score/score.c(working copy) @@ -125,6 +125,9 @@ struct extern_list *extern_head = 0; #undef TARGET_LEGITIMIZE_ADDRESS #define TARGET_LEGITIMIZE_ADDRESS score_legitimize_address +#undef TARGET_PREFERRED_RELOAD_CLASS +#define TARGET_PREFERRED_RELOAD_CLASS score_preferred_reload_class + #undef TARGET_SCHED_ISSUE_RATE #define TARGET_SCHED_ISSUE_RATE score_issue_rate @@ -793,9 +796,9 @@ score_reg_class (int regno) return NO_REGS; } -/* Implement PREFERRED_RELOAD_CLASS macro. */ -enum reg_class -score_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, enum reg_class rclass) +/* Implement TARGET_PREFERRED_RELOAD_CLASS hook. */ +static reg_class_t +score_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t rclass) { if (reg_class_subset_p (G16_REGS, rclass)) return G16_REGS; -- Anatoly.
[BFIN] Hookize PREFERRED_RELOAD_CLASS
Hi. This patch removes obsolete PREFERRED_RELOAD_CLASS macro from the BFIN back end in the GCC and introduces equivalent TARGET_PREFERRED_RELOAD_CLASS target hook. Compiled. Untested. OK to install? * config/bfin/bfin.h (PREFERRED_RELOAD_CLASS): Remove. * config/bfin/bfin.c (TARGET_PREFERRED_RELOAD_CLASS): Define. (bfin_preferred_reload_class): New function. Index: gcc/config/bfin/bfin.c === --- gcc/config/bfin/bfin.c (revision 182912) +++ gcc/config/bfin/bfin.c (working copy) @@ -2648,6 +2648,19 @@ split_load_immediate (rtx operands[]) return 0; } +/* Worker function for TARGET_PREFERRED_RELOAD_CLASS. */ + +static reg_class_t +bfin_preferred_reload_class (rtx x, reg_class_t rclass) +{ + if (GET_CODE (x) == POST_INC + || GET_CODE (x) == POST_DEC + || GET_CODE (x) == PRE_DEC) +return PREGS; + + return rclass; +} + /* Return true if the legitimate memory address for a memory operand of mode MODE. Return false if not. */ @@ -5771,6 +5784,9 @@ bfin_conditional_register_usage (void) #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY bfin_return_in_memory +#undef TARGET_PREFERRED_RELOAD_CLASS +#define TARGET_PREFERRED_RELOAD_CLASS bfin_preferred_reload_class + #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_Pbfin_legitimate_address_p Index: gcc/config/bfin/bfin.h === --- gcc/config/bfin/bfin.h (revision 182912) +++ gcc/config/bfin/bfin.h (working copy) @@ -707,16 +707,6 @@ enum reg_class GET_MODE_SIZE (MODE1) = UNITS_PER_WORD\ GET_MODE_SIZE (MODE2) = UNITS_PER_WORD)) -/* `PREFERRED_RELOAD_CLASS (X, CLASS)' - A C expression that places additional restrictions on the register - class to use when it is necessary to copy value X into a register - in class CLASS. The value is a register class; perhaps CLASS, or - perhaps another, smaller class. */ -#define PREFERRED_RELOAD_CLASS(X, CLASS) \ - (GET_CODE (X) == POST_INC\ - || GET_CODE (X) == POST_DEC \ - || GET_CODE (X) == PRE_DEC ? PREGS : (CLASS)) - /* Function Calling Conventions. */ /* The type of the current function; normal functions are of type -- Anatoly.
[ARM] Hookize REGISTER_MOVE_COST and MEMORY_MOVE_COST
Hi. This patch removes obsolete PREFERRED_RELOAD_CLASS macro from the ARM back end in the GCC and introduces equivalent TARGET_PREFERRED_RELOAD_CLASS target hook. Bootstrapped and regression tested on arm-unknown-linux-gnueabi. OK to install? * config/arm/arm.h (PREFERRED_RELOAD_CLASS): Remove. * config/arm/arm.c (TARGET_PREFERRED_RELOAD_CLASS): Define. (arm_preferred_reload_class): New function. Index: gcc/config/arm/arm.c === --- gcc/config/arm/arm.c(revision 182743) +++ gcc/config/arm/arm.c(working copy) @@ -82,6 +82,7 @@ static int thumb2_legitimate_index_p (enum machine_mode, rtx, int); static int thumb1_base_register_rtx_p (rtx, enum machine_mode, int); static rtx arm_legitimize_address (rtx, rtx, enum machine_mode); +static reg_class_t arm_preferred_reload_class (rtx, reg_class_t); static rtx thumb_legitimize_address (rtx, rtx, enum machine_mode); inline static int thumb1_index_register_rtx_p (rtx, int); static bool arm_legitimate_address_p (enum machine_mode, rtx, bool); @@ -573,6 +574,9 @@ #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_Parm_legitimate_address_p +#undef TARGET_PREFERRED_RELOAD_CLASS +#define TARGET_PREFERRED_RELOAD_CLASS arm_preferred_reload_class + #undef TARGET_INVALID_PARAMETER_TYPE #define TARGET_INVALID_PARAMETER_TYPE arm_invalid_parameter_type @@ -6225,6 +6229,30 @@ return thumb1_legitimate_address_p (mode, x, strict_p); } +/* Worker function for TARGET_PREFERRED_RELOAD_CLASS. + + Given an rtx X being reloaded into a reg required to be + in class CLASS, return the class of reg to actually use. + In general this is just CLASS, but for the Thumb core registers and + immediate constants we prefer a LO_REGS class or a subset. */ + +static reg_class_t +arm_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t rclass) +{ + if (TARGET_32BIT) +return rclass; + else +{ + if (rclass == GENERAL_REGS + || rclass == HI_REGS + || rclass == NO_REGS + || rclass == STACK_REG) + return LO_REGS; + else + return rclass; +} +} + /* Build the SYMBOL_REF for __tls_get_addr. */ static GTY(()) rtx tls_get_addr_libfunc; Index: gcc/config/arm/arm.h === --- gcc/config/arm/arm.h(revision 182743) +++ gcc/config/arm/arm.h(working copy) @@ -1169,16 +1169,6 @@ #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P \ arm_small_register_classes_for_mode_p -/* Given an rtx X being reloaded into a reg required to be - in class CLASS, return the class of reg to actually use. - In general this is just CLASS, but for the Thumb core registers and - immediate constants we prefer a LO_REGS class or a subset. */ -#define PREFERRED_RELOAD_CLASS(X, CLASS) \ - (TARGET_32BIT ? (CLASS) :\ - ((CLASS) == GENERAL_REGS || (CLASS) == HI_REGS \ -|| (CLASS) == NO_REGS || (CLASS) == STACK_REG \ - ? LO_REGS : (CLASS))) - /* Must leave BASE_REGS reloads alone */ #define THUMB_SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ ((CLASS) != LO_REGS (CLASS) != BASE_REGS \ -- Anatoly.
[BFIN] Hookize REGISTER_MOVE_COST and MEMORY_MOVE_COST
Hi. This patch removes obsolete REGISTER_MOVE_COST and MEMORY_MOVE_COST macros from the Blackfin back end in the GCC and introduces equivalent TARGET_REGISTER_MOVE_COST and TARGET_MEMORY_MOVE_COST target hooks. Untested. OK to install? * config/bfin/bfin.h (REGISTER_MOVE_COST, MEMORY_MOVE_COST): Remove. * config/bfin/bfin-protos.h (bfin_register_move_cost, bfin_memory_move_cost): Remove. * config/bfin/bfin.c (bfin_register_move_cost, bfin_memory_move_cost): Make static. Change arguments type from enum reg_class to reg_class_t and from int to bool. (TARGET_REGISTER_MOVE_COST, TARGET_MEMORY_MOVE_COST): Define. Index: gcc/config/bfin/bfin-protos.h === --- gcc/config/bfin/bfin-protos.h (revision 182658) +++ gcc/config/bfin/bfin-protos.h (working copy) @@ -85,9 +85,6 @@ extern bool bfin_longcall_p (rtx, int); extern bool bfin_dsp_memref_p (rtx); extern bool bfin_expand_movmem (rtx, rtx, rtx, rtx); -extern int bfin_register_move_cost (enum machine_mode, enum reg_class, - enum reg_class); -extern int bfin_memory_move_cost (enum machine_mode, enum reg_class, int in); extern enum reg_class secondary_input_reload_class (enum reg_class, enum machine_mode, rtx); Index: gcc/config/bfin/bfin.c === --- gcc/config/bfin/bfin.c (revision 182658) +++ gcc/config/bfin/bfin.c (working copy) @@ -2149,12 +2149,11 @@ bfin_vector_mode_supported_p (enum machi return mode == V2HImode; } -/* Return the cost of moving data from a register in class CLASS1 to - one in class CLASS2. A cost of 2 is the default. */ +/* Worker function for TARGET_REGISTER_MOVE_COST. */ -int +static int bfin_register_move_cost (enum machine_mode mode, -enum reg_class class1, enum reg_class class2) +reg_class_t class1, reg_class_t class2) { /* These need secondary reloads, so they're more expensive. */ if ((class1 == CCREGS !reg_class_subset_p (class2, DREGS)) @@ -2177,18 +2176,16 @@ bfin_register_move_cost (enum machine_mo return 2; } -/* Return the cost of moving data of mode M between a - register and memory. A value of 2 is the default; this cost is - relative to those in `REGISTER_MOVE_COST'. +/* Worker function for TARGET_MEMORY_MOVE_COST. ??? In theory L1 memory has single-cycle latency. We should add a switch that tells the compiler whether we expect to use only L1 memory for the program; it'll make the costs more accurate. */ -int +static int bfin_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, - enum reg_class rclass, - int in ATTRIBUTE_UNUSED) + reg_class_t rclass, + bool in ATTRIBUTE_UNUSED) { /* Make memory accesses slightly more expensive than any register-register move. Also, penalize non-DP registers, since they need secondary @@ -5703,6 +5700,12 @@ bfin_conditional_register_usage (void) #undef TARGET_ADDRESS_COST #define TARGET_ADDRESS_COST bfin_address_cost +#undef TARGET_REGISTER_MOVE_COST +#define TARGET_REGISTER_MOVE_COST bfin_register_move_cost + +#undef TARGET_MEMORY_MOVE_COST +#define TARGET_MEMORY_MOVE_COST bfin_memory_move_cost + #undef TARGET_ASM_INTEGER #define TARGET_ASM_INTEGER bfin_assemble_integer Index: gcc/config/bfin/bfin.h === --- gcc/config/bfin/bfin.h (revision 182658) +++ gcc/config/bfin/bfin.h (working copy) @@ -975,29 +975,6 @@ typedef struct { /* Do not put function addr into constant pool */ #define NO_FUNCTION_CSE 1 -/* A C expression for the cost of moving data from a register in class FROM to - one in class TO. The classes are expressed using the enumeration values - such as `GENERAL_REGS'. A value of 2 is the default; other values are - interpreted relative to that. - - It is not required that the cost always equal 2 when FROM is the same as TO; - on some machines it is expensive to move between registers if they are not - general registers. */ - -#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ - bfin_register_move_cost ((MODE), (CLASS1), (CLASS2)) - -/* A C expression for the cost of moving data of mode M between a - register and memory. A value of 2 is the default; this cost is - relative to those in `REGISTER_MOVE_COST'. - - If moving between registers and memory is more expensive than - between two registers, you should define this macro to express the - relative cost. */ - -#define MEMORY_MOVE_COST(MODE, CLASS, IN) \ - bfin_memory_move_cost ((MODE), (CLASS), (IN)) - /* Specify the machine mode that this machine uses for
[SCORE] Hookize REGISTER_MOVE_COST and MEMORY_MOVE_COST
Hi. This patch removes obsolete REGISTER_MOVE_COST macro from the SCORE back end in the GCC and introduces equivalent TARGET_MEMORY_MOVE_COST target hook. The MEMORY_MOVE_COST macros is removed and default implementation of the TARGET_MEMORY_MOVE_COST target hook is used. Untested. OK to install? * config/score/score.h (REGISTER_MOVE_COST, MEMORY_MOVE_COST): Remove. * config/score/score-protos.h (score_register_move_cost): Remove. * config/score/score.c (TARGET_REGISTER_MOVE_COST): Define. (score_register_move_cost): Make static. Change arguments type from enum reg_class to reg_class_t. Index: gcc/config/score/score.h === --- gcc/config/score/score.h(revision 182660) +++ gcc/config/score/score.h(working copy) @@ -601,14 +601,6 @@ typedef struct score_args #define REVERSIBLE_CC_MODE(MODE)1 /* Describing Relative Costs of Operations */ -/* Compute extra cost of moving data between one register class and another. */ -#define REGISTER_MOVE_COST(MODE, FROM, TO) \ - score_register_move_cost (MODE, FROM, TO) - -/* Moves to and from memory are quite expensive */ -#define MEMORY_MOVE_COST(MODE, CLASS, TO_P) \ - (4 + memory_move_secondary_cost ((MODE), (CLASS), (TO_P))) - /* Try to generate sequences that don't involve branches. */ #define BRANCH_COST(speed_p, predictable_p) 2 Index: gcc/config/score/score-protos.h === --- gcc/config/score/score-protos.h (revision 182660) +++ gcc/config/score/score-protos.h (working copy) @@ -42,8 +42,6 @@ extern bool score_block_move (rtx* ops); extern int score_address_cost (rtx addr, bool speed); extern int score_address_p (enum machine_mode mode, rtx x, int strict); extern int score_reg_class (int regno); -extern int score_register_move_cost (enum machine_mode mode, enum reg_class to, - enum reg_class from); extern int score_hard_regno_mode_ok (unsigned int, enum machine_mode); extern int score_const_ok_for_letter_p (HOST_WIDE_INT value, char c); extern int score_extra_constraint (rtx op, char c); Index: gcc/config/score/score.c === --- gcc/config/score/score.c(revision 182660) +++ gcc/config/score/score.c(working copy) @@ -187,6 +187,9 @@ struct extern_list *extern_head = 0; #undef TARGET_TRAMPOLINE_INIT #define TARGET_TRAMPOLINE_INIT score_trampoline_init +#undef TARGET_REGISTER_MOVE_COST +#define TARGET_REGISTER_MOVE_COST score_register_move_cost + /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points to the same object as SYMBOL. */ static int @@ -998,11 +1001,13 @@ score_legitimate_address_p (enum machine return score_classify_address (addr, mode, x, strict); } -/* Return a number assessing the cost of moving a register in class +/* Implement TARGET_REGISTER_MOVE_COST. + + Return a number assessing the cost of moving a register in class FROM to class TO. */ -int +static int score_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, - enum reg_class from, enum reg_class to) + reg_class_t from, reg_class_t to) { if (GR_REG_CLASS_P (from)) { Anatoly.
[IA64] Hookize GO_IF_LEGITIMATE_ADDRESS
Hello. This patch removes obsolete GO_IF_LEGITIMATE_ADDRESS macro from IA64 back end in the GCC and introduces equivalent TARGET_LEGITIMATE_ADDRESS_P target hook. Bootstrapped and regression tested on ia64-unknown-linux-gnu. OK to install? * config/ia64/ia64.h (REG_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P, LEGITIMATE_ADDRESS_REG, LEGITIMATE_ADDRESS_DISP, GO_IF_LEGITIMATE_ADDRESS): Remove macros. * config/ia64/ia64.c (TARGET_LEGITIMATE_ADDRESS_P): Define. (ia64_reg_ok_for_base_p, ia64_legitimate_address_reg, ia64_legitimate_address_disp, ia64_legitimate_address_p): New functions. Index: gcc/config/ia64/ia64.c === --- gcc/config/ia64/ia64.c (revision 182245) +++ gcc/config/ia64/ia64.c (working copy) @@ -309,6 +309,7 @@ static bool ia64_scalar_mode_supported_p (enum machine_mode mode); static bool ia64_vector_mode_supported_p (enum machine_mode mode); static bool ia64_legitimate_constant_p (enum machine_mode, rtx); +static bool ia64_legitimate_address_p (enum machine_mode, rtx, bool); static bool ia64_cannot_force_const_mem (enum machine_mode, rtx); static const char *ia64_mangle_type (const_tree); static const char *ia64_invalid_conversion (const_tree, const_tree); @@ -583,6 +584,8 @@ #undef TARGET_LEGITIMATE_CONSTANT_P #define TARGET_LEGITIMATE_CONSTANT_P ia64_legitimate_constant_p +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P ia64_legitimate_address_p #undef TARGET_CANNOT_FORCE_CONST_MEM #define TARGET_CANNOT_FORCE_CONST_MEM ia64_cannot_force_const_mem @@ -937,6 +940,68 @@ return tls_kind; } +/* Returns true if REG (assumed to be a `reg' RTX) is valid for use + as a base register. */ + +static inline bool +ia64_reg_ok_for_base_p (const_rtx reg, bool strict) +{ + if (strict + REGNO_OK_FOR_BASE_P (REGNO (reg))) +return true; + else if (!strict + (GENERAL_REGNO_P (REGNO (reg)) + || !HARD_REGISTER_P (reg))) +return true; + else +return false; +} + +static bool +ia64_legitimate_address_reg (const_rtx reg, bool strict) +{ + if ((REG_P (reg) ia64_reg_ok_for_base_p (reg, strict)) + || (GET_CODE (reg) == SUBREG REG_P (XEXP (reg, 0)) + ia64_reg_ok_for_base_p (XEXP (reg, 0), strict))) +return true; + + return false; +} + +static bool +ia64_legitimate_address_disp (const_rtx reg, const_rtx disp, bool strict) +{ + if (GET_CODE (disp) == PLUS + rtx_equal_p (reg, XEXP (disp, 0)) + (ia64_legitimate_address_reg (XEXP (disp, 1), strict) + || (CONST_INT_P (XEXP (disp, 1)) + IN_RANGE (INTVAL (XEXP (disp, 1)), -256, 255 +return true; + + return false; +} + +/* Implement TARGET_LEGITIMATE_ADDRESS_P. */ + +static bool +ia64_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, + rtx x, bool strict) +{ + if (ia64_legitimate_address_reg (x, strict)) +return true; + else if ((GET_CODE (x) == POST_INC || GET_CODE (x) == POST_DEC) + ia64_legitimate_address_reg (XEXP (x, 0), strict) + XEXP (x, 0) != arg_pointer_rtx) +return true; + else if (GET_CODE (x) == POST_MODIFY + ia64_legitimate_address_reg (XEXP (x, 0), strict) + XEXP (x, 0) != arg_pointer_rtx + ia64_legitimate_address_disp (XEXP (x, 0), XEXP (x, 1), strict)) +return true; + else +return false; +} + /* Return true if X is a constant that is valid for some immediate field in an instruction. */ Index: gcc/config/ia64/ia64.h === --- gcc/config/ia64/ia64.h (revision 182245) +++ gcc/config/ia64/ia64.h (working copy) @@ -1154,52 +1154,6 @@ #define MAX_REGS_PER_ADDRESS 2 -/* A C compound statement with a conditional `goto LABEL;' executed if X (an - RTX) is a legitimate memory address on the target machine for a memory - operand of mode MODE. */ - -#define LEGITIMATE_ADDRESS_REG(X) \ - ((GET_CODE (X) == REG REG_OK_FOR_BASE_P (X)) \ - || (GET_CODE (X) == SUBREG GET_CODE (XEXP (X, 0)) == REG \ -REG_OK_FOR_BASE_P (XEXP (X, 0 - -#define LEGITIMATE_ADDRESS_DISP(R, X) \ - (GET_CODE (X) == PLUS \ -rtx_equal_p (R, XEXP (X, 0)) \ -(LEGITIMATE_ADDRESS_REG (XEXP (X, 1))\ - || (GET_CODE (XEXP (X, 1)) == CONST_INT \ - INTVAL (XEXP (X, 1)) = -256 \ - INTVAL (XEXP (X, 1)) 256))) - -#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \ -do { \ - if (LEGITIMATE_ADDRESS_REG (X))
[ARM] Hookize REGISTER_MOVE_COST and MEMORY_MOVE_COST
Hi. This patch removes obsolete REGISTER_MOVE_COST and MEMORY_MOVE_COST macros from the ARM back end in the GCC and introduces equivalent TARGET_REGISTER_MOVE_COST and TARGET_MEMORY_MOVE_COST target hooks. Bootstrapped and regression tested on arm-unknown-linux-gnueabi. OK to install? * config/arm/arm.h (REGISTER_MOVE_COST, MEMORY_MOVE_COST): Remove. * config/arm/arm.c (arm_memory_move_cost, arm_register_move_cost): New functions. (TARGET_REGISTER_MOVE_COST, TARGET_MEMORY_MOVE_COST): Define. Index: gcc/config/arm/arm.c === --- gcc/config/arm/arm.c(revision 182109) +++ gcc/config/arm/arm.c(working copy) @@ -164,6 +164,8 @@ static bool arm_9e_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool); static bool arm_rtx_costs (rtx, int, int, int, int *, bool); static int arm_address_cost (rtx, bool); +static int arm_register_move_cost (enum machine_mode, reg_class_t, reg_class_t); +static int arm_memory_move_cost (enum machine_mode, reg_class_t, bool); static bool arm_memory_load_p (rtx); static bool arm_cirrus_insn_p (rtx); static void cirrus_reorg (rtx); @@ -363,6 +365,12 @@ #undef TARGET_SCHED_ADJUST_COST #define TARGET_SCHED_ADJUST_COST arm_adjust_cost +#undef TARGET_REGISTER_MOVE_COST +#define TARGET_REGISTER_MOVE_COST arm_register_move_cost + +#undef TARGET_MEMORY_MOVE_COST +#define TARGET_MEMORY_MOVE_COST arm_memory_move_cost + #undef TARGET_ENCODE_SECTION_INFO #ifdef ARM_PE #define TARGET_ENCODE_SECTION_INFO arm_pe_encode_section_info @@ -8484,6 +8492,63 @@ return true; } +/* Implement TARGET_REGISTER_MOVE_COST. + + Moves between FPA_REGS and GENERAL_REGS are two memory insns. + Moves between VFP_REGS and GENERAL_REGS are a single insn, but + it is typically more expensive than a single memory access. We set + the cost to less than two memory accesses so that floating + point to integer conversion does not go through memory. */ + +int +arm_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, + reg_class_t from, reg_class_t to) +{ + if (TARGET_32BIT) +{ + if ((from == FPA_REGS to != FPA_REGS) + || (from != FPA_REGS to == FPA_REGS)) + return 20; + else if ((IS_VFP_CLASS (from) !IS_VFP_CLASS (to)) + || (!IS_VFP_CLASS (from) IS_VFP_CLASS (to))) + return 15; + else if ((from == IWMMXT_REGS to != IWMMXT_REGS) + || (from != IWMMXT_REGS to == IWMMXT_REGS)) + return 4; + else if (from == IWMMXT_GR_REGS || to == IWMMXT_GR_REGS) + return 20; + else if ((from == CIRRUS_REGS to != CIRRUS_REGS) + || (from != CIRRUS_REGS to == CIRRUS_REGS)) + return 20; + else + return 2; +} + else +{ + if (from == HI_REGS || to == HI_REGS) + return 4; + else + return 2; +} +} + +/* Implement TARGET_MEMORY_MOVE_COST. */ + +int +arm_memory_move_cost (enum machine_mode mode, reg_class_t rclass, + bool in ATTRIBUTE_UNUSED) +{ + if (TARGET_32BIT) +return 10; + else +{ + if (GET_MODE_SIZE (mode) 4) + return 8; + else + return ((2 * GET_MODE_SIZE (mode)) * (rclass == LO_REGS ? 1 : 2)); +} +} + /* This function implements the target macro TARGET_SCHED_ADJUST_COST. It corrects the value of COST based on the relationship between INSN and DEP through the dependence LINK. It returns the new Index: gcc/config/arm/arm.h === --- gcc/config/arm/arm.h(revision 182109) +++ gcc/config/arm/arm.h(working copy) @@ -1281,26 +1281,6 @@ /* If defined, gives a class of registers that cannot be used as the operand of a SUBREG that changes the mode of the object illegally. */ - -/* Moves between FPA_REGS and GENERAL_REGS are two memory insns. - Moves between VFP_REGS and GENERAL_REGS are a single insn, but - it is typically more expensive than a single memory access. We set - the cost to less than two memory accesses so that floating - point to integer conversion does not go through memory. */ -#define REGISTER_MOVE_COST(MODE, FROM, TO) \ - (TARGET_32BIT ? \ - ((FROM) == FPA_REGS (TO) != FPA_REGS ? 20 : \ -(FROM) != FPA_REGS (TO) == FPA_REGS ? 20 : \ -IS_VFP_CLASS (FROM) !IS_VFP_CLASS (TO) ? 15 : \ -!IS_VFP_CLASS (FROM) IS_VFP_CLASS (TO) ? 15 : \ -(FROM) == IWMMXT_REGS (TO) != IWMMXT_REGS ? 4 : \ -(FROM) != IWMMXT_REGS (TO) == IWMMXT_REGS ? 4 : \ -(FROM) == IWMMXT_GR_REGS || (TO) == IWMMXT_GR_REGS ? 20 : \ -(FROM) == CIRRUS_REGS (TO) != CIRRUS_REGS ? 20 :\ -(FROM) != CIRRUS_REGS (TO) == CIRRUS_REGS ? 20 :\ - 2) \ - : \ -
[IA64] Hookize PRINT_OPERAND, PRINT_OPERAND_ADDRESS and PRINT_OPERAND_PUNCT_VALID_P
Hello. This patch removes obsolete PRINT_OPERAND, PRINT_OPERAND_ADDRESS and PRINT_OPERAND_PUNCT_VALID_P macros from IA64 back end in the GCC and introduces equivalent TARGET_PRINT_OPERAND, TARGET_PRINT_OPERAND_ADDRESS and TARGET_PRINT_OPERAND_PUNCT_VALID_P target hooks. Bootstrapped and regression tested on ia64-unknown-linux-gnu. * config/ia64/ia64.h (PRINT_OPERAND, PRINT_OPERAND_ADDRESS, PRINT_OPERAND_PUNCT_VALID_P): Remove macros. * config/ia64/ia64-protos.h (ia64_print_operand, ia64_print_operand_address): Remove. * config/ia64/ia64.c (TARGET_PRINT_OPERAND, TARGET_PRINT_OPERAND_ADDRESS, TARGET_PRINT_OPERAND_PUNCT_VALID_P): Define. (ia64_print_operand_punct_valid_p): New function. (ia64_print_operand, ia64_print_operand_address): Make static. Index: gcc/config/ia64/ia64.c === --- gcc/config/ia64/ia64.c (revision 181759) +++ gcc/config/ia64/ia64.c (working copy) @@ -234,6 +234,10 @@ static void ia64_output_function_epilogue (FILE *, HOST_WIDE_INT); static void ia64_output_function_end_prologue (FILE *); +static void ia64_print_operand (FILE *, rtx, int); +static void ia64_print_operand_address (FILE *, rtx); +static bool ia64_print_operand_punct_valid_p (unsigned char code); + static int ia64_issue_rate (void); static int ia64_adjust_cost_2 (rtx, int, rtx, int, dw_t); static void ia64_sched_init (FILE *, int, int); @@ -383,6 +387,13 @@ #undef TARGET_ASM_FUNCTION_EPILOGUE #define TARGET_ASM_FUNCTION_EPILOGUE ia64_output_function_epilogue +#undef TARGET_PRINT_OPERAND +#define TARGET_PRINT_OPERAND ia64_print_operand +#undef TARGET_PRINT_OPERAND_ADDRESS +#define TARGET_PRINT_OPERAND_ADDRESS ia64_print_operand_address +#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P +#define TARGET_PRINT_OPERAND_PUNCT_VALID_P ia64_print_operand_punct_valid_p + #undef TARGET_IN_SMALL_DATA_P #define TARGET_IN_SMALL_DATA_P ia64_in_small_data_p @@ -4966,7 +4977,7 @@ /* ??? Do we need this? It gets used only for 'a' operands. We could perhaps also call this from ia64_print_operand for memory addresses. */ -void +static void ia64_print_operand_address (FILE * stream ATTRIBUTE_UNUSED, rtx address ATTRIBUTE_UNUSED) { @@ -4997,7 +5008,7 @@ Linux kernel. vPrint vector constant value as an 8-byte integer value. */ -void +static void ia64_print_operand (FILE * file, rtx x, int code) { const char *str; @@ -5284,6 +5295,14 @@ return; } + +/* Worker function for TARGET_PRINT_OPERAND_PUNCT_VALID_P. */ + +static bool +ia64_print_operand_punct_valid_p (unsigned char code) +{ + return (code == '+' || code == ','); +} /* Compute a (partial) cost for rtx X. Return true if the complete cost has been computed, and false if subexpressions should be Index: gcc/config/ia64/ia64.h === --- gcc/config/ia64/ia64.h (revision 181759) +++ gcc/config/ia64/ia64.h (working copy) @@ -1512,27 +1512,6 @@ { loc79, LOC_REG (79) }, \ } -/* A C compound statement to output to stdio stream STREAM the assembler syntax - for an instruction operand X. X is an RTL expression. */ - -#define PRINT_OPERAND(STREAM, X, CODE) \ - ia64_print_operand (STREAM, X, CODE) - -/* A C expression which evaluates to true if CODE is a valid punctuation - character for use in the `PRINT_OPERAND' macro. */ - -/* ??? Keep this around for now, as we might need it later. */ - -#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ - ((CODE) == '+' || (CODE) == ',') - -/* A C compound statement to output to stdio stream STREAM the assembler syntax - for an instruction operand that is a memory reference whose address is X. X - is an RTL expression. */ - -#define PRINT_OPERAND_ADDRESS(STREAM, X) \ - ia64_print_operand_address (STREAM, X) - /* If defined, C string expressions to be used for the `%R', `%L', `%U', and `%I' options of `asm_fprintf' (see `final.c'). */ Index: gcc/config/ia64/ia64-protos.h === --- gcc/config/ia64/ia64-protos.h (revision 181759) +++ gcc/config/ia64/ia64-protos.h (working copy) @@ -58,8 +58,6 @@ extern bool ia64_expand_load_address (rtx, rtx); extern int ia64_hard_regno_rename_ok (int, int); -extern void ia64_print_operand_address (FILE *, rtx); -extern void ia64_print_operand (FILE *, rtx, int); extern enum reg_class ia64_secondary_reload_class (enum reg_class, enum machine_mode, rtx); extern const char *get_bundle_name (int); Anatoly.
[STORMY16] Hookize FUNCTION_VALUE_REGNO_P
Hello. This patch removes obsolete FUNCTION_VALUE_REGNO_P macro from ARM back end in the GCC and introduces equivalent TARGET_FUNCTION_VALUE_REGNO_P target hook. Since the LIBCALL_VALUE macro should be poisoned in the future, this patch replaces it with the arm_libcall_value_1 function. Bootstrapped and regression tested on arm-unknown-linux-gnueabi. * config/arm/arm.h (LIBCALL_VALUE, FUNCTION_VALUE_REGNO_P): Remove. * config/arm/arm-protos.h (aapcs_libcall_value): Remove. * config/arm/arm.c (TARGET_FUNCTION_VALUE_REGNO_P): Define. (arm_libcall_value_1, arm_function_value_regno_p): New function. (arm_function_value, arm_libcall_value): Use arm_libcall_value_1. (aapcs_libcall_value): Make static. (arm_libcall_value): Add static qualifier Index: gcc/config/arm/arm.c === --- gcc/config/arm/arm.c(revision 181476) +++ gcc/config/arm/arm.c(working copy) @@ -147,8 +147,9 @@ const_tree, int); static bool arm_return_in_memory (const_tree, const_tree); static rtx arm_function_value (const_tree, const_tree, bool); +static rtx arm_libcall_value_1 (enum machine_mode); static rtx arm_libcall_value (enum machine_mode, const_rtx); - +static bool arm_function_value_regno_p (const unsigned int); static void arm_internal_label (FILE *, const char *, unsigned long); static void arm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); @@ -184,6 +185,7 @@ static unsigned int arm_function_arg_boundary (enum machine_mode, const_tree); static rtx aapcs_allocate_return_reg (enum machine_mode, const_tree, const_tree); +static rtx aapcs_libcall_value (enum machine_mode); static int aapcs_select_return_coproc (const_tree, const_tree); #ifdef OBJECT_FORMAT_ELF @@ -383,6 +385,9 @@ #undef TARGET_LIBCALL_VALUE #define TARGET_LIBCALL_VALUE arm_libcall_value +#undef TARGET_FUNCTION_VALUE_REGNO_P +#define TARGET_FUNCTION_VALUE_REGNO_P arm_function_value_regno_p + #undef TARGET_ASM_OUTPUT_MI_THUNK #define TARGET_ASM_OUTPUT_MI_THUNK arm_output_mi_thunk #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK @@ -3588,7 +3593,7 @@ } } - return LIBCALL_VALUE (mode); + return arm_libcall_value_1 (mode); } static int @@ -3678,7 +3683,32 @@ return libcall htab_find (libcall_htab, libcall) != NULL; } -rtx +static rtx +arm_libcall_value_1 (enum machine_mode mode) +{ + if (TARGET_AAPCS_BASED) +return aapcs_libcall_value (mode); + else if (TARGET_32BIT + TARGET_HARD_FLOAT_ABI + TARGET_FPA + GET_MODE_CLASS (mode) == MODE_FLOAT) +return gen_rtx_REG (mode, FIRST_FPA_REGNUM); + else if (TARGET_32BIT + TARGET_HARD_FLOAT_ABI + TARGET_MAVERICK + GET_MODE_CLASS (mode) == MODE_FLOAT) +return gen_rtx_REG (mode, FIRST_CIRRUS_FP_REGNUM); + else if (TARGET_IWMMXT_ABI + arm_vector_mode_supported_p (mode)) +return gen_rtx_REG (mode, FIRST_IWMMXT_REGNUM); + else +return gen_rtx_REG (mode, ARG_REGISTER (1)); +} + +/* Define how to find the value returned by a library function + assuming the value has mode MODE. */ + +static rtx arm_libcall_value (enum machine_mode mode, const_rtx libcall) { if (TARGET_AAPCS_BASED arm_pcs_default != ARM_PCS_AAPCS @@ -3691,9 +3721,35 @@ } - return LIBCALL_VALUE (mode); + return arm_libcall_value_1 (mode); } +/* Implement TARGET_FUNCTION_VALUE_REGNO_P. */ + +static bool +arm_function_value_regno_p (const unsigned int regno) +{ + if (regno == ARG_REGISTER (1) + || (TARGET_32BIT + TARGET_AAPCS_BASED + TARGET_VFP + TARGET_HARD_FLOAT + regno == FIRST_VFP_REGNUM) + || (TARGET_32BIT + TARGET_HARD_FLOAT_ABI + TARGET_MAVERICK + regno == FIRST_CIRRUS_FP_REGNUM) + || (TARGET_IWMMXT_ABI + regno == FIRST_IWMMXT_REGNUM) + || (TARGET_32BIT + TARGET_HARD_FLOAT_ABI + TARGET_FPA + regno == FIRST_FPA_REGNUM)) +return true; + + return false; +} + /* Determine the amount of memory needed to store the possible return registers of an untyped call. */ int @@ -4509,7 +4565,7 @@ return gen_rtx_REG (mode, R0_REGNUM); } -rtx +static rtx aapcs_libcall_value (enum machine_mode mode) { if (BYTES_BIG_ENDIAN ALL_FIXED_POINT_MODE_P (mode) Index: gcc/config/arm/arm.h === --- gcc/config/arm/arm.h(revision 181476) +++ gcc/config/arm/arm.h(working copy) @@ -1348,32 +1348,6 @@ /* Offset of first parameter from the argument pointer register value. */ #define FIRST_PARM_OFFSET(FNDECL) (TARGET_ARM ? 4 : 0) -/* Define how to find the value returned by a library function - assuming the value has mode MODE. */ -#define
[CRIS] Hookize FUNCTION_VALUE_REGNO_P
Hello. This patch removes obsolete FUNCTION_VALUE_REGNO_P macro from CRIS back end in the GCC and introduces equivalent TARGET_FUNCTION_VALUE_REGNO_P target hook. Regression tested on cris-axis-elf. OK to install? * config/cris/cris.c (cris_function_value_regno_p): Make static. (TARGET_FUNCTION_VALUE_REGNO_P): Define. * config/cris/cris.h (FUNCTION_VALUE_REGNO_P): Remove. * config/cris/cris-protos.h (cris_function_value_regno_p): Remove. Index: gcc/config/cris/cris.c === --- gcc/config/cris/cris.c (revision 179723) +++ gcc/config/cris/cris.c (working copy) @@ -148,6 +148,7 @@ static rtx cris_function_value(const_tree, const_tree, bool); static rtx cris_libcall_value (enum machine_mode, const_rtx); +static bool cris_function_value_regno_p (const unsigned int); /* This is the parsed result of the -max-stack-stackframe= option. If it (still) is zero, then there was no such option given. */ @@ -241,6 +242,8 @@ #define TARGET_FUNCTION_VALUE cris_function_value #undef TARGET_LIBCALL_VALUE #define TARGET_LIBCALL_VALUE cris_libcall_value +#undef TARGET_FUNCTION_VALUE_REGNO_P +#define TARGET_FUNCTION_VALUE_REGNO_P cris_function_value_regno_p struct gcc_target targetm = TARGET_INITIALIZER; @@ -3763,7 +3768,7 @@ /* Let's assume all functions return in r[CRIS_FIRST_ARG_REG] for the time being. */ -bool +static bool cris_function_value_regno_p (const unsigned int regno) { return (regno == CRIS_FIRST_ARG_REG); Index: gcc/config/cris/cris.h === --- gcc/config/cris/cris.h (revision 179723) +++ gcc/config/cris/cris.h (working copy) @@ -854,12 +854,6 @@ (REGNO) CRIS_FIRST_ARG_REG + (CRIS_MAX_ARGS_IN_REGS)) -/* Node: Scalar Return */ - -#define FUNCTION_VALUE_REGNO_P(N) cris_function_value_regno_p (N) - - - /* Node: Aggregate Return */ #define CRIS_STRUCT_VALUE_REGNUM ((CRIS_FIRST_ARG_REG) - 1) Index: gcc/config/cris/cris-protos.h === --- gcc/config/cris/cris-protos.h (revision 179723) +++ gcc/config/cris/cris-protos.h (working copy) @@ -60,5 +60,3 @@ extern int cris_initial_elimination_offset (int, int); extern void cris_init_expanders (void); - -extern bool cris_function_value_regno_p (const unsigned int); Anatoly.
Re[2]: [CRIS] Convert CRIS to constraints.md
Hi. From: Hans-Peter. Date: 5 Nov 2011 г., 5:24:20: +(define_constraint S + PIC-constructs for symbols. + (and (match_test flag_pic) + (match_code const) + (match_test cris_valid_pic_const (op, false Can you really have other than two operands to the RTL and these days? (I guess that's changed to yes; if not, the gen* programs should have alerted. Unless there's some bug.) Yes, it is possible. de facto - code of satisfies_constraint_S function is math with define_constraint S. static inline bool satisfies_constraint_S (rtx op) { return ( #line 155 ../../gcc/gcc/config/cris/constraints.md (flag_pic)) ((GET_CODE (op) == CONST) ( #line 157 ../../gcc/gcc/config/cris/constraints.md (cris_valid_pic_const (op, false; } de jure: 16.8.7 Defining Machine-Specific Constraints define_constraint name docstring exp ... exp is an RTL expression, obeying the same rules as the RTL expressions in predicate definitions. See Section 16.7.2 [Defining Predicates], page 302, for details. 16.7.2 Defining Machine-Specific Predicates AND IOR NOT IF_THEN_ELSE ... As in Common Lisp, you may give an AND or IOR expression an arbitrary number of arguments; this has exactly the same effect as writing a chain of two-argument AND or IOR expressions. Anatoly.
[CRIS] Convert CRIS to constraints.md
Hello. As subject suggests. Regression tested on cris-axis-elf. Comments? OK to install? * config/cris/constraints.md: New file. * config/cris/cris.h (REG_CLASS_FROM_LETTER, CONSTRAINT_LEN, CRIS_CONST_OK_FOR_LETTER_P, CONST_OK_FOR_CONSTRAINT_P, CONST_DOUBLE_OK_FOR_LETTER_P, EXTRA_MEMORY_CONSTRAINT, EXTRA_CONSTRAINT, EXTRA_CONSTRAINT_Q, EXTRA_CONSTRAINT_R, EXTRA_CONSTRAINT_T, EXTRA_CONSTRAINT_S, EXTRA_CONSTRAINT_U): Remove. * config/cris/cris.c: Incule tm-constrs.h. (cris_print_operand): Use satisfies_constraint_O. (cris_normal_notice_update_cc, cris_rtx_costs): Use satisfies_constraint_I. (cris_address_cost): Use satisfies_constraint_L. * config/cris/cris.md: Include constraints.md. (*mov_sidemode, *mov_sidesisf, *mov_sidemode_mem, *mov_sidesisf_mem, *clear_sidemode, *ext_sideqihi, *ext_sidemodesi, *op_sidemode, *op_swap_sidemode, *extopqihi_side, *extopmodesi_side, *extopqihi_swap_side, *extopmodesi_swap_side): Use satisfies_constraint_N and satisfies_constraint_J. (moversideqi movemsideqi mover2side peephole2): Use satisfies_constraint_N and satisfies_constraint_J. (andu peephole2): Use satisfies_constraint_I and satisfies_constraint_O. Index: gcc/config/cris/cris.md === --- gcc/config/cris/cris.md (revision 180776) +++ gcc/config/cris/cris.md (working copy) @@ -242,6 +242,7 @@ (define_code_attr roCC [(lt pl) (ge m ;; Operand and operator predicates. (include predicates.md) +(include constraints.md) ;; Test insns. @@ -650,8 +651,8 @@ (define_insn *mov_sidemode (!CONST_INT_P (operands[2]) || INTVAL (operands[2]) 127 || INTVAL (operands[2]) -128 - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'N') - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))) + || satisfies_constraint_N (operands[2]) + || satisfies_constraint_J (operands[2]))) return #; if (which_alternative == 4) return movem [%3=%2%S1],%0; @@ -677,8 +678,8 @@ (define_insn *mov_sidesisf (!CONST_INT_P (operands[2]) || INTVAL (operands[2]) 127 || INTVAL (operands[2]) -128 - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'N') - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))) + || satisfies_constraint_N (operands[2]) + || satisfies_constraint_J (operands[2]))) return #; if (which_alternative 3) return move.%s0 [%3=%1%S2],%0; @@ -796,8 +797,8 @@ (define_insn *mov_sidemode_mem (!CONST_INT_P (operands[1]) || INTVAL (operands[1]) 127 || INTVAL (operands[1]) -128 - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'N') - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'J'))) + || satisfies_constraint_N (operands[1]) + || satisfies_constraint_J (operands[1]))) return #; if (which_alternative == 1 || which_alternative == 5) return #; @@ -830,8 +831,8 @@ (define_insn *mov_sidesisf_mem (!CONST_INT_P (operands[1]) || INTVAL (operands[1]) 127 || INTVAL (operands[1]) -128 - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'N') - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'J'))) + || satisfies_constraint_N (operands[1]) + || satisfies_constraint_J (operands[1]))) return #; if (which_alternative == 1 || which_alternative == 7 @@ -903,8 +904,8 @@ (define_insn *clear_sidemode (!CONST_INT_P (operands[1]) || INTVAL (operands[1]) 127 || INTVAL (operands[1]) -128 - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'N') - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'J'))) + || satisfies_constraint_N (operands[1]) + || satisfies_constraint_J (operands[1]))) return #; if (which_alternative == 4) return clearm [%2=%1%S0]; @@ -1246,8 +1247,8 @@ (define_insn *ext_sideqihi (!CONST_INT_P (operands[2]) || INTVAL (operands[2]) 127 || INTVAL (operands[2]) -128 - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'N') - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))) + || satisfies_constraint_N (operands[2]) + || satisfies_constraint_J (operands[2]))) return #; if (which_alternative == 4) return mov%e4.%m4 [%3=%2%S1],%0; @@ -1270,8 +1271,8 @@ (define_insn *ext_sidemodesi (!CONST_INT_P (operands[2]) || INTVAL (operands[2]) 127 || INTVAL (operands[2]) -128 - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'N') - || CRIS_CONST_OK_FOR_LETTER_P (INTVAL (operands[2]), 'J'))) + || satisfies_constraint_N (operands[2]) + ||
[CRIS] Hookize GO_IF_MODE_DEPENDENT_ADDRESS
Hello. This patch removes obsolete GO_IF_LEGITIMATE_ADDRESS macro from CRIS back end in the GCC and introduces equivalent ARGET_LEGITIMATE_ADDRESS_P target hook. Regression tested on cris-axis-elf. OK to install? * config/cris/cris.c (reg_ok_for_base_p, reg_ok_for_index_p, cris_constant_index_p, cris_base_p, cris_index_p, cris_base_or_autoincr_p, cris_bdap_index_p, cris_biap_index_p, cris_legitimate_address_p): New functions. (TARGET_LEGITIMATE_ADDRESS_P): Define. (cris_pic_symbol_type, cris_valid_pic_const): Change arguments type from rtx to const_rtx. (cris_print_operand_address, cris_address_cost, cris_side_effect_mode_ok): Use cris_constant_index_p, cris_base_p, cris_base_or_autoincr_p, cris_biap_index_p and cris_bdap_index_p. * config/cris/cris.h (CONSTANT_INDEX_P, BASE_P, BASE_OR_AUTOINCR_P, BDAP_INDEX_P, BIAP_INDEX_P, GO_IF_LEGITIMATE_ADDRESS, REG_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P): Remove. (EXTRA_CONSTRAINT_Q, EXTRA_CONSTRAINT_R, EXTRA_CONSTRAINT_T): Use cris_constant_index_p, cris_base_p, cris_base_or_autoincr_p, cris_biap_index_p and cris_bdap_index_p. * config/cris/cris.md (moversideqi movemsideqi peephole2): Use cris_base_p. * config/cris/cris-protos.h (cris_constant_index_p, cris_base_p, cris_base_or_autoincr_p, cris_bdap_index_p, cris_biap_index_p): New prototype. (cris_pic_symbol_type, cris_valid_pic_const): Update prototype. Index: gcc/config/cris/cris.c === --- gcc/config/cris/cris.c (revision 180345) +++ gcc/config/cris/cris.c (working copy) @@ -125,6 +125,8 @@ static reg_class_t cris_preferred_reload_class (rtx, reg_class_t); +static bool cris_legitimate_address_p (enum machine_mode, rtx, bool); + static int cris_register_move_cost (enum machine_mode, reg_class_t, reg_class_t); static int cris_memory_move_cost (enum machine_mode, reg_class_t, bool); static bool cris_rtx_costs (rtx, int, int, int, int *, bool); @@ -200,6 +202,9 @@ #undef TARGET_INIT_LIBFUNCS #define TARGET_INIT_LIBFUNCS cris_init_libfuncs +#undef TARGET_LEGITIMATE_ADDRESS_P +#define TARGET_LEGITIMATE_ADDRESS_P cris_legitimate_address_p + #undef TARGET_PREFERRED_RELOAD_CLASS #define TARGET_PREFERRED_RELOAD_CLASS cris_preferred_reload_class @@ -1122,7 +1127,7 @@ if (CONSTANT_ADDRESS_P (x)) cris_output_addr_const (file, x); - else if (BASE_OR_AUTOINCR_P (x)) + else if (cris_base_or_autoincr_p (x, true)) cris_print_base (x, file); else if (GET_CODE (x) == PLUS) { @@ -1130,12 +1135,12 @@ x1 = XEXP (x, 0); x2 = XEXP (x, 1); - if (BASE_P (x1)) + if (cris_base_p (x1, true)) { cris_print_base (x1, file); cris_print_index (x2, file); } - else if (BASE_P (x2)) + else if (cris_base_p (x2, true)) { cris_print_base (x2, file); cris_print_index (x1, file); @@ -1272,6 +1277,136 @@ gcc_unreachable (); } +/* Nonzero if X is a hard reg that can be used as an index. */ +static inline bool +reg_ok_for_base_p (const_rtx x, bool strict) +{ + return ((! strict ! HARD_REGISTER_P (x)) + || REGNO_OK_FOR_BASE_P (REGNO (x))); +} + +/* Nonzero if X is a hard reg that can be used as an index. */ +static inline bool +reg_ok_for_index_p (const_rtx x, bool strict) +{ + return reg_ok_for_base_p (x, strict); +} + +/* No symbol can be used as an index (or more correct, as a base) together + with a register with PIC; the PIC register must be there. */ + +bool +cris_constant_index_p (const_rtx x) +{ + return (CONSTANT_P (x) (!flag_pic || cris_valid_pic_const (x, true))); +} + +/* True if X is a valid base register. */ + +bool +cris_base_p (const_rtx x, bool strict) +{ + return (REG_P (x) reg_ok_for_base_p (x, strict)); +} + +/* True if X is a valid index register. */ + +static inline bool +cris_index_p (const_rtx x, bool strict) +{ + return (REG_P (x) reg_ok_for_index_p (x, strict)); +} + +/* True if X is a valid base register with or without autoincrement. */ + +bool +cris_base_or_autoincr_p (const_rtx x, bool strict) +{ + return (cris_base_p (x, strict) + || (GET_CODE (x) == POST_INC + cris_base_p (XEXP (x, 0), strict) + REGNO (XEXP (x, 0)) != CRIS_ACR_REGNUM)); +} + +/* True if X is a valid (register) index for BDAP, i.e. [Rs].S or [Rs+].S. */ + +bool +cris_bdap_index_p (const_rtx x, bool strict) +{ + return ((MEM_P (x) + GET_MODE (x) == SImode + cris_base_or_autoincr_p (XEXP (x, 0), strict)) + || (GET_CODE (x) == SIGN_EXTEND + MEM_P (XEXP (x, 0)) + (GET_MODE (XEXP (x, 0)) == HImode + || GET_MODE (XEXP (x, 0)) == QImode) + cris_base_or_autoincr_p (XEXP (XEXP (x, 0), 0), strict))); +} + +/* True if X
[CRIS] Hookize PREFERRED_RELOAD_CLASS
Hello. This patch removes obsolete PREFERRED_RELOAD_CLASS macro from CRIS back end in the GCC and introduces equivalent TARGET_PREFERRED_RELOAD_CLASS target hook. Regression tested on cris-axis-elf. OK to install? * config/cris/cris.c (cris_preferred_reload_class): New function. (TARGET_PREFERRED_RELOAD_CLASS): Define. * config/cris/cris.h (OUTPUT_ADDR_CONST_EXTRA): Remove. Index: gcc/config/cris/cris.c === --- gcc/config/cris/cris.c (revision 179721) +++ gcc/config/cris/cris.c (working copy) @@ -123,6 +123,8 @@ static void cris_file_start (void); static void cris_init_libfuncs (void); +static reg_class_t cris_preferred_reload_class (rtx, reg_class_t); + static int cris_register_move_cost (enum machine_mode, reg_class_t, reg_class_t); static int cris_memory_move_cost (enum machine_mode, reg_class_t, bool); static bool cris_rtx_costs (rtx, int, int, int, int *, bool); @@ -198,6 +200,9 @@ #undef TARGET_INIT_LIBFUNCS #define TARGET_INIT_LIBFUNCS cris_init_libfuncs +#undef TARGET_PREFERRED_RELOAD_CLASS +#define TARGET_PREFERRED_RELOAD_CLASS cris_preferred_reload_class + #undef TARGET_REGISTER_MOVE_COST #define TARGET_REGISTER_MOVE_COST cris_register_move_cost #undef TARGET_MEMORY_MOVE_COST @@ -1342,6 +1347,31 @@ return false; } + +/* Worker function for TARGET_PREFERRED_RELOAD_CLASS. + + It seems like gcc (2.7.2 and 2.9x of 2000-03-22) may send NO_REGS as + the class for a constant (testcase: __Mul in arit.c). To avoid forcing + out a constant into the constant pool, we will trap this case and + return something a bit more sane. FIXME: Check if this is a bug. + Beware that we must not override classes that can be specified as + constraint letters, or else asm operands using them will fail when + they need to be reloaded. FIXME: Investigate whether that constitutes + a bug. */ + +static reg_class_t +cris_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t rclass) +{ + if (rclass != ACR_REGS + rclass != MOF_REGS + rclass != SRP_REGS + rclass != CC0_REGS + rclass != SPECIAL_REGS) +return GENERAL_REGS; + + return rclass; +} + /* Worker function for TARGET_REGISTER_MOVE_COST. */ static int Index: gcc/config/cris/cris.h === --- gcc/config/cris/cris.h (revision 179721) +++ gcc/config/cris/cris.h (working copy) @@ -583,22 +583,6 @@ /* See REGNO_OK_FOR_BASE_P. */ #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO) -/* It seems like gcc (2.7.2 and 2.9x of 2000-03-22) may send NO_REGS as - the class for a constant (testcase: __Mul in arit.c). To avoid forcing - out a constant into the constant pool, we will trap this case and - return something a bit more sane. FIXME: Check if this is a bug. - Beware that we must not override classes that can be specified as - constraint letters, or else asm operands using them will fail when - they need to be reloaded. FIXME: Investigate whether that constitutes - a bug. */ -#define PREFERRED_RELOAD_CLASS(X, CLASS) \ - ((CLASS) != ACR_REGS \ - (CLASS) != MOF_REGS \ - (CLASS) != SRP_REGS \ - (CLASS) != CC0_REGS \ - (CLASS) != SPECIAL_REGS \ - ? GENERAL_REGS : (CLASS)) - /* We can't move special registers to and from memory in smaller than word_mode. We also can't move between special registers. Luckily, -1, as returned by true_regnum for non-sub/registers, is valid as a Anatoly.
[PATCH] Remove OUTPUT_ADDR_CONST_EXTRA macro
Hi. No one back end does not use OUTPUT_ADDR_CONST_EXTRA macro now, this patch remove it. The TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA target hook should be use instead. The patch has been bootstrapped on and regression tested on x86_64-unknown-linux-gnu for c and c++. This patch is pre-approved and should be committed within a week if no objections. * system.h (OUTPUT_ADDR_CONST_EXTRA): Poison. * doc/tm.texi.in (OUTPUT_ADDR_CONST_EXTRA): Remove documentation. * doc/tm.texi: Regenerate. * target.def (output_addr_const_extra): Use hook_bool_FILEptr_rtx_false. * targhooks.c (default_asm_output_addr_const_extra): Remove. * targhooks.h (default_asm_output_addr_const_extra): Remove. * hooks.c (hook_bool_FILEptr_rtx_false): New functions. * hooks.h (hook_bool_FILEptr_rtx_false): Declare. Index: gcc/doc/tm.texi === --- gcc/doc/tm.texi (revision 179476) +++ gcc/doc/tm.texi (working copy) @@ -7530,18 +7530,6 @@ return @code{true}. @end deftypefn -@defmac OUTPUT_ADDR_CONST_EXTRA (@var{stream}, @var{x}, @var{fail}) -A C statement to recognize @var{rtx} patterns that -@code{output_addr_const} can't deal with, and output assembly code to -@var{stream} corresponding to the pattern @var{x}. This may be used to -allow machine-dependent @code{UNSPEC}s to appear within constants. - -If @code{OUTPUT_ADDR_CONST_EXTRA} fails to recognize a pattern, it must -@code{goto fail}, so that a standard error message is printed. If it -prints an error message itself, by calling, for example, -@code{output_operand_lossage}, it may just complete normally. -@end defmac - @defmac ASM_OUTPUT_ASCII (@var{stream}, @var{ptr}, @var{len}) A C statement to output to the stdio stream @var{stream} an assembler instruction to assemble a string constant containing the @var{len} Index: gcc/doc/tm.texi.in === --- gcc/doc/tm.texi.in (revision 179476) +++ gcc/doc/tm.texi.in (working copy) @@ -7446,18 +7446,6 @@ return @code{true}. @end deftypefn -@defmac OUTPUT_ADDR_CONST_EXTRA (@var{stream}, @var{x}, @var{fail}) -A C statement to recognize @var{rtx} patterns that -@code{output_addr_const} can't deal with, and output assembly code to -@var{stream} corresponding to the pattern @var{x}. This may be used to -allow machine-dependent @code{UNSPEC}s to appear within constants. - -If @code{OUTPUT_ADDR_CONST_EXTRA} fails to recognize a pattern, it must -@code{goto fail}, so that a standard error message is printed. If it -prints an error message itself, by calling, for example, -@code{output_operand_lossage}, it may just complete normally. -@end defmac - @defmac ASM_OUTPUT_ASCII (@var{stream}, @var{ptr}, @var{len}) A C statement to output to the stdio stream @var{stream} an assembler instruction to assemble a string constant containing the @var{len} Index: gcc/targhooks.c === --- gcc/targhooks.c (revision 179476) +++ gcc/targhooks.c (working copy) @@ -371,21 +371,6 @@ return get_identifier (stripped); } -/* The default implementation of TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA. */ - -bool -default_asm_output_addr_const_extra (FILE *file ATTRIBUTE_UNUSED, -rtx x ATTRIBUTE_UNUSED) -{ -#ifdef OUTPUT_ADDR_CONST_EXTRA - OUTPUT_ADDR_CONST_EXTRA (file, x, fail); - return true; - -fail: -#endif - return false; -} - /* True if MODE is valid for the target. By valid, we mean able to be manipulated in non-trivial ways. In particular, this means all the arithmetic is supported. Index: gcc/targhooks.h === --- gcc/targhooks.h (revision 179476) +++ gcc/targhooks.h (working copy) @@ -67,8 +67,6 @@ extern bool default_print_operand_punct_valid_p (unsigned char); extern tree default_mangle_assembler_name (const char *); -extern bool default_asm_output_addr_const_extra (FILE *, rtx); - extern bool default_scalar_mode_supported_p (enum machine_mode); extern bool targhook_words_big_endian (void); extern bool targhook_float_words_big_endian (void); Index: gcc/hooks.c === --- gcc/hooks.c (revision 179476) +++ gcc/hooks.c (working copy) @@ -132,6 +132,14 @@ { } +/* Generic hook that takes (FILE *, rtx) and returns false. */ +bool +hook_bool_FILEptr_rtx_false (FILE *a ATTRIBUTE_UNUSED, +rtx b ATTRIBUTE_UNUSED) +{ + return false; +} + /* Used for the TARGET_ASM_CAN_OUTPUT_MI_THUNK hook. */ bool hook_bool_const_tree_hwi_hwi_const_tree_false (const_tree a ATTRIBUTE_UNUSED, Index: gcc/hooks.h === --- gcc/hooks.h (revision 179476) +++ gcc/hooks.h (working copy) @@ -63,6 +63,7 @@ extern void
[CRIS] Hookize OUTPUT_ADDR_CONST_EXTRA
Hi. This patch removes obsolete OUTPUT_ADDR_CONST_EXTRA macro from the CRIS back end in the GCC and introduces equivalent TARGET_OUTPUT_ADDR_CONST_EXTRA target hook. Regression tested on cris-axis-elf. OK to install? * config/cris/m32c.c (cris_output_addr_const_extra): Make static. (TARGET_OUTPUT_ADDR_CONST_EXTRA): Define. * config/cris/cris.h (OUTPUT_ADDR_CONST_EXTRA): Remove. * config/cris/cris-protos.h (cris_output_addr_const_extra): Remove. Index: gcc/config/cris/cris.c === --- gcc/config/cris/cris.c (revision 179412) +++ gcc/config/cris/cris.c (working copy) @@ -113,6 +113,8 @@ static bool cris_print_operand_punct_valid_p (unsigned char code); +static bool cris_output_addr_const_extra (FILE *, rtx); + static void cris_conditional_register_usage (void); static void cris_asm_output_mi_thunk @@ -179,6 +181,8 @@ #define TARGET_PRINT_OPERAND_ADDRESS cris_print_operand_address #undef TARGET_PRINT_OPERAND_PUNCT_VALID_P #define TARGET_PRINT_OPERAND_PUNCT_VALID_P cris_print_operand_punct_valid_p +#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA +#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA cris_output_addr_const_extra #undef TARGET_CONDITIONAL_REGISTER_USAGE #define TARGET_CONDITIONAL_REGISTER_USAGE cris_conditional_register_usage @@ -3608,9 +3614,9 @@ assemble_name (file, buf); } -/* Worker function for OUTPUT_ADDR_CONST_EXTRA. */ +/* Worker function for TARGET_OUTPUT_ADDR_CONST_EXTRA. */ -bool +static bool cris_output_addr_const_extra (FILE *file, rtx xconst) { switch (GET_CODE (xconst)) Index: gcc/config/cris/cris.h === --- gcc/config/cris/cris.h (revision 179412) +++ gcc/config/cris/cris.h (working copy) @@ -1097,9 +1097,6 @@ /* Node: Data Output */ -#define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \ - do { if (!cris_output_addr_const_extra (STREAM, X)) goto FAIL; } while (0) - #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) (C) == '@' /* Node: Uninitialized Data */ Index: gcc/config/cris/cris-protos.h === --- gcc/config/cris/cris-protos.h (revision 179412) +++ gcc/config/cris/cris-protos.h (working copy) @@ -38,7 +38,6 @@ extern bool cris_store_multiple_op_p (rtx); extern bool cris_movem_load_rest_p (rtx, int); extern void cris_asm_output_symbol_ref (FILE *, rtx); -extern bool cris_output_addr_const_extra (FILE *, rtx); extern int cris_cfun_uses_pic_table (void); extern void cris_asm_output_case_end (FILE *, int, rtx); extern rtx cris_gen_movem_load (rtx, rtx, int); Anatoly.
[M68K] Hookize OUTPUT_ADDR_CONST_EXTRA
Hi. This patch removes obsolete OUTPUT_ADDR_CONST_EXTRA macro from the M68K back end in the GCC and introduces equivalent TARGET_OUTPUT_ADDR_CONST_EXTRA target hook. Compiled without error. Not tested. OK to install? * config/m68k/m68k.c (m68k_output_addr_const_extra): Make static. (TARGET_OUTPUT_ADDR_CONST_EXTRA): Define. * config/m68k/m68k.h (OUTPUT_ADDR_CONST_EXTRA): Remove. * config/m68k/m68k-protos.h (m68k_output_addr_const_extra): Remove. Index: gcc/config/m68k/m68k-protos.h === --- gcc/config/m68k/m68k-protos.h (revision 179412) +++ gcc/config/m68k/m68k-protos.h (working copy) @@ -51,7 +51,6 @@ extern int standard_68881_constant_p (rtx); extern void print_operand_address (FILE *, rtx); extern void print_operand (FILE *, rtx, int); -extern bool m68k_output_addr_const_extra (FILE *, rtx); extern void notice_update_cc (rtx, rtx); extern bool m68k_legitimate_base_reg_p (rtx, bool); extern bool m68k_legitimate_index_reg_p (rtx, bool); Index: gcc/config/m68k/m68k.c === --- gcc/config/m68k/m68k.c (revision 179412) +++ gcc/config/m68k/m68k.c (working copy) @@ -163,6 +163,7 @@ static rtx m68k_function_arg (cumulative_args_t, enum machine_mode, const_tree, bool); static bool m68k_cannot_force_const_mem (enum machine_mode mode, rtx x); +static bool m68k_output_addr_const_extra (FILE *, rtx); /* Initialize the GCC target structure. */ @@ -297,6 +298,9 @@ #undef TARGET_LEGITIMATE_CONSTANT_P #define TARGET_LEGITIMATE_CONSTANT_P m68k_legitimate_constant_p +#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA +#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA m68k_output_addr_const_extra + static const struct attribute_spec m68k_attribute_table[] = { /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler, @@ -4540,9 +4544,9 @@ } } -/* m68k implementation of OUTPUT_ADDR_CONST_EXTRA. */ +/* m68k implementation of TARGET_OUTPUT_ADDR_CONST_EXTRA. */ -bool +static bool m68k_output_addr_const_extra (FILE *file, rtx x) { if (GET_CODE (x) == UNSPEC) Index: gcc/config/m68k/m68k.h === --- gcc/config/m68k/m68k.h (revision 179412) +++ gcc/config/m68k/m68k.h (working copy) @@ -935,12 +935,6 @@ #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) -#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \ -do { \ - if (! m68k_output_addr_const_extra (FILE, (X))) \ -goto FAIL; \ -} while (0); - #include config/m68k/m68k-opts.h enum fpu_type Anatoly.
[PATCH] Remove PREFERRED_OUTPUT_RELOAD_CLASS macro
Hi. No one back end does not use PREFERRED_OUTPUT_RELOAD_CLASS macro now, this patch remove it. The TARGET_PREFERRED_RELOAD_CLASS target hook should be use instead. The patch has been bootstrapped on and regression tested on x86_64-unknown-linux-gnu for c and c++. This patch is pre-approved and should be committed within a week if no objections. * doc/tm.texi.in (PREFERRED_OUTPUT_RELOAD_CLASS): Remove. * doc/tm.texi: Regenerate. * targhooks.c (default_preferred_output_reload_class): Don't use PREFERRED_OUTPUT_RELOAD_CLASS macro. * system.h (PREFERRED_OUTPUT_RELOAD_CLASS): Poison. Index: gcc/doc/tm.texi === --- gcc/doc/tm.texi (revision 177791) +++ gcc/doc/tm.texi (working copy) @@ -2601,15 +2601,6 @@ the SSE registers (and vice versa). @end defmac -@defmac PREFERRED_OUTPUT_RELOAD_CLASS (@var{x}, @var{class}) -Like @code{PREFERRED_RELOAD_CLASS}, but for output reloads instead of -input reloads. If you don't define this macro, the default is to use -@var{class}, unchanged. - -You can also use @code{PREFERRED_OUTPUT_RELOAD_CLASS} to discourage -reload from using some alternatives, like @code{PREFERRED_RELOAD_CLASS}. -@end defmac - @deftypefn {Target Hook} reg_class_t TARGET_PREFERRED_OUTPUT_RELOAD_CLASS (rtx @var{x}, reg_class_t @var{rclass}) Like @code{TARGET_PREFERRED_RELOAD_CLASS}, but for output reloads instead of input reloads. Index: gcc/doc/tm.texi.in === --- gcc/doc/tm.texi.in (revision 177791) +++ gcc/doc/tm.texi.in (working copy) @@ -2587,15 +2587,6 @@ the SSE registers (and vice versa). @end defmac -@defmac PREFERRED_OUTPUT_RELOAD_CLASS (@var{x}, @var{class}) -Like @code{PREFERRED_RELOAD_CLASS}, but for output reloads instead of -input reloads. If you don't define this macro, the default is to use -@var{class}, unchanged. - -You can also use @code{PREFERRED_OUTPUT_RELOAD_CLASS} to discourage -reload from using some alternatives, like @code{PREFERRED_RELOAD_CLASS}. -@end defmac - @hook TARGET_PREFERRED_OUTPUT_RELOAD_CLASS Like @code{TARGET_PREFERRED_RELOAD_CLASS}, but for output reloads instead of input reloads. Index: gcc/targhooks.c === --- gcc/targhooks.c (revision 177791) +++ gcc/targhooks.c (working copy) @@ -1287,11 +1287,7 @@ default_preferred_output_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t rclass) { -#ifdef PREFERRED_OUTPUT_RELOAD_CLASS - return PREFERRED_OUTPUT_RELOAD_CLASS (x, (enum reg_class) rclass); -#else return rclass; -#endif } /* The default implementation of TARGET_PREFERRED_RENAME_CLASS. */ Index: gcc/system.h === --- gcc/system.h(revision 177791) +++ gcc/system.h(working copy) @@ -866,7 +866,8 @@ USING_SVR4_H SVR4_ASM_SPEC FUNCTION_ARG FUNCTION_ARG_ADVANCE \ FUNCTION_INCOMING_ARG IRA_COVER_CLASSES TARGET_VERSION \ MACHINE_TYPE TARGET_HAS_TARGETCM ASM_OUTPUT_BSS\ - SETJMP_VIA_SAVE_AREA FORBIDDEN_INC_DEC_CLASSES + SETJMP_VIA_SAVE_AREA FORBIDDEN_INC_DEC_CLASSES \ + PREFERRED_OUTPUT_RELOAD_CLASS /* Hooks that are no longer used. */ #pragma GCC poison LANG_HOOKS_FUNCTION_MARK LANG_HOOKS_FUNCTION_FREE \ Anatoly.
[M32C] Hookize PREFERRED_RELOAD_CLASS and PREFERRED_OUTPUT_RELOAD_CLASS
Hi. This patch removes obsolete PREFERRED_RELOAD_CLASS and PREFERRED_OUTPUT_RELOAD_CLASS macros from M32C back end in the GCC and introduces equivalent TARGET_PREFERRED_RELOAD_CLASS and TARGET_PREFERRED_OUTPUT_RELOAD_CLASS target hooks. Regression tested on m32c-unknown-elf. OK to install? * config/m32c/m32c.h (PREFERRED_RELOAD_CLASS, PREFERRED_OUTPUT_RELOAD_CLASS): Remove macro. * config/m32c/m32c-protos.h (m32c_preferred_reload_class, m32c_preferred_output_reload_class): Remove. * config/m32c/m32c.c (m32c_preferred_reload_class): Make static. Change rclass argument and return types to reg_class_t. Use reg_class_subset_p instead of class_sizes. (m32c_preferred_output_reload_class): Make static. Change rclass argument and return types to reg_class_t. (TARGET_PREFERRED_RELOAD_CLASS, TARGET_PREFERRED_OUTPUT_RELOAD_CLASS): Define. Index: gcc/config/m32c/m32c.c === --- gcc/config/m32c/m32c.c (revision 177745) +++ gcc/config/m32c/m32c.c (working copy) @@ -729,12 +729,16 @@ #define DEBUG_RELOAD 0 -/* Implements PREFERRED_RELOAD_CLASS. In general, prefer general +/* Implements TARGET_PREFERRED_RELOAD_CLASS. In general, prefer general registers of the appropriate size. */ -int -m32c_preferred_reload_class (rtx x, int rclass) + +#undef TARGET_PREFERRED_RELOAD_CLASS +#define TARGET_PREFERRED_RELOAD_CLASS m32c_preferred_reload_class + +static reg_class_t +m32c_preferred_reload_class (rtx x, reg_class_t rclass) { - int newclass = rclass; + reg_class_t newclass = rclass; #if DEBUG_RELOAD fprintf (stderr, \npreferred_reload_class for %s is , @@ -759,7 +763,7 @@ else if (newclass == QI_REGS GET_MODE_SIZE (GET_MODE (x)) 2) newclass = SI_REGS; else if (GET_MODE_SIZE (GET_MODE (x)) 4 - ~class_contents[rclass][0] 0x000f) + ! reg_class_subset_p (R03_REGS, rclass)) newclass = DI_REGS; rclass = reduce_class (rclass, newclass, rclass); @@ -779,9 +783,13 @@ return rclass; } -/* Implements PREFERRED_OUTPUT_RELOAD_CLASS. */ -int -m32c_preferred_output_reload_class (rtx x, int rclass) +/* Implements TARGET_PREFERRED_OUTPUT_RELOAD_CLASS. */ + +#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS +#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS m32c_preferred_output_reload_class + +static reg_class_t +m32c_preferred_output_reload_class (rtx x, reg_class_t rclass) { return m32c_preferred_reload_class (x, rclass); } Index: gcc/config/m32c/m32c.h === --- gcc/config/m32c/m32c.h (revision 177745) +++ gcc/config/m32c/m32c.h (working copy) @@ -417,8 +417,6 @@ #define REGNO_OK_FOR_BASE_P(NUM) m32c_regno_ok_for_base_p (NUM) #define REGNO_OK_FOR_INDEX_P(NUM) 0 -#define PREFERRED_RELOAD_CLASS(X,CLASS) m32c_preferred_reload_class (X, CLASS) -#define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) m32c_preferred_output_reload_class (X, CLASS) #define LIMIT_RELOAD_CLASS(MODE,CLASS) \ (enum reg_class) m32c_limit_reload_class (MODE, CLASS) Index: gcc/config/m32c/m32c-protos.h === --- gcc/config/m32c/m32c-protos.h (revision 177745) +++ gcc/config/m32c/m32c-protos.h (working copy) @@ -66,8 +66,6 @@ int m32c_modes_tieable_p (enum machine_mode, enum machine_mode); bool m32c_mov_ok (rtx *, enum machine_mode); char * m32c_output_compare (rtx, rtx *); -int m32c_preferred_output_reload_class (rtx, int); -int m32c_preferred_reload_class (rtx, int); int m32c_prepare_move (rtx *, enum machine_mode); int m32c_prepare_shift (rtx *, int, int); int m32c_reg_ok_for_base_p (rtx, int); Anatoly.
Re: [MMIX] Hookize PREFERRED_RELOAD_CLASS and PREFERRED_OUTPUT_RELOAD_CLASS
Hi. This patch removes obsolete PREFERRED_RELOAD_CLASS and PREFERRED_OUTPUT_RELOAD_CLASS macros from MMIX back end in the GCC and introduces equivalent TARGET_PREFERRED_RELOAD_CLASS and TARGET_PREFERRED_OUTPUT_RELOAD_CLASS target hooks. --- gcc/config/mmix/mmix.c (revision 176858) +static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t); +static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t); +#undef TARGET_PREFERRED_RELOAD_CLASS +#define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class +#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS +#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_reload_class The TARGET_PREFERRED_OUTPUT_RELOAD_CLASS macro incorrectly defined. This patch fix it. Regression tested on mmix-knuth-mmixware. Committed as obvious. * config/mmix/mmix.c (TARGET_PREFERRED_OUTPUT_RELOAD_CLASS): Redefine as mmix_preferred_output_reload_class. Index: gcc/config/mmix/mmix.c === --- gcc/config/mmix/mmix.c (revision 177747) +++ gcc/config/mmix/mmix.c (working copy) @@ -260,7 +260,7 @@ #undef TARGET_PREFERRED_RELOAD_CLASS #define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class #undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS -#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_reload_class +#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_output_reload_class #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_Pmmix_legitimate_address_p Anatoly.
[MMIX] Hookize REGISTER_MOVE_COST
Hi. This patch removes obsolete REGISTER_MOVE_COST macro from MMIX back end in the GCC and introduces equivalent TARGET_REGISTER_MOVE_COST target hook. Regression tested on mmix-knuth-mmixware. OK to install? * config/mmix/mmix.h (REGISTER_MOVE_COST): Remove macro. * config/mmix/mmix-protos.h (mmix_register_move_cost): Remove. * config/mmix/mmix.c (mmix_register_move_cost): Make static. Change 'from' and 'to' arguments type to reg_class_t. (TARGET_REGISTER_MOVE_COST): Define. Index: gcc/config/mmix/mmix.h === --- gcc/config/mmix/mmix.h (revision 177573) +++ gcc/config/mmix/mmix.h (working copy) @@ -628,23 +617,6 @@ /* Node: Costs */ -/* The special registers can only move to and from general regs, and we - need to check that their constraints match, so say 3 for them. */ -/* WARNING: gcc-2.7.2.2 i686-pc-linux-gnulibc1 (as shipped with RH 4.2) - miscompiles reload1.c:reload_cse_simplify_set; a call to - reload_cse_regno_equal_p is missing when checking if a substitution of - a register setting is valid if this is defined to just the expression - in mmix_register_move_cost. - - Symptom: a (all?) register setting is optimized away for e.g. - char *p1(char *p) { return p+1; } and the value of register zero ($0) - is returned. - - We can workaround by making this a function call - unknown if this - causes dire speed effects. */ -#define REGISTER_MOVE_COST(MODE, FROM, TO) \ - mmix_register_move_cost (MODE, FROM, TO) - #define SLOW_BYTE_ACCESS 0 Index: gcc/config/mmix/mmix-protos.h === --- gcc/config/mmix/mmix-protos.h (revision 177573) +++ gcc/config/mmix/mmix-protos.h (working copy) @@ -26,8 +26,6 @@ extern int mmix_function_arg_regno_p (int, int); extern void mmix_function_profiler (FILE *, int); extern int mmix_reversible_cc_mode (enum machine_mode); -extern int mmix_register_move_cost - (enum machine_mode, enum reg_class, enum reg_class); extern const char *mmix_text_section_asm_op (void); extern const char *mmix_data_section_asm_op (void); extern void mmix_output_quoted_string (FILE *, const char *, int); Index: gcc/config/mmix/mmix.c === --- gcc/config/mmix/mmix.c (revision 177573) +++ gcc/config/mmix/mmix.c (working copy) @@ -141,6 +141,8 @@ static void mmix_file_start (void); static void mmix_file_end (void); static bool mmix_rtx_costs (rtx, int, int, int *, bool); +static int mmix_register_move_cost (enum machine_mode, + reg_class_t, reg_class_t); static rtx mmix_struct_value_rtx (tree, int); static enum machine_mode mmix_promote_function_mode (const_tree, enum machine_mode, @@ -224,6 +226,9 @@ #undef TARGET_ADDRESS_COST #define TARGET_ADDRESS_COST hook_int_rtx_bool_0 +#undef TARGET_REGISTER_MOVE_COST +#define TARGET_REGISTER_MOVE_COST mmix_register_move_cost + #undef TARGET_MACHINE_DEPENDENT_REORG #define TARGET_MACHINE_DEPENDENT_REORG mmix_reorg @@ -1233,12 +1238,15 @@ return false; } -/* REGISTER_MOVE_COST. */ +/* TARGET_REGISTER_MOVE_COST. -int + The special registers can only move to and from general regs, and we + need to check that their constraints match, so say 3 for them. */ + +static int mmix_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, -enum reg_class from, -enum reg_class to) +reg_class_t from, +reg_class_t to) { return (from == GENERAL_REGS from == to) ? 2 : 3; } Anatoly.
[MMIX] Remove REG_OK_FOR_BASE_P and REG_OK_FOR_INDEX_P macros
Hello. This patch remove unused REG_OK_FOR_BASE_P and REG_OK_FOR_INDEX_P macros from the MMIX back end. Regression tested on mmix-knuth-mmixware. OK to install? * config/mmix/mmix.h (REG_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P): Remove. Index: gcc/config/mmix/mmix.h === --- gcc/config/mmix/mmix.h (revision 177573) +++ gcc/config/mmix/mmix.h (working copy) @@ -597,18 +597,7 @@ #define MAX_REGS_PER_ADDRESS 2 -#ifndef REG_OK_STRICT -# define REG_OK_FOR_BASE_P(X) \ - (REGNO (X) = MMIX_LAST_GENERAL_REGISTER \ - || REGNO (X) == MMIX_ARG_POINTER_REGNUM \ - || REGNO (X) = FIRST_PSEUDO_REGISTER) -#else -# define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) -#endif /* REG_OK_STRICT */ -#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X) - - /* Node: Condition Code */ #define SELECT_CC_MODE(OP, X, Y) \ Anatoly.
[MMIX] Hookize PREFERRED_RELOAD_CLASS and PREFERRED_OUTPUT_RELOAD_CLASS
Hi. This patch removes obsolete PREFERRED_RELOAD_CLASS and PREFERRED_OUTPUT_RELOAD_CLASS macros from MMIX back end in the GCC and introduces equivalent TARGET_PREFERRED_RELOAD_CLASS and TARGET_PREFERRED_OUTPUT_RELOAD_CLASS target hooks. Regression tested on mmix-knuth-mmixware. OK to install? * config/mmix/mmix.h (PREFERRED_RELOAD_CLASS, PREFERRED_OUTPUT_RELOAD_CLASS): Remove macro. * config/mmix/mmix-protos.h (mmix_preferred_reload_class, mmix_preferred_output_reload_class): Remove. * config/mmix/mmix.c (mmix_preferred_reload_class, mmix_preferred_output_reload_class): Make static. Change rclass argument and return type to reg_class_t. (TARGET_PREFERRED_RELOAD_CLASS, TARGET_PREFERRED_OUTPUT_RELOAD_CLASS): Define. Index: gcc/config/mmix/mmix.h === --- gcc/config/mmix/mmix.h (revision 176858) +++ gcc/config/mmix/mmix.h (working copy) @@ -452,12 +452,6 @@ #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P (REGNO) -#define PREFERRED_RELOAD_CLASS(X, CLASS) \ - mmix_preferred_reload_class (X, CLASS) - -#define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS) \ - mmix_preferred_output_reload_class (X, CLASS) - #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ mmix_secondary_reload_class (CLASS, MODE, X, 1) Index: gcc/config/mmix/mmix-protos.h === --- gcc/config/mmix/mmix-protos.h (revision 176858) +++ gcc/config/mmix/mmix-protos.h (working copy) @@ -59,9 +59,6 @@ (FILE *, tree, int, const char *); extern void mmix_asm_output_addr_diff_elt (FILE *, rtx, int, int); extern void mmix_asm_output_addr_vec_elt (FILE *, int); -extern enum reg_class mmix_preferred_reload_class (rtx, enum reg_class); -extern enum reg_class mmix_preferred_output_reload_class - (rtx, enum reg_class); extern enum reg_class mmix_secondary_reload_class (enum reg_class, enum machine_mode, rtx, int); extern int mmix_const_ok_for_letter_p (HOST_WIDE_INT, int); Index: gcc/config/mmix/mmix.c === --- gcc/config/mmix/mmix.c (revision 176858) +++ gcc/config/mmix/mmix.c (working copy) @@ -129,6 +129,8 @@ static void mmix_target_asm_function_prologue (FILE *, HOST_WIDE_INT); static void mmix_target_asm_function_end_prologue (FILE *); static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT); +static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t); +static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t); static bool mmix_legitimate_address_p (enum machine_mode, rtx, bool); static bool mmix_legitimate_constant_p (enum machine_mode, rtx); static void mmix_reorg (void); @@ -250,6 +252,11 @@ #undef TARGET_CALLEE_COPIES #define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_true +#undef TARGET_PREFERRED_RELOAD_CLASS +#define TARGET_PREFERRED_RELOAD_CLASS mmix_preferred_reload_class +#undef TARGET_PREFERRED_OUTPUT_RELOAD_CLASS +#define TARGET_PREFERRED_OUTPUT_RELOAD_CLASS mmix_preferred_reload_class + #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_Pmmix_legitimate_address_p #undef TARGET_LEGITIMATE_CONSTANT_P @@ -409,23 +416,22 @@ return regno = MMIX_LAST_STACK_REGISTER_REGNUM !call_used_regs[regno]; } -/* PREFERRED_RELOAD_CLASS. +/* TARGET_PREFERRED_RELOAD_CLASS. We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */ -enum reg_class -mmix_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, enum reg_class rclass) +static reg_class_t +mmix_preferred_reload_class (rtx x, reg_class_t rclass) { /* FIXME: Revisit. */ return GET_CODE (x) == MOD GET_MODE (x) == DImode ? REMAINDER_REG : rclass; } -/* PREFERRED_OUTPUT_RELOAD_CLASS. +/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS. We need to extend the reload class of REMAINDER_REG and HIMULT_REG. */ -enum reg_class -mmix_preferred_output_reload_class (rtx x ATTRIBUTE_UNUSED, - enum reg_class rclass) +static reg_class_t +mmix_preferred_output_reload_class (rtx x, reg_class_t rclass) { /* FIXME: Revisit. */ return GET_CODE (x) == MOD GET_MODE (x) == DImode Anatoly.
[MMIX] Hookize PRINT_OPERAND, PRINT_OPERAND_ADDRESS and PRINT_OPERAND_PUNCT_VALID_P
Hi. This patch removes obsolete PRINT_OPERAND, PRINT_OPERAND_ADDRESS and PRINT_OPERAND_PUNCT_VALID_P macros from MMIX back end in the GCC and introduces equivalent TARGET_PRINT_OPERAND, TARGET_PRINT_OPERAND_ADDRESS and TARGET_PRINT_OPERAND_PUNCT_VALID_P target hooks. Regression tested on mmix-knuth-mmixware. OK to install? * config/mmix/mmix.h (PRINT_OPERAND, PRINT_OPERAND_ADDRESS, PRINT_OPERAND_PUNCT_VALID_P): Remove macro. * config/mmix/mmix-protos.h (mmix_print_operand_punct_valid_p, mmix_print_operand, mmix_print_operand_address): Remove. * config/mmix/mmix.c (mmix_print_operand_punct_valid_p): Make static. Change return type to bool. Change argument type to bool. (mmix_print_operand, mmix_print_operand_address): Make static. (mmix_intval, mmix_output_condition): Change 'x' argument type to const_rtx. (TARGET_PRINT_OPERAND, TARGET_PRINT_OPERAND_ADDRESS, TARGET_PRINT_OPERAND_PUNCT_VALID_P): Define. Index: gcc/config/mmix/mmix.h === --- gcc/config/mmix/mmix.h (revision 176649) +++ gcc/config/mmix/mmix.h (working copy) @@ -793,15 +793,6 @@ {{sp, 254}, {:sp, 254}, {rD, 256}, {rE, 257}, \ {rH, 258}, {rJ, MMIX_rJ_REGNUM}, {rO, MMIX_rO_REGNUM}} -#define PRINT_OPERAND(STREAM, X, CODE) \ - mmix_print_operand (STREAM, X, CODE) - -#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ - mmix_print_operand_punct_valid_p (CODE) - -#define PRINT_OPERAND_ADDRESS(STREAM, X) \ - mmix_print_operand_address (STREAM, X) - #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ mmix_asm_output_reg_push (STREAM, REGNO) Index: gcc/config/mmix/mmix-protos.h === --- gcc/config/mmix/mmix-protos.h (revision 176649) +++ gcc/config/mmix/mmix-protos.h (working copy) @@ -38,7 +38,6 @@ extern void mmix_asm_weaken_label (FILE *, const char *); extern void mmix_asm_output_labelref (FILE *, const char *); extern void mmix_asm_output_def (FILE *, const char *, const char *); -extern int mmix_print_operand_punct_valid_p (int); extern void mmix_asm_output_reg_push (FILE *, int); extern void mmix_asm_output_reg_pop (FILE *, int); extern void mmix_asm_output_skip (FILE *, int); @@ -73,8 +72,6 @@ extern rtx mmix_eh_return_stackadj_rtx (void); extern rtx mmix_eh_return_handler_rtx (void); extern int mmix_constant_address_p (rtx); -extern void mmix_print_operand (FILE *, rtx, int); -extern void mmix_print_operand_address (FILE *, rtx); extern void mmix_expand_prologue (void); extern void mmix_expand_epilogue (void); extern rtx mmix_get_hard_reg_initial_val (enum machine_mode, int); Index: gcc/config/mmix/mmix.c === --- gcc/config/mmix/mmix.c (revision 176649) +++ gcc/config/mmix/mmix.c (working copy) @@ -118,8 +118,8 @@ static void mmix_output_shiftvalue_op_from_str (FILE *, const char *, HOST_WIDEST_INT); static void mmix_output_shifted_value (FILE *, HOST_WIDEST_INT); -static void mmix_output_condition (FILE *, rtx, int); -static HOST_WIDEST_INT mmix_intval (rtx); +static void mmix_output_condition (FILE *, const_rtx, int); +static HOST_WIDEST_INT mmix_intval (const_rtx); static void mmix_output_octa (FILE *, HOST_WIDEST_INT, int); static bool mmix_assemble_integer (rtx, unsigned int, int); static struct machine_function *mmix_init_machine_status (void); @@ -159,6 +159,9 @@ static bool mmix_frame_pointer_required (void); static void mmix_asm_trampoline_template (FILE *); static void mmix_trampoline_init (rtx, tree, rtx); +static void mmix_print_operand (FILE *, rtx, int); +static void mmix_print_operand_address (FILE *, rtx); +static bool mmix_print_operand_punct_valid_p (unsigned char); static void mmix_conditional_register_usage (void); /* Target structure macros. Listed by node. See `Using and Porting GCC' @@ -186,6 +189,13 @@ #undef TARGET_ASM_FUNCTION_EPILOGUE #define TARGET_ASM_FUNCTION_EPILOGUE mmix_target_asm_function_epilogue +#undef TARGET_PRINT_OPERAND +#define TARGET_PRINT_OPERAND mmix_print_operand +#undef TARGET_PRINT_OPERAND_ADDRESS +#define TARGET_PRINT_OPERAND_ADDRESS mmix_print_operand_address +#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P +#define TARGET_PRINT_OPERAND_PUNCT_VALID_P mmix_print_operand_punct_valid_p + #undef TARGET_ENCODE_SECTION_INFO #define TARGET_ENCODE_SECTION_INFO mmix_encode_section_info #undef TARGET_STRIP_NAME_ENCODING @@ -1552,9 +1562,9 @@ fputc ('\n', stream); } -/* PRINT_OPERAND. */ +/* TARGET_PRINT_OPERAND. */ -void +static void mmix_print_operand (FILE *stream, rtx x, int code) { /* When we add support for different codes later, we can, when needed, @@ -1779,10 +1789,10 @@ } } -/* PRINT_OPERAND_PUNCT_VALID_P. */ +/* TARGET_PRINT_OPERAND_PUNCT_VALID_P. */ -int -mmix_print_operand_punct_valid_p (int code
[M32C] Hookize PRINT_OPERAND, PRINT_OPERAND_ADDRESS and PRINT_OPERAND_PUNCT_VALID_P
Hi. This patch removes obsolete PRINT_OPERAND, PRINT_OPERAND_ADDRESS and PRINT_OPERAND_PUNCT_VALID_P macros from M32C back end in the GCC and introduces equivalent TARGET_PRINT_OPERAND, TARGET_PRINT_OPERAND_ADDRESS and TARGET_PRINT_OPERAND_PUNCT_VALID_P target hooks. Regression tested on m32c-unknown-elf. OK to install? * config/m32c/m32c.h (PRINT_OPERAND, PRINT_OPERAND_ADDRESS, PRINT_OPERAND_PUNCT_VALID_P): Remove macro. * config/m32c/m32c-protos.h (m32c_print_operand_punct_valid_p, m32c_print_operand, m32c_print_operand_address): Remove. * config/m32c/m32c.c (m32c_print_operand_punct_valid_p): Make static. Change return type to bool. Change argument type to bool. (m32c_print_operand, m32c_print_operand_address): Make static. (TARGET_PRINT_OPERAND, TARGET_PRINT_OPERAND_ADDRESS, TARGET_PRINT_OPERAND_PUNCT_VALID_P): Define. Index: gcc/config/m32c/m32c.c === --- gcc/config/m32c/m32c.c (revision 176672) +++ gcc/config/m32c/m32c.c (working copy) @@ -2644,8 +2644,12 @@ fb, sb, a1, a0, r3, r2, r1, r0 }; -/* Implements PRINT_OPERAND. */ -void +/* Implements TARGET_PRINT_OPERAND. */ + +#undef TARGET_PRINT_OPERAND +#define TARGET_PRINT_OPERAND m32c_print_operand + +static void m32c_print_operand (FILE * file, rtx x, int code) { int i, j, b; @@ -2998,18 +3002,28 @@ return; } -/* Implements PRINT_OPERAND_PUNCT_VALID_P. See m32c_print_operand - above for descriptions of what these do. */ -int -m32c_print_operand_punct_valid_p (int c) +/* Implements TARGET_PRINT_OPERAND_PUNCT_VALID_P. + + See m32c_print_operand above for descriptions of what these do. */ + +#undef TARGET_PRINT_OPERAND_PUNCT_VALID_P +#define TARGET_PRINT_OPERAND_PUNCT_VALID_P m32c_print_operand_punct_valid_p + +static bool +m32c_print_operand_punct_valid_p (unsigned char c) { if (c == '' || c == '!') -return 1; - return 0; +return true; + + return false; } -/* Implements PRINT_OPERAND_ADDRESS. Nothing unusual here. */ -void +/* Implements TARGET_PRINT_OPERAND_ADDRESS. Nothing unusual here. */ + +#undef TARGET_PRINT_OPERAND_ADDRESS +#define TARGET_PRINT_OPERAND_ADDRESS m32c_print_operand_address + +static void m32c_print_operand_address (FILE * stream, rtx address) { if (GET_CODE (address) == MEM) Index: gcc/config/m32c/m32c.h === --- gcc/config/m32c/m32c.h (revision 176672) +++ gcc/config/m32c/m32c.h (working copy) @@ -620,10 +620,6 @@ {a0a1, 4}, \ {r0r2r1r3, 0} } -#define PRINT_OPERAND(S,X,C) m32c_print_operand (S, X, C) -#define PRINT_OPERAND_PUNCT_VALID_P(C) m32c_print_operand_punct_valid_p (C) -#define PRINT_OPERAND_ADDRESS(S,X) m32c_print_operand_address (S, X) - #undef USER_LABEL_PREFIX #define USER_LABEL_PREFIX _ Index: gcc/config/m32c/m32c-protos.h === --- gcc/config/m32c/m32c-protos.h (revision 176672) +++ gcc/config/m32c/m32c-protos.h (working copy) @@ -33,7 +33,6 @@ int m32c_initial_elimination_offset (int, int); void m32c_output_reg_pop (FILE *, int); void m32c_output_reg_push (FILE *, int); -int m32c_print_operand_punct_valid_p (int); unsigned int m32c_push_rounding (int); int m32c_reg_class_from_constraint (char, const char *); void m32c_register_pragmas (void); @@ -71,8 +70,6 @@ int m32c_preferred_reload_class (rtx, int); int m32c_prepare_move (rtx *, enum machine_mode); int m32c_prepare_shift (rtx *, int, int); -void m32c_print_operand (FILE *, rtx, int); -void m32c_print_operand_address (FILE *, rtx); int m32c_reg_ok_for_base_p (rtx, int); enum reg_class m32c_regno_reg_class (int); rtx m32c_return_addr_rtx (int); Anatoly.
[PATCH] Hookize TARGET_CLASS_MAX_NREGS
Hello. This patch turns TARGET_CLASS_MAX_NREGS macro into a hook. The patch has been bootstrapped on and regression tested on x86_64-unknown-linux-gnu and v850-unknown-elf for c. Changes for other platforms is obvious and similar changes in v850 target. This patch is pre-approved and should be committed within a week if no objections. * target.def (class_max_nregs): New hook. * doc/tm.texi.in (TARGET_CLASS_MAX_NREGS): Document. * doc/tm.texi: Regenerate. * targhooks.c (default_class_max_nregs): New function. * targhooks.h (default_class_max_nregs): Declare. * ira.h (target_ira): Change type x_ira_reg_class_max_nregs and x_ira_reg_class_min_nregs arrays to unsigned char. * ira.c (setup_reg_class_nregs): Use TARGET_CLASS_MAX_NREGS target hook instead of CLASS_MAX_NREGS macro. * reginfo.c (restore_register_info): Ditto. * ira-conflicts.c (process_regs_for_copy): Use ira_reg_class_max_nregs array instead of CLASS_MAX_NREGS macro. Change type rclass and aclass vars to reg_class_t. * ira-costs.c (record_reg_classes): Use ira_reg_class_max_nregs array instead of CLASS_MAX_NREGS macro. Change type rclass var to reg_class_t. * reload.c (combine_reloads, find_reloads, find_reloads_address_1): Use ira_reg_class_max_nregs array instead of CLASS_MAX_NREGS macro. * config/i386/i386.h (CLASS_MAX_NREGS): Remove. * config/i386/i386.c (ix86_class_max_nregs): New function. (ix86_register_move_cost): Use TARGET_CLASS_MAX_NREGS target hook instead of CLASS_MAX_NREGS macro. (TARGET_CLASS_MAX_NREGS): Define. * config/avr/avr.h (CLASS_MAX_NREGS): Remove. * config/avr/avr-protos.h (class_max_nregs): Remove declaration. * config/avr/avr.c (class_max_nregs): Remove function. * config/alpha/alpha.h (CLASS_MAX_NREGS): Remove. * config/spu/spu.h (CLASS_MAX_NREGS): Remove. * config/mep/mep.h (CLASS_MAX_NREGS): Remove. * config/m32r/m32r.h (CLASS_MAX_NREGS): Remove. * config/microblaze/microblaze.h (CLASS_MAX_NREGS): Remove. * config/xtensa/xtensa.h (CLASS_MAX_NREGS): Remove. * config/stormy16/stormy16.h (CLASS_MAX_NREGS): Remove. * config/lm32/lm32.h (CLASS_MAX_NREGS): Remove. * config/moxie/moxie.h (CLASS_MAX_NREGS): Remove. * config/iq2000/iq2000.h (CLASS_MAX_NREGS): Remove. * config/mn10300/mn10300.h (CLASS_MAX_NREGS): Remove. * config/score/score.h (CLASS_MAX_NREGS): Remove. * config/vax/vax.h (CLASS_MAX_NREGS): Remove. * config/h8300/h8300.h (CLASS_MAX_NREGS): Remove. * config/v850/v850.h (CLASS_MAX_NREGS): Remove. Index: gcc/doc/tm.texi === --- gcc/doc/tm.texi (revision 176209) +++ gcc/doc/tm.texi (working copy) @@ -2846,6 +2846,23 @@ allocation. @end deftypefn +@deftypefn {Target Hook} {unsigned char} TARGET_CLASS_MAX_NREGS (reg_class_t @var{rclass}, enum machine_mode @var{mode}) +A target hook returns the maximum number of consecutive registers +of class @var{rclass} needed to hold a value of mode @var{mode}. + +This is closely related to the macro @code{HARD_REGNO_NREGS}. In fact, +the value returned by @code{TERGET_CLASS_MAX_NREGS (@var{rclass}, +@var{mode})} target hook should be the maximum value of +@code{HARD_REGNO_NREGS (@var{regno}, @var{mode})} for all @var{regno} +values in the class @var{rclass}. + +This target hook helps control the handling of multiple-word values +in the reload pass. + +The default version of this target hook returns the size of @var{mode} +in words. +@end deftypefn + @defmac CLASS_MAX_NREGS (@var{class}, @var{mode}) A C expression for the maximum number of consecutive registers of class @var{class} needed to hold a value of mode @var{mode}. Index: gcc/doc/tm.texi.in === --- gcc/doc/tm.texi.in (revision 176209) +++ gcc/doc/tm.texi.in (working copy) @@ -2832,6 +2832,23 @@ allocation. @end deftypefn +@hook TARGET_CLASS_MAX_NREGS +A target hook returns the maximum number of consecutive registers +of class @var{rclass} needed to hold a value of mode @var{mode}. + +This is closely related to the macro @code{HARD_REGNO_NREGS}. In fact, +the value returned by @code{TERGET_CLASS_MAX_NREGS (@var{rclass}, +@var{mode})} target hook should be the maximum value of +@code{HARD_REGNO_NREGS (@var{regno}, @var{mode})} for all @var{regno} +values in the class @var{rclass}. + +This target hook helps control the handling of multiple-word values +in the reload pass. + +The default version of this target hook returns the size of @var{mode} +in words. +@end deftypefn + @defmac CLASS_MAX_NREGS (@var{class}, @var{mode}) A C expression for the maximum number of consecutive registers of class @var{class} needed to hold a value of
Re: [PATCH] Use ira_reg_class_max_nregs array instead of CLASS_MAX_NREGS macro
Hi. The patch http://gcc.gnu.org/ml/gcc-patches/2011-06/msg02405.html is still pending review. Anatoly.
[PATCH] Use ira_reg_class_max_nregs array instead of CLASS_MAX_NREGS macro
Hello. This patch replaces the use of macro CLASS_MAX_NREGS to reading from ira_reg_class_max_nregs array. The ira_reg_class_max_nregs array is initialized from a macro CLASS_MAX_NREGS. This patch should speed up the compiler, a little. The patch has been bootstrapped on and regression tested on x86_64-unknown-linux-gnu for c. OK to install? * ira.h (target_ira): Change type x_ira_reg_class_max_nregs and x_ira_reg_class_min_nregs arrays to unsigned char. * ira-conflicts.c (process_regs_for_copy): Use ira_reg_class_max_nregs array instead of CLASS_MAX_NREGS macro. Change type rclass and aclass vars to reg_class_t. * ira-costs.c (record_reg_classes): Use ira_reg_class_max_nregs array instead of CLASS_MAX_NREGS macro. Change type rclass var to reg_class_t. * reload.c (combine_reloads, find_reloads, find_reloads_address_1): Use ira_reg_class_max_nregs array instead of CLASS_MAX_NREGS macro. The ira_reg_class_max_nregs array are using not only the IRA passes as well as in scheduling, loop invariant and now in reload passes. I propose to rename ira_reg_class_max_nregs and ira_reg_class_min_nregs array in reg_class_max_nregs and reg_class_min_nregs, move this declaration from ira.h to hard-reg-set.h and initialization from ira.c to reginfo.c. It will call the CLASS_MAX_NREGS macro only in one place the GCC. What is your opinion about these changes? Index: gcc/ira-conflicts.c === --- gcc/ira-conflicts.c (revision 175666) +++ gcc/ira-conflicts.c (working copy) @@ -393,7 +393,7 @@ int allocno_preferenced_hard_regno, cost, index, offset1, offset2; bool only_regs_p; ira_allocno_t a; - enum reg_class rclass, aclass; + reg_class_t rclass, aclass; enum machine_mode mode; ira_copy_t cp; @@ -438,7 +438,7 @@ mode = ALLOCNO_MODE (a); aclass = ALLOCNO_CLASS (a); if (only_regs_p insn != NULL_RTX - reg_class_size[rclass] = (unsigned) CLASS_MAX_NREGS (rclass, mode)) + reg_class_size[rclass] = ira_reg_class_max_nregs [rclass][mode]) /* It is already taken into account in ira-costs.c. */ return false; index = ira_class_hard_reg_index[aclass][allocno_preferenced_hard_regno]; Index: gcc/reload.c === --- gcc/reload.c(revision 175666) +++ gcc/reload.c(working copy) @@ -1769,9 +1769,9 @@ rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS rld[i].when_needed != RELOAD_OTHER -(CLASS_MAX_NREGS (rld[i].rclass, rld[i].inmode) - == CLASS_MAX_NREGS (rld[output_reload].rclass, - rld[output_reload].outmode)) +(ira_reg_class_max_nregs [(int) rld[i].rclass][(int) rld[i].inmode] + == ira_reg_class_max_nregs [(int) rld[output_reload].rclass] + [(int) rld[output_reload].outmode]) rld[i].inc == 0 rld[i].reg_rtx == 0 #ifdef SECONDARY_MEMORY_NEEDED @@ -4544,7 +4544,7 @@ GET_MODE_SIZE (rld[i].inmode))) ? rld[i].outmode : rld[i].inmode; - rld[i].nregs = CLASS_MAX_NREGS (rld[i].rclass, rld[i].mode); + rld[i].nregs = ira_reg_class_max_nregs [rld[i].rclass][rld[i].mode]; } /* Special case a simple move with an input reload and a @@ -5994,8 +5994,8 @@ else { enum reg_class rclass = context_reg_class; - if ((unsigned) CLASS_MAX_NREGS (rclass, GET_MODE (SUBREG_REG (x))) - reg_class_size[rclass]) + if (ira_reg_class_max_nregs [rclass][GET_MODE (SUBREG_REG (x))] + reg_class_size[(int) rclass]) { x = find_reloads_subreg_address (x, 0, opnum, ADDR_TYPE (type), Index: gcc/ira.h === --- gcc/ira.h (revision 175666) +++ gcc/ira.h (working copy) @@ -68,8 +68,8 @@ /* Maps: register class x machine mode - maximal/minimal number of hard registers of given class needed to store value of given mode. */ - int x_ira_reg_class_max_nregs[N_REG_CLASSES][MAX_MACHINE_MODE]; - int x_ira_reg_class_min_nregs[N_REG_CLASSES][MAX_MACHINE_MODE]; + unsigned char x_ira_reg_class_max_nregs[N_REG_CLASSES][MAX_MACHINE_MODE]; + unsigned char x_ira_reg_class_min_nregs[N_REG_CLASSES][MAX_MACHINE_MODE]; /* Array analogous to target hook TARGET_MEMORY_MOVE_COST. */ short x_ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2]; Index: gcc/ira-costs.c === --- gcc/ira-costs.c (revision 175666) +++ gcc/ira-costs.c (working copy) @@ -930,15 +930,15 @@ enum machine_mode mode = GET_MODE (ops[!i]);
Re[2]: [SPARC] Hookize PRINT_OPERAND, PRINT_OPERAND_ADDRESS and PRINT_OPERAND_PUNCT_VALID_P
Hello, Rainer. this is the patch I've checked in after it passed sparc-sun-solaris2.11 andi i386-pc-solaris2.11 bootstrap. Rainer 2011-05-05 Rainer Orth r...@cebitec.uni-bielefeld.de * config/sparc/sol2.h (ASM_OUTPUT_CALL): Use targetm.asm_out.print_operand. * config/sol2.c: Include target.h. This patch adds a missing dependency to config/t-sol2. Patch is untested. OK to install? * (sol2.o): Add dependency to $(TARGET_H). Index: gcc/config/t-sol2 === --- gcc/config/t-sol2 (revision 173714) +++ gcc/config/t-sol2 (working copy) @@ -25,7 +25,7 @@ # Solaris-specific attributes sol2.o: $(srcdir)/config/sol2.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - tree.h output.h $(TM_H) $(TM_P_H) $(GGC_H) + tree.h output.h $(TARGET_H) $(TM_H) $(TM_P_H) $(GGC_H) $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ $(srcdir)/config/sol2.c Anatoly.
[SPARC] Remove unused macros
Hi. This patch remove some unused macros from sparc.h. The RTX_OK_FOR_OFFSET_P and RTX_OK_FOR_OLO10_P macros is used only in sparc_legitimate_address_p function and moved to sparc.c. Bootstrapped on sparc64-unknown-linux-gnu. OK to install? * config/sparc/sparc.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P, SYMBOLIC_CONST, RTX_OK_FOR_BASE_P, RTX_OK_FOR_INDEX_P): Remove. (RTX_OK_FOR_OFFSET_P, RTX_OK_FOR_OLO10_P): Move to... * config/sparc/sparc.c (RTX_OK_FOR_OFFSET_P, RTX_OK_FOR_OLO10_P): ...here. (sparc_mode_dependent_address_p): Use symbolic_operand instead of SYMBOLIC_CONST. Index: gcc/config/sparc/sparc.c === --- gcc/config/sparc/sparc.c(revision 173212) +++ gcc/config/sparc/sparc.c(working copy) @@ -3110,6 +3110,12 @@ return true; } +#define RTX_OK_FOR_OFFSET_P(X) \ + (CONST_INT_P (X) INTVAL (X) = -0x1000 INTVAL (X) 0x1000 - 8) + +#define RTX_OK_FOR_OLO10_P(X) \ + (CONST_INT_P (X) INTVAL (X) = -0x1000 INTVAL (X) 0xc00 - 8) + /* Return nonzero if ADDR is a valid memory address. STRICT specifies whether strict register checking applies. */ @@ -3706,7 +3712,7 @@ rtx op0 = XEXP (addr, 0); rtx op1 = XEXP (addr, 1); if (op0 == pic_offset_table_rtx - SYMBOLIC_CONST (op1)) + symbolic_operand (op1, VOIDmode)) return true; } Index: gcc/config/sparc/sparc.h === --- gcc/config/sparc/sparc.h(revision 173212) +++ gcc/config/sparc/sparc.h(working copy) @@ -1538,41 +1538,6 @@ addresses which require two reload registers. */ #define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X) - -/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx - and check its validity for a certain class. - We have two alternate definitions for each of them. - The usual definition accepts all pseudo regs; the other rejects - them unless they have been allocated suitable hard regs. - The symbol REG_OK_STRICT causes the latter definition to be used. - - Most source files want to accept pseudo regs in the hope that - they will get allocated to the class that the insn wants them to be in. - Source files for reload pass need to be strict. - After reload, it makes no difference, since pseudo regs have - been eliminated by then. */ - -#ifndef REG_OK_STRICT - -/* Nonzero if X is a hard reg that can be used as an index - or if it is a pseudo reg. */ -#define REG_OK_FOR_INDEX_P(X) \ - (REGNO (X) 32 \ - || REGNO (X) == FRAME_POINTER_REGNUM\ - || REGNO (X) = FIRST_PSEUDO_REGISTER) - -/* Nonzero if X is a hard reg that can be used as a base reg - or if it is a pseudo reg. */ -#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P (X) - -#else - -/* Nonzero if X is a hard reg that can be used as an index. */ -#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) -/* Nonzero if X is a hard reg that can be used as a base reg. */ -#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) - -#endif /* Should gcc use [%reg+%lo(xx)+offset] addresses? */ @@ -1582,31 +1547,6 @@ #define USE_AS_OFFSETABLE_LO10 0 #endif -/* On SPARC, the actual legitimate addresses must be REG+REG or REG+SMALLINT - ordinarily. This changes a bit when generating PIC. The details are - in sparc.c's implementation of TARGET_LEGITIMATE_ADDRESS_P. */ - -#define SYMBOLIC_CONST(X) symbolic_operand (X, VOIDmode) - -#define RTX_OK_FOR_BASE_P(X) \ - ((GET_CODE (X) == REG REG_OK_FOR_BASE_P (X)) \ - || (GET_CODE (X) == SUBREG \ - GET_CODE (SUBREG_REG (X)) == REG \ - REG_OK_FOR_BASE_P (SUBREG_REG (X - -#define RTX_OK_FOR_INDEX_P(X) \ - ((GET_CODE (X) == REG REG_OK_FOR_INDEX_P (X)) \ - || (GET_CODE (X) == SUBREG \ - GET_CODE (SUBREG_REG (X)) == REG \ - REG_OK_FOR_INDEX_P (SUBREG_REG (X - -#define RTX_OK_FOR_OFFSET_P(X) \ - (GET_CODE (X) == CONST_INT INTVAL (X) = -0x1000 INTVAL (X) 0x1000 - 8) - -#define RTX_OK_FOR_OLO10_P(X) \ - (GET_CODE (X) == CONST_INT INTVAL (X) = -0x1000 INTVAL (X) 0xc00 - 8) - - /* Try a machine-dependent way of reloading an illegitimate address operand. If we find one, push the reload and jump to WIN. This macro is used in only one place: `find_reloads_address' in reload.c. */ Anatoly.
Re: [Patch,AVR]: PR18145: do_copy_data do_clear_bss only if needed
Hi. This patch now uses the same procedure like elfos.h ... +#define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \ + avr_asm_output_aligned_common (STREAM, NAME, SIZE, ALIGN, false) .. +#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \ + avr_asm_output_aligned_common (STREAM, NAME, SIZE, ALIGN, true) The GCC have three macro ASM_OUTPUT_COMMON, ASM_OUTPUT_ALIGNED_COMMON and ASM_OUTPUT_ALIGNED_DECL_COMMON for output common label in stream, eventually only one most flexible ASM_OUTPUT_ALIGNED_DECL_COMMON macro should be left. The same for local common label. Please use ASM_OUTPUT_ALIGNED_DECL_COMMON and ASM_OUTPUT_ALIGNED_DECL_LOCAL macros here. Anatoly.
Re: [Patch,AVR]: PR18145: do_copy_data do_clear_bss only if needed
Please use ASM_OUTPUT_ALIGNED_DECL_COMMON and ASM_OUTPUT_ALIGNED_DECL_LOCAL macros here. Confused. These macros are used. Johann Sorry... Im look on function name not on macro definition. I agree with the patch. Please wait day or two if Denis would not object, commit patch. Anatoly.
Re: [Patch,AVR]: PR18145: do_copy_data do_clear_bss only if needed
Hi. +/* To track if code will use .bss and/or .data */ +static int avr_need_clear_bss_p = 0; +static int avr_need_copy_data_p = 0; Change type avr_need_clear_bss_p and avr_need_copy_data_p vars to bool. -#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)\ -do {\ - fputs (\t.comm , (STREAM));\ - assemble_name ((STREAM), (NAME));\ - fprintf ((STREAM), ,%lu,1\n, (unsigned long)(SIZE));\ -} while (0) +#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \ + avr_asm_output_common (STREAM, NAME, SIZE, ROUNDED) Use ASM_OUTPUT_ALIGNED_DECL_COMMON macro instead of ASM_OUTPUT_COMMON. -#define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \ -do { \ - fputs (\t.lcomm , (STREAM)); \ - assemble_name ((STREAM), (NAME)); \ - fprintf ((STREAM), ,%d\n, (int)(SIZE)); \ -} while (0) +#define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \ + avr_asm_output_local (STREAM, NAME, SIZE, ROUNDED) Use ASM_OUTPUT_ALIGNED_DECL_LOCAL macro instead of ASM_OUTPUT_LOCAL. Anatoly.
[PATCH] Change rclass argument type in memory_move_cost function from enum reg_class to reg_class_t.
Hello. This patch change memory_move_cost function to stop using back end specific type 'enum reg_class' in favor to reg_class_t. Also this allow do small cleanup in ia64_register_move_cost function. The patch has been bootstrapped on and regression tested on x86_64-unknown-linux-gnu and ia64-unknown-linux-gnu for c. OK to install? * reginfo.c (memory_move_cost): Change rclass argument type to reg_class_t. * reload.h (memory_move_cost): Update prototype. * postreload.c reload_cse_simplify_set): Change type dclass var to reg_class_t. * ira-int.h (ira_allocate_cost_vector, ira_free_cost_vector): Update prototype. (ira_allocate_and_set_costs): Change aclass argument type form 'enum reg_class' to reg_class_t. * ira-build.c (ira_allocate_cost_vector, ira_free_cost_vector): Change aclass argument type to reg_class_t. (update_conflict_hard_reg_costs): Change type aclass and pref vars to reg_class_t. * gcc/ira.c (setup_class_subset_and_memory_move_costs): Adjust memory_move_cost call. * config/ia64/ia64.c (ia64_register_move_cost): Remove 'from' and 'to' local var. Rename from_i and to_i arguments to 'from' and 'to'. Change type tmp var to reg_class_t. Index: gcc/postreload.c === --- gcc/postreload.c(revision 172617) +++ gcc/postreload.c(working copy) @@ -233,7 +233,7 @@ int did_change = 0; int dreg; rtx src; - enum reg_class dclass; + reg_class_t dclass; int old_cost; cselib_val *val; struct elt_loc_list *l; Index: gcc/reload.h === --- gcc/reload.h(revision 172617) +++ gcc/reload.h(working copy) @@ -31,7 +31,7 @@ #endif extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t); -extern int memory_move_cost (enum machine_mode, enum reg_class, bool); +extern int memory_move_cost (enum machine_mode, reg_class_t, bool); extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool); /* Maximum number of reloads we can need. */ Index: gcc/ira-int.h === --- gcc/ira-int.h (revision 172617) +++ gcc/ira-int.h (working copy) @@ -989,8 +989,8 @@ extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int, bool, rtx, ira_loop_tree_node_t); -extern int *ira_allocate_cost_vector (enum reg_class); -extern void ira_free_cost_vector (int *, enum reg_class); +extern int *ira_allocate_cost_vector (reg_class_t); +extern void ira_free_cost_vector (int *, reg_class_t); extern void ira_flattening (int, int); extern bool ira_build (bool); @@ -1347,7 +1347,7 @@ /* Allocate cost vector *VEC for hard registers of ACLASS and initialize the elements by VAL if it is necessary */ static inline void -ira_allocate_and_set_costs (int **vec, enum reg_class aclass, int val) +ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val) { int i, *reg_costs; int len; @@ -1355,7 +1355,7 @@ if (*vec != NULL) return; *vec = reg_costs = ira_allocate_cost_vector (aclass); - len = ira_class_hard_regs_num[aclass]; + len = ira_class_hard_regs_num[(int) aclass]; for (i = 0; i len; i++) reg_costs[i] = val; } Index: gcc/ira-build.c === --- gcc/ira-build.c (revision 172617) +++ gcc/ira-build.c (working copy) @@ -1402,17 +1402,17 @@ /* Allocate and return a cost vector VEC for ACLASS. */ int * -ira_allocate_cost_vector (enum reg_class aclass) +ira_allocate_cost_vector (reg_class_t aclass) { - return (int *) pool_alloc (cost_vector_pool[aclass]); + return (int *) pool_alloc (cost_vector_pool[(int) aclass]); } /* Free a cost vector VEC for ACLASS. */ void -ira_free_cost_vector (int *vec, enum reg_class aclass) +ira_free_cost_vector (int *vec, reg_class_t aclass) { ira_assert (vec != NULL); - pool_free (cost_vector_pool[aclass], vec); + pool_free (cost_vector_pool[(int) aclass], vec); } /* Finish work with hard register cost vectors. Release allocation @@ -2969,19 +2969,20 @@ FOR_EACH_ALLOCNO (a, ai) { - enum reg_class aclass = ALLOCNO_CLASS (a); - enum reg_class pref = reg_preferred_class (ALLOCNO_REGNO (a)); + reg_class_t aclass = ALLOCNO_CLASS (a); + reg_class_t pref = reg_preferred_class (ALLOCNO_REGNO (a)); - if (reg_class_size[pref] != 1) + if (reg_class_size[(int) pref] != 1) continue; - index = ira_class_hard_reg_index[aclass][ira_class_hard_regs[pref][0]]; + index = ira_class_hard_reg_index[(int) aclass] + [ira_class_hard_regs[(int) pref][0]]; if (index 0) continue; if (ALLOCNO_CONFLICT_HARD_REG_COSTS
[SPARC] Hookize REGISTER_MOVE_COST
Hello. This patch removes obsolete REGISTER_MOVE_COST macro from SPARC back end in the GCC and introduces equivalent TARGET_REGISTER_MOVE_COST target hooks. Bootstrapped and regression tested on sparc64-unknown-linux-gnu. OK to install? * config/sparc/sparc.h (GENERAL_OR_I64, REGISTER_MOVE_COST): Remove. * config/sparc/sparc.c (TARGET_REGISTER_MOVE_COST): Define. (general_or_i64_p, sparc_register_move_cost): New function. Index: gcc/gcc/config/sparc/sparc.c === --- gcc/gcc/config/sparc/sparc.c(revision 172245) +++ gcc/gcc/config/sparc/sparc.c(working copy) @@ -422,6 +422,8 @@ static rtx sparc_tls_got (void); static const char *get_some_local_dynamic_name (void); static int get_some_local_dynamic_name_1 (rtx *, void *); +static int sparc_register_move_cost (enum machine_mode, +reg_class_t, reg_class_t); static bool sparc_rtx_costs (rtx, int, int, int *, bool); static rtx sparc_function_value (const_tree, const_tree, bool); static rtx sparc_libcall_value (enum machine_mode, const_rtx); @@ -560,6 +562,8 @@ #define TARGET_RTX_COSTS sparc_rtx_costs #undef TARGET_ADDRESS_COST #define TARGET_ADDRESS_COST hook_int_rtx_bool_0 +#undef TARGET_REGISTER_MOVE_COST +#define TARGET_REGISTER_MOVE_COST sparc_register_move_cost #undef TARGET_PROMOTE_FUNCTION_MODE #define TARGET_PROMOTE_FUNCTION_MODE sparc_promote_function_mode @@ -9124,6 +9128,36 @@ } } +static inline bool +general_or_i64_p (reg_class_t rclass) +{ + return (rclass == GENERAL_REGS || rclass == I64_REGS); +} + +/* Implement TARGET_REGISTER_MOVE_COST. */ + +static int +sparc_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, + reg_class_t from, reg_class_t to) +{ + if ((FP_REG_CLASS_P (from) general_or_i64_p (to)) + || (general_or_i64_p (from) FP_REG_CLASS_P (to)) + || from == FPCC_REGS + || to == FPCC_REGS) +{ + if (sparc_cpu == PROCESSOR_ULTRASPARC + || sparc_cpu == PROCESSOR_ULTRASPARC3 + || sparc_cpu == PROCESSOR_NIAGARA + || sparc_cpu == PROCESSOR_NIAGARA2) + return 12; + else + return 6; +} + + return 2; +} + + /* Emit the sequence of insns SEQ while preserving the registers REG and REG2. This is achieved by means of a manual dynamic stack space allocation in the current frame. We make the assumption that SEQ doesn't contain any Index: gcc/gcc/config/sparc/sparc.h === --- gcc/gcc/config/sparc/sparc.h(revision 172245) +++ gcc/gcc/config/sparc/sparc.h(working copy) @@ -1715,18 +1715,6 @@ #define DITF_CONVERSION_LIBFUNCS 0 #define SUN_INTEGER_MULTIPLY_640 -/* Compute extra cost of moving data between one register class - and another. */ -#define GENERAL_OR_I64(C) ((C) == GENERAL_REGS || (C) == I64_REGS) -#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ - (((FP_REG_CLASS_P (CLASS1) GENERAL_OR_I64 (CLASS2)) \ -|| (GENERAL_OR_I64 (CLASS1) FP_REG_CLASS_P (CLASS2)) \ -|| (CLASS1) == FPCC_REGS || (CLASS2) == FPCC_REGS) \ - ? ((sparc_cpu == PROCESSOR_ULTRASPARC \ - || sparc_cpu == PROCESSOR_ULTRASPARC3 \ - || sparc_cpu == PROCESSOR_NIAGARA \ - || sparc_cpu == PROCESSOR_NIAGARA2) ? 12 : 6) : 2) - /* Provide the cost of a branch. For pre-v9 processors we use a value of 3 to take into account the potential annulling of the delay slot (which ends up being a bubble in the pipeline slot) Anatoly.
[PATCH] Cleanup, use add_to_hard_reg_set instead of SET_HARD_REG_BIT loops.
Hi. This patch converts loops of SET_HARD_REG_BIT in to add_to_hard_reg_set functions call. The patch has been bootstrapped on and regression tested on x86_64-unknown-linux-gnu for c. OK to install? * expr.c (expand_expr_real_1): Use add_to_hard_reg_set function instead of loop. * sel-sched.c (mark_unavailable_hard_regs): Likewise. * function.c (record_hard_reg_sets): Likewise. * ira.c (compute_regs_asm_clobbered): Likewise. * sched-deps.c (sched_analyze_1): Likewise. * reload1.c (mark_reload_reg_in_use, choose_reload_regs): Likewise. Index: gcc/sel-sched.c === --- gcc/sel-sched.c (revision 172049) +++ gcc/sel-sched.c (working copy) @@ -1263,17 +1263,12 @@ FIXME: it is enough to do this once per all original defs. */ if (frame_pointer_needed) { - int i; + add_to_hard_reg_set (reg_rename_p-unavailable_hard_regs, + Pmode, FRAME_POINTER_REGNUM); - for (i = hard_regno_nregs[FRAME_POINTER_REGNUM][Pmode]; i--;) - SET_HARD_REG_BIT (reg_rename_p-unavailable_hard_regs, - FRAME_POINTER_REGNUM + i); - -#if !HARD_FRAME_POINTER_IS_FRAME_POINTER - for (i = hard_regno_nregs[HARD_FRAME_POINTER_REGNUM][Pmode]; i--;) - SET_HARD_REG_BIT (reg_rename_p-unavailable_hard_regs, - HARD_FRAME_POINTER_REGNUM + i); -#endif + if (!HARD_FRAME_POINTER_IS_FRAME_POINTER) +add_to_hard_reg_set (reg_rename_p-unavailable_hard_regs, +Pmode, HARD_FRAME_POINTER_IS_FRAME_POINTER); } #ifdef STACK_REGS Index: gcc/expr.c === --- gcc/expr.c (revision 172049) +++ gcc/expr.c (working copy) @@ -8451,18 +8451,10 @@ gcc_assert (decl_rtl); decl_rtl = copy_rtx (decl_rtl); /* Record writes to register variables. */ - if (modifier == EXPAND_WRITE REG_P (decl_rtl) - REGNO (decl_rtl) FIRST_PSEUDO_REGISTER) - { - int i = REGNO (decl_rtl); - int nregs = hard_regno_nregs[i][GET_MODE (decl_rtl)]; - while (nregs) - { - SET_HARD_REG_BIT (crtl-asm_clobbers, i); - i++; - nregs--; - } - } + if (modifier == EXPAND_WRITE + REG_P (decl_rtl) HARD_REGISTER_P (decl_rtl)) +add_to_hard_reg_set (crtl-asm_clobbers, +GET_MODE (decl_rtl), REGNO (decl_rtl)); /* Ensure variable marked as used even if it doesn't go through a parser. If it hasn't be used yet, write out an external Index: gcc/function.c === --- gcc/function.c (revision 172049) +++ gcc/function.c (working copy) @@ -2912,12 +2912,8 @@ record_hard_reg_sets (rtx x, const_rtx pat ATTRIBUTE_UNUSED, void *data) { HARD_REG_SET *pset = (HARD_REG_SET *)data; - if (REG_P (x) REGNO (x) FIRST_PSEUDO_REGISTER) -{ - int nregs = hard_regno_nregs[REGNO (x)][GET_MODE (x)]; - while (nregs-- 0) - SET_HARD_REG_BIT (*pset, REGNO (x) + nregs); -} + if (REG_P (x) HARD_REGISTER_P (x)) +add_to_hard_reg_set (pset, GET_MODE (x), REGNO (x)); } /* A subroutine of assign_parms. Allocate a pseudo to hold the current Index: gcc/ira.c === --- gcc/ira.c (revision 172049) +++ gcc/ira.c (working copy) @@ -1724,16 +1724,10 @@ { df_ref def = *def_rec; unsigned int dregno = DF_REF_REGNO (def); - if (dregno FIRST_PSEUDO_REGISTER) - { - unsigned int i; - enum machine_mode mode = GET_MODE (DF_REF_REAL_REG (def)); - unsigned int end = dregno - + hard_regno_nregs[dregno][mode] - 1; - - for (i = dregno; i = end; ++i) - SET_HARD_REG_BIT(crtl-asm_clobbers, i); - } + if (HARD_REGISTER_NUM_P (dregno)) + add_to_hard_reg_set (crtl-asm_clobbers, + GET_MODE (DF_REF_REAL_REG (def)), + dregno); } } } Index: gcc/sched-deps.c === --- gcc/sched-deps.c(revision 172049) +++ gcc/sched-deps.c(working copy) @@ -2259,16 +2259,12 @@ /* Treat all writes to a stack register as modifying the TOS. */ if (regno = FIRST_STACK_REG regno = LAST_STACK_REG) { - int nregs; - /* Avoid analyzing the same register twice. */ if (regno != FIRST_STACK_REG) sched_analyze_reg (deps, FIRST_STACK_REG, mode, code, insn); - nregs =
[PATCH] Remove ASM_OUTPUT_BSS macro.
Hi. No one back end does not use ASM_OUTPUT_BSS macro now, this patch remove it. The GCC have more flexible ASM_OUTPUT_ALIGNED_BSS macro. The patch has been bootstrapped on and regression tested on x86_64-unknown-linux-gnu for c. OK to install? * doc/tm.texi.in (ASM_OUTPUT_BSS): Remove documentation. (BSS_SECTION_ASM_OP, ASM_OUTPUT_ALIGNED_BSS): Update documentation. * doc/tm.texi: Regenerate. * system.h (ASM_OUTPUT_BSS): Poison. * varasm.c (asm_output_bss): Remove function. (emit_bss, init_varasm_once): Don't use ASM_OUTPUT_BSS macro. * config/frv/frv.h (BSS_SECTION_ASM_OP): Remove comment. * config/frv/fr30.h (BSS_SECTION_ASM_OP): Likewise. * config/i386/djgpp.h (BSS_SECTION_ASM_OP): Likewise. * config/i386/i386elf.h (BSS_SECTION_ASM_OP, ASM_OUTPUT_ALIGNED_BSS): Likewise. * config/sh/sh.h (BSS_SECTION_ASM_OP, ASM_OUTPUT_ALIGNED_BSS): Likewise. * config/m68k/m68kelf.h (BSS_SECTION_ASM_OP, ASM_OUTPUT_ALIGNED_BSS): Likewise. * config/m68k/netbsd-elf.h (ASM_OUTPUT_ALIGNED_BSS): Likewise. Index: gcc/doc/tm.texi === --- gcc/doc/tm.texi (revision 172058) +++ gcc/doc/tm.texi (working copy) @@ -6821,8 +6821,8 @@ @defmac BSS_SECTION_ASM_OP If defined, a C expression whose value is a string, including spacing, containing the assembler operation to identify the following data as -uninitialized global data. If not defined, and neither -@code{ASM_OUTPUT_BSS} nor @code{ASM_OUTPUT_ALIGNED_BSS} are defined, +uninitialized global data. If not defined, and +@code{ASM_OUTPUT_ALIGNED_BSS} not defined, uninitialized global data will be output in the data section if @option{-fno-common} is passed, otherwise @code{ASM_OUTPUT_COMMON} will be used. @@ -7598,20 +7598,19 @@ the variable's decl in order to chose what to output. @end defmac -@defmac ASM_OUTPUT_BSS (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{rounded}) +@defmac ASM_OUTPUT_ALIGNED_BSS (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment}) A C statement (sans semicolon) to output to the stdio stream @var{stream} the assembler definition of uninitialized global @var{decl} named -@var{name} whose size is @var{size} bytes. The variable @var{rounded} -is the size rounded up to whatever alignment the caller wants. +@var{name} whose size is @var{size} bytes. The variable @var{alignment} +is the alignment specified as the number of bits. -Try to use function @code{asm_output_bss} defined in @file{varasm.c} when -defining this macro. If unable, use the expression +Try to use function @code{asm_output_aligned_bss} defined in file +@file{varasm.c} when defining this macro. If unable, use the expression @code{assemble_name (@var{stream}, @var{name})} to output the name itself; before and after that, output the additional assembler syntax for defining the name, and a newline. -There are two ways of handling global BSS@. One is to define either -this macro or its aligned counterpart, @code{ASM_OUTPUT_ALIGNED_BSS}. +There are two ways of handling global BSS@. One is to define this macro. The other is to have @code{TARGET_ASM_SELECT_SECTION} return a switchable BSS section (@pxref{TARGET_HAVE_SWITCHABLE_BSS_SECTIONS}). You do not need to do both. @@ -7623,17 +7622,6 @@ common in order to save space in the object file. @end defmac -@defmac ASM_OUTPUT_ALIGNED_BSS (@var{stream}, @var{decl}, @var{name}, @var{size}, @var{alignment}) -Like @code{ASM_OUTPUT_BSS} except takes the required alignment as a -separate, explicit argument. If you define this macro, it is used in -place of @code{ASM_OUTPUT_BSS}, and gives you more flexibility in -handling the required alignment of the variable. The alignment is specified -as the number of bits. - -Try to use function @code{asm_output_aligned_bss} defined in file -@file{varasm.c} when defining this macro. -@end defmac - @defmac ASM_OUTPUT_LOCAL (@var{stream}, @var{name}, @var{size}, @var{rounded}) A C statement (sans semicolon) to output to the stdio stream @var{stream} the assembler definition of a local-common-label named Index: gcc/doc/tm.texi.in === --- gcc/doc/tm.texi.in (revision 172058) +++ gcc/doc/tm.texi.in (working copy) @@ -6799,8 +6799,8 @@ @defmac BSS_SECTION_ASM_OP If defined, a C expression whose value is a string, including spacing, containing the assembler operation to identify the following data as -uninitialized global data. If not defined, and neither -@code{ASM_OUTPUT_BSS} nor @code{ASM_OUTPUT_ALIGNED_BSS} are defined, +uninitialized global data. If not defined, and +@code{ASM_OUTPUT_ALIGNED_BSS} not defined, uninitialized global data will be output in the data section if @option{-fno-common} is passed, otherwise @code{ASM_OUTPUT_COMMON} will be used. @@ -7564,20 +7564,19
[MIPS] Remove REG_OK_FOR_BASE_P and REG_OK_FOR_INDEX_P macros
Hello. This patch remove unused REG_OK_FOR_BASE_P and REG_OK_FOR_INDEX_P macros from the MIPS back end. Bootstrapped and regression tested on mips64el-unknown-linux-gnu. OK to install? * config/mips/mips.h (REG_MODE_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P): Remove macros. Index: gcc/config/mips/mips.h === --- gcc/config/mips/mips.h (revision 171626) +++ gcc/config/mips/mips.h (working copy) @@ -2305,28 +2305,6 @@ #define REGNO_OK_FOR_INDEX_P(REGNO) 0 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) \ mips_regno_mode_ok_for_base_p (REGNO, MODE, 1) - -/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx - and check its validity for a certain class. - We have two alternate definitions for each of them. - The usual definition accepts all pseudo regs; the other rejects them all. - The symbol REG_OK_STRICT causes the latter definition to be used. - - Most source files want to accept pseudo regs in the hope that - they will get allocated to the class that the insn wants them to be in. - Some source files that are used after register allocation - need to be strict. */ - -#ifndef REG_OK_STRICT -#define REG_MODE_OK_FOR_BASE_P(X, MODE) \ - mips_regno_mode_ok_for_base_p (REGNO (X), MODE, 0) -#else -#define REG_MODE_OK_FOR_BASE_P(X, MODE) \ - mips_regno_mode_ok_for_base_p (REGNO (X), MODE, 1) -#endif - -#define REG_OK_FOR_INDEX_P(X) 0 - /* Maximum number of registers that can appear in a valid memory address. */ Anatoly.
[AVR] Define ASM_OUTPUT_ALIGNED_BSS macro instead of ASM_OUTPUT_BSS
Hello. The AVR back end is last one which uses a ASM_OUTPUT_BSS macro. This patch change AVR back end to use more flexible ASM_OUTPUT_ALIGNED_BSS macro instead of ASM_OUTPUT_BSS. Committed. * config/avr/avr.h (ASM_OUTPUT_BSS): Remove. (ASM_OUTPUT_ALIGNED_BSS): Define Index: gcc/config/avr/avr.h === --- gcc/config/avr/avr.h(revision 171911) +++ gcc/config/avr/avr.h(working copy) @@ -474,8 +474,8 @@ fprintf ((STREAM), ,%lu,1\n, (unsigned long)(SIZE)); \ } while (0) -#define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \ - asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED)) +#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ + asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \ do { \ Anatoly.
[SPARC] Hookize PREFERRED_RELOAD_CLASS
Hello. This patch removes obsolete PREFERRED_RELOAD_CLASS macro from SPARC back end in the GCC and introduces equivalent TARGET_PREFERRED_RELOAD_CLASS target hooks. Bootstrapped and regression tested on sparc64-unknown-linux-gnu. OK to install? * config/sparc/sparc.h (PREFERRED_RELOAD_CLASS): Remove. * config/sparc/sparc.c (TARGET_PREFERRED_RELOAD_CLASS): Define. (sparc_preferred_reload_class): New function. Index: gcc/gcc/config/sparc/sparc.c === --- gcc/gcc/config/sparc/sparc.c(revision 171581) +++ gcc/gcc/config/sparc/sparc.c(working copy) @@ -467,6 +467,7 @@ #endif static void sparc_trampoline_init (rtx, tree, rtx); static enum machine_mode sparc_preferred_simd_mode (enum machine_mode); +static reg_class_t sparc_preferred_reload_class (rtx x, reg_class_t rclass); #ifdef SUBTARGET_ATTRIBUTE_TABLE /* Table of valid machine attributes. */ @@ -660,6 +661,8 @@ #undef TARGET_CAN_ELIMINATE #define TARGET_CAN_ELIMINATE sparc_can_eliminate +#undef TARGET_PREFERRED_RELOAD_CLASS +#define TARGET_PREFERRED_RELOAD_CLASS sparc_preferred_reload_class #undef TARGET_CONDITIONAL_REGISTER_USAGE #define TARGET_CONDITIONAL_REGISTER_USAGE sparc_conditional_register_usage @@ -9769,4 +9772,33 @@ fixed_regs[4] = 0; } +/* Implement TARGET_PREFERRED_RELOAD_CLASS + + - We can't load constants into FP registers. + - We can't load FP constants into integer registers when soft-float, + because there is no soft-float pattern with a r/F constraint. + - We can't load FP constants into integer registers for TFmode unless + it is 0.0L, because there is no movtf pattern with a r/F constraint. + - Try and reload integer constants (symbolic or otherwise) back into + registers directly, rather than having them dumped to memory. */ + +static reg_class_t +sparc_preferred_reload_class (rtx x, reg_class_t rclass) +{ + if (CONSTANT_P (x)) +{ + if (FP_REG_CLASS_P (rclass) + || rclass == GENERAL_OR_FP_REGS + || rclass == GENERAL_OR_EXTRA_FP_REGS + || (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT ! TARGET_FPU) + || (GET_MODE (x) == TFmode ! const_zero_operand (x, TFmode))) + return NO_REGS; + else if (!FP_REG_CLASS_P (rclass) + GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) + return GENERAL_REGS; +} + + return rclass; +} + #include gt-sparc.h Index: gcc/gcc/config/sparc/sparc.h === --- gcc/gcc/config/sparc/sparc.h(revision 171581) +++ gcc/gcc/config/sparc/sparc.h(working copy) @@ -1153,34 +1153,6 @@ #define SPARC_SETHI32_P(X) \ (SPARC_SETHI_P ((unsigned HOST_WIDE_INT) (X) GET_MODE_MASK (SImode))) -/* Given an rtx X being reloaded into a reg required to be - in class CLASS, return the class of reg to actually use. - In general this is just CLASS; but on some machines - in some cases it is preferable to use a more restrictive class. */ -/* - We can't load constants into FP registers. - - We can't load FP constants into integer registers when soft-float, - because there is no soft-float pattern with a r/F constraint. - - We can't load FP constants into integer registers for TFmode unless - it is 0.0L, because there is no movtf pattern with a r/F constraint. - - Try and reload integer constants (symbolic or otherwise) back into - registers directly, rather than having them dumped to memory. */ - -#define PREFERRED_RELOAD_CLASS(X,CLASS)\ - (CONSTANT_P (X) \ - ? ((FP_REG_CLASS_P (CLASS) \ - || (CLASS) == GENERAL_OR_FP_REGS\ - || (CLASS) == GENERAL_OR_EXTRA_FP_REGS \ - || (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ - ! TARGET_FPU) \ - || (GET_MODE (X) == TFmode \ - ! const_zero_operand (X, TFmode)))\ - ? NO_REGS\ - : (!FP_REG_CLASS_P (CLASS) \ - GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \ - ? GENERAL_REGS \ - : (CLASS)) \ - : (CLASS)) - /* Return the register class of a scratch register needed to load IN into a register of class CLASS in MODE. Anatoly.
[H8300] Hookize GO_IF_MODE_DEPENDENT_ADDRESS
Hello. This patch removes obsolete GO_IF_MODE_DEPENDENT_ADDRESS macros from H8300 back end in the GCC and introduces equivalent TARGET_MODE_DEPENDENT_ADDRESS_P target hook. Regression tested on h8300-unknown-elf with no new failure. OK to install? * config/h8300/h8300.h (GO_IF_MODE_DEPENDENT_ADDRESS): Remove macro. * config/h8300/h8300-protos.h (h8300_get_index): Remove. * config/h8300/h8300.c (TARGET_MODE_DEPENDENT_ADDRESS_P): Define. (h8300_mode_dependent_address_p): New function. (h8300_get_index): Make static. Index: gcc/config/h8300/h8300.c === --- gcc/config/h8300/h8300.c(revision 171675) +++ gcc/config/h8300/h8300.c(working copy) @@ -113,6 +113,7 @@ static bool h8300_short_move_mem_p (rtx, enum rtx_code); static unsigned int h8300_move_length(rtx *, const h8300_length_table *); static bool h8300_hard_regno_scratch_ok (unsigned int); +static rtx h8300_get_index (rtx, enum machine_mode mode, int *); /* CPU_TYPE, says what cpu we're compiling for. */ int cpu_type; @@ -2094,7 +2097,7 @@ MODE is the mode of the value being accessed. It can be VOIDmode if the address is known to be valid, but its mode is unknown. */ -rtx +static rtx h8300_get_index (rtx x, enum machine_mode mode, int *size) { int dummy, factor; @@ -2156,6 +2159,21 @@ return x; } +/* Worker function for TARGET_MODE_DEPENDENT_ADDRESS_P. + + On the H8/300, the predecrement and postincrement address depend thus + (the amount of decrement or increment being the length of the operand). */ + +static bool +h8300_mode_dependent_address_p (const_rtx addr) +{ + if (GET_CODE (addr) == PLUS + h8300_get_index (XEXP (addr, 0), VOIDmode, 0) != XEXP (addr, 0)) +return true; + + return false; +} + static const h8300_length_table addb_length_table = { /* #xx Rs @aa @Rs @xx */ @@ -6026,4 +6044,7 @@ #undef TARGET_EXCEPT_UNWIND_INFO #define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info +#undef TARGET_MODE_DEPENDENT_ADDRESS_P +#define TARGET_MODE_DEPENDENT_ADDRESS_P h8300_mode_dependent_address_p + struct gcc_target targetm = TARGET_INITIALIZER; Index: gcc/config/h8300/h8300.h === --- gcc/config/h8300/h8300.h(revision 171675) +++ gcc/config/h8300/h8300.h(working copy) @@ -771,11 +771,6 @@ On the H8/300, the predecrement and postincrement address depend thus (the amount of decrement or increment being the length of the operand). */ - -#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ - if (GET_CODE (ADDR) == PLUS \ - h8300_get_index (XEXP (ADDR, 0), VOIDmode, 0) != XEXP (ADDR, 0)) \ -goto LABEL; /* Specify the machine mode that this machine uses for the index in the tablejump instruction. */ Index: gcc/config/h8300/h8300-protos.h === --- gcc/config/h8300/h8300-protos.h (revision 171675) +++ gcc/config/h8300/h8300-protos.h (working copy) @@ -110,7 +110,6 @@ extern void h8300_pr_interrupt (struct cpp_reader *); extern void h8300_pr_saveall (struct cpp_reader *); extern enum reg_class h8300_reg_class_from_letter (int); -extern rtx h8300_get_index (rtx, enum machine_mode mode, int *); extern unsigned inth8300_insn_length_from_table (rtx, rtx *); extern const char *output_h8sx_shift (rtx *, int, int); extern boolh8300_operands_match_p (rtx *); Anatoly.
Re[2]: [MIPS] Hookize FUNCTION_VALUE, LIBCALL_VALUE and FUNCTION_VALUE_REGNO_P
Hi, Richard. Richard Sandiford writes: +mips_function_value_regno_p (const unsigned int regno) Let's drop the const. OK with those changes, thanks. The 'regno' argument in TARGET_FUNCTION_VALUE_REGNO_P target hook have 'const unsigned int' type, so I left it unchanged. Bootstrapped and regression tested on mips64el-unknown-linux-gnu. Committed as: * config/mips/mips.h (LIBCALL_VALUE, FUNCTION_VALUE, FUNCTION_VALUE_REGNO_P): Remove macros. * config/mips/mips-protos.h (mips_function_value): Remove. * config/mips/mips.c (mips_function_value): Rename to... (mips_function_value_1): ... this. Make static. Handle receiving the function type in 'fn_decl_or_type' argument. (mips_function_value, mips_libcall_value, mips_function_value_regno_p): New function. (TARGET_FUNCTION_VALUE, TARGET_LIBCALL_VALUE, TARGET_FUNCTION_VALUE_REGNO_P): Define. Index: gcc/config/mips/mips-protos.h === --- gcc/config/mips/mips-protos.h (revision 171367) +++ gcc/config/mips/mips-protos.h (working copy) @@ -277,7 +277,6 @@ extern void mips_expand_before_return (void); extern void mips_expand_epilogue (bool); extern bool mips_can_use_return_insn (void); -extern rtx mips_function_value (const_tree, const_tree, enum machine_mode); extern bool mips_cannot_change_mode_class (enum machine_mode, enum machine_mode, enum reg_class); Index: gcc/config/mips/mips.c === --- gcc/config/mips/mips.c (revision 171367) +++ gcc/config/mips/mips.c (working copy) @@ -5247,18 +5247,25 @@ } -/* Implement FUNCTION_VALUE and LIBCALL_VALUE. For normal calls, - VALTYPE is the return type and MODE is VOIDmode. For libcalls, - VALTYPE is null and MODE is the mode of the return value. */ +/* Implement TARGET_FUNCTION_VALUE and TARGET_LIBCALL_VALUE. + For normal calls, VALTYPE is the return type and MODE is VOIDmode. + For libcalls, VALTYPE is null and MODE is the mode of the return value. */ -rtx -mips_function_value (const_tree valtype, const_tree func, enum machine_mode mode) +static rtx +mips_function_value_1 (const_tree valtype, const_tree fn_decl_or_type, + enum machine_mode mode) { if (valtype) { tree fields[2]; int unsigned_p; + const_tree func; + if (fn_decl_or_type DECL_P (fn_decl_or_type)) + func = fn_decl_or_type; + else + func = NULL; + mode = TYPE_MODE (valtype); unsigned_p = TYPE_UNSIGNED (valtype); @@ -5324,6 +5331,41 @@ return gen_rtx_REG (mode, GP_RETURN); } +/* Implement TARGET_FUNCTION_VALUE. */ + +static rtx +mips_function_value (const_tree valtype, const_tree fn_decl_or_type, +bool outgoing ATTRIBUTE_UNUSED) +{ + return mips_function_value_1 (valtype, fn_decl_or_type, VOIDmode); +} + +/* Implement TARGET_LIBCALL_VALUE. */ + +static rtx +mips_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +{ + return mips_function_value_1 (NULL_TREE, NULL_TREE, mode); +} + +/* Implement TARGET_FUNCTION_VALUE_REGNO_P. + + On the MIPS, R2 R3 and F0 F2 are the only register thus used. + Currently, R2 and F0 are only implemented here (C has no complex type) */ + +static bool +mips_function_value_regno_p (const unsigned int regno) +{ + if (regno == GP_RETURN + || regno == FP_RETURN + || (LONG_DOUBLE_TYPE_SIZE == 128 + FP_RETURN != GP_RETURN + regno == FP_RETURN + 2)) +return true; + + return false; +} + /* Implement TARGET_RETURN_IN_MEMORY. Under the o32 and o64 ABIs, all BLKmode objects are returned in memory. Under the n32, n64 and embedded ABIs, small structures are returned in a register. @@ -16521,6 +16563,12 @@ #undef TARGET_PROMOTE_PROTOTYPES #define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true +#undef TARGET_FUNCTION_VALUE +#define TARGET_FUNCTION_VALUE mips_function_value +#undef TARGET_LIBCALL_VALUE +#define TARGET_LIBCALL_VALUE mips_libcall_value +#undef TARGET_FUNCTION_VALUE_REGNO_P +#define TARGET_FUNCTION_VALUE_REGNO_P mips_function_value_regno_p #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY mips_return_in_memory #undef TARGET_RETURN_IN_MSB Index: gcc/config/mips/mips.h === --- gcc/config/mips/mips.h (revision 171367) +++ gcc/config/mips/mips.h (working copy) @@ -2150,20 +2150,6 @@ #define FP_ARG_FIRST (FP_REG_FIRST + 12) #define FP_ARG_LAST (FP_ARG_FIRST + MAX_ARGS_IN_REGISTERS - 1) -#define LIBCALL_VALUE(MODE) \ - mips_function_value (NULL_TREE, NULL_TREE, MODE) - -#define FUNCTION_VALUE(VALTYPE, FUNC) \ - mips_function_value (VALTYPE, FUNC, VOIDmode) - -/* 1 if N is a possible register number for a function value. - On the MIPS, R2 R3 and
[h8300] Hookize FUNCTION_VALUE, LIBCALL_VALUE and FUNCTION_VALUE_REGNO_P
Hello. This patch removes obsolete FUNCTION_VALUE, LIBCALL_VALUE and FUNCTION_VALUE_REGNO_P macros from H8300 back end in the GCC and introduces equivalent TARGET_FUNCTION_VALUE, TARGET_LIBCALL_VALUE and TARGET_FUNCTION_VALUE_REGNO_P target hooks. Regression tested on h8300-unknown-elf with no new failure. OK to install? * config/h8300/h8300.h (FUNCTION_VALUE_REGNO_P, FUNCTION_VALUE, LIBCALL_VALUE): Remove macros. * config/h8300/h8300.c (TARGET_FUNCTION_VALUE, TARGET_LIBCALL_VALUE, TARGET_FUNCTION_VALUE_REGNO_P): Define. (h8300_function_value, h8300_libcall_value, h8300_function_value_regno_p): New functions Index: gcc/config/h8300/h8300.c === --- gcc/config/h8300/h8300.c(revision 171345) +++ gcc/config/h8300/h8300.c(working copy) @@ -5860,6 +5860,38 @@ set_optab_libfunc (umod_optab, HImode, __umodhi3); } +/* Worker function for TARGET_FUNCTION_VALUE. + + On the H8 the return value is in R0/R1. */ + +static rtx +h8300_function_value (const_tree ret_type, + const_tree fn_decl_or_type ATTRIBUTE_UNUSED, + bool outgoing ATTRIBUTE_UNUSED) +{ + return gen_rtx_REG (TYPE_MODE (ret_type), R0_REG); +} + +/* Worker function for TARGET_LIBCALL_VALUE. + + On the H8 the return value is in R0/R1. */ + +static rtx +h8300_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +{ + return gen_rtx_REG (mode, R0_REG); +} + +/* Worker function for TARGET_FUNCTION_VALUE_REGNO_P. + + On the H8, R0 is the only register thus used. */ + +static bool +h8300_function_value_regno_p (const unsigned int regno) +{ + return (regno == R0_REG); +} + /* Worker function for TARGET_RETURN_IN_MEMORY. */ static bool @@ -5946,6 +5978,15 @@ #undef TARGET_INIT_LIBFUNCS #define TARGET_INIT_LIBFUNCS h8300_init_libfuncs +#undef TARGET_FUNCTION_VALUE +#define TARGET_FUNCTION_VALUE h8300_function_value + +#undef TARGET_LIBCALL_VALUE +#define TARGET_LIBCALL_VALUE h8300_libcall_value + +#undef TARGET_FUNCTION_VALUE_REGNO_P +#define TARGET_FUNCTION_VALUE_REGNO_P h8300_function_value_regno_p + #undef TARGET_RETURN_IN_MEMORY #define TARGET_RETURN_IN_MEMORY h8300_return_in_memory Index: gcc/config/h8300/h8300.h === --- gcc/config/h8300/h8300.h(revision 171345) +++ gcc/config/h8300/h8300.h(working copy) @@ -527,29 +527,6 @@ #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ ((OFFSET) = h8300_initial_elimination_offset ((FROM), (TO))) -/* Define how to find the value returned by a function. - VALTYPE is the data type of the value (as a tree). - If the precise function being called is known, FUNC is its FUNCTION_DECL; - otherwise, FUNC is 0. - - On the H8 the return value is in R0/R1. */ - -#define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx_REG (TYPE_MODE (VALTYPE), R0_REG) - -/* Define how to find the value returned by a library function - assuming the value has mode MODE. */ - -/* On the H8 the return value is in R0/R1. */ - -#define LIBCALL_VALUE(MODE) \ - gen_rtx_REG (MODE, R0_REG) - -/* 1 if N is a possible register number for a function value. - On the H8, R0 is the only register thus used. */ - -#define FUNCTION_VALUE_REGNO_P(N) ((N) == R0_REG) - /* Define this if PCC uses the nonreentrant convention for returning structure and union values. */ Anatoly.
[H8300] Remove ASM_OUTPUT_BSS
Hi. In config/h8300/h8300.h file both ASM_OUTPUT_BSS and ASM_OUTPUT_ALIGNED_BSS macros is defined, but the ASM_OUTPUT_BSS macro is not used when ASM_OUTPUT_ALIGNED_BSS is defined. This patch remove ASM_OUTPUT_BSS macro from H8300 target. Regression tested on h8300-unknown-elf with no new failure. OK to install? * config/h8300/h8300.h (ASM_OUTPUT_BSS): Remove macro. Index: gcc/config/h8300/h8300.h === --- gcc/config/h8300/h8300.h(revision 171427) +++ gcc/config/h8300/h8300.h(working copy) @@ -1015,13 +987,6 @@ assemble_name ((FILE), (NAME)), \ fprintf ((FILE), ,%lu\n, (unsigned long)(SIZE))) -/* This says how to output the assembler to define a global - uninitialized but not common symbol. - Try to use asm_output_bss to implement this macro. */ - -#define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED)\ - asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED)) - #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) Anatoly.
Re: Cleaning up expand optabs code
Hi. From: Richard Henderson r...@redhat.com Sent: Tuesday, March 22, 2011 8:48 PM Ok. Watch out for other target problems this week. This patch casue ICE on H8300 target: make[4]: Entering directory `/home/aesok/h83001/build/h8300-elf/h8300h/libgcc' # If this is the top-level multilib, build all the other # multilibs. /home/aesok/h83001/build/./gcc/xgcc -B/home/aesok/h83001/build/./gcc/ -nostdinc -B/home/aesok/h83001/build/h8300-elf/newlib/ -isystem /home/aesok/h83001/build/h 8300-elf/newlib/targ-include -isystem /home/aesok/h83001/combined/newlib/libc/in clude -B/home/aesok/cross-local/h8300-elf/h8300-elf/bin/ -B/home/aesok/cross-loc al/h8300-elf/h8300-elf/lib/ -isystem /home/aesok/cross-local/h8300-elf/h8300-elf /include -isystem /home/aesok/cross-local/h8300-elf/h8300-elf/sys-include -L/hom e/aesok/h83001/build/./ld-g -O2 -mh -O2 -g -O2 -DIN_GCC -DCROSS_DIRECTORY_S TRUCTURE -W -Wall -Wwrite-strings -Wcast-qual -Wstrict-prototypes -Wmissing-pro totypes -Wold-style-definition -isystem ./include -DDF=SF -g -DIN_LIBGCC2 -D_ _GCC_FLOAT_NOT_NEEDED -fno-stack-protector -Dinhibit_libc -I. -I. -I../../.././ gcc -I../../../../combined/libgcc -I../../../../combined/libgcc/. -I../../../../ combined/libgcc/../gcc -I../../../../combined/libgcc/../include -DHAVE_CC_TLS - DUSE_EMUTLS -o unwind-sjlj.o -MT unwind-sjlj.o -MD -MP -MF unwind-sjlj.dep -fexc eptions -c ../../../../combined/libgcc/../gcc/unwind-sjlj.c ../../../../combined/libgcc/../gcc/unwind-sjlj.c: In function 'uw_install_contex t.isra___1': ../../../../combined/libgcc/../gcc/unwind-sjlj.c:306:11: internal compiler error : in expand_jump_insn, at optabs.c:7181 Please submit a full bug report, with preprocessed source if appropriate. See http://gcc.gnu.org/bugs.html for instructions. make[4]: *** [unwind-sjlj.o] Error 1 make[4]: Leaving directory `/home/aesok/h83001/build/h8300-elf/h8300h/libgcc' make[3]: *** [multi-do] Error 1 make[3]: Leaving directory `/home/aesok/h83001/build/h8300-elf/libgcc' make[2]: *** [all-multi] Error 2 make[2]: Leaving directory `/home/aesok/h83001/build/h8300-elf/libgcc' make[1]: *** [all-target-libgcc] Error 2 make[1]: Leaving directory `/home/aesok/h83001/build' Anatoly.
[V850] Hookize OUTPUT_ADDR_CONST_EXTRA
Hello. This patch removes obsolete OUTPUT_ADDR_CONST_EXTRA macro from V850 back end in the GCC and introduces equivalent TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA target hook. Regression-tested on v850-unknown-elf. OK to install? * config/v850/v850.h (OUTPUT_ADDR_CONST_EXTRA): Remove. * config/v850/v850-protos.h (v850_output_addr_const_extra): Remove. * config/v850/v850.c (v850_output_addr_const_extra): Mace static. Change return type to bool. (TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA): Define. Index: gcc/config/v850/v850.c === --- gcc/config/v850/v850.c (revision 170852) +++ gcc/config/v850/v850.c (working copy) @@ -795,13 +795,13 @@ the truncate and just emit the difference of the two labels. The .hword directive will automatically handle the truncation for us. - Returns 1 if rtx was handled, 0 otherwise. */ + Returns true if rtx was handled, false otherwise. */ -int +static bool v850_output_addr_const_extra (FILE * file, rtx x) { if (GET_CODE (x) != TRUNCATE) -return 0; +return false; x = XEXP (x, 0); @@ -814,10 +814,10 @@ GET_CODE (XEXP (x, 0)) == LABEL_REF GET_CODE (XEXP (XEXP (x, 0), 0)) == CODE_LABEL INSN_DELETED_P (XEXP (XEXP (x, 0), 0))) -return 1; +return true; output_addr_const (file, x); - return 1; + return true; } /* Return appropriate code to load up a 1, 2, or 4 integer/floating @@ -3138,6 +3138,9 @@ #undef TARGET_PRINT_OPERAND_PUNCT_VALID_P #define TARGET_PRINT_OPERAND_PUNCT_VALID_P v850_print_operand_punct_valid_p +#undef TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA +#define TARGET_ASM_OUTPUT_ADDR_CONST_EXTRA v850_output_addr_const_extra + #undef TARGET_ATTRIBUTE_TABLE #define TARGET_ATTRIBUTE_TABLE v850_attribute_table Index: gcc/config/v850/v850.h === --- gcc/config/v850/v850.h (revision 170852) +++ gcc/config/v850/v850.h (working copy) @@ -748,10 +748,6 @@ #undef USER_LABEL_PREFIX #define USER_LABEL_PREFIX _ -#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \ - if (! v850_output_addr_const_extra (FILE, X)) \ - goto FAIL - /* This says how to output the assembler to define a global uninitialized but not common symbol. */ Index: gcc/config/v850/v850-protos.h === --- gcc/config/v850/v850-protos.h (revision 170852) +++ gcc/config/v850/v850-protos.h (working copy) @@ -33,7 +33,6 @@ extern void v850_init_expanders (void); #ifdef RTX_CODE -extern intv850_output_addr_const_extra (FILE *, rtx); extern rtxv850_return_addr (int); extern const char *output_move_single (rtx *); extern void notice_update_cc (rtx, rtx); Anatoly.