Re: [PATCH v4 1/2] LoongArch: Define ISA versions

[Yang Yujie]

v1 -> v2: 
- Fixed build issues of runtime libraries caused by the new header.
- Restored the default ARCH of lp64f/lp64s ABI to "abi-default".

v2 -> v3:
- Fixed libobjc build.
- Modify "LoongArch v1.1 features" to "LoongArch v1.1 instructions"
in invoke.texi.

v3 -> v4:
- Do not define __loongarch_version_* when LASX is enabled.
- Fixed the condition to define builtin macros for evolution features.

[PATCH v4 1/2] LoongArch: Define ISA versions

[Yang Yujie]

These ISA versions are defined as -march= parameters and
are recommended for building binaries for distribution.

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Make la64v1.0 the default ISA preset of the lp64d ABI.
* config/loongarch/genopts/loongarch-strings: Define la64v1.0, la64v1.1.
* config/loongarch/genopts/loongarch.opt.in: Likewise.
* config/loongarch/loongarch-c.cc (LARCH_CPP_SET_PROCESSOR): Likewise.
(loongarch_cpu_cpp_builtins): Likewise.
* config/loongarch/loongarch-cpu.cc (get_native_prid): Likewise.
(fill_native_cpu_config): Likewise.
* config/loongarch/loongarch-def.cc (array_tune): Likewise.
* config/loongarch/loongarch-def.h: Likewise.
* config/loongarch/loongarch-driver.cc (driver_set_m_parm): Likewise.
(driver_get_normalized_m_opts): Likewise.
* config/loongarch/loongarch-opts.cc (default_tune_for_arch): Likewise.
(TUNE_FOR_ARCH): Likewise.
(arch_str): Likewise.
(loongarch_target_option_override): Likewise.
* config/loongarch/loongarch-opts.h (TARGET_uARCH_LA464): Likewise.
(TARGET_uARCH_LA664): Likewise.
* config/loongarch/loongarch-str.h (STR_CPU_ABI_DEFAULT): Likewise.
(STR_ARCH_ABI_DEFAULT): Likewise.
(STR_TUNE_GENERIC): Likewise.
(STR_ARCH_LA64V1_0): Likewise.
(STR_ARCH_LA64V1_1): Likewise.
* config/loongarch/loongarch.cc 
(loongarch_cpu_sched_reassociation_width): Likewise.
(loongarch_asm_code_end): Likewise.
* config/loongarch/loongarch.opt: Likewise.
* doc/invoke.texi: Likewise.
---
 gcc/config.gcc| 34 
 .../loongarch/genopts/loongarch-strings   |  5 +-
 gcc/config/loongarch/genopts/loongarch.opt.in | 43 --
 gcc/config/loongarch/loongarch-c.cc   | 37 +++--
 gcc/config/loongarch/loongarch-cpu.cc | 35 
 gcc/config/loongarch/loongarch-def.cc | 83 +--
 gcc/config/loongarch/loongarch-def.h  | 37 ++---
 gcc/config/loongarch/loongarch-driver.cc  |  8 +-
 gcc/config/loongarch/loongarch-opts.cc| 66 +++
 gcc/config/loongarch/loongarch-opts.h |  4 +-
 gcc/config/loongarch/loongarch-str.h  |  5 +-
 gcc/config/loongarch/loongarch.cc | 11 +--
 gcc/config/loongarch/loongarch.opt| 43 --
 gcc/doc/invoke.texi   | 57 -
 14 files changed, 300 insertions(+), 168 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 5df3c52f8e9..929695c25ab 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -5072,7 +5072,7 @@ case "${target}" in
 
# Perform initial sanity checks on --with-* options.
case ${with_arch} in
-   "" | abi-default | loongarch64 | la[46]64) ;; # OK, append here.
+   "" | la64v1.[01] | abi-default | loongarch64 | la[46]64) ;; # 
OK, append here.
native)
if test x${host} != x${target}; then
echo "--with-arch=native is illegal for 
cross-compiler." 1>&2
@@ -5119,10 +5119,18 @@ case "${target}" in
 
# Infer ISA-related default options from the ABI: pass 1
case ${abi_base}/${abi_ext} in
-   lp64*/base)
+   lp64d/base)
# architectures that support lp64* ABI
-   arch_pattern="native|abi-default|loongarch64|la[46]64"
-   # default architecture for lp64* ABI
+   
arch_pattern="native|abi-default|la64v1.[01]|loongarch64|la[46]64"
+
+   # default architecture for lp64d ABI
+   arch_default="la64v1.0"
+   ;;
+   lp64[fs]/base)
+   # architectures that support lp64* ABI
+   
arch_pattern="native|abi-default|la64v1.[01]|loongarch64|la[46]64"
+
+   # default architecture for lp64[fs] ABI
arch_default="abi-default"
;;
*)
@@ -5194,15 +5202,7 @@ case "${target}" in
 
 
# Check default with_tune configuration using with_arch.
-   case ${with_arch} in
-   loongarch64)
-   tune_pattern="native|abi-default|loongarch64|la[46]64"
-   ;;
-   *)
-   # By default, $with_tune == $with_arch
-   tune_pattern="*"
-   ;;
-   esac
+   tune_pattern="native|generic|loongarch64|la[46]64"
 
case ${with_tune} in
"") ;; # OK
@@ -5252,7 +5252,7 @@ case "${target}" in
   

[PATCH v4 2/2] LoongArch: Define builtin macros for ISA evolutions

[Yang Yujie]

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Add loongarch-evolution.o.
* config/loongarch/genopts/genstr.sh: Enable generation of
loongarch-evolution.[cc,h].
* config/loongarch/t-loongarch: Likewise.
* config/loongarch/genopts/gen-evolution.awk: New file.
* config/loongarch/genopts/isa-evolution.in: Mark ISA version
of introduction for each ISA evolution feature.
* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
Define builtin macros for enabled ISA evolutions and the ISA
version.
* config/loongarch/loongarch-cpu.cc: Use loongarch-evolution.h.
* config/loongarch/loongarch.h: Likewise.
* config/loongarch/loongarch-cpucfg-map.h: Delete.
* config/loongarch/loongarch-evolution.cc: New file.
* config/loongarch/loongarch-evolution.h: New file.
* config/loongarch/loongarch-opts.h (ISA_HAS_FRECIPE): Define.
(ISA_HAS_DIV32): Likewise.
(ISA_HAS_LAM_BH): Likewise.
(ISA_HAS_LAMCAS): Likewise.
(ISA_HAS_LD_SEQ_SA): Likewise.
---
 gcc/config.gcc|   2 +-
 .../loongarch/genopts/gen-evolution.awk   | 230 ++
 gcc/config/loongarch/genopts/genstr.sh|  82 ++-
 gcc/config/loongarch/genopts/isa-evolution.in |  10 +-
 gcc/config/loongarch/loongarch-c.cc   |  23 ++
 gcc/config/loongarch/loongarch-cpu.cc |   2 +-
 gcc/config/loongarch/loongarch-evolution.cc   |  60 +
 ...rch-cpucfg-map.h => loongarch-evolution.h} |  46 +++-
 gcc/config/loongarch/loongarch-opts.h |  11 -
 gcc/config/loongarch/loongarch.h  |   1 +
 gcc/config/loongarch/t-loongarch  |  26 +-
 11 files changed, 398 insertions(+), 95 deletions(-)
 create mode 100644 gcc/config/loongarch/genopts/gen-evolution.awk
 create mode 100644 gcc/config/loongarch/loongarch-evolution.cc
 rename gcc/config/loongarch/{loongarch-cpucfg-map.h => loongarch-evolution.h} 
(52%)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 929695c25ab..3364fc27524 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -485,7 +485,7 @@ loongarch*-*-*)
cpu_type=loongarch
d_target_objs="loongarch-d.o"
extra_headers="larchintrin.h lsxintrin.h lasxintrin.h"
-   extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o 
loongarch-opts.o loongarch-def.o"
+   extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o 
loongarch-opts.o loongarch-def.o loongarch-evolution.o"
extra_gcc_objs="loongarch-driver.o loongarch-cpu.o loongarch-opts.o 
loongarch-def.o"
extra_options="${extra_options} g.opt fused-madd.opt"
;;
diff --git a/gcc/config/loongarch/genopts/gen-evolution.awk 
b/gcc/config/loongarch/genopts/gen-evolution.awk
new file mode 100644
index 000..4d105afa906
--- /dev/null
+++ b/gcc/config/loongarch/genopts/gen-evolution.awk
@@ -0,0 +1,230 @@
+#!/usr/bin/gawk
+#
+# A simple script that generates loongarch-evolution.h
+# from genopts/isa-evolution.in
+#
+# Copyright (C) 2021-2024 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3, or (at your option) any later
+# version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# .
+
+BEGIN {
+# isa_version_major[]
+# isa_version_minor[]
+# cpucfg_word[]
+# cpucfg_bit_in_word[]
+# name_capitalized[]
+# comment[]
+}
+
+{
+cpucfg_word[NR] = $1
+cpucfg_bit_in_word[NR] = $2
+name[NR] = gensub(/-/, "_", "g", $3)
+name_capitalized[NR] = toupper(name[NR])
+isa_version_major[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\1", 1, $4)
+isa_version_minor[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\2", 1, $4)
+
+$1 = $2 = $3 = $4 = ""
+sub (/^\s*/, "")
+comment[NR] = $0
+}
+
+function copyright_header(from_year,to_year)
+{
+print "   Copyright (C) " from_year "-" to_year \
+  " Free Software Foundation, Inc."
+print ""
+print "This file is part of GCC."
+print ""
+print "GCC is free software; you can redistribute it and/or modify"
+print "it under the terms of the GNU General Public License as published 
by"
+print "the Free Software Foundation; either version 3, or (at your option)"
+print "any later version."
+print ""
+print "GCC 

Re: [PATCH v3 1/2] LoongArch: Define ISA versions

[Yang Yujie]

v1 -> v2: 
- Fixed build issues of runtime libraries caused by the new header.
- Restored the default ARCH of lp64f/lp64s ABI to "abi-default".

v2 -> v3:
- Fixed libobjc build.
- Modify "LoongArch v1.1 features" to "LoongArch v1.1 instructions"
in invoke.texi.

[PATCH v3 2/2] LoongArch: Define builtin macros for ISA evolutions

[Yang Yujie]

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Add loongarch-evolution.o.
* config/loongarch/genopts/genstr.sh: Enable generation of
loongarch-evolution.[cc,h].
* config/loongarch/t-loongarch: Likewise.
* config/loongarch/genopts/gen-evolution.awk: New file.
* config/loongarch/genopts/isa-evolution.in: Mark ISA version
of introduction for each ISA evolution feature.
* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
Define builtin macros for enabled ISA evolutions and the ISA
version.
* config/loongarch/loongarch-cpu.cc: Use loongarch-evolution.h.
* config/loongarch/loongarch.h: Likewise.
* config/loongarch/loongarch-cpucfg-map.h: Delete.
* config/loongarch/loongarch-evolution.cc: New file.
* config/loongarch/loongarch-evolution.h: New file.
* config/loongarch/loongarch-opts.h (ISA_HAS_FRECIPE): Define.
(ISA_HAS_DIV32): Likewise.
(ISA_HAS_LAM_BH): Likewise.
(ISA_HAS_LAMCAS): Likewise.
(ISA_HAS_LD_SEQ_SA): Likewise.
---
 gcc/config.gcc|   2 +-
 .../loongarch/genopts/gen-evolution.awk   | 230 ++
 gcc/config/loongarch/genopts/genstr.sh|  82 ++-
 gcc/config/loongarch/genopts/isa-evolution.in |  10 +-
 gcc/config/loongarch/loongarch-c.cc   |  20 ++
 gcc/config/loongarch/loongarch-cpu.cc |   2 +-
 gcc/config/loongarch/loongarch-evolution.cc   |  60 +
 ...rch-cpucfg-map.h => loongarch-evolution.h} |  46 +++-
 gcc/config/loongarch/loongarch-opts.h |  11 -
 gcc/config/loongarch/loongarch.h  |   1 +
 gcc/config/loongarch/t-loongarch  |  26 +-
 11 files changed, 395 insertions(+), 95 deletions(-)
 create mode 100644 gcc/config/loongarch/genopts/gen-evolution.awk
 create mode 100644 gcc/config/loongarch/loongarch-evolution.cc
 rename gcc/config/loongarch/{loongarch-cpucfg-map.h => loongarch-evolution.h} 
(52%)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 929695c25ab..3364fc27524 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -485,7 +485,7 @@ loongarch*-*-*)
cpu_type=loongarch
d_target_objs="loongarch-d.o"
extra_headers="larchintrin.h lsxintrin.h lasxintrin.h"
-   extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o 
loongarch-opts.o loongarch-def.o"
+   extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o 
loongarch-opts.o loongarch-def.o loongarch-evolution.o"
extra_gcc_objs="loongarch-driver.o loongarch-cpu.o loongarch-opts.o 
loongarch-def.o"
extra_options="${extra_options} g.opt fused-madd.opt"
;;
diff --git a/gcc/config/loongarch/genopts/gen-evolution.awk 
b/gcc/config/loongarch/genopts/gen-evolution.awk
new file mode 100644
index 000..4d105afa906
--- /dev/null
+++ b/gcc/config/loongarch/genopts/gen-evolution.awk
@@ -0,0 +1,230 @@
+#!/usr/bin/gawk
+#
+# A simple script that generates loongarch-evolution.h
+# from genopts/isa-evolution.in
+#
+# Copyright (C) 2021-2024 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3, or (at your option) any later
+# version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# .
+
+BEGIN {
+# isa_version_major[]
+# isa_version_minor[]
+# cpucfg_word[]
+# cpucfg_bit_in_word[]
+# name_capitalized[]
+# comment[]
+}
+
+{
+cpucfg_word[NR] = $1
+cpucfg_bit_in_word[NR] = $2
+name[NR] = gensub(/-/, "_", "g", $3)
+name_capitalized[NR] = toupper(name[NR])
+isa_version_major[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\1", 1, $4)
+isa_version_minor[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\2", 1, $4)
+
+$1 = $2 = $3 = $4 = ""
+sub (/^\s*/, "")
+comment[NR] = $0
+}
+
+function copyright_header(from_year,to_year)
+{
+print "   Copyright (C) " from_year "-" to_year \
+  " Free Software Foundation, Inc."
+print ""
+print "This file is part of GCC."
+print ""
+print "GCC is free software; you can redistribute it and/or modify"
+print "it under the terms of the GNU General Public License as published 
by"
+print "the Free Software Foundation; either version 3, or (at your option)"
+print "any later version."
+print ""
+print "GCC 

[PATCH v3 1/2] LoongArch: Define ISA versions

[Yang Yujie]

These ISA versions are defined as -march= parameters and
are recommended for building binaries for distribution.

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Make la64v1.0 the default ISA preset of the lp64d ABI.
* config/loongarch/genopts/loongarch-strings: Define la64v1.0, la64v1.1.
* config/loongarch/genopts/loongarch.opt.in: Likewise.
* config/loongarch/loongarch-c.cc (LARCH_CPP_SET_PROCESSOR): Likewise.
(loongarch_cpu_cpp_builtins): Likewise.
* config/loongarch/loongarch-cpu.cc (get_native_prid): Likewise.
(fill_native_cpu_config): Likewise.
* config/loongarch/loongarch-def.cc (array_tune): Likewise.
* config/loongarch/loongarch-def.h: Likewise.
* config/loongarch/loongarch-driver.cc (driver_set_m_parm): Likewise.
(driver_get_normalized_m_opts): Likewise.
* config/loongarch/loongarch-opts.cc (default_tune_for_arch): Likewise.
(TUNE_FOR_ARCH): Likewise.
(arch_str): Likewise.
(loongarch_target_option_override): Likewise.
* config/loongarch/loongarch-opts.h (TARGET_uARCH_LA464): Likewise.
(TARGET_uARCH_LA664): Likewise.
* config/loongarch/loongarch-str.h (STR_CPU_ABI_DEFAULT): Likewise.
(STR_ARCH_ABI_DEFAULT): Likewise.
(STR_TUNE_GENERIC): Likewise.
(STR_ARCH_LA64V1_0): Likewise.
(STR_ARCH_LA64V1_1): Likewise.
* config/loongarch/loongarch.cc 
(loongarch_cpu_sched_reassociation_width): Likewise.
(loongarch_asm_code_end): Likewise.
* config/loongarch/loongarch.opt: Likewise.
* doc/invoke.texi: Likewise.
---
 gcc/config.gcc| 34 
 .../loongarch/genopts/loongarch-strings   |  5 +-
 gcc/config/loongarch/genopts/loongarch.opt.in | 43 --
 gcc/config/loongarch/loongarch-c.cc   | 37 +++--
 gcc/config/loongarch/loongarch-cpu.cc | 35 
 gcc/config/loongarch/loongarch-def.cc | 83 +--
 gcc/config/loongarch/loongarch-def.h  | 37 ++---
 gcc/config/loongarch/loongarch-driver.cc  |  8 +-
 gcc/config/loongarch/loongarch-opts.cc| 66 +++
 gcc/config/loongarch/loongarch-opts.h |  4 +-
 gcc/config/loongarch/loongarch-str.h  |  5 +-
 gcc/config/loongarch/loongarch.cc | 11 +--
 gcc/config/loongarch/loongarch.opt| 43 --
 gcc/doc/invoke.texi   | 57 -
 14 files changed, 300 insertions(+), 168 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 5df3c52f8e9..929695c25ab 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -5072,7 +5072,7 @@ case "${target}" in
 
# Perform initial sanity checks on --with-* options.
case ${with_arch} in
-   "" | abi-default | loongarch64 | la[46]64) ;; # OK, append here.
+   "" | la64v1.[01] | abi-default | loongarch64 | la[46]64) ;; # 
OK, append here.
native)
if test x${host} != x${target}; then
echo "--with-arch=native is illegal for 
cross-compiler." 1>&2
@@ -5119,10 +5119,18 @@ case "${target}" in
 
# Infer ISA-related default options from the ABI: pass 1
case ${abi_base}/${abi_ext} in
-   lp64*/base)
+   lp64d/base)
# architectures that support lp64* ABI
-   arch_pattern="native|abi-default|loongarch64|la[46]64"
-   # default architecture for lp64* ABI
+   
arch_pattern="native|abi-default|la64v1.[01]|loongarch64|la[46]64"
+
+   # default architecture for lp64d ABI
+   arch_default="la64v1.0"
+   ;;
+   lp64[fs]/base)
+   # architectures that support lp64* ABI
+   
arch_pattern="native|abi-default|la64v1.[01]|loongarch64|la[46]64"
+
+   # default architecture for lp64[fs] ABI
arch_default="abi-default"
;;
*)
@@ -5194,15 +5202,7 @@ case "${target}" in
 
 
# Check default with_tune configuration using with_arch.
-   case ${with_arch} in
-   loongarch64)
-   tune_pattern="native|abi-default|loongarch64|la[46]64"
-   ;;
-   *)
-   # By default, $with_tune == $with_arch
-   tune_pattern="*"
-   ;;
-   esac
+   tune_pattern="native|generic|loongarch64|la[46]64"
 
case ${with_tune} in
"") ;; # OK
@@ -5252,7 +5252,7 @@ case "${target}" in
   

Re: [PATCH v2 1/2] LoongArch: Define ISA versions

[Yang Yujie]

v1 -> v2: 
- Fixed build issues of runtime libraries caused by the new header.
- Restored the default ARCH of lp64f/lp64s ABI to "abi-default".

[PATCH v2 2/2] LoongArch: Define builtin macros for ISA evolutions

[Yang Yujie]

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Add loongarch-evolution.o.
* config/loongarch/genopts/genstr.sh: Enable generation of
loongarch-evolution.[cc,h].
* config/loongarch/t-loongarch: Likewise.
* config/loongarch/genopts/gen-evolution.awk: New file.
* config/loongarch/genopts/isa-evolution.in: Mark ISA version
of introduction for each ISA evolution feature.
* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
Define builtin macros for enabled ISA evolutions and the ISA
version.
* config/loongarch/loongarch-cpu.cc: Use loongarch-evolution.h.
* config/loongarch/loongarch.h: Likewise.
* config/loongarch/loongarch-cpucfg-map.h: Delete.
* config/loongarch/loongarch-evolution.cc: New file.
* config/loongarch/loongarch-evolution.h: New file.
* config/loongarch/loongarch-opts.h (ISA_HAS_FRECIPE): Define.
(ISA_HAS_DIV32): Likewise.
(ISA_HAS_LAM_BH): Likewise.
(ISA_HAS_LAMCAS): Likewise.
(ISA_HAS_LD_SEQ_SA): Likewise.
---
 gcc/config.gcc|   2 +-
 .../loongarch/genopts/gen-evolution.awk   | 232 ++
 gcc/config/loongarch/genopts/genstr.sh|  82 ++-
 gcc/config/loongarch/genopts/isa-evolution.in |  10 +-
 gcc/config/loongarch/loongarch-c.cc   |  20 ++
 gcc/config/loongarch/loongarch-cpu.cc |   2 +-
 ...ch-cpucfg-map.h => loongarch-evolution.cc} |  57 +++--
 gcc/config/loongarch/loongarch-evolution.h|  91 +++
 gcc/config/loongarch/loongarch-opts.h |  11 -
 gcc/config/loongarch/loongarch.h  |   1 +
 gcc/config/loongarch/t-loongarch  |  26 +-
 11 files changed, 418 insertions(+), 116 deletions(-)
 create mode 100644 gcc/config/loongarch/genopts/gen-evolution.awk
 rename gcc/config/loongarch/{loongarch-cpucfg-map.h => loongarch-evolution.cc} 
(52%)
 create mode 100644 gcc/config/loongarch/loongarch-evolution.h

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 929695c25ab..3364fc27524 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -485,7 +485,7 @@ loongarch*-*-*)
cpu_type=loongarch
d_target_objs="loongarch-d.o"
extra_headers="larchintrin.h lsxintrin.h lasxintrin.h"
-   extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o 
loongarch-opts.o loongarch-def.o"
+   extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o 
loongarch-opts.o loongarch-def.o loongarch-evolution.o"
extra_gcc_objs="loongarch-driver.o loongarch-cpu.o loongarch-opts.o 
loongarch-def.o"
extra_options="${extra_options} g.opt fused-madd.opt"
;;
diff --git a/gcc/config/loongarch/genopts/gen-evolution.awk 
b/gcc/config/loongarch/genopts/gen-evolution.awk
new file mode 100644
index 000..27c3d73be8e
--- /dev/null
+++ b/gcc/config/loongarch/genopts/gen-evolution.awk
@@ -0,0 +1,232 @@
+#!/usr/bin/gawk
+#
+# A simple script that generates loongarch-evolution.h
+# from genopts/isa-evolution.in
+#
+# Copyright (C) 2021-2024 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3, or (at your option) any later
+# version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# .
+
+BEGIN {
+# isa_version_major[]
+# isa_version_minor[]
+# cpucfg_word[]
+# cpucfg_bit_in_word[]
+# name_capitalized[]
+# comment[]
+}
+
+{
+cpucfg_word[NR] = $1
+cpucfg_bit_in_word[NR] = $2
+name[NR] = gensub(/-/, "_", "g", $3)
+name_capitalized[NR] = toupper(name[NR])
+isa_version_major[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\1", 1, $4)
+isa_version_minor[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\2", 1, $4)
+
+$1 = $2 = $3 = $4 = ""
+sub (/^\s*/, "")
+comment[NR] = $0
+}
+
+function copyright_header(from_year,to_year)
+{
+print "   Copyright (C) " from_year "-" to_year \
+  " Free Software Foundation, Inc."
+print ""
+print "This file is part of GCC."
+print ""
+print "GCC is free software; you can redistribute it and/or modify"
+print "it under the terms of the GNU General Public License as published 
by"
+print "the Free Software Foundation; either version 3, or (at your option)"
+print "any later version."
+print ""
+print 

[PATCH v2 1/2] LoongArch: Define ISA versions

[Yang Yujie]

These ISA versions are defined as -march= parameters and
are recommended for building binaries for distribution.

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Make la64v1.0 the default ISA preset of the lp64d ABI.
* config/loongarch/genopts/loongarch-strings: Define la64v1.0, la64v1.1.
* config/loongarch/genopts/loongarch.opt.in: Likewise.
* config/loongarch/loongarch-c.cc (LARCH_CPP_SET_PROCESSOR): Likewise.
(loongarch_cpu_cpp_builtins): Likewise.
* config/loongarch/loongarch-cpu.cc (get_native_prid): Likewise.
(fill_native_cpu_config): Likewise.
* config/loongarch/loongarch-def.cc (array_tune): Likewise.
* config/loongarch/loongarch-def.h: Likewise.
* config/loongarch/loongarch-driver.cc (driver_set_m_parm): Likewise.
(driver_get_normalized_m_opts): Likewise.
* config/loongarch/loongarch-opts.cc (default_tune_for_arch): Likewise.
(TUNE_FOR_ARCH): Likewise.
(arch_str): Likewise.
(loongarch_target_option_override): Likewise.
* config/loongarch/loongarch-opts.h (TARGET_uARCH_LA464): Likewise.
(TARGET_uARCH_LA664): Likewise.
* config/loongarch/loongarch-str.h (STR_CPU_ABI_DEFAULT): Likewise.
(STR_ARCH_ABI_DEFAULT): Likewise.
(STR_TUNE_GENERIC): Likewise.
(STR_ARCH_LA64V1_0): Likewise.
(STR_ARCH_LA64V1_1): Likewise.
* config/loongarch/loongarch.cc 
(loongarch_cpu_sched_reassociation_width): Likewise.
(loongarch_asm_code_end): Likewise.
* config/loongarch/loongarch.opt: Likewise.
* doc/invoke.texi: Likewise.
---
 gcc/config.gcc| 34 
 .../loongarch/genopts/loongarch-strings   |  5 +-
 gcc/config/loongarch/genopts/loongarch.opt.in | 43 --
 gcc/config/loongarch/loongarch-c.cc   | 37 +++--
 gcc/config/loongarch/loongarch-cpu.cc | 35 
 gcc/config/loongarch/loongarch-def.cc | 83 +--
 gcc/config/loongarch/loongarch-def.h  | 37 ++---
 gcc/config/loongarch/loongarch-driver.cc  |  8 +-
 gcc/config/loongarch/loongarch-opts.cc| 66 +++
 gcc/config/loongarch/loongarch-opts.h |  4 +-
 gcc/config/loongarch/loongarch-str.h  |  5 +-
 gcc/config/loongarch/loongarch.cc | 11 +--
 gcc/config/loongarch/loongarch.opt| 43 --
 gcc/doc/invoke.texi   | 56 -
 14 files changed, 299 insertions(+), 168 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 5df3c52f8e9..929695c25ab 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -5072,7 +5072,7 @@ case "${target}" in
 
# Perform initial sanity checks on --with-* options.
case ${with_arch} in
-   "" | abi-default | loongarch64 | la[46]64) ;; # OK, append here.
+   "" | la64v1.[01] | abi-default | loongarch64 | la[46]64) ;; # 
OK, append here.
native)
if test x${host} != x${target}; then
echo "--with-arch=native is illegal for 
cross-compiler." 1>&2
@@ -5119,10 +5119,18 @@ case "${target}" in
 
# Infer ISA-related default options from the ABI: pass 1
case ${abi_base}/${abi_ext} in
-   lp64*/base)
+   lp64d/base)
# architectures that support lp64* ABI
-   arch_pattern="native|abi-default|loongarch64|la[46]64"
-   # default architecture for lp64* ABI
+   
arch_pattern="native|abi-default|la64v1.[01]|loongarch64|la[46]64"
+
+   # default architecture for lp64d ABI
+   arch_default="la64v1.0"
+   ;;
+   lp64[fs]/base)
+   # architectures that support lp64* ABI
+   
arch_pattern="native|abi-default|la64v1.[01]|loongarch64|la[46]64"
+
+   # default architecture for lp64[fs] ABI
arch_default="abi-default"
;;
*)
@@ -5194,15 +5202,7 @@ case "${target}" in
 
 
# Check default with_tune configuration using with_arch.
-   case ${with_arch} in
-   loongarch64)
-   tune_pattern="native|abi-default|loongarch64|la[46]64"
-   ;;
-   *)
-   # By default, $with_tune == $with_arch
-   tune_pattern="*"
-   ;;
-   esac
+   tune_pattern="native|generic|loongarch64|la[46]64"
 
case ${with_tune} in
"") ;; # OK
@@ -5252,7 +5252,7 @@ case "${target}" in
   

Re: [PATCH 1/2] LoongArch: Define ISA versions

[Yang Yujie]

On Fri, Apr 19, 2024 at 07:34:33PM +0800, Xi Ruoyao wrote:
> On Fri, 2024-04-19 at 19:04 +0800, Yang Yujie wrote:
> > These ISA versions are defined as -march= parameters and
> > are recommended for building binaries for distribution.
> > 
> > Detailed description of these definitions can be found at
> > https://github.com/loongson/la-toolchain-conventions, which
> > the LoongArch GCC port aims to conform to.
> 
> The links seems broken.  Do you mean la-softdev-convention? 
> 
> -- 
> Xi Ruoyao 
> School of Aerospace Science and Technology, Xidian University

Yes, it's not accessible now, but we will publish that repository really soon.

It contains an updated version of the "LoongArch toolchain conventions"
document from the original (now archived) LoongArch-Documentations repo.

Yujie

[PATCH 1/2] LoongArch: Define ISA versions

[Yang Yujie]

These ISA versions are defined as -march= parameters and
are recommended for building binaries for distribution.

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Make la64v1.0 the default ISA preset of the lp64d ABI.
* config/loongarch/genopts/loongarch-strings: Define la64v1.0, la64v1.1.
* config/loongarch/genopts/loongarch.opt.in: Likewise.
* config/loongarch/loongarch-c.cc (LARCH_CPP_SET_PROCESSOR): Likewise.
(loongarch_cpu_cpp_builtins): Likewise.
* config/loongarch/loongarch-cpu.cc (get_native_prid): Likewise.
(fill_native_cpu_config): Likewise.
* config/loongarch/loongarch-def.cc (array_tune): Likewise.
* config/loongarch/loongarch-def.h: Likewise.
* config/loongarch/loongarch-driver.cc (driver_set_m_parm): Likewise.
(driver_get_normalized_m_opts): Likewise.
* config/loongarch/loongarch-opts.cc (default_tune_for_arch): Likewise.
(TUNE_FOR_ARCH): Likewise.
(arch_str): Likewise.
(loongarch_target_option_override): Likewise.
* config/loongarch/loongarch-opts.h (TARGET_uARCH_LA464): Likewise.
(TARGET_uARCH_LA664): Likewise.
* config/loongarch/loongarch-str.h (STR_CPU_ABI_DEFAULT): Likewise.
(STR_ARCH_ABI_DEFAULT): Likewise.
(STR_TUNE_GENERIC): Likewise.
(STR_ARCH_LA64V1_0): Likewise.
(STR_ARCH_LA64V1_1): Likewise.
* config/loongarch/loongarch.cc 
(loongarch_cpu_sched_reassociation_width): Likewise.
(loongarch_asm_code_end): Likewise.
* config/loongarch/loongarch.opt: Likewise.
* doc/invoke.texi: Likewise.
---
 gcc/config.gcc| 32 +++
 .../loongarch/genopts/loongarch-strings   |  5 +-
 gcc/config/loongarch/genopts/loongarch.opt.in | 43 --
 gcc/config/loongarch/loongarch-c.cc   | 37 +++--
 gcc/config/loongarch/loongarch-cpu.cc | 35 
 gcc/config/loongarch/loongarch-def.cc | 83 +--
 gcc/config/loongarch/loongarch-def.h  | 37 ++---
 gcc/config/loongarch/loongarch-driver.cc  |  8 +-
 gcc/config/loongarch/loongarch-opts.cc| 66 +++
 gcc/config/loongarch/loongarch-opts.h |  4 +-
 gcc/config/loongarch/loongarch-str.h  |  5 +-
 gcc/config/loongarch/loongarch.cc | 11 +--
 gcc/config/loongarch/loongarch.opt| 43 --
 gcc/doc/invoke.texi   | 56 -
 14 files changed, 298 insertions(+), 167 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 5df3c52f8e9..d1fdba38eed 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -5072,7 +5072,7 @@ case "${target}" in
 
# Perform initial sanity checks on --with-* options.
case ${with_arch} in
-   "" | abi-default | loongarch64 | la[46]64) ;; # OK, append here.
+   "" | la64v1.[01] | abi-default | loongarch64 | la[46]64) ;; # 
OK, append here.
native)
if test x${host} != x${target}; then
echo "--with-arch=native is illegal for 
cross-compiler." 1>&2
@@ -5121,8 +5121,16 @@ case "${target}" in
case ${abi_base}/${abi_ext} in
lp64*/base)
# architectures that support lp64* ABI
-   arch_pattern="native|abi-default|loongarch64|la[46]64"
-   # default architecture for lp64* ABI
+   
arch_pattern="native|abi-default|la64v1.[01]|loongarch64|la[46]64"
+
+   # default architecture for lp64d ABI
+   arch_default="la64v1.0"
+   ;;
+   lp64[fs]/base)
+   # architectures that support lp64* ABI
+   
arch_pattern="native|abi-default|la64v1.[01]|loongarch64|la[46]64"
+
+   # default architecture for lp64[fs] ABI
arch_default="abi-default"
;;
*)
@@ -5194,15 +5202,7 @@ case "${target}" in
 
 
# Check default with_tune configuration using with_arch.
-   case ${with_arch} in
-   loongarch64)
-   tune_pattern="native|abi-default|loongarch64|la[46]64"
-   ;;
-   *)
-   # By default, $with_tune == $with_arch
-   tune_pattern="*"
-   ;;
-   esac
+   tune_pattern="native|generic|loongarch64|la[46]64"
 
case ${with_tune} in
"") ;; # OK
@@ -5252,7 +5252,7 @@ case "${target}" in
# Fixed: use the default gcc 
configuration for all multilib
   

[PATCH 2/2] LoongArch: Define builtin macros for ISA evolutions

[Yang Yujie]

Detailed description of these definitions can be found at
https://github.com/loongson/la-toolchain-conventions, which
the LoongArch GCC port aims to conform to.

gcc/ChangeLog:

* config.gcc: Add loongarch-evolution.o.
* config/loongarch/genopts/genstr.sh: Enable generation of
loongarch-evolution.[cc,h].
* config/loongarch/t-loongarch: Likewise.
* config/loongarch/genopts/gen-evolution.awk: New file.
* config/loongarch/genopts/isa-evolution.in: Mark ISA version
of introduction for each ISA evolution feature.
* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
Define builtin macros for enabled ISA evolutions and the ISA
version.
* config/loongarch/loongarch-cpu.cc: Use loongarch-evolution.h.
* config/loongarch/loongarch.h: Likewise.
* config/loongarch/loongarch-cpucfg-map.h: Delete.
* config/loongarch/loongarch-evolution.cc: New file.
* config/loongarch/loongarch-evolution.h: New file.
* config/loongarch/loongarch-opts.h (ISA_HAS_FRECIPE): Define.
(ISA_HAS_DIV32): Likewise.
(ISA_HAS_LAM_BH): Likewise.
(ISA_HAS_LAMCAS): Likewise.
(ISA_HAS_LD_SEQ_SA): Likewise.
---
 gcc/config.gcc|   2 +-
 .../loongarch/genopts/gen-evolution.awk   | 224 ++
 gcc/config/loongarch/genopts/genstr.sh|  82 ++-
 gcc/config/loongarch/genopts/isa-evolution.in |  10 +-
 gcc/config/loongarch/loongarch-c.cc   |  20 ++
 gcc/config/loongarch/loongarch-cpu.cc |   2 +-
 gcc/config/loongarch/loongarch-evolution.cc   |  58 +
 ...rch-cpucfg-map.h => loongarch-evolution.h} |  42 +++-
 gcc/config/loongarch/loongarch-opts.h |  11 -
 gcc/config/loongarch/loongarch.h  |   1 +
 gcc/config/loongarch/t-loongarch  |  26 +-
 11 files changed, 383 insertions(+), 95 deletions(-)
 create mode 100644 gcc/config/loongarch/genopts/gen-evolution.awk
 create mode 100644 gcc/config/loongarch/loongarch-evolution.cc
 rename gcc/config/loongarch/{loongarch-cpucfg-map.h => loongarch-evolution.h} 
(54%)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index d1fdba38eed..36abe5dbc09 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -485,7 +485,7 @@ loongarch*-*-*)
cpu_type=loongarch
d_target_objs="loongarch-d.o"
extra_headers="larchintrin.h lsxintrin.h lasxintrin.h"
-   extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o 
loongarch-opts.o loongarch-def.o"
+   extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o 
loongarch-opts.o loongarch-def.o loongarch-evolution.o"
extra_gcc_objs="loongarch-driver.o loongarch-cpu.o loongarch-opts.o 
loongarch-def.o"
extra_options="${extra_options} g.opt fused-madd.opt"
;;
diff --git a/gcc/config/loongarch/genopts/gen-evolution.awk 
b/gcc/config/loongarch/genopts/gen-evolution.awk
new file mode 100644
index 000..26512834092
--- /dev/null
+++ b/gcc/config/loongarch/genopts/gen-evolution.awk
@@ -0,0 +1,224 @@
+#!/usr/bin/gawk
+#
+# A simple script that generates loongarch-evolution.h
+# from genopts/isa-evolution.in
+#
+# Copyright (C) 2021-2024 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it under
+# the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 3, or (at your option) any later
+# version.
+#
+# GCC is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+# License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3.  If not see
+# .
+
+BEGIN {
+# isa_version_major[]
+# isa_version_minor[]
+# cpucfg_word[]
+# cpucfg_bit_in_word[]
+# name_capitalized[]
+# comment[]
+}
+
+{
+cpucfg_word[NR] = $1
+cpucfg_bit_in_word[NR] = $2
+name[NR] = gensub(/-/, "_", "g", $3)
+name_capitalized[NR] = toupper(name[NR])
+isa_version_major[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\1", 1, $4)
+isa_version_minor[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\2", 1, $4)
+
+$1 = $2 = $3 = $4 = ""
+sub (/^\s*/, "")
+comment[NR] = $0
+}
+
+function copyright_header(from_year,to_year)
+{
+print "   Copyright (C) " from_year "-" to_year \
+  " Free Software Foundation, Inc."
+print ""
+print "This file is part of GCC."
+print ""
+print "GCC is free software; you can redistribute it and/or modify"
+print "it under the terms of the GNU General Public License as published 
by"
+print "the Free Software Foundation; either version 3, or (at your option)"
+print "any later version."
+print ""
+print "GCC 

Re: [PATCH v2] LoongArch: Enable switchable target

[Yang Yujie]

On Mon, Apr 08, 2024 at 04:49:58PM +0800, Xi Ruoyao wrote:
> On Mon, 2024-04-08 at 16:46 +0800, Yang Yujie wrote:
> > v1 -> v2:
> > Remove spaces from changelog.
> 
> I've rebuilt the base system with a GCC including this patch.  LTO+PGO
> bootstrap fine, regtested fine, and no issues observed.
> 
> I do usually include the optimization flags into LDFLAGS when I do LTO,
> so I don't really rely on this patch though.
> 
> -- 
> Xi Ruoyao 
> School of Aerospace Science and Technology, Xidian University

Thanks for the testing!

Respecting the options from compile time seems to be the convention though.
And it would be a natural consequence of implementing target attributes,
which is not here yet for LoongArch.

With this patch, we can have this build issue solved:
https://gitlab.freedesktop.org/pixman/pixman/-/merge_requests/83

Re: [PATCH v2] LoongArch: Enable switchable target

[Yang Yujie]

v1 -> v2:
Remove spaces from changelog.

[PATCH v2] LoongArch: Enable switchable target

[Yang Yujie]

This patch fixes the back-end context switching in cases where functions
should be built with their own target contexts instead of the
global one, such as LTO linking and functions with target attributes (TBD).

PR target/113233

gcc/ChangeLog:

* config/loongarch/loongarch.cc (loongarch_reg_init):
Reinitialize the loongarch_regno_mode_ok cache.
(loongarch_option_override): Same.
(loongarch_save_restore_target_globals): Restore target globals.
(loongarch_set_current_function): Restore the target contexts
for functions.
(TARGET_SET_CURRENT_FUNCTION): Define.
* config/loongarch/loongarch.h (SWITCHABLE_TARGET): Enable
switchable target context.
* config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
Initialize all builtin functions at startup.
(loongarch_expand_builtin): Turn assertion of builtin availability
into a test.

gcc/testsuite/ChangeLog:

* lib/target-supports.exp: Define condition loongarch_sx_as.
* gcc.dg/lto/pr113233_0.c: New test.
---
 gcc/config/loongarch/loongarch-builtins.cc | 25 +++---
 gcc/config/loongarch/loongarch.cc  | 91 --
 gcc/config/loongarch/loongarch.h   |  2 +
 gcc/testsuite/gcc.dg/lto/pr113233_0.c  | 14 
 gcc/testsuite/lib/target-supports.exp  | 12 +++
 5 files changed, 127 insertions(+), 17 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/lto/pr113233_0.c

diff --git a/gcc/config/loongarch/loongarch-builtins.cc 
b/gcc/config/loongarch/loongarch-builtins.cc
index efe7e5e5ebc..fbe46833c9b 100644
--- a/gcc/config/loongarch/loongarch-builtins.cc
+++ b/gcc/config/loongarch/loongarch-builtins.cc
@@ -2512,14 +2512,11 @@ loongarch_init_builtins (void)
   for (i = 0; i < ARRAY_SIZE (loongarch_builtins); i++)
 {
   d = _builtins[i];
-  if (d->avail ())
-   {
- type = loongarch_build_function_type (d->function_type);
- loongarch_builtin_decls[i]
-   = add_builtin_function (d->name, type, i, BUILT_IN_MD, NULL,
-   NULL);
- loongarch_get_builtin_decl_index[d->icode] = i;
-   }
+  type = loongarch_build_function_type (d->function_type);
+  loongarch_builtin_decls[i]
+   = add_builtin_function (d->name, type, i, BUILT_IN_MD, NULL,
+ NULL);
+  loongarch_get_builtin_decl_index[d->icode] = i;
 }
 }
 
@@ -3105,15 +3102,21 @@ loongarch_expand_builtin (tree exp, rtx target, rtx 
subtarget ATTRIBUTE_UNUSED,
  int ignore ATTRIBUTE_UNUSED)
 {
   tree fndecl;
-  unsigned int fcode, avail;
+  unsigned int fcode;
   const struct loongarch_builtin_description *d;
 
   fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
   fcode = DECL_MD_FUNCTION_CODE (fndecl);
   gcc_assert (fcode < ARRAY_SIZE (loongarch_builtins));
   d = _builtins[fcode];
-  avail = d->avail ();
-  gcc_assert (avail != 0);
+
+  if (!d->avail ())
+{
+  error_at (EXPR_LOCATION (exp),
+   "built-in function %qD is not enabled", fndecl);
+  return target;
+}
+
   switch (d->builtin_type)
 {
 case LARCH_BUILTIN_DIRECT:
diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index c90b701a533..6b92e7034c5 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7570,15 +7570,19 @@ loongarch_global_init (void)
loongarch_dwarf_regno[i] = INVALID_REGNUM;
 }
 
+  /* Function to allocate machine-dependent function status.  */
+  init_machine_status = _init_machine_status;
+};
+
+static void
+loongarch_reg_init (void)
+{
   /* Set up loongarch_hard_regno_mode_ok.  */
   for (int mode = 0; mode < MAX_MACHINE_MODE; mode++)
 for (int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
   loongarch_hard_regno_mode_ok_p[mode][regno]
= loongarch_hard_regno_mode_ok_uncached (regno, (machine_mode) mode);
-
-  /* Function to allocate machine-dependent function status.  */
-  init_machine_status = _init_machine_status;
-};
+}
 
 static void
 loongarch_option_override_internal (struct loongarch_target *target,
@@ -7605,20 +7609,92 @@ loongarch_option_override_internal (struct 
loongarch_target *target,
 
   /* Override some options according to the resolved target.  */
   loongarch_target_option_override (target, opts, opts_set);
+
+  target_option_default_node = target_option_current_node
+= build_target_option_node (opts, opts_set);
+
+  loongarch_reg_init ();
+}
+
+/* Remember the last target of loongarch_set_current_function.  */
+
+static GTY(()) tree loongarch_previous_fndecl;
+
+/* Restore or save the TREE_TARGET_GLOBALS from or to new_tree.
+   Used by loongarch_set_current_function to
+   make sure optab availability predicates are recomputed when necessary.  */
+
+static void
+loongarch_save_restore_target_globals (tree new_tree)
+{
+  if (TREE_TARGET_GLOBALS (new_tree))
+

Re: [PATCH] LoongArch: Enable switchable target

[Yang Yujie]

On Sun, Apr 07, 2024 at 08:56:53PM +0800, Xi Ruoyao wrote:
> On Sun, 2024-04-07 at 15:47 +0800, Yang Yujie wrote:
> > * config/loongarch/loongarch-builtins.cc
> > (loongarch_init_builtins):
> >     Initialize all builtin functions at startup.
> 
> git gcc-verify complains that tab should be used instead of space for
> this line.
> 
> > (loongarch_expand_builtin): Turn assertion of builtin
> > availability
> >     into a test.
> 
> and this line.
> 
> -- 
> Xi Ruoyao 
> School of Aerospace Science and Technology, Xidian University

Thanks! I will fix it soon.

Re: [PATCH] LoongArch: Enable switchable target

[Yang Yujie]

On Sun, Apr 07, 2024 at 04:23:53PM +0800, Xi Ruoyao wrote:
> On Sun, 2024-04-07 at 15:47 +0800, Yang Yujie wrote:
> > This patch fixes the back-end context switching in cases where functions
> > should be built with their own target contexts instead of the
> > global one, such as LTO linking and functions with target attributes (TBD).
> > 
> > PR target/113233
> 
> Oops, so this PR isn't fixed with r14-7134 "LoongArch: Implement option
> save/restore"?  Should I reopen it?
> 
> -- 
> Xi Ruoyao 
> School of Aerospace Science and Technology, Xidian University

Yes, the issue was not fixed with that patch. This one should do.

[PATCH] LoongArch: Enable switchable target

[Yang Yujie]

This patch fixes the back-end context switching in cases where functions
should be built with their own target contexts instead of the
global one, such as LTO linking and functions with target attributes (TBD).

PR target/113233

gcc/ChangeLog:

* config/loongarch/loongarch.cc (loongarch_reg_init):
Reinitialize the loongarch_regno_mode_ok cache.
(loongarch_option_override): Same.
(loongarch_save_restore_target_globals): Restore target globals.
(loongarch_set_current_function): Restore the target contexts
for functions.
(TARGET_SET_CURRENT_FUNCTION): Define.
* config/loongarch/loongarch.h (SWITCHABLE_TARGET): Enable
switchable target context.
* config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
Initialize all builtin functions at startup.
(loongarch_expand_builtin): Turn assertion of builtin availability
into a test.

gcc/testsuite/ChangeLog:

* lib/target-supports.exp: Define condition loongarch_sx_as.
* gcc.dg/lto/pr113233_0.c: New test.
---
 gcc/config/loongarch/loongarch-builtins.cc | 25 +++---
 gcc/config/loongarch/loongarch.cc  | 91 --
 gcc/config/loongarch/loongarch.h   |  2 +
 gcc/testsuite/gcc.dg/lto/pr113233_0.c  | 14 
 gcc/testsuite/lib/target-supports.exp  | 12 +++
 5 files changed, 127 insertions(+), 17 deletions(-)
 create mode 100644 gcc/testsuite/gcc.dg/lto/pr113233_0.c

diff --git a/gcc/config/loongarch/loongarch-builtins.cc 
b/gcc/config/loongarch/loongarch-builtins.cc
index efe7e5e5ebc..fbe46833c9b 100644
--- a/gcc/config/loongarch/loongarch-builtins.cc
+++ b/gcc/config/loongarch/loongarch-builtins.cc
@@ -2512,14 +2512,11 @@ loongarch_init_builtins (void)
   for (i = 0; i < ARRAY_SIZE (loongarch_builtins); i++)
 {
   d = _builtins[i];
-  if (d->avail ())
-   {
- type = loongarch_build_function_type (d->function_type);
- loongarch_builtin_decls[i]
-   = add_builtin_function (d->name, type, i, BUILT_IN_MD, NULL,
-   NULL);
- loongarch_get_builtin_decl_index[d->icode] = i;
-   }
+  type = loongarch_build_function_type (d->function_type);
+  loongarch_builtin_decls[i]
+   = add_builtin_function (d->name, type, i, BUILT_IN_MD, NULL,
+ NULL);
+  loongarch_get_builtin_decl_index[d->icode] = i;
 }
 }
 
@@ -3105,15 +3102,21 @@ loongarch_expand_builtin (tree exp, rtx target, rtx 
subtarget ATTRIBUTE_UNUSED,
  int ignore ATTRIBUTE_UNUSED)
 {
   tree fndecl;
-  unsigned int fcode, avail;
+  unsigned int fcode;
   const struct loongarch_builtin_description *d;
 
   fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0);
   fcode = DECL_MD_FUNCTION_CODE (fndecl);
   gcc_assert (fcode < ARRAY_SIZE (loongarch_builtins));
   d = _builtins[fcode];
-  avail = d->avail ();
-  gcc_assert (avail != 0);
+
+  if (!d->avail ())
+{
+  error_at (EXPR_LOCATION (exp),
+   "built-in function %qD is not enabled", fndecl);
+  return target;
+}
+
   switch (d->builtin_type)
 {
 case LARCH_BUILTIN_DIRECT:
diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index c90b701a533..6b92e7034c5 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7570,15 +7570,19 @@ loongarch_global_init (void)
loongarch_dwarf_regno[i] = INVALID_REGNUM;
 }
 
+  /* Function to allocate machine-dependent function status.  */
+  init_machine_status = _init_machine_status;
+};
+
+static void
+loongarch_reg_init (void)
+{
   /* Set up loongarch_hard_regno_mode_ok.  */
   for (int mode = 0; mode < MAX_MACHINE_MODE; mode++)
 for (int regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
   loongarch_hard_regno_mode_ok_p[mode][regno]
= loongarch_hard_regno_mode_ok_uncached (regno, (machine_mode) mode);
-
-  /* Function to allocate machine-dependent function status.  */
-  init_machine_status = _init_machine_status;
-};
+}
 
 static void
 loongarch_option_override_internal (struct loongarch_target *target,
@@ -7605,20 +7609,92 @@ loongarch_option_override_internal (struct 
loongarch_target *target,
 
   /* Override some options according to the resolved target.  */
   loongarch_target_option_override (target, opts, opts_set);
+
+  target_option_default_node = target_option_current_node
+= build_target_option_node (opts, opts_set);
+
+  loongarch_reg_init ();
+}
+
+/* Remember the last target of loongarch_set_current_function.  */
+
+static GTY(()) tree loongarch_previous_fndecl;
+
+/* Restore or save the TREE_TARGET_GLOBALS from or to new_tree.
+   Used by loongarch_set_current_function to
+   make sure optab availability predicates are recomputed when necessary.  */
+
+static void
+loongarch_save_restore_target_globals (tree new_tree)
+{
+  if (TREE_TARGET_GLOBALS (new_tree))
+

[PATCH] LoongArch: Fix missing plugin header

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/t-loongarch: Add loongarch-def-arrays.h
to OPTION_H_EXTRA.
---
 gcc/config/loongarch/t-loongarch | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/gcc/config/loongarch/t-loongarch b/gcc/config/loongarch/t-loongarch
index 3dd7c4b031e..acf5da95310 100644
--- a/gcc/config/loongarch/t-loongarch
+++ b/gcc/config/loongarch/t-loongarch
@@ -18,8 +18,9 @@
 
 
 GTM_H += loongarch-multilib.h
-OPTIONS_H_EXTRA += $(srcdir)/config/loongarch/loongarch-def.h  \
-  $(srcdir)/config/loongarch/loongarch-tune.h  \
+OPTIONS_H_EXTRA += $(srcdir)/config/loongarch/loongarch-def.h  \
+  $(srcdir)/config/loongarch/loongarch-def-array.h \
+  $(srcdir)/config/loongarch/loongarch-tune.h  \
   $(srcdir)/config/loongarch/loongarch-cpucfg-map.h
 
 # Canonical target triplet from config.gcc
-- 
2.44.0

[PATCH v4] LoongArch: Split loongarch_option_override_internal into smaller procedures

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as
aliases to -mrecip={all,none}, respectively.
* config/loongarch/loongarch.opt: Regenerate.
* config/loongarch/loongarch-def.h (ABI_FPU_64): Rename to...
(ABI_FPU64_P): ...this.
(ABI_FPU_32): Rename to...
(ABI_FPU32_P): ...this.
(ABI_FPU_NONE): Rename to...
(ABI_NOFPU_P): ...this.
(ABI_LP64_P): Define.
* config/loongarch/loongarch.cc (loongarch_init_print_operand_punct):
Merged into loongarch_global_init.
(loongarch_cpu_option_override): Renamed to
loongarch_target_option_override.
(loongarch_option_override_internal): Move the work after
loongarch_config_target into loongarch_target_option_override.
(loongarch_global_init): Define.
(INIT_TARGET_FLAG): Move to loongarch-opts.cc.
(loongarch_option_override): Call loongarch_global_init
separately.
* config/loongarch/loongarch-opts.cc (loongarch_parse_mrecip_scheme):
Split the parsing of -mrecip= from
loongarch_option_override_internal.
(loongarch_generate_mrecip_scheme): Define. Split from
loongarch_option_override_internal.
(loongarch_target_option_override): Define. Renamed from
loongarch_cpu_option_override.
(loongarch_init_misc_options): Define. Split from
loongarch_option_override_internal.
(INIT_TARGET_FLAG): Move from loongarch.cc.
* config/loongarch/loongarch-opts.h (loongarch_target_option_override):
New prototype.
(loongarch_parse_mrecip_scheme): New prototype.
(loongarch_init_misc_options): New prototype.
(TARGET_ABI_LP64): Simplify with ABI_LP64_P.
* config/loongarch/loongarch.h (TARGET_RECIP_DIV): Simplify.
Do not reference specific CPU architecture (LA664).
(TARGET_RECIP_SQRT): Same.
(TARGET_RECIP_RSQRT): Same.
(TARGET_RECIP_VEC_DIV): Same.
(TARGET_RECIP_VEC_SQRT): Same.
(TARGET_RECIP_VEC_RSQRT): Same.
---
 gcc/config/loongarch/genopts/loongarch.opt.in |   8 +-
 gcc/config/loongarch/loongarch-def.h  |  11 +-
 gcc/config/loongarch/loongarch-opts.cc| 253 ++
 gcc/config/loongarch/loongarch-opts.h |  27 +-
 gcc/config/loongarch/loongarch.cc | 253 +++---
 gcc/config/loongarch/loongarch.h  |  18 +-
 gcc/config/loongarch/loongarch.opt|   8 +-
 7 files changed, 342 insertions(+), 236 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index 02f918053f5..a77893d31d9 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -197,14 +197,14 @@ mexplicit-relocs
 Target Alias(mexplicit-relocs=, always, none)
 Use %reloc() assembly operators (for backward compatibility).
 
-mrecip
-Target RejectNegative Var(la_recip) Save
-Generate approximate reciprocal divide and square root for better throughput.
-
 mrecip=
 Target RejectNegative Joined Var(la_recip_name) Save
 Control generation of reciprocal estimates.
 
+mrecip
+Target Alias(mrecip=, all, none)
+Generate approximate reciprocal divide and square root for better throughput.
+
 ; The code model option names for -mcmodel.
 Enum
 Name(cmodel) Type(int)
diff --git a/gcc/config/loongarch/loongarch-def.h 
b/gcc/config/loongarch/loongarch-def.h
index 2dbf006d013..0cbf9476690 100644
--- a/gcc/config/loongarch/loongarch-def.h
+++ b/gcc/config/loongarch/loongarch-def.h
@@ -90,11 +90,16 @@ extern loongarch_def_array
 
 #define TO_LP64_ABI_BASE(C) (C)
 
-#define ABI_FPU_64(abi_base) \
+#define ABI_LP64_P(abi_base) \
+  (abi_base == ABI_BASE_LP64D \
+   || abi_base == ABI_BASE_LP64F \
+   || abi_base == ABI_BASE_LP64S)
+
+#define ABI_FPU64_P(abi_base) \
   (abi_base == ABI_BASE_LP64D)
-#define ABI_FPU_32(abi_base) \
+#define ABI_FPU32_P(abi_base) \
   (abi_base == ABI_BASE_LP64F)
-#define ABI_FPU_NONE(abi_base) \
+#define ABI_NOFPU_P(abi_base) \
   (abi_base == ABI_BASE_LP64S)
 
 
diff --git a/gcc/config/loongarch/loongarch-opts.cc 
b/gcc/config/loongarch/loongarch-opts.cc
index 627f9148adf..e600f08f03b 100644
--- a/gcc/config/loongarch/loongarch-opts.cc
+++ b/gcc/config/loongarch/loongarch-opts.cc
@@ -25,6 +25,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "coretypes.h"
 #include "tm.h"
 #include "obstack.h"
+#include "opts.h"
 #include "diagnostic-core.h"
 
 #include "loongarch-cpu.h"
@@ -32,8 +33,12 @@ along with GCC; see the file COPYING3.  If not see
 #include "loongarch-str.h"
 #include "loongarch-def.h"
 
+/* Target configuration */
 struct loongarch_target la_target;
 
+/* RTL cost information */
+const struct loongarch_rtx_cost_data *loongarch_cost;
+
 /* ABI-related configuration.  */
 #define ABI_COUNT (sizeof(abi_priority_list)/sizeof(struct loongarch_abi))
 static 

Re: [PATCH v4] LoongArch: Split loongarch_option_override_internal into smaller procedures

[Yang Yujie]

v1 -> v2:
- Rebased to master.
- Specifies "(void)" for the empty parameter list of loongarch_global_init.

v2 -> v3:
- Keep the original option-processing behavior (-march=la664 enables 
-mrecip=all)
  and fix the ICE when -mfrecipe is not passed with -mrecip.

v3 -> v4:
- Rewrite changelog.

[PATCH] LoongArch: Use /lib instead of /lib64 as the library search path for MUSL.

[Yang Yujie]

gcc/ChangeLog:

* config.gcc: Add a case for loongarch*-*-linux-musl*.
* config/loongarch/linux.h: Disable the multilib-compatible
treatment for *musl* targets.
* config/loongarch/musl.h: New file.
---
 gcc/config.gcc   |  3 +++
 gcc/config/loongarch/linux.h |  4 +++-
 gcc/config/loongarch/musl.h  | 23 +++
 3 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 gcc/config/loongarch/musl.h

diff --git a/gcc/config.gcc b/gcc/config.gcc
index a1480b72c46..3293be16699 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2538,6 +2538,9 @@ riscv*-*-freebsd*)
 
 loongarch*-*-linux*)
tm_file="elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h 
${tm_file}"
+case ${target} in
+ *-linux-musl*) tm_file="${tm_file} loongarch/musl.h"
+   esac
tm_file="${tm_file} loongarch/gnu-user.h loongarch/linux.h 
loongarch/loongarch-driver.h"
extra_options="${extra_options} linux-android.opt"
tmake_file="${tmake_file} loongarch/t-multilib loongarch/t-linux"
diff --git a/gcc/config/loongarch/linux.h b/gcc/config/loongarch/linux.h
index 17d9f87537b..40d9ba6d405 100644
--- a/gcc/config/loongarch/linux.h
+++ b/gcc/config/loongarch/linux.h
@@ -21,7 +21,9 @@ along with GCC; see the file COPYING3.  If not see
  * This ensures that a compiler configured with --disable-multilib
  * can work in a multilib environment.  */
 
-#if defined(LA_DISABLE_MULTILIB) && defined(LA_DISABLE_MULTIARCH)
+#if !defined(LA_DEFAULT_TARGET_MUSL) \
+  && defined(LA_DISABLE_MULTILIB) \
+  && defined(LA_DISABLE_MULTIARCH)
 
   #if DEFAULT_ABI_BASE == ABI_BASE_LP64D
 #define ABI_LIBDIR "lib64"
diff --git a/gcc/config/loongarch/musl.h b/gcc/config/loongarch/musl.h
new file mode 100644
index 000..fa43bc86606
--- /dev/null
+++ b/gcc/config/loongarch/musl.h
@@ -0,0 +1,23 @@
+/* Definitions for MUSL C library support.
+   Copyright (C) 2024 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+.  */
+
+
+#ifndef LA_DEFAULT_TARGET_MUSL
+#define LA_DEFAULT_TARGET_MUSL
+#endif
-- 
2.43.0

Re: [PATCH v3] LoongArch: Split loongarch_option_override_internal into smaller procedures

[Yang Yujie]

v1 -> v2:
- Rebased to master.
- Specifies "(void)" for the empty parameter list of loongarch_global_init.

v2 -> v3:
- Keep the original option-processing behavior (-march=la664 enables 
-mrecip=all)
  and fix the ICE when -mfrecipe is not passed with -mrecip.

[PATCH v3] LoongArch: Split loongarch_option_override_internal into smaller procedures

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as
aliases to -mrecip={all,none}.
* config/loongarch/loongarch.opt: Same.
* config/loongarch/loongarch-def.h: Modify ABI condition macros for
convenience.
* config/loongarch/loongarch-opts.cc: Define option-handling
procedures split from the original loongarch_option_override_internal.
* config/loongarch/loongarch-opts.h: Same.
* config/loongarch/loongarch.cc: Clean up
loongarch_option_override_internal.
---
 gcc/config/loongarch/genopts/loongarch.opt.in |   8 +-
 gcc/config/loongarch/loongarch-def.h  |  11 +-
 gcc/config/loongarch/loongarch-opts.cc| 253 ++
 gcc/config/loongarch/loongarch-opts.h |  27 +-
 gcc/config/loongarch/loongarch.cc | 253 +++---
 gcc/config/loongarch/loongarch.h  |  18 +-
 gcc/config/loongarch/loongarch.opt|   8 +-
 7 files changed, 342 insertions(+), 236 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index 02f918053f5..a77893d31d9 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -197,14 +197,14 @@ mexplicit-relocs
 Target Alias(mexplicit-relocs=, always, none)
 Use %reloc() assembly operators (for backward compatibility).
 
-mrecip
-Target RejectNegative Var(la_recip) Save
-Generate approximate reciprocal divide and square root for better throughput.
-
 mrecip=
 Target RejectNegative Joined Var(la_recip_name) Save
 Control generation of reciprocal estimates.
 
+mrecip
+Target Alias(mrecip=, all, none)
+Generate approximate reciprocal divide and square root for better throughput.
+
 ; The code model option names for -mcmodel.
 Enum
 Name(cmodel) Type(int)
diff --git a/gcc/config/loongarch/loongarch-def.h 
b/gcc/config/loongarch/loongarch-def.h
index 2dbf006d013..0cbf9476690 100644
--- a/gcc/config/loongarch/loongarch-def.h
+++ b/gcc/config/loongarch/loongarch-def.h
@@ -90,11 +90,16 @@ extern loongarch_def_array
 
 #define TO_LP64_ABI_BASE(C) (C)
 
-#define ABI_FPU_64(abi_base) \
+#define ABI_LP64_P(abi_base) \
+  (abi_base == ABI_BASE_LP64D \
+   || abi_base == ABI_BASE_LP64F \
+   || abi_base == ABI_BASE_LP64S)
+
+#define ABI_FPU64_P(abi_base) \
   (abi_base == ABI_BASE_LP64D)
-#define ABI_FPU_32(abi_base) \
+#define ABI_FPU32_P(abi_base) \
   (abi_base == ABI_BASE_LP64F)
-#define ABI_FPU_NONE(abi_base) \
+#define ABI_NOFPU_P(abi_base) \
   (abi_base == ABI_BASE_LP64S)
 
 
diff --git a/gcc/config/loongarch/loongarch-opts.cc 
b/gcc/config/loongarch/loongarch-opts.cc
index 7eeac43ed2f..e5f27b8716f 100644
--- a/gcc/config/loongarch/loongarch-opts.cc
+++ b/gcc/config/loongarch/loongarch-opts.cc
@@ -25,6 +25,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "coretypes.h"
 #include "tm.h"
 #include "obstack.h"
+#include "opts.h"
 #include "diagnostic-core.h"
 
 #include "loongarch-cpu.h"
@@ -32,8 +33,12 @@ along with GCC; see the file COPYING3.  If not see
 #include "loongarch-str.h"
 #include "loongarch-def.h"
 
+/* Target configuration */
 struct loongarch_target la_target;
 
+/* RTL cost information */
+const struct loongarch_rtx_cost_data *loongarch_cost;
+
 /* ABI-related configuration.  */
 #define ABI_COUNT (sizeof(abi_priority_list)/sizeof(struct loongarch_abi))
 static const struct loongarch_abi
@@ -795,3 +800,251 @@ loongarch_update_gcc_opt_status (struct loongarch_target 
*target,
   /* ISA evolution features */
   opts->x_la_isa_evolution = target->isa.evolution;
 }
+
+/* -mrecip= handling */
+static struct
+  {
+const char *string;/* option name.  */
+unsigned int mask; /* mask bits to set.  */
+  }
+const recip_options[] = {
+  { "all",   RECIP_MASK_ALL },
+  { "none",  RECIP_MASK_NONE },
+  { "div",   RECIP_MASK_DIV },
+  { "sqrt",  RECIP_MASK_SQRT },
+  { "rsqrt", RECIP_MASK_RSQRT },
+  { "vec-div",   RECIP_MASK_VEC_DIV },
+  { "vec-sqrt",  RECIP_MASK_VEC_SQRT },
+  { "vec-rsqrt", RECIP_MASK_VEC_RSQRT },
+};
+
+/* Parser for -mrecip=.  */
+unsigned int
+loongarch_parse_mrecip_scheme (const char *recip_string)
+{
+  unsigned int result_mask = RECIP_MASK_NONE;
+
+  if (recip_string)
+{
+  char *p = ASTRDUP (recip_string);
+  char *q;
+  unsigned int mask, i;
+  bool invert;
+
+  while ((q = strtok (p, ",")) != NULL)
+   {
+ p = NULL;
+ if (*q == '!')
+   {
+ invert = true;
+ q++;
+   }
+ else
+   invert = false;
+
+ if (!strcmp (q, "default"))
+   mask = RECIP_MASK_ALL;
+ else
+   {
+ for (i = 0; i < ARRAY_SIZE (recip_options); i++)
+   if (!strcmp (q, recip_options[i].string))
+ {
+   mask = recip_options[i].mask;
+

Re: [PATCH v2] LoongArch: Split loongarch_option_override_internal into smaller procedures

[Yang Yujie]

v1 -> v2:
- Rebased to master.
- Specifies "(void)" for the empty parameter list of loongarch_global_init.

[PATCH v2] LoongArch: Split loongarch_option_override_internal into smaller procedures

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as
aliases to -mrecip={all,none}.
* config/loongarch/loongarch.opt: Same.
* config/loongarch/loongarch-def.h: Modify ABI condition macros for
convenience.
* config/loongarch/loongarch-opts.cc: Define option-handling
procedures split from the original loongarch_option_override_internal.
* config/loongarch/loongarch-opts.h: Same.
* config/loongarch/loongarch.cc: Clean up
loongarch_option_override_internal.
---
 gcc/config/loongarch/genopts/loongarch.opt.in |   8 +-
 gcc/config/loongarch/loongarch-def.h  |  11 +-
 gcc/config/loongarch/loongarch-opts.cc| 248 +
 gcc/config/loongarch/loongarch-opts.h |  27 +-
 gcc/config/loongarch/loongarch.cc | 253 +++---
 gcc/config/loongarch/loongarch.opt|   8 +-
 6 files changed, 325 insertions(+), 230 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index 02f918053f5..a77893d31d9 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -197,14 +197,14 @@ mexplicit-relocs
 Target Alias(mexplicit-relocs=, always, none)
 Use %reloc() assembly operators (for backward compatibility).
 
-mrecip
-Target RejectNegative Var(la_recip) Save
-Generate approximate reciprocal divide and square root for better throughput.
-
 mrecip=
 Target RejectNegative Joined Var(la_recip_name) Save
 Control generation of reciprocal estimates.
 
+mrecip
+Target Alias(mrecip=, all, none)
+Generate approximate reciprocal divide and square root for better throughput.
+
 ; The code model option names for -mcmodel.
 Enum
 Name(cmodel) Type(int)
diff --git a/gcc/config/loongarch/loongarch-def.h 
b/gcc/config/loongarch/loongarch-def.h
index 2dbf006d013..0cbf9476690 100644
--- a/gcc/config/loongarch/loongarch-def.h
+++ b/gcc/config/loongarch/loongarch-def.h
@@ -90,11 +90,16 @@ extern loongarch_def_array
 
 #define TO_LP64_ABI_BASE(C) (C)
 
-#define ABI_FPU_64(abi_base) \
+#define ABI_LP64_P(abi_base) \
+  (abi_base == ABI_BASE_LP64D \
+   || abi_base == ABI_BASE_LP64F \
+   || abi_base == ABI_BASE_LP64S)
+
+#define ABI_FPU64_P(abi_base) \
   (abi_base == ABI_BASE_LP64D)
-#define ABI_FPU_32(abi_base) \
+#define ABI_FPU32_P(abi_base) \
   (abi_base == ABI_BASE_LP64F)
-#define ABI_FPU_NONE(abi_base) \
+#define ABI_NOFPU_P(abi_base) \
   (abi_base == ABI_BASE_LP64S)
 
 
diff --git a/gcc/config/loongarch/loongarch-opts.cc 
b/gcc/config/loongarch/loongarch-opts.cc
index 7eeac43ed2f..380208f38bf 100644
--- a/gcc/config/loongarch/loongarch-opts.cc
+++ b/gcc/config/loongarch/loongarch-opts.cc
@@ -25,6 +25,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "coretypes.h"
 #include "tm.h"
 #include "obstack.h"
+#include "opts.h"
 #include "diagnostic-core.h"
 
 #include "loongarch-cpu.h"
@@ -32,8 +33,12 @@ along with GCC; see the file COPYING3.  If not see
 #include "loongarch-str.h"
 #include "loongarch-def.h"
 
+/* Target configuration */
 struct loongarch_target la_target;
 
+/* RTL cost information */
+const struct loongarch_rtx_cost_data *loongarch_cost;
+
 /* ABI-related configuration.  */
 #define ABI_COUNT (sizeof(abi_priority_list)/sizeof(struct loongarch_abi))
 static const struct loongarch_abi
@@ -795,3 +800,246 @@ loongarch_update_gcc_opt_status (struct loongarch_target 
*target,
   /* ISA evolution features */
   opts->x_la_isa_evolution = target->isa.evolution;
 }
+
+/* -mrecip= handling */
+static struct
+  {
+const char *string;/* option name.  */
+unsigned int mask; /* mask bits to set.  */
+  }
+const recip_options[] = {
+  { "all",   RECIP_MASK_ALL },
+  { "none",  RECIP_MASK_NONE },
+  { "div",   RECIP_MASK_DIV },
+  { "sqrt",  RECIP_MASK_SQRT },
+  { "rsqrt", RECIP_MASK_RSQRT },
+  { "vec-div",   RECIP_MASK_VEC_DIV },
+  { "vec-sqrt",  RECIP_MASK_VEC_SQRT },
+  { "vec-rsqrt", RECIP_MASK_VEC_RSQRT },
+};
+
+/* Parser for -mrecip=.  */
+unsigned int
+loongarch_parse_mrecip_scheme (const char *recip_string)
+{
+  unsigned int result_mask = RECIP_MASK_NONE;
+
+  if (recip_string)
+{
+  char *p = ASTRDUP (recip_string);
+  char *q;
+  unsigned int mask, i;
+  bool invert;
+
+  while ((q = strtok (p, ",")) != NULL)
+   {
+ p = NULL;
+ if (*q == '!')
+   {
+ invert = true;
+ q++;
+   }
+ else
+   invert = false;
+
+ if (!strcmp (q, "default"))
+   mask = RECIP_MASK_ALL;
+ else
+   {
+ for (i = 0; i < ARRAY_SIZE (recip_options); i++)
+   if (!strcmp (q, recip_options[i].string))
+ {
+   mask = recip_options[i].mask;
+   break;
+ }
+
+

[PATCH] LoongArch: Fix soft-float builds of libffi

[Yang Yujie]

This patch correspond to the upstream PR:
https://github.com/libffi/libffi/pull/817

libffi/ChangeLog:

* src/loongarch64/ffi.c: Avoid defining floats
in struct call_context if the ABI is soft-float.
---
 libffi/src/loongarch64/ffi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/libffi/src/loongarch64/ffi.c b/libffi/src/loongarch64/ffi.c
index 140be3bc3dc..01c2e18a395 100644
--- a/libffi/src/loongarch64/ffi.c
+++ b/libffi/src/loongarch64/ffi.c
@@ -58,7 +58,9 @@
 */
 typedef struct call_context
 {
+#if !defined(__loongarch_soft_float)
   ABI_FLOAT fa[8];
+#endif
   size_t a[10];
 } call_context;
 
-- 
2.43.0

Re: [PATCH] LoongArch: Split loongarch_option_override_internal into smaller procedures

[Yang Yujie]

Sorry, this is the wrong patch. The good one is posted as v2,
which was bootstrapped and tested on loongarch64-linux-gnu.

Yujie

[PATCH v2] LoongArch: Split loongarch_option_override_internal into smaller procedures

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as
aliases to -mrecip={all,none}.
* config/loongarch/loongarch.opt: Same.
* config/loongarch/loongarch-def.h: Modify ABI condition macros for
convenience.
* config/loongarch/loongarch-opts.cc: Define option-handling
procedures split from the original loongarch_option_override_internal.
* config/loongarch/loongarch-opts.h: Same.
* config/loongarch/loongarch.cc: Clean up
loongarch_option_override_internal.
---
 gcc/config/loongarch/genopts/loongarch.opt.in |   8 +-
 gcc/config/loongarch/loongarch-def.h  |  11 +-
 gcc/config/loongarch/loongarch-opts.cc| 252 +
 gcc/config/loongarch/loongarch-opts.h |  27 +-
 gcc/config/loongarch/loongarch.cc | 257 +++---
 gcc/config/loongarch/loongarch.opt|   8 +-
 6 files changed, 329 insertions(+), 234 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index 02f918053f5..a77893d31d9 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -197,14 +197,14 @@ mexplicit-relocs
 Target Alias(mexplicit-relocs=, always, none)
 Use %reloc() assembly operators (for backward compatibility).
 
-mrecip
-Target RejectNegative Var(la_recip) Save
-Generate approximate reciprocal divide and square root for better throughput.
-
 mrecip=
 Target RejectNegative Joined Var(la_recip_name) Save
 Control generation of reciprocal estimates.
 
+mrecip
+Target Alias(mrecip=, all, none)
+Generate approximate reciprocal divide and square root for better throughput.
+
 ; The code model option names for -mcmodel.
 Enum
 Name(cmodel) Type(int)
diff --git a/gcc/config/loongarch/loongarch-def.h 
b/gcc/config/loongarch/loongarch-def.h
index a1237ecf1fd..deaf64d9a83 100644
--- a/gcc/config/loongarch/loongarch-def.h
+++ b/gcc/config/loongarch/loongarch-def.h
@@ -90,11 +90,16 @@ extern loongarch_def_array
 
 #define TO_LP64_ABI_BASE(C) (C)
 
-#define ABI_FPU_64(abi_base) \
+#define ABI_LP64_P(abi_base) \
+  (abi_base == ABI_BASE_LP64D \
+   || abi_base == ABI_BASE_LP64F \
+   || abi_base == ABI_BASE_LP64S)
+
+#define ABI_FPU64_P(abi_base) \
   (abi_base == ABI_BASE_LP64D)
-#define ABI_FPU_32(abi_base) \
+#define ABI_FPU32_P(abi_base) \
   (abi_base == ABI_BASE_LP64F)
-#define ABI_FPU_NONE(abi_base) \
+#define ABI_NOFPU_P(abi_base) \
   (abi_base == ABI_BASE_LP64S)
 
 
diff --git a/gcc/config/loongarch/loongarch-opts.cc 
b/gcc/config/loongarch/loongarch-opts.cc
index b87299513c9..ff2d3c73098 100644
--- a/gcc/config/loongarch/loongarch-opts.cc
+++ b/gcc/config/loongarch/loongarch-opts.cc
@@ -25,6 +25,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "coretypes.h"
 #include "tm.h"
 #include "obstack.h"
+#include "opts.h"
 #include "diagnostic-core.h"
 
 #include "loongarch-cpu.h"
@@ -32,8 +33,12 @@ along with GCC; see the file COPYING3.  If not see
 #include "loongarch-str.h"
 #include "loongarch-def.h"
 
+/* Target configuration */
 struct loongarch_target la_target;
 
+/* RTL cost information */
+const struct loongarch_rtx_cost_data *loongarch_cost;
+
 /* ABI-related configuration.  */
 #define ABI_COUNT (sizeof(abi_priority_list)/sizeof(struct loongarch_abi))
 static const struct loongarch_abi
@@ -797,3 +802,250 @@ loongarch_update_gcc_opt_status (struct loongarch_target 
*target,
   /* ISA evolution features */
   opts->x_la_isa_evolution = target->isa.evolution;
 }
+
+/* -mrecip= handling */
+static struct
+  {
+const char *string;/* option name.  */
+unsigned int mask; /* mask bits to set.  */
+  }
+const recip_options[] = {
+  { "all",   RECIP_MASK_ALL },
+  { "none",  RECIP_MASK_NONE },
+  { "div",   RECIP_MASK_DIV },
+  { "sqrt",  RECIP_MASK_SQRT },
+  { "rsqrt", RECIP_MASK_RSQRT },
+  { "vec-div",   RECIP_MASK_VEC_DIV },
+  { "vec-sqrt",  RECIP_MASK_VEC_SQRT },
+  { "vec-rsqrt", RECIP_MASK_VEC_RSQRT },
+};
+
+/* Parser for -mrecip=.  */
+unsigned int
+loongarch_parse_mrecip_scheme (const char *recip_string)
+{
+  unsigned int result_mask = RECIP_MASK_NONE;
+
+  if (recip_string)
+{
+  char *p = ASTRDUP (recip_string);
+  char *q;
+  unsigned int mask, i;
+  bool invert;
+
+  while ((q = strtok (p, ",")) != NULL)
+   {
+ p = NULL;
+ if (*q == '!')
+   {
+ invert = true;
+ q++;
+   }
+ else
+   invert = false;
+
+ if (!strcmp (q, "default"))
+   mask = RECIP_MASK_ALL;
+ else
+   {
+ for (i = 0; i < ARRAY_SIZE (recip_options); i++)
+   if (!strcmp (q, recip_options[i].string))
+ {
+   mask = recip_options[i].mask;
+   break;
+ }
+
+

[PATCH] LoongArch: Split loongarch_option_override_internal into smaller procedures

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as
aliases to -mrecip={all,none}.
* config/loongarch/loongarch.opt: Same.
* config/loongarch/loongarch-def.h: Modify ABI condition macros for
convenience.
* config/loongarch/loongarch-opts.cc: Define option-handling
procedures split from the original loongarch_option_override_internal.
* config/loongarch/loongarch-opts.h: Same.
* config/loongarch/loongarch.cc: Clean up
loongarch_option_override_internal.
---
 gcc/config/loongarch/genopts/loongarch.opt.in |   8 +-
 gcc/config/loongarch/loongarch-def.h  |  11 +-
 gcc/config/loongarch/loongarch-opts.cc| 252 +
 gcc/config/loongarch/loongarch-opts.h |  27 +-
 gcc/config/loongarch/loongarch.cc | 257 +++---
 gcc/config/loongarch/loongarch.opt|   8 +-
 6 files changed, 329 insertions(+), 234 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index 02f918053f5..a77893d31d9 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -197,14 +197,14 @@ mexplicit-relocs
 Target Alias(mexplicit-relocs=, always, none)
 Use %reloc() assembly operators (for backward compatibility).
 
-mrecip
-Target RejectNegative Var(la_recip) Save
-Generate approximate reciprocal divide and square root for better throughput.
-
 mrecip=
 Target RejectNegative Joined Var(la_recip_name) Save
 Control generation of reciprocal estimates.
 
+mrecip
+Target Alias(mrecip=, all, none)
+Generate approximate reciprocal divide and square root for better throughput.
+
 ; The code model option names for -mcmodel.
 Enum
 Name(cmodel) Type(int)
diff --git a/gcc/config/loongarch/loongarch-def.h 
b/gcc/config/loongarch/loongarch-def.h
index a1237ecf1fd..deaf64d9a83 100644
--- a/gcc/config/loongarch/loongarch-def.h
+++ b/gcc/config/loongarch/loongarch-def.h
@@ -90,11 +90,16 @@ extern loongarch_def_array
 
 #define TO_LP64_ABI_BASE(C) (C)
 
-#define ABI_FPU_64(abi_base) \
+#define ABI_LP64_P(abi_base) \
+  (abi_base == ABI_BASE_LP64D \
+   || abi_base == ABI_BASE_LP64F \
+   || abi_base == ABI_BASE_LP64S)
+
+#define ABI_FPU64_P(abi_base) \
   (abi_base == ABI_BASE_LP64D)
-#define ABI_FPU_32(abi_base) \
+#define ABI_FPU32_P(abi_base) \
   (abi_base == ABI_BASE_LP64F)
-#define ABI_FPU_NONE(abi_base) \
+#define ABI_NOFPU_P(abi_base) \
   (abi_base == ABI_BASE_LP64S)
 
 
diff --git a/gcc/config/loongarch/loongarch-opts.cc 
b/gcc/config/loongarch/loongarch-opts.cc
index b87299513c9..ff2d3c73098 100644
--- a/gcc/config/loongarch/loongarch-opts.cc
+++ b/gcc/config/loongarch/loongarch-opts.cc
@@ -25,6 +25,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "coretypes.h"
 #include "tm.h"
 #include "obstack.h"
+#include "opts.h"
 #include "diagnostic-core.h"
 
 #include "loongarch-cpu.h"
@@ -32,8 +33,12 @@ along with GCC; see the file COPYING3.  If not see
 #include "loongarch-str.h"
 #include "loongarch-def.h"
 
+/* Target configuration */
 struct loongarch_target la_target;
 
+/* RTL cost information */
+const struct loongarch_rtx_cost_data *loongarch_cost;
+
 /* ABI-related configuration.  */
 #define ABI_COUNT (sizeof(abi_priority_list)/sizeof(struct loongarch_abi))
 static const struct loongarch_abi
@@ -797,3 +802,250 @@ loongarch_update_gcc_opt_status (struct loongarch_target 
*target,
   /* ISA evolution features */
   opts->x_la_isa_evolution = target->isa.evolution;
 }
+
+/* -mrecip= handling */
+static struct
+  {
+const char *string;/* option name.  */
+unsigned int mask; /* mask bits to set.  */
+  }
+const recip_options[] = {
+  { "all",   RECIP_MASK_ALL },
+  { "none",  RECIP_MASK_NONE },
+  { "div",   RECIP_MASK_DIV },
+  { "sqrt",  RECIP_MASK_SQRT },
+  { "rsqrt", RECIP_MASK_RSQRT },
+  { "vec-div",   RECIP_MASK_VEC_DIV },
+  { "vec-sqrt",  RECIP_MASK_VEC_SQRT },
+  { "vec-rsqrt", RECIP_MASK_VEC_RSQRT },
+};
+
+/* Parser for -mrecip=.  */
+unsigned int
+loongarch_parse_mrecip_scheme (const char *recip_string)
+{
+  unsigned int result_mask = RECIP_MASK_NONE;
+
+  if (recip_string)
+{
+  char *p = ASTRDUP (recip_string);
+  char *q;
+  unsigned int mask, i;
+  bool invert;
+
+  while ((q = strtok (p, ",")) != NULL)
+   {
+ p = NULL;
+ if (*q == '!')
+   {
+ invert = true;
+ q++;
+   }
+ else
+   invert = false;
+
+ if (!strcmp (q, "default"))
+   mask = RECIP_MASK_ALL;
+ else
+   {
+ for (i = 0; i < ARRAY_SIZE (recip_options); i++)
+   if (!strcmp (q, recip_options[i].string))
+ {
+   mask = recip_options[i].mask;
+   break;
+ }
+
+

Re: [PATCH v2] LoongArch: Implement option save/restore

[Yang Yujie]

v1 -> v2:
Do not save la_target directly to struct cl_target_options in
TARGET_OPTION_SAVE, update to *opts first instead, since
it is getting saved later.

[PATCH v2] LoongArch: Implement option save/restore

[Yang Yujie]

LTO option streaming and target attributes both require per-function
target configuration, which is achieved via option save/restore.

We implement TARGET_OPTION_{SAVE,RESTORE} to switch the la_target
context in addition to other automatically maintained option states
(via the "Save" option property in the .opt files).

Tested on loongarch64-linux-gnu without regression.

PR target/113233

gcc/ChangeLog:

* config/loongarch/genopts/loongarch.opt.in: Mark options with
the "Save" property.
* config/loongarch/loongarch.opt: Same.
* config/loongarch/loongarch-opts.cc: Refresh -mcmodel= state
according to la_target.
* config/loongarch/loongarch.cc: Implement TARGET_OPTION_{SAVE,
RESTORE} for the la_target structure; Rename option conditions
to have the same "la_" prefix.
* config/loongarch/loongarch.h: Same.
---
 gcc/config/loongarch/genopts/loongarch.opt.in | 38 -
 gcc/config/loongarch/loongarch-opts.cc|  7 ++
 gcc/config/loongarch/loongarch.cc | 80 +++
 gcc/config/loongarch/loongarch.h  |  2 +-
 gcc/config/loongarch/loongarch.opt| 38 -
 5 files changed, 111 insertions(+), 54 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index 1dbd3ad1e3f..02f918053f5 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -50,7 +50,7 @@ EnumValue
 Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64)
 
 m@@OPTSTR_ISA_EXT_FPU@@=
-Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) 
Init(M_OPT_UNSET)
+Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) 
Init(M_OPT_UNSET) Save
 -m@@OPTSTR_ISA_EXT_FPU@@=FPU   Generate code for the given FPU.
 
 m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@
@@ -82,7 +82,7 @@ EnumValue
 Enum(isa_ext_simd) String(@@STR_ISA_EXT_LASX@@) Value(ISA_EXT_SIMD_LASX)
 
 m@@OPTSTR_ISA_EXT_SIMD@@=
-Target RejectNegative Joined ToLower Enum(isa_ext_simd) Var(la_opt_simd) 
Init(M_OPT_UNSET)
+Target RejectNegative Joined ToLower Enum(isa_ext_simd) Var(la_opt_simd) 
Init(M_OPT_UNSET) Save
 -m@@OPTSTR_ISA_EXT_SIMD@@=SIMD Generate code for the given SIMD extension.
 
 m@@STR_ISA_EXT_LSX@@
@@ -114,11 +114,11 @@ EnumValue
 Enum(cpu_type) String(@@STR_CPU_LA664@@) Value(CPU_LA664)
 
 m@@OPTSTR_ARCH@@=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) 
Init(M_OPT_UNSET)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) 
Init(M_OPT_UNSET) Save
 -m@@OPTSTR_ARCH@@=PROCESSORGenerate code for the given PROCESSOR ISA.
 
 m@@OPTSTR_TUNE@@=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) 
Init(M_OPT_UNSET)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) 
Init(M_OPT_UNSET) Save
 -m@@OPTSTR_TUNE@@=PROCESSORGenerate optimized code for PROCESSOR.
 
 
@@ -149,31 +149,31 @@ Variable
 int la_opt_abi_ext = M_OPT_UNSET
 
 mbranch-cost=
-Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
+Target RejectNegative Joined UInteger Var(la_branch_cost) Save
 -mbranch-cost=COST Set the cost of branches to roughly COST instructions.
 
 mcheck-zero-division
-Target Mask(CHECK_ZERO_DIV)
+Target Mask(CHECK_ZERO_DIV) Save
 Trap on integer divide by zero.
 
 mcond-move-int
-Target Var(TARGET_COND_MOVE_INT) Init(1)
+Target Mask(COND_MOVE_INT) Save
 Conditional moves for integral are enabled.
 
 mcond-move-float
-Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
+Target Mask(COND_MOVE_FLOAT) Save
 Conditional moves for float are enabled.
 
 mmemcpy
-Target Mask(MEMCPY)
+Target Mask(MEMCPY) Save
 Prevent optimizing block moves, which is also the default behavior of -Os.
 
 mstrict-align
-Target Var(TARGET_STRICT_ALIGN) Init(0)
+Target Mask(STRICT_ALIGN) Save
 Do not generate unaligned memory accesses.
 
 mmax-inline-memcpy-size=
-Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) 
Init(1024)
+Target Joined RejectNegative UInteger Var(la_max_inline_memcpy_size) 
Init(1024) Save
 -mmax-inline-memcpy-size=SIZE  Set the max size of memcpy to inline, default 
is 1024.
 
 Enum
@@ -198,11 +198,11 @@ Target Alias(mexplicit-relocs=, always, none)
 Use %reloc() assembly operators (for backward compatibility).
 
 mrecip
-Target RejectNegative Var(loongarch_recip)
+Target RejectNegative Var(la_recip) Save
 Generate approximate reciprocal divide and square root for better throughput.
 
 mrecip=
-Target RejectNegative Joined Var(loongarch_recip_name)
+Target RejectNegative Joined Var(la_recip_name) Save
 Control generation of reciprocal estimates.
 
 ; The code model option names for -mcmodel.
@@ -229,29 +229,29 @@ EnumValue
 Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME)
 
 mcmodel=
-Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(M_OPT_UNSET)
+Target RejectNegative Joined 

[PATCH v2 0/4] Adjust option handling code

[Yang Yujie]

This patchset performs some code cleanup, and is bootstrapped and regtested
on loongarch64-linux-gnu.

Changes from v1 -> v2:
* Replaced all TARGET_ macros from .opt.
* Fixed definition of ISA_HAS_LAMCAS.

Yang Yujie (4):
  LoongArch: Handle ISA evolution switches along with other options
  LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64
  LoongArch: Use enums for constants
  LoongArch: Simplify -mexplicit-reloc definitions

 gcc/config/loongarch/genopts/genstr.sh|   2 +-
 .../loongarch/genopts/loongarch-strings   |   8 +-
 gcc/config/loongarch/genopts/loongarch.opt.in |  16 +--
 gcc/config/loongarch/lasx.md  |   4 +-
 gcc/config/loongarch/loongarch-builtins.cc|   6 +-
 gcc/config/loongarch/loongarch-c.cc   |   2 +-
 gcc/config/loongarch/loongarch-cpu.cc |   2 +-
 gcc/config/loongarch/loongarch-def.cc |  14 +-
 gcc/config/loongarch/loongarch-def.h  | 120 +++---
 gcc/config/loongarch/loongarch-driver.cc  |   5 +-
 gcc/config/loongarch/loongarch-opts.cc|  27 +++-
 gcc/config/loongarch/loongarch-opts.h |  26 +++-
 gcc/config/loongarch/loongarch-str.h  |   7 +-
 gcc/config/loongarch/loongarch.cc |  36 ++
 gcc/config/loongarch/loongarch.md |  12 +-
 gcc/config/loongarch/loongarch.opt|  20 +--
 gcc/config/loongarch/lsx.md   |   4 +-
 gcc/config/loongarch/sync.md  |  22 ++--
 18 files changed, 180 insertions(+), 153 deletions(-)

-- 
2.43.0

[PATCH v2 2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64

[Yang Yujie]

LoongArch ISA manual v1.10 suggests that software should not depend on
the ISA version number for marking processor features.  The ISA version
number is now defined as a collective name of individual ISA evolutions.
Since there is a independent ISA evolution mask now, we can drop the
version information from the base ISA.

gcc/ChangeLog:

* config/loongarch/genopts/loongarch-strings: Rename.
* config/loongarch/genopts/loongarch.opt.in: Same.
* config/loongarch/loongarch-cpu.cc: Same.
* config/loongarch/loongarch-def.cc: Same.
* config/loongarch/loongarch-def.h: Same.
* config/loongarch/loongarch-opts.cc: Same.
* config/loongarch/loongarch-opts.h: Same.
* config/loongarch/loongarch-str.h: Same.
* config/loongarch/loongarch.opt: Same.
---
 gcc/config/loongarch/genopts/loongarch-strings |  2 +-
 gcc/config/loongarch/genopts/loongarch.opt.in  |  2 +-
 gcc/config/loongarch/loongarch-cpu.cc  |  2 +-
 gcc/config/loongarch/loongarch-def.cc  | 14 +++---
 gcc/config/loongarch/loongarch-def.h   |  6 +++---
 gcc/config/loongarch/loongarch-opts.cc | 10 +-
 gcc/config/loongarch/loongarch-opts.h  |  2 +-
 gcc/config/loongarch/loongarch-str.h   |  2 +-
 gcc/config/loongarch/loongarch.opt |  2 +-
 9 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch-strings 
b/gcc/config/loongarch/genopts/loongarch-strings
index f40b014f017..ba47be31227 100644
--- a/gcc/config/loongarch/genopts/loongarch-strings
+++ b/gcc/config/loongarch/genopts/loongarch-strings
@@ -29,7 +29,7 @@ STR_CPU_LA464   la464
 STR_CPU_LA664la664
 
 # Base architecture
-STR_ISA_BASE_LA64V100 la64
+STR_ISA_BASE_LA64 la64
 
 # -mfpu
 OPTSTR_ISA_EXT_FPUfpu
diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index e643deacd21..38ac347c660 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -33,7 +33,7 @@ Name(isa_base) Type(int)
 Basic ISAs of LoongArch:
 
 EnumValue
-Enum(isa_base) String(@@STR_ISA_BASE_LA64V100@@) Value(ISA_BASE_LA64V100)
+Enum(isa_base) String(@@STR_ISA_BASE_LA64@@) Value(ISA_BASE_LA64)
 
 ;; ISA extensions / adjustments
 Enum
diff --git a/gcc/config/loongarch/loongarch-cpu.cc 
b/gcc/config/loongarch/loongarch-cpu.cc
index e1771fc0b4f..97ac5fed9d8 100644
--- a/gcc/config/loongarch/loongarch-cpu.cc
+++ b/gcc/config/loongarch/loongarch-cpu.cc
@@ -133,7 +133,7 @@ fill_native_cpu_config (struct loongarch_target *tgt)
switch (cpucfg_cache[1] & 0x3)
  {
case 0x02:
- tmp = ISA_BASE_LA64V100;
+ tmp = ISA_BASE_LA64;
  break;
 
default:
diff --git a/gcc/config/loongarch/loongarch-def.cc 
b/gcc/config/loongarch/loongarch-def.cc
index 48d28315064..e8c129ce643 100644
--- a/gcc/config/loongarch/loongarch-def.cc
+++ b/gcc/config/loongarch/loongarch-def.cc
@@ -48,16 +48,16 @@ array_arch loongarch_cpu_default_isa =
   array_arch ()
 .set (CPU_LOONGARCH64,
  loongarch_isa ()
-   .base_ (ISA_BASE_LA64V100)
+   .base_ (ISA_BASE_LA64)
.fpu_ (ISA_EXT_FPU64))
 .set (CPU_LA464,
  loongarch_isa ()
-   .base_ (ISA_BASE_LA64V100)
+   .base_ (ISA_BASE_LA64)
.fpu_ (ISA_EXT_FPU64)
.simd_ (ISA_EXT_SIMD_LASX))
 .set (CPU_LA664,
  loongarch_isa ()
-   .base_ (ISA_BASE_LA64V100)
+   .base_ (ISA_BASE_LA64)
.fpu_ (ISA_EXT_FPU64)
.simd_ (ISA_EXT_SIMD_LASX)
.evolution_ (OPTION_MASK_ISA_DIV32 | OPTION_MASK_ISA_LD_SEQ_SA
@@ -153,7 +153,7 @@ array_tune loongarch_cpu_multipass_dfa_lookahead = 
array_tune ()
 
 array loongarch_isa_base_strings =
   array ()
-.set (ISA_BASE_LA64V100, STR_ISA_BASE_LA64V100);
+.set (ISA_BASE_LA64, STR_ISA_BASE_LA64);
 
 array loongarch_isa_ext_strings =
   array ()
@@ -189,15 +189,15 @@ array, 
N_ABI_BASE_TYPES>
  array ()
.set (ABI_EXT_BASE,
  loongarch_isa ()
-   .base_ (ISA_BASE_LA64V100)
+   .base_ (ISA_BASE_LA64)
.fpu_ (ISA_EXT_FPU64)))
 .set (ABI_BASE_LP64F,
  array ()
.set (ABI_EXT_BASE,
  loongarch_isa ()
-   .base_ (ISA_BASE_LA64V100)
+   .base_ (ISA_BASE_LA64)
.fpu_ (ISA_EXT_FPU32)))
 .set (ABI_BASE_LP64S,
  array ()
.set (ABI_EXT_BASE,
- loongarch_isa ().base_ (ISA_BASE_LA64V100)));
+ loongarch_isa ().base_ (ISA_BASE_LA64)));
diff --git a/gcc/config/loongarch/loongarch-def.h 
b/gcc/config/loongarch/loongarch-def.h
index 1fab4f4d315..f8cb3adf509 100644
--- a/gcc/config/loongarch/loongarch-def.h
+++ b/gcc/config/loongarch/loongarch-def.h
@@ -55,9 +55,9 @@ 

[PATCH v2 1/4] LoongArch: Handle ISA evolution switches along with other options

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/genopts/genstr.sh: Prepend the isa_evolution
variable with the common la_ prefix.
* config/loongarch/genopts/loongarch.opt.in: Mark ISA evolution
flags as saved using TargetVariable.
* config/loongarch/loongarch.opt: Same.
* config/loongarch/loongarch-def.h: Define evolution_set to
mark changes to the -march default.
* config/loongarch/loongarch-driver.cc: Same.
* config/loongarch/loongarch-opts.cc: Same.
* config/loongarch/loongarch-opts.h: Define and use ISA evolution
conditions around the la_target structure.
* config/loongarch/loongarch.cc: Same.
* config/loongarch/loongarch.md: Same.
* config/loongarch/loongarch-builtins.cc: Same.
* config/loongarch/loongarch-c.cc: Same.
* config/loongarch/lasx.md: Same.
* config/loongarch/lsx.md: Same.
* config/loongarch/sync.md: Same.
---
 gcc/config/loongarch/genopts/genstr.sh|  2 +-
 gcc/config/loongarch/genopts/loongarch.opt.in |  6 ++---
 gcc/config/loongarch/lasx.md  |  4 ++--
 gcc/config/loongarch/loongarch-builtins.cc|  6 ++---
 gcc/config/loongarch/loongarch-c.cc   |  2 +-
 gcc/config/loongarch/loongarch-def.h  |  5 +++-
 gcc/config/loongarch/loongarch-driver.cc  |  5 ++--
 gcc/config/loongarch/loongarch-opts.cc| 17 -
 gcc/config/loongarch/loongarch-opts.h | 24 +++
 gcc/config/loongarch/loongarch.cc | 24 ---
 gcc/config/loongarch/loongarch.md | 12 +-
 gcc/config/loongarch/loongarch.opt| 16 ++---
 gcc/config/loongarch/lsx.md   |  4 ++--
 gcc/config/loongarch/sync.md  | 22 -
 14 files changed, 90 insertions(+), 59 deletions(-)

diff --git a/gcc/config/loongarch/genopts/genstr.sh 
b/gcc/config/loongarch/genopts/genstr.sh
index 5865b87d516..724c9aaedac 100755
--- a/gcc/config/loongarch/genopts/genstr.sh
+++ b/gcc/config/loongarch/genopts/genstr.sh
@@ -107,7 +107,7 @@ EOF
   print("")
   print("m"$3)
   gsub(/-/, "_", $3)
-  print("Target Mask(ISA_"toupper($3)") Var(isa_evolution)")
+  print("Target Mask(ISA_"toupper($3)") Var(la_isa_evolution)")
   $1=""; $2=""; $3=""
   sub(/^ */, "", $0)
   print($0)
diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index f2e7ea2ef2f..e643deacd21 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -259,6 +259,6 @@ default value is 4.
 ; Features added during ISA evolution.  This concept is different from ISA
 ; extension, read Section 1.5 of LoongArch v1.10 Volume 1 for the
 ; explanation.  These features may be implemented and enumerated with
-; CPUCFG independantly, so we use bit flags to specify them.
-Variable
-HOST_WIDE_INT isa_evolution = 0
+; CPUCFG independently, so we use bit flags to specify them.
+TargetVariable
+HOST_WIDE_INT la_isa_evolution = 0
diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md
index 027021b45d5..429c59504b9 100644
--- a/gcc/config/loongarch/lasx.md
+++ b/gcc/config/loongarch/lasx.md
@@ -1539,7 +1539,7 @@ (define_insn "lasx_xvfrecipe_"
   [(set (match_operand:FLASX 0 "register_operand" "=f")
 (unspec:FLASX [(match_operand:FLASX 1 "register_operand" "f")]
  UNSPEC_LASX_XVFRECIPE))]
-  "ISA_HAS_LASX && TARGET_FRECIPE"
+  "ISA_HAS_LASX && ISA_HAS_FRECIPE"
   "xvfrecipe.\t%u0,%u1"
   [(set_attr "type" "simd_fdiv")
(set_attr "mode" "")])
@@ -1572,7 +1572,7 @@ (define_insn "lasx_xvfrsqrte_"
   [(set (match_operand:FLASX 0 "register_operand" "=f")
 (unspec:FLASX [(match_operand:FLASX 1 "register_operand" "f")]
  UNSPEC_LASX_XVFRSQRTE))]
-  "ISA_HAS_LASX && TARGET_FRECIPE"
+  "ISA_HAS_LASX && ISA_HAS_FRECIPE"
   "xvfrsqrte.\t%u0,%u1"
   [(set_attr "type" "simd_fdiv")
(set_attr "mode" "")])
diff --git a/gcc/config/loongarch/loongarch-builtins.cc 
b/gcc/config/loongarch/loongarch-builtins.cc
index 45ec6aca030..efe7e5e5ebc 100644
--- a/gcc/config/loongarch/loongarch-builtins.cc
+++ b/gcc/config/loongarch/loongarch-builtins.cc
@@ -120,9 +120,9 @@ struct loongarch_builtin_description
 AVAIL_ALL (hard_float, TARGET_HARD_FLOAT_ABI)
 AVAIL_ALL (lsx, ISA_HAS_LSX)
 AVAIL_ALL (lasx, ISA_HAS_LASX)
-AVAIL_ALL (frecipe, TARGET_FRECIPE && TARGET_HARD_FLOAT_ABI)
-AVAIL_ALL (lsx_frecipe, ISA_HAS_LSX && TARGET_FRECIPE)
-AVAIL_ALL (lasx_frecipe, ISA_HAS_LASX && TARGET_FRECIPE)
+AVAIL_ALL (frecipe, ISA_HAS_FRECIPE && TARGET_HARD_FLOAT_ABI)
+AVAIL_ALL (lsx_frecipe, ISA_HAS_LSX && ISA_HAS_FRECIPE)
+AVAIL_ALL (lasx_frecipe, ISA_HAS_LASX && ISA_HAS_FRECIPE)
 
 /* Construct a loongarch_builtin_description from the given arguments.
 
diff --git a/gcc/config/loongarch/loongarch-c.cc 
b/gcc/config/loongarch/loongarch-c.cc
index 

[PATCH v2 4/4] LoongArch: Simplify -mexplicit-reloc definitions

[Yang Yujie]

Since we do not need printing or manual parsing of this option,
(whether in the driver or for target attributes to be supported later)
it can be handled in the .opt file framework.

gcc/ChangeLog:

* config/loongarch/genopts/loongarch-strings: Remove explicit-reloc
argument string definitions.
* config/loongarch/loongarch-str.h: Same.
* config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]explicit-relocs
as aliases to -mexplicit-relocs={always,none}
* config/loongarch/genopts/loongarch.opt: Same.
* config/loongarch/loongarch.cc: Same.
---
 gcc/config/loongarch/genopts/loongarch-strings |  6 --
 gcc/config/loongarch/genopts/loongarch.opt.in  |  8 
 gcc/config/loongarch/loongarch-str.h   |  5 -
 gcc/config/loongarch/loongarch.cc  | 12 
 gcc/config/loongarch/loongarch.opt |  2 +-
 5 files changed, 5 insertions(+), 28 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch-strings 
b/gcc/config/loongarch/genopts/loongarch-strings
index ba47be31227..e434a89c9ee 100644
--- a/gcc/config/loongarch/genopts/loongarch-strings
+++ b/gcc/config/loongarch/genopts/loongarch-strings
@@ -64,9 +64,3 @@ STR_CMODEL_TS   tiny-static
 STR_CMODEL_MEDIUM medium
 STR_CMODEL_LARGE  large
 STR_CMODEL_EXTREMEextreme
-
-# -mexplicit-relocs
-OPTSTR_EXPLICIT_RELOCS explicit-relocs
-STR_EXPLICIT_RELOCS_AUTO   auto
-STR_EXPLICIT_RELOCS_NONE   none
-STR_EXPLICIT_RELOCS_ALWAYS always
diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index 38ac347c660..1dbd3ad1e3f 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -181,20 +181,20 @@ Name(explicit_relocs) Type(int)
 The code model option names for -mexplicit-relocs:
 
 EnumValue
-Enum(explicit_relocs) String(@@STR_EXPLICIT_RELOCS_AUTO@@) 
Value(EXPLICIT_RELOCS_AUTO)
+Enum(explicit_relocs) String(auto) Value(EXPLICIT_RELOCS_AUTO)
 
 EnumValue
-Enum(explicit_relocs) String(@@STR_EXPLICIT_RELOCS_NONE@@) 
Value(EXPLICIT_RELOCS_NONE)
+Enum(explicit_relocs) String(none) Value(EXPLICIT_RELOCS_NONE)
 
 EnumValue
-Enum(explicit_relocs) String(@@STR_EXPLICIT_RELOCS_ALWAYS@@) 
Value(EXPLICIT_RELOCS_ALWAYS)
+Enum(explicit_relocs) String(always) Value(EXPLICIT_RELOCS_ALWAYS)
 
 mexplicit-relocs=
 Target RejectNegative Joined Enum(explicit_relocs) Var(la_opt_explicit_relocs) 
Init(M_OPT_UNSET)
 Use %reloc() assembly operators.
 
 mexplicit-relocs
-Target Var(la_opt_explicit_relocs_backward) Init(M_OPT_UNSET)
+Target Alias(mexplicit-relocs=, always, none)
 Use %reloc() assembly operators (for backward compatibility).
 
 mrecip
diff --git a/gcc/config/loongarch/loongarch-str.h 
b/gcc/config/loongarch/loongarch-str.h
index 0a6a36c5783..20da2b169ed 100644
--- a/gcc/config/loongarch/loongarch-str.h
+++ b/gcc/config/loongarch/loongarch-str.h
@@ -63,11 +63,6 @@ along with GCC; see the file COPYING3.  If not see
 #define STR_CMODEL_LARGE "large"
 #define STR_CMODEL_EXTREME "extreme"
 
-#define OPTSTR_EXPLICIT_RELOCS "explicit-relocs"
-#define STR_EXPLICIT_RELOCS_AUTO "auto"
-#define STR_EXPLICIT_RELOCS_NONE "none"
-#define STR_EXPLICIT_RELOCS_ALWAYS "always"
-
 #define OPTSTR_FRECIPE "frecipe"
 #define OPTSTR_DIV32   "div32"
 #define OPTSTR_LAM_BH  "lam-bh"
diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index 95517ec61da..594e5a00c98 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7533,18 +7533,6 @@ loongarch_option_override_internal (struct gcc_options 
*opts,
   loongarch_update_gcc_opt_status (_target, opts, opts_set);
   loongarch_cpu_option_override (_target, opts, opts_set);
 
-  if (la_opt_explicit_relocs != M_OPT_UNSET
-  && la_opt_explicit_relocs_backward != M_OPT_UNSET)
-error ("do not use %qs (with %qs) and %qs (without %qs) together",
-  "-mexplicit-relocs=", "=",
-  la_opt_explicit_relocs_backward ? "-mexplicit-relocs"
-  : "-mno-explicit-relocs", "=");
-
-  if (la_opt_explicit_relocs_backward != M_OPT_UNSET)
-la_opt_explicit_relocs = (la_opt_explicit_relocs_backward
- ? EXPLICIT_RELOCS_ALWAYS
- : EXPLICIT_RELOCS_NONE);
-
   if (la_opt_explicit_relocs == M_OPT_UNSET)
 la_opt_explicit_relocs = (HAVE_AS_EXPLICIT_RELOCS
  ? (loongarch_mrelax
diff --git a/gcc/config/loongarch/loongarch.opt 
b/gcc/config/loongarch/loongarch.opt
index 76b42d51d09..adb2304fbd5 100644
--- a/gcc/config/loongarch/loongarch.opt
+++ b/gcc/config/loongarch/loongarch.opt
@@ -202,7 +202,7 @@ Target RejectNegative Joined Enum(explicit_relocs) 
Var(la_opt_explicit_relocs) I
 Use %reloc() assembly operators.
 
 mexplicit-relocs
-Target Var(la_opt_explicit_relocs_backward) Init(M_OPT_UNSET)
+Target Alias(mexplicit-relocs=, 

[PATCH v2 3/4] LoongArch: Use enums for constants

[Yang Yujie]

Target features constants from loongarch-def.h are currently defined as macros.
Switch to enums for better look in the debugger.

gcc/ChangeLog:

* config/loongarch/loongarch-def.h: Define constants with
enums instead of Macros.
---
 gcc/config/loongarch/loongarch-def.h | 115 ---
 1 file changed, 67 insertions(+), 48 deletions(-)

diff --git a/gcc/config/loongarch/loongarch-def.h 
b/gcc/config/loongarch/loongarch-def.h
index f8cb3adf509..a1237ecf1fd 100644
--- a/gcc/config/loongarch/loongarch-def.h
+++ b/gcc/config/loongarch/loongarch-def.h
@@ -23,12 +23,10 @@ along with GCC; see the file COPYING3.  If not see
 - ISA extensions   (isa_ext),
 - base ABI types   (abi_base),
 - ABI extension types  (abi_ext).
-
-- code models(cmodel)
-- other command-line switches (switch)
+- code models  (cmodel)
 
These values are primarily used for implementing option handling
-   logic in "loongarch.opt", "loongarch-driver.c" and "loongarch-opt.c".
+   logic in "loongarch.opt", "loongarch-driver.cc" and "loongarch-opt.cc".
 
As for the result of this option handling process, the following
scheme is adopted to represent the final configuration:
@@ -53,30 +51,40 @@ along with GCC; see the file COPYING3.  If not see
 #include "loongarch-def-array.h"
 #include "loongarch-tune.h"
 
-/* enum isa_base */
 
-/* LoongArch64 */
-#define ISA_BASE_LA640
-#define N_ISA_BASE_TYPES  1
+/* ISA base */
+enum {
+  ISA_BASE_LA64= 0,  /* LoongArch64 */
+  N_ISA_BASE_TYPES = 1
+};
+
 extern loongarch_def_array
   loongarch_isa_base_strings;
 
-/* enum isa_ext_* */
-#define ISA_EXT_NONE 0
-#define ISA_EXT_FPU321
-#define ISA_EXT_FPU642
-#define N_ISA_EXT_FPU_TYPES   3
-#define ISA_EXT_SIMD_LSX  3
-#define ISA_EXT_SIMD_LASX 4
-#define N_ISA_EXT_TYPES  5
+
+/* ISA extensions */
+enum {
+  ISA_EXT_NONE = 0,
+  ISA_EXT_FPU32= 1,
+  ISA_EXT_FPU64= 2,
+  N_ISA_EXT_FPU_TYPES   = 3,
+  ISA_EXT_SIMD_LSX  = 3,
+  ISA_EXT_SIMD_LASX = 4,
+  N_ISA_EXT_TYPES  = 5
+};
+
 extern loongarch_def_array
   loongarch_isa_ext_strings;
 
-/* enum abi_base */
-#define ABI_BASE_LP64D   0
-#define ABI_BASE_LP64F   1
-#define ABI_BASE_LP64S   2
-#define N_ABI_BASE_TYPES  3
+
+/* Base ABI */
+enum {
+  ABI_BASE_LP64D   = 0,
+  ABI_BASE_LP64F   = 1,
+  ABI_BASE_LP64S   = 2,
+  N_ABI_BASE_TYPES = 3
+};
+
 extern loongarch_def_array
   loongarch_abi_base_strings;
 
@@ -90,28 +98,38 @@ extern loongarch_def_array
   (abi_base == ABI_BASE_LP64S)
 
 
-/* enum abi_ext */
-#define ABI_EXT_BASE 0
-#define N_ABI_EXT_TYPES  1
+/* ABI Extension */
+enum {
+  ABI_EXT_BASE = 0,
+  N_ABI_EXT_TYPES  = 1
+};
+
 extern loongarch_def_array
   loongarch_abi_ext_strings;
 
-/* enum cmodel */
-#define CMODEL_NORMAL0
-#define CMODEL_TINY  1
-#define CMODEL_TINY_STATIC2
-#define CMODEL_MEDIUM3
-#define CMODEL_LARGE 4
-#define CMODEL_EXTREME   5
-#define N_CMODEL_TYPES   6
+
+/* Code Model */
+enum {
+  CMODEL_NORMAL= 0,
+  CMODEL_TINY  = 1,
+  CMODEL_TINY_STATIC   = 2,
+  CMODEL_MEDIUM= 3,
+  CMODEL_LARGE = 4,
+  CMODEL_EXTREME   = 5,
+  N_CMODEL_TYPES   = 6
+};
+
 extern loongarch_def_array
   loongarch_cmodel_strings;
 
-/* enum explicit_relocs */
-#define EXPLICIT_RELOCS_AUTO   0
-#define EXPLICIT_RELOCS_NONE   1
-#define EXPLICIT_RELOCS_ALWAYS 2
-#define N_EXPLICIT_RELOCS_TYPES3
+
+/* Explicit Reloc Type */
+enum {
+  EXPLICIT_RELOCS_AUTO = 0,
+  EXPLICIT_RELOCS_NONE = 1,
+  EXPLICIT_RELOCS_ALWAYS= 2,
+  N_EXPLICIT_RELOCS_TYPES   = 3
+};
 
 /* The common default value for variables whose assignments
are triggered by command-line options.  */
@@ -159,17 +177,18 @@ struct loongarch_target
   int cmodel;  /* CMODEL_ */
 };
 
-/* CPU properties.  */
-/* index */
-#define CPU_NATIVE   0
-#define CPU_ABI_DEFAULT   1
-#define CPU_LOONGARCH64  2
-#define CPU_LA4643
-#define CPU_LA6644
-#define N_ARCH_TYPES 5
-#define N_TUNE_TYPES 5
-
-/* parallel tables.  */
+/* CPU model */
+enum {
+  CPU_NATIVE   = 0,
+  CPU_ABI_DEFAULT   = 1,
+  CPU_LOONGARCH64   = 2,
+  CPU_LA464= 3,
+  CPU_LA664= 4,
+  N_ARCH_TYPES = 5,
+  N_TUNE_TYPES = 5
+};
+
+/* CPU model properties */
 extern loongarch_def_array
   loongarch_cpu_strings;
 extern loongarch_def_array
-- 
2.43.0

Re: [PATCH 1/4] LoongArch: Handle ISA evolution switches along with other options

[Yang Yujie]

On Fri, Jan 05, 2024 at 08:12:08PM +0800, Xi Ruoyao wrote:
> On Fri, 2024-01-05 at 14:55 +0800, Yang Yujie wrote:
> > +#define ISA_HAS_FRECIPE \
> > +  (la_target.isa.evolution & OPTION_MASK_ISA_FRECIPE)
> > +#define ISA_HAS_DIV32 \
> > +  (la_target.isa.evolution & OPTION_MASK_ISA_DIV32)
> > +#define ISA_HAS_LAM_BH \
> > +  (la_target.isa.evolution & OPTION_MASK_ISA_LAM_BH)
> > +#define ISA_HAS_LAMCAS \
> > +  (la_target.isa.evolution & OPTION_MASK_ISA_LAM_BH)
> > +#define ISA_HAS_LD_SEQ_SA \
> > +  (la_target.isa.evolution & OPTION_MASK_ISA_LD_SEQ_SA)
> 
> Should every occurrence of TARGET_DIV32 etc. be replaced with
> ISA_HAS_DIV32 etc. in the code base?  It seems some of them are not
> replaced.

Thanks! I will fix that soon.

Yujie

[PATCH] LoongArch: Implement option save/restore

[Yang Yujie]

LTO option streaming and target attributes both require per-function
target configuration, which is achieved via option save/restore.

We implement TARGET_OPTION_{SAVE,RESTORE} to switch the la_target
context in addition to other automatically maintained option states
(via the "Save" option property in the .opt files).

Tested on loongarch64-linux-gnu without regression.

PR target/113233

gcc/ChangeLog:

* config/loongarch/genopts/loongarch.opt.in: Mark options with
the "Save" property.
* config/loongarch/loongarch.opt: Same.
* config/loongarch/loongarch-opts.cc: Refresh -mcmodel= state
according to la_target.
* config/loongarch/loongarch.cc: Implement TARGET_OPTION_{SAVE,
RESTORE} for the la_target structure; Rename option conditions
to have the same "la_" prefix.
* config/loongarch/loongarch.h: Same.
---
 gcc/config/loongarch/genopts/loongarch.opt.in | 38 
 gcc/config/loongarch/loongarch-opts.cc|  7 ++
 gcc/config/loongarch/loongarch.cc | 90 +++
 gcc/config/loongarch/loongarch.h  |  2 +-
 gcc/config/loongarch/loongarch.opt| 38 
 5 files changed, 121 insertions(+), 54 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index 1dbd3ad1e3f..02f918053f5 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -50,7 +50,7 @@ EnumValue
 Enum(isa_ext_fpu) String(@@STR_ISA_EXT_FPU64@@) Value(ISA_EXT_FPU64)
 
 m@@OPTSTR_ISA_EXT_FPU@@=
-Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) 
Init(M_OPT_UNSET)
+Target RejectNegative Joined ToLower Enum(isa_ext_fpu) Var(la_opt_fpu) 
Init(M_OPT_UNSET) Save
 -m@@OPTSTR_ISA_EXT_FPU@@=FPU   Generate code for the given FPU.
 
 m@@OPTSTR_ISA_EXT_FPU@@=@@STR_ISA_EXT_FPU0@@
@@ -82,7 +82,7 @@ EnumValue
 Enum(isa_ext_simd) String(@@STR_ISA_EXT_LASX@@) Value(ISA_EXT_SIMD_LASX)
 
 m@@OPTSTR_ISA_EXT_SIMD@@=
-Target RejectNegative Joined ToLower Enum(isa_ext_simd) Var(la_opt_simd) 
Init(M_OPT_UNSET)
+Target RejectNegative Joined ToLower Enum(isa_ext_simd) Var(la_opt_simd) 
Init(M_OPT_UNSET) Save
 -m@@OPTSTR_ISA_EXT_SIMD@@=SIMD Generate code for the given SIMD extension.
 
 m@@STR_ISA_EXT_LSX@@
@@ -114,11 +114,11 @@ EnumValue
 Enum(cpu_type) String(@@STR_CPU_LA664@@) Value(CPU_LA664)
 
 m@@OPTSTR_ARCH@@=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) 
Init(M_OPT_UNSET)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_arch) 
Init(M_OPT_UNSET) Save
 -m@@OPTSTR_ARCH@@=PROCESSORGenerate code for the given PROCESSOR ISA.
 
 m@@OPTSTR_TUNE@@=
-Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) 
Init(M_OPT_UNSET)
+Target RejectNegative Joined Enum(cpu_type) Var(la_opt_cpu_tune) 
Init(M_OPT_UNSET) Save
 -m@@OPTSTR_TUNE@@=PROCESSORGenerate optimized code for PROCESSOR.
 
 
@@ -149,31 +149,31 @@ Variable
 int la_opt_abi_ext = M_OPT_UNSET
 
 mbranch-cost=
-Target RejectNegative Joined UInteger Var(loongarch_branch_cost)
+Target RejectNegative Joined UInteger Var(la_branch_cost) Save
 -mbranch-cost=COST Set the cost of branches to roughly COST instructions.
 
 mcheck-zero-division
-Target Mask(CHECK_ZERO_DIV)
+Target Mask(CHECK_ZERO_DIV) Save
 Trap on integer divide by zero.
 
 mcond-move-int
-Target Var(TARGET_COND_MOVE_INT) Init(1)
+Target Mask(COND_MOVE_INT) Save
 Conditional moves for integral are enabled.
 
 mcond-move-float
-Target Var(TARGET_COND_MOVE_FLOAT) Init(1)
+Target Mask(COND_MOVE_FLOAT) Save
 Conditional moves for float are enabled.
 
 mmemcpy
-Target Mask(MEMCPY)
+Target Mask(MEMCPY) Save
 Prevent optimizing block moves, which is also the default behavior of -Os.
 
 mstrict-align
-Target Var(TARGET_STRICT_ALIGN) Init(0)
+Target Mask(STRICT_ALIGN) Save
 Do not generate unaligned memory accesses.
 
 mmax-inline-memcpy-size=
-Target Joined RejectNegative UInteger Var(loongarch_max_inline_memcpy_size) 
Init(1024)
+Target Joined RejectNegative UInteger Var(la_max_inline_memcpy_size) 
Init(1024) Save
 -mmax-inline-memcpy-size=SIZE  Set the max size of memcpy to inline, default 
is 1024.
 
 Enum
@@ -198,11 +198,11 @@ Target Alias(mexplicit-relocs=, always, none)
 Use %reloc() assembly operators (for backward compatibility).
 
 mrecip
-Target RejectNegative Var(loongarch_recip)
+Target RejectNegative Var(la_recip) Save
 Generate approximate reciprocal divide and square root for better throughput.
 
 mrecip=
-Target RejectNegative Joined Var(loongarch_recip_name)
+Target RejectNegative Joined Var(la_recip_name) Save
 Control generation of reciprocal estimates.
 
 ; The code model option names for -mcmodel.
@@ -229,29 +229,29 @@ EnumValue
 Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME)
 
 mcmodel=
-Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(M_OPT_UNSET)
+Target RejectNegative Joined Enum(cmodel) 

[PATCH 3/4] LoongArch: Use enums for constants

[Yang Yujie]

Target features constants from loongarch-def.h are currently defined as macros.
Switch to enums for better look in the debugger.

gcc/ChangeLog:

* config/loongarch/loongarch-def.h: Define constants with
enums instead of Macros.
---
 gcc/config/loongarch/loongarch-def.h | 115 ---
 1 file changed, 67 insertions(+), 48 deletions(-)

diff --git a/gcc/config/loongarch/loongarch-def.h 
b/gcc/config/loongarch/loongarch-def.h
index f8cb3adf509..a1237ecf1fd 100644
--- a/gcc/config/loongarch/loongarch-def.h
+++ b/gcc/config/loongarch/loongarch-def.h
@@ -23,12 +23,10 @@ along with GCC; see the file COPYING3.  If not see
 - ISA extensions   (isa_ext),
 - base ABI types   (abi_base),
 - ABI extension types  (abi_ext).
-
-- code models(cmodel)
-- other command-line switches (switch)
+- code models  (cmodel)
 
These values are primarily used for implementing option handling
-   logic in "loongarch.opt", "loongarch-driver.c" and "loongarch-opt.c".
+   logic in "loongarch.opt", "loongarch-driver.cc" and "loongarch-opt.cc".
 
As for the result of this option handling process, the following
scheme is adopted to represent the final configuration:
@@ -53,30 +51,40 @@ along with GCC; see the file COPYING3.  If not see
 #include "loongarch-def-array.h"
 #include "loongarch-tune.h"
 
-/* enum isa_base */
 
-/* LoongArch64 */
-#define ISA_BASE_LA640
-#define N_ISA_BASE_TYPES  1
+/* ISA base */
+enum {
+  ISA_BASE_LA64= 0,  /* LoongArch64 */
+  N_ISA_BASE_TYPES = 1
+};
+
 extern loongarch_def_array
   loongarch_isa_base_strings;
 
-/* enum isa_ext_* */
-#define ISA_EXT_NONE 0
-#define ISA_EXT_FPU321
-#define ISA_EXT_FPU642
-#define N_ISA_EXT_FPU_TYPES   3
-#define ISA_EXT_SIMD_LSX  3
-#define ISA_EXT_SIMD_LASX 4
-#define N_ISA_EXT_TYPES  5
+
+/* ISA extensions */
+enum {
+  ISA_EXT_NONE = 0,
+  ISA_EXT_FPU32= 1,
+  ISA_EXT_FPU64= 2,
+  N_ISA_EXT_FPU_TYPES   = 3,
+  ISA_EXT_SIMD_LSX  = 3,
+  ISA_EXT_SIMD_LASX = 4,
+  N_ISA_EXT_TYPES  = 5
+};
+
 extern loongarch_def_array
   loongarch_isa_ext_strings;
 
-/* enum abi_base */
-#define ABI_BASE_LP64D   0
-#define ABI_BASE_LP64F   1
-#define ABI_BASE_LP64S   2
-#define N_ABI_BASE_TYPES  3
+
+/* Base ABI */
+enum {
+  ABI_BASE_LP64D   = 0,
+  ABI_BASE_LP64F   = 1,
+  ABI_BASE_LP64S   = 2,
+  N_ABI_BASE_TYPES = 3
+};
+
 extern loongarch_def_array
   loongarch_abi_base_strings;
 
@@ -90,28 +98,38 @@ extern loongarch_def_array
   (abi_base == ABI_BASE_LP64S)
 
 
-/* enum abi_ext */
-#define ABI_EXT_BASE 0
-#define N_ABI_EXT_TYPES  1
+/* ABI Extension */
+enum {
+  ABI_EXT_BASE = 0,
+  N_ABI_EXT_TYPES  = 1
+};
+
 extern loongarch_def_array
   loongarch_abi_ext_strings;
 
-/* enum cmodel */
-#define CMODEL_NORMAL0
-#define CMODEL_TINY  1
-#define CMODEL_TINY_STATIC2
-#define CMODEL_MEDIUM3
-#define CMODEL_LARGE 4
-#define CMODEL_EXTREME   5
-#define N_CMODEL_TYPES   6
+
+/* Code Model */
+enum {
+  CMODEL_NORMAL= 0,
+  CMODEL_TINY  = 1,
+  CMODEL_TINY_STATIC   = 2,
+  CMODEL_MEDIUM= 3,
+  CMODEL_LARGE = 4,
+  CMODEL_EXTREME   = 5,
+  N_CMODEL_TYPES   = 6
+};
+
 extern loongarch_def_array
   loongarch_cmodel_strings;
 
-/* enum explicit_relocs */
-#define EXPLICIT_RELOCS_AUTO   0
-#define EXPLICIT_RELOCS_NONE   1
-#define EXPLICIT_RELOCS_ALWAYS 2
-#define N_EXPLICIT_RELOCS_TYPES3
+
+/* Explicit Reloc Type */
+enum {
+  EXPLICIT_RELOCS_AUTO = 0,
+  EXPLICIT_RELOCS_NONE = 1,
+  EXPLICIT_RELOCS_ALWAYS= 2,
+  N_EXPLICIT_RELOCS_TYPES   = 3
+};
 
 /* The common default value for variables whose assignments
are triggered by command-line options.  */
@@ -159,17 +177,18 @@ struct loongarch_target
   int cmodel;  /* CMODEL_ */
 };
 
-/* CPU properties.  */
-/* index */
-#define CPU_NATIVE   0
-#define CPU_ABI_DEFAULT   1
-#define CPU_LOONGARCH64  2
-#define CPU_LA4643
-#define CPU_LA6644
-#define N_ARCH_TYPES 5
-#define N_TUNE_TYPES 5
-
-/* parallel tables.  */
+/* CPU model */
+enum {
+  CPU_NATIVE   = 0,
+  CPU_ABI_DEFAULT   = 1,
+  CPU_LOONGARCH64   = 2,
+  CPU_LA464= 3,
+  CPU_LA664= 4,
+  N_ARCH_TYPES = 5,
+  N_TUNE_TYPES = 5
+};
+
+/* CPU model properties */
 extern loongarch_def_array
   loongarch_cpu_strings;
 extern loongarch_def_array
-- 
2.43.0

[PATCH 0/4] LoongArch: Adjust option handling code (1st patchset)

[Yang Yujie]

This patchset performs some code cleanup, and is bootstrapped and regtested
on loongarch64-linux-gnu.

Yang Yujie (4):
  LoongArch: Handle ISA evolution switches along with other options
  LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64
  LoongArch: Use enums for constants
  LoongArch: Simplify -mexplicit-reloc definitions

 gcc/config/loongarch/genopts/genstr.sh|   2 +-
 .../loongarch/genopts/loongarch-strings   |   8 +-
 gcc/config/loongarch/genopts/loongarch.opt.in |  16 +--
 gcc/config/loongarch/lasx.md  |   4 +-
 gcc/config/loongarch/loongarch-builtins.cc|   6 +-
 gcc/config/loongarch/loongarch-c.cc   |   2 +-
 gcc/config/loongarch/loongarch-cpu.cc |   2 +-
 gcc/config/loongarch/loongarch-def.cc |  14 +-
 gcc/config/loongarch/loongarch-def.h  | 120 +++---
 gcc/config/loongarch/loongarch-driver.cc  |   5 +-
 gcc/config/loongarch/loongarch-opts.cc|  27 +++-
 gcc/config/loongarch/loongarch-opts.h |  26 +++-
 gcc/config/loongarch/loongarch-str.h  |   7 +-
 gcc/config/loongarch/loongarch.cc |  32 ++---
 gcc/config/loongarch/loongarch.md |   4 +-
 gcc/config/loongarch/loongarch.opt|  20 +--
 gcc/config/loongarch/lsx.md   |   4 +-
 17 files changed, 163 insertions(+), 136 deletions(-)

-- 
2.43.0

[PATCH 4/4] LoongArch: Simplify -mexplicit-reloc definitions

[Yang Yujie]

Since we do not need printing or manual parsing of this option,
(whether in the driver or for target attributes to be supported later)
it can be handled in the .opt file framework.

gcc/ChangeLog:

* config/loongarch/genopts/loongarch-strings: Remove explicit-reloc
argument string definitions.
* config/loongarch/loongarch-str.h: Same.
* config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]explicit-relocs
as aliases to -mexplicit-relocs={always,none}
* config/loongarch/genopts/loongarch.opt: Same.
* config/loongarch/loongarch.cc: Same.
---
 gcc/config/loongarch/genopts/loongarch-strings |  6 --
 gcc/config/loongarch/genopts/loongarch.opt.in  |  8 
 gcc/config/loongarch/loongarch-str.h   |  5 -
 gcc/config/loongarch/loongarch.cc  | 12 
 gcc/config/loongarch/loongarch.opt |  2 +-
 5 files changed, 5 insertions(+), 28 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch-strings 
b/gcc/config/loongarch/genopts/loongarch-strings
index ba47be31227..e434a89c9ee 100644
--- a/gcc/config/loongarch/genopts/loongarch-strings
+++ b/gcc/config/loongarch/genopts/loongarch-strings
@@ -64,9 +64,3 @@ STR_CMODEL_TS   tiny-static
 STR_CMODEL_MEDIUM medium
 STR_CMODEL_LARGE  large
 STR_CMODEL_EXTREMEextreme
-
-# -mexplicit-relocs
-OPTSTR_EXPLICIT_RELOCS explicit-relocs
-STR_EXPLICIT_RELOCS_AUTO   auto
-STR_EXPLICIT_RELOCS_NONE   none
-STR_EXPLICIT_RELOCS_ALWAYS always
diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index 38ac347c660..1dbd3ad1e3f 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -181,20 +181,20 @@ Name(explicit_relocs) Type(int)
 The code model option names for -mexplicit-relocs:
 
 EnumValue
-Enum(explicit_relocs) String(@@STR_EXPLICIT_RELOCS_AUTO@@) 
Value(EXPLICIT_RELOCS_AUTO)
+Enum(explicit_relocs) String(auto) Value(EXPLICIT_RELOCS_AUTO)
 
 EnumValue
-Enum(explicit_relocs) String(@@STR_EXPLICIT_RELOCS_NONE@@) 
Value(EXPLICIT_RELOCS_NONE)
+Enum(explicit_relocs) String(none) Value(EXPLICIT_RELOCS_NONE)
 
 EnumValue
-Enum(explicit_relocs) String(@@STR_EXPLICIT_RELOCS_ALWAYS@@) 
Value(EXPLICIT_RELOCS_ALWAYS)
+Enum(explicit_relocs) String(always) Value(EXPLICIT_RELOCS_ALWAYS)
 
 mexplicit-relocs=
 Target RejectNegative Joined Enum(explicit_relocs) Var(la_opt_explicit_relocs) 
Init(M_OPT_UNSET)
 Use %reloc() assembly operators.
 
 mexplicit-relocs
-Target Var(la_opt_explicit_relocs_backward) Init(M_OPT_UNSET)
+Target Alias(mexplicit-relocs=, always, none)
 Use %reloc() assembly operators (for backward compatibility).
 
 mrecip
diff --git a/gcc/config/loongarch/loongarch-str.h 
b/gcc/config/loongarch/loongarch-str.h
index 0a6a36c5783..20da2b169ed 100644
--- a/gcc/config/loongarch/loongarch-str.h
+++ b/gcc/config/loongarch/loongarch-str.h
@@ -63,11 +63,6 @@ along with GCC; see the file COPYING3.  If not see
 #define STR_CMODEL_LARGE "large"
 #define STR_CMODEL_EXTREME "extreme"
 
-#define OPTSTR_EXPLICIT_RELOCS "explicit-relocs"
-#define STR_EXPLICIT_RELOCS_AUTO "auto"
-#define STR_EXPLICIT_RELOCS_NONE "none"
-#define STR_EXPLICIT_RELOCS_ALWAYS "always"
-
 #define OPTSTR_FRECIPE "frecipe"
 #define OPTSTR_DIV32   "div32"
 #define OPTSTR_LAM_BH  "lam-bh"
diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index ce760fda009..8379ae28606 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7533,18 +7533,6 @@ loongarch_option_override_internal (struct gcc_options 
*opts,
   loongarch_update_gcc_opt_status (_target, opts, opts_set);
   loongarch_cpu_option_override (_target, opts, opts_set);
 
-  if (la_opt_explicit_relocs != M_OPT_UNSET
-  && la_opt_explicit_relocs_backward != M_OPT_UNSET)
-error ("do not use %qs (with %qs) and %qs (without %qs) together",
-  "-mexplicit-relocs=", "=",
-  la_opt_explicit_relocs_backward ? "-mexplicit-relocs"
-  : "-mno-explicit-relocs", "=");
-
-  if (la_opt_explicit_relocs_backward != M_OPT_UNSET)
-la_opt_explicit_relocs = (la_opt_explicit_relocs_backward
- ? EXPLICIT_RELOCS_ALWAYS
- : EXPLICIT_RELOCS_NONE);
-
   if (la_opt_explicit_relocs == M_OPT_UNSET)
 la_opt_explicit_relocs = (HAVE_AS_EXPLICIT_RELOCS
  ? (loongarch_mrelax
diff --git a/gcc/config/loongarch/loongarch.opt 
b/gcc/config/loongarch/loongarch.opt
index 76b42d51d09..adb2304fbd5 100644
--- a/gcc/config/loongarch/loongarch.opt
+++ b/gcc/config/loongarch/loongarch.opt
@@ -202,7 +202,7 @@ Target RejectNegative Joined Enum(explicit_relocs) 
Var(la_opt_explicit_relocs) I
 Use %reloc() assembly operators.
 
 mexplicit-relocs
-Target Var(la_opt_explicit_relocs_backward) Init(M_OPT_UNSET)
+Target Alias(mexplicit-relocs=, 

[PATCH 2/4] LoongArch: Rename ISA_BASE_LA64V100 to ISA_BASE_LA64

[Yang Yujie]

LoongArch ISA manual v1.10 suggests that software should not depend on
the ISA version number for marking processor features.  The ISA version
number is now defined as a collective name of individual ISA evolutions.
Since there is a independent ISA evolution mask now, we can drop the
version information from the base ISA.

gcc/ChangeLog:

* config/loongarch/genopts/loongarch-strings: Rename.
* config/loongarch/genopts/loongarch.opt.in: Same.
* config/loongarch/loongarch-cpu.cc: Same.
* config/loongarch/loongarch-def.cc: Same.
* config/loongarch/loongarch-def.h: Same.
* config/loongarch/loongarch-opts.cc: Same.
* config/loongarch/loongarch-opts.h: Same.
* config/loongarch/loongarch-str.h: Same.
* config/loongarch/loongarch.opt: Same.
---
 gcc/config/loongarch/genopts/loongarch-strings |  2 +-
 gcc/config/loongarch/genopts/loongarch.opt.in  |  2 +-
 gcc/config/loongarch/loongarch-cpu.cc  |  2 +-
 gcc/config/loongarch/loongarch-def.cc  | 14 +++---
 gcc/config/loongarch/loongarch-def.h   |  6 +++---
 gcc/config/loongarch/loongarch-opts.cc | 10 +-
 gcc/config/loongarch/loongarch-opts.h  |  2 +-
 gcc/config/loongarch/loongarch-str.h   |  2 +-
 gcc/config/loongarch/loongarch.opt |  2 +-
 9 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/gcc/config/loongarch/genopts/loongarch-strings 
b/gcc/config/loongarch/genopts/loongarch-strings
index f40b014f017..ba47be31227 100644
--- a/gcc/config/loongarch/genopts/loongarch-strings
+++ b/gcc/config/loongarch/genopts/loongarch-strings
@@ -29,7 +29,7 @@ STR_CPU_LA464   la464
 STR_CPU_LA664la664
 
 # Base architecture
-STR_ISA_BASE_LA64V100 la64
+STR_ISA_BASE_LA64 la64
 
 # -mfpu
 OPTSTR_ISA_EXT_FPUfpu
diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index e643deacd21..38ac347c660 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -33,7 +33,7 @@ Name(isa_base) Type(int)
 Basic ISAs of LoongArch:
 
 EnumValue
-Enum(isa_base) String(@@STR_ISA_BASE_LA64V100@@) Value(ISA_BASE_LA64V100)
+Enum(isa_base) String(@@STR_ISA_BASE_LA64@@) Value(ISA_BASE_LA64)
 
 ;; ISA extensions / adjustments
 Enum
diff --git a/gcc/config/loongarch/loongarch-cpu.cc 
b/gcc/config/loongarch/loongarch-cpu.cc
index e1771fc0b4f..97ac5fed9d8 100644
--- a/gcc/config/loongarch/loongarch-cpu.cc
+++ b/gcc/config/loongarch/loongarch-cpu.cc
@@ -133,7 +133,7 @@ fill_native_cpu_config (struct loongarch_target *tgt)
switch (cpucfg_cache[1] & 0x3)
  {
case 0x02:
- tmp = ISA_BASE_LA64V100;
+ tmp = ISA_BASE_LA64;
  break;
 
default:
diff --git a/gcc/config/loongarch/loongarch-def.cc 
b/gcc/config/loongarch/loongarch-def.cc
index 48d28315064..e8c129ce643 100644
--- a/gcc/config/loongarch/loongarch-def.cc
+++ b/gcc/config/loongarch/loongarch-def.cc
@@ -48,16 +48,16 @@ array_arch loongarch_cpu_default_isa =
   array_arch ()
 .set (CPU_LOONGARCH64,
  loongarch_isa ()
-   .base_ (ISA_BASE_LA64V100)
+   .base_ (ISA_BASE_LA64)
.fpu_ (ISA_EXT_FPU64))
 .set (CPU_LA464,
  loongarch_isa ()
-   .base_ (ISA_BASE_LA64V100)
+   .base_ (ISA_BASE_LA64)
.fpu_ (ISA_EXT_FPU64)
.simd_ (ISA_EXT_SIMD_LASX))
 .set (CPU_LA664,
  loongarch_isa ()
-   .base_ (ISA_BASE_LA64V100)
+   .base_ (ISA_BASE_LA64)
.fpu_ (ISA_EXT_FPU64)
.simd_ (ISA_EXT_SIMD_LASX)
.evolution_ (OPTION_MASK_ISA_DIV32 | OPTION_MASK_ISA_LD_SEQ_SA
@@ -153,7 +153,7 @@ array_tune loongarch_cpu_multipass_dfa_lookahead = 
array_tune ()
 
 array loongarch_isa_base_strings =
   array ()
-.set (ISA_BASE_LA64V100, STR_ISA_BASE_LA64V100);
+.set (ISA_BASE_LA64, STR_ISA_BASE_LA64);
 
 array loongarch_isa_ext_strings =
   array ()
@@ -189,15 +189,15 @@ array, 
N_ABI_BASE_TYPES>
  array ()
.set (ABI_EXT_BASE,
  loongarch_isa ()
-   .base_ (ISA_BASE_LA64V100)
+   .base_ (ISA_BASE_LA64)
.fpu_ (ISA_EXT_FPU64)))
 .set (ABI_BASE_LP64F,
  array ()
.set (ABI_EXT_BASE,
  loongarch_isa ()
-   .base_ (ISA_BASE_LA64V100)
+   .base_ (ISA_BASE_LA64)
.fpu_ (ISA_EXT_FPU32)))
 .set (ABI_BASE_LP64S,
  array ()
.set (ABI_EXT_BASE,
- loongarch_isa ().base_ (ISA_BASE_LA64V100)));
+ loongarch_isa ().base_ (ISA_BASE_LA64)));
diff --git a/gcc/config/loongarch/loongarch-def.h 
b/gcc/config/loongarch/loongarch-def.h
index 1fab4f4d315..f8cb3adf509 100644
--- a/gcc/config/loongarch/loongarch-def.h
+++ b/gcc/config/loongarch/loongarch-def.h
@@ -55,9 +55,9 @@ 

[PATCH 1/4] LoongArch: Handle ISA evolution switches along with other options

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/genopts/genstr.sh: Prepend the isa_evolution
variable with the common la_ prefix.
* config/loongarch/genopts/loongarch.opt.in: Mark ISA evolution
flags as saved using TargetVariable.
* config/loongarch/loongarch.opt: Same.
* config/loongarch/loongarch-def.h: Define evolution_set to
mark changes to the -march default.
* config/loongarch/loongarch-driver.cc: Same.
* config/loongarch/loongarch-opts.cc: Same.
* config/loongarch/loongarch-opts.h: Define and use ISA evolution
conditions around the la_target structure.
* config/loongarch/loongarch.cc: Same.
* config/loongarch/loongarch.md: Same.
* config/loongarch/loongarch-builtins.cc: Same.
* config/loongarch/loongarch-c.cc: Same.
* config/loongarch/lasx.md: Same.
* config/loongarch/lsx.md: Same.
---
 gcc/config/loongarch/genopts/genstr.sh|  2 +-
 gcc/config/loongarch/genopts/loongarch.opt.in |  6 ++---
 gcc/config/loongarch/lasx.md  |  4 ++--
 gcc/config/loongarch/loongarch-builtins.cc|  6 ++---
 gcc/config/loongarch/loongarch-c.cc   |  2 +-
 gcc/config/loongarch/loongarch-def.h  |  5 +++-
 gcc/config/loongarch/loongarch-driver.cc  |  5 ++--
 gcc/config/loongarch/loongarch-opts.cc| 17 -
 gcc/config/loongarch/loongarch-opts.h | 24 +++
 gcc/config/loongarch/loongarch.cc | 20 +++-
 gcc/config/loongarch/loongarch.md |  4 ++--
 gcc/config/loongarch/loongarch.opt| 16 ++---
 gcc/config/loongarch/lsx.md   |  4 ++--
 13 files changed, 73 insertions(+), 42 deletions(-)

diff --git a/gcc/config/loongarch/genopts/genstr.sh 
b/gcc/config/loongarch/genopts/genstr.sh
index 5865b87d516..724c9aaedac 100755
--- a/gcc/config/loongarch/genopts/genstr.sh
+++ b/gcc/config/loongarch/genopts/genstr.sh
@@ -107,7 +107,7 @@ EOF
   print("")
   print("m"$3)
   gsub(/-/, "_", $3)
-  print("Target Mask(ISA_"toupper($3)") Var(isa_evolution)")
+  print("Target Mask(ISA_"toupper($3)") Var(la_isa_evolution)")
   $1=""; $2=""; $3=""
   sub(/^ */, "", $0)
   print($0)
diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in 
b/gcc/config/loongarch/genopts/loongarch.opt.in
index f2e7ea2ef2f..e643deacd21 100644
--- a/gcc/config/loongarch/genopts/loongarch.opt.in
+++ b/gcc/config/loongarch/genopts/loongarch.opt.in
@@ -259,6 +259,6 @@ default value is 4.
 ; Features added during ISA evolution.  This concept is different from ISA
 ; extension, read Section 1.5 of LoongArch v1.10 Volume 1 for the
 ; explanation.  These features may be implemented and enumerated with
-; CPUCFG independantly, so we use bit flags to specify them.
-Variable
-HOST_WIDE_INT isa_evolution = 0
+; CPUCFG independently, so we use bit flags to specify them.
+TargetVariable
+HOST_WIDE_INT la_isa_evolution = 0
diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md
index 027021b45d5..429c59504b9 100644
--- a/gcc/config/loongarch/lasx.md
+++ b/gcc/config/loongarch/lasx.md
@@ -1539,7 +1539,7 @@ (define_insn "lasx_xvfrecipe_"
   [(set (match_operand:FLASX 0 "register_operand" "=f")
 (unspec:FLASX [(match_operand:FLASX 1 "register_operand" "f")]
  UNSPEC_LASX_XVFRECIPE))]
-  "ISA_HAS_LASX && TARGET_FRECIPE"
+  "ISA_HAS_LASX && ISA_HAS_FRECIPE"
   "xvfrecipe.\t%u0,%u1"
   [(set_attr "type" "simd_fdiv")
(set_attr "mode" "")])
@@ -1572,7 +1572,7 @@ (define_insn "lasx_xvfrsqrte_"
   [(set (match_operand:FLASX 0 "register_operand" "=f")
 (unspec:FLASX [(match_operand:FLASX 1 "register_operand" "f")]
  UNSPEC_LASX_XVFRSQRTE))]
-  "ISA_HAS_LASX && TARGET_FRECIPE"
+  "ISA_HAS_LASX && ISA_HAS_FRECIPE"
   "xvfrsqrte.\t%u0,%u1"
   [(set_attr "type" "simd_fdiv")
(set_attr "mode" "")])
diff --git a/gcc/config/loongarch/loongarch-builtins.cc 
b/gcc/config/loongarch/loongarch-builtins.cc
index 45ec6aca030..efe7e5e5ebc 100644
--- a/gcc/config/loongarch/loongarch-builtins.cc
+++ b/gcc/config/loongarch/loongarch-builtins.cc
@@ -120,9 +120,9 @@ struct loongarch_builtin_description
 AVAIL_ALL (hard_float, TARGET_HARD_FLOAT_ABI)
 AVAIL_ALL (lsx, ISA_HAS_LSX)
 AVAIL_ALL (lasx, ISA_HAS_LASX)
-AVAIL_ALL (frecipe, TARGET_FRECIPE && TARGET_HARD_FLOAT_ABI)
-AVAIL_ALL (lsx_frecipe, ISA_HAS_LSX && TARGET_FRECIPE)
-AVAIL_ALL (lasx_frecipe, ISA_HAS_LASX && TARGET_FRECIPE)
+AVAIL_ALL (frecipe, ISA_HAS_FRECIPE && TARGET_HARD_FLOAT_ABI)
+AVAIL_ALL (lsx_frecipe, ISA_HAS_LSX && ISA_HAS_FRECIPE)
+AVAIL_ALL (lasx_frecipe, ISA_HAS_LASX && ISA_HAS_FRECIPE)
 
 /* Construct a loongarch_builtin_description from the given arguments.
 
diff --git a/gcc/config/loongarch/loongarch-c.cc 
b/gcc/config/loongarch/loongarch-c.cc
index 118b1512e1e..4d88c1729ff 100644
--- a/gcc/config/loongarch/loongarch-c.cc
+++ b/gcc/config/loongarch/loongarch-c.cc
@@ -102,7 

[PATCH v3 2/2] libphobos: Update build scripts for LoongArch64.

[Yang Yujie]

libphobos/ChangeLog:

* m4/druntime/cpu.m4: Support loongarch* targets.
* libdruntime/Makefile.am: Same.
* libdruntime/Makefile.in: Regenerate.
* configure: Regenerate.
---
 libphobos/configure   | 21 ++-
 libphobos/libdruntime/Makefile.am |  3 +
 libphobos/libdruntime/Makefile.in | 98 +++
 libphobos/m4/druntime/cpu.m4  |  5 ++
 4 files changed, 87 insertions(+), 40 deletions(-)

diff --git a/libphobos/configure b/libphobos/configure
index 25b13bdd93e..9a59bad34ac 100755
--- a/libphobos/configure
+++ b/libphobos/configure
@@ -696,6 +696,8 @@ DRUNTIME_CPU_POWERPC_FALSE
 DRUNTIME_CPU_POWERPC_TRUE
 DRUNTIME_CPU_MIPS_FALSE
 DRUNTIME_CPU_MIPS_TRUE
+DRUNTIME_CPU_LOONGARCH_FALSE
+DRUNTIME_CPU_LOONGARCH_TRUE
 DRUNTIME_CPU_ARM_FALSE
 DRUNTIME_CPU_ARM_TRUE
 DRUNTIME_CPU_AARCH64_FALSE
@@ -11865,7 +11867,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 11868 "configure"
+#line 11870 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -11971,7 +11973,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 11974 "configure"
+#line 11976 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -14305,6 +14307,9 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
;;
   arm*)druntime_target_cpu_parsed="arm"
;;
+  loongarch*)
+   druntime_target_cpu_parsed="loongarch"
+   ;;
   mips*)   druntime_target_cpu_parsed="mips"
;;
   powerpc*)
@@ -14336,6 +14341,14 @@ else
   DRUNTIME_CPU_ARM_FALSE=
 fi
 
+   if test "$druntime_target_cpu_parsed" = "loongarch"; then
+  DRUNTIME_CPU_LOONGARCH_TRUE=
+  DRUNTIME_CPU_LOONGARCH_FALSE='#'
+else
+  DRUNTIME_CPU_LOONGARCH_TRUE='#'
+  DRUNTIME_CPU_LOONGARCH_FALSE=
+fi
+
if test "$druntime_target_cpu_parsed" = "mips"; then
   DRUNTIME_CPU_MIPS_TRUE=
   DRUNTIME_CPU_MIPS_FALSE='#'
@@ -15997,6 +16010,10 @@ if test -z "${DRUNTIME_CPU_ARM_TRUE}" && test -z 
"${DRUNTIME_CPU_ARM_FALSE}"; th
   as_fn_error $? "conditional \"DRUNTIME_CPU_ARM\" was never defined.
 Usually this means the macro was only invoked conditionally." "$LINENO" 5
 fi
+if test -z "${DRUNTIME_CPU_LOONGARCH_TRUE}" && test -z 
"${DRUNTIME_CPU_LOONGARCH_FALSE}"; then
+  as_fn_error $? "conditional \"DRUNTIME_CPU_LOONGARCH\" was never defined.
+Usually this means the macro was only invoked conditionally." "$LINENO" 5
+fi
 if test -z "${DRUNTIME_CPU_MIPS_TRUE}" && test -z 
"${DRUNTIME_CPU_MIPS_FALSE}"; then
   as_fn_error $? "conditional \"DRUNTIME_CPU_MIPS\" was never defined.
 Usually this means the macro was only invoked conditionally." "$LINENO" 5
diff --git a/libphobos/libdruntime/Makefile.am 
b/libphobos/libdruntime/Makefile.am
index 23205fd3301..ca43a0753c4 100644
--- a/libphobos/libdruntime/Makefile.am
+++ b/libphobos/libdruntime/Makefile.am
@@ -83,6 +83,9 @@ endif
 if DRUNTIME_CPU_ARM
 DRUNTIME_SOURCES_CONFIGURED += config/arm/switchcontext.S
 endif
+if DRUNTIME_CPU_LOONGARCH
+DRUNTIME_SOURCES_CONFIGURED += config/loongarch/switchcontext.S
+endif
 if DRUNTIME_CPU_MIPS
 DRUNTIME_SOURCES_CONFIGURED += config/mips/switchcontext.S
 endif
diff --git a/libphobos/libdruntime/Makefile.in 
b/libphobos/libdruntime/Makefile.in
index 410245d71ca..f52bf36c282 100644
--- a/libphobos/libdruntime/Makefile.in
+++ b/libphobos/libdruntime/Makefile.in
@@ -124,12 +124,13 @@ target_triplet = @target@
 # CPU specific sources
 @DRUNTIME_CPU_AARCH64_TRUE@am__append_11 = config/aarch64/switchcontext.S
 @DRUNTIME_CPU_ARM_TRUE@am__append_12 = config/arm/switchcontext.S
-@DRUNTIME_CPU_MIPS_TRUE@am__append_13 = config/mips/switchcontext.S
-@DRUNTIME_CPU_POWERPC_TRUE@am__append_14 = config/powerpc/switchcontext.S
-@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_TRUE@am__append_15 = 
config/mingw/switchcontext.S
-@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_FALSE@am__append_16 = 
config/x86/switchcontext.S
-@DRUNTIME_CPU_SYSTEMZ_TRUE@am__append_17 = config/systemz/get_tls_offset.S
-@DRUNTIME_CPU_S390_TRUE@am__append_18 = config/s390/get_tls_offset.S
+@DRUNTIME_CPU_LOONGARCH_TRUE@am__append_13 = config/loongarch/switchcontext.S
+@DRUNTIME_CPU_MIPS_TRUE@am__append_14 = config/mips/switchcontext.S
+@DRUNTIME_CPU_POWERPC_TRUE@am__append_15 = config/powerpc/switchcontext.S
+@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_TRUE@am__append_16 = 
config/mingw/switchcontext.S
+@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_FALSE@am__append_17 = 
config/x86/switchcontext.S
+@DRUNTIME_CPU_SYSTEMZ_TRUE@am__append_18 = config/systemz/get_tls_offset.S
+@DRUNTIME_CPU_S390_TRUE@am__append_19 = config/s390/get_tls_offset.S
 subdir = libdruntime
 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -485,46 +486,50 @@ am__objects_23 = core/sys/solaris/dlfcn.lo 
core/sys/solaris/elf.lo \
 

[PATCH v3 1/2] libruntime: Add fiber context switch code for LoongArch.

[Yang Yujie]

libphobos/ChangeLog:

* libdruntime/config/loongarch/switchcontext.S: New file.
---
 .../config/loongarch/switchcontext.S  | 133 ++
 1 file changed, 133 insertions(+)
 create mode 100644 libphobos/libdruntime/config/loongarch/switchcontext.S

diff --git a/libphobos/libdruntime/config/loongarch/switchcontext.S 
b/libphobos/libdruntime/config/loongarch/switchcontext.S
new file mode 100644
index 000..edfb9b67e8f
--- /dev/null
+++ b/libphobos/libdruntime/config/loongarch/switchcontext.S
@@ -0,0 +1,133 @@
+/* LoongArch support code for fibers and multithreading.
+   Copyright (C) 2023 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+.  */
+
+#include "../common/threadasm.S"
+
+/**
+ * Performs a context switch.
+ *
+ * $a0 - void** - ptr to old stack pointer
+ * $a1 - void*  - new stack pointer
+ *
+ */
+
+#if defined(__loongarch_lp64)
+#  define GPR_L ld.d
+#  define GPR_S st.d
+#  define SZ_GPR 8
+#  define ADDSP(si)   addi.d  $sp, $sp, si
+#elif defined(__loongarch64_ilp32)
+#  define GPR_L ld.w
+#  define GPR_S st.w
+#  define SZ_GPR 4
+#  define ADDSP(si)   addi.w  $sp, $sp, si
+#else
+#  error Unsupported GPR size (must be 64-bit or 32-bit).
+#endif
+
+#if defined(__loongarch_double_float)
+#  define FPR_L fld.d
+#  define FPR_S fst.d
+#  define SZ_FPR 8
+#elif defined(__loongarch_single_float)
+#  define FPR_L fld.s
+#  define FPR_S fst.s
+#  define SZ_FPR 4
+#else
+#  define SZ_FPR 0
+#endif
+
+.text
+.align 2
+.global fiber_switchContext
+.type   fiber_switchContext, @function
+fiber_switchContext:
+.cfi_startproc
+ADDSP(-11 * SZ_GPR)
+
+// fp regs and return address are stored below the stack
+// because we don't want the GC to scan them.
+
+// return address (r1)
+GPR_S  $r1, $sp, -SZ_GPR
+
+#if SZ_FPR != 0
+// callee-saved scratch FPRs (f24-f31)
+FPR_S  $f24, $sp, -SZ_GPR-1*SZ_FPR
+FPR_S  $f25, $sp, -SZ_GPR-2*SZ_FPR
+FPR_S  $f26, $sp, -SZ_GPR-3*SZ_FPR
+FPR_S  $f27, $sp, -SZ_GPR-4*SZ_FPR
+FPR_S  $f28, $sp, -SZ_GPR-5*SZ_FPR
+FPR_S  $f29, $sp, -SZ_GPR-6*SZ_FPR
+FPR_S  $f30, $sp, -SZ_GPR-7*SZ_FPR
+FPR_S  $f31, $sp, -SZ_GPR-8*SZ_FPR
+#endif
+
+// callee-saved GPRs (r21, fp (r22), r23-r31)
+GPR_S $r21, $sp, 0*SZ_GPR
+GPR_S  $fp, $sp, 1*SZ_GPR
+GPR_S  $s0, $sp, 2*SZ_GPR
+GPR_S  $s1, $sp, 3*SZ_GPR
+GPR_S  $s2, $sp, 4*SZ_GPR
+GPR_S  $s3, $sp, 5*SZ_GPR
+GPR_S  $s4, $sp, 6*SZ_GPR
+GPR_S  $s5, $sp, 7*SZ_GPR
+GPR_S  $s6, $sp, 8*SZ_GPR
+GPR_S  $s7, $sp, 9*SZ_GPR
+GPR_S  $s8, $sp, 10*SZ_GPR
+
+// swap stack pointer
+GPR_S $sp, $a0, 0
+move $sp, $a1
+
+GPR_L  $r1, $sp, -SZ_GPR
+
+#if SZ_FPR != 0
+FPR_L  $f24, $sp, -SZ_GPR-1*SZ_FPR
+FPR_L  $f25, $sp, -SZ_GPR-2*SZ_FPR
+FPR_L  $f26, $sp, -SZ_GPR-3*SZ_FPR
+FPR_L  $f27, $sp, -SZ_GPR-4*SZ_FPR
+FPR_L  $f28, $sp, -SZ_GPR-5*SZ_FPR
+FPR_L  $f29, $sp, -SZ_GPR-6*SZ_FPR
+FPR_L  $f30, $sp, -SZ_GPR-7*SZ_FPR
+FPR_L  $f31, $sp, -SZ_GPR-8*SZ_FPR
+#endif
+
+GPR_L $r21, $sp, 0*SZ_GPR
+GPR_L  $fp, $sp, 1*SZ_GPR
+GPR_L  $s0, $sp, 2*SZ_GPR
+GPR_L  $s1, $sp, 3*SZ_GPR
+GPR_L  $s2, $sp, 4*SZ_GPR
+GPR_L  $s3, $sp, 5*SZ_GPR
+GPR_L  $s4, $sp, 6*SZ_GPR
+GPR_L  $s5, $sp, 7*SZ_GPR
+GPR_L  $s6, $sp, 8*SZ_GPR
+GPR_L  $s7, $sp, 9*SZ_GPR
+GPR_L  $s8, $sp, 10*SZ_GPR
+
+ADDSP(11 * SZ_GPR)
+
+jr $r1 // return
+.cfi_endproc
+.size fiber_switchContext,.-fiber_switchContext
-- 
2.43.0

[PATCH v3 0/2] LoongArch D support

[Yang Yujie]

This patchset is based on Zixing Liu's initial support patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-September/631260.html

Updates
v1 -> v2: Rebased onto the dmd/druntime upstream state.
v2 -> v3: Dropped unnecessary changes.

Regtested on loongarch64-linux-gnu with the following result:

=== libphobos Summary ===

FAIL: libphobos.config/test22523.d -- --DRT-testmode=run-main execution test
FAIL: libphobos.gc/precisegc.d execution test
FAIL: libphobos.phobos/std/datetime/systime.d (test for excess errors)
UNRESOLVED: libphobos.phobos/std/datetime/systime.d compilation failed to 
produce executable
UNSUPPORTED: libphobos.phobos/std/net/curl.d: skipped test
UNSUPPORTED: libphobos.phobos_shared/std/net/curl.d: skipped test
FAIL: libphobos.shared/loadDR.c -ldl -pthread -g execution test (out-of-tree 
testing)

# of expected passes1024
# of unexpected failures4
# of unresolved testcases   1
# of unsupported tests  2

=== gdc Summary ===

FAIL: gdc.test/runnable/testaa.d   execution test
FAIL: gdc.test/runnable/testaa.d -fPIC   execution test

# of expected passes10353
# of unexpected failures2
# of unsupported tests  631


Yang Yujie (2):
  libruntime: Add fiber context switch code for LoongArch.
  libphobos: Update build scripts for LoongArch64.

 libphobos/configure   |  21 ++-
 libphobos/libdruntime/Makefile.am |   3 +
 libphobos/libdruntime/Makefile.in |  98 -
 .../config/loongarch/switchcontext.S  | 133 ++
 libphobos/m4/druntime/cpu.m4  |   5 +
 5 files changed, 220 insertions(+), 40 deletions(-)
 create mode 100644 libphobos/libdruntime/config/loongarch/switchcontext.S

-- 
2.43.0

[PATCH v5] LoongArch: Fix eh_return epilogue for normal returns.

[Yang Yujie]

On LoongArch, the regitsters $r4 - $r7 (EH_RETURN_DATA_REGNO) will be saved
and restored in the function prologue and epilogue if the given function calls
__builtin_eh_return.  This causes the return value to be overwritten on normal
return paths and breaks a rare case of libgcc's _Unwind_RaiseException.

gcc/ChangeLog:

* config/loongarch/loongarch.cc: Do not restore the saved eh_return
data registers ($r4-$r7) for a normal return of a function that calls
__builtin_eh_return elsewhere.
* config/loongarch/loongarch-protos.h: Same.
* config/loongarch/loongarch.md: Same.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/eh_return-normal-return.c: New test.
---
 gcc/config/loongarch/loongarch-protos.h   |  2 +-
 gcc/config/loongarch/loongarch.cc | 34 -
 gcc/config/loongarch/loongarch.md | 23 ++-
 .../loongarch/eh_return-normal-return.c   | 38 +++
 4 files changed, 84 insertions(+), 13 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c

diff --git a/gcc/config/loongarch/loongarch-protos.h 
b/gcc/config/loongarch/loongarch-protos.h
index cb8fc36b086..af20b5d7132 100644
--- a/gcc/config/loongarch/loongarch-protos.h
+++ b/gcc/config/loongarch/loongarch-protos.h
@@ -60,7 +60,7 @@ enum loongarch_symbol_type {
 extern rtx loongarch_emit_move (rtx, rtx);
 extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
 extern void loongarch_expand_prologue (void);
-extern void loongarch_expand_epilogue (bool);
+extern void loongarch_expand_epilogue (int);
 extern bool loongarch_can_use_return_insn (void);
 
 extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *);
diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index 3545e66a10e..1277c0e9f72 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -1015,7 +1015,8 @@ loongarch_save_restore_reg (machine_mode mode, int regno, 
HOST_WIDE_INT offset,
 
 static void
 loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
- loongarch_save_restore_fn fn)
+ loongarch_save_restore_fn fn,
+ bool skip_eh_data_regs_p)
 {
   HOST_WIDE_INT offset;
 
@@ -1024,7 +1025,14 @@ loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
   for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
 if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
   {
-   if (!cfun->machine->reg_is_wrapped_separately[regno])
+   /* Special care needs to be taken for $r4-$r7 (EH_RETURN_DATA_REGNO)
+  when returning normally from a function that calls
+  __builtin_eh_return.  In this case, these registers are saved but
+  should not be restored, or the return value may be clobbered.  */
+
+   if (!(cfun->machine->reg_is_wrapped_separately[regno]
+ || (skip_eh_data_regs_p
+ && GP_ARG_FIRST <= regno && regno < GP_ARG_FIRST + 4)))
  loongarch_save_restore_reg (word_mode, regno, offset, fn);
 
offset -= UNITS_PER_WORD;
@@ -1297,7 +1305,7 @@ loongarch_expand_prologue (void)
GEN_INT (-step1));
   RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
   size -= step1;
-  loongarch_for_each_saved_reg (size, loongarch_save_reg);
+  loongarch_for_each_saved_reg (size, loongarch_save_reg, false);
 }
 
   /* Set up the frame pointer, if we're using one.  */
@@ -1382,11 +1390,13 @@ loongarch_can_use_return_insn (void)
   return reload_completed && cfun->machine->frame.total_size == 0;
 }
 
-/* Expand an "epilogue" or "sibcall_epilogue" pattern; SIBCALL_P
-   says which.  */
+/* Expand function epilogue using the following insn patterns:
+   "epilogue"(style == NORMAL_RETURN)
+   "sibcall_epilogue" (style == SIBCALL_RETURN)
+   "eh_return"   (style == EXCEPTION_RETURN) */
 
 void
-loongarch_expand_epilogue (bool sibcall_p)
+loongarch_expand_epilogue (int style)
 {
   /* Split the frame into two.  STEP1 is the amount of stack we should
  deallocate before restoring the registers.  STEP2 is the amount we
@@ -1403,7 +1413,8 @@ loongarch_expand_epilogue (bool sibcall_p)
   bool need_barrier_p
 = (get_frame_size () + cfun->machine->frame.arg_pointer_offset) != 0;
 
-  if (!sibcall_p && loongarch_can_use_return_insn ())
+  /* Handle simple returns.  */
+  if (style == NORMAL_RETURN && loongarch_can_use_return_insn ())
 {
   emit_jump_insn (gen_return ());
   return;
@@ -1479,7 +1490,9 @@ loongarch_expand_epilogue (bool sibcall_p)
 
   /* Restore the registers.  */
   loongarch_for_each_saved_reg (frame->total_size - step2,
-   loongarch_restore_reg);
+   loongarch_restore_reg,
+   crtl->calls_eh_return
+   && 

Re: [PATCH v4] LoongArch: Fix eh_return epilogue for normal returns

[Yang Yujie]

Sorry, this is the wrong patch.  I will post it again.

On Fri, Dec 08, 2023 at 05:57:12PM +0800, Yang Yujie wrote:
> Updates:
> v1 -> v2: Add a test case.
> v2 -> v3: Fix code format.
> v3 -> v4: Fix code format.  Avoid unwanted optimization in the test.
> 
> On Fri, Dec 08, 2023 at 05:54:46PM +0800, Yang Yujie wrote:
> > On LoongArch, the regitsters $r4 - $r7 (EH_RETURN_DATA_REGNO) will be saved
> > and restored in the function prologue and epilogue if the given function 
> > calls
> > __builtin_eh_return.  This causes the return value to be overwritten on 
> > normal
> > return paths and breaks a rare case of libgcc's _Unwind_RaiseException.
> > 
> > gcc/ChangeLog:
> > 
> > * config/loongarch/loongarch.cc: Do not restore the saved eh_return
> > data registers ($r4-$r7) for a normal return of a function that calls
> > __builtin_eh_return elsewhere.
> > * config/loongarch/loongarch-protos.h: Same.
> > * config/loongarch/loongarch.md: Same.
> > 
> > gcc/testsuite/ChangeLog:
> > 
> > * gcc.target/loongarch/eh_return-normal-return.c: New test.
> > ---
> >  gcc/config/loongarch/loongarch-protos.h   |  2 +-
> >  gcc/config/loongarch/loongarch.cc | 41 ---
> >  gcc/config/loongarch/loongarch.md | 18 +++-
> >  .../loongarch/eh_return-normal-return.c   | 32 +++
> >  4 files changed, 76 insertions(+), 17 deletions(-)
> >  create mode 100644 
> > gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c
> > 
> > diff --git a/gcc/config/loongarch/loongarch-protos.h 
> > b/gcc/config/loongarch/loongarch-protos.h
> > index cb8fc36b086..af20b5d7132 100644
> > --- a/gcc/config/loongarch/loongarch-protos.h
> > +++ b/gcc/config/loongarch/loongarch-protos.h
> > @@ -60,7 +60,7 @@ enum loongarch_symbol_type {
> >  extern rtx loongarch_emit_move (rtx, rtx);
> >  extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
> >  extern void loongarch_expand_prologue (void);
> > -extern void loongarch_expand_epilogue (bool);
> > +extern void loongarch_expand_epilogue (int);
> >  extern bool loongarch_can_use_return_insn (void);
> >  
> >  extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type 
> > *);
> > diff --git a/gcc/config/loongarch/loongarch.cc 
> > b/gcc/config/loongarch/loongarch.cc
> > index 3545e66a10e..9c0e0dd1b73 100644
> > --- a/gcc/config/loongarch/loongarch.cc
> > +++ b/gcc/config/loongarch/loongarch.cc
> > @@ -1015,20 +1015,30 @@ loongarch_save_restore_reg (machine_mode mode, int 
> > regno, HOST_WIDE_INT offset,
> >  
> >  static void
> >  loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
> > - loongarch_save_restore_fn fn)
> > + loongarch_save_restore_fn fn,
> > + bool skip_eh_data_regs_p)
> >  {
> >HOST_WIDE_INT offset;
> >  
> >/* Save the link register and s-registers.  */
> >offset = cfun->machine->frame.gp_sp_offset - sp_offset;
> >for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
> > -if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
> > -  {
> > -   if (!cfun->machine->reg_is_wrapped_separately[regno])
> > - loongarch_save_restore_reg (word_mode, regno, offset, fn);
> > +{
> > +  /* Special care needs to be taken for $r4-$r7 (EH_RETURN_DATA_REGNO)
> > +when returning normally from a function that calls __builtin_eh_return.
> > +In this case, these registers are saved but should not be restored,
> > +or the return value may be clobbered.  */
> >  
> > -   offset -= UNITS_PER_WORD;
> > -  }
> > +  if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
> > +   {
> > + if (!(cfun->machine->reg_is_wrapped_separately[regno]
> > +   || (skip_eh_data_regs_p
> > +   && GP_ARG_FIRST <= regno && regno < GP_ARG_FIRST + 4)))
> > +   loongarch_save_restore_reg (word_mode, regno, offset, fn);
> > +
> > + offset -= UNITS_PER_WORD;
> > +   }
> > +}
> >  
> >/* This loop must iterate over the same space as its companion in
> >   loongarch_compute_frame_info.  */
> > @@ -1297,7 +1307,7 @@ loongarch_expand_prologue (void)
> > GEN_INT (-step1));
> >RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
> >size -= step1;
> > -  loongarch_for_each_save

Re: [PATCH v4] LoongArch: Fix eh_return epilogue for normal returns

[Yang Yujie]

Updates:
v1 -> v2: Add a test case.
v2 -> v3: Fix code format.
v3 -> v4: Fix code format.  Avoid unwanted optimization in the test.

On Fri, Dec 08, 2023 at 05:54:46PM +0800, Yang Yujie wrote:
> On LoongArch, the regitsters $r4 - $r7 (EH_RETURN_DATA_REGNO) will be saved
> and restored in the function prologue and epilogue if the given function calls
> __builtin_eh_return.  This causes the return value to be overwritten on normal
> return paths and breaks a rare case of libgcc's _Unwind_RaiseException.
> 
> gcc/ChangeLog:
> 
>   * config/loongarch/loongarch.cc: Do not restore the saved eh_return
>   data registers ($r4-$r7) for a normal return of a function that calls
>   __builtin_eh_return elsewhere.
>   * config/loongarch/loongarch-protos.h: Same.
>   * config/loongarch/loongarch.md: Same.
> 
> gcc/testsuite/ChangeLog:
> 
>   * gcc.target/loongarch/eh_return-normal-return.c: New test.
> ---
>  gcc/config/loongarch/loongarch-protos.h   |  2 +-
>  gcc/config/loongarch/loongarch.cc | 41 ---
>  gcc/config/loongarch/loongarch.md | 18 +++-
>  .../loongarch/eh_return-normal-return.c   | 32 +++
>  4 files changed, 76 insertions(+), 17 deletions(-)
>  create mode 100644 
> gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c
> 
> diff --git a/gcc/config/loongarch/loongarch-protos.h 
> b/gcc/config/loongarch/loongarch-protos.h
> index cb8fc36b086..af20b5d7132 100644
> --- a/gcc/config/loongarch/loongarch-protos.h
> +++ b/gcc/config/loongarch/loongarch-protos.h
> @@ -60,7 +60,7 @@ enum loongarch_symbol_type {
>  extern rtx loongarch_emit_move (rtx, rtx);
>  extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
>  extern void loongarch_expand_prologue (void);
> -extern void loongarch_expand_epilogue (bool);
> +extern void loongarch_expand_epilogue (int);
>  extern bool loongarch_can_use_return_insn (void);
>  
>  extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type 
> *);
> diff --git a/gcc/config/loongarch/loongarch.cc 
> b/gcc/config/loongarch/loongarch.cc
> index 3545e66a10e..9c0e0dd1b73 100644
> --- a/gcc/config/loongarch/loongarch.cc
> +++ b/gcc/config/loongarch/loongarch.cc
> @@ -1015,20 +1015,30 @@ loongarch_save_restore_reg (machine_mode mode, int 
> regno, HOST_WIDE_INT offset,
>  
>  static void
>  loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
> -   loongarch_save_restore_fn fn)
> +   loongarch_save_restore_fn fn,
> +   bool skip_eh_data_regs_p)
>  {
>HOST_WIDE_INT offset;
>  
>/* Save the link register and s-registers.  */
>offset = cfun->machine->frame.gp_sp_offset - sp_offset;
>for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
> -if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
> -  {
> - if (!cfun->machine->reg_is_wrapped_separately[regno])
> -   loongarch_save_restore_reg (word_mode, regno, offset, fn);
> +{
> +  /* Special care needs to be taken for $r4-$r7 (EH_RETURN_DATA_REGNO)
> +  when returning normally from a function that calls __builtin_eh_return.
> +  In this case, these registers are saved but should not be restored,
> +  or the return value may be clobbered.  */
>  
> - offset -= UNITS_PER_WORD;
> -  }
> +  if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
> + {
> +   if (!(cfun->machine->reg_is_wrapped_separately[regno]
> + || (skip_eh_data_regs_p
> + && GP_ARG_FIRST <= regno && regno < GP_ARG_FIRST + 4)))
> + loongarch_save_restore_reg (word_mode, regno, offset, fn);
> +
> +   offset -= UNITS_PER_WORD;
> + }
> +}
>  
>/* This loop must iterate over the same space as its companion in
>   loongarch_compute_frame_info.  */
> @@ -1297,7 +1307,7 @@ loongarch_expand_prologue (void)
>   GEN_INT (-step1));
>RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
>size -= step1;
> -  loongarch_for_each_saved_reg (size, loongarch_save_reg);
> +  loongarch_for_each_saved_reg (size, loongarch_save_reg, false);
>  }
>  
>/* Set up the frame pointer, if we're using one.  */
> @@ -1382,11 +1392,11 @@ loongarch_can_use_return_insn (void)
>return reload_completed && cfun->machine->frame.total_size == 0;
>  }
>  
> -/* Expand an "epilogue" or "sibcall_epilogue" pattern; SIBCALL_P
> -   says which.  */
> +/* Expand function epilogue for the following insn patterns:
> +   "epilogue&

[PATCH v4] LoongArch: Fix eh_return epilogue for normal returns

[Yang Yujie]

On LoongArch, the regitsters $r4 - $r7 (EH_RETURN_DATA_REGNO) will be saved
and restored in the function prologue and epilogue if the given function calls
__builtin_eh_return.  This causes the return value to be overwritten on normal
return paths and breaks a rare case of libgcc's _Unwind_RaiseException.

gcc/ChangeLog:

* config/loongarch/loongarch.cc: Do not restore the saved eh_return
data registers ($r4-$r7) for a normal return of a function that calls
__builtin_eh_return elsewhere.
* config/loongarch/loongarch-protos.h: Same.
* config/loongarch/loongarch.md: Same.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/eh_return-normal-return.c: New test.
---
 gcc/config/loongarch/loongarch-protos.h   |  2 +-
 gcc/config/loongarch/loongarch.cc | 41 ---
 gcc/config/loongarch/loongarch.md | 18 +++-
 .../loongarch/eh_return-normal-return.c   | 32 +++
 4 files changed, 76 insertions(+), 17 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c

diff --git a/gcc/config/loongarch/loongarch-protos.h 
b/gcc/config/loongarch/loongarch-protos.h
index cb8fc36b086..af20b5d7132 100644
--- a/gcc/config/loongarch/loongarch-protos.h
+++ b/gcc/config/loongarch/loongarch-protos.h
@@ -60,7 +60,7 @@ enum loongarch_symbol_type {
 extern rtx loongarch_emit_move (rtx, rtx);
 extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
 extern void loongarch_expand_prologue (void);
-extern void loongarch_expand_epilogue (bool);
+extern void loongarch_expand_epilogue (int);
 extern bool loongarch_can_use_return_insn (void);
 
 extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *);
diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index 3545e66a10e..9c0e0dd1b73 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -1015,20 +1015,30 @@ loongarch_save_restore_reg (machine_mode mode, int 
regno, HOST_WIDE_INT offset,
 
 static void
 loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
- loongarch_save_restore_fn fn)
+ loongarch_save_restore_fn fn,
+ bool skip_eh_data_regs_p)
 {
   HOST_WIDE_INT offset;
 
   /* Save the link register and s-registers.  */
   offset = cfun->machine->frame.gp_sp_offset - sp_offset;
   for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
-if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
-  {
-   if (!cfun->machine->reg_is_wrapped_separately[regno])
- loongarch_save_restore_reg (word_mode, regno, offset, fn);
+{
+  /* Special care needs to be taken for $r4-$r7 (EH_RETURN_DATA_REGNO)
+when returning normally from a function that calls __builtin_eh_return.
+In this case, these registers are saved but should not be restored,
+or the return value may be clobbered.  */
 
-   offset -= UNITS_PER_WORD;
-  }
+  if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
+   {
+ if (!(cfun->machine->reg_is_wrapped_separately[regno]
+   || (skip_eh_data_regs_p
+   && GP_ARG_FIRST <= regno && regno < GP_ARG_FIRST + 4)))
+   loongarch_save_restore_reg (word_mode, regno, offset, fn);
+
+ offset -= UNITS_PER_WORD;
+   }
+}
 
   /* This loop must iterate over the same space as its companion in
  loongarch_compute_frame_info.  */
@@ -1297,7 +1307,7 @@ loongarch_expand_prologue (void)
GEN_INT (-step1));
   RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
   size -= step1;
-  loongarch_for_each_saved_reg (size, loongarch_save_reg);
+  loongarch_for_each_saved_reg (size, loongarch_save_reg, false);
 }
 
   /* Set up the frame pointer, if we're using one.  */
@@ -1382,11 +1392,11 @@ loongarch_can_use_return_insn (void)
   return reload_completed && cfun->machine->frame.total_size == 0;
 }
 
-/* Expand an "epilogue" or "sibcall_epilogue" pattern; SIBCALL_P
-   says which.  */
+/* Expand function epilogue for the following insn patterns:
+   "epilogue" (style == 0) / "sibcall_epilogue" (1) / "eh_return" (2).  */
 
 void
-loongarch_expand_epilogue (bool sibcall_p)
+loongarch_expand_epilogue (int style)
 {
   /* Split the frame into two.  STEP1 is the amount of stack we should
  deallocate before restoring the registers.  STEP2 is the amount we
@@ -1403,7 +1413,8 @@ loongarch_expand_epilogue (bool sibcall_p)
   bool need_barrier_p
 = (get_frame_size () + cfun->machine->frame.arg_pointer_offset) != 0;
 
-  if (!sibcall_p && loongarch_can_use_return_insn ())
+  /* Handle simple returns.  */
+  if (style == 0 && loongarch_can_use_return_insn ())
 {
   emit_jump_insn (gen_return ());
   return;
@@ -1479,7 +1490,8 @@ loongarch_expand_epilogue (bool sibcall_p)
 
   /* Restore the 

Re: [PATCH v3] LoongArch: Fix eh_return epilogue for normal returns

[Yang Yujie]

On Thu, Dec 07, 2023 at 04:13:51PM +0800, Xi Ruoyao wrote:
> 
> I understand and I don't think adding {} is wrong.  The problem is the
> indent change causes a large chunk of diff and it makes reviewing more
> difficult.  Thus generally we should not mix real code change and format
> change in a commit.
> 
> i. e. it would be better to separate it into two patches, the first adds
> {} and changes the indent, and the second changes the logic.  But now I
> don't think it's needed to make a V4, just pushing this should be fine.
> 

Thanks for the suggestion.  It is clearer that way.

Yujie

Re: [PATCH] testsuite: Adjust for the new permerror -Wincompatible-pointer-types

[Yang Yujie]

On Thu, Dec 07, 2023 at 10:18:47AM +0100, Florian Weimer wrote:
> * Yang Yujie:
> 
> > With this patch, I also noticed a few errors in building unpatched older
> > software like expect-5.45.4, perl-5.28.3 and bash-5.0.  Will this also be
> > the case when GCC 14 gets released?
> 
> For Fedora, we keep pointers of the changes needed here:
> 
>   <https://gitlab.com/fweimer-rh/fedora-modernc/-/blob/main/pkg/b/bash.md>
>   <https://gitlab.com/fweimer-rh/fedora-modernc/-/blob/main/pkg/e/expect.md>
>   <https://gitlab.com/fweimer-rh/fedora-modernc/-/blob/main/pkg/p/perl.md>
> 
> (For perl, it looks like another change will be needed.)
> 
> This also includes changes that we imported through rebases after we
> started tracking.
> 
> We do not have control over the release schedule for those upstream
> projects, and of course there are many project which are more or less
> dormant and have not made a release in many years.
> 
> Thanks,
> Florian

Got it.  Thanks for the pointers to the fedora patches.

Yujie

Re: [PATCH v3 2/3] libphobos: Update build scripts for LoongArch64.

[Yang Yujie]

On Thu, Dec 07, 2023 at 11:34:28AM +0100, Iain Buclaw wrote:
> 
> Just a nitpick, I'd thought the committing of switchcontext.S should
> come before this. I have no strong opinion either way.
> 
> OK to commit.
> 
> Iain.

Thanks for the suggestion, indeed this makes sense.

Yujie

Re: [PATCH v3 1/3] LoongArch: Adjust D version strings.

[Yang Yujie]

On Thu, Dec 07, 2023 at 11:30:16AM +0100, Iain Buclaw wrote:
> Hi,
> 
> Thanks for this.
> 
> Excerpts from Yang Yujie's message of Dezember 1, 2023 11:08 am:
> > diff --git a/gcc/d/dmd/cond.d b/gcc/d/dmd/cond.d
> > index 568b639e0b6..02af0cc9e29 100644
> > --- a/gcc/d/dmd/cond.d
> > +++ b/gcc/d/dmd/cond.d
> > @@ -693,10 +693,10 @@ extern (C++) final class VersionCondition : 
> > DVCondition
> >  case "LDC":
> >  case "linux":
> >  case "LittleEndian":
> > -case "LoongArch32":
> >  case "LoongArch64":
> > -case "LoongArch_HardFloat":
> > -case "LoongArch_SoftFloat":
> > +case "LoongArch_F64":
> > +case "LoongArch_F32":
> > +case "LoongArch_SF":
> >  case "MinGW":
> >  case "MIPS32":
> >  case "MIPS64":
> 
> Changes to this module should be submitted to github.com/dlang/dmd,
> otherwise it'll get overwritten on the next "merge" with upstream.
> 
> What's the rationale for F64 and SF abbreviations?
> 
> Otherwise, looks reasonable.
> 
> Iain.

Hi Iain,

Thanks for the review!  I will push this to the dmd repo first shortly
and then send a v4 here.

By definition, LoongArch at the current stage can choose to implement either a
64-bit / 32-bit or no FPU at all, which are represented with target triplets
loongarch*-*{f64,f32.sf}.  The F64/F32/SF-suffixed version strings represents
this distinction, though the support of the "F32" ISA variant is not active
upstream.

>From what I can see, the current usage of "F64/SF" is only needed for FP
context code.  I will also push the corresponding change to druntime later.

Also If you have the time, does the following patch look OK to you?
I couldn't get libphobos to build as a static library and this is the fix
I came up with.
https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636767.html

Thanks,
Yujie

Re: [PATCH v3] LoongArch: Fix eh_return epilogue for normal returns

[Yang Yujie]

On Thu, Dec 07, 2023 at 11:02:58AM +0800, Xi Ruoyao wrote:
> 
> I don't like this pair of {} for the for statement.  It's not necessary
> and it changes the indent level, causing the diff hard to review.
> 
> Otherwise LGTM.  I'm not sure why I didn't notice the eh_return issue
> when I learnt shrink wrapping from RISC-V...
>

Thanks for the review!  This problem on LoongArch was first noticed in a
failed libphobos test case, and the fix is partially borrowed from i386,
which seemed to be the only architecture without this issue.

So despite the extra braces (which I'd say I prefer to have because of the
new block of comment inserted on top of the if statement :P), I am going to
ask Lulu for pushing this.

Yujie

Re: [PATCH] testsuite: Adjust for the new permerror -Wincompatible-pointer-types

[Yang Yujie]

On Thu, Dec 07, 2023 at 01:35:23AM +, Sam James wrote:
> 
> Yang Yujie  writes:
> 
> > On Wed, Dec 06, 2023 at 10:45:22AM -0700, Jeff Law wrote:
> >> 
> >> 
> >> On 12/6/23 05:12, Florian Weimer wrote:
> >> > * Yang Yujie:
> >> > 
> >> > > From: Yang Yujie 
> >> > > Subject: [PATCH] testsuite: Adjust for the new permerror
> >> > >   -Wincompatible-pointer-types
> >> > > To: gcc-patches@gcc.gnu.org
> >> > > Cc: r...@cebitec.uni-bielefeld.de, mikest...@comcast.net, 
> >> > > fwei...@redhat.com,
> >> > >   Yang Yujie 
> >> > > Date: Wed,  6 Dec 2023 10:29:31 +0800 (9 hours, 42 minutes, 7 seconds 
> >> > > ago)
> >> > > Message-ID: <20231206022931.33437-1-yangyu...@loongson.cn>
> >> > > 
> >> > > r14-6037 turned -Wincompatible-pointer-types into a permerror,
> >> > > which causes the following tests to fail.
> >> > > 
> >> > > gcc/testsuite/ChangeLog:
> >> > > 
> >> > >* gcc.dg/fixed-point/composite-type.c: replace dg-warning with 
> >> > > dg-error.
> >> > > ---
> >> > >   .../gcc.dg/fixed-point/composite-type.c   | 64 
> >> > > +--
> >> > >   1 file changed, 32 insertions(+), 32 deletions(-)
> >> > 
> >> > Looks reasonable to me, but I can't approve it.
> >> We might want to fix that from a policy standpoint :-)
> >> 
> >> Regardless, this is OK for the trunk.  Thanks Yang for taking care of it.  
> >> I
> >> don't see you in the maintainers file, so I'll go ahead and push it
> >> momentarily.
> >> 
> >> jeff
> >
> > Thanks for the review!
> >
> > With this patch, I also noticed a few errors in building unpatched older
> > software like expect-5.45.4, perl-5.28.3 and bash-5.0.  Will this also be
> > the case when GCC 14 gets released?
> >
> 
> Old versions of software will need to be patched or built with
> -fpermissive. We are working on fixing supported versions of software
> and sending patches upstream - please do join in if you're able, as
> the more help the better.
> 
> It is normal for software to need porting to newer compilers. For
> example, https://gcc.gnu.org/gcc-10/porting_to.html (-fcommon).
> 
> > Thanks,
> > Yujie
> 
> thanks,
> sam

Got it, thanks.

Yujie

[PATCH v3 0/1] LoongArch: Fix eh_return epilogue for normal returns

[Yang Yujie]

Updates:
v1 -> v2: Add a test case.
v2 -> v3: Fix code format.

Yang Yujie (1):
  LoongArch: Fix eh_return epilogue for normal returns

 gcc/config/loongarch/loongarch-protos.h   |  2 +-
 gcc/config/loongarch/loongarch.cc | 41 ---
 gcc/config/loongarch/loongarch.md | 18 +++-
 .../loongarch/eh_return-normal-return.c   | 32 +++
 4 files changed, 76 insertions(+), 17 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c

-- 
2.43.0

[PATCH v3] LoongArch: Fix eh_return epilogue for normal returns

[Yang Yujie]

On LoongArch, the regitsters $r4 - $r7 (EH_RETURN_DATA_REGNO) will be saved
and restored in the function prologue and epilogue if the given function calls
__builtin_eh_return.  This causes the return value to be overwritten on normal
return paths and breaks a rare case of libgcc's _Unwind_RaiseException.

gcc/ChangeLog:

* config/loongarch/loongarch.cc: Do not restore the saved eh_return
data registers ($r4-$r7) for a normal return of a function that calls
__builtin_eh_return elsewhere.
* config/loongarch/loongarch-protos.h: Same.
* config/loongarch/loongarch.md: Same.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/eh_return-normal-return.c: New test.
---
 gcc/config/loongarch/loongarch-protos.h   |  2 +-
 gcc/config/loongarch/loongarch.cc | 41 ---
 gcc/config/loongarch/loongarch.md | 18 +++-
 .../loongarch/eh_return-normal-return.c   | 32 +++
 4 files changed, 76 insertions(+), 17 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/eh_return-normal-return.c

diff --git a/gcc/config/loongarch/loongarch-protos.h 
b/gcc/config/loongarch/loongarch-protos.h
index cb8fc36b086..af20b5d7132 100644
--- a/gcc/config/loongarch/loongarch-protos.h
+++ b/gcc/config/loongarch/loongarch-protos.h
@@ -60,7 +60,7 @@ enum loongarch_symbol_type {
 extern rtx loongarch_emit_move (rtx, rtx);
 extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
 extern void loongarch_expand_prologue (void);
-extern void loongarch_expand_epilogue (bool);
+extern void loongarch_expand_epilogue (int);
 extern bool loongarch_can_use_return_insn (void);
 
 extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *);
diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index 3545e66a10e..9c0e0dd1b73 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -1015,20 +1015,30 @@ loongarch_save_restore_reg (machine_mode mode, int 
regno, HOST_WIDE_INT offset,
 
 static void
 loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
- loongarch_save_restore_fn fn)
+ loongarch_save_restore_fn fn,
+ bool skip_eh_data_regs_p)
 {
   HOST_WIDE_INT offset;
 
   /* Save the link register and s-registers.  */
   offset = cfun->machine->frame.gp_sp_offset - sp_offset;
   for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
-if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
-  {
-   if (!cfun->machine->reg_is_wrapped_separately[regno])
- loongarch_save_restore_reg (word_mode, regno, offset, fn);
+{
+  /* Special care needs to be taken for $r4-$r7 (EH_RETURN_DATA_REGNO)
+when returning normally from a function that calls __builtin_eh_return.
+In this case, these registers are saved but should not be restored,
+or the return value may be clobbered.  */
 
-   offset -= UNITS_PER_WORD;
-  }
+  if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
+   {
+ if (!(cfun->machine->reg_is_wrapped_separately[regno]
+   || (skip_eh_data_regs_p
+   && GP_ARG_FIRST <= regno && regno < GP_ARG_FIRST + 4)))
+   loongarch_save_restore_reg (word_mode, regno, offset, fn);
+
+ offset -= UNITS_PER_WORD;
+   }
+}
 
   /* This loop must iterate over the same space as its companion in
  loongarch_compute_frame_info.  */
@@ -1297,7 +1307,7 @@ loongarch_expand_prologue (void)
GEN_INT (-step1));
   RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
   size -= step1;
-  loongarch_for_each_saved_reg (size, loongarch_save_reg);
+  loongarch_for_each_saved_reg (size, loongarch_save_reg, false);
 }
 
   /* Set up the frame pointer, if we're using one.  */
@@ -1382,11 +1392,11 @@ loongarch_can_use_return_insn (void)
   return reload_completed && cfun->machine->frame.total_size == 0;
 }
 
-/* Expand an "epilogue" or "sibcall_epilogue" pattern; SIBCALL_P
-   says which.  */
+/* Expand function epilogue for the following insn patterns:
+   "epilogue" (style == 0) / "sibcall_epilogue" (1) / "eh_return" (2).  */
 
 void
-loongarch_expand_epilogue (bool sibcall_p)
+loongarch_expand_epilogue (int style)
 {
   /* Split the frame into two.  STEP1 is the amount of stack we should
  deallocate before restoring the registers.  STEP2 is the amount we
@@ -1403,7 +1413,8 @@ loongarch_expand_epilogue (bool sibcall_p)
   bool need_barrier_p
 = (get_frame_size () + cfun->machine->frame.arg_pointer_offset) != 0;
 
-  if (!sibcall_p && loongarch_can_use_return_insn ())
+  /* Handle simple returns.  */
+  if (style == 0 && loongarch_can_use_return_insn ())
 {
   emit_jump_insn (gen_return ());
   return;
@@ -1479,7 +1490,8 @@ loongarch_expand_epilogue (bool sibcall_p)
 
   /* Restore the 

Re: [PATCH] testsuite: Adjust for the new permerror -Wincompatible-pointer-types

[Yang Yujie]

On Wed, Dec 06, 2023 at 10:45:22AM -0700, Jeff Law wrote:
> 
> 
> On 12/6/23 05:12, Florian Weimer wrote:
> > * Yang Yujie:
> > 
> > > From: Yang Yujie 
> > > Subject: [PATCH] testsuite: Adjust for the new permerror
> > >   -Wincompatible-pointer-types
> > > To: gcc-patches@gcc.gnu.org
> > > Cc: r...@cebitec.uni-bielefeld.de, mikest...@comcast.net, 
> > > fwei...@redhat.com,
> > >   Yang Yujie 
> > > Date: Wed,  6 Dec 2023 10:29:31 +0800 (9 hours, 42 minutes, 7 seconds ago)
> > > Message-ID: <20231206022931.33437-1-yangyu...@loongson.cn>
> > > 
> > > r14-6037 turned -Wincompatible-pointer-types into a permerror,
> > > which causes the following tests to fail.
> > > 
> > > gcc/testsuite/ChangeLog:
> > > 
> > >   * gcc.dg/fixed-point/composite-type.c: replace dg-warning with dg-error.
> > > ---
> > >   .../gcc.dg/fixed-point/composite-type.c   | 64 +--
> > >   1 file changed, 32 insertions(+), 32 deletions(-)
> > 
> > Looks reasonable to me, but I can't approve it.
> We might want to fix that from a policy standpoint :-)
> 
> Regardless, this is OK for the trunk.  Thanks Yang for taking care of it.  I
> don't see you in the maintainers file, so I'll go ahead and push it
> momentarily.
> 
> jeff

Thanks for the review!

With this patch, I also noticed a few errors in building unpatched older
software like expect-5.45.4, perl-5.28.3 and bash-5.0.  Will this also be
the case when GCC 14 gets released?

Thanks,
Yujie

[PATCH v2] LoongArch: Fix eh_return epilogue for normal returns

[Yang Yujie]

On LoongArch, the regitsters $r4 - $r7 (EH_RETURN_DATA_REGNO) will be saved
and restored in the function prologue and epilogue if the given function calls
__builtin_eh_return.  This causes the return value to be overwritten on normal
return paths and breaks a rare case of libgcc's _Unwind_RaiseException.

gcc/ChangeLog:

* config/loongarch/loongarch.cc: Do not restore the saved eh_return
data registers ($r4-$r7) for a normal return of a function that calls
__builtin_eh_return elsewhere.
* config/loongarch/loongarch-protos.h: Same.
* config/loongarch/loongarch.md: Same.

gcc/testsuite/ChangeLog:

* gcc.target/eh_return-normal-return.c: New test.
---
 gcc/config/loongarch/loongarch-protos.h   |  2 +-
 gcc/config/loongarch/loongarch.cc | 41 ---
 gcc/config/loongarch/loongarch.md | 18 +++-
 .../gcc.target/eh_return-normal-return.c  | 31 ++
 4 files changed, 75 insertions(+), 17 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/eh_return-normal-return.c

diff --git a/gcc/config/loongarch/loongarch-protos.h 
b/gcc/config/loongarch/loongarch-protos.h
index cb8fc36b086..af20b5d7132 100644
--- a/gcc/config/loongarch/loongarch-protos.h
+++ b/gcc/config/loongarch/loongarch-protos.h
@@ -60,7 +60,7 @@ enum loongarch_symbol_type {
 extern rtx loongarch_emit_move (rtx, rtx);
 extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
 extern void loongarch_expand_prologue (void);
-extern void loongarch_expand_epilogue (bool);
+extern void loongarch_expand_epilogue (int);
 extern bool loongarch_can_use_return_insn (void);
 
 extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *);
diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index 3545e66a10e..9c0e0dd1b73 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -1015,20 +1015,30 @@ loongarch_save_restore_reg (machine_mode mode, int 
regno, HOST_WIDE_INT offset,
 
 static void
 loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
- loongarch_save_restore_fn fn)
+ loongarch_save_restore_fn fn,
+ bool skip_eh_data_regs_p)
 {
   HOST_WIDE_INT offset;
 
   /* Save the link register and s-registers.  */
   offset = cfun->machine->frame.gp_sp_offset - sp_offset;
   for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
-if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
-  {
-   if (!cfun->machine->reg_is_wrapped_separately[regno])
- loongarch_save_restore_reg (word_mode, regno, offset, fn);
+{
+  /* Special care needs to be taken for $r4-$r7 (EH_RETURN_DATA_REGNO)
+when returning normally from a function that calls __builtin_eh_return.
+In this case, these registers are saved but should not be restored,
+or the return value may be clobbered.  */
 
-   offset -= UNITS_PER_WORD;
-  }
+  if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
+   {
+ if (!(cfun->machine->reg_is_wrapped_separately[regno]
+   || (skip_eh_data_regs_p
+   && GP_ARG_FIRST <= regno && regno < GP_ARG_FIRST + 4)))
+   loongarch_save_restore_reg (word_mode, regno, offset, fn);
+
+ offset -= UNITS_PER_WORD;
+   }
+}
 
   /* This loop must iterate over the same space as its companion in
  loongarch_compute_frame_info.  */
@@ -1297,7 +1307,7 @@ loongarch_expand_prologue (void)
GEN_INT (-step1));
   RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
   size -= step1;
-  loongarch_for_each_saved_reg (size, loongarch_save_reg);
+  loongarch_for_each_saved_reg (size, loongarch_save_reg, false);
 }
 
   /* Set up the frame pointer, if we're using one.  */
@@ -1382,11 +1392,11 @@ loongarch_can_use_return_insn (void)
   return reload_completed && cfun->machine->frame.total_size == 0;
 }
 
-/* Expand an "epilogue" or "sibcall_epilogue" pattern; SIBCALL_P
-   says which.  */
+/* Expand function epilogue for the following insn patterns:
+   "epilogue" (style == 0) / "sibcall_epilogue" (1) / "eh_return" (2).  */
 
 void
-loongarch_expand_epilogue (bool sibcall_p)
+loongarch_expand_epilogue (int style)
 {
   /* Split the frame into two.  STEP1 is the amount of stack we should
  deallocate before restoring the registers.  STEP2 is the amount we
@@ -1403,7 +1413,8 @@ loongarch_expand_epilogue (bool sibcall_p)
   bool need_barrier_p
 = (get_frame_size () + cfun->machine->frame.arg_pointer_offset) != 0;
 
-  if (!sibcall_p && loongarch_can_use_return_insn ())
+  /* Handle simple returns.  */
+  if (style == 0 && loongarch_can_use_return_insn ())
 {
   emit_jump_insn (gen_return ());
   return;
@@ -1479,7 +1490,8 @@ loongarch_expand_epilogue (bool sibcall_p)
 
   /* Restore the registers.  */
   

[PATCH] testsuite: Adjust for the new permerror -Wincompatible-pointer-types

[Yang Yujie]

r14-6037 turned -Wincompatible-pointer-types into a permerror,
which causes the following tests to fail.

gcc/testsuite/ChangeLog:

* gcc.dg/fixed-point/composite-type.c: replace dg-warning with dg-error.
---
 .../gcc.dg/fixed-point/composite-type.c   | 64 +--
 1 file changed, 32 insertions(+), 32 deletions(-)

diff --git a/gcc/testsuite/gcc.dg/fixed-point/composite-type.c 
b/gcc/testsuite/gcc.dg/fixed-point/composite-type.c
index 59351ff09b3..f91e480bcbf 100644
--- a/gcc/testsuite/gcc.dg/fixed-point/composite-type.c
+++ b/gcc/testsuite/gcc.dg/fixed-point/composite-type.c
@@ -68,39 +68,39 @@ FIXED_POINT_COMPOSITE_DECL(_Sat unsigned long long _Accum, 
Sullk);  /* { dg-erro
 
 int main()
 {
-  FIXED_POINT_COMPOSITE_TEST(short _Fract, sf);  /* { dg-warning "incompatible 
pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Fract, f);  /* { dg-warning "incompatible 
pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(long _Fract, lf);  /* { dg-warning "incompatible 
pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(long long _Fract, llf);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(unsigned short _Fract, usf);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(unsigned _Fract, uf);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(unsigned long _Fract, ulf);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(unsigned long long _Fract, ullf);  /* { 
dg-warning "incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Sat short _Fract, Ssf);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Sat _Fract, Sf);  /* { dg-warning "incompatible 
pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Sat long _Fract, Slf);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Sat long long _Fract, Sllf);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Sat unsigned short _Fract, Susf);  /* { 
dg-warning "incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Sat unsigned _Fract, Suf);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Sat unsigned long _Fract, Sulf);  /* { 
dg-warning "incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Sat unsigned long long _Fract, Sullf);  /* { 
dg-warning "incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(short _Fract, sf);  /* { dg-error "incompatible 
pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(_Fract, f);  /* { dg-error "incompatible pointer 
type" } */
+  FIXED_POINT_COMPOSITE_TEST(long _Fract, lf);  /* { dg-error "incompatible 
pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(long long _Fract, llf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(unsigned short _Fract, usf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(unsigned _Fract, uf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(unsigned long _Fract, ulf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(unsigned long long _Fract, ullf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(_Sat short _Fract, Ssf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(_Sat _Fract, Sf);  /* { dg-error "incompatible 
pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(_Sat long _Fract, Slf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(_Sat long long _Fract, Sllf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(_Sat unsigned short _Fract, Susf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(_Sat unsigned _Fract, Suf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(_Sat unsigned long _Fract, Sulf);  /* { dg-error 
"incompatible pointer type" } */
+  FIXED_POINT_COMPOSITE_TEST(_Sat unsigned long long _Fract, Sullf);  /* { 
dg-error "incompatible pointer type" } */
 
-  FIXED_POINT_COMPOSITE_TEST(short _Accum, sk);  /* { dg-warning "incompatible 
pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Accum, k);  /* { dg-warning "incompatible 
pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(long _Accum, lk);  /* { dg-warning "incompatible 
pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(long long _Accum, llk);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(unsigned short _Accum, usk);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(unsigned _Accum, uk);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(unsigned long _Accum, ulk);  /* { dg-warning 
"incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(unsigned long long _Accum, ullk);  /* { 
dg-warning "incompatible pointer type" } */
-  FIXED_POINT_COMPOSITE_TEST(_Sat 

[PATCH v3 2/3] libphobos: Update build scripts for LoongArch64.

[Yang Yujie]

libphobos/ChangeLog:

* m4/druntime/cpu.m4: Support loongarch* targets.
* libdruntime/Makefile.am: Same.
* libdruntime/Makefile.in: Regenerate.
* configure: Regenerate.
---
 libphobos/configure   | 21 ++-
 libphobos/libdruntime/Makefile.am |  3 +
 libphobos/libdruntime/Makefile.in | 98 +++
 libphobos/m4/druntime/cpu.m4  |  5 ++
 4 files changed, 87 insertions(+), 40 deletions(-)

diff --git a/libphobos/configure b/libphobos/configure
index 25b13bdd93e..9a59bad34ac 100755
--- a/libphobos/configure
+++ b/libphobos/configure
@@ -696,6 +696,8 @@ DRUNTIME_CPU_POWERPC_FALSE
 DRUNTIME_CPU_POWERPC_TRUE
 DRUNTIME_CPU_MIPS_FALSE
 DRUNTIME_CPU_MIPS_TRUE
+DRUNTIME_CPU_LOONGARCH_FALSE
+DRUNTIME_CPU_LOONGARCH_TRUE
 DRUNTIME_CPU_ARM_FALSE
 DRUNTIME_CPU_ARM_TRUE
 DRUNTIME_CPU_AARCH64_FALSE
@@ -11865,7 +11867,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 11868 "configure"
+#line 11870 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -11971,7 +11973,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 11974 "configure"
+#line 11976 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -14305,6 +14307,9 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
;;
   arm*)druntime_target_cpu_parsed="arm"
;;
+  loongarch*)
+   druntime_target_cpu_parsed="loongarch"
+   ;;
   mips*)   druntime_target_cpu_parsed="mips"
;;
   powerpc*)
@@ -14336,6 +14341,14 @@ else
   DRUNTIME_CPU_ARM_FALSE=
 fi
 
+   if test "$druntime_target_cpu_parsed" = "loongarch"; then
+  DRUNTIME_CPU_LOONGARCH_TRUE=
+  DRUNTIME_CPU_LOONGARCH_FALSE='#'
+else
+  DRUNTIME_CPU_LOONGARCH_TRUE='#'
+  DRUNTIME_CPU_LOONGARCH_FALSE=
+fi
+
if test "$druntime_target_cpu_parsed" = "mips"; then
   DRUNTIME_CPU_MIPS_TRUE=
   DRUNTIME_CPU_MIPS_FALSE='#'
@@ -15997,6 +16010,10 @@ if test -z "${DRUNTIME_CPU_ARM_TRUE}" && test -z 
"${DRUNTIME_CPU_ARM_FALSE}"; th
   as_fn_error $? "conditional \"DRUNTIME_CPU_ARM\" was never defined.
 Usually this means the macro was only invoked conditionally." "$LINENO" 5
 fi
+if test -z "${DRUNTIME_CPU_LOONGARCH_TRUE}" && test -z 
"${DRUNTIME_CPU_LOONGARCH_FALSE}"; then
+  as_fn_error $? "conditional \"DRUNTIME_CPU_LOONGARCH\" was never defined.
+Usually this means the macro was only invoked conditionally." "$LINENO" 5
+fi
 if test -z "${DRUNTIME_CPU_MIPS_TRUE}" && test -z 
"${DRUNTIME_CPU_MIPS_FALSE}"; then
   as_fn_error $? "conditional \"DRUNTIME_CPU_MIPS\" was never defined.
 Usually this means the macro was only invoked conditionally." "$LINENO" 5
diff --git a/libphobos/libdruntime/Makefile.am 
b/libphobos/libdruntime/Makefile.am
index 23205fd3301..ca43a0753c4 100644
--- a/libphobos/libdruntime/Makefile.am
+++ b/libphobos/libdruntime/Makefile.am
@@ -83,6 +83,9 @@ endif
 if DRUNTIME_CPU_ARM
 DRUNTIME_SOURCES_CONFIGURED += config/arm/switchcontext.S
 endif
+if DRUNTIME_CPU_LOONGARCH
+DRUNTIME_SOURCES_CONFIGURED += config/loongarch/switchcontext.S
+endif
 if DRUNTIME_CPU_MIPS
 DRUNTIME_SOURCES_CONFIGURED += config/mips/switchcontext.S
 endif
diff --git a/libphobos/libdruntime/Makefile.in 
b/libphobos/libdruntime/Makefile.in
index 410245d71ca..f52bf36c282 100644
--- a/libphobos/libdruntime/Makefile.in
+++ b/libphobos/libdruntime/Makefile.in
@@ -124,12 +124,13 @@ target_triplet = @target@
 # CPU specific sources
 @DRUNTIME_CPU_AARCH64_TRUE@am__append_11 = config/aarch64/switchcontext.S
 @DRUNTIME_CPU_ARM_TRUE@am__append_12 = config/arm/switchcontext.S
-@DRUNTIME_CPU_MIPS_TRUE@am__append_13 = config/mips/switchcontext.S
-@DRUNTIME_CPU_POWERPC_TRUE@am__append_14 = config/powerpc/switchcontext.S
-@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_TRUE@am__append_15 = 
config/mingw/switchcontext.S
-@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_FALSE@am__append_16 = 
config/x86/switchcontext.S
-@DRUNTIME_CPU_SYSTEMZ_TRUE@am__append_17 = config/systemz/get_tls_offset.S
-@DRUNTIME_CPU_S390_TRUE@am__append_18 = config/s390/get_tls_offset.S
+@DRUNTIME_CPU_LOONGARCH_TRUE@am__append_13 = config/loongarch/switchcontext.S
+@DRUNTIME_CPU_MIPS_TRUE@am__append_14 = config/mips/switchcontext.S
+@DRUNTIME_CPU_POWERPC_TRUE@am__append_15 = config/powerpc/switchcontext.S
+@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_TRUE@am__append_16 = 
config/mingw/switchcontext.S
+@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_FALSE@am__append_17 = 
config/x86/switchcontext.S
+@DRUNTIME_CPU_SYSTEMZ_TRUE@am__append_18 = config/systemz/get_tls_offset.S
+@DRUNTIME_CPU_S390_TRUE@am__append_19 = config/s390/get_tls_offset.S
 subdir = libdruntime
 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -485,46 +486,50 @@ am__objects_23 = core/sys/solaris/dlfcn.lo 
core/sys/solaris/elf.lo \
 

[PATCH v3 1/3] LoongArch: Adjust D version strings.

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/loongarch-d.cc: Undefine LoongArch32.
Define LoongArch_SF, LoongArch_F32, LoongArch_F64

gcc/d/ChangeLog:

* dmd/cond.d: Same.
* implement-d.texi: Same.
---
 gcc/config/loongarch/loongarch-d.cc | 27 ++-
 gcc/d/dmd/cond.d|  6 +++---
 gcc/d/implement-d.texi  |  6 ++
 3 files changed, 23 insertions(+), 16 deletions(-)

diff --git a/gcc/config/loongarch/loongarch-d.cc 
b/gcc/config/loongarch/loongarch-d.cc
index 9ac483c39a7..4692b78708a 100644
--- a/gcc/config/loongarch/loongarch-d.cc
+++ b/gcc/config/loongarch/loongarch-d.cc
@@ -29,24 +29,27 @@ along with GCC; see the file COPYING3.  If not see
 void
 loongarch_d_target_versions (void)
 {
-  if (TARGET_64BIT)
+  if (TARGET_ABI_LP64)
 d_add_builtin_version ("LoongArch64");
-  else
-d_add_builtin_version ("LoongArch32");
 
-  if (TARGET_HARD_FLOAT_ABI)
+  if (TARGET_DOUBLE_FLOAT_ABI)
+{
+  d_add_builtin_version ("LoongArch_F64");
+  d_add_builtin_version ("D_HardFloat");
+}
+  else if (TARGET_SINGLE_FLOAT_ABI)
 {
-  d_add_builtin_version ("LoongArch_HardFloat");
+  d_add_builtin_version ("LoongArch_F32");
   d_add_builtin_version ("D_HardFloat");
 }
-  else if (TARGET_SOFT_FLOAT_ABI)
+  else
 {
-  d_add_builtin_version ("LoongArch_SoftFloat");
+  d_add_builtin_version ("LoongArch_SF");
   d_add_builtin_version ("D_SoftFloat");
 }
 }
 
-/* Handle a call to `__traits(getTargetInfo, "floatAbi")'.  */
+/* Handle trait getTargetInfo with key "floatAbi"  */
 
 static tree
 loongarch_d_handle_target_float_abi (void)
@@ -55,10 +58,8 @@ loongarch_d_handle_target_float_abi (void)
 
   if (TARGET_HARD_FLOAT_ABI)
 abi = "hard";
-  else if (TARGET_SOFT_FLOAT_ABI)
-abi = "soft";
   else
-abi = "";
+abi = "soft";
 
   return build_string_literal (strlen (abi) + 1, abi);
 }
@@ -69,8 +70,8 @@ void
 loongarch_d_register_target_info (void)
 {
   const struct d_target_info_spec handlers[] = {
-{"floatAbi", loongarch_d_handle_target_float_abi},
-{NULL, NULL},
+{ "floatAbi", loongarch_d_handle_target_float_abi },
+{ NULL, NULL },
   };
 
   d_add_target_info_handlers (handlers);
diff --git a/gcc/d/dmd/cond.d b/gcc/d/dmd/cond.d
index 568b639e0b6..02af0cc9e29 100644
--- a/gcc/d/dmd/cond.d
+++ b/gcc/d/dmd/cond.d
@@ -693,10 +693,10 @@ extern (C++) final class VersionCondition : DVCondition
 case "LDC":
 case "linux":
 case "LittleEndian":
-case "LoongArch32":
 case "LoongArch64":
-case "LoongArch_HardFloat":
-case "LoongArch_SoftFloat":
+case "LoongArch_F64":
+case "LoongArch_F32":
+case "LoongArch_SF":
 case "MinGW":
 case "MIPS32":
 case "MIPS64":
diff --git a/gcc/d/implement-d.texi b/gcc/d/implement-d.texi
index 6f33bc192fe..cc0d1ecf593 100644
--- a/gcc/d/implement-d.texi
+++ b/gcc/d/implement-d.texi
@@ -1966,6 +1966,12 @@ Version relating to GNU Hurd systems.
 @item linux
 Version relating to Linux systems.
 
+@item LoongArch64
+@item LoongArch_SF
+@item LoongArch_F32
+@item LoongArch_F64
+Versions relating to the LoongArch family of processors.
+
 @item MinGW
 Version relating to the MinGW environment.
 
-- 
2.43.0

[PATCH v3 3/3] libruntime: Add fiber context switch code for LoongArch.

[Yang Yujie]

libphobos/ChangeLog:

* libdruntime/config/loongarch/switchcontext.S: New file.
---
 .../config/loongarch/switchcontext.S  | 133 ++
 1 file changed, 133 insertions(+)
 create mode 100644 libphobos/libdruntime/config/loongarch/switchcontext.S

diff --git a/libphobos/libdruntime/config/loongarch/switchcontext.S 
b/libphobos/libdruntime/config/loongarch/switchcontext.S
new file mode 100644
index 000..edfb9b67e8f
--- /dev/null
+++ b/libphobos/libdruntime/config/loongarch/switchcontext.S
@@ -0,0 +1,133 @@
+/* LoongArch support code for fibers and multithreading.
+   Copyright (C) 2023 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+.  */
+
+#include "../common/threadasm.S"
+
+/**
+ * Performs a context switch.
+ *
+ * $a0 - void** - ptr to old stack pointer
+ * $a1 - void*  - new stack pointer
+ *
+ */
+
+#if defined(__loongarch_lp64)
+#  define GPR_L ld.d
+#  define GPR_S st.d
+#  define SZ_GPR 8
+#  define ADDSP(si)   addi.d  $sp, $sp, si
+#elif defined(__loongarch64_ilp32)
+#  define GPR_L ld.w
+#  define GPR_S st.w
+#  define SZ_GPR 4
+#  define ADDSP(si)   addi.w  $sp, $sp, si
+#else
+#  error Unsupported GPR size (must be 64-bit or 32-bit).
+#endif
+
+#if defined(__loongarch_double_float)
+#  define FPR_L fld.d
+#  define FPR_S fst.d
+#  define SZ_FPR 8
+#elif defined(__loongarch_single_float)
+#  define FPR_L fld.s
+#  define FPR_S fst.s
+#  define SZ_FPR 4
+#else
+#  define SZ_FPR 0
+#endif
+
+.text
+.align 2
+.global fiber_switchContext
+.type   fiber_switchContext, @function
+fiber_switchContext:
+.cfi_startproc
+ADDSP(-11 * SZ_GPR)
+
+// fp regs and return address are stored below the stack
+// because we don't want the GC to scan them.
+
+// return address (r1)
+GPR_S  $r1, $sp, -SZ_GPR
+
+#if SZ_FPR != 0
+// callee-saved scratch FPRs (f24-f31)
+FPR_S  $f24, $sp, -SZ_GPR-1*SZ_FPR
+FPR_S  $f25, $sp, -SZ_GPR-2*SZ_FPR
+FPR_S  $f26, $sp, -SZ_GPR-3*SZ_FPR
+FPR_S  $f27, $sp, -SZ_GPR-4*SZ_FPR
+FPR_S  $f28, $sp, -SZ_GPR-5*SZ_FPR
+FPR_S  $f29, $sp, -SZ_GPR-6*SZ_FPR
+FPR_S  $f30, $sp, -SZ_GPR-7*SZ_FPR
+FPR_S  $f31, $sp, -SZ_GPR-8*SZ_FPR
+#endif
+
+// callee-saved GPRs (r21, fp (r22), r23-r31)
+GPR_S $r21, $sp, 0*SZ_GPR
+GPR_S  $fp, $sp, 1*SZ_GPR
+GPR_S  $s0, $sp, 2*SZ_GPR
+GPR_S  $s1, $sp, 3*SZ_GPR
+GPR_S  $s2, $sp, 4*SZ_GPR
+GPR_S  $s3, $sp, 5*SZ_GPR
+GPR_S  $s4, $sp, 6*SZ_GPR
+GPR_S  $s5, $sp, 7*SZ_GPR
+GPR_S  $s6, $sp, 8*SZ_GPR
+GPR_S  $s7, $sp, 9*SZ_GPR
+GPR_S  $s8, $sp, 10*SZ_GPR
+
+// swap stack pointer
+GPR_S $sp, $a0, 0
+move $sp, $a1
+
+GPR_L  $r1, $sp, -SZ_GPR
+
+#if SZ_FPR != 0
+FPR_L  $f24, $sp, -SZ_GPR-1*SZ_FPR
+FPR_L  $f25, $sp, -SZ_GPR-2*SZ_FPR
+FPR_L  $f26, $sp, -SZ_GPR-3*SZ_FPR
+FPR_L  $f27, $sp, -SZ_GPR-4*SZ_FPR
+FPR_L  $f28, $sp, -SZ_GPR-5*SZ_FPR
+FPR_L  $f29, $sp, -SZ_GPR-6*SZ_FPR
+FPR_L  $f30, $sp, -SZ_GPR-7*SZ_FPR
+FPR_L  $f31, $sp, -SZ_GPR-8*SZ_FPR
+#endif
+
+GPR_L $r21, $sp, 0*SZ_GPR
+GPR_L  $fp, $sp, 1*SZ_GPR
+GPR_L  $s0, $sp, 2*SZ_GPR
+GPR_L  $s1, $sp, 3*SZ_GPR
+GPR_L  $s2, $sp, 4*SZ_GPR
+GPR_L  $s3, $sp, 5*SZ_GPR
+GPR_L  $s4, $sp, 6*SZ_GPR
+GPR_L  $s5, $sp, 7*SZ_GPR
+GPR_L  $s6, $sp, 8*SZ_GPR
+GPR_L  $s7, $sp, 9*SZ_GPR
+GPR_L  $s8, $sp, 10*SZ_GPR
+
+ADDSP(11 * SZ_GPR)
+
+jr $r1 // return
+.cfi_endproc
+.size fiber_switchContext,.-fiber_switchContext
-- 
2.43.0

[PATCH v3 0/3] LoongArch D support

[Yang Yujie]

This patchset is based on Zixing Liu's initial support patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-September/631260.html

Update v1 -> v3:
Rebased onto the dmd/druntime upstream state.

Regtested on loongarch64-linux-gnu with the following result:

=== libphobos Summary ===

FAIL: libphobos.config/test22523.d -- --DRT-testmode=run-main execution test
FAIL: libphobos.gc/precisegc.d execution test
FAIL: libphobos.phobos/std/datetime/systime.d (test for excess errors)
UNRESOLVED: libphobos.phobos/std/datetime/systime.d compilation failed to 
produce executable
UNSUPPORTED: libphobos.phobos/std/net/curl.d: skipped test
UNSUPPORTED: libphobos.phobos_shared/std/net/curl.d: skipped test
FAIL: libphobos.shared/loadDR.c -ldl -pthread -g execution test (out-of-tree 
testing)

# of expected passes1024
# of unexpected failures4
# of unresolved testcases   1
# of unsupported tests  2

=== gdc Summary ===

FAIL: gdc.test/runnable/testaa.d   execution test
FAIL: gdc.test/runnable/testaa.d -fPIC   execution test

# of expected passes10353
# of unexpected failures2
# of unsupported tests  631


Yang Yujie (3):
  LoongArch: Adjust D version strings.
  libphobos: Update build scripts for LoongArch64.
  libruntime: Add fiber context switch code for LoongArch.

 gcc/config/loongarch/loongarch-d.cc   |  27 ++--
 gcc/d/dmd/cond.d  |   6 +-
 gcc/d/implement-d.texi|   6 +
 libphobos/configure   |  21 ++-
 libphobos/libdruntime/Makefile.am |   3 +
 libphobos/libdruntime/Makefile.in |  98 -
 .../config/loongarch/switchcontext.S  | 133 ++
 libphobos/m4/druntime/cpu.m4  |   5 +
 8 files changed, 243 insertions(+), 56 deletions(-)
 create mode 100644 libphobos/libdruntime/config/loongarch/switchcontext.S

-- 
2.43.0

Re: [PATCH v2 3/3] libphobos: LoongArch hardware support.

[Yang Yujie]

On Fri, Dec 01, 2023 at 04:39:10PM +0800, Xi Ruoyao wrote:
> 
> This part seems
> https://github.com/dlang/phobos/commit/870eb5d5d6972b12dd4b69d48ef049abee811b6b.
> 
> Iain: would it be better to just perform a merge from upstream dmd?
> 
> -- 
> Xi Ruoyao 
> School of Aerospace Science and Technology, Xidian University

Thanks! I did't check the rebase carefully... This part duplicates with what 
Iain already merged.

Yujie

[PATCH v2 2/3] libphobos: Update build scripts for LoongArch64.

[Yang Yujie]

libphobos/ChangeLog:

* m4/druntime/cpu.m4: Support loongarch* targets.
* libdruntime/Makefile.am: Same.
* libdruntime/Makefile.in: Regenerate.
* configure: Regenerate.
---
 libphobos/configure   | 21 ++-
 libphobos/libdruntime/Makefile.am |  3 +
 libphobos/libdruntime/Makefile.in | 98 +++
 libphobos/m4/druntime/cpu.m4  |  5 ++
 4 files changed, 87 insertions(+), 40 deletions(-)

diff --git a/libphobos/configure b/libphobos/configure
index 25b13bdd93e..9a59bad34ac 100755
--- a/libphobos/configure
+++ b/libphobos/configure
@@ -696,6 +696,8 @@ DRUNTIME_CPU_POWERPC_FALSE
 DRUNTIME_CPU_POWERPC_TRUE
 DRUNTIME_CPU_MIPS_FALSE
 DRUNTIME_CPU_MIPS_TRUE
+DRUNTIME_CPU_LOONGARCH_FALSE
+DRUNTIME_CPU_LOONGARCH_TRUE
 DRUNTIME_CPU_ARM_FALSE
 DRUNTIME_CPU_ARM_TRUE
 DRUNTIME_CPU_AARCH64_FALSE
@@ -11865,7 +11867,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 11868 "configure"
+#line 11870 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -11971,7 +11973,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 11974 "configure"
+#line 11976 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -14305,6 +14307,9 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
;;
   arm*)druntime_target_cpu_parsed="arm"
;;
+  loongarch*)
+   druntime_target_cpu_parsed="loongarch"
+   ;;
   mips*)   druntime_target_cpu_parsed="mips"
;;
   powerpc*)
@@ -14336,6 +14341,14 @@ else
   DRUNTIME_CPU_ARM_FALSE=
 fi
 
+   if test "$druntime_target_cpu_parsed" = "loongarch"; then
+  DRUNTIME_CPU_LOONGARCH_TRUE=
+  DRUNTIME_CPU_LOONGARCH_FALSE='#'
+else
+  DRUNTIME_CPU_LOONGARCH_TRUE='#'
+  DRUNTIME_CPU_LOONGARCH_FALSE=
+fi
+
if test "$druntime_target_cpu_parsed" = "mips"; then
   DRUNTIME_CPU_MIPS_TRUE=
   DRUNTIME_CPU_MIPS_FALSE='#'
@@ -15997,6 +16010,10 @@ if test -z "${DRUNTIME_CPU_ARM_TRUE}" && test -z 
"${DRUNTIME_CPU_ARM_FALSE}"; th
   as_fn_error $? "conditional \"DRUNTIME_CPU_ARM\" was never defined.
 Usually this means the macro was only invoked conditionally." "$LINENO" 5
 fi
+if test -z "${DRUNTIME_CPU_LOONGARCH_TRUE}" && test -z 
"${DRUNTIME_CPU_LOONGARCH_FALSE}"; then
+  as_fn_error $? "conditional \"DRUNTIME_CPU_LOONGARCH\" was never defined.
+Usually this means the macro was only invoked conditionally." "$LINENO" 5
+fi
 if test -z "${DRUNTIME_CPU_MIPS_TRUE}" && test -z 
"${DRUNTIME_CPU_MIPS_FALSE}"; then
   as_fn_error $? "conditional \"DRUNTIME_CPU_MIPS\" was never defined.
 Usually this means the macro was only invoked conditionally." "$LINENO" 5
diff --git a/libphobos/libdruntime/Makefile.am 
b/libphobos/libdruntime/Makefile.am
index 23205fd3301..ca43a0753c4 100644
--- a/libphobos/libdruntime/Makefile.am
+++ b/libphobos/libdruntime/Makefile.am
@@ -83,6 +83,9 @@ endif
 if DRUNTIME_CPU_ARM
 DRUNTIME_SOURCES_CONFIGURED += config/arm/switchcontext.S
 endif
+if DRUNTIME_CPU_LOONGARCH
+DRUNTIME_SOURCES_CONFIGURED += config/loongarch/switchcontext.S
+endif
 if DRUNTIME_CPU_MIPS
 DRUNTIME_SOURCES_CONFIGURED += config/mips/switchcontext.S
 endif
diff --git a/libphobos/libdruntime/Makefile.in 
b/libphobos/libdruntime/Makefile.in
index 410245d71ca..f52bf36c282 100644
--- a/libphobos/libdruntime/Makefile.in
+++ b/libphobos/libdruntime/Makefile.in
@@ -124,12 +124,13 @@ target_triplet = @target@
 # CPU specific sources
 @DRUNTIME_CPU_AARCH64_TRUE@am__append_11 = config/aarch64/switchcontext.S
 @DRUNTIME_CPU_ARM_TRUE@am__append_12 = config/arm/switchcontext.S
-@DRUNTIME_CPU_MIPS_TRUE@am__append_13 = config/mips/switchcontext.S
-@DRUNTIME_CPU_POWERPC_TRUE@am__append_14 = config/powerpc/switchcontext.S
-@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_TRUE@am__append_15 = 
config/mingw/switchcontext.S
-@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_FALSE@am__append_16 = 
config/x86/switchcontext.S
-@DRUNTIME_CPU_SYSTEMZ_TRUE@am__append_17 = config/systemz/get_tls_offset.S
-@DRUNTIME_CPU_S390_TRUE@am__append_18 = config/s390/get_tls_offset.S
+@DRUNTIME_CPU_LOONGARCH_TRUE@am__append_13 = config/loongarch/switchcontext.S
+@DRUNTIME_CPU_MIPS_TRUE@am__append_14 = config/mips/switchcontext.S
+@DRUNTIME_CPU_POWERPC_TRUE@am__append_15 = config/powerpc/switchcontext.S
+@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_TRUE@am__append_16 = 
config/mingw/switchcontext.S
+@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_FALSE@am__append_17 = 
config/x86/switchcontext.S
+@DRUNTIME_CPU_SYSTEMZ_TRUE@am__append_18 = config/systemz/get_tls_offset.S
+@DRUNTIME_CPU_S390_TRUE@am__append_19 = config/s390/get_tls_offset.S
 subdir = libdruntime
 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -485,46 +486,50 @@ am__objects_23 = core/sys/solaris/dlfcn.lo 
core/sys/solaris/elf.lo \
 

[PATCH v2 0/3] LoongArch D support

[Yang Yujie]

This patchset is based on Zixing Liu's initial support patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-September/631260.html

Update v1 -> v2:
Rebased onto the dmd/druntime upstream state.

Regtested on loongarch64-linux-gnu with the following result:

=== libphobos Summary ===

FAIL: libphobos.config/test22523.d -- --DRT-testmode=run-main execution test
FAIL: libphobos.gc/precisegc.d execution test
FAIL: libphobos.phobos/std/datetime/systime.d (test for excess errors)
UNRESOLVED: libphobos.phobos/std/datetime/systime.d compilation failed to 
produce executable
UNSUPPORTED: libphobos.phobos/std/net/curl.d: skipped test
UNSUPPORTED: libphobos.phobos_shared/std/net/curl.d: skipped test
FAIL: libphobos.shared/loadDR.c -ldl -pthread -g execution test (out-of-tree 
testing)

# of expected passes1024
# of unexpected failures4
# of unresolved testcases   1
# of unsupported tests  2

=== gdc Summary ===

FAIL: gdc.test/runnable/testaa.d   execution test
FAIL: gdc.test/runnable/testaa.d -fPIC   execution test

# of expected passes10353
# of unexpected failures2
# of unsupported tests  631


Yang Yujie (3):
  LoongArch: Adjust D version strings.
  libphobos: Update build scripts for LoongArch64.
  libphobos: LoongArch hardware support.

 gcc/config/loongarch/loongarch-d.cc   |  27 ++--
 gcc/d/dmd/cond.d  |   6 +-
 gcc/d/implement-d.texi|   6 +
 libphobos/configure   |  21 ++-
 libphobos/libdruntime/Makefile.am |   3 +
 libphobos/libdruntime/Makefile.in |  98 -
 .../config/loongarch/switchcontext.S  | 133 ++
 libphobos/m4/druntime/cpu.m4  |   5 +
 libphobos/src/std/math/hardware.d |  53 +++
 9 files changed, 296 insertions(+), 56 deletions(-)
 create mode 100644 libphobos/libdruntime/config/loongarch/switchcontext.S

-- 
2.20.1

[PATCH v2 3/3] libphobos: LoongArch hardware support.

[Yang Yujie]

libphobos/ChangeLog:

* src/std/math/hardware.d: Implement FP control.
* libdruntime/config/loongarch/switchcontext.S: New file.
---
 .../config/loongarch/switchcontext.S  | 133 ++
 libphobos/src/std/math/hardware.d |  53 +++
 2 files changed, 186 insertions(+)
 create mode 100644 libphobos/libdruntime/config/loongarch/switchcontext.S

diff --git a/libphobos/libdruntime/config/loongarch/switchcontext.S 
b/libphobos/libdruntime/config/loongarch/switchcontext.S
new file mode 100644
index 000..edfb9b67e8f
--- /dev/null
+++ b/libphobos/libdruntime/config/loongarch/switchcontext.S
@@ -0,0 +1,133 @@
+/* LoongArch support code for fibers and multithreading.
+   Copyright (C) 2023 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+.  */
+
+#include "../common/threadasm.S"
+
+/**
+ * Performs a context switch.
+ *
+ * $a0 - void** - ptr to old stack pointer
+ * $a1 - void*  - new stack pointer
+ *
+ */
+
+#if defined(__loongarch_lp64)
+#  define GPR_L ld.d
+#  define GPR_S st.d
+#  define SZ_GPR 8
+#  define ADDSP(si)   addi.d  $sp, $sp, si
+#elif defined(__loongarch64_ilp32)
+#  define GPR_L ld.w
+#  define GPR_S st.w
+#  define SZ_GPR 4
+#  define ADDSP(si)   addi.w  $sp, $sp, si
+#else
+#  error Unsupported GPR size (must be 64-bit or 32-bit).
+#endif
+
+#if defined(__loongarch_double_float)
+#  define FPR_L fld.d
+#  define FPR_S fst.d
+#  define SZ_FPR 8
+#elif defined(__loongarch_single_float)
+#  define FPR_L fld.s
+#  define FPR_S fst.s
+#  define SZ_FPR 4
+#else
+#  define SZ_FPR 0
+#endif
+
+.text
+.align 2
+.global fiber_switchContext
+.type   fiber_switchContext, @function
+fiber_switchContext:
+.cfi_startproc
+ADDSP(-11 * SZ_GPR)
+
+// fp regs and return address are stored below the stack
+// because we don't want the GC to scan them.
+
+// return address (r1)
+GPR_S  $r1, $sp, -SZ_GPR
+
+#if SZ_FPR != 0
+// callee-saved scratch FPRs (f24-f31)
+FPR_S  $f24, $sp, -SZ_GPR-1*SZ_FPR
+FPR_S  $f25, $sp, -SZ_GPR-2*SZ_FPR
+FPR_S  $f26, $sp, -SZ_GPR-3*SZ_FPR
+FPR_S  $f27, $sp, -SZ_GPR-4*SZ_FPR
+FPR_S  $f28, $sp, -SZ_GPR-5*SZ_FPR
+FPR_S  $f29, $sp, -SZ_GPR-6*SZ_FPR
+FPR_S  $f30, $sp, -SZ_GPR-7*SZ_FPR
+FPR_S  $f31, $sp, -SZ_GPR-8*SZ_FPR
+#endif
+
+// callee-saved GPRs (r21, fp (r22), r23-r31)
+GPR_S $r21, $sp, 0*SZ_GPR
+GPR_S  $fp, $sp, 1*SZ_GPR
+GPR_S  $s0, $sp, 2*SZ_GPR
+GPR_S  $s1, $sp, 3*SZ_GPR
+GPR_S  $s2, $sp, 4*SZ_GPR
+GPR_S  $s3, $sp, 5*SZ_GPR
+GPR_S  $s4, $sp, 6*SZ_GPR
+GPR_S  $s5, $sp, 7*SZ_GPR
+GPR_S  $s6, $sp, 8*SZ_GPR
+GPR_S  $s7, $sp, 9*SZ_GPR
+GPR_S  $s8, $sp, 10*SZ_GPR
+
+// swap stack pointer
+GPR_S $sp, $a0, 0
+move $sp, $a1
+
+GPR_L  $r1, $sp, -SZ_GPR
+
+#if SZ_FPR != 0
+FPR_L  $f24, $sp, -SZ_GPR-1*SZ_FPR
+FPR_L  $f25, $sp, -SZ_GPR-2*SZ_FPR
+FPR_L  $f26, $sp, -SZ_GPR-3*SZ_FPR
+FPR_L  $f27, $sp, -SZ_GPR-4*SZ_FPR
+FPR_L  $f28, $sp, -SZ_GPR-5*SZ_FPR
+FPR_L  $f29, $sp, -SZ_GPR-6*SZ_FPR
+FPR_L  $f30, $sp, -SZ_GPR-7*SZ_FPR
+FPR_L  $f31, $sp, -SZ_GPR-8*SZ_FPR
+#endif
+
+GPR_L $r21, $sp, 0*SZ_GPR
+GPR_L  $fp, $sp, 1*SZ_GPR
+GPR_L  $s0, $sp, 2*SZ_GPR
+GPR_L  $s1, $sp, 3*SZ_GPR
+GPR_L  $s2, $sp, 4*SZ_GPR
+GPR_L  $s3, $sp, 5*SZ_GPR
+GPR_L  $s4, $sp, 6*SZ_GPR
+GPR_L  $s5, $sp, 7*SZ_GPR
+GPR_L  $s6, $sp, 8*SZ_GPR
+GPR_L  $s7, $sp, 9*SZ_GPR
+GPR_L  $s8, $sp, 10*SZ_GPR
+
+ADDSP(11 * SZ_GPR)
+
+jr $r1 // return
+.cfi_endproc
+.size fiber_switchContext,.-fiber_switchContext
diff --git a/libphobos/src/std/math/hardware.d 
b/libphobos/src/std/math/hardware.d
index cb6cb87845c..8d11459a8ac 100644
--- a/libphobos/src/std/math/hardware.d
+++ b/libphobos/src/std/math/hardware.d
@@ -177,6 +177,20 @@ private:
 return result;
 }
 }
+else version (LoongArch_Any)
+{
+version (D_SoftFloat)
+return 0;
+else
+{
+  

[PATCH v2 1/3] LoongArch: Adjust D version strings.

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/loongarch-d.cc: Undefine LoongArch32.
Define LoongArch_SF, LoongArch_F32, LoongArch_F64

gcc/d/ChangeLog:

* dmd/cond.d: Same.
* implement-d.texi: Same.
---
 gcc/config/loongarch/loongarch-d.cc | 27 ++-
 gcc/d/dmd/cond.d|  6 +++---
 gcc/d/implement-d.texi  |  6 ++
 3 files changed, 23 insertions(+), 16 deletions(-)

diff --git a/gcc/config/loongarch/loongarch-d.cc 
b/gcc/config/loongarch/loongarch-d.cc
index 9ac483c39a7..4692b78708a 100644
--- a/gcc/config/loongarch/loongarch-d.cc
+++ b/gcc/config/loongarch/loongarch-d.cc
@@ -29,24 +29,27 @@ along with GCC; see the file COPYING3.  If not see
 void
 loongarch_d_target_versions (void)
 {
-  if (TARGET_64BIT)
+  if (TARGET_ABI_LP64)
 d_add_builtin_version ("LoongArch64");
-  else
-d_add_builtin_version ("LoongArch32");
 
-  if (TARGET_HARD_FLOAT_ABI)
+  if (TARGET_DOUBLE_FLOAT_ABI)
+{
+  d_add_builtin_version ("LoongArch_F64");
+  d_add_builtin_version ("D_HardFloat");
+}
+  else if (TARGET_SINGLE_FLOAT_ABI)
 {
-  d_add_builtin_version ("LoongArch_HardFloat");
+  d_add_builtin_version ("LoongArch_F32");
   d_add_builtin_version ("D_HardFloat");
 }
-  else if (TARGET_SOFT_FLOAT_ABI)
+  else
 {
-  d_add_builtin_version ("LoongArch_SoftFloat");
+  d_add_builtin_version ("LoongArch_SF");
   d_add_builtin_version ("D_SoftFloat");
 }
 }
 
-/* Handle a call to `__traits(getTargetInfo, "floatAbi")'.  */
+/* Handle trait getTargetInfo with key "floatAbi"  */
 
 static tree
 loongarch_d_handle_target_float_abi (void)
@@ -55,10 +58,8 @@ loongarch_d_handle_target_float_abi (void)
 
   if (TARGET_HARD_FLOAT_ABI)
 abi = "hard";
-  else if (TARGET_SOFT_FLOAT_ABI)
-abi = "soft";
   else
-abi = "";
+abi = "soft";
 
   return build_string_literal (strlen (abi) + 1, abi);
 }
@@ -69,8 +70,8 @@ void
 loongarch_d_register_target_info (void)
 {
   const struct d_target_info_spec handlers[] = {
-{"floatAbi", loongarch_d_handle_target_float_abi},
-{NULL, NULL},
+{ "floatAbi", loongarch_d_handle_target_float_abi },
+{ NULL, NULL },
   };
 
   d_add_target_info_handlers (handlers);
diff --git a/gcc/d/dmd/cond.d b/gcc/d/dmd/cond.d
index 568b639e0b6..02af0cc9e29 100644
--- a/gcc/d/dmd/cond.d
+++ b/gcc/d/dmd/cond.d
@@ -693,10 +693,10 @@ extern (C++) final class VersionCondition : DVCondition
 case "LDC":
 case "linux":
 case "LittleEndian":
-case "LoongArch32":
 case "LoongArch64":
-case "LoongArch_HardFloat":
-case "LoongArch_SoftFloat":
+case "LoongArch_F64":
+case "LoongArch_F32":
+case "LoongArch_SF":
 case "MinGW":
 case "MIPS32":
 case "MIPS64":
diff --git a/gcc/d/implement-d.texi b/gcc/d/implement-d.texi
index 6f33bc192fe..cc0d1ecf593 100644
--- a/gcc/d/implement-d.texi
+++ b/gcc/d/implement-d.texi
@@ -1966,6 +1966,12 @@ Version relating to GNU Hurd systems.
 @item linux
 Version relating to Linux systems.
 
+@item LoongArch64
+@item LoongArch_SF
+@item LoongArch_F32
+@item LoongArch_F64
+Versions relating to the LoongArch family of processors.
+
 @item MinGW
 Version relating to the MinGW environment.
 
-- 
2.20.1

[PATCH 3/3] libphobos: Adjust LoongArch definitons.

[Yang Yujie]

Upstream commits:
https://github.com/dlang/phobos/commit/870eb5d5d6972b12dd4b69d48ef049abee811b6b
https://github.com/dlang/dmd/commit/9cb5517290fac5d28f52c11c254115c0f1086b69

libphobos/ChangeLog:

* libdruntime/core/stdc/fenv.d: Fix LongArch FP rounding mode constants.
* libdruntime/core/vararg.d: Add LoongArch64 support.
* libdruntime/core/stdc/stdarg.d: Same.
* libdruntime/core/sys/linux/sys/auxv.d: Same.
* libdruntime/core/sys/elf/package.d: Define EM_LOONGARCH (258).
* libdruntime/core/sys/linux/sys/mman.d: Reference corresponding
glibc header in comment.
* libdruntime/core/thread/fiber.d: Save $r21 in fiber contexts.
* src/std/math/hardware.d: Implement FP control.
* libdruntime/config/loongarch/switchcontext.S: New file.
---
 .../config/loongarch/switchcontext.S  | 133 ++
 libphobos/libdruntime/core/stdc/fenv.d|   8 +-
 libphobos/libdruntime/core/stdc/stdarg.d  |   6 +
 libphobos/libdruntime/core/sys/elf/package.d  |   2 +
 .../libdruntime/core/sys/linux/sys/auxv.d |  17 +++
 .../libdruntime/core/sys/linux/sys/mman.d |   1 +
 libphobos/libdruntime/core/thread/fiber.d |  55 +---
 libphobos/libdruntime/core/vararg.d   |   7 +
 libphobos/src/std/math/hardware.d |  77 ++
 9 files changed, 279 insertions(+), 27 deletions(-)
 create mode 100644 libphobos/libdruntime/config/loongarch/switchcontext.S

diff --git a/libphobos/libdruntime/config/loongarch/switchcontext.S 
b/libphobos/libdruntime/config/loongarch/switchcontext.S
new file mode 100644
index 000..edfb9b67e8f
--- /dev/null
+++ b/libphobos/libdruntime/config/loongarch/switchcontext.S
@@ -0,0 +1,133 @@
+/* LoongArch support code for fibers and multithreading.
+   Copyright (C) 2023 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+.  */
+
+#include "../common/threadasm.S"
+
+/**
+ * Performs a context switch.
+ *
+ * $a0 - void** - ptr to old stack pointer
+ * $a1 - void*  - new stack pointer
+ *
+ */
+
+#if defined(__loongarch_lp64)
+#  define GPR_L ld.d
+#  define GPR_S st.d
+#  define SZ_GPR 8
+#  define ADDSP(si)   addi.d  $sp, $sp, si
+#elif defined(__loongarch64_ilp32)
+#  define GPR_L ld.w
+#  define GPR_S st.w
+#  define SZ_GPR 4
+#  define ADDSP(si)   addi.w  $sp, $sp, si
+#else
+#  error Unsupported GPR size (must be 64-bit or 32-bit).
+#endif
+
+#if defined(__loongarch_double_float)
+#  define FPR_L fld.d
+#  define FPR_S fst.d
+#  define SZ_FPR 8
+#elif defined(__loongarch_single_float)
+#  define FPR_L fld.s
+#  define FPR_S fst.s
+#  define SZ_FPR 4
+#else
+#  define SZ_FPR 0
+#endif
+
+.text
+.align 2
+.global fiber_switchContext
+.type   fiber_switchContext, @function
+fiber_switchContext:
+.cfi_startproc
+ADDSP(-11 * SZ_GPR)
+
+// fp regs and return address are stored below the stack
+// because we don't want the GC to scan them.
+
+// return address (r1)
+GPR_S  $r1, $sp, -SZ_GPR
+
+#if SZ_FPR != 0
+// callee-saved scratch FPRs (f24-f31)
+FPR_S  $f24, $sp, -SZ_GPR-1*SZ_FPR
+FPR_S  $f25, $sp, -SZ_GPR-2*SZ_FPR
+FPR_S  $f26, $sp, -SZ_GPR-3*SZ_FPR
+FPR_S  $f27, $sp, -SZ_GPR-4*SZ_FPR
+FPR_S  $f28, $sp, -SZ_GPR-5*SZ_FPR
+FPR_S  $f29, $sp, -SZ_GPR-6*SZ_FPR
+FPR_S  $f30, $sp, -SZ_GPR-7*SZ_FPR
+FPR_S  $f31, $sp, -SZ_GPR-8*SZ_FPR
+#endif
+
+// callee-saved GPRs (r21, fp (r22), r23-r31)
+GPR_S $r21, $sp, 0*SZ_GPR
+GPR_S  $fp, $sp, 1*SZ_GPR
+GPR_S  $s0, $sp, 2*SZ_GPR
+GPR_S  $s1, $sp, 3*SZ_GPR
+GPR_S  $s2, $sp, 4*SZ_GPR
+GPR_S  $s3, $sp, 5*SZ_GPR
+GPR_S  $s4, $sp, 6*SZ_GPR
+GPR_S  $s5, $sp, 7*SZ_GPR
+GPR_S  $s6, $sp, 8*SZ_GPR
+GPR_S  $s7, $sp, 9*SZ_GPR
+GPR_S  $s8, $sp, 10*SZ_GPR
+
+// swap stack pointer
+GPR_S $sp, $a0, 0
+move $sp, $a1
+
+GPR_L  $r1, $sp, -SZ_GPR
+
+#if SZ_FPR != 0
+FPR_L  $f24, $sp, -SZ_GPR-1*SZ_FPR
+FPR_L  $f25, $sp, -SZ_GPR-2*SZ_FPR
+FPR_L  $f26, $sp, -SZ_GPR-3*SZ_FPR
+FPR_L  $f27, $sp, -SZ_GPR-4*SZ_FPR
+FPR_L  $f28, $sp, 

[PATCH 2/3] libphobos: Update build scripts for LoongArch64.

[Yang Yujie]

libphobos/ChangeLog:

* m4/druntime/cpu.m4: Support loongarch* targets.
* libdruntime/Makefile.am: Same.
* libdruntime/Makefile.in: Regenerate.
* configure: Regenerate.
---
 libphobos/configure   | 21 ++-
 libphobos/libdruntime/Makefile.am |  3 +
 libphobos/libdruntime/Makefile.in | 98 +++
 libphobos/m4/druntime/cpu.m4  |  5 ++
 4 files changed, 87 insertions(+), 40 deletions(-)

diff --git a/libphobos/configure b/libphobos/configure
index 25b13bdd93e..9a59bad34ac 100755
--- a/libphobos/configure
+++ b/libphobos/configure
@@ -696,6 +696,8 @@ DRUNTIME_CPU_POWERPC_FALSE
 DRUNTIME_CPU_POWERPC_TRUE
 DRUNTIME_CPU_MIPS_FALSE
 DRUNTIME_CPU_MIPS_TRUE
+DRUNTIME_CPU_LOONGARCH_FALSE
+DRUNTIME_CPU_LOONGARCH_TRUE
 DRUNTIME_CPU_ARM_FALSE
 DRUNTIME_CPU_ARM_TRUE
 DRUNTIME_CPU_AARCH64_FALSE
@@ -11865,7 +11867,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 11868 "configure"
+#line 11870 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -11971,7 +11973,7 @@ else
   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
   lt_status=$lt_dlunknown
   cat > conftest.$ac_ext <<_LT_EOF
-#line 11974 "configure"
+#line 11976 "configure"
 #include "confdefs.h"
 
 #if HAVE_DLFCN_H
@@ -14305,6 +14307,9 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
;;
   arm*)druntime_target_cpu_parsed="arm"
;;
+  loongarch*)
+   druntime_target_cpu_parsed="loongarch"
+   ;;
   mips*)   druntime_target_cpu_parsed="mips"
;;
   powerpc*)
@@ -14336,6 +14341,14 @@ else
   DRUNTIME_CPU_ARM_FALSE=
 fi
 
+   if test "$druntime_target_cpu_parsed" = "loongarch"; then
+  DRUNTIME_CPU_LOONGARCH_TRUE=
+  DRUNTIME_CPU_LOONGARCH_FALSE='#'
+else
+  DRUNTIME_CPU_LOONGARCH_TRUE='#'
+  DRUNTIME_CPU_LOONGARCH_FALSE=
+fi
+
if test "$druntime_target_cpu_parsed" = "mips"; then
   DRUNTIME_CPU_MIPS_TRUE=
   DRUNTIME_CPU_MIPS_FALSE='#'
@@ -15997,6 +16010,10 @@ if test -z "${DRUNTIME_CPU_ARM_TRUE}" && test -z 
"${DRUNTIME_CPU_ARM_FALSE}"; th
   as_fn_error $? "conditional \"DRUNTIME_CPU_ARM\" was never defined.
 Usually this means the macro was only invoked conditionally." "$LINENO" 5
 fi
+if test -z "${DRUNTIME_CPU_LOONGARCH_TRUE}" && test -z 
"${DRUNTIME_CPU_LOONGARCH_FALSE}"; then
+  as_fn_error $? "conditional \"DRUNTIME_CPU_LOONGARCH\" was never defined.
+Usually this means the macro was only invoked conditionally." "$LINENO" 5
+fi
 if test -z "${DRUNTIME_CPU_MIPS_TRUE}" && test -z 
"${DRUNTIME_CPU_MIPS_FALSE}"; then
   as_fn_error $? "conditional \"DRUNTIME_CPU_MIPS\" was never defined.
 Usually this means the macro was only invoked conditionally." "$LINENO" 5
diff --git a/libphobos/libdruntime/Makefile.am 
b/libphobos/libdruntime/Makefile.am
index 23205fd3301..ca43a0753c4 100644
--- a/libphobos/libdruntime/Makefile.am
+++ b/libphobos/libdruntime/Makefile.am
@@ -83,6 +83,9 @@ endif
 if DRUNTIME_CPU_ARM
 DRUNTIME_SOURCES_CONFIGURED += config/arm/switchcontext.S
 endif
+if DRUNTIME_CPU_LOONGARCH
+DRUNTIME_SOURCES_CONFIGURED += config/loongarch/switchcontext.S
+endif
 if DRUNTIME_CPU_MIPS
 DRUNTIME_SOURCES_CONFIGURED += config/mips/switchcontext.S
 endif
diff --git a/libphobos/libdruntime/Makefile.in 
b/libphobos/libdruntime/Makefile.in
index 410245d71ca..f52bf36c282 100644
--- a/libphobos/libdruntime/Makefile.in
+++ b/libphobos/libdruntime/Makefile.in
@@ -124,12 +124,13 @@ target_triplet = @target@
 # CPU specific sources
 @DRUNTIME_CPU_AARCH64_TRUE@am__append_11 = config/aarch64/switchcontext.S
 @DRUNTIME_CPU_ARM_TRUE@am__append_12 = config/arm/switchcontext.S
-@DRUNTIME_CPU_MIPS_TRUE@am__append_13 = config/mips/switchcontext.S
-@DRUNTIME_CPU_POWERPC_TRUE@am__append_14 = config/powerpc/switchcontext.S
-@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_TRUE@am__append_15 = 
config/mingw/switchcontext.S
-@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_FALSE@am__append_16 = 
config/x86/switchcontext.S
-@DRUNTIME_CPU_SYSTEMZ_TRUE@am__append_17 = config/systemz/get_tls_offset.S
-@DRUNTIME_CPU_S390_TRUE@am__append_18 = config/s390/get_tls_offset.S
+@DRUNTIME_CPU_LOONGARCH_TRUE@am__append_13 = config/loongarch/switchcontext.S
+@DRUNTIME_CPU_MIPS_TRUE@am__append_14 = config/mips/switchcontext.S
+@DRUNTIME_CPU_POWERPC_TRUE@am__append_15 = config/powerpc/switchcontext.S
+@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_TRUE@am__append_16 = 
config/mingw/switchcontext.S
+@DRUNTIME_CPU_X86_TRUE@@DRUNTIME_OS_MINGW_FALSE@am__append_17 = 
config/x86/switchcontext.S
+@DRUNTIME_CPU_SYSTEMZ_TRUE@am__append_18 = config/systemz/get_tls_offset.S
+@DRUNTIME_CPU_S390_TRUE@am__append_19 = config/s390/get_tls_offset.S
 subdir = libdruntime
 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -485,46 +486,50 @@ am__objects_23 = core/sys/solaris/dlfcn.lo 
core/sys/solaris/elf.lo \
 

[PATCH 0/3] LoongArch GDC support.

[Yang Yujie]

This patchset is based on Zixing Liu's initial support patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-September/631260.html

Yang Yujie (3):
  LoongArch: Adjust D version strings.
  libphobos: Update build scripts for LoongArch64.
  libphobos: Adjust LoongArch definitons.

 gcc/config/loongarch/loongarch-d.cc   |  27 ++--
 gcc/d/dmd/cond.d  |   6 +-
 gcc/d/implement-d.texi|   6 +
 libphobos/configure   |  21 ++-
 libphobos/libdruntime/Makefile.am |   3 +
 libphobos/libdruntime/Makefile.in |  98 -
 .../config/loongarch/switchcontext.S  | 133 ++
 libphobos/libdruntime/core/stdc/fenv.d|   8 +-
 libphobos/libdruntime/core/stdc/stdarg.d  |   6 +
 libphobos/libdruntime/core/sys/elf/package.d  |   2 +
 .../libdruntime/core/sys/linux/sys/auxv.d |  17 +++
 .../libdruntime/core/sys/linux/sys/mman.d |   1 +
 libphobos/libdruntime/core/thread/fiber.d |  55 +---
 libphobos/libdruntime/core/vararg.d   |   7 +
 libphobos/m4/druntime/cpu.m4  |   5 +
 libphobos/src/std/math/hardware.d |  77 ++
 16 files changed, 389 insertions(+), 83 deletions(-)
 create mode 100644 libphobos/libdruntime/config/loongarch/switchcontext.S

-- 
2.42.1

[PATCH 1/3] LoongArch: Adjust D version strings.

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/loongarch-d.cc: Undefine LoongArch32.
Define LoongArch_SF, LoongArch_F32, LoongArch_F64

gcc/d/ChangeLog:

* dmd/cond.d: Same.
* implement-d.texi: Same.
---
 gcc/config/loongarch/loongarch-d.cc | 27 ++-
 gcc/d/dmd/cond.d|  6 +++---
 gcc/d/implement-d.texi  |  6 ++
 3 files changed, 23 insertions(+), 16 deletions(-)

diff --git a/gcc/config/loongarch/loongarch-d.cc 
b/gcc/config/loongarch/loongarch-d.cc
index 9ac483c39a7..4692b78708a 100644
--- a/gcc/config/loongarch/loongarch-d.cc
+++ b/gcc/config/loongarch/loongarch-d.cc
@@ -29,24 +29,27 @@ along with GCC; see the file COPYING3.  If not see
 void
 loongarch_d_target_versions (void)
 {
-  if (TARGET_64BIT)
+  if (TARGET_ABI_LP64)
 d_add_builtin_version ("LoongArch64");
-  else
-d_add_builtin_version ("LoongArch32");
 
-  if (TARGET_HARD_FLOAT_ABI)
+  if (TARGET_DOUBLE_FLOAT_ABI)
+{
+  d_add_builtin_version ("LoongArch_F64");
+  d_add_builtin_version ("D_HardFloat");
+}
+  else if (TARGET_SINGLE_FLOAT_ABI)
 {
-  d_add_builtin_version ("LoongArch_HardFloat");
+  d_add_builtin_version ("LoongArch_F32");
   d_add_builtin_version ("D_HardFloat");
 }
-  else if (TARGET_SOFT_FLOAT_ABI)
+  else
 {
-  d_add_builtin_version ("LoongArch_SoftFloat");
+  d_add_builtin_version ("LoongArch_SF");
   d_add_builtin_version ("D_SoftFloat");
 }
 }
 
-/* Handle a call to `__traits(getTargetInfo, "floatAbi")'.  */
+/* Handle trait getTargetInfo with key "floatAbi"  */
 
 static tree
 loongarch_d_handle_target_float_abi (void)
@@ -55,10 +58,8 @@ loongarch_d_handle_target_float_abi (void)
 
   if (TARGET_HARD_FLOAT_ABI)
 abi = "hard";
-  else if (TARGET_SOFT_FLOAT_ABI)
-abi = "soft";
   else
-abi = "";
+abi = "soft";
 
   return build_string_literal (strlen (abi) + 1, abi);
 }
@@ -69,8 +70,8 @@ void
 loongarch_d_register_target_info (void)
 {
   const struct d_target_info_spec handlers[] = {
-{"floatAbi", loongarch_d_handle_target_float_abi},
-{NULL, NULL},
+{ "floatAbi", loongarch_d_handle_target_float_abi },
+{ NULL, NULL },
   };
 
   d_add_target_info_handlers (handlers);
diff --git a/gcc/d/dmd/cond.d b/gcc/d/dmd/cond.d
index a8d099433a2..a6317eeffb1 100644
--- a/gcc/d/dmd/cond.d
+++ b/gcc/d/dmd/cond.d
@@ -692,10 +692,10 @@ extern (C++) final class VersionCondition : DVCondition
 case "LDC":
 case "linux":
 case "LittleEndian":
-case "LoongArch32":
 case "LoongArch64":
-case "LoongArch_HardFloat":
-case "LoongArch_SoftFloat":
+case "LoongArch_F64":
+case "LoongArch_F32":
+case "LoongArch_SF":
 case "MinGW":
 case "MIPS32":
 case "MIPS64":
diff --git a/gcc/d/implement-d.texi b/gcc/d/implement-d.texi
index 6f33bc192fe..cc0d1ecf593 100644
--- a/gcc/d/implement-d.texi
+++ b/gcc/d/implement-d.texi
@@ -1966,6 +1966,12 @@ Version relating to GNU Hurd systems.
 @item linux
 Version relating to Linux systems.
 
+@item LoongArch64
+@item LoongArch_SF
+@item LoongArch_F32
+@item LoongArch_F64
+Versions relating to the LoongArch family of processors.
+
 @item MinGW
 Version relating to the MinGW environment.
 
-- 
2.42.1

[PATCH] LoongArch: Fix eh_return epilogue for normal returns.

[Yang Yujie]

gcc/ChangeLog:

* config/loongarch/loongarch.cc: Do not restore the saved eh_return
data registers ($r4-$r7) for a normal return of a function that calls
__builtin_eh_return elsewhere.
* config/loongarch/loongarch-protos.h: Same.
* config/loongarch/loongarch.md: Same.
---
 gcc/config/loongarch/loongarch-protos.h |  2 +-
 gcc/config/loongarch/loongarch.cc   | 41 -
 gcc/config/loongarch/loongarch.md   | 18 +--
 3 files changed, 44 insertions(+), 17 deletions(-)

diff --git a/gcc/config/loongarch/loongarch-protos.h 
b/gcc/config/loongarch/loongarch-protos.h
index cb8fc36b086..af20b5d7132 100644
--- a/gcc/config/loongarch/loongarch-protos.h
+++ b/gcc/config/loongarch/loongarch-protos.h
@@ -60,7 +60,7 @@ enum loongarch_symbol_type {
 extern rtx loongarch_emit_move (rtx, rtx);
 extern HOST_WIDE_INT loongarch_initial_elimination_offset (int, int);
 extern void loongarch_expand_prologue (void);
-extern void loongarch_expand_epilogue (bool);
+extern void loongarch_expand_epilogue (int);
 extern bool loongarch_can_use_return_insn (void);
 
 extern bool loongarch_symbolic_constant_p (rtx, enum loongarch_symbol_type *);
diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index 738911661d7..7f60a4367d3 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -1011,20 +1011,30 @@ loongarch_save_restore_reg (machine_mode mode, int 
regno, HOST_WIDE_INT offset,
 
 static void
 loongarch_for_each_saved_reg (HOST_WIDE_INT sp_offset,
- loongarch_save_restore_fn fn)
+ loongarch_save_restore_fn fn,
+ bool skip_eh_data_regs_p)
 {
   HOST_WIDE_INT offset;
 
   /* Save the link register and s-registers.  */
   offset = cfun->machine->frame.gp_sp_offset - sp_offset;
   for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
-if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
-  {
-   if (!cfun->machine->reg_is_wrapped_separately[regno])
- loongarch_save_restore_reg (word_mode, regno, offset, fn);
+{
+  /* Special care needs to be taken for $r4-$r7 (EH_RETURN_DATA_REGNO)
+when returning normally from a function that calls __builtin_eh_return.
+In this case, these registers are saved but should not be restored,
+or the return value may be clobbered.  */
 
-   offset -= UNITS_PER_WORD;
-  }
+  if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST))
+   {
+ if (!(cfun->machine->reg_is_wrapped_separately[regno]
+   || (skip_eh_data_regs_p
+   && GP_ARG_FIRST <= regno && regno < GP_ARG_FIRST + 4)))
+   loongarch_save_restore_reg (word_mode, regno, offset, fn);
+
+ offset -= UNITS_PER_WORD;
+   }
+}
 
   /* This loop must iterate over the same space as its companion in
  loongarch_compute_frame_info.  */
@@ -1293,7 +1303,7 @@ loongarch_expand_prologue (void)
GEN_INT (-step1));
   RTX_FRAME_RELATED_P (emit_insn (insn)) = 1;
   size -= step1;
-  loongarch_for_each_saved_reg (size, loongarch_save_reg);
+  loongarch_for_each_saved_reg (size, loongarch_save_reg, false);
 }
 
   /* Set up the frame pointer, if we're using one.  */
@@ -1378,11 +1388,11 @@ loongarch_can_use_return_insn (void)
   return reload_completed && cfun->machine->frame.total_size == 0;
 }
 
-/* Expand an "epilogue" or "sibcall_epilogue" pattern; SIBCALL_P
-   says which.  */
+/* Expand function epilogue for the following insn patterns:
+   "epilogue" (style == 0) / "sibcall_epilogue" (1) / "eh_return" (2).  */
 
 void
-loongarch_expand_epilogue (bool sibcall_p)
+loongarch_expand_epilogue (int style)
 {
   /* Split the frame into two.  STEP1 is the amount of stack we should
  deallocate before restoring the registers.  STEP2 is the amount we
@@ -1399,7 +1409,8 @@ loongarch_expand_epilogue (bool sibcall_p)
   bool need_barrier_p
 = (get_frame_size () + cfun->machine->frame.arg_pointer_offset) != 0;
 
-  if (!sibcall_p && loongarch_can_use_return_insn ())
+  /* Handle simple returns.  */
+  if (style == 0 && loongarch_can_use_return_insn ())
 {
   emit_jump_insn (gen_return ());
   return;
@@ -1475,7 +1486,8 @@ loongarch_expand_epilogue (bool sibcall_p)
 
   /* Restore the registers.  */
   loongarch_for_each_saved_reg (frame->total_size - step2,
-   loongarch_restore_reg);
+   loongarch_restore_reg,
+   crtl->calls_eh_return && style != 2);
 
   if (need_barrier_p)
 loongarch_emit_stack_tie ();
@@ -1500,7 +1512,8 @@ loongarch_expand_epilogue (bool sibcall_p)
 emit_insn (gen_add3_insn (stack_pointer_rtx, stack_pointer_rtx,
  EH_RETURN_STACKADJ_RTX));
 
-  if (!sibcall_p)
+  /* Emit return unless doing sibcall.  

Re: Re: [PATCH] libsanitizer: adjust triplet pattern to allow loongarch64-linux* targets.

[Yang Yujie]

> ${target} in there shouldn't be what user specified, but what config.sub
> canonicalized it to.
> And
> ./config.sub x86_64-linux; ./config.sub loongarch64-linux
> x86_64-pc-linux-gnu
> loongarch64-unknown-linux-gnu
> so I really don't see why you want to change it.

OK, I see.  Thanks.

Yujie

[PATCH] libphobos: Fix static build.

[Yang Yujie]

This is a temporary solution to
https://forum.dlang.org/thread/bug-1226...@https.d.puremagic.com%2Fissues%2F

libphobos/ChangeLog:

* libdruntime/gcc/sections/elf.d: Removes reference to __tls_get_addr 
for
static libdruntime.
---
 libphobos/libdruntime/gcc/sections/elf.d | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/libphobos/libdruntime/gcc/sections/elf.d 
b/libphobos/libdruntime/gcc/sections/elf.d
index 5376957befd..46234ae7229 100644
--- a/libphobos/libdruntime/gcc/sections/elf.d
+++ b/libphobos/libdruntime/gcc/sections/elf.d
@@ -1091,7 +1091,9 @@ void[] getTLSRange(size_t mod, size_t sz) nothrow @nogc
 addr = addr + cast(c_ulong)__builtin_thread_pointer();
 return addr[0 .. sz];
 }
-else
+else version (Shared)
 return (__tls_get_addr()-TLS_DTV_OFFSET)[0 .. sz];
+else
+return null;
 }
 }
-- 
2.42.1

[PATCH] libsanitizer: adjust triplet pattern to allow loongarch64-linux* targets.

[Yang Yujie]

libsanitizer/ChangeLog:

* configure.tgt: allow loongarch64-linux-*.
---
 libsanitizer/configure.tgt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt
index d24566a2343..5af524cb271 100644
--- a/libsanitizer/configure.tgt
+++ b/libsanitizer/configure.tgt
@@ -73,7 +73,7 @@ case "${target}" in
;;
   riscv64-*-linux*)
;;
-  loongarch64-*-linux*)
+  loongarch64-*linux*)
;;
   *)
UNSUPPORTED=1
-- 
2.42.1

[PATCH v2] LoongArch: Adjust makefile dependency for loongarch headers.

[Yang Yujie]

gcc/ChangeLog:

* config.gcc: Add loongarch-driver.h to tm_files.
* config/loongarch/loongarch.h: Do not include loongarch-driver.h.
* config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
instead of $(TM_H) for building generator programs.
---
 gcc/config.gcc   | 4 ++--
 gcc/config/loongarch/loongarch.h | 3 ---
 gcc/config/loongarch/t-loongarch | 3 ++-
 3 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index ee46d96bf62..60f63b6c7d4 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2524,7 +2524,7 @@ riscv*-*-freebsd*)
 
 loongarch*-*-linux*)
tm_file="elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h 
${tm_file}"
-   tm_file="${tm_file} loongarch/gnu-user.h loongarch/linux.h"
+   tm_file="${tm_file} loongarch/gnu-user.h loongarch/linux.h 
loongarch/loongarch-driver.h"
extra_options="${extra_options} linux-android.opt"
tmake_file="${tmake_file} loongarch/t-multilib loongarch/t-linux"
gnu_ld=yes
@@ -2537,7 +2537,7 @@ loongarch*-*-linux*)
 
 loongarch*-*-elf*)
tm_file="elfos.h newlib-stdint.h ${tm_file}"
-   tm_file="${tm_file} loongarch/elf.h loongarch/linux.h"
+   tm_file="${tm_file} loongarch/elf.h loongarch/linux.h 
loongarch/loongarch-driver.h"
tmake_file="${tmake_file} loongarch/t-multilib loongarch/t-linux"
gnu_ld=yes
gas=yes
diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index d357e32e414..19a18fb5f1b 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -49,9 +49,6 @@ along with GCC; see the file COPYING3.  If not see
 
 #define TARGET_LIBGCC_SDATA_SECTION ".sdata"
 
-/* Driver native functions for SPEC processing in the GCC driver.  */
-#include "loongarch-driver.h"
-
 /* This definition replaces the formerly used 'm' constraint with a
different constraint letter in order to avoid changing semantics of
the 'm' constraint when accepting new address formats in
diff --git a/gcc/config/loongarch/t-loongarch b/gcc/config/loongarch/t-loongarch
index 9b06fa84bcc..667a6bb3b50 100644
--- a/gcc/config/loongarch/t-loongarch
+++ b/gcc/config/loongarch/t-loongarch
@@ -16,7 +16,8 @@
 # along with GCC; see the file COPYING3.  If not see
 # .
 
-TM_H += loongarch-multilib.h $(srcdir)/config/loongarch/loongarch-driver.h
+
+GTM_H += loongarch-multilib.h
 OPTIONS_H_EXTRA += $(srcdir)/config/loongarch/loongarch-def.h \
   $(srcdir)/config/loongarch/loongarch-tune.h
 
-- 
2.42.0

Re: [PATCH] LoongArch: Adjust makefile dependency for loongarch headers.

[Yang Yujie]

Unfortunately, I was unable to reproduce the problem mentioned in
https://gcc.gnu.org/pipermail/gcc-patches/2023-October/631933.html

Heres's a possible fix without testing.  Please tell me if this works.

On Sat, Oct 07, 2023 at 04:50:14PM +0800, Yang Yujie wrote:
> -TM_H += loongarch-multilib.h $(srcdir)/config/loongarch/loongarch-driver.h
> +
> +GTM_H += loongarch-multilib.h
>  OPTIONS_H_EXTRA += $(srcdir)/config/loongarch/loongarch-def.h \
>  $(srcdir)/config/loongarch/loongarch-tune.h


(Forgot to modify tm_files for loongarch-elf* targets, so a v2 is probably 
needed.)

[PATCH] LoongArch: Adjust makefile dependency for loongarch headers.

[Yang Yujie]

gcc/ChangeLog:

* config.gcc: Add loongarch-driver.h to tm_files.
* config/loongarch/loongarch.h: Do not include loongarch-driver.h.
* config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
instead of $(TM_H) for building generator programs.
---
 gcc/config.gcc   | 2 +-
 gcc/config/loongarch/loongarch.h | 3 ---
 gcc/config/loongarch/t-loongarch | 3 ++-
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index ee46d96bf62..9cb600ca006 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2524,7 +2524,7 @@ riscv*-*-freebsd*)
 
 loongarch*-*-linux*)
tm_file="elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h 
${tm_file}"
-   tm_file="${tm_file} loongarch/gnu-user.h loongarch/linux.h"
+   tm_file="${tm_file} loongarch/gnu-user.h loongarch/linux.h 
loongarch/loongarch-driver.h"
extra_options="${extra_options} linux-android.opt"
tmake_file="${tmake_file} loongarch/t-multilib loongarch/t-linux"
gnu_ld=yes
diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index d357e32e414..19a18fb5f1b 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -49,9 +49,6 @@ along with GCC; see the file COPYING3.  If not see
 
 #define TARGET_LIBGCC_SDATA_SECTION ".sdata"
 
-/* Driver native functions for SPEC processing in the GCC driver.  */
-#include "loongarch-driver.h"
-
 /* This definition replaces the formerly used 'm' constraint with a
different constraint letter in order to avoid changing semantics of
the 'm' constraint when accepting new address formats in
diff --git a/gcc/config/loongarch/t-loongarch b/gcc/config/loongarch/t-loongarch
index 9b06fa84bcc..667a6bb3b50 100644
--- a/gcc/config/loongarch/t-loongarch
+++ b/gcc/config/loongarch/t-loongarch
@@ -16,7 +16,8 @@
 # along with GCC; see the file COPYING3.  If not see
 # .
 
-TM_H += loongarch-multilib.h $(srcdir)/config/loongarch/loongarch-driver.h
+
+GTM_H += loongarch-multilib.h
 OPTIONS_H_EXTRA += $(srcdir)/config/loongarch/loongarch-def.h \
   $(srcdir)/config/loongarch/loongarch-tune.h
 
-- 
2.42.0

Re: [PATCH] LoongArch: Reimplement multilib build option handling.

[Yang Yujie]

On Wed, Oct 04, 2023 at 02:13:46PM +0200, Jan-Benedict Glaw wrote:
> Seems this breaks for me with
> 
> ../gcc/configure [...] --enable-werror-always --enable-languages=all 
> --disable-gcov --disable-shared --disable-threads 
> --target=loongarch64-linux-gnuf32 --without-headers
> make V=1 all-gcc
> 
> 
> See eg. 
> http://toolchain.lug-owl.de/laminar/jobs/gcc-loongarch64-linux-gnuf32/44 :
> 
> /var/lib/laminar/run/gcc-loongarch64-linux-gnuf32/44/local-toolchain-install/bin/g++
>  -c   -g -O2   -DIN_GCC -DCROSS_DIRECTORY_STRUCTURE   -fno-exceptions 
> -fno-rtti -fasynchronous-unwind-tables -W -Wall -Wno-narrowing 
> -Wwrite-strings -Wcast-qual -Wmissing-format-attribute 
> -Wconditionally-supported -Woverloaded-virtual -pedantic -Wno-long-long 
> -Wno-variadic-macros -Wno-overlength-strings -Werror -fno-common  
> -DHAVE_CONFIG_H  -DGENERATOR_FILE -I. -Ibuild -I../../gcc/gcc 
> -I../../gcc/gcc/build -I../../gcc/gcc/../include  
> -I../../gcc/gcc/../libcpp/include  \
>  -o build/genpreds.o ../../gcc/gcc/genpreds.cc
> In file included from ../../gcc/gcc/config/loongarch/loongarch.h:53,
>  from ./tm.h:50,
>  from ../../gcc/gcc/genpreds.cc:26:
> ../../gcc/gcc/config/loongarch/loongarch-driver.h:82:10: fatal error: 
> loongarch-multilib.h: No such file or directory
>82 | #include "loongarch-multilib.h"
>   |  ^~
> compilation terminated.
> make[1]: *** [Makefile:2966: build/genpreds.o] Error 1
> make[1]: Leaving directory 
> '/var/lib/laminar/run/gcc-loongarch64-linux-gnuf32/44/toolchain-build/gcc'
> make: *** [Makefile:4659: all-gcc] Error 2
> 
> 
> So it failed to execute the t-multilib fragment? Happens for all my
> loongarch compilation tests:
> 
> http://toolchain.lug-owl.de/laminar/jobs/gcc-loongarch64-linux/45
> http://toolchain.lug-owl.de/laminar/jobs/gcc-loongarch64-linux-gnuf32/44
> http://toolchain.lug-owl.de/laminar/jobs/gcc-loongarch64-linux-gnuf64/44
> http://toolchain.lug-owl.de/laminar/jobs/gcc-loongarch64-linux-gnusf/44
>

Thanks for the testing!

This error seems to be difficult to reproduce since it is a makefile dependency
problem.  I think appending loongarch-multilib.h to $(GTM_H) instead of $(TM_H)
could help.

> And when this is fixed, it might be a nice idea to have a
> --with-multilib-list config in ./contrib/config-list.mk .

Thanks, will add this later too.

P.S. Currently support for "f32" is not active, and it should probably be
avoided if you want to build a working rootfs.

Yujie

Re: [PATCH v2 0/1] Add LoongArch64 support for D frontend

[Yang Yujie]

Hi Zixing,

We are also working on a patch series that could pass the libphobos regression 
tests.
Will post this later once all failed items are fixed.

Yujie

On Sun, Sep 24, 2023 at 03:40:32PM -0600, Zixing Liu wrote:
> This patch adds the LoongArch64 support for GCC D frontend.
> 
> The runtime support is submitted as a separate patch here:
> https://github.com/dlang/dmd/pull/15628.
> 
> You can find more information about the LoongArch architecture on this
> website:
> https://loongson.github.io/LoongArch-Documentation/README-EN.html.
> 
> --
> 
> Changes since the last revision of the patch:
> 
> * Corrected copyright years in loongarch-d.cc and loongarch-d.h.
> * Removed changes to the tests, the changes have been rolled into the DMD
>   changes in:
>   
> https://github.com/dlang/dmd/pull/15628/commits/eb84b8a2bc86aa751ad6f472422e8abad63ff500
>   .
> * Removed D_LP32 and D_LP64 bits. Since LoongArch ABIs are somewhat
>   complicated, we may introduce the ABI information in the form of target
>   traits in the future.
> 
> Zixing Liu (1):
> 
>  gcc/config.gcc |  1 +
>  gcc/config/loongarch/loongarch-d.cc| 77 ++
>  gcc/config/loongarch/loongarch-d.h | 26 
>  gcc/config/loongarch/t-loongarch   |  4 ++
>  libphobos/configure.tgt|  3 +
>  libphobos/libdruntime/gcc/sections/elf.d   |  2 +
>  libphobos/libdruntime/gcc/unwind/generic.d |  1 +
>  7 files changed, 114 insertions(+)
>  create mode 100644 gcc/config/loongarch/loongarch-d.cc
>  create mode 100644 gcc/config/loongarch/loongarch-d.h
> 
> -- 
> 2.42.0

[PATCH] LoongArch: Reimplement multilib build option handling.

[Yang Yujie]

Library build options from --with-multilib-list used to be processed with
*self_spec, which missed the driver's initial canonicalization.  This
caused limitations on CFLAGS override and the use of driver-only options
like -m[no]-lsx.

The problem is solved by promoting the injection rules of --with-multilib-list
options to the first element of DRIVER_SELF_SPECS, to make them execute before
the canonialization.  The library-build options are also hard-coded in
the driver and can be used conveniently by the builders of other non-gcc
libraries via the use of -fmultiflags.

Bootstrapped and tested on loongarch64-linux-gnu.

ChangeLog:

* config-ml.in: Remove unneeded loongarch clause.
* configure.ac: Register custom makefile fragments mt-loongarch-*
for loongarch targets.
* configure: Regenerate.

config/ChangeLog:

* mt-loongarch-mlib: New file.  Pass -fmultiflags when building
target libraries (FLAGS_FOR_TARGET).
* mt-loongarch-elf: New file.
* mt-loongarch-gnu: New file.

gcc/ChangeLog:

* config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
* config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
before the driver canonicalization routines.
* config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
to loongarch-driver.h
* config/loongarch/t-linux: Move multilib-related definitions to
t-multilib.
* config/loongarch/t-multilib: New file.  Inject library build
options obtained from --with-multilib-list.
* config/loongarch/t-loongarch: Same.
---
 config-ml.in| 10 
 config/mt-loongarch-elf |  1 +
 config/mt-loongarch-gnu |  2 +
 config/mt-loongarch-mlib|  1 +
 configure   |  6 +++
 configure.ac|  6 +++
 gcc/config.gcc  |  6 +--
 gcc/config/loongarch/loongarch-driver.h | 42 +++
 gcc/config/loongarch/loongarch.h| 50 --
 gcc/config/loongarch/t-linux| 66 +++-
 gcc/config/loongarch/t-loongarch|  2 +-
 gcc/config/loongarch/t-multilib | 68 +
 12 files changed, 137 insertions(+), 123 deletions(-)
 create mode 100644 config/mt-loongarch-elf
 create mode 100644 config/mt-loongarch-gnu
 create mode 100644 config/mt-loongarch-mlib
 create mode 100644 gcc/config/loongarch/t-multilib

diff --git a/config-ml.in b/config-ml.in
index ad0db078171..68854a4f16c 100644
--- a/config-ml.in
+++ b/config-ml.in
@@ -301,16 +301,6 @@ arm-*-*)
  done
fi
;;
-loongarch*-*)
-   old_multidirs="${multidirs}"
-   multidirs=""
-   for x in ${old_multidirs}; do
-   case "$x" in
-   `${CC-gcc} --print-multi-directory`) : ;;
-   *) multidirs="${multidirs} ${x}" ;;
-   esac
-   done
-   ;;
 m68*-*-*)
if [ x$enable_softfloat = xno ]
then
diff --git a/config/mt-loongarch-elf b/config/mt-loongarch-elf
new file mode 100644
index 000..bbf29bb578a
--- /dev/null
+++ b/config/mt-loongarch-elf
@@ -0,0 +1 @@
+include $(srcdir)/config/mt-loongarch-mlib
diff --git a/config/mt-loongarch-gnu b/config/mt-loongarch-gnu
new file mode 100644
index 000..dfefb44ede3
--- /dev/null
+++ b/config/mt-loongarch-gnu
@@ -0,0 +1,2 @@
+include $(srcdir)/config/mt-gnu
+include $(srcdir)/config/mt-loongarch-mlib
diff --git a/config/mt-loongarch-mlib b/config/mt-loongarch-mlib
new file mode 100644
index 000..4cfe568f1fc
--- /dev/null
+++ b/config/mt-loongarch-mlib
@@ -0,0 +1 @@
+FLAGS_FOR_TARGET += -fmultiflags
diff --git a/configure b/configure
index 28f0913bdd4..8fc163d36bd 100755
--- a/configure
+++ b/configure
@@ -9683,6 +9683,12 @@ case "${target}" in
   spu-*-*)
 target_makefile_frag="config/mt-spu"
 ;;
+  loongarch*-*linux* | loongarch*-*gnu*)
+target_makefile_frag="config/mt-loongarch-gnu"
+;;
+  loongarch*-*elf*)
+target_makefile_frag="config/mt-loongarch-elf"
+;;
   mips*-sde-elf* | mips*-mti-elf* | mips*-img-elf*)
 target_makefile_frag="config/mt-sde"
 ;;
diff --git a/configure.ac b/configure.ac
index 5d25dc864c3..1d16530140a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2810,6 +2810,12 @@ case "${target}" in
   spu-*-*)
 target_makefile_frag="config/mt-spu"
 ;;
+  loongarch*-*linux* | loongarch*-*gnu*)
+target_makefile_frag="config/mt-loongarch-gnu"
+;;
+  loongarch*-*elf*)
+target_makefile_frag="config/mt-loongarch-elf"
+;;
   mips*-sde-elf* | mips*-mti-elf* | mips*-img-elf*)
 target_makefile_frag="config/mt-sde"
 ;;
diff --git a/gcc/config.gcc b/gcc/config.gcc
index b2fe7c7ceef..3a70e64ccd2 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2482,7 +2482,7 @@ loongarch*-*-linux*)
tm_file="elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h 
${tm_file}"

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

[Yang Yujie]

On Sat, Sep 09, 2023 at 01:56:57PM +0800, Xi Ruoyao wrote:
> On Sat, 2023-09-09 at 10:46 +0800, Yang Yujie wrote:
> > The next option I can think of would be MULTILIB_EXTRA_OPTS, where 
> > -fmultiflags
> > fit in nicely.  However, these options won't reach the toplevel builds, and
> > tweaking config-ml.in for getting it there would be quite tedious and 
> > perhaps
> > unreliable:
> 
> I don't think the spec tweak should affect toplevel (or default, if you
> hate the concept of toplevel) library build.
>
> When I build GCC for a specific machine I usually use:
> 
> OPT="-O3 -march=native -pipe ..."
> make {STAGE1,BOOT}_CFLAGS="$OPT" {C,CXX}FLAGS_FOR_TARGET="$OPT -g"
> 
> If the spec tweak affects the toplevel library build it will eat -march=
> etc. in {C,CXX}FLAGS_FOR_TARGET silently, and I don't want this.

Sorry I didn't make this clear -- Yes, I am removing the spec tweak
*completely*, because I agree it should not affect bootstrapping /
toplevel builds / --disable-multilib builds. 

This is achieved by defining MULTILIB_EXTRA_OPTS as -fmultiflags,
which triggers the multilib build options in driver spec rules
-- so nothing happens to the bootstrapping and --disable-multilib
builds.

What I'm explaining is, MULTILIB_EXTRA_OPTS won't be nicely received
by the toplevel (which is exactly the purpose), so in this solution,
multilib-enabled builds still have to exclude the toplevel.  This means
I will have to bring back (at least part of) my v1 patch:

https://gcc.gnu.org/pipermail/gcc-patches/2023-August/627275.html

I remember you were against it because you think non-multilib users
would be punished because the libdir layout changes (no toplevel).
However this directory should be (mostly) private to each gcc instance,
so I don't see real consequences to this unless you have a build script
that relieas on the path of libgcc.a / startfile, which can still (and
should) be revised using $(gcc --print-multi-dir).
 
> --disable-multilib *should just work*.  Why should a non-multilib user
> be punished by the cost of supporting the complex multilib
> configuration, esp. today most LoongArch users don't need multilib at
> all?

It should *just work*.  I am testing the new patch and will deliver it
as soon as all the test passes.

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

[Yang Yujie]

On Thu, Sep 07, 2023 at 07:54:41PM +0800, Yang Yujie wrote:
> On Thu, Sep 07, 2023 at 05:47:36PM +0800, Xi Ruoyao wrote:
> > On Thu, 2023-09-07 at 17:31 +0800, Yang Yujie wrote:
> > > > This is bad.  It makes BOOT_CFLAGS=-mlasx or CFLAGS_FOR_TARGET=-mlasx
> > > > silently ignored so we cannot test a LSX/LASX or vectorizer change with
> > > > them.
> > > > 
> > > > Why do we need to purge all user-specified -m options here?
> > > 
> > > Yes, that is an issue that I haven't considered.
> > > 
> > > The purge rules (self_specs) exist to clean up the driver-generated
> > > canonical option tuple.  These options are generated before to the
> > > injection of library-building options from --with-multilib-{list,default}.
> > > They are dependent on the default GCC settings and may not be safely
> > > overriden by any injected individual options, so we choose to start
> > > over with a purge.
> > > 
> > > Working on a patch now, Thanks!
> > 
> > I've made some local experiment too, I think we can add a "-mbuild-
> > multilib" option which does nothing but in the hacked spec we can wrap
> > the line in %{mbuild-multilib:...}:
> > 
> > %{mbuild-multilib:% > %{mabi=lp64d:-march=la464 -mno-strict-align -msimd=lsx}   
> > %{mabi=lp64s:-march=abi-default -mfpu=32}}
> > 
> > Then we can use -mbuild-multilib -mabi=lp64d for non-default multilibs
> > (or all multilibs unless --disable-multilib?).  In the document we can
> > just document mbuild-multilib as "internal use only".
> > 
> > 
> > -- 
> > Xi Ruoyao 
> > School of Aerospace Science and Technology, Xidian University
> 
> 
> My idea is to move these options out of self_spec by defining a new spec
> rule $(early_self_spec), so that they get processed by the driver before
> the canonicalization.
> 
> This also solves the problem that one cannot use -m[no-]lsx/-m[no-]lasx
> in --with-multilib-list (because they are driver-only options that are
> only recognized during the canonicalization).

Some updates on this issue -- With some experiments, I think that the most
practical way to solve this completely might still involve a symmetric
multilib build (where the toplevels are not built and installed).  Because
as you proposed, we need to inject an option like "-mbuild-multilib" (maybe
"-fmultiflags" for this purpose) somewhere to distinguish bootstrapping from
building libraries, but overriding the spec seems to always affect both cases.

The next option I can think of would be MULTILIB_EXTRA_OPTS, where -fmultiflags
fit in nicely.  However, these options won't reach the toplevel builds, and
tweaking config-ml.in for getting it there would be quite tedious and perhaps
unreliable:


diff --git a/config-ml.in b/config-ml.in
index ad0db078171..ce7f07b94a7 100644
--- a/config-ml.in
+++ b/config-ml.in
@@ -228,6 +228,9 @@ for i in `${CC-gcc} --print-multi-lib 2>/dev/null`; do
   fi
 done
 
+# Do not apply MULTILIB_EXTRA_OPTS to the toplevel by default.
+ml_toplevel_apply_extra_opts=no
+
 # Target libraries are configured for the host they run on, so we check
 # $host here, not $target.
 
@@ -577,6 +580,19 @@ cat >>Multi.tem <<\EOF
fi
 EOF
 
+# Apply MULTILIB_EXTRA_OPTS to the toplevel build.
+if [ "${ml_toplevel_apply_extra_opts}" = yes ]; then
+cat >>Multi.tem <<\EOF
+
+$(foreach i,$(shell $(CC) --print-multi-lib), \
+$(if $(i:.;%=),,$(eval ml_extra_opts := $(subst @, -,$(i:.;%=%)
+
+$(foreach ml_flags, CFLAGS CCASFLAGS CXXFLAGS FCFLAGS FFLAGS \
+ADAFLAGS GOCFLAGS GDCFLAGS CXXFLAGS LIBCFLAGS LIBCXXFLAGS \
+LDFLAGS MLTIFLAGS, $(eval override $(ml_flags) += $(ml_extra_opts)))
+EOF
+fi
+
 cat ${Makefile} Multi.tem > Makefile.tem
 rm -f ${Makefile} Multi.tem
 mv Makefile.tem ${Makefile}


Though this patch works, at least the following additional tweaks has to
be done to the toplevel to maintain a correct build / regtest / install
workflow:

- the C++ headers' install path (fixed temporarily && not very elegant)
- the fortran header path before regtests

Compared to patching for each library individually, I'd rather choose something
less painful -- not building the toplevel could save the most effort because all
the facilities are guaranteed to be present for all multilib variants.

As for the layout change of lib/gcc// directory after applying
the symmetric multilib patch, I believe the inconvenience caused would be 
minimal,
since multisubdir within that directory is private to each gcc instance.  If 
someone
really has a script that depend on libgcc's path, I would suggest using
--print-multi-dir and --print-file-name=libgcc.a, for you cannot assume the
behavior of the GCC driver without knowing which spec file it is loading 
anyways.

(We'd still be keeping --with-abi=* obsolete.  That's a good idea, thanks.)

Yujie

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

[Yang Yujie]

On Thu, Sep 07, 2023 at 05:47:36PM +0800, Xi Ruoyao wrote:
> On Thu, 2023-09-07 at 17:31 +0800, Yang Yujie wrote:
> > > This is bad.  It makes BOOT_CFLAGS=-mlasx or CFLAGS_FOR_TARGET=-mlasx
> > > silently ignored so we cannot test a LSX/LASX or vectorizer change with
> > > them.
> > > 
> > > Why do we need to purge all user-specified -m options here?
> > 
> > Yes, that is an issue that I haven't considered.
> > 
> > The purge rules (self_specs) exist to clean up the driver-generated
> > canonical option tuple.  These options are generated before to the
> > injection of library-building options from --with-multilib-{list,default}.
> > They are dependent on the default GCC settings and may not be safely
> > overriden by any injected individual options, so we choose to start
> > over with a purge.
> > 
> > Working on a patch now, Thanks!
> 
> I've made some local experiment too, I think we can add a "-mbuild-
> multilib" option which does nothing but in the hacked spec we can wrap
> the line in %{mbuild-multilib:...}:
> 
> %{mbuild-multilib:% %{mabi=lp64d:-march=la464 -mno-strict-align -msimd=lsx}   
> %{mabi=lp64s:-march=abi-default -mfpu=32}}
> 
> Then we can use -mbuild-multilib -mabi=lp64d for non-default multilibs
> (or all multilibs unless --disable-multilib?).  In the document we can
> just document mbuild-multilib as "internal use only".
> 
> 
> -- 
> Xi Ruoyao 
> School of Aerospace Science and Technology, Xidian University


My idea is to move these options out of self_spec by defining a new spec
rule $(early_self_spec), so that they get processed by the driver before
the canonicalization.

This also solves the problem that one cannot use -m[no-]lsx/-m[no-]lasx
in --with-multilib-list (because they are driver-only options that are
only recognized during the canonicalization).

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

[Yang Yujie]

> This is bad.  It makes BOOT_CFLAGS=-mlasx or CFLAGS_FOR_TARGET=-mlasx
> silently ignored so we cannot test a LSX/LASX or vectorizer change with
> them.
>
> Why do we need to purge all user-specified -m options here?

Yes, that is an issue that I haven't considered.

The purge rules (self_specs) exist to clean up the driver-generated
canonical option tuple.  These options are generated before to the
injection of library-building options from --with-multilib-{list,default}.
They are dependent on the default GCC settings and may not be safely
overriden by any injected individual options, so we choose to start
over with a purge.

Working on a patch now, Thanks!

Yujie

[PATCH v2] LoongArch: Adjust C++ multilib header layout.

[Yang Yujie]

For LoongArch, the toplevel library build is always aliased to
one of the multilib variants.  This patch installs it with the
actual MULTISUBDIR (instead of ".") so that the headers can be
reached by the compiler.

This patch is an update of
https://gcc.gnu.org/pipermail/gcc-patches/2023-September/629435.html

libstdc++-v3/ChangeLog:

* configure.host: Register t-loongarch in tmake_file.
* config/cpu/loongarch/t-loongarch: New file.  Manually refresh
MULTISUBDIR with $(shell $(CXX) --print-multi-directory).
---
 libstdc++-v3/config/cpu/loongarch/t-loongarch | 1 +
 libstdc++-v3/configure.host   | 5 -
 2 files changed, 5 insertions(+), 1 deletion(-)
 create mode 100644 libstdc++-v3/config/cpu/loongarch/t-loongarch

diff --git a/libstdc++-v3/config/cpu/loongarch/t-loongarch 
b/libstdc++-v3/config/cpu/loongarch/t-loongarch
new file mode 100644
index 000..adfc8ebb93e
--- /dev/null
+++ b/libstdc++-v3/config/cpu/loongarch/t-loongarch
@@ -0,0 +1 @@
+AM_MAKEFLAGS += " MULTISUBDIR=/$(shell $(CXX) --print-multi-directory)"
diff --git a/libstdc++-v3/configure.host b/libstdc++-v3/configure.host
index 9e7c7f02dfd..9dc42ad3edb 100644
--- a/libstdc++-v3/configure.host
+++ b/libstdc++-v3/configure.host
@@ -315,7 +315,10 @@ esac
 # Set any OS-dependent and CPU-dependent bits.
 # THIS TABLE IS SORTED.  KEEP IT THAT WAY.
 case "${host}" in
-  *-*-linux* | *-*-uclinux*)
+ loongarch*)
+tmake_file="cpu/loongarch/t-loongarch"
+;;
+ *-*-linux* | *-*-uclinux*)
 case "${host_cpu}" in
   i[567]86)
 abi_baseline_pair=i486-linux-gnu
-- 
2.36.0

Re: [PATCH] LoongArch: Link c++ header directory in the default ABI to the toplevel.

[Yang Yujie]

On Wed, Sep 06, 2023 at 06:38:25PM +0800, Xi Ruoyao wrote:
> On Wed, 2023-09-06 at 18:06 +0800, Yang Yujie wrote:
> > When multilib is enabled, the c++ header directory of the default multilib
> > variant needs to be linked to the toplevel since g++ does not search the
> > toplevel in this case.
> > 
> > libstdc++-v3/ChangeLog:
> > 
> > * configure.host: Register t-loongarch in tmake_file.
> > * config/cpu/loongarch/t-loongarch: New file.  Link c++ header
> > directory in the default ABI to the toplevel.
> > ---
> >  libstdc++-v3/config/cpu/loongarch/t-loongarch | 12 
> >  libstdc++-v3/configure.host   |  5 -
> >  2 files changed, 16 insertions(+), 1 deletion(-)
> >  create mode 100644 libstdc++-v3/config/cpu/loongarch/t-loongarch
> > 
> > diff --git a/libstdc++-v3/config/cpu/loongarch/t-loongarch
> > b/libstdc++-v3/config/cpu/loongarch/t-loongarch
> > new file mode 100644
> > index 000..942eddeb3be
> > --- /dev/null
> > +++ b/libstdc++-v3/config/cpu/loongarch/t-loongarch
> > @@ -0,0 +1,12 @@
> > +LA_DEFAULT_MULTIDIR = $(shell $(CXX) --print-multi-directory)
> > +TOPLEV_HEADERS = 
> > $(DESTDIR)${gxx_include_dir}/${host_alias}/$(LA_DEFAULT_MULTIDIR)
> > +
> > +.PHONY: install-toplevel-link
> > +install: install-toplevel-link
> > +install-toplevel-link:
> > +   if test x$(MULTIDO) != xtrue && \
> > +  test x$(LA_DEFAULT_MULTIDIR) != x.; then \
> > +   $(MKDIR_P) "$(dir $(TOPLEV_HEADERS))"; \
> > +   rm -rf "$(TOPLEV_HEADERS)"; \
> > +   $(LN_S) ../ "$(TOPLEV_HEADERS)"; \
> 
> From autoconf info page:
> 
>  -- Macro: AC_PROG_LN_S
>  If ‘ln -s’ works on the current file system (the operating system
>  and file system support symbolic links), set the output variable
>  ‘LN_S’ to ‘ln -s’; otherwise, if ‘ln’ works, set ‘LN_S’ to ‘ln’,
>  and otherwise set it to ‘cp -pR’.
> 
>  If you make a link in a directory other than the current directory,
>  its meaning depends on whether ‘ln’ or ‘ln -s’ is used.  To safely
>  create links using ‘$(LN_S)’, either find out which form is used
>  and adjust the arguments, or always invoke ‘ln’ in the directory
>  where the link is to be created.
> 
>  In other words, it does not work to do:
>   $(LN_S) foo /x/bar
> 
>  Instead, do:
> 
>   (cd /x && $(LN_S) foo bar)
> 
> But for this special case we cannot "cp -pR ../ $(TOPLEV_HEADERS)"
> either:
> 
> $ cp ../* -pR something
> cp: cannot copy a directory, '../g', into itself, 'h/g'
> 
> So I guess we'll need something like
> 
> if ln -s ../ "$(TOPLEV_HEADERS)"; then
>   # OK!
>   true
> else
>   # system does not support symlink :(
>   # install another copy of toplevel headers into default multilib subdir
>   TODO: 
> fi
> 
> And all libstdc++ patches should Cc: libstd...@gcc.gnu.org.
> 
> > +   fi
> > diff --git a/libstdc++-v3/configure.host b/libstdc++-v3/configure.host
> > index 9e7c7f02dfd..9dc42ad3edb 100644
> > --- a/libstdc++-v3/configure.host
> > +++ b/libstdc++-v3/configure.host
> > @@ -315,7 +315,10 @@ esac
> >  # Set any OS-dependent and CPU-dependent bits.
> >  # THIS TABLE IS SORTED.  KEEP IT THAT WAY.
> >  case "${host}" in
> > -  *-*-linux* | *-*-uclinux*)
> > + loongarch*)
> > +    tmake_file="cpu/loongarch/t-loongarch"
> > +    ;;
> > + *-*-linux* | *-*-uclinux*)
> >  case "${host_cpu}" in
> >    i[567]86)
> >  abi_baseline_pair=i486-linux-gnu
> 
> -- 
> Xi Ruoyao 
> School of Aerospace Science and Technology, Xidian University

Thanks for the review!

After some tweaking, it appeared that we can simply override
${multisubdir} in configure.host and achieve the same.

I will upload another patch soon.

Yujie

[PATCH] LoongArch: Link c++ header directory in the default ABI to the toplevel.

[Yang Yujie]

When multilib is enabled, the c++ header directory of the default multilib
variant needs to be linked to the toplevel since g++ does not search the
toplevel in this case.

libstdc++-v3/ChangeLog:

* configure.host: Register t-loongarch in tmake_file.
* config/cpu/loongarch/t-loongarch: New file.  Link c++ header
directory in the default ABI to the toplevel.
---
 libstdc++-v3/config/cpu/loongarch/t-loongarch | 12 
 libstdc++-v3/configure.host   |  5 -
 2 files changed, 16 insertions(+), 1 deletion(-)
 create mode 100644 libstdc++-v3/config/cpu/loongarch/t-loongarch

diff --git a/libstdc++-v3/config/cpu/loongarch/t-loongarch 
b/libstdc++-v3/config/cpu/loongarch/t-loongarch
new file mode 100644
index 000..942eddeb3be
--- /dev/null
+++ b/libstdc++-v3/config/cpu/loongarch/t-loongarch
@@ -0,0 +1,12 @@
+LA_DEFAULT_MULTIDIR = $(shell $(CXX) --print-multi-directory)
+TOPLEV_HEADERS = 
$(DESTDIR)${gxx_include_dir}/${host_alias}/$(LA_DEFAULT_MULTIDIR)
+
+.PHONY: install-toplevel-link
+install: install-toplevel-link
+install-toplevel-link:
+   if test x$(MULTIDO) != xtrue && \
+  test x$(LA_DEFAULT_MULTIDIR) != x.; then \
+   $(MKDIR_P) "$(dir $(TOPLEV_HEADERS))"; \
+   rm -rf "$(TOPLEV_HEADERS)"; \
+   $(LN_S) ../ "$(TOPLEV_HEADERS)"; \
+   fi
diff --git a/libstdc++-v3/configure.host b/libstdc++-v3/configure.host
index 9e7c7f02dfd..9dc42ad3edb 100644
--- a/libstdc++-v3/configure.host
+++ b/libstdc++-v3/configure.host
@@ -315,7 +315,10 @@ esac
 # Set any OS-dependent and CPU-dependent bits.
 # THIS TABLE IS SORTED.  KEEP IT THAT WAY.
 case "${host}" in
-  *-*-linux* | *-*-uclinux*)
+ loongarch*)
+tmake_file="cpu/loongarch/t-loongarch"
+;;
+ *-*-linux* | *-*-uclinux*)
 case "${host_cpu}" in
   i[567]86)
 abi_baseline_pair=i486-linux-gnu
-- 
2.36.0

[PATCH] LoongArch: Fix unintentional bash-ism in r14-3665.

[Yang Yujie]

gcc/ChangeLog:

* config.gcc: remove non-POSIX syntax "<<<".
---
 gcc/config.gcc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index b2fe7c7ceef..6d4c8becd28 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -5189,7 +5189,7 @@ case "${target}" in
if test x${parse_state} = x"abi-base"; then
# Base ABI type
case ${component} in
-   lp64d | lp64f | lp64s) 
elem_tmp="ABI_BASE_$(tr a-z A-Z <<< ${component}),";;
+   lp64d | lp64f | lp64s) 
elem_tmp="ABI_BASE_$(echo ${component} | tr a-z A-Z),";;
*)
echo "Unknown base ABI 
\"${component}\" in --with-multilib-list." 1>&2
exit 1
-- 
2.36.0

Re: [PATCH v1 2/6] LoongArch: improved target configuration interface

[Yang Yujie]

On Wed, Sep 06, 2023 at 07:43:26AM +0100, Richard Sandiford wrote:
> Yang Yujie  writes:
> > @@ -5171,25 +5213,21 @@ case "${target}" in
> > # ${with_multilib_list} should not contain whitespaces,
> > # consecutive commas or slashes.
> > if echo "${with_multilib_list}" \
> > -   | grep -E -e "[[:space:]]" -e '[,/][,/]' -e '[,/]$' -e '^[,/]' 
> > > /dev/null; then
> > +   | grep -E -e "[[:space:]]" -e '[,/][,/]' -e '[,/]$' -e '^[,/]' 
> > > /dev/null 2>&1; then
> > echo "Invalid argument to --with-multilib-list." 1>&2
> > exit 1
> > fi
> >  
> > -   unset component idx elem_abi_base elem_abi_ext elem_tmp
> > +   unset component elem_abi_base elem_abi_ext elem_tmp parse_state 
> > all_abis
> > for elem in $(echo "${with_multilib_list}" | tr ',' ' '); do
> > -   idx=0
> > -   while true; do
> > -   idx=$((idx + 1))
> > -   component=$(echo "${elem}" | awk -F'/' '{print 
> > $'"${idx}"'}')
> > -
> > -   case ${idx} in
> > -   1)
> > -   # Component 1: Base ABI type
> > +   unset elem_abi_base elem_abi_ext
> > +   parse_state="abi-base"
> > +
> > +   for component in $(echo "${elem}" | tr '/' ' '); do
> > +   if test x${parse_state} = x"abi-base"; then
> > +   # Base ABI type
> > case ${component} in
> > -   lp64d) elem_tmp="ABI_BASE_LP64D,";;
> > -   lp64f) elem_tmp="ABI_BASE_LP64F,";;
> > -   lp64s) elem_tmp="ABI_BASE_LP64S,";;
> > +   lp64d | lp64f | lp64s) 
> > elem_tmp="ABI_BASE_$(tr a-z A-Z <<< ${component}),";;
> 
> "<<<" isn't portable shell.  Could you try with:
> 
>   echo ${component} | tr ...
> 
> instead?
> 
> As it stands, this causes a bootstrap failure with non-bash shells
> such as dash, even on non-Loongson targets.
> 
> (Part of me wishes that we'd just standardise on bash.  But since that
> isn't the policy, I sometimes use dash to pick up my own lapses.)
> 
> Thanks,
> Richard

Sorry, I missed it when cleaning up the patches. :(
Thanks for the review.  Will fix this in a new patch.

Yujie

Re: [PATCH v3 1/4] LoongArch: improved target configuration interface

[Yang Yujie]

On Tue, Sep 05, 2023 at 09:31:56PM +0800, Xi Ruoyao wrote:
> On Thu, 2023-08-31 at 20:48 +0800, Yang Yujie wrote:
> > * Support options for LoongArch SIMD extensions:
> >   new configure options --with-simd={none,lsx,lasx};
> >   new compiler option -msimd={none,lsx,lasx};
> >   new driver options -m[no]-l[a]sx.
> 
> Hmm... In my build (a cross compiler configured with ../gcc/configure --
> target=loongarch64-linux-gnu --with-system-zlib) I have:
> 
> $ cat lasx.c
> int x __attribute__((vector_size(32)));
> int y __attribute__((vector_size(32)));
> void test(void) { x += y; }
> $ gcc/cc1 lasx.c -msimd=lasx -o- -nostdinc -mexplicit-relocs -O2
> 
> ... ...
> 
>   pcalau12i   $r12,%pc_hi20(.LANCHOR0)
>   addi.d  $r12,$r12,%pc_lo12(.LANCHOR0)
>   xvld$xr0,$r12,0
>   xvld$xr1,$r12,32
>   xvadd.w $xr0,$xr0,$xr1
>   xvst$xr0,$r12,0
>   jr  $r1
> 
> ... ...
> 
> This seems perfectly fine.  But:
> 
> $ gcc/xgcc -B gcc lasx.c -mlasx -o- -nostdinc -mexplicit-relocs -O2 -S
> 
> ... ...
> 
> test:
> .LFB0 = .
>   pcalau12i   $r12,%pc_hi20(.LANCHOR0)
>   addi.d  $r12,$r12,%pc_lo12(.LANCHOR0)
>   addi.d  $r3,$r3,-16
> .LCFI0 = .
>   st.d$r23,$r3,8
> .LCFI1 = .
>   ldptr.w $r7,$r12,0
>   ldptr.w $r23,$r12,32
>   ldptr.w $r6,$r12,8
> 
> ... ... (no SIMD instructions)
> 
> Is this a bug in the driver or I missed something?
> 
> -- 
> Xi Ruoyao 
> School of Aerospace Science and Technology, Xidian University

Maybe you can try deleting gcc/specs first.

It contains a modified version of self_specs that is used for building
the libraries, which purges all user-specified "-m" options.
This file is automatically restored prior to "make check*".

Yujie

[PATCH v2] LoongArch: initial ada support on linux

[Yang Yujie]

gcc/ChangeLog:

* ada/Makefile.rtl: Add LoongArch support.
* ada/libgnarl/s-linux__loongarch.ads: New.
* ada/libgnat/system-linux-loongarch.ads: New.
* config/loongarch/loongarch.h: mark normalized options
passed from driver to gnat1 as explicit for multilib.
---
 gcc/ada/Makefile.rtl   |  49 +++
 gcc/ada/libgnarl/s-linux__loongarch.ads| 134 +++
 gcc/ada/libgnat/system-linux-loongarch.ads | 145 +
 gcc/config/loongarch/loongarch.h   |   4 +-
 4 files changed, 330 insertions(+), 2 deletions(-)
 create mode 100644 gcc/ada/libgnarl/s-linux__loongarch.ads
 create mode 100644 gcc/ada/libgnat/system-linux-loongarch.ads

diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl
index 96306f8cc9a..852a3324388 100644
--- a/gcc/ada/Makefile.rtl
+++ b/gcc/ada/Makefile.rtl
@@ -2111,6 +2111,55 @@ ifeq ($(strip $(filter-out cygwin% mingw32% 
pe,$(target_os))),)
   LIBRARY_VERSION := $(LIB_VERSION)
 endif
 
+# LoongArch Linux
+ifeq ($(strip $(filter-out loongarch% linux%,$(target_cpu) $(target_os))),)
+  LIBGNAT_TARGET_PAIRS = \
+  a-exetim.adbhttp://www.gnu.org/licenses/>.  --
+--  --
+--
+
+--  This is the LoongArch version of this package
+
+--  This package encapsulates cpu specific differences between implementations
+--  of GNU/Linux, in order to share s-osinte-linux.ads.
+
+--  PLEASE DO NOT add any with-clauses to this package or remove the pragma
+--  Preelaborate. This package is designed to be a bottom-level (leaf) package
+
+with Interfaces.C;
+with System.Parameters;
+
+package System.Linux is
+   pragma Preelaborate;
+
+   --
+   -- Time --
+   --
+
+   subtype int is Interfaces.C.int;
+   subtype longis Interfaces.C.long;
+   subtype suseconds_t is Interfaces.C.long;
+   type time_t is range -2 ** (System.Parameters.time_t_bits - 1)
+ .. 2 ** (System.Parameters.time_t_bits - 1) - 1;
+   subtype clockid_t   is Interfaces.C.int;
+
+   type timespec is record
+  tv_sec  : time_t;
+  tv_nsec : long;
+   end record;
+   pragma Convention (C, timespec);
+
+   type timeval is record
+  tv_sec  : time_t;
+  tv_usec : suseconds_t;
+   end record;
+   pragma Convention (C, timeval);
+
+   ---
+   -- Errno --
+   ---
+
+   EAGAIN: constant := 11;
+   EINTR : constant := 4;
+   EINVAL: constant := 22;
+   ENOMEM: constant := 12;
+   EPERM : constant := 1;
+   ETIMEDOUT : constant := 110;
+
+   -
+   -- Signals --
+   -
+
+   SIGHUP : constant := 1; --  hangup
+   SIGINT : constant := 2; --  interrupt (rubout)
+   SIGQUIT: constant := 3; --  quit (ASCD FS)
+   SIGILL : constant := 4; --  illegal instruction (not reset)
+   SIGTRAP: constant := 5; --  trace trap (not reset)
+   SIGIOT : constant := 6; --  IOT instruction
+   SIGABRT: constant := 6; --  used by abort, replace SIGIOT in the  future
+   SIGBUS : constant := 7; --  bus error
+   SIGFPE : constant := 8; --  floating point exception
+   SIGKILL: constant := 9; --  kill (cannot be caught or ignored)
+   SIGUSR1: constant := 10; --  user defined signal 1
+   SIGSEGV: constant := 11; --  segmentation violation
+   SIGUSR2: constant := 12; --  user defined signal 2
+   SIGPIPE: constant := 13; --  write on a pipe with no one to read it
+   SIGALRM: constant := 14; --  alarm clock
+   SIGTERM: constant := 15; --  software termination signal from kill
+   SIGSTKFLT  : constant := 16; --  coprocessor stack fault (Linux)
+   SIGCLD : constant := 17; --  alias for SIGCHLD
+   SIGCHLD: constant := 17; --  child status change
+   SIGCONT: constant := 18; --  stopped process has been continued
+   SIGSTOP: constant := 19; --  stop (cannot be caught or ignored)
+   SIGTSTP: constant := 20; --  user stop requested from tty
+   SIGTTIN: constant := 21; --  background tty read attempted
+   SIGTTOU: constant := 22; --  background tty write attempted
+   SIGURG : constant := 23; --  urgent condition on IO channel
+   SIGXCPU: constant := 24; --  CPU time limit exceeded
+   SIGXFSZ: constant := 25; --  filesize limit exceeded
+   SIGVTALRM  : constant := 26; --  virtual timer expired
+   SIGPROF: constant := 27; --  profiling timer expired
+   SIGWINCH   : constant := 28; --  window size change
+   SIGPOLL: constant := 29; --  pollable event occurred
+   SIGIO  : constant := 29; --  I/O now possible (4.2 BSD)
+   SIGPWR : constant := 30; --  power-fail restart
+   SIGSYS : constant := 31; --  bad system call
+   SIG32  : constant := 32; --  glibc internal signal
+   SIG33  : constant := 33; --  glibc internal signal
+   SIG34  : constant := 

Re: [PING][PATCH] LoongArch: initial ada support on linux

[Yang Yujie]

On Fri, Sep 01, 2023 at 01:52:16PM +, Arnaud Charlet wrote:

> A small nit above: I'd suggest using += instead of := $(XXX) to make things
> clearer.

Ok, will fix in v2.

[PATCH v3 2/4] LoongArch: define preprocessing macros "__loongarch_{arch, tune}"

[Yang Yujie]

These are exported according to the LoongArch Toolchain Conventions[1]
as a replacement of the obsolete "_LOONGARCH_{ARCH,TUNE}" macros,
which are expanded to strings representing the actual architecture
and microarchitecture of the target.

[1] currently relased at https://github.com/loongson/LoongArch-Documentation
/blob/main/docs/LoongArch-toolchain-conventions-EN.adoc

gcc/ChangeLog:

* config/loongarch/loongarch-c.cc: Export macros
"__loongarch_{arch,tune}" in the preprocessor.
---
 gcc/config/loongarch/loongarch-c.cc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/gcc/config/loongarch/loongarch-c.cc 
b/gcc/config/loongarch/loongarch-c.cc
index 7e3b57ff9b1..ec047e3822a 100644
--- a/gcc/config/loongarch/loongarch-c.cc
+++ b/gcc/config/loongarch/loongarch-c.cc
@@ -64,6 +64,9 @@ loongarch_cpu_cpp_builtins (cpp_reader *pfile)
   LARCH_CPP_SET_PROCESSOR ("_LOONGARCH_ARCH", la_target.cpu_arch);
   LARCH_CPP_SET_PROCESSOR ("_LOONGARCH_TUNE", la_target.cpu_tune);
 
+  LARCH_CPP_SET_PROCESSOR ("__loongarch_arch", la_target.cpu_arch);
+  LARCH_CPP_SET_PROCESSOR ("__loongarch_tune", la_target.cpu_tune);
+
   /* Base architecture / ABI.  */
   if (TARGET_64BIT)
 {
-- 
2.36.0

[PATCH v3 0/4] LoongArch: target configuration interface update

[Yang Yujie]

This is an update of
https://gcc.gnu.org/pipermail/gcc-patches/2023-August/628772.html

Changes since the last patchset:

1. Fix texinfo format of the install.texi document.
2. Add documentation for --with-strict-align-lib.

v1 -> v2:
1. Add new configure option --with-strict-align-lib to control
   whether -mstrict-align should be used when building libraries.
   This facilitates building toolchains targeting both LA264
   (Loongson 2k1000la) and non-LA264 cores.

2. Define preprocessing macros  __loongarch_sx / __loongarch_asx
   / __loongarch_simd_width that indicates the enabled SIMD
   extensions.

3. Keep the current non-symmetric multidir layout, but do not build
   duplicate multilib variants with the same ABI option.  Make
   --with-abi= obsolete to ensure a consistent directory layout.
   (ABI type of the "toplevel" libraries can be inferred from the
target triplet)

4. Using "-mno-lasx" do not cause a fallback to "-msimd=none" as
   long as the -march= architecture or the default --with-simd=
   setting has LSX support.

Yang Yujie (4):
  LoongArch: improved target configuration interface
  LoongArch: define preprocessing macros "__loongarch_{arch,tune}"
  LoongArch: add new configure option --with-strict-align-lib
  LoongArch: support loongarch*-elf target

 config-ml.in  |  10 +
 gcc/config.gcc| 408 ++
 gcc/config/loongarch/elf.h|  52 +++
 .../loongarch/genopts/loongarch-strings   |   8 +-
 gcc/config/loongarch/genopts/loongarch.opt.in |  62 ++-
 gcc/config/loongarch/la464.md |  32 +-
 gcc/config/loongarch/loongarch-c.cc   |  22 +-
 gcc/config/loongarch/loongarch-cpu.cc | 263 ++-
 gcc/config/loongarch/loongarch-cpu.h  |   3 +-
 gcc/config/loongarch/loongarch-def.c  |  67 +--
 gcc/config/loongarch/loongarch-def.h  |  57 +--
 gcc/config/loongarch/loongarch-driver.cc  | 208 +
 gcc/config/loongarch/loongarch-driver.h   |  40 +-
 gcc/config/loongarch/loongarch-opts.cc| 372 +++-
 gcc/config/loongarch/loongarch-opts.h |  59 +--
 gcc/config/loongarch/loongarch-str.h  |   7 +-
 gcc/config/loongarch/loongarch.cc |  87 ++--
 gcc/config/loongarch/loongarch.opt|  60 ++-
 gcc/config/loongarch/t-linux  |  32 +-
 gcc/doc/install.texi  |  56 ++-
 gcc/doc/invoke.texi   |  32 +-
 libgcc/config.host|   9 +-
 22 files changed, 1261 insertions(+), 685 deletions(-)
 create mode 100644 gcc/config/loongarch/elf.h

-- 
2.36.0

[PATCH v3 1/4] LoongArch: improved target configuration interface

[Yang Yujie]

The configure script and the GCC driver are updated so that
it is easier to customize and control GCC builds for targeting
different LoongArch implementations.

* Make --with-abi obsolete, since it might cause different default ABI
  under the same target triplet, which is undesirable.  The default ABI
  is now purely decided by the target triplet.

* Support options for LoongArch SIMD extensions:
  new configure options --with-simd={none,lsx,lasx};
  new compiler option -msimd={none,lsx,lasx};
  new driver options -m[no]-l[a]sx.

* Enforce the priority of configuration paths (for ={fpu,tune,simd}):
  -m > -march-implied > --with- > --with-arch-implied.

* Allow the user to control the compiler options used when building
  GCC libraries for each multilib variant via --with-multilib-list
  and --with-multilib-default.  This could become more useful when
  we have 32-bit support later.

  Example 1: the following configure option
--with-multilib-list=lp64d/la464/mno-strict-align/msimd=lsx,lp64s/mfpu=32
  | || |
-mabi=ABI  -march=ARCH  a list of other options
  (mandatory)  (optional) (optional)

 builds two sets of libraries:
 1. lp64d/base ABI (built with "-march=la464 -mno-strict-align -msimd=lsx")
 2. lp64s/base ABI (built with "-march=abi-default -mfpu=32")

  Example 2: the following 3 configure options

--with-arch=loongarch64
--with-multilib-list=lp64d,lp64f,lp64s/la464
--with-multilib-default=fixed/mno-strict-align/mfpu=64
 ||   |
-march=ARCH   a list of other options
 (optional)(optional)

is equivalent to (in terms of building libraries):

--with-multilib-list=\
lp64d/loongarch64/mno-strict-align/mfpu=64,\
lp64f/loongarch64/mno-strict-align/mfpu=64,\
lp64s/la464

  Note:
1. the GCC driver and compiler proper does not support
   "-march=fixed". "fixed" that appear here acts as a placeholder for
   "use whatever ARCH in --with-arch=ARCH" (or the default value
   of --with-arch=ARCH if --with-arch is not explicitly configured).

2. if the ARCH part is omitted, "-march=abi-default"
   is used for building all library variants, which
   practically means enabling the minimal ISA features
   that can support the given ABI.

ChangeLog:

* config-ml.in: Do not build the multilib library variant
that is duplicate with the toplevel one.

gcc/ChangeLog:

* config.gcc: Make --with-abi= obsolete, decide the default ABI
with target triplet.  Allow specifying multilib library build
options with --with-multilib-list and --with-multilib-default.
* config/loongarch/t-linux: Likewise.
* config/loongarch/genopts/loongarch-strings: Likewise.
* config/loongarch/loongarch-str.h: Likewise.
* doc/install.texi: Likewise.
* config/loongarch/genopts/loongarch.opt.in: Introduce
-m[no-]l[a]sx options.  Only process -m*-float and
-m[no-]l[a]sx in the GCC driver.
* config/loongarch/loongarch.opt: Likewise.
* config/loongarch/la464.md: Likewise.
* config/loongarch/loongarch-c.cc: Likewise.
* config/loongarch/loongarch-cpu.cc: Likewise.
* config/loongarch/loongarch-cpu.h: Likewise.
* config/loongarch/loongarch-def.c: Likewise.
* config/loongarch/loongarch-def.h: Likewise.
* config/loongarch/loongarch-driver.cc: Likewise.
* config/loongarch/loongarch-driver.h: Likewise.
* config/loongarch/loongarch-opts.cc: Likewise.
* config/loongarch/loongarch-opts.h: Likewise.
* config/loongarch/loongarch.cc: Likewise.
* doc/invoke.texi: Likewise.
---
 config-ml.in  |  10 +
 gcc/config.gcc| 379 ++
 .../loongarch/genopts/loongarch-strings   |   8 +-
 gcc/config/loongarch/genopts/loongarch.opt.in |  62 +--
 gcc/config/loongarch/la464.md |  32 +-
 gcc/config/loongarch/loongarch-c.cc   |  19 +-
 gcc/config/loongarch/loongarch-cpu.cc | 263 +++-
 gcc/config/loongarch/loongarch-cpu.h  |   3 +-
 gcc/config/loongarch/loongarch-def.c  |  67 ++--
 gcc/config/loongarch/loongarch-def.h  |  57 +--
 gcc/config/loongarch/loongarch-driver.cc  | 208 +-
 gcc/config/loongarch/loongarch-driver.h   |  40 +-
 gcc/config/loongarch/loongarch-opts.cc| 372 -
 gcc/config/loongarch/loongarch-opts.h |  59 +--
 gcc/config/loongarch/loongarch-str.h  |   7 +-
 gcc/config/loongarch/loongarch.cc |  87 ++--
 gcc/config/loongarch/loongarch.opt|  60 ++-
 gcc/config/loongarch/t-linux  |  32 +-
 gcc/doc/install.texi  |  52 ++-
 gcc/doc/invoke.texi