[PATCH v2] PR target/89828 Inernal compiler error on -fno-omit-frame-pointer
What about this?
It no longer occurs for me.
gcc/config/rx/
* rx.cc (add_pop_cfi_notes): Release the frame pointer if it is used.
(rx_expand_prologue): Redesigned stack pointer and frame pointer update
process.
Signed-off-by: Yoshinori Sato
---
gcc/config/rx/rx.cc | 50 +++--
1 file changed, 17 insertions(+), 33 deletions(-)
diff --git a/gcc/config/rx/rx.cc b/gcc/config/rx/rx.cc
index 412a3a354b0..51ef4a6be34 100644
--- a/gcc/config/rx/rx.cc
+++ b/gcc/config/rx/rx.cc
@@ -1647,16 +1647,20 @@ mark_frame_related (rtx insn)
static void
add_pop_cfi_notes (rtx_insn *insn, unsigned int high, unsigned int low)
{
- rtx t = plus_constant (Pmode, stack_pointer_rtx,
-(high - low + 1) * UNITS_PER_WORD);
+ rtx src = stack_pointer_rtx;
+ rtx t;
+ for (unsigned int i = low; i <= high; i++)
+{
+ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (word_mode, i));
+ if (i == FRAME_POINTER_REGNUM && frame_pointer_needed)
+ src = frame_pointer_rtx;
+}
+ t = plus_constant (Pmode, src, (high - low + 1) * UNITS_PER_WORD);
t = gen_rtx_SET (stack_pointer_rtx, t);
add_reg_note (insn, REG_CFA_ADJUST_CFA, t);
RTX_FRAME_RELATED_P (insn) = 1;
- for (unsigned int i = low; i <= high; i++)
-add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (word_mode, i));
}
-
static bool
ok_for_max_constant (HOST_WIDE_INT val)
{
@@ -1815,37 +1819,17 @@ rx_expand_prologue (void)
}
}
- /* If needed, set up the frame pointer. */
- if (frame_pointer_needed)
-gen_safe_add (frame_pointer_rtx, stack_pointer_rtx,
- GEN_INT (- (HOST_WIDE_INT) frame_size), true);
-
- /* Allocate space for the outgoing args.
- If the stack frame has not already been set up then handle this as well.
*/
- if (stack_size)
+ if (stack_size || frame_size)
{
- if (frame_size)
- {
- if (frame_pointer_needed)
- gen_safe_add (stack_pointer_rtx, frame_pointer_rtx,
- GEN_INT (- (HOST_WIDE_INT) stack_size), true);
- else
- gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
- GEN_INT (- (HOST_WIDE_INT) (frame_size + stack_size)),
- true);
- }
- else
- gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
- GEN_INT (- (HOST_WIDE_INT) stack_size), true);
+ gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
+ GEN_INT (- (HOST_WIDE_INT) (stack_size + frame_size)),
+ true);
}
- else if (frame_size)
+ if (frame_pointer_needed)
{
- if (! frame_pointer_needed)
- gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
- GEN_INT (- (HOST_WIDE_INT) frame_size), true);
- else
- gen_safe_add (stack_pointer_rtx, frame_pointer_rtx, NULL_RTX,
- false /* False because the epilogue will use the FP not
the SP. */);
+ gen_safe_add (frame_pointer_rtx, stack_pointer_rtx,
+ GEN_INT ((HOST_WIDE_INT) stack_size),
+ true);
}
}
--
2.30.2
[PATCH] PR target/89828 Inernal compiler error on -fno-omit-frame-pointer
The problem was caused by an erroneous note about creating a stack frame,
which caused the cur_cfa reg to fail to assert with a value other than
the frame pointer.
This fix will generate notes that correctly update cur_cfa.
gcc/config/rx/
* rx.cc (add_pop_cfi_notes): Release the frame pointer if it is used.
(rx_expand_prologue): Redesigned stack pointer and frame pointer update
process.
Signed-off-by: Yoshinori Sato
---
gcc/config/rx/rx.cc | 50 +++--
1 file changed, 17 insertions(+), 33 deletions(-)
diff --git a/gcc/config/rx/rx.cc b/gcc/config/rx/rx.cc
index 412a3a354b0..8c246d42cd8 100644
--- a/gcc/config/rx/rx.cc
+++ b/gcc/config/rx/rx.cc
@@ -1647,16 +1647,20 @@ mark_frame_related (rtx insn)
static void
add_pop_cfi_notes (rtx_insn *insn, unsigned int high, unsigned int low)
{
- rtx t = plus_constant (Pmode, stack_pointer_rtx,
-(high - low + 1) * UNITS_PER_WORD);
+ rtx src = stack_pointer_rtx;
+ rtx t;
+ for (unsigned int i = low; i <= high; i++)
+{
+ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (word_mode, i));
+ if (i == FRAME_POINTER_REGNUM)
+ src = frame_pointer_rtx;
+}
+ t = plus_constant (Pmode, src, (high - low + 1) * UNITS_PER_WORD);
t = gen_rtx_SET (stack_pointer_rtx, t);
add_reg_note (insn, REG_CFA_ADJUST_CFA, t);
RTX_FRAME_RELATED_P (insn) = 1;
- for (unsigned int i = low; i <= high; i++)
-add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (word_mode, i));
}
-
static bool
ok_for_max_constant (HOST_WIDE_INT val)
{
@@ -1815,37 +1819,17 @@ rx_expand_prologue (void)
}
}
- /* If needed, set up the frame pointer. */
- if (frame_pointer_needed)
-gen_safe_add (frame_pointer_rtx, stack_pointer_rtx,
- GEN_INT (- (HOST_WIDE_INT) frame_size), true);
-
- /* Allocate space for the outgoing args.
- If the stack frame has not already been set up then handle this as well.
*/
- if (stack_size)
+ if (stack_size || frame_size)
{
- if (frame_size)
- {
- if (frame_pointer_needed)
- gen_safe_add (stack_pointer_rtx, frame_pointer_rtx,
- GEN_INT (- (HOST_WIDE_INT) stack_size), true);
- else
- gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
- GEN_INT (- (HOST_WIDE_INT) (frame_size + stack_size)),
- true);
- }
- else
- gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
- GEN_INT (- (HOST_WIDE_INT) stack_size), true);
+ gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
+ GEN_INT (- (HOST_WIDE_INT) (stack_size + frame_size)),
+ true);
}
- else if (frame_size)
+ if (frame_pointer_needed)
{
- if (! frame_pointer_needed)
- gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
- GEN_INT (- (HOST_WIDE_INT) frame_size), true);
- else
- gen_safe_add (stack_pointer_rtx, frame_pointer_rtx, NULL_RTX,
- false /* False because the epilogue will use the FP not
the SP. */);
+ gen_safe_add (frame_pointer_rtx, stack_pointer_rtx,
+ GEN_INT ((HOST_WIDE_INT) stack_size),
+ true);
}
}
--
2.30.2
[PATCH] sh-linux fix target cpu
sh-linux not supported any SH1 and SH2a little-endian. Add exceptios it. gcc/ChangeLog: * config/sh/t-linux (MULTILIB_EXCEPTIONS): Add m1, mb/m1 and m2a. --- gcc/config/sh/t-linux | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/gcc/config/sh/t-linux b/gcc/config/sh/t-linux index d33c6383915..ca323ca25a9 100644 --- a/gcc/config/sh/t-linux +++ b/gcc/config/sh/t-linux @@ -1,2 +1,3 @@ MULTILIB_DIRNAMES= -MULTILIB_MATCHES = +MULTILIB_MATCHES= +MULTILIB_EXCEPTIONS=m1 mb/m1 m2a -- 2.30.2
[PATCH] rx: Add define "PREFERRED_DEBUGGING_TYPE" to rx-*-linux.
Added missging PREFERRED_DEBUGGING_TYPE. gcc/ChangeLog * config/rx/linux.h (PREFERRED_DEBUGGING_TYPE): Added missing define. --- gcc/config/rx/linux.h | 1 + 1 file changed, 1 insertion(+) diff --git a/gcc/config/rx/linux.h b/gcc/config/rx/linux.h index 9ee484af886..e9b51197a23 100644 --- a/gcc/config/rx/linux.h +++ b/gcc/config/rx/linux.h @@ -226,6 +226,7 @@ while (0) #undef PREFERRED_DEBUGGING_TYPE +#define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG #undef TARGET_AS100_SYNTAX #define TARGET_AS100_SYNTAX 0 -- 2.33.0
Re: [PATCH] RX: Add rx-*-linux target
On Thu, 06 Jun 2019 08:22:55 +0900,
Jeff Law wrote:
>
> [1 ]
> On 6/3/19 11:01 AM, Yoshinori Sato wrote:
> > On Sun, 02 Jun 2019 22:12:37 +0900,
> > Oleg Endo wrote:
> >>
> >> On Sun, 2019-06-02 at 20:26 +0900, Yoshinori Sato wrote:
> >>> On Fri, 31 May 2019 09:16:18 +0900,
> >>> Jeff Law wrote:
> >>>>
> >>>> On 5/29/19 12:27 PM, Jeff Law wrote:
> >>>>> On 5/23/19 6:05 AM, Yoshinori Sato wrote:
> >>>>>> I ported linux kernel to Renesas RX.
> >>>>>>
> >>>>>> rx-*-elf target output a binary different from the standard
> >>>>>> ELF.
> >>>>>> It has the same format as the Renesas compiler.
> >>>>>>
> >>>>>> But the linux kernel requires the standard ELF format.
> >>>>>> I want to define a rx-*-linux target so that I can generate
> >>>>>> a standard ELF binary.
> >>>>>
> >>>>> Presumably you're resubmitting after your assignment got recorded
> >>>>> (I
> >>>>> think I saw that fly by recently).
> >>>>>
> >>>>> I'll construct a ChangeLog and install this on the trunk.
> >>>>
> >>>> So this is causing libgcc to fail to build for rx-elf. The problem
> >>>> is
> >>>> the DF=SF #define. I think you need so split that out so that it's
> >>>> only
> >>>> used for rx-linux.
> >>>>
> >>>> Jeff
> >>>
> >>> OK. fix it.
> >>> I tried build rx-elf target. it success.
> >>>
> >>
> >> Setting DF=SF is the wrong thing to do IMHO. RX can do DF just fine in
> >> software. If this is hardcoded like that in the roots of the
> >> toolchain, it will make compiling packages that actually need real DF
> >> completely impossible, won't it? We also don't set DI = SI just
> >> because the hardware is bad at SI ...
> >>
> >> Just my 2 cents.
> >>
> >> Cheers,
> >> Oleg
> >>
> >
> > OK.
> > I was misunderstood.
> > I think this is not a problem.
> [ ... ]
> THanks. Give we already had your original patch in the source tree, I
> extracted just the new bits and committed them. I'm attaching the
> changes for archival purposes.
>
> Jeff
OK. Thanks.
It can build linux kernel.
> [2 P ]
> commit aafb499477a6f23d01c4c048c20c8833a801396a
> Author: law
> Date: Wed Jun 5 23:20:27 2019 +
>
> * config.host (rx-*-linux*): Add t-fdpbit to tmake_file
> Add appropriate tm_file clause as well.
> * config/rx/t-rx (HOST_LIBGCC2_CFLAGS): Remove.
>
> git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271978
> 138bc75d-0d04-0410-961f-82ee72b054a4
>
> diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
> index 82c124f8ece..93cdcda3284 100644
> --- a/libgcc/ChangeLog
> +++ b/libgcc/ChangeLog
> @@ -1,3 +1,9 @@
> +2019-06-05 Yoshinori Sato
> +
> + * config.host (rx-*-linux*): Add t-fdpbit to tmake_file
> + Add appropriate tm_file clause as well.
> + * config/rx/t-rx (HOST_LIBGCC2_CFLAGS): Remove.
> +
> 2019-06-05 James Clarke
>
> * config/ia64/crtbegin.S (__dso_handle): Put in .sdata/.sbss
> diff --git a/libgcc/config.host b/libgcc/config.host
> index ff2f0fa1e58..d75e2b5d7aa 100644
> --- a/libgcc/config.host
> +++ b/libgcc/config.host
> @@ -1212,7 +1212,8 @@ rx-*-elf)
> tm_file="$tm_file rx/rx-abi.h rx/rx-lib.h"
> ;;
> rx-*-linux*)
> - tmake_file="rx/t-rx"
> + tmake_file="rx/t-rx t-fdpbit"
> + tm_file="$tm_file rx/rx-lib.h"
> ;;
> s390-*-linux*)
> tmake_file="${tmake_file} s390/t-crtstuff s390/t-linux
> s390/32/t-floattodi t-stack s390/t-stack-s390"
> diff --git a/libgcc/config/rx/t-rx b/libgcc/config/rx/t-rx
> index 34cdc97cc03..ace3b16f39e 100644
> --- a/libgcc/config/rx/t-rx
> +++ b/libgcc/config/rx/t-rx
> @@ -23,7 +23,6 @@
> # the normal libgcc sources:
>
> LIB2ADD = $(srcdir)/config/rx/rx-abi-functions.c
> -HOST_LIBGCC2_CFLAGS += -DDF=SF
>
>
> # We need special handling of the floating point conversion
--
Yosinori Sato
Re: [PATCH] RX: Add rx-*-linux target
On Sun, 02 Jun 2019 22:12:37 +0900,
Oleg Endo wrote:
>
> On Sun, 2019-06-02 at 20:26 +0900, Yoshinori Sato wrote:
> > On Fri, 31 May 2019 09:16:18 +0900,
> > Jeff Law wrote:
> > >
> > > On 5/29/19 12:27 PM, Jeff Law wrote:
> > > > On 5/23/19 6:05 AM, Yoshinori Sato wrote:
> > > > > I ported linux kernel to Renesas RX.
> > > > >
> > > > > rx-*-elf target output a binary different from the standard
> > > > > ELF.
> > > > > It has the same format as the Renesas compiler.
> > > > >
> > > > > But the linux kernel requires the standard ELF format.
> > > > > I want to define a rx-*-linux target so that I can generate
> > > > > a standard ELF binary.
> > > >
> > > > Presumably you're resubmitting after your assignment got recorded
> > > > (I
> > > > think I saw that fly by recently).
> > > >
> > > > I'll construct a ChangeLog and install this on the trunk.
> > >
> > > So this is causing libgcc to fail to build for rx-elf. The problem
> > > is
> > > the DF=SF #define. I think you need so split that out so that it's
> > > only
> > > used for rx-linux.
> > >
> > > Jeff
> >
> > OK. fix it.
> > I tried build rx-elf target. it success.
> >
>
> Setting DF=SF is the wrong thing to do IMHO. RX can do DF just fine in
> software. If this is hardcoded like that in the roots of the
> toolchain, it will make compiling packages that actually need real DF
> completely impossible, won't it? We also don't set DI = SI just
> because the hardware is bad at SI ...
>
> Just my 2 cents.
>
> Cheers,
> Oleg
>
OK.
I was misunderstood.
I think this is not a problem.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 7122c8ed1c8..b547ab1d1cb 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2799,6 +2799,11 @@ rl78-*-elf*)
rx-*-elf*)
tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
tmake_file="${tmake_file} rx/t-rx"
+ extra_options="${extra_options} rx/elf.opt"
+ ;;
+rx-*-linux*)
+ tm_file="elfos.h linux.h glibc-stdint.h rx/linux.h
../../libgcc/config/rx/rx-abi.h"
+ tmake_file="${tmake_file} rx/t-linux"
;;
s390-*-linux*)
tm_file="s390/s390.h dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h
s390/linux.h"
diff --git a/gcc/config/rx/elf.opt b/gcc/config/rx/elf.opt
new file mode 100644
index 000..907e030df8e
--- /dev/null
+++ b/gcc/config/rx/elf.opt
@@ -0,0 +1,44 @@
+; Command line options for the Renesas RX port of GCC.
+; Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
+; Contributed by Red Hat.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3. If not see
+; <http://www.gnu.org/licenses/>.
+;---
+
+; elf target extra options
+
+msim
+Target
+Use the simulator runtime.
+
+;---
+
+mas100-syntax
+Target Mask(AS100_SYNTAX) Report
+Generate assembler output that is compatible with the Renesas AS100 assembler.
This may restrict some of the compiler's capabilities. The default is to
generate GAS compatable syntax.
+
+;---
+
+mint-register=
+Target RejectNegative Joined UInteger Var(rx_interrupt_registers) Init(0)
+Specifies the number of registers to reserve for interrupt handlers.
+
+;---
+
+msave-acc-in-interrupts
+Target Mask(SAVE_ACC_REGISTER)
+Specifies whether interrupt functions should save and restore the accumulator
register.
diff --git a/gcc/config/rx/linux.h b/gcc/config/rx/linux.h
new file mode 100644
index 000..df3fdd41092
--- /dev/null
+++ b/gcc/config/rx/linux.h
@@ -0,0 +1,231 @@
+/* GCC backend definitions for the rx-linux
+ Copyright (C) 2019 Yoshinori Sato
+ Based on rx.h
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option
Re: [PATCH] RX: Add rx-*-linux target
On Fri, 31 May 2019 09:16:18 +0900,
Jeff Law wrote:
>
> On 5/29/19 12:27 PM, Jeff Law wrote:
> > On 5/23/19 6:05 AM, Yoshinori Sato wrote:
> >> I ported linux kernel to Renesas RX.
> >>
> >> rx-*-elf target output a binary different from the standard ELF.
> >> It has the same format as the Renesas compiler.
> >>
> >> But the linux kernel requires the standard ELF format.
> >> I want to define a rx-*-linux target so that I can generate
> >> a standard ELF binary.
> > Presumably you're resubmitting after your assignment got recorded (I
> > think I saw that fly by recently).
> >
> > I'll construct a ChangeLog and install this on the trunk.
> So this is causing libgcc to fail to build for rx-elf. The problem is
> the DF=SF #define. I think you need so split that out so that it's only
> used for rx-linux.
>
> Jeff
OK. fix it.
I tried build rx-elf target. it success.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 7122c8ed1c8..b547ab1d1cb 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2799,6 +2799,11 @@ rl78-*-elf*)
rx-*-elf*)
tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
tmake_file="${tmake_file} rx/t-rx"
+ extra_options="${extra_options} rx/elf.opt"
+ ;;
+rx-*-linux*)
+ tm_file="elfos.h linux.h glibc-stdint.h rx/linux.h
../../libgcc/config/rx/rx-abi.h"
+ tmake_file="${tmake_file} rx/t-linux"
;;
s390-*-linux*)
tm_file="s390/s390.h dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h
s390/linux.h"
diff --git a/gcc/config/rx/elf.opt b/gcc/config/rx/elf.opt
new file mode 100644
index 000..907e030df8e
--- /dev/null
+++ b/gcc/config/rx/elf.opt
@@ -0,0 +1,44 @@
+; Command line options for the Renesas RX port of GCC.
+; Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
+; Contributed by Red Hat.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3. If not see
+; <http://www.gnu.org/licenses/>.
+;---
+
+; elf target extra options
+
+msim
+Target
+Use the simulator runtime.
+
+;---
+
+mas100-syntax
+Target Mask(AS100_SYNTAX) Report
+Generate assembler output that is compatible with the Renesas AS100 assembler.
This may restrict some of the compiler's capabilities. The default is to
generate GAS compatable syntax.
+
+;---
+
+mint-register=
+Target RejectNegative Joined UInteger Var(rx_interrupt_registers) Init(0)
+Specifies the number of registers to reserve for interrupt handlers.
+
+;---
+
+msave-acc-in-interrupts
+Target Mask(SAVE_ACC_REGISTER)
+Specifies whether interrupt functions should save and restore the accumulator
register.
diff --git a/gcc/config/rx/linux.h b/gcc/config/rx/linux.h
new file mode 100644
index 000..df3fdd41092
--- /dev/null
+++ b/gcc/config/rx/linux.h
@@ -0,0 +1,231 @@
+/* GCC backend definitions for the rx-linux
+ Copyright (C) 2019 Yoshinori Sato
+ Based on rx.h
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+
+#include "config/rx/rx.h"
+
+#undef TARGET_CPU_CPP_BUILTINS
+#define TARGET_CPU_CPP_BUILTINS() \
+ do\
+{ \
+ builtin_define ("__RX__"); \
+ builtin_assert ("cpu=RX"); \
+ if (rx_cpu_type == RX610)\
+builtin_assert ("machine=RX610"); \
+ else
[PATCH] RX: Add rx-*-linux target
I ported linux kernel to Renesas RX.
rx-*-elf target output a binary different from the standard ELF.
It has the same format as the Renesas compiler.
But the linux kernel requires the standard ELF format.
I want to define a rx-*-linux target so that I can generate
a standard ELF binary.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 7122c8ed1c8..b547ab1d1cb 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2799,6 +2799,11 @@ rl78-*-elf*)
rx-*-elf*)
tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
tmake_file="${tmake_file} rx/t-rx"
+ extra_options="${extra_options} rx/elf.opt"
+ ;;
+rx-*-linux*)
+ tm_file="elfos.h linux.h glibc-stdint.h rx/linux.h
../../libgcc/config/rx/rx-abi.h"
+ tmake_file="${tmake_file} rx/t-linux"
;;
s390-*-linux*)
tm_file="s390/s390.h dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h
s390/linux.h"
diff --git a/gcc/config/rx/elf.opt b/gcc/config/rx/elf.opt
new file mode 100644
index 000..907e030df8e
--- /dev/null
+++ b/gcc/config/rx/elf.opt
@@ -0,0 +1,44 @@
+; Command line options for the Renesas RX port of GCC.
+; Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
+; Contributed by Red Hat.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3. If not see
+; <http://www.gnu.org/licenses/>.
+;---
+
+; elf target extra options
+
+msim
+Target
+Use the simulator runtime.
+
+;---
+
+mas100-syntax
+Target Mask(AS100_SYNTAX) Report
+Generate assembler output that is compatible with the Renesas AS100 assembler.
This may restrict some of the compiler's capabilities. The default is to
generate GAS compatable syntax.
+
+;---
+
+mint-register=
+Target RejectNegative Joined UInteger Var(rx_interrupt_registers) Init(0)
+Specifies the number of registers to reserve for interrupt handlers.
+
+;---
+
+msave-acc-in-interrupts
+Target Mask(SAVE_ACC_REGISTER)
+Specifies whether interrupt functions should save and restore the accumulator
register.
diff --git a/gcc/config/rx/linux.h b/gcc/config/rx/linux.h
new file mode 100644
index 000..5466f41b8f5
--- /dev/null
+++ b/gcc/config/rx/linux.h
@@ -0,0 +1,231 @@
+/* GCC backend definitions for the rx-linux
+ Copyright (C) 2019 Yoshinori Sato
+ Based on rx.h
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 3, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
+
+
+#include "config/rx/rx.h"
+
+#undef TARGET_CPU_CPP_BUILTINS
+#define TARGET_CPU_CPP_BUILTINS() \
+ do\
+{ \
+ builtin_define ("__RX__"); \
+ builtin_assert ("cpu=RX"); \
+ if (rx_cpu_type == RX610)\
+builtin_assert ("machine=RX610"); \
+ else \
+builtin_assert ("machine=RX600"); \
+ \
+ if (TARGET_BIG_ENDIAN_DATA) \
+ builtin_define ("__RX_BIG_ENDIAN__"); \
+ else \
+ builtin_define ("__RX_LITTLE_ENDIAN__");\
+ \
+ if (TARGET_64BIT_DOUBLES)\
+ builtin_define ("__RX_64BIT_DOUBLES__");\
+ else \
+ builtin_define ("__RX_32BIT_DOUBLES__");\
+ \
+ if (ALLOW_RX_FPU_INSNS) \
+ bui
Re: [PATCH] RX: Add rx-*-linux target
On Wed, 01 May 2019 00:37:56 +0900, Jeff Law wrote: > > On 4/30/19 7:55 AM, Yoshinori Sato wrote: > > On Tue, 30 Apr 2019 06:48:01 +0900, > > Jeff Law wrote: > >> > >> On 3/26/19 8:21 AM, Yoshinori Sato wrote: > >>> I ported linux kernel to Renesas RX. > >>> > >>> rx-*-elf target output a binary different from the standard ELF. > >>> It has the same format as the Renesas compiler. > >>> > >>> But the linux kernel requires the standard ELF format. > >>> I want to define a rx-*-linux target so that I can generate > >>> a standard ELF binary.I believe you have a copyright assignment on file > >>> for your H8 work. Was > >> the assignment specific to the H8 or was it more general? > > > > No. This changes other target. > > These files are not included in my copyright assignment. > > > >> > >>> diff --git a/gcc/config/rx/linux.h b/gcc/config/rx/linux.h > >>> new file mode 100644 > >>> index 000..69500a379f2 > >>> --- /dev/null > >>> +++ b/gcc/config/rx/linux.h > >> > >>> + > >>> +/* This is how to output an element of a case-vector that is relative. > >>> + Note: The local label referenced by the "3b" below is emitted by > >>> + the tablejump insn. */ > >>> + > >>> +#undef ASM_OUTPUT_ADDR_DIFF_ELT > >>> +#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ > >>> + fprintf (FILE, "\t.long .L%d - 1b\n", VALUE) > >> Note the comment references "3b", but the output is "1b". > > > > Oh. > > I will update it. > > > >> I don't see anything in here significantly concerning. We just need to > >> verify your copyright assignment status. > > > > OK. > > > >> Also, do you have write access to the repo? > > > > I don't have write permission of svn repository. > OK. So let me know when the assignment is updated and I'll commit the > changes. > > If you forsee doing future work, you might consider a broader assignment > so that we don't have to go through the assignment process for each > contribution. > > Jeff Thank you. When the procedure is over, post a patch that corrects the comment. -- Yosinori Sato
Re: [PATCH] RX: Add rx-*-linux target
On Tue, 30 Apr 2019 06:48:01 +0900, Jeff Law wrote: > > On 3/26/19 8:21 AM, Yoshinori Sato wrote: > > I ported linux kernel to Renesas RX. > > > > rx-*-elf target output a binary different from the standard ELF. > > It has the same format as the Renesas compiler. > > > > But the linux kernel requires the standard ELF format. > > I want to define a rx-*-linux target so that I can generate > > a standard ELF binary.I believe you have a copyright assignment on file for > > your H8 work. Was > the assignment specific to the H8 or was it more general? No. This changes other target. These files are not included in my copyright assignment. > > > diff --git a/gcc/config/rx/linux.h b/gcc/config/rx/linux.h > > new file mode 100644 > > index 000..69500a379f2 > > --- /dev/null > > +++ b/gcc/config/rx/linux.h > > > + > > +/* This is how to output an element of a case-vector that is relative. > > + Note: The local label referenced by the "3b" below is emitted by > > + the tablejump insn. */ > > + > > +#undef ASM_OUTPUT_ADDR_DIFF_ELT > > +#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ > > + fprintf (FILE, "\t.long .L%d - 1b\n", VALUE) > Note the comment references "3b", but the output is "1b". Oh. I will update it. > I don't see anything in here significantly concerning. We just need to > verify your copyright assignment status. OK. > Also, do you have write access to the repo? I don't have write permission of svn repository. > Jeff > -- Yosinori Sato
[PATCH] RX: Add rx-*-linux target
I ported linux kernel to Renesas RX.
rx-*-elf target output a binary different from the standard ELF.
It has the same format as the Renesas compiler.
But the linux kernel requires the standard ELF format.
I want to define a rx-*-linux target so that I can generate
a standard ELF binary.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 3eb2e800fc5..2fef8922578 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2800,6 +2800,11 @@ rl78-*-elf*)
rx-*-elf*)
tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}"
tmake_file="${tmake_file} rx/t-rx"
+ extra_options="${extra_options} rx/elf.opt"
+ ;;
+rx-*-linux*)
+ tm_file="elfos.h linux.h glibc-stdint.h rx/linux.h
../../libgcc/config/rx/rx-abi.h"
+ tmake_file="${tmake_file} rx/t-linux"
;;
s390-*-linux*)
tm_file="s390/s390.h dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h
s390/linux.h"
diff --git a/gcc/config/rx/elf.opt b/gcc/config/rx/elf.opt
new file mode 100644
index 000..907e030df8e
--- /dev/null
+++ b/gcc/config/rx/elf.opt
@@ -0,0 +1,44 @@
+; Command line options for the Renesas RX port of GCC.
+; Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
+; Contributed by Red Hat.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 3, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING3. If not see
+;
Remove SH_DIV_CALL2
Build failed on sh-*-linux and sh-*-netbsd. Please update. diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h index 09e966b..6117b9d 100644 --- a/gcc/config/sh/linux.h +++ b/gcc/config/sh/linux.h @@ -117,13 +117,6 @@ along with GCC; see the file COPYING3. If not see #define DBX_REGISTER_NUMBER(REGNO) \ (((REGNO) == 16) ? 16 : SH_DBX_REGISTER_NUMBER (REGNO)) -/* Since libgcc is compiled with -fpic for this target, we can't use - __sdivsi3_1 as the division strategy for -O0 and -Os. */ -#undef SH_DIV_STRATEGY_DEFAULT -#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL2 -#undef SH_DIV_STR_FOR_SIZE -#define SH_DIV_STR_FOR_SIZE "call2" - /* Install the __sync libcalls. */ #undef TARGET_INIT_LIBFUNCS #define TARGET_INIT_LIBFUNCS sh_init_sync_libfuncs diff --git a/gcc/config/sh/netbsd-elf.h b/gcc/config/sh/netbsd-elf.h index e658018..c5c75a4 100644 --- a/gcc/config/sh/netbsd-elf.h +++ b/gcc/config/sh/netbsd-elf.h @@ -80,13 +80,6 @@ do \ }\ while (0) -/* Since libgcc is compiled with -fpic for this target, we can't use - __sdivsi3_1 as the division strategy for -O0 and -Os. */ -#undef SH_DIV_STRATEGY_DEFAULT -#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL2 -#undef SH_DIV_STR_FOR_SIZE -#define SH_DIV_STR_FOR_SIZE "call2" - #undef SUBTARGET_OVERRIDE_OPTIONS #define SUBTARGET_OVERRIDE_OPTIONS \ do \ -- Yoshinori Sato <ys...@users.sourceforge.jp>
Re: [PATCH][RX] v2 instructions support.
Ping.
On Thu, 10 Dec 2015 23:11:33 +0900,
Yoshinori Sato wrote:
>
> Add RX v2 enhancement instructions support.
>
> gcc/ChangeLog
> 2015/12/10 Yoshinori Sato <ys...@users.sourceforge.jp>
>
> * config/rx/constraints.md: Add constraint "q".
> * doc/md.texi: Likewise.
> * config/rx/rx-opts.h(rx_cpu_types): Add type RXV2.
> * config/rx/rx.c(rx_print_operand): Add a0, a1 and extb.
> (rx_expand_prologue): Use v2 instraction.
> (rx_expand_epilogue): Likewise.
> (rx_builtin): Add v2 instruction.
> (rx_expand_builtin): Likewise.
> (rx_expand_builtin_mac): 3 operand support.
> (rx_expand_int_builtin_1_arg): Likewise.
> (rx_expand_int_builtin_0_arg): Delete.
> (rx_expand_builtin_mac2): New function.
> (rx_expand_builtin_fromacc): Likewise.
> (rx_expand_builtin_fromacc2): Likewise.
> (rx_expand_builtin_toacc): Likewise.
> (rx_expand_builtin_toacc2): Likewise.
> (rx_expand_builtin_rac): Likewise.
> * config/rx/rx.h(TARGET_CPU_CPP_BUILTINS): Add v2 define.
> (ALLOW_RXV2_INSNS): New.
> * config/rx/rx.md(constants): Add new builtin enum.
> (addsf3): 3 operands support.
> (mulsf3): Likewise.
> (subsf3): Likewise.
> (fixuns_truncsfsi2): New.
> (floatunssisf2): Likewise.
> (sqrtsf2): Likewise.
> (machi): 3 operands support.
> (maclo): Likewise.
> (mulhi): Likewise.
> (mullo): Likewise.
> (mvfachi): Likewise.
> (mvfacmi): Likewise.
> (mvtachi): Likewise.
> (mvtaclo): Likewise.
> (racw): Likewise.
> (mvfacgu): New.
> (mvfaclo): Likewise.
> (racl): Likewise.
> (rdacl): Likewise.
> (rdacw): Likewise.
> (emaca): Likewise.
> (emsba): Likewise.
> (maclh): Likewise.
> (msbhi): Likewise.
> (msblo): Likewise.
> (msblh): Likewise.
> * config/rx/sync.md: New file.
> * config/rx/rx.opt: Add rxv2 for mcpu option.
> * config/rx/t-rx: Add v2 for multilib
>
> ---
> gcc/config/rx/constraints.md | 7 +
> gcc/config/rx/rx-opts.h | 3 +-
> gcc/config/rx/rx.c | 425
> +--
> gcc/config/rx/rx.h | 7 +
> gcc/config/rx/rx.md | 363 +---
> gcc/config/rx/rx.opt | 3 +
> gcc/config/rx/sync.md| 191 +++
> gcc/config/rx/t-rx | 2 +
> gcc/doc/md.texi | 2 +
> 9 files changed, 915 insertions(+), 88 deletions(-)
> create mode 100644 gcc/config/rx/sync.md
>
> diff --git a/gcc/config/rx/constraints.md b/gcc/config/rx/constraints.md
> index b41c232..e388350 100644
> --- a/gcc/config/rx/constraints.md
> +++ b/gcc/config/rx/constraints.md
> @@ -106,3 +106,10 @@
> )
>)
> )
> +
> +(define_memory_constraint "q"
> + "A MEM which only uses REG addressing."
> + (and (match_code "mem")
> +(match_code "reg" "0")
> + )
> +)
> diff --git a/gcc/config/rx/rx-opts.h b/gcc/config/rx/rx-opts.h
> index fa83e91..52d4dce 100644
> --- a/gcc/config/rx/rx-opts.h
> +++ b/gcc/config/rx/rx-opts.h
> @@ -25,7 +25,8 @@ enum rx_cpu_types
>RX600,
>RX610,
>RX200,
> - RX100
> + RX100,
> + RXV2
> };
>
> #endif
> diff --git a/gcc/config/rx/rx.c b/gcc/config/rx/rx.c
> index 781b6b1..7b35308 100644
> --- a/gcc/config/rx/rx.c
> +++ b/gcc/config/rx/rx.c
> @@ -639,6 +639,19 @@ rx_print_operand (FILE * file, rtx op, int letter)
> case 0xa: fprintf (file, "isp"); break;
> case 0xb: fprintf (file, "fintv"); break;
> case 0xc: fprintf (file, "intb"); break;
> + case 0xd:
> + if (ALLOW_RXV2_INSNS)
> + {
> + fprintf (file, "extb"); break;
> + }
> + goto invalid_register;
> + case 0x40:
> + case 0x41:
> + if (ALLOW_RXV2_INSNS)
> + {
> + fprintf (file, "a%ld", INTVAL(op) - 0x40); break;
> + } /* RXv1 fall through */
> + invalid_register:
> default:
> warning (0, "unrecognized control register number: %d - using 'psw'",
> (int) INTVAL (op));
> @@ -731,6 +744,11 @@ rx_print_operand (FILE * file, rtx op, int letter)
>fprintf (file, "%s", reg_names [rx_pid_base_regnum ()]);
>break;
>
> +case 'V':
> + gcc_assert (CONST_INT_P (op));
> + fprintf (file, "a%ld", INTVAL(op));
> + break;
>
[PATCH][RX] v2 instructions support.
Add RX v2 enhancement instructions support.
gcc/ChangeLog
2015/12/10 Yoshinori Sato <ys...@users.sourceforge.jp>
* config/rx/constraints.md: Add constraint "q".
* doc/md.texi: Likewise.
* config/rx/rx-opts.h(rx_cpu_types): Add type RXV2.
* config/rx/rx.c(rx_print_operand): Add a0, a1 and extb.
(rx_expand_prologue): Use v2 instraction.
(rx_expand_epilogue): Likewise.
(rx_builtin): Add v2 instruction.
(rx_expand_builtin): Likewise.
(rx_expand_builtin_mac): 3 operand support.
(rx_expand_int_builtin_1_arg): Likewise.
(rx_expand_int_builtin_0_arg): Delete.
(rx_expand_builtin_mac2): New function.
(rx_expand_builtin_fromacc): Likewise.
(rx_expand_builtin_fromacc2): Likewise.
(rx_expand_builtin_toacc): Likewise.
(rx_expand_builtin_toacc2): Likewise.
(rx_expand_builtin_rac): Likewise.
* config/rx/rx.h(TARGET_CPU_CPP_BUILTINS): Add v2 define.
(ALLOW_RXV2_INSNS): New.
* config/rx/rx.md(constants): Add new builtin enum.
(addsf3): 3 operands support.
(mulsf3): Likewise.
(subsf3): Likewise.
(fixuns_truncsfsi2): New.
(floatunssisf2): Likewise.
(sqrtsf2): Likewise.
(machi): 3 operands support.
(maclo): Likewise.
(mulhi): Likewise.
(mullo): Likewise.
(mvfachi): Likewise.
(mvfacmi): Likewise.
(mvtachi): Likewise.
(mvtaclo): Likewise.
(racw): Likewise.
(mvfacgu): New.
(mvfaclo): Likewise.
(racl): Likewise.
(rdacl): Likewise.
(rdacw): Likewise.
(emaca): Likewise.
(emsba): Likewise.
(maclh): Likewise.
(msbhi): Likewise.
(msblo): Likewise.
(msblh): Likewise.
* config/rx/sync.md: New file.
* config/rx/rx.opt: Add rxv2 for mcpu option.
* config/rx/t-rx: Add v2 for multilib
---
gcc/config/rx/constraints.md | 7 +
gcc/config/rx/rx-opts.h | 3 +-
gcc/config/rx/rx.c | 425 +--
gcc/config/rx/rx.h | 7 +
gcc/config/rx/rx.md | 363 +---
gcc/config/rx/rx.opt | 3 +
gcc/config/rx/sync.md| 191 +++
gcc/config/rx/t-rx | 2 +
gcc/doc/md.texi | 2 +
9 files changed, 915 insertions(+), 88 deletions(-)
create mode 100644 gcc/config/rx/sync.md
diff --git a/gcc/config/rx/constraints.md b/gcc/config/rx/constraints.md
index b41c232..e388350 100644
--- a/gcc/config/rx/constraints.md
+++ b/gcc/config/rx/constraints.md
@@ -106,3 +106,10 @@
)
)
)
+
+(define_memory_constraint "q"
+ "A MEM which only uses REG addressing."
+ (and (match_code "mem")
+(match_code "reg" "0")
+ )
+)
diff --git a/gcc/config/rx/rx-opts.h b/gcc/config/rx/rx-opts.h
index fa83e91..52d4dce 100644
--- a/gcc/config/rx/rx-opts.h
+++ b/gcc/config/rx/rx-opts.h
@@ -25,7 +25,8 @@ enum rx_cpu_types
RX600,
RX610,
RX200,
- RX100
+ RX100,
+ RXV2
};
#endif
diff --git a/gcc/config/rx/rx.c b/gcc/config/rx/rx.c
index 781b6b1..7b35308 100644
--- a/gcc/config/rx/rx.c
+++ b/gcc/config/rx/rx.c
@@ -639,6 +639,19 @@ rx_print_operand (FILE * file, rtx op, int letter)
case 0xa: fprintf (file, "isp"); break;
case 0xb: fprintf (file, "fintv"); break;
case 0xc: fprintf (file, "intb"); break;
+ case 0xd:
+ if (ALLOW_RXV2_INSNS)
+ {
+ fprintf (file, "extb"); break;
+ }
+ goto invalid_register;
+ case 0x40:
+ case 0x41:
+ if (ALLOW_RXV2_INSNS)
+ {
+ fprintf (file, "a%ld", INTVAL(op) - 0x40); break;
+ } /* RXv1 fall through */
+ invalid_register:
default:
warning (0, "unrecognized control register number: %d - using 'psw'",
(int) INTVAL (op));
@@ -731,6 +744,11 @@ rx_print_operand (FILE * file, rtx op, int letter)
fprintf (file, "%s", reg_names [rx_pid_base_regnum ()]);
break;
+case 'V':
+ gcc_assert (CONST_INT_P (op));
+ fprintf (file, "a%ld", INTVAL(op));
+ break;
+
case 'R':
gcc_assert (GET_MODE_SIZE (GET_MODE (op)) <= 4);
unsigned_load = true;
@@ -1772,12 +1790,32 @@ rx_expand_prologue (void)
/* We have assumed that there are at least two registers pushed... */
gcc_assert (acc_high != 0);
- /* Note - the bottom 16 bits of the accumulator are inaccessible.
-We just assume that they are zero. */
- emit_insn (gen_mvfacmi (gen_rtx_REG (SImode, acc_low)));
- emit_insn (gen_mvfachi (gen_rtx_REG (SImode, acc_high)));
- emit_insn (gen_stack_push (gen_rtx_REG (SImode, ac
Re: [PATCH] Add new target h8300-*-linux
Updated.
Some cleanup.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a73cef67..b7dac9b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2015-04-26 Yoshinori Sato ys...@users.sourceforge.jp
+
+ * config.gcc: Add h8300-*-linux.
+ * config/h8300/linux.h: Likewise.
+ * config/h8300/t-linux: Likewise.
+ * config/h8300/h8300.c (h8300_option_override): normal mode
+ not support for h8300-*-linux.
+ (h8300_file_start): target priority change.
+ (get_shift_alg): Likewise.
+ (h8300_shift_need_scratch_p): Likewise.
+ * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
+ * config/h8300/h8300.md (define_peephole2): Remove duplicate condition.
+
2015-04-24 Steve Ellcey sell...@imgtec.com
* config/mips/mips.md: (*madd4mode) Remove accum_in attribute.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index a1df043..5c48cd0 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1218,6 +1218,10 @@ h8300-*-elf*)
tmake_file=h8300/t-h8300
tm_file=h8300/h8300.h dbxelf.h elfos.h newlib-stdint.h h8300/elf.h
;;
+h8300-*-linux*)
+ tmake_file=${tmake_file} h8300/t-h8300 h8300/t-linux
+ tm_file=h8300/h8300.h dbxelf.h elfos.h gnu-user.h linux.h
glibc-stdint.h h8300/linux.h
+ ;;
hppa*64*-*-linux*)
target_cpu_default=MASK_PA_11|MASK_PA_20
tm_file=pa/pa64-start.h ${tm_file} dbxelf.h elfos.h gnu-user.h linux.h
\
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index 4e9110e..00087f3 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -406,6 +406,14 @@ h8300_option_override (void)
- Option ignored!);
}
+#ifdef H8300_LINUX
+ if ((TARGET_NORMAL_MODE))
+ {
+ error (-mn is not supported for linux targets);
+ target_flags ^= MASK_NORMAL_MODE;
+ }
+#endif
+
/* Some of the shifts are optimized for speed by default.
See http://gcc.gnu.org/ml/gcc-patches/2002-07/msg01858.html
If optimizing for size, change shift_alg for those shift to
@@ -1006,12 +1014,12 @@ h8300_file_start (void)
{
default_file_start ();
- if (TARGET_H8300H)
-fputs (TARGET_NORMAL_MODE ? \t.h8300hn\n : \t.h8300h\n, asm_out_file);
- else if (TARGET_H8300SX)
+ if (TARGET_H8300SX)
fputs (TARGET_NORMAL_MODE ? \t.h8300sxn\n : \t.h8300sx\n,
asm_out_file);
else if (TARGET_H8300S)
fputs (TARGET_NORMAL_MODE ? \t.h8300sn\n : \t.h8300s\n, asm_out_file);
+ else if (TARGET_H8300H)
+fputs (TARGET_NORMAL_MODE ? \t.h8300hn\n : \t.h8300h\n, asm_out_file);
}
/* Output assembly language code for the end of file. */
@@ -4094,10 +4102,10 @@ get_shift_alg (enum shift_type shift_type, enum
shift_mode shift_mode,
/* Find the target CPU. */
if (TARGET_H8300)
cpu = H8_300;
- else if (TARGET_H8300H)
-cpu = H8_300H;
- else
+ else if (TARGET_H8300S)
cpu = H8_S;
+ else
+cpu = H8_300H;
/* Find the shift algorithm. */
info-alg = SHIFT_LOOP;
@@ -4540,10 +4548,10 @@ h8300_shift_needs_scratch_p (int count, machine_mode
mode)
/* Find out the target CPU. */
if (TARGET_H8300)
cpu = H8_300;
- else if (TARGET_H8300H)
-cpu = H8_300H;
- else
+ else if (TARGET_H8300S)
cpu = H8_S;
+ else
+cpu = H8_300H;
/* Find the shift algorithm. */
switch (mode)
diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h
index 2a47aa8..86fd7d1 100644
--- a/gcc/config/h8300/h8300.h
+++ b/gcc/config/h8300/h8300.h
@@ -39,29 +39,29 @@ extern const char * const *h8_reg_names;
#define TARGET_CPU_CPP_BUILTINS() \
do \
{ \
- if (TARGET_H8300H) \
+ if (TARGET_H8300SX) \
{ \
- builtin_define (__H8300H__);\
- builtin_assert (cpu=h8300h);\
- builtin_assert (machine=h8300h);\
+ builtin_define (__H8300SX__); \
if (TARGET_NORMAL_MODE) \
{ \
builtin_define (__NORMAL_MODE__); \
} \
} \
- else if (TARGET_H8300SX) \
+ else if (TARGET_H8300S) \
{ \
- builtin_define (__H8300SX__); \
+ builtin_define (__H8300S__);\
+ builtin_assert (cpu=h8300s);\
+ builtin_assert (machine=h8300s);\
if (TARGET_NORMAL_MODE) \
{ \
builtin_define (__NORMAL_MODE__
Re: [PATCH] Add new target h8300-*-linux
At Mon, 20 Apr 2015 09:26:21 -0600,
Jeff Law wrote:
On 04/19/2015 10:51 PM, Yoshinori Sato wrote:
+ if (TARGET_H8300H (TARGET_H8300S || TARGET_H8300SX))
+{
+ target_flags ^= MASK_H8300H;
+}
I'm a bit concerned by this. Why did you need to make this change?
The flag is exclusion, but it's set both.
Hmmm, IIRC the port has many places where it may assume that H8300H is
set for H8300S/H8300SX. I did a very quick audit and saw:
I think it's being broken by my changes, so it's checked.
I would recommend reviewing the extzv_16_8 pattern which has the
condition TARGET_H8300H and changing the condition to
TARGET_H8300H || TARGET_H8300S since AFAICT that pattern should
work on both processor variants.
Similarly there's two peephole patterns have have conditions that
looks like this:
(TARGET_H8300H || TARGET_H8300S)
peep2_reg_dead_p (1, operands[0])
((TARGET_H8300H INTVAL (operands[1]) == 3)
|| INTVAL (operands[1]) == 7
|| INTVAL (operands[1]) == 15
|| INTVAL (operands[1]) == 31
|| INTVAL (operands[1]) == 63
|| INTVAL (operands[1]) == 127
|| INTVAL (operands[1]) == 255)
I'm pretty sure the second TARGET_H8300H should be (TARGET_H8300H ||
TARGET_H8300S).
OK.
In h8300.c::get_shift_alg, case HIshift, count 14, does this need to change?
It loock unnecessary.
Remove it.
else if (TARGET_H8300H)
{
info-special =
shll.b\t%t0\n\tsubx.b\t%s0,%s0\n\tshll.b\t%t0\n\trotxl.b\t%s0\n\texts.w\t%T0;
info-cc_special = CC_SET_ZNV;
}
else /* TARGET_H8300S */
gcc_unreachable ();
Similarly SImode shifts by 28-30 bits should be reviewed in a similar
manner. As should the implementation of h8300_shift_needs_scratch_p.
output_a_rotate also needs to be reviewed if you want to make the
change to turn off H8300H when H8/S is true. Similarly for
compute_a_rotate_length.
The one put in by an experiment was left.
Removed.
There may be others, these are what I found with a very quick
search. If there's not a compelling reason to make the change, I'd
recommend against it.
OK.
I will fix and resent.
Jeff
--
Yoshinori Sato
ys...@users.sourceforge.jp
Re: [PATCH] Add new target h8300-*-linux
At Fri, 17 Apr 2015 10:53:51 -0600,
Jeff Law wrote:
On 03/05/2015 09:50 AM, Yoshinori Sato wrote:
Add h8300-*-linux target for h8300 linux kernel and userland.
h8300-*-elf is some difference of standard elf.
h8300-*-linux is compatible of standard elf rules.
Thanks.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cfacea1..fc5101c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2015-03-06 Yoshinori Sato ys...@users.sourceforge.jp
+
+ * config.gcc: Add h8300-*-linux
+ * config/h8300/h8300.c (h8300_option_override):
+ Exclusive -mh vs -ms/-msx
+ (h8300_file_start): Target priority -msx -ms -mh
+ * config/h8300/linux.h: New file.
+ * config/h8300/t-linux: Likewise.
Mostly OK. Two minor issues/questions that need to be addressed, then
this ought to be able to be committed to the trunk.
OK.
+ if (TARGET_H8300H (TARGET_H8300S || TARGET_H8300SX))
+{
+ target_flags ^= MASK_H8300H;
+}
I'm a bit concerned by this. Why did you need to make this change?
The flag is exclusion, but it's set both.
+#undef LINK_SPEC
+#define LINK_SPEC %{mh:%{!mn:-m h8300helf_linux}} %{ms:%{!mn:-m
h8300self_linux}}
Presumably you don't need to support normal mode or the older H8/300
processor. Does that allow you to simplify LINK_SPEC at all?
OK.
I will cleanup.
I'm going to assume the sfp-machine.h contents are correct.
You did file a copyright form with the FSF, right (I believe I asked
before, but I don't recall the result).
Yes.
gnu.org #976270
Jeff
--
Yoshinori Sato
ys...@users.sourceforge.jp
[PATCH][RX] Add RXv2 instructions
Several instructions were added to the RXv2 (RX64M and RX71M) CPU.
http://documentation.renesas.com/doc/products/mpumcu/doc/rx_family/r01us0071ej0100_rxv2sm.pdf
This patch is supported new instruction for RX target.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d5d3aaa..437d9cc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,43 @@
+2015-0404 Yoshinori Sato ys...@users.sourceforge.jp
+
+ * config/rx/rx.opt (rx_cpu_types): Add RXv2.
+ * config/rx/rx-opts.h (rx_cpu_types): Likewise.
+ * config/rx/t-rx: Add rxv2 option.
+ * config/rx/rx.c (rx_print_operand): Add RXv2 registers.
+ (rx_expand_prologue): Add accumlator address.
+ (rx_expand_epilogue): Likewise.
+ (rx_expand_int_builtin_1_arg): Likwise.
+ (rx_expand_builtin_mac): Likewise.
+ (rx_builtin): Add new builtins.
+ (rx_init_builtins): Likewise.
+ (rx_expand_builtin): Likewise.
+ (rx_expand_builtin_mac2): New function.
+ (rx_expand_builtin_fromacc): Likewise.
+ (rx_expand_builtin_fromacc2): Likewise.
+ (rx_expand_builtin_toacc): Likewise.
+ (rx_expand_builtin_toacc2): Likewise.
+ (rx_expand_builtin_rac): Likewise.
+ * config/rx/rx.h (TARGET_CPU_CPP_BUILTINS): Add RXv2.
+ (ALLOW_RXV2_INSNS): New.
+ * config/rx/rx.md (R1_REG, UNSPEC_BUILTIN_MOVCO): New.
+ (UNSPEC_BUILTIN_MOVLI, UNSPEC_BUILTIN_EMACA): Likewise.
+ (UNSPEC_BUILTIN_EMSBA, UNSPEC_BUILTIN_MACLH): Likewise.
+ (UNSPEC_BUILTIN_MSBHI, UNSPEC_BUILTIN_MSBLO): Likewise.
+ (UNSPEC_BUILTIN_MSBLH, UNSPEC_BUILTIN_MVFACGU): Likewise.
+ (UNSPEC_BUILTIN_MVFACLO, UNSPEC_BUILTIN_MVTACGU): Likewise.
+ (UNSPEC_BUILTIN_RACL, UNSPEC_BUILTIN_RDACL): Likewise.
+ (UNSPEC_BUILTIN_RDACW): Likewise.
+ (addsf3, mulsf3, subsf3, machi, mulhi, mullo): Add RXv2 pattern.
+ (mvfachi, mvfacmi, mvtaclo, racw): Likewise.
+ (addsf3_rx, addsf_rxv2, mulsf_rx, mulsf_rxv2): New.
+ (subsf3_rx, subsf_rxv2, fixuns_truncsfsi2): Likewise.
+ (floatunssisf2, sqrtsf2, mvfacgu, mvfaclo): Likewise.
+ (racl, rdacl, rdacw, emaca, emsba, maclh): Likewise.
+ (msbhi, msblo, msblh): Likewise.
+ * config/rx/constraints.md: (define_memory_constraint q):
+ New constraint.
+ * config/rx/sync.md: New.
+
2015-04-04 Richard Biener rguent...@suse.de
PR tree-optimization/64909
diff --git a/gcc/config/rx/constraints.md b/gcc/config/rx/constraints.md
index d46f9da..ccfe3a0 100644
--- a/gcc/config/rx/constraints.md
+++ b/gcc/config/rx/constraints.md
@@ -106,3 +106,10 @@
)
)
)
+
+(define_memory_constraint q
+ A MEM which only uses REG addressing.
+ (and (match_code mem)
+(match_code reg 0)
+ )
+)
diff --git a/gcc/config/rx/rx-opts.h b/gcc/config/rx/rx-opts.h
index fa83e91..52d4dce 100644
--- a/gcc/config/rx/rx-opts.h
+++ b/gcc/config/rx/rx-opts.h
@@ -25,7 +25,8 @@ enum rx_cpu_types
RX600,
RX610,
RX200,
- RX100
+ RX100,
+ RXV2
};
#endif
diff --git a/gcc/config/rx/rx.c b/gcc/config/rx/rx.c
index 6fe21aa..92247c2 100644
--- a/gcc/config/rx/rx.c
+++ b/gcc/config/rx/rx.c
@@ -673,6 +673,19 @@ rx_print_operand (FILE * file, rtx op, int letter)
case 0xa: fprintf (file, isp); break;
case 0xb: fprintf (file, fintv); break;
case 0xc: fprintf (file, intb); break;
+ case 0xd:
+ if (ALLOW_RXV2_INSNS)
+ {
+ fprintf (file, extb); break;
+ }
+ goto invalid_register;
+ case 0x40:
+ case 0x41:
+ if (ALLOW_RXV2_INSNS)
+ {
+ fprintf (file, a%ld, INTVAL(op) - 0x40); break;
+ } /* RXv1 fall through */
+ invalid_register:
default:
warning (0, unrecognized control register number: %d - using 'psw',
(int) INTVAL (op));
@@ -765,6 +778,11 @@ rx_print_operand (FILE * file, rtx op, int letter)
fprintf (file, %s, reg_names [rx_pid_base_regnum ()]);
break;
+case 'V':
+ gcc_assert (CONST_INT_P (op));
+ fprintf (file, a%ld, INTVAL(op));
+ break;
+
case 'R':
gcc_assert (GET_MODE_SIZE (GET_MODE (op)) = 4);
unsigned_load = true;
@@ -829,7 +847,6 @@ rx_print_operand (FILE * file, rtx op, int letter)
}
break;
}
-
/* Fall through. */
default:
@@ -1788,10 +1805,15 @@ rx_expand_prologue (void)
/* Note - the bottom 16 bits of the accumulator are inaccessible.
We just assume that they are zero. */
- emit_insn (gen_mvfacmi (gen_rtx_REG (SImode, acc_low)));
- emit_insn (gen_mvfachi (gen_rtx_REG (SImode, acc_high)));
- emit_insn (gen_stack_push (gen_rtx_REG (SImode, acc_low)));
- emit_insn (gen_stack_push (gen_rtx_REG (SImode, acc_high)));
+ if (!ALLOW_RXV2_INSNS)
+ {
+ emit_insn ( gen_mvfacmi (
+gen_rtx_REG (SImode, acc_low), GEN_INT(0),
GEN_INT(64
Re: [PATCH] Add new target h8300-*-linux
Ping
At Fri, 06 Mar 2015 01:50:34 +0900,
Yoshinori Sato wrote:
Add h8300-*-linux target for h8300 linux kernel and userland.
h8300-*-elf is some difference of standard elf.
h8300-*-linux is compatible of standard elf rules.
Thanks.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cfacea1..fc5101c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2015-03-06 Yoshinori Sato ys...@users.sourceforge.jp
+
+ * config.gcc: Add h8300-*-linux
+ * config/h8300/h8300.c (h8300_option_override):
+ Exclusive -mh vs -ms/-msx
+ (h8300_file_start): Target priority -msx -ms -mh
+ * config/h8300/linux.h: New file.
+ * config/h8300/t-linux: Likewise.
+
2015-03-05 Martin Liska mli...@suse.cz
* ipa-inline.c (inline_small_functions): Set default value to
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 483c672..975f3f6 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1211,6 +1211,10 @@ h8300-*-elf*)
tmake_file=h8300/t-h8300
tm_file=h8300/h8300.h dbxelf.h elfos.h newlib-stdint.h h8300/elf.h
;;
+h8300-*-linux*)
+ tmake_file=${tmake_file} h8300/t-h8300 h8300/t-linux
+ tm_file=h8300/h8300.h dbxelf.h elfos.h gnu-user.h linux.h
glibc-stdint.h h8300/linux.h
+ ;;
hppa*64*-*-linux*)
target_cpu_default=MASK_PA_11|MASK_PA_20
tm_file=pa/pa64-start.h ${tm_file} dbxelf.h elfos.h gnu-user.h linux.h
\
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index 4e9110e..9862b7e 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -370,6 +370,11 @@ h8300_option_override (void)
h8_pop_op = h8_pop_ops[cpu_type];
h8_mov_op = h8_mov_ops[cpu_type];
+ if (TARGET_H8300H (TARGET_H8300S || TARGET_H8300SX))
+{
+ target_flags ^= MASK_H8300H;
+}
+
if (!TARGET_H8300S TARGET_MAC)
{
error (-ms2600 is used without -ms);
@@ -1006,12 +1011,12 @@ h8300_file_start (void)
{
default_file_start ();
- if (TARGET_H8300H)
-fputs (TARGET_NORMAL_MODE ? \t.h8300hn\n : \t.h8300h\n,
asm_out_file);
- else if (TARGET_H8300SX)
+ if (TARGET_H8300SX)
fputs (TARGET_NORMAL_MODE ? \t.h8300sxn\n : \t.h8300sx\n,
asm_out_file);
else if (TARGET_H8300S)
fputs (TARGET_NORMAL_MODE ? \t.h8300sn\n : \t.h8300s\n,
asm_out_file);
+ else if (TARGET_H8300H)
+fputs (TARGET_NORMAL_MODE ? \t.h8300hn\n : \t.h8300h\n,
asm_out_file);
}
/* Output assembly language code for the end of file. */
diff --git a/gcc/config/h8300/linux.h b/gcc/config/h8300/linux.h
new file mode 100644
index 000..995d320
--- /dev/null
+++ b/gcc/config/h8300/linux.h
@@ -0,0 +1,47 @@
+/* Definitions of target machine for GNU compiler.
+ Renesas H8/300 (linux variant)
+ Copyright (C) 2015
+ Free Software Foundation, Inc.
+ Contributed by Yoshinori Sato ys...@users.sourceforge.jp
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+http://www.gnu.org/licenses/. */
+
+#ifndef GCC_H8300_LINUX_H
+#define GCC_H8300_LINUX_H
+
+#define TARGET_OS_CPP_BUILTINS() \
+ do \
+{\
+ GNU_USER_TARGET_OS_CPP_BUILTINS(); \
+}\
+ while (0)
+
+#undef LINK_SPEC
+#define LINK_SPEC %{mh:%{!mn:-m h8300helf_linux}} %{ms:%{!mn:-m
h8300self_linux}}
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_QUICKCALL | MASK_INT32 | MASK_H8300H)
+
+/* Width of a word, in units (bytes). */
+#undef DOUBLE_TYPE_SIZE
+#define DOUBLE_TYPE_SIZE 64
+
+#undef DEFAULT_SIGNED_CHAR
+#define DEFAULT_SIGNED_CHAR 1
+
+#undef USER_LABEL_PREFIX
+#endif /* ! GCC_H8300_LINUX_H */
diff --git a/gcc/config/h8300/t-linux b/gcc/config/h8300/t-linux
new file mode 100644
index 000..11237ea
--- /dev/null
+++ b/gcc/config/h8300/t-linux
@@ -0,0 +1,20 @@
+# Copyright (C) 2015 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS
Re: sh-*-linux build failure
At Sun, 08 Mar 2015 23:14:10 +0900 (JST), Kaz Kojima wrote: Oleg Endo oleg.e...@t-online.de wrote: diff --git a/gcc/config/sh/t-linux b/gcc/config/sh/t-linux index d33c638..22b8e3e 100644 --- a/gcc/config/sh/t-linux +++ b/gcc/config/sh/t-linux @@ -1,2 +1,3 @@ MULTILIB_DIRNAMES= -MULTILIB_MATCHES = +MULTILIB_MATCHES = +MULTILIB_EXCEPTIONS = m2a m2a/ml This disables SH2A completely? AFAIK SH2A big-endian Linux is a valid configuration. It should be 'm2a/ml' only, as in t-sh. Although all of that will probably not work if --with-endian=little,big or --with-endian=little is specified as configure option. How about a bit modified patch below? Regards, kaz -- * config/sh/t-linux (MULTILIB_EXCEPTIONS): Define for m2a cases. diff --git a/config/sh/t-linux b/config/sh/t-linux index d33c638..a30ab2e 100644 --- a/config/sh/t-linux +++ b/config/sh/t-linux @@ -1,2 +1,9 @@ MULTILIB_DIRNAMES= MULTILIB_MATCHES = + +DEFAULT_ENDIAN = $(word 1,$(TM_ENDIAN_CONFIG)) +ifeq ($(DEFAULT_ENDIAN),ml) +MULTILIB_EXCEPTIONS = m2a m2a/ml +else +MULTILIB_EXCEPTIONS = ml/m2a +endif It works fine. Thanks. -- Yoshinori Sato ys...@users.sourceforge.jp
sh-*-linux build failure
Bootstrap failed in following configuration. configure --target=sh-unknown-linux --enable-languages=c --disable-libatomic --disable-threads --disable-shared --disable-libssp --disable-libquadmath --disable-libgomp xgcc: error: SH2a does not support little-endian So add build exception for SH2A. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ce183a0..1fb2344 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2015-03-08 Yoshinori Sato ys...@users.sourceforge.jp + + * config/sh/t-linux: Add exception for SH2A. + 2015-03-05 Jan Hubicka hubi...@ucw.cz PR ipa/65316 diff --git a/gcc/config/sh/t-linux b/gcc/config/sh/t-linux index d33c638..22b8e3e 100644 --- a/gcc/config/sh/t-linux +++ b/gcc/config/sh/t-linux @@ -1,2 +1,3 @@ MULTILIB_DIRNAMES= -MULTILIB_MATCHES = +MULTILIB_MATCHES = +MULTILIB_EXCEPTIONS = m2a m2a/ml -- Yoshinori Sato ys...@users.sourceforge.jp
[PATCH] Add new target h8300-*-linux
Add h8300-*-linux target for h8300 linux kernel and userland.
h8300-*-elf is some difference of standard elf.
h8300-*-linux is compatible of standard elf rules.
Thanks.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cfacea1..fc5101c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2015-03-06 Yoshinori Sato ys...@users.sourceforge.jp
+
+ * config.gcc: Add h8300-*-linux
+ * config/h8300/h8300.c (h8300_option_override):
+ Exclusive -mh vs -ms/-msx
+ (h8300_file_start): Target priority -msx -ms -mh
+ * config/h8300/linux.h: New file.
+ * config/h8300/t-linux: Likewise.
+
2015-03-05 Martin Liska mli...@suse.cz
* ipa-inline.c (inline_small_functions): Set default value to
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 483c672..975f3f6 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1211,6 +1211,10 @@ h8300-*-elf*)
tmake_file=h8300/t-h8300
tm_file=h8300/h8300.h dbxelf.h elfos.h newlib-stdint.h h8300/elf.h
;;
+h8300-*-linux*)
+ tmake_file=${tmake_file} h8300/t-h8300 h8300/t-linux
+ tm_file=h8300/h8300.h dbxelf.h elfos.h gnu-user.h linux.h
glibc-stdint.h h8300/linux.h
+ ;;
hppa*64*-*-linux*)
target_cpu_default=MASK_PA_11|MASK_PA_20
tm_file=pa/pa64-start.h ${tm_file} dbxelf.h elfos.h gnu-user.h linux.h
\
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index 4e9110e..9862b7e 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -370,6 +370,11 @@ h8300_option_override (void)
h8_pop_op = h8_pop_ops[cpu_type];
h8_mov_op = h8_mov_ops[cpu_type];
+ if (TARGET_H8300H (TARGET_H8300S || TARGET_H8300SX))
+{
+ target_flags ^= MASK_H8300H;
+}
+
if (!TARGET_H8300S TARGET_MAC)
{
error (-ms2600 is used without -ms);
@@ -1006,12 +1011,12 @@ h8300_file_start (void)
{
default_file_start ();
- if (TARGET_H8300H)
-fputs (TARGET_NORMAL_MODE ? \t.h8300hn\n : \t.h8300h\n, asm_out_file);
- else if (TARGET_H8300SX)
+ if (TARGET_H8300SX)
fputs (TARGET_NORMAL_MODE ? \t.h8300sxn\n : \t.h8300sx\n,
asm_out_file);
else if (TARGET_H8300S)
fputs (TARGET_NORMAL_MODE ? \t.h8300sn\n : \t.h8300s\n, asm_out_file);
+ else if (TARGET_H8300H)
+fputs (TARGET_NORMAL_MODE ? \t.h8300hn\n : \t.h8300h\n, asm_out_file);
}
/* Output assembly language code for the end of file. */
diff --git a/gcc/config/h8300/linux.h b/gcc/config/h8300/linux.h
new file mode 100644
index 000..995d320
--- /dev/null
+++ b/gcc/config/h8300/linux.h
@@ -0,0 +1,47 @@
+/* Definitions of target machine for GNU compiler.
+ Renesas H8/300 (linux variant)
+ Copyright (C) 2015
+ Free Software Foundation, Inc.
+ Contributed by Yoshinori Sato ys...@users.sourceforge.jp
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+http://www.gnu.org/licenses/. */
+
+#ifndef GCC_H8300_LINUX_H
+#define GCC_H8300_LINUX_H
+
+#define TARGET_OS_CPP_BUILTINS() \
+ do \
+{ \
+ GNU_USER_TARGET_OS_CPP_BUILTINS(); \
+} \
+ while (0)
+
+#undef LINK_SPEC
+#define LINK_SPEC %{mh:%{!mn:-m h8300helf_linux}} %{ms:%{!mn:-m
h8300self_linux}}
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_QUICKCALL | MASK_INT32 | MASK_H8300H)
+
+/* Width of a word, in units (bytes). */
+#undef DOUBLE_TYPE_SIZE
+#define DOUBLE_TYPE_SIZE 64
+
+#undef DEFAULT_SIGNED_CHAR
+#define DEFAULT_SIGNED_CHAR 1
+
+#undef USER_LABEL_PREFIX
+#endif /* ! GCC_H8300_LINUX_H */
diff --git a/gcc/config/h8300/t-linux b/gcc/config/h8300/t-linux
new file mode 100644
index 000..11237ea
--- /dev/null
+++ b/gcc/config/h8300/t-linux
@@ -0,0 +1,20 @@
+# Copyright (C) 2015 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3
Re: [PATCH] Add new target h8300-*-linux
At Sun, 1 Feb 2015 00:39:08 +, Joseph Myers wrote: On Sat, 31 Jan 2015, Yoshinori Sato wrote: + * config/h8300/linux.h: New file. + * config/h8300/t-linux: New file. These files don't appear to be included in the patch. I'll resend it. +h8300-*-linux*) + tmake_file=t-linux h8300/t-linux t-fpbit + tm_file=$tm_file h8300/h8300-lib.h + ;; Is there a good reason for using fp-bit instead of soft-fp here? No. it copied from h8300-elf. -- Joseph S. Myers jos...@codesourcery.com -- Yoshinori Sato ys...@users.sourceforge.jp
Re: [PATCH] Add new target h8300-*-linux
Updated.
copyright assignment process in progress.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0e1e8bb..5fd857c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2015-01-31 Yoshinori Sato ys...@users.sourceforge.jp
+
+ * config.gcc: Add target h8300-linux.
+ * config/h8300/linux.h: New file.
+ * config/h8300/t-linux: New file.
+ * config/h8300/h8300.c (h8300_option_override): Force clear H8300H
+ flag on H8300S or H8300SX mode.
+
2015-01-30 Vladimir Makarov vmaka...@redhat.com
PR target/64688
diff --git a/gcc/config.gcc b/gcc/config.gcc
index abd915e..40e86e0 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1213,6 +1213,10 @@ h8300-*-elf*)
tmake_file=h8300/t-h8300
tm_file=h8300/h8300.h dbxelf.h elfos.h newlib-stdint.h h8300/elf.h
;;
+h8300-*-linux*)
+ tmake_file=${tmake_file} h8300/t-h8300 h8300/t-linux
+ tm_file=h8300/h8300.h dbxelf.h elfos.h gnu-user.h linux.h
glibc-stdint.h h8300/linux.h
+ ;;
hppa*64*-*-linux*)
target_cpu_default=MASK_PA_11|MASK_PA_20
tm_file=pa/pa64-start.h ${tm_file} dbxelf.h elfos.h gnu-user.h linux.h
\
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index 5968e55..dd133ca 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -406,6 +406,11 @@ h8300_option_override (void)
- Option ignored!);
}
+ if (TARGET_H8300S || TARGET_H8300SX)
+ {
+ target_flags = ~MASK_H8300H;
+ }
+
/* Some of the shifts are optimized for speed by default.
See http://gcc.gnu.org/ml/gcc-patches/2002-07/msg01858.html
If optimizing for size, change shift_alg for those shift to
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index 5600d56..fa5789b 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-01-31 Yoshinori Sato ys...@users.sourceforge.jp
+
+ * config.host: Add h8300-linux.
+ * config/h8300/t-linux: New file.
+ * config/h8300/lib1funcs.S: Add __USER_LABEL_PREFIX__ to label head.
+
2015-01-27 Caroline Tice cmt...@google.com
Committing VTV Cywin/Ming patch for Patrick Wollgast
diff --git a/libgcc/config.host b/libgcc/config.host
index 5baeae5..11adb31 100644
--- a/libgcc/config.host
+++ b/libgcc/config.host
@@ -487,6 +487,10 @@ h8300-*-elf*)
tm_file=$tm_file h8300/h8300-lib.h
extra_parts=$extra_parts crti.o crtn.o
;;
+h8300-*-linux*)
+ tmake_file=t-linux h8300/t-linux t-fpbit
+ tm_file=$tm_file h8300/h8300-lib.h
+ ;;
hppa*64*-*-linux*)
tmake_file=$tmake_file pa/t-linux pa/t-linux64
extra_parts=crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o
diff --git a/libgcc/config/h8300/lib1funcs.S b/libgcc/config/h8300/lib1funcs.S
index 36e7d53..24a74a9 100644
--- a/libgcc/config/h8300/lib1funcs.S
+++ b/libgcc/config/h8300/lib1funcs.S
@@ -84,6 +84,12 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If
not, see
#define A3Ee3
#endif
+#define CONCAT(A,B) A##B
+#define LABEL0(U,X)CONCAT(U,__##X)
+#define LABEL0_DEF(U,X)CONCAT(U,__##X##:)
+#define LABEL_DEF(X) LABEL0_DEF(__USER_LABEL_PREFIX__,X)
+#define LABEL(X) LABEL0(__USER_LABEL_PREFIX__,X)
+
#ifdef __H8300H__
#ifdef __NORMAL_MODE__
.h8300hn
@@ -111,8 +117,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively.
If not, see
#ifdef __H8300__
.section .text
.align 2
- .global ___cmpsi2
-___cmpsi2:
+ .global LABEL(cmpsi2)
+LABEL_DEF(cmpsi2)
cmp.w A0,A2
bne .L2
cmp.w A1,A3
@@ -137,8 +143,8 @@ ___cmpsi2:
#ifdef __H8300__
.section .text
.align 2
- .global ___ucmpsi2
-___ucmpsi2:
+ .global LABEL(ucmpsi2)
+LABEL_DEF(ucmpsi2)
cmp.w A0,A2
bne .L2
cmp.w A1,A3
@@ -207,10 +213,10 @@ _lab8:rts
; A0=A0/A1 signed
- .global ___divhi3
-___divhi3:
+ .global LABEL(divhi3)
+LABEL_DEF(divhi3)
bsr divnorm
- bsr ___udivhi3
+ bsr LABEL(udivhi3)
negans:btst#3,A2L ; should answer be negative ?
beq _lab4
not A0H ; yes, so make it so
@@ -220,18 +226,18 @@ _lab4:rts
; A0=A0%A1 signed
- .global ___modhi3
-___modhi3:
+ .global LABEL(modhi3)
+LABEL_DEF(modhi3)
bsr modnorm
- bsr ___udivhi3
+ bsr LABEL(udivhi3)
mov A3,A0
bra negans
; A0=A0%A1 unsigned
- .global ___umodhi3
-___umodhi3:
- bsr ___udivhi3
+ .global LABEL(umodhi3)
+LABEL_DEF(umodhi3)
+ bsr LABEL(udivhi3)
mov A3,A0
rts
@@ -251,8 +257,8 @@ ___umodhi3:
; The H8/300 only has a 16/8 bit divide, so we look at the incoming and
; see how to partition up the expression.
- .global ___udivhi3
-___udivhi3:
+ .global LABEL(udivhi3)
+LABEL_DEF(udivhi3)
; A0 A1 A2 A3
[PATCH] Add new target h8300-*-linux
Add h8300-*-linux target for h8300 linux kernel and userland.
h8300-*-elf is some difference of standard elf.
h8300-*-linux is compatible of standard elf rules.
Thanks.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 9d3fa57..acbbbe1 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1190,6 +1190,10 @@ h8300-*-elf*)
tmake_file=h8300/t-h8300
tm_file=h8300/h8300.h dbxelf.h elfos.h newlib-stdint.h h8300/elf.h
;;
+h8300-*-linux*)
+ tmake_file=${tmake_file} h8300/t-h8300 h8300/t-linux
+ tm_file=h8300/linux.h dbxelf.h elfos.h linux.h
+ ;;
hppa*64*-*-linux*)
target_cpu_default=MASK_PA_11|MASK_PA_20
tm_file=pa/pa64-start.h ${tm_file} dbxelf.h elfos.h gnu-user.h linux.h
\
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index e7ed03a..4ec8516 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -359,11 +359,13 @@ h8300_option_override (void)
target_flags |= MASK_H8300S_1;
}
+#ifndef __h8300_linux__
if (TARGET_H8300 TARGET_INT32)
{
error (-mint32 is not supported for H8300 and H8300L targets);
target_flags ^= MASK_INT32;
}
+#endif
if ((!TARGET_H8300STARGET_EXR) (!TARGET_H8300SX TARGET_EXR))
{
diff --git a/gcc/config/h8300/linux.h b/gcc/config/h8300/linux.h
new file mode 100644
index 000..1cdfcf5
--- /dev/null
+++ b/gcc/config/h8300/linux.h
@@ -0,0 +1,784 @@
+/* Definitions of target machine for GNU compiler.
+ Renesas H8/300 (linux variant)
+ Copyright (C) 2015
+ Free Software Foundation, Inc.
+ Contributed by Yoshinori Sato ys...@users.sourceforge.jp
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+http://www.gnu.org/licenses/. */
+
+#ifndef GCC_H8300_H
+#define GCC_H8300_H
+
+#define __h8300_linux__
+
+/* Which CPU to compile for.
+ We use int for CPU_TYPE to avoid lots of casts. */
+#if 0 /* defined in insn-attr.h, here for documentation */
+enum attr_cpu { CPU_H8300, CPU_H8300H };
+#endif
+extern int cpu_type;
+
+/* Various globals defined in h8300.c. */
+
+extern const char *h8_push_op, *h8_pop_op, *h8_mov_op;
+extern const char * const *h8_reg_names;
+
+/* Target CPU builtins. */
+#define TARGET_CPU_CPP_BUILTINS() \
+ do \
+{ \
+ if (TARGET_H8300H) \
+ { \
+ builtin_define (__H8300H__);\
+ builtin_assert (cpu=h8300h);\
+ builtin_assert (machine=h8300h);\
+ if (TARGET_NORMAL_MODE) \
+ { \
+ builtin_define (__NORMAL_MODE__); \
+ } \
+ } \
+ else if (TARGET_H8300SX) \
+ { \
+ builtin_define (__H8300SX__); \
+ if (TARGET_NORMAL_MODE) \
+ { \
+ builtin_define (__NORMAL_MODE__); \
+ } \
+ } \
+ else if (TARGET_H8300S) \
+ { \
+ builtin_define (__H8300S__);\
+ builtin_assert (cpu=h8300s);\
+ builtin_assert (machine=h8300s);\
+ if (TARGET_NORMAL_MODE) \
+ { \
+ builtin_define (__NORMAL_MODE__); \
+ } \
+ } \
+ else \
+ { \
+ builtin_define (__H8300__); \
+ builtin_assert (cpu=h8300); \
+ builtin_assert (machine=h8300); \
+ } \
+ GNU_USER_TARGET_OS_CPP_BUILTINS(); \
+} \
+ while (0
Re: __sdivsi3_i4i and __udivsi3_i4i called for sh2 variant.
Uses a lookup table for divisors in the range -128 .. +128, and The code that you have enabled in lib1funcs.S will utilize dynamic shift instructions, which are not available on SH1 or SH2. Maybe your target HW is SH2A which has dynamic shift instructions and you haven't noticed a problem? Adding __SH2A__ instead of __SH2__ should be fine though. If I'm not mistaken, the __sdivsi3_i4i and __udivsi3_i4i division functions will be used by the compiler if the -mdiv=call-table option is used. The compiler should reject 'call-table' for SH targets that don't have dynamic shifts ... in sh.c there is a check... else if (! strcmp (sh_div_str, call-table) TARGET_SH2) sh_div_strategy = SH_DIV_CALL_TABLE; ... which is not quite complete. I will prepare a patch for this. Cheers, Oleg
__sdivsi3_i4i and __udivsi3_i4i called for sh2 variant.
It function called to divide operator.
But libgcc.a is not include it helper functions.
This patch is included those functions.
diff -ru gcc-4.7.2.org/gcc/config.gcc gcc-4.7.2/gcc/config.gcc
--- gcc-4.7.2.org/gcc/config.gcc2012-09-12 18:03:54.0 +0900
+++ gcc-4.7.2/gcc/config.gcc2013-03-03 03:12:41.0 +0900
@@ -2338,7 +2338,7 @@
sh[1234]*) sh_multilibs=${sh_cpu_target} ;;
sh64* | sh5*)
sh_multilibs=m5-32media,m5-32media-nofpu,m5-compact,m5-compact-nofpu,m5-64media,m5-64media-nofpu
;;
sh-superh-*)
sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;;
- sh*-*-linux*) sh_multilibs=m1,m3e,m4 ;;
+ sh*-*-linux*) sh_multilibs=m1,m2,m3e,m4 ;;
sh*-*-netbsd*) sh_multilibs=m3,m3e,m4 ;;
*)
sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single ;;
esac
diff -ru gcc-4.7.2.org/libgcc/config/sh/lib1funcs.S
gcc-4.7.2/libgcc/config/sh/lib1funcs.S
--- gcc-4.7.2.org/libgcc/config/sh/lib1funcs.S 2011-11-03 00:03:19.0
+0900
+++ gcc-4.7.2/libgcc/config/sh/lib1funcs.S 2013-03-03 03:29:32.0
+0900
@@ -3255,8 +3255,8 @@
.word 17136
.word 16639
-#elif defined (__SH3__) || defined (__SH3E__) || defined (__SH4__) || defined
(__SH4_SINGLE__) || defined (__SH4_SINGLE_ONLY__) || defined (__SH4_NOFPU__)
-/* This code used shld, thus is not suitable for SH1 / SH2. */
+#elif defined (__sh2__) || defined (__SH3__) || defined (__SH3E__) || defined
(__SH4__) || defined (__SH4_SINGLE__) || defined (__SH4_SINGLE_ONLY__) ||
defined (__SH4_NOFPU__)
+/* This code used shld, thus is not suitable for SH1. */
/* Signed / unsigned division without use of FPU, optimized for SH4.
Uses a lookup table for divisors in the range -128 .. +128, and
Re: [PATCH] PR/Target 47998
At Wed, 16 Mar 2011 10:22:20 -0600, Jeff Law wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 03/16/11 09:32, Yoshinori Sato wrote: Hi All, This problem optimize rule missing. gen_lowpart got invalid operand. I attached fix patch. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ca9398c..9982644 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-03-16 Yoshinori Sato ys...@users.sourceforge.jp + + PR/target 47998 + * config/h8300/h8300.md + (peephole): Add rule. It appears that you're restricting operands1 to be a REG/SUBREG, if that's what your intention is, then changing the operand predicate seems to be a better solution. Furthermore, you'd need to explain why restricting operand1 to be a REG/SUBREG is the right thing to do. This rtl machied it. (const:SI (plus:SI (symbol_ref:SI (buf) var_decl 0x77f93000 buf) (const_int 31 [0x1f]))) But gen_lowpart_general not supported this operand. So assert test failed. I think this rule is inapposite. It'd also be helpful to know why this problem does not occur on the trunk or gcc-4.6 branches, which appear to have the same code as the gcc-4.5 branch for the peephole. Trunk is not happen in test case. It generate other rtl. Jeff -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJNgOO8AAoJEBRtltQi2kC7Od0H/1P3Qp7e8idEu3WLdmHhsA6M R2KL7+UY1ZzLJpF8+cVjIVRfSTRGc+F8URtqIvaYxP3NJB+ZYiiSVE9jPxegSSDy /pqx0fLpQach0e4IcPzxFPg/HQkZBnwhW3bkCjxnUARH6hnbbIjFMxfBjJFAZQn+ QghwaZRutJE6RirbxyqmzEoCzfO76aZ3OJQOxwGYpwsMjoNKFknls0wYXvV6xBBC +vyamc1hN+/g6X8OH7vfWEP6Q3E9rSrtan+2wCYBZvBXFYWjBbFEfZD94yg5VMbZ EFoSlmKZCn+c+bsop0T/jsUMBgy05Tv1orbdjsQ0aXKjsGusWlcboo6Is4Inonk= =Qmwv -END PGP SIGNATURE- -- Yoshinori Sato ys...@users.sourceforge.jp
