A lot of code tests GET_MODE_BITSIZE (mode) = HOST_BITS_PER_WIDE_INT to
determine whether it can operate on values in the mode using
HOST_WIDE_INT. This patch hides that behind a new macro, which now uses
GET_MODE_PRECISION.
Bernd
* machmode.h (HWI_COMPUTABLE_MODE_P): New macro.
* combine.c (set_nonzero_bits_and_sign_copies): Use it.
(find_split-point, combine_simplify_rtx, simplify_if_then_else,
simplify_set, simplify_logical, expand_compound_operation,
make_extraction, force_to_mode, if_then_else_cond, extended_count,
try_widen_shift_mode, simplify_shift_const_1, simplify_comparison,
record_value_for_reg): Likewise.
* expmed.c (expand_widening_mult, expand_mult_highpart): Likewise.
* simplify-rtx. c (simplify_unary_operation_1,
simplify_binary_operation_1, simplify_const_relational_operation):
Likewise.
Index: baseline-trunk/gcc/combine.c
===
--- baseline-trunk.orig/gcc/combine.c
+++ baseline-trunk/gcc/combine.c
@@ -1560,7 +1560,7 @@ set_nonzero_bits_and_sign_copies (rtx x,
say what its contents were. */
! REGNO_REG_SET_P
(DF_LR_IN (ENTRY_BLOCK_PTR-next_bb), REGNO (x))
- GET_MODE_BITSIZE (GET_MODE (x)) = HOST_BITS_PER_WIDE_INT)
+ HWI_COMPUTABLE_MODE_P (GET_MODE (x)))
{
reg_stat_type *rsp = VEC_index (reg_stat_type, reg_stat, REGNO (x));
@@ -4679,8 +4679,7 @@ find_split_point (rtx *loc, rtx insn, bo
/* See if this is a bitfield assignment with everything constant. If
so, this is an IOR of an AND, so split it into that. */
if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT
- (GET_MODE_BITSIZE (GET_MODE (XEXP (SET_DEST (x), 0)))
- = HOST_BITS_PER_WIDE_INT)
+ HWI_COMPUTABLE_MODE_P (GET_MODE (XEXP (SET_DEST (x), 0)))
CONST_INT_P (XEXP (SET_DEST (x), 1))
CONST_INT_P (XEXP (SET_DEST (x), 2))
CONST_INT_P (SET_SRC (x))
@@ -5584,7 +5583,7 @@ combine_simplify_rtx (rtx x, enum machin
if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
break;
- if (GET_MODE_BITSIZE (mode) = HOST_BITS_PER_WIDE_INT)
+ if (HWI_COMPUTABLE_MODE_P (mode))
SUBST (XEXP (x, 0),
force_to_mode (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
GET_MODE_MASK (mode), 0));
@@ -5596,7 +5595,7 @@ combine_simplify_rtx (rtx x, enum machin
/* Similarly to what we do in simplify-rtx.c, a truncate of a register
whose value is a comparison can be replaced with a subreg if
STORE_FLAG_VALUE permits. */
- if (GET_MODE_BITSIZE (mode) = HOST_BITS_PER_WIDE_INT
+ if (HWI_COMPUTABLE_MODE_P (mode)
(STORE_FLAG_VALUE ~GET_MODE_MASK (mode)) == 0
(temp = get_last_value (XEXP (x, 0)))
COMPARISON_P (temp))
@@ -5634,7 +5633,7 @@ combine_simplify_rtx (rtx x, enum machin
INTVAL (XEXP (x, 1)) == -INTVAL (XEXP (XEXP (x, 0), 1))
((i = exact_log2 (UINTVAL (XEXP (XEXP (x, 0), 1 = 0
|| (i = exact_log2 (UINTVAL (XEXP (x, 1 = 0)
- GET_MODE_BITSIZE (mode) = HOST_BITS_PER_WIDE_INT
+ HWI_COMPUTABLE_MODE_P (mode)
((GET_CODE (XEXP (XEXP (x, 0), 0)) == AND
CONST_INT_P (XEXP (XEXP (XEXP (x, 0), 0), 1))
(UINTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1))
@@ -5669,7 +5668,7 @@ combine_simplify_rtx (rtx x, enum machin
for example in cases like ((a 1) + (a 2)), which can
become a 3. */
- if (GET_MODE_BITSIZE (mode) = HOST_BITS_PER_WIDE_INT
+ if (HWI_COMPUTABLE_MODE_P (mode)
(nonzero_bits (XEXP (x, 0), mode)
nonzero_bits (XEXP (x, 1), mode)) == 0)
{
@@ -5875,7 +5874,7 @@ combine_simplify_rtx (rtx x, enum machin
AND with STORE_FLAG_VALUE when we are done, since we are only
going to test the sign bit. */
if (new_code == NE GET_MODE_CLASS (mode) == MODE_INT
- GET_MODE_BITSIZE (mode) = HOST_BITS_PER_WIDE_INT
+ HWI_COMPUTABLE_MODE_P (mode)
val_signbit_p (mode, STORE_FLAG_VALUE)
op1 == const0_rtx
mode == GET_MODE (op0)
@@ -6209,7 +6208,7 @@ simplify_if_then_else (rtx x)
|| GET_CODE (XEXP (t, 0)) == LSHIFTRT
|| GET_CODE (XEXP (t, 0)) == ASHIFTRT)
GET_CODE (XEXP (XEXP (t, 0), 0)) == SUBREG
- GET_MODE_BITSIZE (mode) = HOST_BITS_PER_WIDE_INT
+ HWI_COMPUTABLE_MODE_P (mode)
subreg_lowpart_p (XEXP (XEXP (t, 0), 0))
rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 0)), f)
((nonzero_bits (f, GET_MODE (f))
@@ -6225,7 +6224,7 @@ simplify_if_then_else (rtx x)
|| GET_CODE (XEXP (t, 0)) == IOR
|| GET_CODE (XEXP (t, 0)) == XOR)
GET_CODE (XEXP (XEXP (t,
