Re: [GCC, Arm, committed] Fix availability of FP16-FP64 conversion instructions
Nope, just do it after testing it and adjust with Christophes follow up R On Mon, 11 Mar 2019, 10:36 Andre Vieira (lists), < andre.simoesdiasvie...@arm.com> wrote: > Hi, > > Any objections to me backporting this to GCC 8 and 7? > > Cheers, > Andre > > On 08/03/2019 17:30, Andre Vieira (lists) wrote: > > Hi, > > > > vcvtb.f16.f64 and vcvtb.f64.f16 were being made available even for FPUs > > that do not support double precision. This patch fixes that. > > > > Regression tested for arm-none-eabi. > > > > Committed in r269499. > > > > Cheers, > > Andre > > > > gcc/ChangeLog: > > 2019-03-08 Andre Vieira > > > > * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add > TARGET_VFP_DOUBLE > > requirement. > > > > gcc/testsuite/ChangeLog: > > > > 2019-03-08 Andre Vieira > > > > * gcc.target/arm/f16_f64_conv_no_dp.c: New test. >
Re: [GCC, Arm, committed] Fix availability of FP16-FP64 conversion instructions
Ok. Ramana On Mon, 11 Mar 2019, 20:24 Christophe Lyon, wrote: > On Mon, 11 Mar 2019 at 12:34, Richard Biener wrote: > > > > On Mon, 11 Mar 2019, Andre Vieira (lists) wrote: > > > > > Hi, > > > > > > Any objections to me backporting this to GCC 8 and 7? > > > > No, go ahead (after proper testing). > > > > Hi, > > I've noticed that this new test fails on arm-none-linux-gnueabi > --with-mode thumb > --with-cpu cortex-a9 > --with-fpu default > > and with Dejagnu flags: -march=armv5t > > (because the test forces float-abi=hard on a target that generates > thumb-1 by default, which isn't supported. > > The attached patch fixes this by adding arm_fp16_ok effective target. > OK? > > > Christophe > > > > Richard. > > > > > Cheers, > > > Andre > > > > > > On 08/03/2019 17:30, Andre Vieira (lists) wrote: > > > > Hi, > > > > > > > > vcvtb.f16.f64 and vcvtb.f64.f16 were being made available even for > FPUs that > > > > do not support double precision. This patch fixes that. > > > > > > > > Regression tested for arm-none-eabi. > > > > > > > > Committed in r269499. > > > > > > > > Cheers, > > > > Andre > > > > > > > > gcc/ChangeLog: > > > > 2019-03-08 Andre Vieira > > > > > > > > * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add > TARGET_VFP_DOUBLE > > > > requirement. > > > > > > > > gcc/testsuite/ChangeLog: > > > > > > > > 2019-03-08 Andre Vieira > > > > > > > > * gcc.target/arm/f16_f64_conv_no_dp.c: New test. > > > > > > > -- > > Richard Biener > > SUSE LINUX GmbH, GF: Felix Imendoerffer, Jane Smithard, Graham Norton, > HRB 21284 (AG Nuernberg) >
Re: [GCC, Arm, committed] Fix availability of FP16-FP64 conversion instructions
On Mon, 11 Mar 2019 at 12:34, Richard Biener wrote:
>
> On Mon, 11 Mar 2019, Andre Vieira (lists) wrote:
>
> > Hi,
> >
> > Any objections to me backporting this to GCC 8 and 7?
>
> No, go ahead (after proper testing).
>
Hi,
I've noticed that this new test fails on arm-none-linux-gnueabi
--with-mode thumb
--with-cpu cortex-a9
--with-fpu default
and with Dejagnu flags: -march=armv5t
(because the test forces float-abi=hard on a target that generates
thumb-1 by default, which isn't supported.
The attached patch fixes this by adding arm_fp16_ok effective target.
OK?
Christophe
> Richard.
>
> > Cheers,
> > Andre
> >
> > On 08/03/2019 17:30, Andre Vieira (lists) wrote:
> > > Hi,
> > >
> > > vcvtb.f16.f64 and vcvtb.f64.f16 were being made available even for FPUs
> > > that
> > > do not support double precision. This patch fixes that.
> > >
> > > Regression tested for arm-none-eabi.
> > >
> > > Committed in r269499.
> > >
> > > Cheers,
> > > Andre
> > >
> > > gcc/ChangeLog:
> > > 2019-03-08 Andre Vieira
> > >
> > > * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add TARGET_VFP_DOUBLE
> > > requirement.
> > >
> > > gcc/testsuite/ChangeLog:
> > >
> > > 2019-03-08 Andre Vieira
> > >
> > > * gcc.target/arm/f16_f64_conv_no_dp.c: New test.
> >
>
> --
> Richard Biener
> SUSE LINUX GmbH, GF: Felix Imendoerffer, Jane Smithard, Graham Norton, HRB
> 21284 (AG Nuernberg)
2019-03-11 Christophe Lyon
* gcc.target/arm/f16_f64_conv_no_dp.c: Add arm_fp16_ok effective
target.
diff --git a/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c
b/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c
index 99b62a8..2620e57 100644
--- a/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c
+++ b/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-require-effective-target arm_fp16_ok } */
/* { dg-skip-if "do not override fpu" { *-*-* } { "-mfpu=*" } {
"-mfpu=fpv5-sp-d16" } } */
/* { dg-skip-if "do not disable fpu" { *-*-* } { "-mfloat-abi=soft" } { * } }
*/
/* { dg-skip-if "do not override fp16-format" { *-*-* } { "-mfp16-format=*" }
{ "-mfp16-format=ieee" } } */
Re: [GCC, Arm, committed] Fix availability of FP16-FP64 conversion instructions
On Mon, 11 Mar 2019, Andre Vieira (lists) wrote: > Hi, > > Any objections to me backporting this to GCC 8 and 7? No, go ahead (after proper testing). Richard. > Cheers, > Andre > > On 08/03/2019 17:30, Andre Vieira (lists) wrote: > > Hi, > > > > vcvtb.f16.f64 and vcvtb.f64.f16 were being made available even for FPUs that > > do not support double precision. This patch fixes that. > > > > Regression tested for arm-none-eabi. > > > > Committed in r269499. > > > > Cheers, > > Andre > > > > gcc/ChangeLog: > > 2019-03-08 Andre Vieira > > > > * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add TARGET_VFP_DOUBLE > > requirement. > > > > gcc/testsuite/ChangeLog: > > > > 2019-03-08 Andre Vieira > > > > * gcc.target/arm/f16_f64_conv_no_dp.c: New test. > -- Richard Biener SUSE LINUX GmbH, GF: Felix Imendoerffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nuernberg)
Re: [GCC, Arm, committed] Fix availability of FP16-FP64 conversion instructions
Hi, Any objections to me backporting this to GCC 8 and 7? Cheers, Andre On 08/03/2019 17:30, Andre Vieira (lists) wrote: Hi, vcvtb.f16.f64 and vcvtb.f64.f16 were being made available even for FPUs that do not support double precision. This patch fixes that. Regression tested for arm-none-eabi. Committed in r269499. Cheers, Andre gcc/ChangeLog: 2019-03-08 Andre Vieira * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add TARGET_VFP_DOUBLE requirement. gcc/testsuite/ChangeLog: 2019-03-08 Andre Vieira * gcc.target/arm/f16_f64_conv_no_dp.c: New test.
[GCC, Arm, committed] Fix availability of FP16-FP64 conversion instructions
Hi,
vcvtb.f16.f64 and vcvtb.f64.f16 were being made available even for FPUs
that do not support double precision. This patch fixes that.
Regression tested for arm-none-eabi.
Committed in r269499.
Cheers,
Andre
gcc/ChangeLog:
2019-03-08 Andre Vieira
* config/arm/arm.h (TARGET_FP16_TO_DOUBLE): Add TARGET_VFP_DOUBLE
requirement.
gcc/testsuite/ChangeLog:
2019-03-08 Andre Vieira
* gcc.target/arm/f16_f64_conv_no_dp.c: New test.
>From 870d88c1d2cf9f1e11ab85b4048739c0c98e9a06 Mon Sep 17 00:00:00 2001
From: Andre Vieira
Date: Fri, 8 Mar 2019 16:11:10 +
Subject: [PATCH] [GCC, Arm] Fix availability of FP16-FP64 conversion
instructions
vcvtb.f16.f64 and vcvtb.f64.f16 were being made available even for FPUs that do
not support double precision. This patch fixes that.
---
gcc/config/arm/arm.h | 2 +-
gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c | 15 +++
2 files changed, 16 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 103d390dd17273e947bbd4d605be2c1ef70fb137..7adafead0f20832467b873f53d298a2e1a25ab0a 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -195,7 +195,7 @@ extern tree arm_fp16_type_node;
/* FPU supports converting between HFmode and DFmode in a single hardware
step. */
#define TARGET_FP16_TO_DOUBLE \
- (TARGET_HARD_FLOAT && (TARGET_FP16 && TARGET_VFP5))
+ (TARGET_HARD_FLOAT && TARGET_FP16 && TARGET_VFP5 && TARGET_VFP_DOUBLE)
/* FPU supports fused-multiply-add operations. */
#define TARGET_FMA (bitmap_bit_p (arm_active_target.isa, isa_bit_vfpv4))
diff --git a/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c b/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c
new file mode 100644
index ..99b62a8ffd5de5c61c08980a067d8fc08cb24b11
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/f16_f64_conv_no_dp.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-skip-if "do not override fpu" { *-*-* } { "-mfpu=*" } { "-mfpu=fpv5-sp-d16" } } */
+/* { dg-skip-if "do not disable fpu" { *-*-* } { "-mfloat-abi=soft" } { * } } */
+/* { dg-skip-if "do not override fp16-format" { *-*-* } { "-mfp16-format=*" } { "-mfp16-format=ieee" } } */
+/* { dg-options "-O1 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mfp16-format=ieee" } */
+
+__fp16 foo (double a)
+{
+ return a;
+}
+
+double bar (__fp16 a)
+{
+ return a;
+}
--
2.17.1
