Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-28 Thread Thomas Preudhomme 



On 26/06/17 17:01, Thomas Preudhomme wrote:

On 26/06/17 15:16, Christophe Lyon wrote:




You mean the macro is expected not to be defined on ARMv8-A ?


Correct. Most instructions its value represent are not available on ARMv8-A and 
for those that are the intrinsics are deprecated.


I've just noticed that many such instructions not available on ARMv8-A are 
accepted by GNU as. I would like to enable/disable coprocessor intrinsics tests 
based on what GNU as returns regarding availability of these instructions so 
hold on a bit more.


Best regards,

Thomas

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-26 Thread Thomas Preudhomme 



On 26/06/17 15:16, Christophe Lyon wrote:

On 26 June 2017 at 16:09, Thomas Preudhomme
 wrote:

Hi Christophe,


On 21/06/17 17:57, Christophe Lyon wrote:


Hi,


On 19 June 2017 at 11:32, Richard Earnshaw (lists)
 wrote:


On 16/06/17 15:56, Prakhar Bahuguna wrote:


On 16/06/2017 15:37:18, Richard Earnshaw (lists) wrote:


On 16/06/17 08:48, Prakhar Bahuguna wrote:


On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:


On 14/06/17 10:35, Prakhar Bahuguna wrote:


The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates
which
coprocessor intrinsics are available for the target. If
__ARM_FEATURE_COPROC is
undefined, the target does not support coprocessor intrinsics. The
feature
levels are defined as follows:


+-+---+--+
| **Bit** | **Value** | **Intrinsics Available**
|

+-+---+--+
| 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,
|
| |   | __arm_stcl, __arm_mcr and __arm_mrc
|

+-+---+--+
| 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2,
__arm_ldc2l, |
| |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2
|

+-+---+--+
| 2   | 0x4   | __arm_mcrr and __arm_mrrc
|

+-+---+--+
| 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2
|

+-+---+--+

This patch implements full support for this feature macro as defined
in section
5.9 of the ACLE

(https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).

gcc/ChangeLog:

2017-06-14  Prakhar Bahuguna  

* config/arm/arm-c.c (arm_cpu_builtins): New block to define
 __ARM_FEATURE_COPROC according to support.

2017-06-14  Prakhar Bahuguna  
* gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro
bitmap
test.
* gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.

Testing done: ACLE regression tests updated with tests for feature
macro bits.
All regression tests pass.

Okay for trunk?


0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch


  From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00
2001
From: Prakhar Bahuguna 
Date: Tue, 2 May 2017 13:43:40 +0100
Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor
intrinsic feature
   macro

---
   gcc/config/arm/arm-c.c| 19 +++
   gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
   gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
   gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
   gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
   gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
   gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
   gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
   gcc/testsuite/gcc.target/arm/acle/stc.c   |  3 +++
   gcc/testsuite/gcc.target/arm/acle/stc2.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/stc2l.c |  3 +++
   gcc/testsuite/gcc.target/arm/acle/stcl.c  |  3 +++
   19 files changed, 73 insertions(+)

diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 3abe7d1f1f5..3daf4e5e1f3 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -200,6 +200,25 @@ arm_cpu_builtins (struct cpp_reader* pfile)
 def_or_undef_macro

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-26 Thread Christophe Lyon 
On 26 June 2017 at 16:09, Thomas Preudhomme
 wrote:
> Hi Christophe,
>
>
> On 21/06/17 17:57, Christophe Lyon wrote:
>>
>> Hi,
>>
>>
>> On 19 June 2017 at 11:32, Richard Earnshaw (lists)
>>  wrote:
>>>
>>> On 16/06/17 15:56, Prakhar Bahuguna wrote:

 On 16/06/2017 15:37:18, Richard Earnshaw (lists) wrote:
>
> On 16/06/17 08:48, Prakhar Bahuguna wrote:
>>
>> On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:
>>>
>>> On 14/06/17 10:35, Prakhar Bahuguna wrote:

 The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates
 which
 coprocessor intrinsics are available for the target. If
 __ARM_FEATURE_COPROC is
 undefined, the target does not support coprocessor intrinsics. The
 feature
 levels are defined as follows:


 +-+---+--+
 | **Bit** | **Value** | **Intrinsics Available**
 |

 +-+---+--+
 | 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,
 |
 | |   | __arm_stcl, __arm_mcr and __arm_mrc
 |

 +-+---+--+
 | 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2,
 __arm_ldc2l, |
 | |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2
 |

 +-+---+--+
 | 2   | 0x4   | __arm_mcrr and __arm_mrrc
 |

 +-+---+--+
 | 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2
 |

 +-+---+--+

 This patch implements full support for this feature macro as defined
 in section
 5.9 of the ACLE

 (https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).

 gcc/ChangeLog:

 2017-06-14  Prakhar Bahuguna  

* config/arm/arm-c.c (arm_cpu_builtins): New block to define
 __ARM_FEATURE_COPROC according to support.

 2017-06-14  Prakhar Bahuguna  
* gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro
 bitmap
test.
* gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.

 Testing done: ACLE regression tests updated with tests for feature
 macro bits.
 All regression tests pass.

 Okay for trunk?


 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch


  From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00
 2001
 From: Prakhar Bahuguna 
 Date: Tue, 2 May 2017 13:43:40 +0100
 Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor
 intrinsic feature
   macro

 ---
   gcc/config/arm/arm-c.c| 19 +++
   gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
   gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
   gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
   gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
   gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-26 Thread Thomas Preudhomme 

Hi Christophe,

On 21/06/17 17:57, Christophe Lyon wrote:

Hi,


On 19 June 2017 at 11:32, Richard Earnshaw (lists)
 wrote:

On 16/06/17 15:56, Prakhar Bahuguna wrote:

On 16/06/2017 15:37:18, Richard Earnshaw (lists) wrote:

On 16/06/17 08:48, Prakhar Bahuguna wrote:

On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:

On 14/06/17 10:35, Prakhar Bahuguna wrote:

The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which
coprocessor intrinsics are available for the target. If __ARM_FEATURE_COPROC is
undefined, the target does not support coprocessor intrinsics. The feature
levels are defined as follows:

+-+---+--+
| **Bit** | **Value** | **Intrinsics Available** |
+-+---+--+
| 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,  |
| |   | __arm_stcl, __arm_mcr and __arm_mrc  |
+-+---+--+
| 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l, |
| |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2   |
+-+---+--+
| 2   | 0x4   | __arm_mcrr and __arm_mrrc|
+-+---+--+
| 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2  |
+-+---+--+

This patch implements full support for this feature macro as defined in section
5.9 of the ACLE
(https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).

gcc/ChangeLog:

2017-06-14  Prakhar Bahuguna  

   * config/arm/arm-c.c (arm_cpu_builtins): New block to define
__ARM_FEATURE_COPROC according to support.

2017-06-14  Prakhar Bahuguna  
   * gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
   test.
   * gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
   * gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.

Testing done: ACLE regression tests updated with tests for feature macro bits.
All regression tests pass.

Okay for trunk?


0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch


 From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00 2001
From: Prakhar Bahuguna 
Date: Tue, 2 May 2017 13:43:40 +0100
Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature
  macro

---
  gcc/config/arm/arm-c.c| 19 +++
  gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
  gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
  gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
  gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
  gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
  gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
  gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
  gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
  gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
  gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
  gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
  gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
  gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
  gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
  gcc/testsuite/gcc.target/arm/acle/stc.c   |  3 +++
  gcc/testsuite/gcc.target/arm/acle/stc2.c  |  3 +++
  gcc/testsuite/gcc.target/arm/acle/stc2l.c |  3 +++
  gcc/testsuite/gcc.target/arm/acle/stcl.c  |  3 +++
  19 files changed, 73 insertions(+)

diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 3abe7d1f1f5..3daf4e5e1f3 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -200,6 +200,25 @@ arm_cpu_builtins (struct cpp_reader* pfile)
def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);

def_or_undef_macro (pfile,

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-26 Thread Christophe Lyon 
ping?

On 21 June 2017 at 18:57, Christophe Lyon  wrote:
> Hi,
>
>
> On 19 June 2017 at 11:32, Richard Earnshaw (lists)
>  wrote:
>> On 16/06/17 15:56, Prakhar Bahuguna wrote:
>>> On 16/06/2017 15:37:18, Richard Earnshaw (lists) wrote:
 On 16/06/17 08:48, Prakhar Bahuguna wrote:
> On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:
>> On 14/06/17 10:35, Prakhar Bahuguna wrote:
>>> The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates 
>>> which
>>> coprocessor intrinsics are available for the target. If 
>>> __ARM_FEATURE_COPROC is
>>> undefined, the target does not support coprocessor intrinsics. The 
>>> feature
>>> levels are defined as follows:
>>>
>>> +-+---+--+
>>> | **Bit** | **Value** | **Intrinsics Available**
>>>  |
>>> +-+---+--+
>>> | 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc, 
>>>  |
>>> | |   | __arm_stcl, __arm_mcr and __arm_mrc 
>>>  |
>>> +-+---+--+
>>> | 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, 
>>> __arm_ldc2l, |
>>> | |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2  
>>>  |
>>> +-+---+--+
>>> | 2   | 0x4   | __arm_mcrr and __arm_mrrc   
>>>  |
>>> +-+---+--+
>>> | 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2 
>>>  |
>>> +-+---+--+
>>>
>>> This patch implements full support for this feature macro as defined in 
>>> section
>>> 5.9 of the ACLE
>>> (https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).
>>>
>>> gcc/ChangeLog:
>>>
>>> 2017-06-14  Prakhar Bahuguna  
>>>
>>>   * config/arm/arm-c.c (arm_cpu_builtins): New block to define
>>>__ARM_FEATURE_COPROC according to support.
>>>
>>> 2017-06-14  Prakhar Bahuguna  
>>>   * gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
>>>   test.
>>>   * gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
>>>   * gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.
>>>
>>> Testing done: ACLE regression tests updated with tests for feature 
>>> macro bits.
>>> All regression tests pass.
>>>
>>> Okay for trunk?
>>>
>>>
>>> 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch
>>>
>>>
>>> From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00 2001
>>> From: Prakhar Bahuguna 
>>> Date: Tue, 2 May 2017 13:43:40 +0100
>>> Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic 
>>> feature
>>>  macro
>>>
>>> ---
>>>  gcc/config/arm/arm-c.c| 19 +++
>>>  gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-21 Thread Christophe Lyon 
Hi,


On 19 June 2017 at 11:32, Richard Earnshaw (lists)
 wrote:
> On 16/06/17 15:56, Prakhar Bahuguna wrote:
>> On 16/06/2017 15:37:18, Richard Earnshaw (lists) wrote:
>>> On 16/06/17 08:48, Prakhar Bahuguna wrote:
 On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:
> On 14/06/17 10:35, Prakhar Bahuguna wrote:
>> The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which
>> coprocessor intrinsics are available for the target. If 
>> __ARM_FEATURE_COPROC is
>> undefined, the target does not support coprocessor intrinsics. The 
>> feature
>> levels are defined as follows:
>>
>> +-+---+--+
>> | **Bit** | **Value** | **Intrinsics Available** 
>> |
>> +-+---+--+
>> | 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,  
>> |
>> | |   | __arm_stcl, __arm_mcr and __arm_mrc  
>> |
>> +-+---+--+
>> | 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l, 
>> |
>> | |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2   
>> |
>> +-+---+--+
>> | 2   | 0x4   | __arm_mcrr and __arm_mrrc
>> |
>> +-+---+--+
>> | 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2  
>> |
>> +-+---+--+
>>
>> This patch implements full support for this feature macro as defined in 
>> section
>> 5.9 of the ACLE
>> (https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).
>>
>> gcc/ChangeLog:
>>
>> 2017-06-14  Prakhar Bahuguna  
>>
>>   * config/arm/arm-c.c (arm_cpu_builtins): New block to define
>>__ARM_FEATURE_COPROC according to support.
>>
>> 2017-06-14  Prakhar Bahuguna  
>>   * gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
>>   test.
>>   * gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.
>>
>> Testing done: ACLE regression tests updated with tests for feature macro 
>> bits.
>> All regression tests pass.
>>
>> Okay for trunk?
>>
>>
>> 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch
>>
>>
>> From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00 2001
>> From: Prakhar Bahuguna 
>> Date: Tue, 2 May 2017 13:43:40 +0100
>> Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic 
>> feature
>>  macro
>>
>> ---
>>  gcc/config/arm/arm-c.c| 19 +++
>>  gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
>>

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-21 Thread Christophe Lyon 
Hi,


On 19 June 2017 at 11:32, Richard Earnshaw (lists)
 wrote:
> On 16/06/17 15:56, Prakhar Bahuguna wrote:
>> On 16/06/2017 15:37:18, Richard Earnshaw (lists) wrote:
>>> On 16/06/17 08:48, Prakhar Bahuguna wrote:
 On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:
> On 14/06/17 10:35, Prakhar Bahuguna wrote:
>> The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which
>> coprocessor intrinsics are available for the target. If 
>> __ARM_FEATURE_COPROC is
>> undefined, the target does not support coprocessor intrinsics. The 
>> feature
>> levels are defined as follows:
>>
>> +-+---+--+
>> | **Bit** | **Value** | **Intrinsics Available** 
>> |
>> +-+---+--+
>> | 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,  
>> |
>> | |   | __arm_stcl, __arm_mcr and __arm_mrc  
>> |
>> +-+---+--+
>> | 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l, 
>> |
>> | |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2   
>> |
>> +-+---+--+
>> | 2   | 0x4   | __arm_mcrr and __arm_mrrc
>> |
>> +-+---+--+
>> | 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2  
>> |
>> +-+---+--+
>>
>> This patch implements full support for this feature macro as defined in 
>> section
>> 5.9 of the ACLE
>> (https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).
>>
>> gcc/ChangeLog:
>>
>> 2017-06-14  Prakhar Bahuguna  
>>
>>   * config/arm/arm-c.c (arm_cpu_builtins): New block to define
>>__ARM_FEATURE_COPROC according to support.
>>
>> 2017-06-14  Prakhar Bahuguna  
>>   * gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
>>   test.
>>   * gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
>>   * gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.
>>
>> Testing done: ACLE regression tests updated with tests for feature macro 
>> bits.
>> All regression tests pass.
>>
>> Okay for trunk?
>>
>>
>> 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch
>>
>>
>> From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00 2001
>> From: Prakhar Bahuguna 
>> Date: Tue, 2 May 2017 13:43:40 +0100
>> Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic 
>> feature
>>  macro
>>
>> ---
>>  gcc/config/arm/arm-c.c| 19 +++
>>  gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
>>  gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
>>

[arm-embedded] [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-20 Thread Thomas Preudhomme 

Hi,

We have decided to apply the following patch to the ARM/embedded-6-branch and 
ARM/embedded-7-branch to implement the __ARM_FEATURE_COPROC coprocessor 
intrinsic feature macro.


2017-06-20  Thomas Preud'homme  

Backport from mainline
2017-06-20  Prakhar Bahuguna  

gcc/
* config/arm/arm-c.c (arm_cpu_builtins): New block to define
__ARM_FEATURE_COPROC according to support.

gcc/testsuite/
* gcc.target/arm/acle/cdp.c: Add feature macro bitmap test.
* gcc.target/arm/acle/cdp2.c: Likewise.
* gcc.target/arm/acle/ldc.c: Likewise.
* gcc.target/arm/acle/ldc2.c: Likewise.
* gcc.target/arm/acle/ldc2l.c: Likewise.
* gcc.target/arm/acle/ldcl.c: Likewise.
* gcc.target/arm/acle/mcr.c: Likewise.
* gcc.target/arm/acle/mcr2.c: Likewise.
* gcc.target/arm/acle/mcrr.c: Likewise.
* gcc.target/arm/acle/mcrr2.c: Likewise.
* gcc.target/arm/acle/mrc.c: Likewise.
* gcc.target/arm/acle/mrc2.c: Likewise.
* gcc.target/arm/acle/mrrc.c: Likewise.
* gcc.target/arm/acle/mrrc2.c: Likewise.
* gcc.target/arm/acle/stc.c: Likewise.
* gcc.target/arm/acle/stc2.c: Likewise.
* gcc.target/arm/acle/stc2l.c: Likewise.
* gcc.target/arm/acle/stcl.c: Likewise.

Best regards,

Thomas
--- Begin Message ---
On 16/06/2017 15:37:18, Richard Earnshaw (lists) wrote:
> On 16/06/17 08:48, Prakhar Bahuguna wrote:
> > On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:
> >> On 14/06/17 10:35, Prakhar Bahuguna wrote:
> >>> The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which
> >>> coprocessor intrinsics are available for the target. If 
> >>> __ARM_FEATURE_COPROC is
> >>> undefined, the target does not support coprocessor intrinsics. The feature
> >>> levels are defined as follows:
> >>>
> >>> +-+---+--+
> >>> | **Bit** | **Value** | **Intrinsics Available** |
> >>> +-+---+--+
> >>> | 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,  |
> >>> | |   | __arm_stcl, __arm_mcr and __arm_mrc  |
> >>> +-+---+--+
> >>> | 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l, |
> >>> | |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2   |
> >>> +-+---+--+
> >>> | 2   | 0x4   | __arm_mcrr and __arm_mrrc|
> >>> +-+---+--+
> >>> | 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2  |
> >>> +-+---+--+
> >>>
> >>> This patch implements full support for this feature macro as defined in 
> >>> section
> >>> 5.9 of the ACLE
> >>> (https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).
> >>>
> >>> gcc/ChangeLog:
> >>>
> >>> 2017-06-14  Prakhar Bahuguna  
> >>>
> >>>   * config/arm/arm-c.c (arm_cpu_builtins): New block to define
> >>>__ARM_FEATURE_COPROC according to support.
> >>>
> >>> 2017-06-14  Prakhar Bahuguna  
> >>>   * gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
> >>>   test.
> >>>   * gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.
> >>>
> >>> Testing done: ACLE regression tests updated with tests for feature macro 
> >>> bits.
> >>> All regression tests pass.
> >>>
> >>> Okay for trunk?
> >>>
> >>>
> >>> 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch
> >>>
> >>>
> >>> From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-19 Thread Richard Earnshaw (lists) 
On 16/06/17 15:56, Prakhar Bahuguna wrote:
> On 16/06/2017 15:37:18, Richard Earnshaw (lists) wrote:
>> On 16/06/17 08:48, Prakhar Bahuguna wrote:
>>> On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:
 On 14/06/17 10:35, Prakhar Bahuguna wrote:
> The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which
> coprocessor intrinsics are available for the target. If 
> __ARM_FEATURE_COPROC is
> undefined, the target does not support coprocessor intrinsics. The feature
> levels are defined as follows:
>
> +-+---+--+
> | **Bit** | **Value** | **Intrinsics Available** |
> +-+---+--+
> | 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,  |
> | |   | __arm_stcl, __arm_mcr and __arm_mrc  |
> +-+---+--+
> | 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l, |
> | |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2   |
> +-+---+--+
> | 2   | 0x4   | __arm_mcrr and __arm_mrrc|
> +-+---+--+
> | 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2  |
> +-+---+--+
>
> This patch implements full support for this feature macro as defined in 
> section
> 5.9 of the ACLE
> (https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).
>
> gcc/ChangeLog:
>
> 2017-06-14  Prakhar Bahuguna  
>
>   * config/arm/arm-c.c (arm_cpu_builtins): New block to define
>__ARM_FEATURE_COPROC according to support.
>
> 2017-06-14  Prakhar Bahuguna  
>   * gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
>   test.
>   * gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.
>
> Testing done: ACLE regression tests updated with tests for feature macro 
> bits.
> All regression tests pass.
>
> Okay for trunk?
>
>
> 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch
>
>
> From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00 2001
> From: Prakhar Bahuguna 
> Date: Tue, 2 May 2017 13:43:40 +0100
> Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic 
> feature
>  macro
>
> ---
>  gcc/config/arm/arm-c.c| 19 +++
>  gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/stc.c   |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/stc2.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/stc2l.c |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/stcl.c  |  3 +++
>  19 files changed, 73

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-16 Thread Prakhar Bahuguna 
On 16/06/2017 15:37:18, Richard Earnshaw (lists) wrote:
> On 16/06/17 08:48, Prakhar Bahuguna wrote:
> > On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:
> >> On 14/06/17 10:35, Prakhar Bahuguna wrote:
> >>> The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which
> >>> coprocessor intrinsics are available for the target. If 
> >>> __ARM_FEATURE_COPROC is
> >>> undefined, the target does not support coprocessor intrinsics. The feature
> >>> levels are defined as follows:
> >>>
> >>> +-+---+--+
> >>> | **Bit** | **Value** | **Intrinsics Available** |
> >>> +-+---+--+
> >>> | 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,  |
> >>> | |   | __arm_stcl, __arm_mcr and __arm_mrc  |
> >>> +-+---+--+
> >>> | 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l, |
> >>> | |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2   |
> >>> +-+---+--+
> >>> | 2   | 0x4   | __arm_mcrr and __arm_mrrc|
> >>> +-+---+--+
> >>> | 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2  |
> >>> +-+---+--+
> >>>
> >>> This patch implements full support for this feature macro as defined in 
> >>> section
> >>> 5.9 of the ACLE
> >>> (https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).
> >>>
> >>> gcc/ChangeLog:
> >>>
> >>> 2017-06-14  Prakhar Bahuguna  
> >>>
> >>>   * config/arm/arm-c.c (arm_cpu_builtins): New block to define
> >>>__ARM_FEATURE_COPROC according to support.
> >>>
> >>> 2017-06-14  Prakhar Bahuguna  
> >>>   * gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
> >>>   test.
> >>>   * gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
> >>>   * gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.
> >>>
> >>> Testing done: ACLE regression tests updated with tests for feature macro 
> >>> bits.
> >>> All regression tests pass.
> >>>
> >>> Okay for trunk?
> >>>
> >>>
> >>> 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch
> >>>
> >>>
> >>> From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00 2001
> >>> From: Prakhar Bahuguna 
> >>> Date: Tue, 2 May 2017 13:43:40 +0100
> >>> Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic 
> >>> feature
> >>>  macro
> >>>
> >>> ---
> >>>  gcc/config/arm/arm-c.c| 19 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/stc.c   |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/stc2.c  |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/stc2l.c |  3 +++
> >>>  gcc/testsuite/gcc.target/arm/acle/stcl.c  |  3 +++
> >>>  19 files changed, 73 insertions(+)
> >>>
> >>> diff --git

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-16 Thread Richard Earnshaw (lists) 
On 16/06/17 08:48, Prakhar Bahuguna wrote:
> On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:
>> On 14/06/17 10:35, Prakhar Bahuguna wrote:
>>> The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which
>>> coprocessor intrinsics are available for the target. If 
>>> __ARM_FEATURE_COPROC is
>>> undefined, the target does not support coprocessor intrinsics. The feature
>>> levels are defined as follows:
>>>
>>> +-+---+--+
>>> | **Bit** | **Value** | **Intrinsics Available** |
>>> +-+---+--+
>>> | 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,  |
>>> | |   | __arm_stcl, __arm_mcr and __arm_mrc  |
>>> +-+---+--+
>>> | 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l, |
>>> | |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2   |
>>> +-+---+--+
>>> | 2   | 0x4   | __arm_mcrr and __arm_mrrc|
>>> +-+---+--+
>>> | 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2  |
>>> +-+---+--+
>>>
>>> This patch implements full support for this feature macro as defined in 
>>> section
>>> 5.9 of the ACLE
>>> (https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).
>>>
>>> gcc/ChangeLog:
>>>
>>> 2017-06-14  Prakhar Bahuguna  
>>>
>>> * config/arm/arm-c.c (arm_cpu_builtins): New block to define
>>>  __ARM_FEATURE_COPROC according to support.
>>>
>>> 2017-06-14  Prakhar Bahuguna  
>>> * gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
>>> test.
>>> * gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
>>> * gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.
>>>
>>> Testing done: ACLE regression tests updated with tests for feature macro 
>>> bits.
>>> All regression tests pass.
>>>
>>> Okay for trunk?
>>>
>>>
>>> 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch
>>>
>>>
>>> From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00 2001
>>> From: Prakhar Bahuguna 
>>> Date: Tue, 2 May 2017 13:43:40 +0100
>>> Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic 
>>> feature
>>>  macro
>>>
>>> ---
>>>  gcc/config/arm/arm-c.c| 19 +++
>>>  gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/stc.c   |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/stc2.c  |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/stc2l.c |  3 +++
>>>  gcc/testsuite/gcc.target/arm/acle/stcl.c  |  3 +++
>>>  19 files changed, 73 insertions(+)
>>>
>>> diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
>>> index 3abe7d1f1f5..3daf4e5e1f3 100644
>>> --- a/gcc/config/arm/arm-c.c
>>> +++ b/gcc/config/arm/arm-c.c
>>> @@ -200,6 +200,25 @@ arm_cpu_builtins (struct cpp_reader*

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-16 Thread Prakhar Bahuguna 
Patch updated with code style fixes.

-- 

Prakhar Bahuguna
>From f1d76a6309a1fe16711b800507938eaa4f78852e Mon Sep 17 00:00:00 2001
From: Prakhar Bahuguna 
Date: Tue, 2 May 2017 13:43:40 +0100
Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature
 macro

---
 gcc/config/arm/arm-c.c| 17 +
 gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
 gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
 gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
 gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
 gcc/testsuite/gcc.target/arm/acle/stc.c   |  3 +++
 gcc/testsuite/gcc.target/arm/acle/stc2.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/stc2l.c |  3 +++
 gcc/testsuite/gcc.target/arm/acle/stcl.c  |  3 +++
 19 files changed, 71 insertions(+)

diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 3abe7d1f1f5..d8b17ffdccc 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -200,6 +200,23 @@ arm_cpu_builtins (struct cpp_reader* pfile)
   def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
 
   def_or_undef_macro (pfile, "__ARM_ASM_SYNTAX_UNIFIED__", inline_asm_unified);
+
+  if ((!TARGET_THUMB || TARGET_THUMB2) && arm_arch4
+  && !(arm_arch8 && arm_arch_notm))
+{
+  int coproc_level = 0x1;
+
+  if (arm_arch5)
+   coproc_level |= 0x2;
+  if (arm_arch5e)
+   coproc_level |= 0x4;
+  if (arm_arch6)
+   coproc_level |= 0x8;
+
+  builtin_define_with_int_value ("__ARM_FEATURE_COPROC", coproc_level);
+}
+  else
+  cpp_undef (pfile, "__ARM_FEATURE_COPROC");
 }
 
 void
diff --git a/gcc/testsuite/gcc.target/arm/acle/cdp.c 
b/gcc/testsuite/gcc.target/arm/acle/cdp.c
index 28b218e7cfc..cebd8c4024e 100644
--- a/gcc/testsuite/gcc.target/arm/acle/cdp.c
+++ b/gcc/testsuite/gcc.target/arm/acle/cdp.c
@@ -5,6 +5,9 @@
 /* { dg-require-effective-target arm_coproc1_ok } */
 
 #include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x1) == 0
+  #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
 
 void test_cdp (void)
 {
diff --git a/gcc/testsuite/gcc.target/arm/acle/cdp2.c 
b/gcc/testsuite/gcc.target/arm/acle/cdp2.c
index 00bcd502b56..945d435d2fb 100644
--- a/gcc/testsuite/gcc.target/arm/acle/cdp2.c
+++ b/gcc/testsuite/gcc.target/arm/acle/cdp2.c
@@ -5,6 +5,9 @@
 /* { dg-require-effective-target arm_coproc2_ok } */
 
 #include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x2) == 0
+  #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
 
 void test_cdp2 (void)
 {
diff --git a/gcc/testsuite/gcc.target/arm/acle/ldc.c 
b/gcc/testsuite/gcc.target/arm/acle/ldc.c
index f45f25d8c97..cd57343208f 100644
--- a/gcc/testsuite/gcc.target/arm/acle/ldc.c
+++ b/gcc/testsuite/gcc.target/arm/acle/ldc.c
@@ -5,6 +5,9 @@
 /* { dg-require-effective-target arm_coproc1_ok } */
 
 #include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x1) == 0
+  #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
 
 extern void * p;
 
diff --git a/gcc/testsuite/gcc.target/arm/acle/ldc2.c 
b/gcc/testsuite/gcc.target/arm/acle/ldc2.c
index 433bf8a1204..d7691e30d76 100644
--- a/gcc/testsuite/gcc.target/arm/acle/ldc2.c
+++ b/gcc/testsuite/gcc.target/arm/acle/ldc2.c
@@ -5,6 +5,9 @@
 /* { dg-require-effective-target arm_coproc2_ok } */
 
 #include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x2) == 0
+  #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
 
 extern void * p;
 
diff --git a/gcc/testsuite/gcc.target/arm/acle/ldc2l.c 
b/gcc/testsuite/gcc.target/arm/acle/ldc2l.c
index 88c8aa44765..9ee63afa055 100644
--- a/gcc/testsuite/gcc.target/arm/acle/ldc2l.c
+++ b/gcc/testsuite/gcc.target/arm/acle/ldc2l.c
@@ -5,6 +5,9 @@
 /* { dg-require-effective-target arm_coproc2_ok } */
 
 #include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x2) == 0
+  #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
 
 extern void * p;
 
diff --git a/gcc/testsuite/gcc.target/arm/acle/ldcl.c 
b/gcc/testsuite/gcc.target/arm/acle/ldcl.c
index 72a97f1d7b7..a6bfd9011dc 100644
--- a/gcc/testsuite/gcc.target/arm/acle/ldcl.c
+++ b/gcc/testsuite/gcc.target/arm/acle/ldcl.c
@@ -5,6 +5,9 @@
 /* { dg-require-effective-target arm_coproc1_ok } */
 
 #include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x1) == 0
+  #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
 
 extern void * p;
 
diff --git

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-16 Thread Prakhar Bahuguna 
On 15/06/2017 17:23:43, Richard Earnshaw (lists) wrote:
> On 14/06/17 10:35, Prakhar Bahuguna wrote:
> > The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which
> > coprocessor intrinsics are available for the target. If 
> > __ARM_FEATURE_COPROC is
> > undefined, the target does not support coprocessor intrinsics. The feature
> > levels are defined as follows:
> > 
> > +-+---+--+
> > | **Bit** | **Value** | **Intrinsics Available** |
> > +-+---+--+
> > | 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,  |
> > | |   | __arm_stcl, __arm_mcr and __arm_mrc  |
> > +-+---+--+
> > | 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l, |
> > | |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2   |
> > +-+---+--+
> > | 2   | 0x4   | __arm_mcrr and __arm_mrrc|
> > +-+---+--+
> > | 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2  |
> > +-+---+--+
> > 
> > This patch implements full support for this feature macro as defined in 
> > section
> > 5.9 of the ACLE
> > (https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).
> > 
> > gcc/ChangeLog:
> > 
> > 2017-06-14  Prakhar Bahuguna  
> > 
> > * config/arm/arm-c.c (arm_cpu_builtins): New block to define
> >  __ARM_FEATURE_COPROC according to support.
> > 
> > 2017-06-14  Prakhar Bahuguna  
> > * gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
> > test.
> > * gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
> > * gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.
> > 
> > Testing done: ACLE regression tests updated with tests for feature macro 
> > bits.
> > All regression tests pass.
> > 
> > Okay for trunk?
> > 
> > 
> > 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch
> > 
> > 
> > From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00 2001
> > From: Prakhar Bahuguna 
> > Date: Tue, 2 May 2017 13:43:40 +0100
> > Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic 
> > feature
> >  macro
> > 
> > ---
> >  gcc/config/arm/arm-c.c| 19 +++
> >  gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/stc.c   |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/stc2.c  |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/stc2l.c |  3 +++
> >  gcc/testsuite/gcc.target/arm/acle/stcl.c  |  3 +++
> >  19 files changed, 73 insertions(+)
> > 
> > diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
> > index 3abe7d1f1f5..3daf4e5e1f3 100644
> > --- a/gcc/config/arm/arm-c.c
> > +++ b/gcc/config/arm/arm-c.c
> > @@ -200,6 +200,25 @@ arm_cpu_builtins (struct cpp_reader* pfile)
> >

Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-15 Thread Richard Earnshaw (lists) 
On 14/06/17 10:35, Prakhar Bahuguna wrote:
> The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which
> coprocessor intrinsics are available for the target. If __ARM_FEATURE_COPROC 
> is
> undefined, the target does not support coprocessor intrinsics. The feature
> levels are defined as follows:
> 
> +-+---+--+
> | **Bit** | **Value** | **Intrinsics Available** |
> +-+---+--+
> | 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,  |
> | |   | __arm_stcl, __arm_mcr and __arm_mrc  |
> +-+---+--+
> | 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l, |
> | |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2   |
> +-+---+--+
> | 2   | 0x4   | __arm_mcrr and __arm_mrrc|
> +-+---+--+
> | 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2  |
> +-+---+--+
> 
> This patch implements full support for this feature macro as defined in 
> section
> 5.9 of the ACLE
> (https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).
> 
> gcc/ChangeLog:
> 
> 2017-06-14  Prakhar Bahuguna  
> 
>   * config/arm/arm-c.c (arm_cpu_builtins): New block to define
>__ARM_FEATURE_COPROC according to support.
> 
> 2017-06-14  Prakhar Bahuguna  
>   * gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
>   test.
>   * gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
>   * gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.
> 
> Testing done: ACLE regression tests updated with tests for feature macro bits.
> All regression tests pass.
> 
> Okay for trunk?
> 
> 
> 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch
> 
> 
> From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00 2001
> From: Prakhar Bahuguna 
> Date: Tue, 2 May 2017 13:43:40 +0100
> Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature
>  macro
> 
> ---
>  gcc/config/arm/arm-c.c| 19 +++
>  gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/stc.c   |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/stc2.c  |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/stc2l.c |  3 +++
>  gcc/testsuite/gcc.target/arm/acle/stcl.c  |  3 +++
>  19 files changed, 73 insertions(+)
> 
> diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
> index 3abe7d1f1f5..3daf4e5e1f3 100644
> --- a/gcc/config/arm/arm-c.c
> +++ b/gcc/config/arm/arm-c.c
> @@ -200,6 +200,25 @@ arm_cpu_builtins (struct cpp_reader* pfile)
>def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
>  
>def_or_undef_macro (pfile, "__ARM_ASM_SYNTAX_UNIFIED__", 
> inline_asm_unified);
> +
> +  if ((!TARGET_THUMB || TARGET_THUMB2) && arm_arch4 &&

(!TARGET_THUMB ||

[PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro

2017-06-14 Thread Prakhar Bahuguna 
The ARM ACLE defines the __ARM_FEATURE_COPROC macro which indicates which
coprocessor intrinsics are available for the target. If __ARM_FEATURE_COPROC is
undefined, the target does not support coprocessor intrinsics. The feature
levels are defined as follows:

+-+---+--+
| **Bit** | **Value** | **Intrinsics Available** |
+-+---+--+
| 0   | 0x1   | __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,  |
| |   | __arm_stcl, __arm_mcr and __arm_mrc  |
+-+---+--+
| 1   | 0x2   | __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l, |
| |   | __arm_stc2l, __arm_mcr2 and __arm_mrc2   |
+-+---+--+
| 2   | 0x4   | __arm_mcrr and __arm_mrrc|
+-+---+--+
| 3   | 0x8   | __arm_mcrr2 and __arm_mrrc2  |
+-+---+--+

This patch implements full support for this feature macro as defined in section
5.9 of the ACLE
(https://developer.arm.com/products/software-development-tools/compilers/arm-compiler-5/docs/101028/latest/5-feature-test-macros).

gcc/ChangeLog:

2017-06-14  Prakhar Bahuguna  

* config/arm/arm-c.c (arm_cpu_builtins): New block to define
 __ARM_FEATURE_COPROC according to support.

2017-06-14  Prakhar Bahuguna  
* gcc/testsuite/gcc.target/arm/acle/cdp.c: Add feature macro bitmap
test.
* gcc/testsuite/gcc.target/arm/acle/cdp2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldc2l.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/ldcl.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcr.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcr2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcrr.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mcrr2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrrc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/mrrc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stc.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stc2.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stc2l.c: Likewise.
* gcc/testsuite/gcc.target/arm/acle/stcl.c: Likewise.

Testing done: ACLE regression tests updated with tests for feature macro bits.
All regression tests pass.

Okay for trunk?

-- 

Prakhar Bahuguna
>From 79d71aec9d2bdee936b240ae49368ff5f8d8fc48 Mon Sep 17 00:00:00 2001
From: Prakhar Bahuguna 
Date: Tue, 2 May 2017 13:43:40 +0100
Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature
 macro

---
 gcc/config/arm/arm-c.c| 19 +++
 gcc/testsuite/gcc.target/arm/acle/cdp.c   |  3 +++
 gcc/testsuite/gcc.target/arm/acle/cdp2.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/ldc.c   |  3 +++
 gcc/testsuite/gcc.target/arm/acle/ldc2.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/ldc2l.c |  3 +++
 gcc/testsuite/gcc.target/arm/acle/ldcl.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mcr.c   |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mcr2.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mcrr.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mcrr2.c |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mrc.c   |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mrc2.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mrrc.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/mrrc2.c |  3 +++
 gcc/testsuite/gcc.target/arm/acle/stc.c   |  3 +++
 gcc/testsuite/gcc.target/arm/acle/stc2.c  |  3 +++
 gcc/testsuite/gcc.target/arm/acle/stc2l.c |  3 +++
 gcc/testsuite/gcc.target/arm/acle/stcl.c  |  3 +++
 19 files changed, 73 insertions(+)

diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 3abe7d1f1f5..3daf4e5e1f3 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -200,6 +200,25 @@ arm_cpu_builtins (struct cpp_reader* pfile)
   def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
 
   def_or_undef_macro (pfile, "__ARM_ASM_SYNTAX_UNIFIED__", inline_asm_unified);
+
+  if ((!TARGET_THUMB || TARGET_THUMB2) && arm_arch4 &&
+  !(arm_arch8 && arm_arch_notm))
+{
+  int coproc_level = 0x1;
+
+  if (arm_arch5)
+   coproc_level |= 0x2;
+  if (arm_arch5e)
+   coproc_level |= 0x4;
+  if (arm_arch6)
+   coproc_level |= 0x8;
+
+  builtin_define_with_int_value