Re: [PATCH, GCC/testsuite/ARM, stage4] Compile atomic_loaddi_11 for Cortex-R5
Ping? Best regards, Thomas On 23/03/17 17:09, Thomas Preudhomme wrote: My apologize, this works for both -march of -mcpu not cortex-r4 in RUNTESTFLAGS. ChangeLog entry is unchanged: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Sorry, I forgot about -march. Hold on. On 23/03/17 16:51, Thomas Preudhomme wrote: Please find attached an updated patch. ChangeLog entry unchanged: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Mmmh I probably need to add a dg-skip-if in there. Will respin the patch. Best regards, Thomas On 23/03/17 16:10, Richard Earnshaw (lists) wrote: On 23/03/17 16:02, Thomas Preudhomme wrote: Hi, gcc.target/arm/atomic_loaddi_11.c testcase contributed in r246365 does not test the changed code since ARMv7-R does not have division instructions in ARM state. This patch changes it to target Cortex-R5 processor instead which does have division instructions in ARM state. ChangeLog entry is as follows: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Will that work properly if doing multilib testing with a specific CPU target? R. diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c index 275669bd76356dc7c7b6a5373792d9a5089ede51..4ada2efd5f047154f2ca2fb39e9432c96ee1d42b 100644 --- a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_arch_v7r_ok } */ -/* { dg-options "-O2" } */ -/* { dg-add-options arm_arch_v7r } */ +/* { dg-options "-O2 -mcpu=cortex-r5" } */ #include
Re: [PATCH, GCC/testsuite/ARM, stage4] Compile atomic_loaddi_11 for Cortex-R5
My apologize, this works for both -march of -mcpu not cortex-r4 in RUNTESTFLAGS. ChangeLog entry is unchanged: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Sorry, I forgot about -march. Hold on. On 23/03/17 16:51, Thomas Preudhomme wrote: Please find attached an updated patch. ChangeLog entry unchanged: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Mmmh I probably need to add a dg-skip-if in there. Will respin the patch. Best regards, Thomas On 23/03/17 16:10, Richard Earnshaw (lists) wrote: On 23/03/17 16:02, Thomas Preudhomme wrote: Hi, gcc.target/arm/atomic_loaddi_11.c testcase contributed in r246365 does not test the changed code since ARMv7-R does not have division instructions in ARM state. This patch changes it to target Cortex-R5 processor instead which does have division instructions in ARM state. ChangeLog entry is as follows: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Will that work properly if doing multilib testing with a specific CPU target? R. diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c index 275669bd76356dc7c7b6a5373792d9a5089ede51..4ada2efd5f047154f2ca2fb39e9432c96ee1d42b 100644 --- a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_arch_v7r_ok } */ -/* { dg-options "-O2" } */ -/* { dg-add-options arm_arch_v7r } */ +/* { dg-options "-O2 -mcpu=cortex-r5" } */ #include
Re: [PATCH, GCC/testsuite/ARM, stage4] Compile atomic_loaddi_11 for Cortex-R5
Sorry, I forgot about -march. Hold on. On 23/03/17 16:51, Thomas Preudhomme wrote: Please find attached an updated patch. ChangeLog entry unchanged: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Mmmh I probably need to add a dg-skip-if in there. Will respin the patch. Best regards, Thomas On 23/03/17 16:10, Richard Earnshaw (lists) wrote: On 23/03/17 16:02, Thomas Preudhomme wrote: Hi, gcc.target/arm/atomic_loaddi_11.c testcase contributed in r246365 does not test the changed code since ARMv7-R does not have division instructions in ARM state. This patch changes it to target Cortex-R5 processor instead which does have division instructions in ARM state. ChangeLog entry is as follows: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Will that work properly if doing multilib testing with a specific CPU target? R.
Re: [PATCH, GCC/testsuite/ARM, stage4] Compile atomic_loaddi_11 for Cortex-R5
Please find attached an updated patch. ChangeLog entry unchanged: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Mmmh I probably need to add a dg-skip-if in there. Will respin the patch. Best regards, Thomas On 23/03/17 16:10, Richard Earnshaw (lists) wrote: On 23/03/17 16:02, Thomas Preudhomme wrote: Hi, gcc.target/arm/atomic_loaddi_11.c testcase contributed in r246365 does not test the changed code since ARMv7-R does not have division instructions in ARM state. This patch changes it to target Cortex-R5 processor instead which does have division instructions in ARM state. ChangeLog entry is as follows: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Will that work properly if doing multilib testing with a specific CPU target? R. diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c index 275669bd76356dc7c7b6a5373792d9a5089ede51..4ada2efd5f047154f2ca2fb39e9432c96ee1d42b 100644 --- a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_arch_v7r_ok } */ -/* { dg-options "-O2" } */ -/* { dg-add-options arm_arch_v7r } */ +/* { dg-options "-O2 -mcpu=cortex-r5" } */ #include
Re: [PATCH, GCC/testsuite/ARM, stage4] Compile atomic_loaddi_11 for Cortex-R5
Mmmh I probably need to add a dg-skip-if in there. Will respin the patch. Best regards, Thomas On 23/03/17 16:10, Richard Earnshaw (lists) wrote: On 23/03/17 16:02, Thomas Preudhomme wrote: Hi, gcc.target/arm/atomic_loaddi_11.c testcase contributed in r246365 does not test the changed code since ARMv7-R does not have division instructions in ARM state. This patch changes it to target Cortex-R5 processor instead which does have division instructions in ARM state. ChangeLog entry is as follows: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme Will that work properly if doing multilib testing with a specific CPU target? R.
Re: [PATCH, GCC/testsuite/ARM, stage4] Compile atomic_loaddi_11 for Cortex-R5
On 23/03/17 16:02, Thomas Preudhomme wrote: > Hi, > > gcc.target/arm/atomic_loaddi_11.c testcase contributed in r246365 does > not test the changed code since ARMv7-R does not have division > instructions in ARM state. This patch changes it to target Cortex-R5 > processor instead which does have division instructions in ARM state. > > ChangeLog entry is as follows: > > *** gcc/testsuite/ChangeLog *** > > 2017-03-22 Thomas Preud'homme > PR target/80082 > * gcc.target/arm/atomic_loaddi_11.c: Target Cortex-R5 instead of > ARMv7-R. > > Is this ok for stage4? > > Best regards, > > Thomas > > atomic_loaddi_11_cortexr5.patch > > > diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c > b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c > index > 275669bd76356dc7c7b6a5373792d9a5089ede51..4ada2efd5f047154f2ca2fb39e9432c96ee1d42b > 100644 > --- a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c > +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c > @@ -1,7 +1,6 @@ > /* { dg-do compile } */ > /* { dg-require-effective-target arm_arch_v7r_ok } */ > -/* { dg-options "-O2" } */ > -/* { dg-add-options arm_arch_v7r } */ > +/* { dg-options "-O2 -mcpu=cortex-r5" } */ > > #include > > Will that work properly if doing multilib testing with a specific CPU target? R.
[PATCH, GCC/testsuite/ARM, stage4] Compile atomic_loaddi_11 for Cortex-R5
Hi, gcc.target/arm/atomic_loaddi_11.c testcase contributed in r246365 does not test the changed code since ARMv7-R does not have division instructions in ARM state. This patch changes it to target Cortex-R5 processor instead which does have division instructions in ARM state. ChangeLog entry is as follows: *** gcc/testsuite/ChangeLog *** 2017-03-22 Thomas Preud'homme diff --git a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c index 275669bd76356dc7c7b6a5373792d9a5089ede51..4ada2efd5f047154f2ca2fb39e9432c96ee1d42b 100644 --- a/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c +++ b/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_arch_v7r_ok } */ -/* { dg-options "-O2" } */ -/* { dg-add-options arm_arch_v7r } */ +/* { dg-options "-O2 -mcpu=cortex-r5" } */ #include