[PATCH, i386]: Use reg_or_subregno in int-float splitters

2011-11-01 Thread Uros Bizjak 
Hello!

We have a nice utility function that can be used in int-float
splitter constraints.

2011-11-01  Uros Bizjak  ubiz...@gmail.com

* config/i386/i386.md (splitters for int-float conversion): Use
reg_or_subregno in splitter constraints.

Bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32},
committed to mainline SVN.

Uros.
Index: i386.md
===
--- i386.md (revision 180742)
+++ i386.md (working copy)
@@ -4920,9 +4920,7 @@
 SSE_FLOAT_MODE_P (MODEF:MODEmode)  TARGET_MIX_SSE_I387
 TARGET_INTER_UNIT_CONVERSIONS
 reload_completed
-(SSE_REG_P (operands[0])
-   || (GET_CODE (operands[0]) == SUBREG
-   SSE_REG_P (operands[0])))
+SSE_REGNO_P (reg_or_subregno (operands[0]))
   [(set (match_dup 0) (float:MODEF (match_dup 1)))])
 
 (define_split
@@ -4933,9 +4931,7 @@
 SSE_FLOAT_MODE_P (MODEF:MODEmode)  TARGET_MIX_SSE_I387
 !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
 reload_completed
-(SSE_REG_P (operands[0])
-   || (GET_CODE (operands[0]) == SUBREG
-   SSE_REG_P (operands[0])))
+SSE_REGNO_P (reg_or_subregno (operands[0]))
   [(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (float:MODEF (match_dup 2)))])
 
@@ -5024,9 +5020,7 @@
   TARGET_SSE2  TARGET_SSE_MATH
 TARGET_USE_VECTOR_CONVERTS  optimize_function_for_speed_p (cfun)
 reload_completed
-(SSE_REG_P (operands[0])
-   || (GET_CODE (operands[0]) == SUBREG
-   SSE_REG_P (operands[0])))
+SSE_REGNO_P (reg_or_subregno (operands[0]))
   [(const_int 0)]
 {
   rtx op1 = operands[1];
@@ -5067,9 +5061,7 @@
   TARGET_SSE2  TARGET_SSE_MATH
 TARGET_USE_VECTOR_CONVERTS  optimize_function_for_speed_p (cfun)
 reload_completed
-(SSE_REG_P (operands[0])
-   || (GET_CODE (operands[0]) == SUBREG
-   SSE_REG_P (operands[0])))
+SSE_REGNO_P (reg_or_subregno (operands[0]))
   [(const_int 0)]
 {
   operands[3] = simplify_gen_subreg (ssevecmodemode, operands[0],
@@ -5091,9 +5083,7 @@
   TARGET_SSE2  TARGET_SSE_MATH
 TARGET_USE_VECTOR_CONVERTS  optimize_function_for_speed_p (cfun)
 reload_completed
-(SSE_REG_P (operands[0])
-   || (GET_CODE (operands[0]) == SUBREG
-   SSE_REG_P (operands[0])))
+SSE_REGNO_P (reg_or_subregno (operands[0]))
   [(const_int 0)]
 {
   rtx op1 = operands[1];
@@ -5137,9 +5127,7 @@
   TARGET_SSE2  TARGET_SSE_MATH
 TARGET_USE_VECTOR_CONVERTS  optimize_function_for_speed_p (cfun)
 reload_completed
-(SSE_REG_P (operands[0])
-   || (GET_CODE (operands[0]) == SUBREG
-   SSE_REG_P (operands[0])))
+SSE_REGNO_P (reg_or_subregno (operands[0]))
   [(const_int 0)]
 {
   operands[3] = simplify_gen_subreg (ssevecmodemode, operands[0],
@@ -5200,9 +5188,7 @@
 SSE_FLOAT_MODE_P (MODEF:MODEmode)  TARGET_SSE_MATH
 (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
 reload_completed
-(SSE_REG_P (operands[0])
-   || (GET_CODE (operands[0]) == SUBREG
-   SSE_REG_P (operands[0])))
+SSE_REGNO_P (reg_or_subregno (operands[0]))
   [(set (match_dup 0) (float:MODEF (match_dup 1)))])
 
 (define_insn *floatSWI48x:modeMODEF:mode2_sse_nointerunit
@@ -5235,9 +5221,7 @@
 SSE_FLOAT_MODE_P (MODEF:MODEmode)  TARGET_SSE_MATH
 !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
 reload_completed
-(SSE_REG_P (operands[0])
-   || (GET_CODE (operands[0]) == SUBREG
-   SSE_REG_P (operands[0])))
+SSE_REGNO_P (reg_or_subregno (operands[0]))
   [(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (float:MODEF (match_dup 2)))])
 
@@ -5248,9 +5232,7 @@
   (SWI48x:MODEmode != DImode || TARGET_64BIT)
 SSE_FLOAT_MODE_P (MODEF:MODEmode)  TARGET_SSE_MATH
 reload_completed
-(SSE_REG_P (operands[0])
-   || (GET_CODE (operands[0]) == SUBREG
-   SSE_REG_P (operands[0])))
+SSE_REGNO_P (reg_or_subregno (operands[0]))
   [(set (match_dup 0) (float:MODEF (match_dup 1)))])
 
 (define_insn *floatSWI48x:modeX87MODEF:mode2_i387_with_temp

Re: [PATCH, i386]: Use reg_or_subregno in int-float splitters

2011-11-01 Thread Jakub Jelinek 
On Tue, Nov 01, 2011 at 10:33:07PM +0100, Uros Bizjak wrote:
 We have a nice utility function that can be used in int-float
 splitter constraints.
 
 2011-11-01  Uros Bizjak  ubiz...@gmail.com
 
   * config/i386/i386.md (splitters for int-float conversion): Use
   reg_or_subregno in splitter constraints.
 
 Bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32},
 committed to mainline SVN.

Unfortunately reg_or_subregno is an external non-inline function,
doesn't have pure attribute and SSE_REGNO_P macro evaluates its argument
twice, which means the function is called multiple times.

Jakub

Re: [PATCH, i386]: Use reg_or_subregno in int-float splitters

2011-11-01 Thread Uros Bizjak 
On Tue, Nov 1, 2011 at 11:00 PM, Jakub Jelinek ja...@redhat.com wrote:
 On Tue, Nov 01, 2011 at 10:33:07PM +0100, Uros Bizjak wrote:
 We have a nice utility function that can be used in int-float
 splitter constraints.

 2011-11-01  Uros Bizjak  ubiz...@gmail.com

       * config/i386/i386.md (splitters for int-float conversion): Use
       reg_or_subregno in splitter constraints.

 Bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32},
 committed to mainline SVN.

 Unfortunately reg_or_subregno is an external non-inline function,
 doesn't have pure attribute and SSE_REGNO_P macro evaluates its argument
 twice, which means the function is called multiple times.

You are right. :(

On a second look, we are missing SUBREG_REG on subregs, the constraint
should read:

(SSE_REG_P (operands[0])
   || (GET_CODE (operands[0]) == SUBREG
SSE_REG_P (SUBREG_REG (operands[0])))

I will do a partial revert with additional fix.

2011-11-01  Uros Bizjak  ubiz...@gmail.com

* config/i386/i386.md (splitters for int-float conversion): Use
SUBREG_REG on SUBREGs in splitter constraints.


Bootstrap and regression test in progress.

Thanks,
Uros.
Index: i386.md
===
--- i386.md (revision 180745)
+++ i386.md (working copy)
@@ -4920,7 +4920,9 @@
 SSE_FLOAT_MODE_P (MODEF:MODEmode)  TARGET_MIX_SSE_I387
 TARGET_INTER_UNIT_CONVERSIONS
 reload_completed
-SSE_REGNO_P (reg_or_subregno (operands[0]))
+(SSE_REG_P (operands[0])
+   || (GET_CODE (operands[0]) == SUBREG
+   SSE_REG_P (SUBREG_REG (operands[0]
   [(set (match_dup 0) (float:MODEF (match_dup 1)))])
 
 (define_split
@@ -4931,7 +4933,9 @@
 SSE_FLOAT_MODE_P (MODEF:MODEmode)  TARGET_MIX_SSE_I387
 !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
 reload_completed
-SSE_REGNO_P (reg_or_subregno (operands[0]))
+(SSE_REG_P (operands[0])
+   || (GET_CODE (operands[0]) == SUBREG
+   SSE_REG_P (SUBREG_REG (operands[0]
   [(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (float:MODEF (match_dup 2)))])
 
@@ -5020,7 +5024,9 @@
   TARGET_SSE2  TARGET_SSE_MATH
 TARGET_USE_VECTOR_CONVERTS  optimize_function_for_speed_p (cfun)
 reload_completed
-SSE_REGNO_P (reg_or_subregno (operands[0]))
+(SSE_REG_P (operands[0])
+   || (GET_CODE (operands[0]) == SUBREG
+   SSE_REG_P (SUBREG_REG (operands[0]
   [(const_int 0)]
 {
   rtx op1 = operands[1];
@@ -5061,7 +5067,9 @@
   TARGET_SSE2  TARGET_SSE_MATH
 TARGET_USE_VECTOR_CONVERTS  optimize_function_for_speed_p (cfun)
 reload_completed
-SSE_REGNO_P (reg_or_subregno (operands[0]))
+(SSE_REG_P (operands[0])
+   || (GET_CODE (operands[0]) == SUBREG
+   SSE_REG_P (SUBREG_REG (operands[0]
   [(const_int 0)]
 {
   operands[3] = simplify_gen_subreg (ssevecmodemode, operands[0],
@@ -5083,7 +5091,9 @@
   TARGET_SSE2  TARGET_SSE_MATH
 TARGET_USE_VECTOR_CONVERTS  optimize_function_for_speed_p (cfun)
 reload_completed
-SSE_REGNO_P (reg_or_subregno (operands[0]))
+(SSE_REG_P (operands[0])
+   || (GET_CODE (operands[0]) == SUBREG
+   SSE_REG_P (SUBREG_REG (operands[0]
   [(const_int 0)]
 {
   rtx op1 = operands[1];
@@ -5127,7 +5137,9 @@
   TARGET_SSE2  TARGET_SSE_MATH
 TARGET_USE_VECTOR_CONVERTS  optimize_function_for_speed_p (cfun)
 reload_completed
-SSE_REGNO_P (reg_or_subregno (operands[0]))
+(SSE_REG_P (operands[0])
+   || (GET_CODE (operands[0]) == SUBREG
+   SSE_REG_P (SUBREG_REG (operands[0]
   [(const_int 0)]
 {
   operands[3] = simplify_gen_subreg (ssevecmodemode, operands[0],
@@ -5188,7 +5200,9 @@
 SSE_FLOAT_MODE_P (MODEF:MODEmode)  TARGET_SSE_MATH
 (TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
 reload_completed
-SSE_REGNO_P (reg_or_subregno (operands[0]))
+(SSE_REG_P (operands[0])
+   || (GET_CODE (operands[0]) == SUBREG
+   SSE_REG_P (SUBREG_REG (operands[0]
   [(set (match_dup 0) (float:MODEF (match_dup 1)))])
 
 (define_insn *floatSWI48x:modeMODEF:mode2_sse_nointerunit
@@ -5221,7 +5235,9 @@
 SSE_FLOAT_MODE_P (MODEF:MODEmode)  TARGET_SSE_MATH
 !(TARGET_INTER_UNIT_CONVERSIONS || optimize_function_for_size_p (cfun))
 reload_completed
-SSE_REGNO_P (reg_or_subregno (operands[0]))
+(SSE_REG_P (operands[0])
+   || (GET_CODE (operands[0]) == SUBREG
+   SSE_REG_P (SUBREG_REG (operands[0]
   [(set (match_dup 2) (match_dup 1))
(set (match_dup 0) (float:MODEF (match_dup 2)))])
 
@@ -5232,7 +5248,9 @@
   (SWI48x:MODEmode != DImode || TARGET_64BIT)
 SSE_FLOAT_MODE_P (MODEF:MODEmode)  TARGET_SSE_MATH
 reload_completed
-SSE_REGNO_P (reg_or_subregno (operands[0]))
+(SSE_REG_P (operands[0])
+   || (GET_CODE (operands[0]) == SUBREG
+   SSE_REG_P (SUBREG_REG (operands[0]
   [(set (match_dup 0)