Re: [PATCH][doc] Update documentation of AArch64 options

2016-04-24 Thread Sandra Loosemore 

On 04/22/2016 11:11 AM, Wilco Dijkstra wrote:


[snip]

Fixed, new version below:


2016-04-22  Wilco Dijkstra  

gcc/
* gcc/doc/invoke.texi (AArch64 Options): Update.


Thanks, this looks much better.

-Sandra

Re: [PATCH][doc] Update documentation of AArch64 options

2016-04-22 Thread Wilco Dijkstra 
Sandra Loosemore wrote:
>
> Can you please change all the incorrectly hyphenated "32-bit" and
> "64-bit" uses in this section to "32 bits" and "64 bits" respectively?
> ("n-bit" should only be hyphenated when it is used as an adjective
> phrase immediately before the noun it modifies.)

No problem, all cases in the AArch64 section have been fixed. 

> The new text seems repetitive and awkward to me.  How about something like:
> 
> Avoid generating memory accesses that may not be aligned on a natural
> object boundary as described in the architecture specification.

Thanks, I've used that.

> +@option{-funsafe-math-optimizations} is used as well.  Enabling this reduces
> +precision of reciprocal square root results to about 16 bits for
> +single-precision and to 32 bits for double-precision.

Fixed (an earlier version had "floating point" at the end, but that seemed 
superfluous).

>>   @item -mpc-relative-literal-loads
>>   @opindex mpcrelativeliteralloads
>
> What happened to that @opindex entry?  :-(

Fixed (and mlow-precision-recip-sqrt too)

How about a @itemindex that automatically does the right thing?

>> +Enable PC relative literal loads.  With this option literal pools are

Fixed, new version below:


2016-04-22  Wilco Dijkstra  

gcc/
* gcc/doc/invoke.texi (AArch64 Options): Update.
--

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 
8ec6b092be55f1ac629df447c3aeb8ca100508dc..0d7eb566442c57f73083c3b79f3769d5910df388
 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12827,9 +12827,9 @@ These options are defined for AArch64 implementations:
 @item -mabi=@var{name}
 @opindex mabi
 Generate code for the specified data model.  Permissible values
-are @samp{ilp32} for SysV-like data model where int, long int and pointer
-are 32-bit, and @samp{lp64} for SysV-like data model where int is 32-bit,
-but long int and pointer are 64-bit.
+are @samp{ilp32} for SysV-like data model where int, long int and pointers
+are 32 bits, and @samp{lp64} for SysV-like data model where int is 32 bits,
+but long int and pointers are 64 bits.
 
 The default depends on the specific target configuration.  Note that
 the LP64 and ILP32 ABIs are not link-compatible; you must compile your
@@ -12854,25 +12854,24 @@ Generate little-endian code.  This is the default 
when GCC is configured for an
 @item -mcmodel=tiny
 @opindex mcmodel=tiny
 Generate code for the tiny code model.  The program and its statically defined
-symbols must be within 1GB of each other.  Pointers are 64 bits.  Programs can
-be statically or dynamically linked.  This model is not fully implemented and
-mostly treated as @samp{small}.
+symbols must be within 1MB of each other.  Programs can be statically or
+dynamically linked.
 
 @item -mcmodel=small
 @opindex mcmodel=small
 Generate code for the small code model.  The program and its statically defined
-symbols must be within 4GB of each other.  Pointers are 64 bits.  Programs can
-be statically or dynamically linked.  This is the default code model.
+symbols must be within 4GB of each other.  Programs can be statically or
+dynamically linked.  This is the default code model.
 
 @item -mcmodel=large
 @opindex mcmodel=large
 Generate code for the large code model.  This makes no assumptions about
-addresses and sizes of sections.  Pointers are 64 bits.  Programs can be
-statically linked only.
+addresses and sizes of sections.  Programs can be statically linked only.
 
 @item -mstrict-align
 @opindex mstrict-align
-Do not assume that unaligned memory references are handled by the system.
+Avoid generating memory accesses that may not be aligned on a natural object
+boundary as described in the architecture specification.
 
 @item -momit-leaf-frame-pointer
 @itemx -mno-omit-leaf-frame-pointer
@@ -12894,7 +12893,7 @@ of TLS variables.
 @item -mtls-size=@var{size}
 @opindex mtls-size
 Specify bit size of immediate TLS offsets.  Valid values are 12, 24, 32, 48.
-This option depends on binutils higher than 2.25.
+This option requires binutils 2.26 or newer.
 
 @item -mfix-cortex-a53-835769
 @itemx -mno-fix-cortex-a53-835769
@@ -12914,12 +12913,13 @@ corresponding flag to the linker.
 
 @item -mlow-precision-recip-sqrt
 @item -mno-low-precision-recip-sqrt
-@opindex -mlow-precision-recip-sqrt
-@opindex -mno-low-precision-recip-sqrt
-When calculating the reciprocal square root approximation,
-uses one less step than otherwise, thus reducing latency and precision.
-This is only relevant if @option{-ffast-math} enables the reciprocal square 
root
-approximation, which in turn depends on the target processor.
+@opindex mlow-precision-recip-sqrt
+@opindex mno-low-precision-recip-sqrt
+Enable or disable reciprocal square root approximation.
+This option only has an effect if @option{-ffast-math} or
+@option{-funsafe-math-optimizations} is used as well.  Enabling this reduces
+precision of reciprocal square root results to about 16 bits for
+single precision and to 32

Re: [PATCH][doc] Update documentation of AArch64 options

2016-04-21 Thread Sandra Loosemore 

On 04/21/2016 10:26 AM, Wilco Dijkstra wrote:


diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 
e9763d44d8d7aa6a64821a4b1811e550254e..ddd4eeaec1502f871d0febd6045e37153c48a7e1
 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12827,9 +12827,9 @@ These options are defined for AArch64 implementations:
  @item -mabi=@var{name}
  @opindex mabi
  Generate code for the specified data model.  Permissible values
-are @samp{ilp32} for SysV-like data model where int, long int and pointer
+are @samp{ilp32} for SysV-like data model where int, long int and pointers
  are 32-bit, and @samp{lp64} for SysV-like data model where int is 32-bit,
-but long int and pointer are 64-bit.
+but long int and pointers are 64-bit.


Can you please change all the incorrectly hyphenated "32-bit" and 
"64-bit" uses in this section to "32 bits" and "64 bits" respectively? 
("n-bit" should only be hyphenated when it is used as an adjective 
phrase immediately before the noun it modifies.)



@@ -12872,7 +12871,8 @@ statically linked only.

  @item -mstrict-align
  @opindex mstrict-align
-Do not assume that unaligned memory references are handled by the system.
+Avoid generating unaligned accesses when accessing objects at non-naturally
+aligned boundaries as described in the architecture.


The new text seems repetitive and awkward to me.  How about something like:

Avoid generating memory accesses that may not be aligned on a natural 
object boundary as described in the architecture specification.


??


@@ -12916,10 +12916,11 @@ corresponding flag to the linker.
  @item -mno-low-precision-recip-sqrt
  @opindex -mlow-precision-recip-sqrt
  @opindex -mno-low-precision-recip-sqrt
-When calculating the reciprocal square root approximation,
-uses one less step than otherwise, thus reducing latency and precision.
-This is only relevant if @option{-ffast-math} enables the reciprocal square 
root
-approximation, which in turn depends on the target processor.
+Enable or disable reciprocal square root approximation.
+This option only has an effect if @option{-ffast-math} or
+@option{-funsafe-math-optimizations} is used as well.  Enabling this reduces
+precision of reciprocal square root results to about 16 bits for
+single-precision and to 32 bits for double-precision.


"single precision" and "double precision" should not be hyphenated when 
used as nouns, as they are here (only when used as an adjective phrase 
immediately before the noun they modify).



@@ -13010,10 +13003,10 @@ This option is only intended to be useful when 
developing GCC.

  @item -mpc-relative-literal-loads
  @opindex mpcrelativeliteralloads


What happened to that @opindex entry?  :-(


-Enable PC relative literal loads. If this option is used, literal
-pools are assumed to have a range of up to 1MiB and an appropriate
-instruction sequence is used. This option has no impact when used
-with @option{-mcmodel=tiny}.
+Enable PC relative literal loads.  With this option literal pools are


"PC-relative" should be hyphenated since this *is* and adjective phrase 
immediately before the noun it modifies


-Sandra the nit-picky

[PATCH][doc] Update documentation of AArch64 options

2016-04-21 Thread Wilco Dijkstra 
Update documentation of AArch64 options for GCC6 to be more accurate, 
fix a few minor mistakes and remove some duplication.

Tested with "make info dvi pdf html" and checked resulting PDF is as expected.

OK for trunk and backport to GCC6.1 branch?

ChangeLog:
2016-04-21  Wilco Dijkstra  

gcc/
* gcc/doc/invoke.texi (AArch64 Options): Update.


--

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 
e9763d44d8d7aa6a64821a4b1811e550254e..ddd4eeaec1502f871d0febd6045e37153c48a7e1
 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12827,9 +12827,9 @@ These options are defined for AArch64 implementations:
 @item -mabi=@var{name}
 @opindex mabi
 Generate code for the specified data model.  Permissible values
-are @samp{ilp32} for SysV-like data model where int, long int and pointer
+are @samp{ilp32} for SysV-like data model where int, long int and pointers
 are 32-bit, and @samp{lp64} for SysV-like data model where int is 32-bit,
-but long int and pointer are 64-bit.
+but long int and pointers are 64-bit.
 
 The default depends on the specific target configuration.  Note that
 the LP64 and ILP32 ABIs are not link-compatible; you must compile your
@@ -12854,9 +12854,8 @@ Generate little-endian code.  This is the default when 
GCC is configured for an
 @item -mcmodel=tiny
 @opindex mcmodel=tiny
 Generate code for the tiny code model.  The program and its statically defined
-symbols must be within 1GB of each other.  Pointers are 64 bits.  Programs can
-be statically or dynamically linked.  This model is not fully implemented and
-mostly treated as @samp{small}.
+symbols must be within 1MB of each other.  Pointers are 64 bits.  Programs can
+be statically or dynamically linked.
 
 @item -mcmodel=small
 @opindex mcmodel=small
@@ -12872,7 +12871,8 @@ statically linked only.
 
 @item -mstrict-align
 @opindex mstrict-align
-Do not assume that unaligned memory references are handled by the system.
+Avoid generating unaligned accesses when accessing objects at non-naturally
+aligned boundaries as described in the architecture.
 
 @item -momit-leaf-frame-pointer
 @itemx -mno-omit-leaf-frame-pointer
@@ -12894,7 +12894,7 @@ of TLS variables.
 @item -mtls-size=@var{size}
 @opindex mtls-size
 Specify bit size of immediate TLS offsets.  Valid values are 12, 24, 32, 48.
-This option depends on binutils higher than 2.25.
+This option requires binutils 2.26 or newer.
 
 @item -mfix-cortex-a53-835769
 @itemx -mno-fix-cortex-a53-835769
@@ -12916,10 +12916,11 @@ corresponding flag to the linker.
 @item -mno-low-precision-recip-sqrt
 @opindex -mlow-precision-recip-sqrt
 @opindex -mno-low-precision-recip-sqrt
-When calculating the reciprocal square root approximation,
-uses one less step than otherwise, thus reducing latency and precision.
-This is only relevant if @option{-ffast-math} enables the reciprocal square 
root
-approximation, which in turn depends on the target processor.
+Enable or disable reciprocal square root approximation.
+This option only has an effect if @option{-ffast-math} or
+@option{-funsafe-math-optimizations} is used as well.  Enabling this reduces
+precision of reciprocal square root results to about 16 bits for
+single-precision and to 32 bits for double-precision.
 
 @item -march=@var{name}
 @opindex march
@@ -12956,17 +12957,15 @@ Specify the name of the target processor for which 
GCC should tune the
 performance of the code.  Permissible values for this option are:
 @samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57},
 @samp{cortex-a72}, @samp{exynos-m1}, @samp{qdf24xx}, @samp{thunderx},
-@samp{xgene1}.
+@samp{xgene1}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
+@samp{native}.
 
-Additionally, this option can specify that GCC should tune the performance
-of the code for a big.LITTLE system.  Permissible values for this
-option are: @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}.
+The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}
+specify that GCC should tune for a big.LITTLE system.
 
 Additionally on native AArch64 GNU/Linux systems the value
-@samp{native} is available.  This option causes the compiler to pick
-the architecture of and tune the performance of the code for the
-processor of the host system.  This option has no effect if the
-compiler is unable to recognize the architecture of the host system.
+@samp{native} tunes performance to the host system.  This option has no effect
+if the compiler is unable to recognize the processor of the host system.
 
 Where none of @option{-mtune=}, @option{-mcpu=} or @option{-march=}
 are specified, the code is tuned to perform well across a range
@@ -12986,12 +12985,6 @@ documented in the sub-section on
 Feature Modifiers}.  Where conflicting feature modifiers are
 specified, the right-most feature is used.
 
-Additionally on native AArch64 GNU/Linux systems the value
-@samp{native} is available.  This option causes the compiler to