Re: [PATCH][x86] Add clwb,pcommit,avx512avbmi,avx512ifma.

2014-11-21 Thread Ilya Tocar 
On 20 Nov 09:43, Uros Bizjak wrote:
 On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
  Hi,
 
  New revision of Intel ISA reference [1] has new instructions:
  Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
  I understand that stage 1 is closed, however those changes shouldn't
  affect anything outside if i386 backend. And are extremely unlikely to
  break existing functionality, and I personally think it's desirable for
  newest GCC to support newest spec.
  Bootstrapped/regtestsed on x86_64-unknown-linux-gnu.
  Ok for trunk?
 
 Please split the patch into patch series, like it was done previously
 for AVX512F patches.
 
 Uros.
 
  [1]:https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf
 

This part adds pcommit.
Bootstrapps/passes make check.
Ok for trunk?

gcc/


* common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET,
OPTION_MASK_ISA_PCOMMIT_SET): New.
(ix86_handle_option): Handle OPT_mpcommit.
* config.gcc: Add pcommitintrin.h
* config/i386/pcommitintrin.h: New file.
* config/i386/cpuid.h (bit_PCOMMIT): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect pcommit.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__PCOMMIT__.
* config/i386/i386.c (ix86_target_string): Add -mpcommit.
(PTA_PCOMMIT): Define.
(ix86_option_override_internal): Handle new option.
(ix86_valid_target_attribute_inner_p): Add pcommit.
(ix86_builtins): Add IX86_BUILTIN_PCOMMIT.
(bdesc_special_args): Add __builtin_ia32_pcommit.
* config/i386/i386.h (TARGET_PCOMMIT, TARGET_PCOMMIT_P): Define.
* config/i386/i386.md (unspecv): Add UNSPECV_PCOMMIT.
(pcommit): New instruction.
* config/i386/i386.opt: Add mpcommit.
* config/i386/x86intrin.h: Include pcommitintrin.h.

 
---
 gcc/common/config/i386/i386-common.c  | 15 ++
 gcc/config.gcc|  4 +--
 gcc/config/i386/cpuid.h   |  1 +
 gcc/config/i386/driver-i386.c |  5 +++-
 gcc/config/i386/i386-c.c  |  2 ++
 gcc/config/i386/i386.c| 12 
 gcc/config/i386/i386.h|  2 ++
 gcc/config/i386/i386.md   | 10 +++
 gcc/config/i386/i386.opt  |  4 +++
 gcc/config/i386/pcommitintrin.h   | 49 +++
 gcc/config/i386/x86intrin.h   |  2 ++
 gcc/testsuite/g++.dg/other/i386-2.C   |  2 +-
 gcc/testsuite/g++.dg/other/i386-3.C   |  2 +-
 gcc/testsuite/gcc.target/i386/pcommit-1.c | 11 +++
 gcc/testsuite/gcc.target/i386/sse-12.c|  2 +-
 gcc/testsuite/gcc.target/i386/sse-13.c|  2 +-
 gcc/testsuite/gcc.target/i386/sse-14.c|  2 +-
 gcc/testsuite/gcc.target/i386/sse-22.c|  2 +-
 gcc/testsuite/gcc.target/i386/sse-23.c|  2 +-
 19 files changed, 121 insertions(+), 10 deletions(-)
 create mode 100644 gcc/config/i386/pcommitintrin.h
 create mode 100644 gcc/testsuite/gcc.target/i386/pcommit-1.c

diff --git a/gcc/common/config/i386/i386-common.c 
b/gcc/common/config/i386/i386-common.c
index bad0988..2e09d77 100644
--- a/gcc/common/config/i386/i386-common.c
+++ b/gcc/common/config/i386/i386-common.c
@@ -86,6 +86,7 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA_XSAVEC_SET \
   (OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_XSAVE)
 #define OPTION_MASK_ISA_CLWB_SET OPTION_MASK_ISA_CLWB
+#define OPTION_MASK_ISA_PCOMMIT_SET OPTION_MASK_ISA_PCOMMIT
 
 /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
as -msse4.2.  */
@@ -182,6 +183,7 @@ along with GCC; see the file COPYING3.  If not see
 #define OPTION_MASK_ISA_CLFLUSHOPT_UNSET OPTION_MASK_ISA_CLFLUSHOPT
 #define OPTION_MASK_ISA_XSAVEC_UNSET OPTION_MASK_ISA_XSAVEC
 #define OPTION_MASK_ISA_XSAVES_UNSET OPTION_MASK_ISA_XSAVES
+#define OPTION_MASK_ISA_PCOMMIT_UNSET OPTION_MASK_ISA_PCOMMIT
 #define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB
 
 /* SSE4 includes both SSE4.1 and SSE4.2.  -mno-sse4 should the same
@@ -903,6 +905,19 @@ ix86_handle_option (struct gcc_options *opts,
}
   return true;
 
+case OPT_mpcommit:
+  if (value)
+   {
+ opts-x_ix86_isa_flags |= OPTION_MASK_ISA_PCOMMIT_SET;
+ opts-x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCOMMIT_SET;
+   }
+  else
+   {
+ opts-x_ix86_isa_flags = ~OPTION_MASK_ISA_PCOMMIT_UNSET;
+ opts-x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCOMMIT_UNSET;
+   }
+  return true;
+
 case OPT_mclwb:
   if (value)
{
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 766f13b..fa3e1fc 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -369,7 +369,7 @@ i[34567]86-*-*)
   xsavesintrin.h avx512dqintrin.h avx512bwintrin.h
   avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h

Re: [PATCH][x86] Add clwb,pcommit,avx512avbmi,avx512ifma.

2014-11-21 Thread Uros Bizjak 
On Fri, Nov 21, 2014 at 12:50 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
 On 20 Nov 09:43, Uros Bizjak wrote:
 On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
  Hi,
 
  New revision of Intel ISA reference [1] has new instructions:
  Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
  I understand that stage 1 is closed, however those changes shouldn't
  affect anything outside if i386 backend. And are extremely unlikely to
  break existing functionality, and I personally think it's desirable for
  newest GCC to support newest spec.
  Bootstrapped/regtestsed on x86_64-unknown-linux-gnu.
  Ok for trunk?

 Please split the patch into patch series, like it was done previously
 for AVX512F patches.

 Uros.

  [1]:https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf
 

 This part adds pcommit.
 Bootstrapps/passes make check.
 Ok for trunk?

 gcc/


 * common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET,
 OPTION_MASK_ISA_PCOMMIT_SET): New.
 (ix86_handle_option): Handle OPT_mpcommit.
 * config.gcc: Add pcommitintrin.h
 * config/i386/pcommitintrin.h: New file.
 * config/i386/cpuid.h (bit_PCOMMIT): Define.
 * config/i386/driver-i386.c (host_detect_local_cpu): Detect pcommit.
 * config/i386/i386-c.c (ix86_target_macros_internal): Define
 __PCOMMIT__.
 * config/i386/i386.c (ix86_target_string): Add -mpcommit.
 (PTA_PCOMMIT): Define.
 (ix86_option_override_internal): Handle new option.
 (ix86_valid_target_attribute_inner_p): Add pcommit.
 (ix86_builtins): Add IX86_BUILTIN_PCOMMIT.
 (bdesc_special_args): Add __builtin_ia32_pcommit.
 * config/i386/i386.h (TARGET_PCOMMIT, TARGET_PCOMMIT_P): Define.
 * config/i386/i386.md (unspecv): Add UNSPECV_PCOMMIT.
 (pcommit): New instruction.
 * config/i386/i386.opt: Add mpcommit.
 * config/i386/x86intrin.h: Include pcommitintrin.h.

OK with a small typo fix below.

Thanks,
Uros.


 ---
  gcc/common/config/i386/i386-common.c  | 15 ++
  gcc/config.gcc|  4 +--
  gcc/config/i386/cpuid.h   |  1 +
  gcc/config/i386/driver-i386.c |  5 +++-
  gcc/config/i386/i386-c.c  |  2 ++
  gcc/config/i386/i386.c| 12 
  gcc/config/i386/i386.h|  2 ++
  gcc/config/i386/i386.md   | 10 +++
  gcc/config/i386/i386.opt  |  4 +++
  gcc/config/i386/pcommitintrin.h   | 49 
 +++
  gcc/config/i386/x86intrin.h   |  2 ++
  gcc/testsuite/g++.dg/other/i386-2.C   |  2 +-
  gcc/testsuite/g++.dg/other/i386-3.C   |  2 +-
  gcc/testsuite/gcc.target/i386/pcommit-1.c | 11 +++
  gcc/testsuite/gcc.target/i386/sse-12.c|  2 +-
  gcc/testsuite/gcc.target/i386/sse-13.c|  2 +-
  gcc/testsuite/gcc.target/i386/sse-14.c|  2 +-
  gcc/testsuite/gcc.target/i386/sse-22.c|  2 +-
  gcc/testsuite/gcc.target/i386/sse-23.c|  2 +-
  19 files changed, 121 insertions(+), 10 deletions(-)
  create mode 100644 gcc/config/i386/pcommitintrin.h
  create mode 100644 gcc/testsuite/gcc.target/i386/pcommit-1.c

 diff --git a/gcc/common/config/i386/i386-common.c 
 b/gcc/common/config/i386/i386-common.c
 index bad0988..2e09d77 100644
 --- a/gcc/common/config/i386/i386-common.c
 +++ b/gcc/common/config/i386/i386-common.c
 @@ -86,6 +86,7 @@ along with GCC; see the file COPYING3.  If not see
  #define OPTION_MASK_ISA_XSAVEC_SET \
(OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_XSAVE)
  #define OPTION_MASK_ISA_CLWB_SET OPTION_MASK_ISA_CLWB
 +#define OPTION_MASK_ISA_PCOMMIT_SET OPTION_MASK_ISA_PCOMMIT

  /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
 as -msse4.2.  */
 @@ -182,6 +183,7 @@ along with GCC; see the file COPYING3.  If not see
  #define OPTION_MASK_ISA_CLFLUSHOPT_UNSET OPTION_MASK_ISA_CLFLUSHOPT
  #define OPTION_MASK_ISA_XSAVEC_UNSET OPTION_MASK_ISA_XSAVEC
  #define OPTION_MASK_ISA_XSAVES_UNSET OPTION_MASK_ISA_XSAVES
 +#define OPTION_MASK_ISA_PCOMMIT_UNSET OPTION_MASK_ISA_PCOMMIT
  #define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB

  /* SSE4 includes both SSE4.1 and SSE4.2.  -mno-sse4 should the same
 @@ -903,6 +905,19 @@ ix86_handle_option (struct gcc_options *opts,
 }
return true;

 +case OPT_mpcommit:
 +  if (value)
 +   {
 + opts-x_ix86_isa_flags |= OPTION_MASK_ISA_PCOMMIT_SET;
 + opts-x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCOMMIT_SET;
 +   }
 +  else
 +   {
 + opts-x_ix86_isa_flags = ~OPTION_MASK_ISA_PCOMMIT_UNSET;
 + opts-x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCOMMIT_UNSET;
 +   }
 +  return true;
 +
  case OPT_mclwb:
if (value)
 {
 diff --git a/gcc/config.gcc b/gcc/config.gcc
 index 766f13b..fa3e1fc 100644
 ---

Re: [PATCH][x86] Add clwb,pcommit,avx512avbmi,avx512ifma.

2014-11-20 Thread Uros Bizjak 
On Wed, Nov 19, 2014 at 6:32 PM, Ilya Tocar tocarip.in...@gmail.com wrote:
 Hi,

 New revision of Intel ISA reference [1] has new instructions:
 Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
 I understand that stage 1 is closed, however those changes shouldn't
 affect anything outside if i386 backend. And are extremely unlikely to
 break existing functionality, and I personally think it's desirable for
 newest GCC to support newest spec.
 Bootstrapped/regtestsed on x86_64-unknown-linux-gnu.
 Ok for trunk?

Please split the patch into patch series, like it was done previously
for AVX512F patches.

Uros.

 [1]:https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf


 gcc/

 2014-11-19  Ilya Tocar  ilya.to...@intel.com

 * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512IFMA_SET,
 OPTION_MASK_ISA_AVX512VBMI_SET, OPTION_MASK_ISA_AVX512IFMA_UNSET,
 OPTION_MASK_ISA_AVX512VBMI_UNSET, OPTION_MASK_ISA_PCOMMIT_UNSET,
 OPTION_MASK_ISA_CLWB_UNSET, OPTION_MASK_ISA_CLWB_SET,
 OPTION_MASK_ISA_PCOMMIT_SET): New.
 (ix86_handle_option): Handle OPT_mavx512ifma, OPT_mavx512vbmi,
 OPT_mpcommit, OPT_mclwb.
 * config.gcc: Add avx512ifmaintrin.h, avx512ifmavlintrin.h,
 avx512vbmiintrin.h, avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h
 * config/i386/avx512ifmaintrin.h: New file.
 * config/i386/avx512ifmaivlntrin.h: Ditto.
 * config/i386/avx512vbmiintrin.h: Ditto.
 * config/i386/avx512vbmivlintrin.h: Ditto.
 * config/i386/clwbintrin.h: Ditto.
 * config/i386/pcommitintrin.h: Ditto.
 * config/i386/cpuid.h (bit_AVX512IFMA, bit_PCOMMIT, bit_CLWB,
 bit_AVX512VBMI): New.
 * config/i386/driver-i386.c (host_detect_local_cpu): Detect pcommit,
 clwb, avx512ifma, avx512vbmi.
 * config/i386/i386-c.c (ix86_target_macros_internal): Define
 __AVX512VBMI__, __AVX512IFMA__, __PCOMMIT__, __CLWB__.
 * config/i386/i386.c (ix86_target_string): Add -mavx512ifma,
 -mavx512vbmi, -mclwb, -mpcommit.
 (PTA_AVX512VBMI, PTA_AVX512IFMA, PTA_CLWB, PTA_PCOMMIT): Define.
 (ix86_option_override_internal): Handle new options.
 (ix86_valid_target_attribute_inner_p): Add avx512vbmi, avx512ifma,
 clwb, pcommit.
 (ix86_builtins): Add IX86_BUILTIN_VPMADD52LUQ512,
 IX86_BUILTIN_VPMADD52HUQ512, IX86_BUILTIN_VPMADD52LUQ256,
 IX86_BUILTIN_VPMADD52HUQ256, IX86_BUILTIN_VPMADD52LUQ128,
 IX86_BUILTIN_VPMADD52HUQ128, IX86_BUILTIN_VPMADD52LUQ512_MASKZ,
 IX86_BUILTIN_VPMADD52HUQ512_MASKZ, IX86_BUILTIN_VPMADD52LUQ256_MASKZ,
 IX86_BUILTIN_VPMADD52HUQ256_MASKZ, IX86_BUILTIN_VPMADD52LUQ128_MASKZ,
 IX86_BUILTIN_VPMADD52HUQ128_MASKZ, IX86_BUILTIN_VPMULTISHIFTQB512,
 IX86_BUILTIN_VPMULTISHIFTQB256, IX86_BUILTIN_VPMULTISHIFTQB128,
 IX86_BUILTIN_VPERMVARQI512_MASK, IX86_BUILTIN_VPERMT2VARQI512,
 IX86_BUILTIN_VPERMT2VARQI512_MASKZ, IX86_BUILTIN_VPERMI2VARQI512,
 IX86_BUILTIN_VPERMVARQI256_MASK, IX86_BUILTIN_VPERMVARQI128_MASK,
 IX86_BUILTIN_VPERMT2VARQI256, IX86_BUILTIN_VPERMT2VARQI256_MASKZ,
 IX86_BUILTIN_VPERMT2VARQI128, IX86_BUILTIN_VPERMI2VARQI256,
 IX86_BUILTIN_VPERMI2VARQI128, IX86_BUILTIN_CLWB, IX86_BUILTIN_PCOMMIT.
 (bdesc_special_args): Add __builtin_ia32_pcommit,
 __builtin_ia32_vpmadd52luq512_mask,
 __builtin_ia32_vpmadd52luq512_maskz,
 __builtin_ia32_vpmadd52huq512_mask,
 __builtin_ia32_vpmadd52huq512_maskx,
 __builtin_ia32_vpmadd52luq256_mask,
 __builtin_ia32_vpmadd52luq256_maskz,
 __builtin_ia32_vpmadd52huq256_mask,
 __builtin_ia32_vpmadd52huq256_maskz,
 __builtin_ia32_vpmadd52luq128_mask,
 __builtin_ia32_vpmadd52luq128_maskz,
 __builtin_ia32_vpmadd52huq128_mask,
 __builtin_ia32_vpmadd52huq128_maskz,
 __builtin_ia32_vpmultishiftqb512_mask,
 __builtin_ia32_vpmultishiftqb256_mask,
 __builtin_ia32_vpmultishiftqb128_mask,
 __builtin_ia32_permvarqi512_mask, __builtin_ia32_vpermt2varqi512_mask,
 __builtin_ia32_vpermt2varqi512_maskz,
 __builtin_ia32_vpermi2varqi512_mask, __builtin_ia32_permvarqi256_mask,
 __builtin_ia32_permvarqi128_mask, __builtin_ia32_vpermt2varqi256_mask,
 __builtin_ia32_vpermt2varqi256_maskz,
 __builtin_ia32_vpermt2varqi128_mask,
 __builtin_ia32_vpermt2varqi128_maskz,
 __builtin_ia32_vpermi2varqi256_mask,
 __builtin_ia32_vpermi2varqi128_mask.
 (ix86_init_mmx_sse_builtins): Add __builtin_ia32_clwb.
 (ix86_expand_builtin): Handle IX86_BUILTIN_CLWB.
 (ix86_hard_regno_mode_ok): Allow big masks for AVX612VBMI.
 * config/i386/i386.h (TARGET_AVX512VBMI, TARGET_AVX512VBMI_P,
 TARGET_AVX512IFMA, TARGET_AVX512IFMA_P, TARGET_PCOMMIT,
 TARGET_PCOMMIT_P,

[PATCH][x86] Add clwb,pcommit,avx512avbmi,avx512ifma.

2014-11-19 Thread Ilya Tocar 
Hi,

New revision of Intel ISA reference [1] has new instructions:
Clwb, pcommit and new flavors of AVX512. Patch bellow adds them.
I understand that stage 1 is closed, however those changes shouldn't
affect anything outside if i386 backend. And are extremely unlikely to
break existing functionality, and I personally think it's desirable for
newest GCC to support newest spec.
Bootstrapped/regtestsed on x86_64-unknown-linux-gnu.
Ok for trunk?

[1]:https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf


gcc/

2014-11-19  Ilya Tocar  ilya.to...@intel.com

* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512IFMA_SET,
OPTION_MASK_ISA_AVX512VBMI_SET, OPTION_MASK_ISA_AVX512IFMA_UNSET,
OPTION_MASK_ISA_AVX512VBMI_UNSET, OPTION_MASK_ISA_PCOMMIT_UNSET,
OPTION_MASK_ISA_CLWB_UNSET, OPTION_MASK_ISA_CLWB_SET,
OPTION_MASK_ISA_PCOMMIT_SET): New.
(ix86_handle_option): Handle OPT_mavx512ifma, OPT_mavx512vbmi,
OPT_mpcommit, OPT_mclwb.
* config.gcc: Add avx512ifmaintrin.h, avx512ifmavlintrin.h,
avx512vbmiintrin.h, avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h
* config/i386/avx512ifmaintrin.h: New file.
* config/i386/avx512ifmaivlntrin.h: Ditto.
* config/i386/avx512vbmiintrin.h: Ditto.
* config/i386/avx512vbmivlintrin.h: Ditto.
* config/i386/clwbintrin.h: Ditto.
* config/i386/pcommitintrin.h: Ditto.
* config/i386/cpuid.h (bit_AVX512IFMA, bit_PCOMMIT, bit_CLWB,
bit_AVX512VBMI): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect pcommit,
clwb, avx512ifma, avx512vbmi.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__AVX512VBMI__, __AVX512IFMA__, __PCOMMIT__, __CLWB__.
* config/i386/i386.c (ix86_target_string): Add -mavx512ifma,
-mavx512vbmi, -mclwb, -mpcommit.
(PTA_AVX512VBMI, PTA_AVX512IFMA, PTA_CLWB, PTA_PCOMMIT): Define.
(ix86_option_override_internal): Handle new options.
(ix86_valid_target_attribute_inner_p): Add avx512vbmi, avx512ifma,
clwb, pcommit.
(ix86_builtins): Add IX86_BUILTIN_VPMADD52LUQ512,
IX86_BUILTIN_VPMADD52HUQ512, IX86_BUILTIN_VPMADD52LUQ256,
IX86_BUILTIN_VPMADD52HUQ256, IX86_BUILTIN_VPMADD52LUQ128,
IX86_BUILTIN_VPMADD52HUQ128, IX86_BUILTIN_VPMADD52LUQ512_MASKZ,
IX86_BUILTIN_VPMADD52HUQ512_MASKZ, IX86_BUILTIN_VPMADD52LUQ256_MASKZ,
IX86_BUILTIN_VPMADD52HUQ256_MASKZ, IX86_BUILTIN_VPMADD52LUQ128_MASKZ,
IX86_BUILTIN_VPMADD52HUQ128_MASKZ, IX86_BUILTIN_VPMULTISHIFTQB512,
IX86_BUILTIN_VPMULTISHIFTQB256, IX86_BUILTIN_VPMULTISHIFTQB128,
IX86_BUILTIN_VPERMVARQI512_MASK, IX86_BUILTIN_VPERMT2VARQI512,
IX86_BUILTIN_VPERMT2VARQI512_MASKZ, IX86_BUILTIN_VPERMI2VARQI512,
IX86_BUILTIN_VPERMVARQI256_MASK, IX86_BUILTIN_VPERMVARQI128_MASK,
IX86_BUILTIN_VPERMT2VARQI256, IX86_BUILTIN_VPERMT2VARQI256_MASKZ,
IX86_BUILTIN_VPERMT2VARQI128, IX86_BUILTIN_VPERMI2VARQI256,
IX86_BUILTIN_VPERMI2VARQI128, IX86_BUILTIN_CLWB, IX86_BUILTIN_PCOMMIT.
(bdesc_special_args): Add __builtin_ia32_pcommit,
__builtin_ia32_vpmadd52luq512_mask,
__builtin_ia32_vpmadd52luq512_maskz,
__builtin_ia32_vpmadd52huq512_mask,
__builtin_ia32_vpmadd52huq512_maskx,
__builtin_ia32_vpmadd52luq256_mask,
__builtin_ia32_vpmadd52luq256_maskz,
__builtin_ia32_vpmadd52huq256_mask,
__builtin_ia32_vpmadd52huq256_maskz,
__builtin_ia32_vpmadd52luq128_mask,
__builtin_ia32_vpmadd52luq128_maskz,
__builtin_ia32_vpmadd52huq128_mask,
__builtin_ia32_vpmadd52huq128_maskz,
__builtin_ia32_vpmultishiftqb512_mask,
__builtin_ia32_vpmultishiftqb256_mask,
__builtin_ia32_vpmultishiftqb128_mask,
__builtin_ia32_permvarqi512_mask, __builtin_ia32_vpermt2varqi512_mask,
__builtin_ia32_vpermt2varqi512_maskz,
__builtin_ia32_vpermi2varqi512_mask, __builtin_ia32_permvarqi256_mask,
__builtin_ia32_permvarqi128_mask, __builtin_ia32_vpermt2varqi256_mask,
__builtin_ia32_vpermt2varqi256_maskz,
__builtin_ia32_vpermt2varqi128_mask,
__builtin_ia32_vpermt2varqi128_maskz,
__builtin_ia32_vpermi2varqi256_mask,
__builtin_ia32_vpermi2varqi128_mask.
(ix86_init_mmx_sse_builtins): Add __builtin_ia32_clwb.
(ix86_expand_builtin): Handle IX86_BUILTIN_CLWB.
(ix86_hard_regno_mode_ok): Allow big masks for AVX612VBMI.
* config/i386/i386.h (TARGET_AVX512VBMI, TARGET_AVX512VBMI_P,
TARGET_AVX512IFMA, TARGET_AVX512IFMA_P, TARGET_PCOMMIT,
TARGET_PCOMMIT_P, TARGET_CLWB, TARGET_CLWB_P): Define.
* config/i386/i386.md (unspecv): Add UNSPECV_CLWB, UNSPECV_PCOMMIT.
(pcommit): New instruction.
(clwb): Ditto.
* config/i386/i386.opt: Add mavx512ifma, mavx512vbmi, mclwb, mpcommit.
*