Hi!
As mentioned in the PR, BLKmode operands (such as in the testcase C++
variables with TREE_ADDRESSABLE types) may only live in a MEM, trying to
reload those in a register will always ICE. process_alt_operands already
has if (mode == BLKmode) break; in it, so that it never claims a BLKmode
wins when seen a register constraint, but it still updated this_alternative
and this_alternative_set, so if a register constraint (or more of them)
is accompanied also by memory constraint that matches, we still let the
caller believe it could try to reload in registers. It can't.
This patch ensures that we ignore those register constraints completely.
Bootstrapped/regtested on x86_64-linux and i686-linux, further bootstraps
pending on {powerpc64le,aarch64,s390x,armv7hl}-linux, ok for trunk if those
pass?
2019-03-19 Jakub Jelinek
PR target/89752
* lra-constraints.c (process_alt_operands) : For BLKmode, don't
update this_alternative nor this_alternative_set.
* g++.target/aarch64/aarch64.exp: New file.
* g++.target/aarch64/pr89752.C: New test.
--- gcc/lra-constraints.c.jj2019-03-16 22:17:21.060937047 +0100
+++ gcc/lra-constraints.c 2019-03-19 11:49:11.982058568 +0100
@@ -2350,6 +2350,8 @@ process_alt_operands (int only_alternati
break;
reg:
+ if (mode == BLKmode)
+ break;
this_alternative = reg_class_subunion[this_alternative][cl];
IOR_HARD_REG_SET (this_alternative_set,
reg_class_contents[cl]);
@@ -2360,8 +2362,6 @@ process_alt_operands (int only_alternati
IOR_HARD_REG_SET (this_costly_alternative_set,
reg_class_contents[cl]);
}
- if (mode == BLKmode)
- break;
winreg = true;
if (REG_P (op))
{
--- gcc/testsuite/g++.target/aarch64/aarch64.exp.jj 2019-03-19
11:55:06.539427568 +0100
+++ gcc/testsuite/g++.target/aarch64/aarch64.exp2019-03-19
11:57:08.302493754 +0100
@@ -0,0 +1,44 @@
+# Specific regression driver for AArch64.
+# Copyright (C) 2009-2019 Free Software Foundation, Inc.
+#
+# This file is part of GCC.
+#
+# GCC is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GCC is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# . */
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an AArch64 target.
+if {![istarget aarch64*-*-*] } then {
+ return
+}
+
+# Load support procs.
+load_lib g++-dg.exp
+
+global DEFAULT_CXXFLAGS
+if ![info exists DEFAULT_CXXFLAGS] then {
+set DEFAULT_CXXFLAGS " -pedantic-errors"
+}
+
+# Initialize `dg'.
+dg-init
+
+# Main loop.
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.C]] \
+"" $DEFAULT_CXXFLAGS
+
+# All done.
+dg-finish
+
--- gcc/testsuite/g++.target/aarch64/pr89752.C.jj 2019-03-19
12:00:24.890371590 +0100
+++ gcc/testsuite/g++.target/aarch64/pr89752.C 2019-03-19 11:54:23.162116476
+0100
@@ -0,0 +1,11 @@
+// PR target/89752
+// { dg-do compile }
+
+struct A { A (); ~A (); short c; };
+
+void
+foo ()
+{
+ A a0, a1;
+ __asm volatile ("" : "=rm" (a0), "=rm" (a1) : "0" (a0), "1" (a1)); // {
dg-error "inconsistent operand constraints in an 'asm'" }
+}
Jakub
