Re: [PATCH] RISC-V: Add vlm/vsm C/C++ API intrinsics support

[Kito Cheng via Gcc-patches]

committed, thanks!

On Thu, Jan 19, 2023 at 2:08 PM  wrote:

> From: Ju-Zhe Zhong 
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm
> support.
> * config/riscv/riscv-vector-builtins-bases.h: Ditto.
> * config/riscv/riscv-vector-builtins-functions.def (vlm): New
> define.
> (vsm): Ditto.
> * config/riscv/riscv-vector-builtins-shapes.cc (struct
> loadstore_def): Add vlm/vsm support.
> * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS):
> Ditto.
> (vbool64_t): Ditto.
> (vbool32_t): Ditto.
> (vbool16_t): Ditto.
> (vbool8_t): Ditto.
> (vbool4_t): Ditto.
> (vbool2_t): Ditto.
> (vbool1_t): Ditto.
> * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
> (rvv_arg_type_info::get_tree_type): Ditto.
> (function_expander::use_contiguous_load_insn): Ditto.
> * config/riscv/vector.md (@pred_store): Ditto.
>
> gcc/testsuite/ChangeLog:
>
> * g++.target/riscv/rvv/base/vsm-1.C: New test.
> * g++.target/riscv/rvv/rvv.exp: New test.
> * gcc.target/riscv/rvv/base/vlm_vsm-1.c: New test.
> * gcc.target/riscv/rvv/base/vlm_vsm-2.c: New test.
> * gcc.target/riscv/rvv/base/vlm_vsm-3.c: New test.
>
> ---
>  .../riscv/riscv-vector-builtins-bases.cc  |  6 +-
>  .../riscv/riscv-vector-builtins-bases.h   |  2 +
>  .../riscv/riscv-vector-builtins-functions.def |  2 +
>  .../riscv/riscv-vector-builtins-shapes.cc |  3 +-
>  .../riscv/riscv-vector-builtins-types.def | 15 
>  gcc/config/riscv/riscv-vector-builtins.cc | 43 ++-
>  gcc/config/riscv/vector.md| 23 +-
>  .../g++.target/riscv/rvv/base/vsm-1.C | 40 ++
>  gcc/testsuite/g++.target/riscv/rvv/rvv.exp| 44 +++
>  .../gcc.target/riscv/rvv/base/vlm_vsm-1.c | 75 +++
>  .../gcc.target/riscv/rvv/base/vlm_vsm-2.c | 75 +++
>  .../gcc.target/riscv/rvv/base/vlm_vsm-3.c | 75 +++
>  12 files changed, 395 insertions(+), 8 deletions(-)
>  create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vsm-1.C
>  create mode 100644 gcc/testsuite/g++.target/riscv/rvv/rvv.exp
>  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vlm_vsm-1.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vlm_vsm-2.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vlm_vsm-3.c
>
> diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc
> b/gcc/config/riscv/riscv-vector-builtins-bases.cc
> index af66b016b49..0da4797d272 100644
> --- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
> +++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
> @@ -84,7 +84,7 @@ public:
>}
>  };
>
> -/* Implements vle.v/vse.v codegen.  */
> +/* Implements vle.v/vse.v/vlm.v/vsm.v codegen.  */
>  template 
>  class loadstore : public function_base
>  {
> @@ -116,6 +116,8 @@ static CONSTEXPR const vsetvl vsetvl_obj;
>  static CONSTEXPR const vsetvl vsetvlmax_obj;
>  static CONSTEXPR const loadstore vle_obj;
>  static CONSTEXPR const loadstore vse_obj;
> +static CONSTEXPR const loadstore vlm_obj;
> +static CONSTEXPR const loadstore vsm_obj;
>
>  /* Declare the function base NAME, pointing it to an instance
> of class _obj.  */
> @@ -126,5 +128,7 @@ BASE (vsetvl)
>  BASE (vsetvlmax)
>  BASE (vle)
>  BASE (vse)
> +BASE (vlm)
> +BASE (vsm)
>
>  } // end namespace riscv_vector
> diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.h
> b/gcc/config/riscv/riscv-vector-builtins-bases.h
> index 79684bcb50d..28151a8d8d2 100644
> --- a/gcc/config/riscv/riscv-vector-builtins-bases.h
> +++ b/gcc/config/riscv/riscv-vector-builtins-bases.h
> @@ -28,6 +28,8 @@ extern const function_base *const vsetvl;
>  extern const function_base *const vsetvlmax;
>  extern const function_base *const vle;
>  extern const function_base *const vse;
> +extern const function_base *const vlm;
> +extern const function_base *const vsm;
>  }
>
>  } // end namespace riscv_vector
> diff --git a/gcc/config/riscv/riscv-vector-builtins-functions.def
> b/gcc/config/riscv/riscv-vector-builtins-functions.def
> index e5ebb7d829c..63aa8fe32c8 100644
> --- a/gcc/config/riscv/riscv-vector-builtins-functions.def
> +++ b/gcc/config/riscv/riscv-vector-builtins-functions.def
> @@ -42,5 +42,7 @@ DEF_RVV_FUNCTION (vsetvlmax, vsetvlmax, none_preds,
> i_none_size_void_ops)
>  /* 7. Vector Loads and Stores. */
>  DEF_RVV_FUNCTION (vle, loadstore, full_preds, all_v_scalar_const_ptr_ops)
>  DEF_RVV_FUNCTION (vse, loadstore, none_m_preds, all_v_scalar_ptr_ops)
> +DEF_RVV_FUNCTION (vlm, loadstore, none_preds, b_v_scalar_const_ptr_ops)
> +DEF_RVV_FUNCTION (vsm, loadstore, none_preds, b_v_scalar_ptr_ops)
>
>  #undef DEF_RVV_FUNCTION
> diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
> b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
> index 0332c031ce4..76cf14a8cc4 100644
> --- 

[PATCH] RISC-V: Add vlm/vsm C/C++ API intrinsics support

[juzhe . zhong]

From: Ju-Zhe Zhong 

gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm 
support.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
(vsm): Ditto.
* config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): 
Add vlm/vsm support.
* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
(vbool64_t): Ditto.
(vbool32_t): Ditto.
(vbool16_t): Ditto.
(vbool8_t): Ditto.
(vbool4_t): Ditto.
(vbool2_t): Ditto.
(vbool1_t): Ditto.
* config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
(rvv_arg_type_info::get_tree_type): Ditto.
(function_expander::use_contiguous_load_insn): Ditto.
* config/riscv/vector.md (@pred_store): Ditto.

gcc/testsuite/ChangeLog:

* g++.target/riscv/rvv/base/vsm-1.C: New test.
* g++.target/riscv/rvv/rvv.exp: New test.
* gcc.target/riscv/rvv/base/vlm_vsm-1.c: New test.
* gcc.target/riscv/rvv/base/vlm_vsm-2.c: New test.
* gcc.target/riscv/rvv/base/vlm_vsm-3.c: New test.

---
 .../riscv/riscv-vector-builtins-bases.cc  |  6 +-
 .../riscv/riscv-vector-builtins-bases.h   |  2 +
 .../riscv/riscv-vector-builtins-functions.def |  2 +
 .../riscv/riscv-vector-builtins-shapes.cc |  3 +-
 .../riscv/riscv-vector-builtins-types.def | 15 
 gcc/config/riscv/riscv-vector-builtins.cc | 43 ++-
 gcc/config/riscv/vector.md| 23 +-
 .../g++.target/riscv/rvv/base/vsm-1.C | 40 ++
 gcc/testsuite/g++.target/riscv/rvv/rvv.exp| 44 +++
 .../gcc.target/riscv/rvv/base/vlm_vsm-1.c | 75 +++
 .../gcc.target/riscv/rvv/base/vlm_vsm-2.c | 75 +++
 .../gcc.target/riscv/rvv/base/vlm_vsm-3.c | 75 +++
 12 files changed, 395 insertions(+), 8 deletions(-)
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/base/vsm-1.C
 create mode 100644 gcc/testsuite/g++.target/riscv/rvv/rvv.exp
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vlm_vsm-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vlm_vsm-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vlm_vsm-3.c

diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc 
b/gcc/config/riscv/riscv-vector-builtins-bases.cc
index af66b016b49..0da4797d272 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc
@@ -84,7 +84,7 @@ public:
   }
 };
 
-/* Implements vle.v/vse.v codegen.  */
+/* Implements vle.v/vse.v/vlm.v/vsm.v codegen.  */
 template 
 class loadstore : public function_base
 {
@@ -116,6 +116,8 @@ static CONSTEXPR const vsetvl vsetvl_obj;
 static CONSTEXPR const vsetvl vsetvlmax_obj;
 static CONSTEXPR const loadstore vle_obj;
 static CONSTEXPR const loadstore vse_obj;
+static CONSTEXPR const loadstore vlm_obj;
+static CONSTEXPR const loadstore vsm_obj;
 
 /* Declare the function base NAME, pointing it to an instance
of class _obj.  */
@@ -126,5 +128,7 @@ BASE (vsetvl)
 BASE (vsetvlmax)
 BASE (vle)
 BASE (vse)
+BASE (vlm)
+BASE (vsm)
 
 } // end namespace riscv_vector
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.h 
b/gcc/config/riscv/riscv-vector-builtins-bases.h
index 79684bcb50d..28151a8d8d2 100644
--- a/gcc/config/riscv/riscv-vector-builtins-bases.h
+++ b/gcc/config/riscv/riscv-vector-builtins-bases.h
@@ -28,6 +28,8 @@ extern const function_base *const vsetvl;
 extern const function_base *const vsetvlmax;
 extern const function_base *const vle;
 extern const function_base *const vse;
+extern const function_base *const vlm;
+extern const function_base *const vsm;
 }
 
 } // end namespace riscv_vector
diff --git a/gcc/config/riscv/riscv-vector-builtins-functions.def 
b/gcc/config/riscv/riscv-vector-builtins-functions.def
index e5ebb7d829c..63aa8fe32c8 100644
--- a/gcc/config/riscv/riscv-vector-builtins-functions.def
+++ b/gcc/config/riscv/riscv-vector-builtins-functions.def
@@ -42,5 +42,7 @@ DEF_RVV_FUNCTION (vsetvlmax, vsetvlmax, none_preds, 
i_none_size_void_ops)
 /* 7. Vector Loads and Stores. */
 DEF_RVV_FUNCTION (vle, loadstore, full_preds, all_v_scalar_const_ptr_ops)
 DEF_RVV_FUNCTION (vse, loadstore, none_m_preds, all_v_scalar_ptr_ops)
+DEF_RVV_FUNCTION (vlm, loadstore, none_preds, b_v_scalar_const_ptr_ops)
+DEF_RVV_FUNCTION (vsm, loadstore, none_preds, b_v_scalar_ptr_ops)
 
 #undef DEF_RVV_FUNCTION
diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc 
b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
index 0332c031ce4..76cf14a8cc4 100644
--- a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
@@ -116,7 +116,8 @@ struct loadstore_def : public build_base
 machine_mode mode = TYPE_MODE (type);
 int sew = GET_MODE_BITSIZE (GET_MODE_INNER (mode));