Re: [PATCH] i386: Fix conversion of move to/from AX_REG into xchg [PR106707]

[H.J. Lu via Gcc-patches]

On Thu, Sep 1, 2022 at 11:23 AM Uros Bizjak via Gcc-patches
 wrote:
>
> The conversion of a move pattern where both operands are AX_REG
> should be prevented.
>
> 2022-09-01  Uroš Bizjak  
>
> gcc/ChangeLog:
>
> PR target/106707
> * config/i386/i386.md (moves to/from AX_REG into xchg peephole2):
> Do not convert a move pattern where both operands are AX_REG.
>
> gcc/testsuite/ChangeLog:
>
> PR target/106707
> * gcc.target/i386/pr106707.c: New test.
>
> Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
>
> Pushed to master.
>
> Uros.

I am checking in this to replace long with long long for 64-bit integer.

-- 
H.J.
From 01ca233f7a8ab683968d1ae2eb6e9f1049e86ad2 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" 
Date: Thu, 1 Sep 2022 15:18:18 -0700
Subject: [PATCH] i386: Replace long with long long for 64-bit integer

Replace long with long long for 64-bit integer since long may be 32
bits.

	PR target/106707
	* gcc.target/i386/pr106707.c (foo): Replace long with long long.
---
 gcc/testsuite/gcc.target/i386/pr106707.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/testsuite/gcc.target/i386/pr106707.c b/gcc/testsuite/gcc.target/i386/pr106707.c
index a127ccd4679..2e8ebaafb33 100644
--- a/gcc/testsuite/gcc.target/i386/pr106707.c
+++ b/gcc/testsuite/gcc.target/i386/pr106707.c
@@ -10,9 +10,9 @@ unsigned x, y;
 V v;
 
 void
-foo (long a)
+foo (long long a)
 {
-  long l = a != x;
+  long long l = a != x;
   int i = __builtin_add_overflow_p (y * ii, 0, 0);
   V u = ii < x | v, w = x <= u < i & y <= x / ii;
   v = __builtin_shufflevector (v, w, 1, 2) + (V) l;
-- 
2.37.2

[PATCH] i386: Fix conversion of move to/from AX_REG into xchg [PR106707]

[Uros Bizjak via Gcc-patches]

The conversion of a move pattern where both operands are AX_REG
should be prevented.

2022-09-01  Uroš Bizjak  

gcc/ChangeLog:

PR target/106707
* config/i386/i386.md (moves to/from AX_REG into xchg peephole2):
Do not convert a move pattern where both operands are AX_REG.

gcc/testsuite/ChangeLog:

PR target/106707
* gcc.target/i386/pr106707.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Pushed to master.

Uros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index a4a18cf89f5..1aef1af594d 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3043,8 +3043,8 @@ (define_peephole2
   [(set (match_operand:SWI48 0 "general_reg_operand")
(match_operand:SWI48 1 "general_reg_operand"))]
  "optimize_size > 1
-  && (REGNO (operands[0]) == AX_REG
-  || REGNO (operands[1]) == AX_REG)
+  && ((REGNO (operands[0]) == AX_REG)
+  != (REGNO (operands[1]) == AX_REG))
   && optimize_insn_for_size_p ()
   && peep2_reg_dead_p (1, operands[1])"
   [(parallel [(set (match_dup 0) (match_dup 1))
diff --git a/gcc/testsuite/gcc.target/i386/pr106707.c 
b/gcc/testsuite/gcc.target/i386/pr106707.c
new file mode 100644
index 000..a127ccd4679
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr106707.c
@@ -0,0 +1,19 @@
+/* PR target/106707 */
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-Oz -g -fno-cprop-registers -fno-dce" } */
+
+typedef unsigned __attribute__((__vector_size__ (8))) V;
+
+unsigned __int128 ii;
+unsigned x, y;
+
+V v;
+
+void
+foo (long a)
+{
+  long l = a != x;
+  int i = __builtin_add_overflow_p (y * ii, 0, 0);
+  V u = ii < x | v, w = x <= u < i & y <= x / ii;
+  v = __builtin_shufflevector (v, w, 1, 2) + (V) l;
+}