[PATCH 0/6] ] Permute Class Operations
Version 2. The patches in this series have been updated per the comments from Segher. I have put at the top of each patch a short summary of the version 2 changes. Hopefully the summaries will make the re-review easier and faster. Most of the changes were ChangeLog fixes with a few functional changes. -- Based on previous IBM internal reviews of the patch set, the desire is for all of the vector insert and extract support to be in vsx.md as there is a longer term plan to re-work this support for PPC. The first patch moves the existing extract support in altivec.md to vsx.md. The subsequent patches add additional vector insert and vector replace builtin support. Additionally, the documentation for the existing vector extract builtins has been updated to match the latest documentation and builtin names in the code. Specifically, the builtin name vec_extractr has been changed to vec_extracth. The description of the two builtins has been changed to match the latest description of the builtins with a few minor edits to address typos in the descriptions.
Re: [PATCH 0/6] Permute Class Operations
Hi Carl, On Mon, Jun 01, 2020 at 09:14:25AM -0700, Carl Love wrote: > Based on previous IBM internal reviews of the patch set, the desire is > for all of the vector insert and extract support to be in vsx.md as > there is a longer term plan to re-work this support for PPC. Very long time ago, it was easy: there was altivec.md, which contained the AltiVec instruction patterns. Life was good. Then, for Power7, we got vsx.md for the original VSX insns, and vector.md to mux the things that exist similarly in AltiVec (aka VMX) and VSX. This was still quite nice. But since then we got Power8, and Power9, and now Power10, and there is not any obvious way to decide what goes where anymore. It may seem (I thought this for a while) that instructions that only operate on the VRs (and not the other VSRs, namely the FPRs) can go into altivec.md -- but then a later version of the ISA makes things more orthogonal, and things *can* go into all VSRs now, so things have to move again, and the distinction turns out to have been totally artificial and not useful. So yes, we need to divide this up some saner way. Maybe we can start with splitting of the FP parts (scalar and vector, also classical FP, but maybe only the computational insns (not the moves))? Will need some experimentation to find out something that works well (and that is the point: it should be easy to *work with*, nothing else). Sorry for blabbering :-) Segher
[PATCH 0/6] Permute Class Operations
GCC maintianers: The following patch set adds builtins for the various Permute Class Operations specified in IBM RFC 2609. Based on previous IBM internal reviews of the patch set, the desire is for all of the vector insert and extract support to be in vsx.md as there is a longer term plan to re-work this support for PPC. The first patch moves the existing extract support in altivec.md to vsx.md. Additionally, the documentation for the existing vector extract builtins has been updated to match the latest documentation and builtin names in the code. Specifically, the builtin name vec_extractr has been changed to vec_extracth. The description of the two builtins has been changed to match the latest description of the builtins with a few minor edits to address typos in the descriptions. The subsequent patches add additional vector insert, vector replace, vector shift, vector splat, vector blend builtin support. Carl Love
