Re: [PATCH 02/11] rs6000, fix arguments, add documentation for vector, element conversions
Hi,
on 2024/2/21 01:56, Carl Love wrote:
>
> GCC maintainers:
>
> This patch fixes the return type for the __builtin_vsx_xvcvdpuxws and
> __builtin_vsx_xvcvspuxds built-ins. They were defined as signed but should
> have been defined as unsigned.
>
> The patch has been tested on Power 10 with no regressions.
>
> Please let me know if this patch is acceptable for mainline. Thanks.
>
> Carl
>
> -
> rs6000, fix arguments, add documentation for vector element conversions
>
> The return type for the __builtin_vsx_xvcvdpuxws, __builtin_vsx_xvcvspuxds,
> __builtin_vsx_xvcvspuxws built-ins should be unsigned. This patch changes
> the return values from signed to unsigned.
>
> The documentation for the vector element conversion built-ins:
>
> __builtin_vsx_xvcvspsxws
> __builtin_vsx_xvcvspsxds
> __builtin_vsx_xvcvspuxds
> __builtin_vsx_xvcvdpsxws
> __builtin_vsx_xvcvdpuxws
> __builtin_vsx_xvcvdpuxds_uns
> __builtin_vsx_xvcvspdp
> __builtin_vsx_xvcvdpsp
> __builtin_vsx_xvcvspuxws
> __builtin_vsx_xvcvsxwdp
> __builtin_vsx_xvcvuxddp_uns
> __builtin_vsx_xvcvuxwdp
>
> is missing from extend.texi. This patch adds the missing documentation.
I think we should recommend users to adopt the recommended built-ins in
PVIPR, by checking the corresponding mnemonic in PVIPR, I got:
__builtin_vsx_xvcvspsxws -> vec_signed
__builtin_vsx_xvcvspsxds -> N/A
__builtin_vsx_xvcvspuxds -> N/A
__builtin_vsx_xvcvdpsxws -> vec_signed{e,o}
__builtin_vsx_xvcvdpuxws -> vec_unsigned{e,o}
__builtin_vsx_xvcvdpuxds_uns -> vec_unsigned
__builtin_vsx_xvcvspdp -> vec_double{e,o}
__builtin_vsx_xvcvdpsp -> vec_float{e,o}
__builtin_vsx_xvcvspuxws -> vec_unsigned
__builtin_vsx_xvcvsxwdp -> vec_double{e,o}
__builtin_vsx_xvcvuxddp_uns> vec_double
For __builtin_vsx_xvcvspsxds and __builtin_vsx_xvcvspuxds which don't have
the according PVIPR built-ins, we can extend the current vec_{un,}signed{e,o}
to cover them and document them following the section mentioning PVIPR.
BR,
Kewen
>
> This patch also adds runnable test cases for each of the built-ins.
>
> gcc/ChangeLog:
> * config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcvdpuxws,
> __builtin_vsx_xvcvspuxds, __builtin_vsx_xvcvspuxws): Change
> return type from signed to unsigned.
> * doc/extend.texi (__builtin_vsx_xvcvspsxws,
> __builtin_vsx_xvcvspsxds, __builtin_vsx_xvcvspuxds,
> __builtin_vsx_xvcvdpsxws, __builtin_vsx_xvcvdpuxws,
> __builtin_vsx_xvcvdpuxds_uns, __builtin_vsx_xvcvspdp,
> __builtin_vsx_xvcvdpsp, __builtin_vsx_xvcvspuxws,
> __builtin_vsx_xvcvsxwdp, __builtin_vsx_xvcvuxddp_uns,
> __builtin_vsx_xvcvuxwdp): Add documentation for builtins.
>
> gcc/testsuite/ChangeLog:
> * gcc.target/powerpc/vsx-builtin-runnable-1.c: New test file.
> ---
> gcc/config/rs6000/rs6000-builtins.def | 6 +-
> gcc/doc/extend.texi | 135 ++
> .../powerpc/vsx-builtin-runnable-1.c | 233 ++
> 3 files changed, 371 insertions(+), 3 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-runnable-1.c
>
> diff --git a/gcc/config/rs6000/rs6000-builtins.def
> b/gcc/config/rs6000/rs6000-builtins.def
> index d66a53a0fab..fd316f629e5 100644
> --- a/gcc/config/rs6000/rs6000-builtins.def
> +++ b/gcc/config/rs6000/rs6000-builtins.def
> @@ -1724,7 +1724,7 @@
>const vull __builtin_vsx_xvcvdpuxds_uns (vd);
> XVCVDPUXDS_UNS vsx_fixuns_truncv2dfv2di2 {}
>
> - const vsi __builtin_vsx_xvcvdpuxws (vd);
> + const vui __builtin_vsx_xvcvdpuxws (vd);
> XVCVDPUXWS vsx_xvcvdpuxws {}
>
>const vd __builtin_vsx_xvcvspdp (vf);
> @@ -1736,10 +1736,10 @@
>const vsi __builtin_vsx_xvcvspsxws (vf);
> XVCVSPSXWS vsx_fix_truncv4sfv4si2 {}
>
> - const vsll __builtin_vsx_xvcvspuxds (vf);
> + const vull __builtin_vsx_xvcvspuxds (vf);
> XVCVSPUXDS vsx_xvcvspuxds {}
>
> - const vsi __builtin_vsx_xvcvspuxws (vf);
> + const vui __builtin_vsx_xvcvspuxws (vf);
> XVCVSPUXWS vsx_fixuns_truncv4sfv4si2 {}
>
>const vd __builtin_vsx_xvcvsxddp (vsll);
> diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
> index 4d8610f6aa8..583b1d890bf 100644
> --- a/gcc/doc/extend.texi
> +++ b/gcc/doc/extend.texi
> @@ -21360,6 +21360,141 @@ __float128 __builtin_sqrtf128 (__float128);
> __float128 __builtin_fmaf128 (__float128, __float128, __float128);
> @end smallexample
>
> +@smallexample
> +vector int __builtin_vsx_xvcvspsxws (vector float);
> +@end smallexample
> +
> +The @code{__builtin_vsx_xvcvspsxws} converts the single precision floating
> +point vector element i to a signed single-precision integer value using
> +round to zero storing the result in element i. If the source element is NaN
> +the result is set to 0x8000 and VXCI is set to 1. If the source
> +element is SNaN then VXSNAN is also set to 1. If the rounded value is
> greater
> +than 2^31 - 1
[PATCH 02/11] rs6000, fix arguments, add documentation for vector, element conversions
GCC maintainers:
This patch fixes the return type for the __builtin_vsx_xvcvdpuxws and
__builtin_vsx_xvcvspuxds built-ins. They were defined as signed but should
have been defined as unsigned.
The patch has been tested on Power 10 with no regressions.
Please let me know if this patch is acceptable for mainline. Thanks.
Carl
-
rs6000, fix arguments, add documentation for vector element conversions
The return type for the __builtin_vsx_xvcvdpuxws, __builtin_vsx_xvcvspuxds,
__builtin_vsx_xvcvspuxws built-ins should be unsigned. This patch changes
the return values from signed to unsigned.
The documentation for the vector element conversion built-ins:
__builtin_vsx_xvcvspsxws
__builtin_vsx_xvcvspsxds
__builtin_vsx_xvcvspuxds
__builtin_vsx_xvcvdpsxws
__builtin_vsx_xvcvdpuxws
__builtin_vsx_xvcvdpuxds_uns
__builtin_vsx_xvcvspdp
__builtin_vsx_xvcvdpsp
__builtin_vsx_xvcvspuxws
__builtin_vsx_xvcvsxwdp
__builtin_vsx_xvcvuxddp_uns
__builtin_vsx_xvcvuxwdp
is missing from extend.texi. This patch adds the missing documentation.
This patch also adds runnable test cases for each of the built-ins.
gcc/ChangeLog:
* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcvdpuxws,
__builtin_vsx_xvcvspuxds, __builtin_vsx_xvcvspuxws): Change
return type from signed to unsigned.
* doc/extend.texi (__builtin_vsx_xvcvspsxws,
__builtin_vsx_xvcvspsxds, __builtin_vsx_xvcvspuxds,
__builtin_vsx_xvcvdpsxws, __builtin_vsx_xvcvdpuxws,
__builtin_vsx_xvcvdpuxds_uns, __builtin_vsx_xvcvspdp,
__builtin_vsx_xvcvdpsp, __builtin_vsx_xvcvspuxws,
__builtin_vsx_xvcvsxwdp, __builtin_vsx_xvcvuxddp_uns,
__builtin_vsx_xvcvuxwdp): Add documentation for builtins.
gcc/testsuite/ChangeLog:
* gcc.target/powerpc/vsx-builtin-runnable-1.c: New test file.
---
gcc/config/rs6000/rs6000-builtins.def | 6 +-
gcc/doc/extend.texi | 135 ++
.../powerpc/vsx-builtin-runnable-1.c | 233 ++
3 files changed, 371 insertions(+), 3 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-builtin-runnable-1.c
diff --git a/gcc/config/rs6000/rs6000-builtins.def
b/gcc/config/rs6000/rs6000-builtins.def
index d66a53a0fab..fd316f629e5 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -1724,7 +1724,7 @@
const vull __builtin_vsx_xvcvdpuxds_uns (vd);
XVCVDPUXDS_UNS vsx_fixuns_truncv2dfv2di2 {}
- const vsi __builtin_vsx_xvcvdpuxws (vd);
+ const vui __builtin_vsx_xvcvdpuxws (vd);
XVCVDPUXWS vsx_xvcvdpuxws {}
const vd __builtin_vsx_xvcvspdp (vf);
@@ -1736,10 +1736,10 @@
const vsi __builtin_vsx_xvcvspsxws (vf);
XVCVSPSXWS vsx_fix_truncv4sfv4si2 {}
- const vsll __builtin_vsx_xvcvspuxds (vf);
+ const vull __builtin_vsx_xvcvspuxds (vf);
XVCVSPUXDS vsx_xvcvspuxds {}
- const vsi __builtin_vsx_xvcvspuxws (vf);
+ const vui __builtin_vsx_xvcvspuxws (vf);
XVCVSPUXWS vsx_fixuns_truncv4sfv4si2 {}
const vd __builtin_vsx_xvcvsxddp (vsll);
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 4d8610f6aa8..583b1d890bf 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -21360,6 +21360,141 @@ __float128 __builtin_sqrtf128 (__float128);
__float128 __builtin_fmaf128 (__float128, __float128, __float128);
@end smallexample
+@smallexample
+vector int __builtin_vsx_xvcvspsxws (vector float);
+@end smallexample
+
+The @code{__builtin_vsx_xvcvspsxws} converts the single precision floating
+point vector element i to a signed single-precision integer value using
+round to zero storing the result in element i. If the source element is NaN
+the result is set to 0x8000 and VXCI is set to 1. If the source
+element is SNaN then VXSNAN is also set to 1. If the rounded value is greater
+than 2^31 - 1 the result is 0x7FFF and VXCVI is set to 1. If the
+rounded value is less than -2^31, the result is set to 0x8000 and
+VXCVI is set to 1. If the rounded result is inexact then XX is set to 1.
+
+@smallexample
+vector signed long long int __builtin_vsx_xvcvspsxds (vector float);
+@end smallexample
+
+The @code{__builtin_vsx_xvcvspsxds} converts the single precision floating
+point vector element to a double precision signed integer value using the
+round to zero rounding mode. If the source element is NaN the result
+is set to 0x8000 and VXCI is set to 1. If the source element is
+SNaN then VXSNAN is also set to 1. If the rounded value is greater than
+2^63 - 1 the result is 0x7FFF and VXCVI is set to 1. If the
+rounded value is less than zero, the result is set to 0x8000 and
+VXCVI is set to 1. If the rounded result is inexact then XX is set to 1.
+
+@smallexample
+vector unsigned long long __builtin_vsx_xvcvspuxds (vector float);
+@end smallexample
+
+The @code{__builtin_vsx_xvcvspuxds} conv
