Re: [PATCH 09/62] AVX512FP16: Enable _Float16 autovectorization
On Thu, Jul 1, 2021 at 2:17 PM liuhongt wrote:
>
> From: "H.J. Lu"
>
> gcc/ChangeLog:
>
> * config/i386/i386-expand.c
> (ix86_avx256_split_vector_move_misalign): Handle V16HF mode.
> * config/i386/i386.c
> (ix86_preferred_simd_mode): Handle HF mode.
> * config/i386/sse.md (V_256H): New mode iterator.
> (avx_vextractf128): Use it.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/i386/vect-float16-1.c: New test.
> * gcc.target/i386/vect-float16-10.c: Ditto.
> * gcc.target/i386/vect-float16-11.c: Ditto.
> * gcc.target/i386/vect-float16-12.c: Ditto.
> * gcc.target/i386/vect-float16-2.c: Ditto.
> * gcc.target/i386/vect-float16-3.c: Ditto.
> * gcc.target/i386/vect-float16-4.c: Ditto.
> * gcc.target/i386/vect-float16-5.c: Ditto.
> * gcc.target/i386/vect-float16-6.c: Ditto.
> * gcc.target/i386/vect-float16-7.c: Ditto.
> * gcc.target/i386/vect-float16-8.c: Ditto.
> * gcc.target/i386/vect-float16-9.c: Ditto.
I'm going to check in this patch w/ a bit change, the change is
removing TARGET_AVX512FP16 for vector HFmodes when vpinsrw/../vpextrw
instructions are used for V*HFmodevector_init and
vector_extract{,_lo/hi}.
Attach an updated patch.
Also check in 6 patches which are [PATCH 10/62] to [PATH 15/62].
[PATCH 10/62] AVX512FP16: Add vaddsh/vsubsh/vmulsh/vdivsh.
[PATCH 11/62] AVX512FP16: Add testcase for vaddsh/vsubsh/vmulsh/vdivsh.
[PATCH 12/62] AVX512FP16: Add vmaxph/vminph/vmaxsh/vminsh.
[PATCH 13/62] AVX512FP16: Add testcase for vmaxph/vmaxsh/vminph/vminsh.
[PATCH 14/62] AVX512FP16: Add vcmpph/vcmpsh/vcomish/vucomish.
[PATCH 15/62] AVX512FP16: Add testcase for vcmpph/vcmpsh/vcomish/vucomish.
Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
Also newly added runtime testcases were run on sde/SPR.
[10] https://gcc.gnu.org/pipermail/gcc-patches/2021-July/574128.html
[11] https://gcc.gnu.org/pipermail/gcc-patches/2021-July/574127.html
[12] https://gcc.gnu.org/pipermail/gcc-patches/2021-July/574129.html
[13] https://gcc.gnu.org/pipermail/gcc-patches/2021-July/574130.html
[14] https://gcc.gnu.org/pipermail/gcc-patches/2021-July/574131.html
[15] https://gcc.gnu.org/pipermail/gcc-patches/2021-July/574132.html
> ---
> gcc/config/i386/i386-expand.c | 4
> gcc/config/i386/i386.c | 14 ++
> gcc/config/i386/sse.md | 7 ++-
> gcc/testsuite/gcc.target/i386/vect-float16-1.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-10.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-11.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-12.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-2.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-3.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-4.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-5.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-6.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-7.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-8.c | 14 ++
> gcc/testsuite/gcc.target/i386/vect-float16-9.c | 14 ++
> 15 files changed, 192 insertions(+), 1 deletion(-)
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-1.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-10.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-11.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-12.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-2.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-3.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-4.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-5.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-6.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-7.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-8.c
> create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-9.c
>
> diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
> index 39647eb2cf1..df50c72ab16 100644
> --- a/gcc/config/i386/i386-expand.c
> +++ b/gcc/config/i386/i386-expand.c
> @@ -498,6 +498,10 @@ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1)
>extract = gen_avx_vextractf128v32qi;
>mode = V16QImode;
>break;
> +case E_V16HFmode:
> + extract = gen_avx_vextractf128v16hf;
> + mode = V8HFmode;
> + break;
> case E_V8SFmode:
>extract = gen_avx_vextractf128v8sf;
>mode = V4SFmode;
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index 79e6880d9dd..dc0d440061b 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -22360,6 +22360,20 @@
[PATCH 09/62] AVX512FP16: Enable _Float16 autovectorization
From: "H.J. Lu"
gcc/ChangeLog:
* config/i386/i386-expand.c
(ix86_avx256_split_vector_move_misalign): Handle V16HF mode.
* config/i386/i386.c
(ix86_preferred_simd_mode): Handle HF mode.
* config/i386/sse.md (V_256H): New mode iterator.
(avx_vextractf128): Use it.
gcc/testsuite/ChangeLog:
* gcc.target/i386/vect-float16-1.c: New test.
* gcc.target/i386/vect-float16-10.c: Ditto.
* gcc.target/i386/vect-float16-11.c: Ditto.
* gcc.target/i386/vect-float16-12.c: Ditto.
* gcc.target/i386/vect-float16-2.c: Ditto.
* gcc.target/i386/vect-float16-3.c: Ditto.
* gcc.target/i386/vect-float16-4.c: Ditto.
* gcc.target/i386/vect-float16-5.c: Ditto.
* gcc.target/i386/vect-float16-6.c: Ditto.
* gcc.target/i386/vect-float16-7.c: Ditto.
* gcc.target/i386/vect-float16-8.c: Ditto.
* gcc.target/i386/vect-float16-9.c: Ditto.
---
gcc/config/i386/i386-expand.c | 4
gcc/config/i386/i386.c | 14 ++
gcc/config/i386/sse.md | 7 ++-
gcc/testsuite/gcc.target/i386/vect-float16-1.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-10.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-11.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-12.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-2.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-3.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-4.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-5.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-6.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-7.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-8.c | 14 ++
gcc/testsuite/gcc.target/i386/vect-float16-9.c | 14 ++
15 files changed, 192 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-1.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-10.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-11.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-12.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-3.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-4.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-5.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-6.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-7.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-8.c
create mode 100644 gcc/testsuite/gcc.target/i386/vect-float16-9.c
diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index 39647eb2cf1..df50c72ab16 100644
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -498,6 +498,10 @@ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1)
extract = gen_avx_vextractf128v32qi;
mode = V16QImode;
break;
+case E_V16HFmode:
+ extract = gen_avx_vextractf128v16hf;
+ mode = V8HFmode;
+ break;
case E_V8SFmode:
extract = gen_avx_vextractf128v8sf;
mode = V4SFmode;
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 79e6880d9dd..dc0d440061b 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -22360,6 +22360,20 @@ ix86_preferred_simd_mode (scalar_mode mode)
else
return V2DImode;
+case E_HFmode:
+ if (TARGET_AVX512FP16)
+ {
+ if (TARGET_AVX512VL)
+ {
+ if (TARGET_PREFER_AVX128)
+ return V8HFmode;
+ else if (TARGET_PREFER_AVX256)
+ return V16HFmode;
+ }
+ return V32HFmode;
+ }
+ return word_mode;
+
case E_SFmode:
if (TARGET_AVX512F && !TARGET_PREFER_AVX256)
return V16SFmode;
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 2c1b6fbcd86..a0cfd611006 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -276,6 +276,11 @@ (define_mode_iterator V_128
(define_mode_iterator V_256
[V32QI V16HI V8SI V4DI V8SF V4DF])
+;; All 256bit vector modes including HF vector mode
+(define_mode_iterator V_256H
+ [V32QI V16HI V8SI V4DI V8SF V4DF
+ (V16HF "TARGET_AVX512F && TARGET_AVX512VL")])
+
;; All 128bit and 256bit vector modes
(define_mode_iterator V_128_256
[V32QI V16QI V16HI V8HI V8SI V4SI V4DI V2DI V8SF V4SF V4DF V2DF])
@@ -9045,7 +9050,7 @@ (define_expand "avx512vl_vextractf128"
(define_expand "avx_vextractf128"
[(match_operand: 0 "nonimmediate_operand")
- (match_operand:V_256 1 "register_operand")
+ (match_operand:V_256H 1 "register_operand")
(match_operand:SI 2 "const_0_to_1_operand")]
"TARGET_AVX"
{
diff --git
