Re: [PATCH 1/2] [ARC] Fix and refurbish the interrupts.
Pushed. Thank you for your review, Claudiu On Tue, Jul 23, 2019 at 12:51 AM Jeff Law wrote: > > On 7/9/19 10:23 AM, claz...@gmail.com wrote: > > Hi Jeff, > > > > Please find attached the updated patch. > > > > What is new: > > - mailing list feedback is taken into account. > > - some comments are updated. > > - a new test is added. > > - the ARC AUX registers used by ZOL (hardware loop) and FPX (a custom > > floating point implementation) are saved before fp-register. > > - the millicode optimization is not used by ISR. > > > > > > Thank you, > > Claudiu > > > > > > 0001-ARC-Fix-and-refurbish-the-interrupts.patch > > > > From d22368681b7aab4bef4b5c32a9a472808f2c16cd Mon Sep 17 00:00:00 2001 > > From: Claudiu Zissulescu > > Date: Fri, 17 May 2019 14:48:17 +0300 > > Subject: [PATCH] [ARC] Fix and refurbish the interrupts. > > > > When entering an interrupt, not only the call save registers needs to > > be place on stack but also the call clobbers one. More over, the > > ARC700 return from interrupt instruction needs to be rtie, the same > > like ARCv2 CPUs. While the ARC6xx family uses j.f [ilinkX] > > instruction. Additionally, we need to save the state of the ZOL > > machinery, namely the lp_count, lp_end and lp_start registers. For > > architectures which are using extension registers (i.e., HS48) we need > > to save/restore them as well. > > > > gcc/ > > -xx-xx Claudiu Zissulescu > > > > * config/arc/arc-protos.h (arc_output_function_epilogue): Delete > > declaration. > > (arc_compute_frame_size): Millicode is disabled when compiling > > ISR. > > (arc_return_address_register): Likewise. > > (arc_compute_function_type): Likewise. > > (arc_compute_frame_size): Likewise. > > (secondary_reload_info): Likewise. > > (arc_get_unalign): Likewise. > > (arc_can_use_return_insn): Declare. > > * config/arc/arc.c (AUX_LP_START): Define > > (AUX_LP_END): Likewise. > > (arc_frame_info): Update gmask member to 64-bit datum. > > (GMASK_LEN): Update. > > (arc_compute_function_type): Make it static, move it forward. > > (arc_must_save_register): Update, consider the extra regs. > > (arc_compute_millicode_save_restore_regs): Update to use the 64 > > bit gmask. > > (arc_compute_frame_size): Likewise. > > (arc_enter_leave_p): Likewise. > > (arc_save_callee_saves): Likewise. > > (arc_restore_callee_saves): Likewise. > > (arc_save_callee_enter): Likewise. > > (arc_restore_callee_leave): Likewise. > > (arc_save_callee_milli): Likewise. > > (arc_restore_callee_milli): Likewise. > > (arc_expand_prologue): Add new interrupt handling. > > (arc_return_address_register): Make it static, move it forward. > > (arc_expand_epilogue): Add new interrupt handling. > > (arc_get_unalign): Delete. > > (arc_epilogue_uses): Make sure we do not remove the extra > > saved/restored registers when interrupt. > > (arc_can_use_return_insn): New function. > > (push_reg): Likewise. > > (pop_reg): Likewise. > > (arc_save_callee_saves): Add ZOL and FPX aux registers saving > > procedures. > > (arc_restore_callee_saves): Likewise, but restoring. > > * config/arc/arc.md (VUNSPEC_ARC_ARC600_RTIE): Define. > > (R33_REG): Likewise. > > (R34_REG): Likewise. > > (R35_REG): Likewise. > > (R36_REG): Likewise. > > (R37_REG): Likewise. > > (R38_REG): Likewise. > > (R39_REG): Likewise. > > (R45_REG): Likewise. > > (R46_REG): Likewise. > > (R47_REG): Likewise. > > (R48_REG): Likewise. > > (R49_REG): Likewise. > > (R50_REG): Likewise. > > (R51_REG): Likewise. > > (R52_REG): Likewise. > > (R53_REG): Likewise. > > (R54_REG): Likewise. > > (R55_REG): Likewise. > > (R56_REG): Likewise. > > (R58_REG): Likewise. > > (type): Add rtie attribute. > > (in_call_delay_slot): Use RETURN_ADDR_REGNUM. > > (movsi_insn): Accept moves to lp_count. > > (rtie): Update pattern. > > (simple_return): Simplify it, don't use this pattern as a return > > from an interrupt. > > (arc600_rtie): New pattern. > > (p_return_i): Clean up. > > (return): Likewise. > > * config/arc/builtins.def (rtie): Only available for non ARC6xx > > family CPUs. > > * config/arc/predicates.md (move_src_operand): Consider lp_count > > as a register. > > > > gcc/testsuite > > -xx-xx Claudiu Zissulescu > > > > * gcc.target/arc/arc.exp (check_effective_target_accregs): New > > predicate. > > * gcc.target/arc/builtin_special.c: Update test/ > > * gcc.target/arc/interrupt-1.c: Likewise. > > * gcc.target/arc/interrupt-10.c: New test. > > * gcc.target/arc/interrupt-11.c: Likewise. > > * gcc.target/arc/interrupt-12.c: Likewise. > OK > > Jeff
Re: [PATCH 1/2] [ARC] Fix and refurbish the interrupts.
On 7/9/19 10:23 AM, claz...@gmail.com wrote: > Hi Jeff, > > Please find attached the updated patch. > > What is new: > - mailing list feedback is taken into account. > - some comments are updated. > - a new test is added. > - the ARC AUX registers used by ZOL (hardware loop) and FPX (a custom > floating point implementation) are saved before fp-register. > - the millicode optimization is not used by ISR. > > > Thank you, > Claudiu > > > 0001-ARC-Fix-and-refurbish-the-interrupts.patch > > From d22368681b7aab4bef4b5c32a9a472808f2c16cd Mon Sep 17 00:00:00 2001 > From: Claudiu Zissulescu > Date: Fri, 17 May 2019 14:48:17 +0300 > Subject: [PATCH] [ARC] Fix and refurbish the interrupts. > > When entering an interrupt, not only the call save registers needs to > be place on stack but also the call clobbers one. More over, the > ARC700 return from interrupt instruction needs to be rtie, the same > like ARCv2 CPUs. While the ARC6xx family uses j.f [ilinkX] > instruction. Additionally, we need to save the state of the ZOL > machinery, namely the lp_count, lp_end and lp_start registers. For > architectures which are using extension registers (i.e., HS48) we need > to save/restore them as well. > > gcc/ > -xx-xx Claudiu Zissulescu > > * config/arc/arc-protos.h (arc_output_function_epilogue): Delete > declaration. > (arc_compute_frame_size): Millicode is disabled when compiling > ISR. > (arc_return_address_register): Likewise. > (arc_compute_function_type): Likewise. > (arc_compute_frame_size): Likewise. > (secondary_reload_info): Likewise. > (arc_get_unalign): Likewise. > (arc_can_use_return_insn): Declare. > * config/arc/arc.c (AUX_LP_START): Define > (AUX_LP_END): Likewise. > (arc_frame_info): Update gmask member to 64-bit datum. > (GMASK_LEN): Update. > (arc_compute_function_type): Make it static, move it forward. > (arc_must_save_register): Update, consider the extra regs. > (arc_compute_millicode_save_restore_regs): Update to use the 64 > bit gmask. > (arc_compute_frame_size): Likewise. > (arc_enter_leave_p): Likewise. > (arc_save_callee_saves): Likewise. > (arc_restore_callee_saves): Likewise. > (arc_save_callee_enter): Likewise. > (arc_restore_callee_leave): Likewise. > (arc_save_callee_milli): Likewise. > (arc_restore_callee_milli): Likewise. > (arc_expand_prologue): Add new interrupt handling. > (arc_return_address_register): Make it static, move it forward. > (arc_expand_epilogue): Add new interrupt handling. > (arc_get_unalign): Delete. > (arc_epilogue_uses): Make sure we do not remove the extra > saved/restored registers when interrupt. > (arc_can_use_return_insn): New function. > (push_reg): Likewise. > (pop_reg): Likewise. > (arc_save_callee_saves): Add ZOL and FPX aux registers saving > procedures. > (arc_restore_callee_saves): Likewise, but restoring. > * config/arc/arc.md (VUNSPEC_ARC_ARC600_RTIE): Define. > (R33_REG): Likewise. > (R34_REG): Likewise. > (R35_REG): Likewise. > (R36_REG): Likewise. > (R37_REG): Likewise. > (R38_REG): Likewise. > (R39_REG): Likewise. > (R45_REG): Likewise. > (R46_REG): Likewise. > (R47_REG): Likewise. > (R48_REG): Likewise. > (R49_REG): Likewise. > (R50_REG): Likewise. > (R51_REG): Likewise. > (R52_REG): Likewise. > (R53_REG): Likewise. > (R54_REG): Likewise. > (R55_REG): Likewise. > (R56_REG): Likewise. > (R58_REG): Likewise. > (type): Add rtie attribute. > (in_call_delay_slot): Use RETURN_ADDR_REGNUM. > (movsi_insn): Accept moves to lp_count. > (rtie): Update pattern. > (simple_return): Simplify it, don't use this pattern as a return > from an interrupt. > (arc600_rtie): New pattern. > (p_return_i): Clean up. > (return): Likewise. > * config/arc/builtins.def (rtie): Only available for non ARC6xx > family CPUs. > * config/arc/predicates.md (move_src_operand): Consider lp_count > as a register. > > gcc/testsuite > -xx-xx Claudiu Zissulescu > > * gcc.target/arc/arc.exp (check_effective_target_accregs): New > predicate. > * gcc.target/arc/builtin_special.c: Update test/ > * gcc.target/arc/interrupt-1.c: Likewise. > * gcc.target/arc/interrupt-10.c: New test. > * gcc.target/arc/interrupt-11.c: Likewise. > * gcc.target/arc/interrupt-12.c: Likewise. OK Jeff
Re: [PATCH 1/2] [ARC] Fix and refurbish the interrupts.
Hi Jeff, Please find attached the updated patch. What is new: - mailing list feedback is taken into account. - some comments are updated. - a new test is added. - the ARC AUX registers used by ZOL (hardware loop) and FPX (a custom floating point implementation) are saved before fp-register. - the millicode optimization is not used by ISR. Thank you, Claudiu From d22368681b7aab4bef4b5c32a9a472808f2c16cd Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu Date: Fri, 17 May 2019 14:48:17 +0300 Subject: [PATCH] [ARC] Fix and refurbish the interrupts. When entering an interrupt, not only the call save registers needs to be place on stack but also the call clobbers one. More over, the ARC700 return from interrupt instruction needs to be rtie, the same like ARCv2 CPUs. While the ARC6xx family uses j.f [ilinkX] instruction. Additionally, we need to save the state of the ZOL machinery, namely the lp_count, lp_end and lp_start registers. For architectures which are using extension registers (i.e., HS48) we need to save/restore them as well. gcc/ -xx-xx Claudiu Zissulescu * config/arc/arc-protos.h (arc_output_function_epilogue): Delete declaration. (arc_compute_frame_size): Millicode is disabled when compiling ISR. (arc_return_address_register): Likewise. (arc_compute_function_type): Likewise. (arc_compute_frame_size): Likewise. (secondary_reload_info): Likewise. (arc_get_unalign): Likewise. (arc_can_use_return_insn): Declare. * config/arc/arc.c (AUX_LP_START): Define (AUX_LP_END): Likewise. (arc_frame_info): Update gmask member to 64-bit datum. (GMASK_LEN): Update. (arc_compute_function_type): Make it static, move it forward. (arc_must_save_register): Update, consider the extra regs. (arc_compute_millicode_save_restore_regs): Update to use the 64 bit gmask. (arc_compute_frame_size): Likewise. (arc_enter_leave_p): Likewise. (arc_save_callee_saves): Likewise. (arc_restore_callee_saves): Likewise. (arc_save_callee_enter): Likewise. (arc_restore_callee_leave): Likewise. (arc_save_callee_milli): Likewise. (arc_restore_callee_milli): Likewise. (arc_expand_prologue): Add new interrupt handling. (arc_return_address_register): Make it static, move it forward. (arc_expand_epilogue): Add new interrupt handling. (arc_get_unalign): Delete. (arc_epilogue_uses): Make sure we do not remove the extra saved/restored registers when interrupt. (arc_can_use_return_insn): New function. (push_reg): Likewise. (pop_reg): Likewise. (arc_save_callee_saves): Add ZOL and FPX aux registers saving procedures. (arc_restore_callee_saves): Likewise, but restoring. * config/arc/arc.md (VUNSPEC_ARC_ARC600_RTIE): Define. (R33_REG): Likewise. (R34_REG): Likewise. (R35_REG): Likewise. (R36_REG): Likewise. (R37_REG): Likewise. (R38_REG): Likewise. (R39_REG): Likewise. (R45_REG): Likewise. (R46_REG): Likewise. (R47_REG): Likewise. (R48_REG): Likewise. (R49_REG): Likewise. (R50_REG): Likewise. (R51_REG): Likewise. (R52_REG): Likewise. (R53_REG): Likewise. (R54_REG): Likewise. (R55_REG): Likewise. (R56_REG): Likewise. (R58_REG): Likewise. (type): Add rtie attribute. (in_call_delay_slot): Use RETURN_ADDR_REGNUM. (movsi_insn): Accept moves to lp_count. (rtie): Update pattern. (simple_return): Simplify it, don't use this pattern as a return from an interrupt. (arc600_rtie): New pattern. (p_return_i): Clean up. (return): Likewise. * config/arc/builtins.def (rtie): Only available for non ARC6xx family CPUs. * config/arc/predicates.md (move_src_operand): Consider lp_count as a register. gcc/testsuite -xx-xx Claudiu Zissulescu * gcc.target/arc/arc.exp (check_effective_target_accregs): New predicate. * gcc.target/arc/builtin_special.c: Update test/ * gcc.target/arc/interrupt-1.c: Likewise. * gcc.target/arc/interrupt-10.c: New test. * gcc.target/arc/interrupt-11.c: Likewise. * gcc.target/arc/interrupt-12.c: Likewise. --- gcc/config/arc/arc-protos.h | 7 +- gcc/config/arc/arc.c | 741 +++--- gcc/config/arc/arc.md | 139 ++-- gcc/config/arc/builtins.def | 2 +- gcc/config/arc/predicates.md | 2 + gcc/testsuite/gcc.target/arc/arc.exp | 18 + .../gcc.target/arc/builtin_special.c | 2 + gcc/testsuite/gcc.target/arc/interrupt-1.c| 4 +- gcc/testsuite/gcc.target/arc/interrupt-10.c | 36 + gcc/testsuite/gcc.target/arc/interrupt-11.c | 16 + gcc/testsuite/gcc.target/arc/interrupt-12.c | 16 + 11 files changed, 628 insertions(+), 355 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arc/interrupt-10.c create mode 100644 gcc/testsuite/gcc.target/arc/interrupt-11.c create mode 100644 gcc/testsuite/gcc.target/arc/interrupt-12.c diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h index f501bc30ee7..0c9f422827d 100644 --- a/gcc/config/arc/arc-protos.h +++ b/gcc/config/arc/arc-protos.h @@ -25,7 +25,6
Re: [PATCH 1/2] [ARC] Fix and refurbish the interrupts.
On 7/8/19 2:35 AM, Claudiu Zissulescu wrote: > Hi Jeff, > > Originally, I had the scheduler barrier as you suggested. However, > there were some user cases when an ISR messed up with SP register > leading to errors. As a solution was to add barriers on either part of > frame operations. However, I would need to recheck the original > rationale of that issue, as it may not be the case with newer cores. For the prologue ISTM that the only issue would be if you had a store via the frame pointer that moved to a point before allocating the stack. I don't think we've ever seen that in practice though. In the epilogue, the case we've seen several times is we have register restores via the frame pointer move to a point before deallocating the stack. In both cases there'd be live data that would be out of the bounds of the current stack pointer. THus if an interrupt occurred the handler could stomp on that data. > > On the other hand, I found a small error of the current patch when one > is having the fno-omit-frame-pointer option in the order how some > auxiliary registers are saved. What will be the best solution having > in mind that I haven't pushed this patch to the mainline yet: > - to have the current patch re-spin? > - to have a separate patch for the new issue. Your decision. Jeff
Re: [PATCH 1/2] [ARC] Fix and refurbish the interrupts.
Hi Jeff, Originally, I had the scheduler barrier as you suggested. However, there were some user cases when an ISR messed up with SP register leading to errors. As a solution was to add barriers on either part of frame operations. However, I would need to recheck the original rationale of that issue, as it may not be the case with newer cores. On the other hand, I found a small error of the current patch when one is having the fno-omit-frame-pointer option in the order how some auxiliary registers are saved. What will be the best solution having in mind that I haven't pushed this patch to the mainline yet: - to have the current patch re-spin? - to have a separate patch for the new issue. Thanks, Claudiu On Wed, Jul 3, 2019 at 2:15 AM Jeff Law wrote: > > On 6/28/19 7:39 AM, Claudiu Zissulescu wrote: > > When entering an interrupt, not only the call save registers needs to > > be place on stack but also the call clobbers one. More over, the > > ARC700 return from interrupt instruction needs to be rtie, the same > > like ARCv2 CPUs. While the ARC6xx family uses j.f [ilinkX] > > instruction. Additionally, we need to save the state of the ZOL > > machinery, namely the lp_count, lp_end and lp_start registers. For > > architectures which are using extension registers (i.e., HS48) we need > > to save/restore them as well. > > > > Ok to apply? > > Claudiu > > > > gcc/ > > -xx-xx Claudiu Zissulescu > > > > * config/arc/arc-protos.h (arc_output_function_epilogue): Delete > > declaration. > > (arc_return_address_register): Likewise. > > (arc_compute_function_type): Likewise. > > (arc_compute_frame_size): Likewise. > > (secondary_reload_info): Likewise. > > (arc_get_unalign): Likewise. > > (arc_can_use_return_insn): Declare. > > * config/arc/arc.c (AUX_LP_START): Define > > (AUX_LP_END): Likewise. > > (arc_frame_info): Update gmask member to 64-bit datum. > > (GMASK_LEN): Update. > > (arc_compute_function_type): Make it static, move it forward. > > (arc_must_save_register): Update, consider the extra regs. > > (arc_compute_millicode_save_restore_regs): Update to use the 64 > > bit gmask. > > (arc_compute_frame_size): Likewise. > > (arc_enter_leave_p): Likewise. > > (arc_save_callee_saves): Likewise. > > (arc_restore_callee_saves): Likewise. > > (arc_save_callee_enter): Likewise. > > (arc_restore_callee_leave): Likewise. > > (arc_save_callee_milli): Likewise. > > (arc_restore_callee_milli): Likewise. > > (arc_expand_prologue): Add new interrupt handling. > > (arc_return_address_register): Make it static, move it forward. > > (arc_expand_epilogue): Add new interrupt handling. > > (arc_get_unalign): Delete. > > (arc_epilogue_uses): Make sure we do not remove the extra > > saved/restored registers when interrupt. > > (arc_can_use_return_insn): New function. > > * config/arc/arc.md (VUNSPEC_ARC_ARC600_RTIE): Define. > > (R33_REG): Likewise. > > (R34_REG): Likewise. > > (R35_REG): Likewise. > > (R36_REG): Likewise. > > (R37_REG): Likewise. > > (R38_REG): Likewise. > > (R39_REG): Likewise. > > (R45_REG): Likewise. > > (R46_REG): Likewise. > > (R47_REG): Likewise. > > (R48_REG): Likewise. > > (R49_REG): Likewise. > > (R50_REG): Likewise. > > (R51_REG): Likewise. > > (R52_REG): Likewise. > > (R53_REG): Likewise. > > (R54_REG): Likewise. > > (R55_REG): Likewise. > > (R56_REG): Likewise. > > (R58_REG): Likewise. > > (type): Add rtie attribute. > > (in_call_delay_slot): Use RETURN_ADDR_REGNUM. > > (movsi_insn): Accept moves to lp_count. > > (rtie): Update pattern. > > (simple_return): Simplify it, don't use this pattern as a return > > from an interrupt. > > (arc600_rtie): New pattern. > > (p_return_i): Clean up. > > (return): Likewise. > > * config/arc/builtins.def (rtie): Only available for non ARC6xx > > family CPUs. > > * config/arc/predicates.md (move_src_operand): Consider lp_count > > as a register. > > > > gcc/testsuite > > -xx-xx Claudiu Zissulescu > > > > * gcc.target/arc/arc.exp (check_effective_target_accregs): New > > predicate. > > * gcc.target/arc/builtin_special.c: Update test/ > > * gcc.target/arc/interrupt-1.c: Likewise. > > * gcc.target/arc/interrupt-10.c: New test. > > * gcc.target/arc/interrupt-11.c: Likewise. > > --- > > diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c > > index 4fec8fd8929..910c8d2ad30 100644 > > --- a/gcc/config/arc/arc.c > > +++ b/gcc/config/arc/arc.c > > @@ -206,6 +206,13 @@ static int rgf_banked_register_count; > > this to be no less than the 1/p */ > > #define MAX_INSNS_SKIPPED 3 > > > > +/* ZOL control registers. */ > > +#define AUX_L
Re: [PATCH 1/2] [ARC] Fix and refurbish the interrupts.
On 6/28/19 7:39 AM, Claudiu Zissulescu wrote: > When entering an interrupt, not only the call save registers needs to > be place on stack but also the call clobbers one. More over, the > ARC700 return from interrupt instruction needs to be rtie, the same > like ARCv2 CPUs. While the ARC6xx family uses j.f [ilinkX] > instruction. Additionally, we need to save the state of the ZOL > machinery, namely the lp_count, lp_end and lp_start registers. For > architectures which are using extension registers (i.e., HS48) we need > to save/restore them as well. > > Ok to apply? > Claudiu > > gcc/ > -xx-xx Claudiu Zissulescu > > * config/arc/arc-protos.h (arc_output_function_epilogue): Delete > declaration. > (arc_return_address_register): Likewise. > (arc_compute_function_type): Likewise. > (arc_compute_frame_size): Likewise. > (secondary_reload_info): Likewise. > (arc_get_unalign): Likewise. > (arc_can_use_return_insn): Declare. > * config/arc/arc.c (AUX_LP_START): Define > (AUX_LP_END): Likewise. > (arc_frame_info): Update gmask member to 64-bit datum. > (GMASK_LEN): Update. > (arc_compute_function_type): Make it static, move it forward. > (arc_must_save_register): Update, consider the extra regs. > (arc_compute_millicode_save_restore_regs): Update to use the 64 > bit gmask. > (arc_compute_frame_size): Likewise. > (arc_enter_leave_p): Likewise. > (arc_save_callee_saves): Likewise. > (arc_restore_callee_saves): Likewise. > (arc_save_callee_enter): Likewise. > (arc_restore_callee_leave): Likewise. > (arc_save_callee_milli): Likewise. > (arc_restore_callee_milli): Likewise. > (arc_expand_prologue): Add new interrupt handling. > (arc_return_address_register): Make it static, move it forward. > (arc_expand_epilogue): Add new interrupt handling. > (arc_get_unalign): Delete. > (arc_epilogue_uses): Make sure we do not remove the extra > saved/restored registers when interrupt. > (arc_can_use_return_insn): New function. > * config/arc/arc.md (VUNSPEC_ARC_ARC600_RTIE): Define. > (R33_REG): Likewise. > (R34_REG): Likewise. > (R35_REG): Likewise. > (R36_REG): Likewise. > (R37_REG): Likewise. > (R38_REG): Likewise. > (R39_REG): Likewise. > (R45_REG): Likewise. > (R46_REG): Likewise. > (R47_REG): Likewise. > (R48_REG): Likewise. > (R49_REG): Likewise. > (R50_REG): Likewise. > (R51_REG): Likewise. > (R52_REG): Likewise. > (R53_REG): Likewise. > (R54_REG): Likewise. > (R55_REG): Likewise. > (R56_REG): Likewise. > (R58_REG): Likewise. > (type): Add rtie attribute. > (in_call_delay_slot): Use RETURN_ADDR_REGNUM. > (movsi_insn): Accept moves to lp_count. > (rtie): Update pattern. > (simple_return): Simplify it, don't use this pattern as a return > from an interrupt. > (arc600_rtie): New pattern. > (p_return_i): Clean up. > (return): Likewise. > * config/arc/builtins.def (rtie): Only available for non ARC6xx > family CPUs. > * config/arc/predicates.md (move_src_operand): Consider lp_count > as a register. > > gcc/testsuite > -xx-xx Claudiu Zissulescu > > * gcc.target/arc/arc.exp (check_effective_target_accregs): New > predicate. > * gcc.target/arc/builtin_special.c: Update test/ > * gcc.target/arc/interrupt-1.c: Likewise. > * gcc.target/arc/interrupt-10.c: New test. > * gcc.target/arc/interrupt-11.c: Likewise. > --- > diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c > index 4fec8fd8929..910c8d2ad30 100644 > --- a/gcc/config/arc/arc.c > +++ b/gcc/config/arc/arc.c > @@ -206,6 +206,13 @@ static int rgf_banked_register_count; > this to be no less than the 1/p */ > #define MAX_INSNS_SKIPPED 3 > > +/* ZOL control registers. */ > +#define AUX_LP_START 0x02 > +#define AUX_LP_END 0x03 > + > +/* FPX AUX registers. */ > +#define AUX_DPFP_START 0x301 > + > /* A nop is needed between a 4 byte insn that sets the condition codes and > a branch that uses them (the same isn't true for an 8 byte insn that sets > the condition codes). Set by arc_ccfsm_advance. Used by > @@ -298,6 +305,131 @@ static bool arc_use_by_pieces_infrastructure_p > (unsigned HOST_WIDE_INT, > /* Globally visible information about currently selected cpu. */ > const arc_cpu_t *arc_selected_cpu; > > +/* Traditionally, we push saved registers first in the prologue, > + then we allocate the rest of the frame - and reverse in the epilogue. > + This has still its merits for ease of debugging, or saving code size > + or even execution time if the stack frame is so large that some accesses > + can't be encoded anymore with offsets in the instruction code when using > + a different scheme. > + Also, it would
[PATCH 1/2] [ARC] Fix and refurbish the interrupts.
When entering an interrupt, not only the call save registers needs to be place on stack but also the call clobbers one. More over, the ARC700 return from interrupt instruction needs to be rtie, the same like ARCv2 CPUs. While the ARC6xx family uses j.f [ilinkX] instruction. Additionally, we need to save the state of the ZOL machinery, namely the lp_count, lp_end and lp_start registers. For architectures which are using extension registers (i.e., HS48) we need to save/restore them as well. Ok to apply? Claudiu gcc/ -xx-xx Claudiu Zissulescu * config/arc/arc-protos.h (arc_output_function_epilogue): Delete declaration. (arc_return_address_register): Likewise. (arc_compute_function_type): Likewise. (arc_compute_frame_size): Likewise. (secondary_reload_info): Likewise. (arc_get_unalign): Likewise. (arc_can_use_return_insn): Declare. * config/arc/arc.c (AUX_LP_START): Define (AUX_LP_END): Likewise. (arc_frame_info): Update gmask member to 64-bit datum. (GMASK_LEN): Update. (arc_compute_function_type): Make it static, move it forward. (arc_must_save_register): Update, consider the extra regs. (arc_compute_millicode_save_restore_regs): Update to use the 64 bit gmask. (arc_compute_frame_size): Likewise. (arc_enter_leave_p): Likewise. (arc_save_callee_saves): Likewise. (arc_restore_callee_saves): Likewise. (arc_save_callee_enter): Likewise. (arc_restore_callee_leave): Likewise. (arc_save_callee_milli): Likewise. (arc_restore_callee_milli): Likewise. (arc_expand_prologue): Add new interrupt handling. (arc_return_address_register): Make it static, move it forward. (arc_expand_epilogue): Add new interrupt handling. (arc_get_unalign): Delete. (arc_epilogue_uses): Make sure we do not remove the extra saved/restored registers when interrupt. (arc_can_use_return_insn): New function. * config/arc/arc.md (VUNSPEC_ARC_ARC600_RTIE): Define. (R33_REG): Likewise. (R34_REG): Likewise. (R35_REG): Likewise. (R36_REG): Likewise. (R37_REG): Likewise. (R38_REG): Likewise. (R39_REG): Likewise. (R45_REG): Likewise. (R46_REG): Likewise. (R47_REG): Likewise. (R48_REG): Likewise. (R49_REG): Likewise. (R50_REG): Likewise. (R51_REG): Likewise. (R52_REG): Likewise. (R53_REG): Likewise. (R54_REG): Likewise. (R55_REG): Likewise. (R56_REG): Likewise. (R58_REG): Likewise. (type): Add rtie attribute. (in_call_delay_slot): Use RETURN_ADDR_REGNUM. (movsi_insn): Accept moves to lp_count. (rtie): Update pattern. (simple_return): Simplify it, don't use this pattern as a return from an interrupt. (arc600_rtie): New pattern. (p_return_i): Clean up. (return): Likewise. * config/arc/builtins.def (rtie): Only available for non ARC6xx family CPUs. * config/arc/predicates.md (move_src_operand): Consider lp_count as a register. gcc/testsuite -xx-xx Claudiu Zissulescu * gcc.target/arc/arc.exp (check_effective_target_accregs): New predicate. * gcc.target/arc/builtin_special.c: Update test/ * gcc.target/arc/interrupt-1.c: Likewise. * gcc.target/arc/interrupt-10.c: New test. * gcc.target/arc/interrupt-11.c: Likewise. --- gcc/config/arc/arc-protos.h | 7 +- gcc/config/arc/arc.c | 700 +++--- gcc/config/arc/arc.md | 139 ++-- gcc/config/arc/builtins.def | 2 +- gcc/config/arc/predicates.md | 2 + gcc/testsuite/gcc.target/arc/arc.exp | 18 + .../gcc.target/arc/builtin_special.c | 2 + gcc/testsuite/gcc.target/arc/interrupt-1.c| 4 +- gcc/testsuite/gcc.target/arc/interrupt-10.c | 36 + gcc/testsuite/gcc.target/arc/interrupt-11.c | 16 + 10 files changed, 574 insertions(+), 352 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arc/interrupt-10.c create mode 100644 gcc/testsuite/gcc.target/arc/interrupt-11.c diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h index f501bc30ee7..0c9f422827d 100644 --- a/gcc/config/arc/arc-protos.h +++ b/gcc/config/arc/arc-protos.h @@ -25,7 +25,6 @@ extern machine_mode arc_select_cc_mode (enum rtx_code, rtx, rtx); extern struct rtx_def *gen_compare_reg (rtx, machine_mode); /* Declarations for various fns used in the .md file. */ -extern void arc_output_function_epilogue (FILE *, HOST_WIDE_INT, int); extern const char *output_shift (rtx *); extern bool compact_sda_memory_operand (rtx, machine_mode, bool); extern bool arc_double_limm_p (rtx); @@ -42,8 +41,6 @@ extern void arc_
