Re: [PATCH 2/2] Add leon3r0 and leon3r0v7 CPU targets
Thank you for the patch in your other mail that changes this! You're welcome. We were also thinking of the instruction timing information found in the leon_costs and leon3_costs. We took a look at the values in leon_costs and they seem to fit well with the UT699, except for division. We got a bit unsure as to what leon system they are based on, as the division cost was wrong also for the AT697F, which is the most common leon2 system. Would it be ok to update the division cost values of leon_costs so that they match UT699 and AT697F? Sure. In general, depending on how one instantiate a leon system and which FPU is selected, you will get different timing. Is there a recommended way of adding support for this without adding additional CPU targets? We are considering to add support for GRFPU-lite, which only differs in the timing. One could add a -mtune-fpu switch. Did you look at other architectures in the GCC tree that would have similar requirements? -- Eric Botcazou
Re: [PATCH 2/2] Add leon3r0 and leon3r0v7 CPU targets
One could add a -mtune-fpu switch. Did you look at other architectures in the GCC tree that would have similar requirements? Thank you for the suggestion about adding a -mtune-fpu switch. I have not yet looked at the other architectures, but will do so before proceeding. -- Daniel Cederman
Re: [PATCH 2/2] Add leon3r0 and leon3r0v7 CPU targets
On 2015-06-30 11:24, Eric Botcazou wrote: The UT699 is a leon3r0 system which does not support CASA. However, to enable the errata fixes for UT699 with -mfix-ut699 requires the CPU target to be leon3. -mfix-ut699 itself is independent of the processor and doesn't require leon3. The instruction timing also differs between leon and leon3 and they are represented by different targets in binutils. Yes, there is only one optimization trick for the scheduler that requires leon3, but it doesn't affect correctness. We could easily change that, i.e. enable the trick for leon too if -mfix-ut699 is passed. Thank you for the patch in your other mail that changes this! We were also thinking of the instruction timing information found in the leon_costs and leon3_costs. We took a look at the values in leon_costs and they seem to fit well with the UT699, except for division. We got a bit unsure as to what leon system they are based on, as the division cost was wrong also for the AT697F, which is the most common leon2 system. Would it be ok to update the division cost values of leon_costs so that they match UT699 and AT697F? In general, depending on how one instantiate a leon system and which FPU is selected, you will get different timing. Is there a recommended way of adding support for this without adding additional CPU targets? We are considering to add support for GRFPU-lite, which only differs in the timing. As for binutils, they don't even know about leon3, eveything is leon for them. Yes, that was a misunderstanding from my part. -- Daniel Cederman
Re: [PATCH 2/2] Add leon3r0 and leon3r0v7 CPU targets
The UT699 is a leon3r0 system which does not support CASA. However, to enable the errata fixes for UT699 with -mfix-ut699 requires the CPU target to be leon3. -mfix-ut699 itself is independent of the processor and doesn't require leon3. The instruction timing also differs between leon and leon3 and they are represented by different targets in binutils. Yes, there is only one optimization trick for the scheduler that requires leon3, but it doesn't affect correctness. We could easily change that, i.e. enable the trick for leon too if -mfix-ut699 is passed. As for binutils, they don't even know about leon3, eveything is leon for them. -- Eric Botcazou
Re: [PATCH 2/2] Add leon3r0 and leon3r0v7 CPU targets
Yes, there is only one optimization trick for the scheduler that requires leon3, but it doesn't affect correctness. We could easily change that, i.e. enable the trick for leon too if -mfix-ut699 is passed. Like this, applied on all branches. 2015-06-30 Eric Botcazou ebotca...@adacore.com * config/sparc/leon.md (leon_load): Enable for all LEON variants if -mfix-ut699 is not specified. (leon3_load): Rename into... (ut699_load): ...this. Enable for all LEON variants if -mfix-ut699 is specified. -- Eric BotcazouIndex: config/sparc/leon.md === --- config/sparc/leon.md (revision 225111) +++ config/sparc/leon.md (working copy) @@ -24,12 +24,14 @@ (define_automaton leon) (define_cpu_unit leon_memory leon) (define_insn_reservation leon_load 1 - (and (eq_attr cpu leon) (eq_attr type load,sload)) + (and (eq_attr cpu leon,leon3,leon3v7) + (and (eq_attr fix_ut699 false) (eq_attr type load,sload))) leon_memory) ;; Use a double reservation to work around the load pipeline hazard on UT699. -(define_insn_reservation leon3_load 1 - (and (eq_attr cpu leon3,leon3v7) (eq_attr type load,sload)) +(define_insn_reservation ut699_load 1 + (and (eq_attr cpu leon,leon3,leon3v7) + (and (eq_attr fix_ut699 true) (eq_attr type load,sload))) leon_memory*2) (define_insn_reservation leon_store 2
Re: [PATCH 2/2] Add leon3r0 and leon3r0v7 CPU targets
Early variants of LEON3, revision 0, do not support the CASA instruction. This patch adds two new targets, leon3r0 and leon3r0v7, that are equivalent to leon3 and leon3v7, except that they do not support CASA. Why not use leon instead of leon3 for them? -- Eric Botcazou
Re: [PATCH 2/2] Add leon3r0 and leon3r0v7 CPU targets
On 2015-06-26 09:45, Eric Botcazou wrote: Early variants of LEON3, revision 0, do not support the CASA instruction. This patch adds two new targets, leon3r0 and leon3r0v7, that are equivalent to leon3 and leon3v7, except that they do not support CASA. Why not use leon instead of leon3 for them? The UT699 is a leon3r0 system which does not support CASA. However, to enable the errata fixes for UT699 with -mfix-ut699 requires the CPU target to be leon3. This causes the CASA instruction to be generated for UT699. The instruction timing also differs between leon and leon3 and they are represented by different targets in binutils. -- Daniel Cederman
[PATCH 2/2] Add leon3r0 and leon3r0v7 CPU targets
Early variants of LEON3, revision 0, do not support the CASA instruction.
This patch adds two new targets, leon3r0 and leon3r0v7, that are equivalent
to leon3 and leon3v7, except that they do not support CASA.
gcc/ChangeLog:
2015-06-22 Daniel Cederman ceder...@gaisler.com
* config.gcc: Add leon3r0[v7] targets
* config/sparc/leon.md: Add leon3r0[v7] to FPU timing
* config/sparc/sparc-opts.h (enum processor_type): Add leon3r0[v7]
targets
* config/sparc/sparc.c (sparc_option_override): Add leon3r0[v7] as
targets
without CASA support
* config/sparc/sparc.h: Add leon3r0[v7] targets
* config/sparc/sparc.md: Add leon3r0[v7] targets
* config/sparc/sparc.opt: Add leon3r0[v7] targets
* doc/invoke.texi: Add leon3r0[v7] targets
---
gcc/config.gcc| 6 ++
gcc/config/sparc/leon.md | 14 +++---
gcc/config/sparc/sparc-opts.h | 2 ++
gcc/config/sparc/sparc.c | 4
gcc/config/sparc/sparc.h | 44 ---
gcc/config/sparc/sparc.md | 2 ++
gcc/config/sparc/sparc.opt| 6 ++
gcc/doc/invoke.texi | 22 +++---
8 files changed, 59 insertions(+), 41 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 805638d..b10a1c9 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -3322,10 +3322,7 @@ if test x$with_cpu = x ; then
with_cpu=leon
;;
*-leon[3-9]*)
- with_cpu=leon3
- ;;
- *-leon[3-9]v7*)
- with_cpu=leon3v7
+ with_cpu=`echo ${target} | sed 's/.*-\(leon[a-z0-9]*\).*$/\1/'`
;;
*)
with_cpu=`echo ${target} | sed 's/-.*$//'`
@@ -4198,6 +4195,7 @@ case ${target} in
| sparc | sparcv9 | sparc64 \
| v7 | cypress \
| v8 | supersparc | hypersparc | leon | leon3 | leon3v7
\
+ | leon3r0 | leon3r0v7 \
| sparclite | f930 | f934 | sparclite86x \
| sparclet | tsc701 \
| v9 | ultrasparc | ultrasparc3 | niagara | niagara2 \
diff --git a/gcc/config/sparc/leon.md b/gcc/config/sparc/leon.md
index aca92fc..3441a74 100644
--- a/gcc/config/sparc/leon.md
+++ b/gcc/config/sparc/leon.md
@@ -29,11 +29,11 @@
;; Use a double reservation to work around the load pipeline hazard on UT699.
(define_insn_reservation leon3_load 1
- (and (eq_attr cpu leon3,leon3v7) (eq_attr type load,sload))
+ (and (eq_attr cpu leon3,leon3v7,leon3r0,leon3r0v7) (eq_attr type
load,sload))
leon_memory*2)
(define_insn_reservation leon_store 2
- (and (eq_attr cpu leon,leon3,leon3v7) (eq_attr type store))
+ (and (eq_attr cpu leon,leon3,leon3v7,leon3r0,leon3r0v7) (eq_attr type
store))
leon_memory*2)
;; This describes Gaisler Research's FPU
@@ -44,21 +44,21 @@
(define_cpu_unit grfpu_ds grfpu)
(define_insn_reservation leon_fp_alu 4
- (and (eq_attr cpu leon,leon3,leon3v7) (eq_attr type fp,fpcmp,fpmul))
+ (and (eq_attr cpu leon,leon3,leon3v7,leon3r0,leon3r0v7) (eq_attr type
fp,fpcmp,fpmul))
grfpu_alu, nothing*3)
(define_insn_reservation leon_fp_divs 16
- (and (eq_attr cpu leon,leon3,leon3v7) (eq_attr type fpdivs))
+ (and (eq_attr cpu leon,leon3,leon3v7,leon3r0,leon3r0v7) (eq_attr type
fpdivs))
grfpu_ds*14, nothing*2)
(define_insn_reservation leon_fp_divd 17
- (and (eq_attr cpu leon,leon3,leon3v7) (eq_attr type fpdivd))
+ (and (eq_attr cpu leon,leon3,leon3v7,leon3r0,leon3r0v7) (eq_attr type
fpdivd))
grfpu_ds*15, nothing*2)
(define_insn_reservation leon_fp_sqrts 24
- (and (eq_attr cpu leon,leon3,leon3v7) (eq_attr type fpsqrts))
+ (and (eq_attr cpu leon,leon3,leon3v7,leon3r0,leon3r0v7) (eq_attr type
fpsqrts))
grfpu_ds*22, nothing*2)
(define_insn_reservation leon_fp_sqrtd 25
- (and (eq_attr cpu leon,leon3,leon3v7) (eq_attr type fpsqrtd))
+ (and (eq_attr cpu leon,leon3,leon3v7,leon3r0,leon3r0v7) (eq_attr type
fpsqrtd))
grfpu_ds*23, nothing*2)
diff --git a/gcc/config/sparc/sparc-opts.h b/gcc/config/sparc/sparc-opts.h
index 7679d0d..24a2b64 100644
--- a/gcc/config/sparc/sparc-opts.h
+++ b/gcc/config/sparc/sparc-opts.h
@@ -30,6 +30,8 @@ enum processor_type {
PROCESSOR_SUPERSPARC,
PROCESSOR_HYPERSPARC,
PROCESSOR_LEON,
+ PROCESSOR_LEON3R0,
+ PROCESSOR_LEON3R0V7,
PROCESSOR_LEON3,
PROCESSOR_LEON3V7,
PROCESSOR_SPARCLITE,
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 205e3cb..862e88d 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1280,6 +1280,8 @@ sparc_option_override (void)
{ supersparc,MASK_ISA, MASK_V8 },
{ hypersparc,MASK_ISA, MASK_V8|MASK_FPU },
{ leon, MASK_ISA, MASK_V8|MASK_LEON|MASK_FPU },
+{ leon3r0, MASK_ISA, MASK_V8|MASK_LEON3|MASK_FPU },
+{ leon3r0v7, MASK_ISA, MASK_LEON3|MASK_FPU },
{ leon3, MASK_ISA,
