Re: [PATCH 2/2 ver 5] rs6000, fix vec_replace_unaligned built-in arguments
Hi Carl, on 2023/7/22 07:38, Carl Love wrote: > GCC maintainers: > > Version 5, Fixed patch description, the first argument should be of > type vector. Fixed comment in vsx.md to say "Vector and scalar > extract_elt iterator/attr ". Removed a few of the changes in > version 4. Specifically, reverted the names of REPLACE_ELT_V_sh back > to REPLACE_ELT_sh and REPLACE_ELT_V_max back to REPLACE_ELT_V_max. > Combined the REPLACE_ELT_char and REPLACE_ELT_V_char mode attributes > into REPLACE_ELT_char. Put the "dg-do link" directive back into the > vec-replace-word-runnable_1.c test file. The patch was tested with the > updated patch 1 in the series on Power 8 LE/BE, Power 9 LE/BE and Power > 10 with no regressions. > snip... > > rs6000, fix vec_replace_unaligned built-in arguments > > The first argument of the vec_replace_unaligned built-in should always be > of type vector unsigned char, as specified in gcc/doc/extend.texi. > > This patch fixes the builtin definitions and updates the test cases to use > the correct arguments. The original test file is renamed and a second test > file is added for a new test case. > > gcc/ChangeLog: > * config/rs6000/rs6000-builtins.def: Rename > __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi > __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi > __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df > __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di > __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf > __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si. > Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as > VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF, > VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as > VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI. > Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as > vreplace_un_si, vreplace_un_v2df as vreplace_un_df, > vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as > vreplace_un_sf, vreplace_un_v4si as vreplace_un_si. > * config/rs6000/rs6000-c.cc (find_instance): Add case > RS6000_OVLD_VEC_REPLACE_UN. > * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un): > Fix first argument type. Rename VREPLACE_UN_UV4SI as > VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI, > VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as > VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF, > VREPLACE_UN_V2DF as VREPLACE_UN_DF. > * config/rs6000/vsx.md (REPLACE_ELT): Renamed the mode_iterator Nit: s/Renamed/Rename/ > REPLACE_ELT_V for vector modes. > (REPLACE_ELT): New scalar mode iterator. > (REPLACE_ELT_char): Add scalar attributes. > (vreplace_un_): Change iterator and mode attribute. > > gcc/testsuite/ChangeLog: > * gcc.target/powerpc/vec-replace-word-runnable.c: Renamed > vec-replace-word-runnable_1.c. Ditto. > * gcc.target/powerpc/vec-replace-word-runnable_1.c > (dg-options): add -flax-vector-conversions. > (vec_replace_unaligned) Fix first argument type. > (vresult_uchar): Fix expected results. > (vec_replace_unaligned): Update for loop to check uchar results. > Remove extra spaces in if statements. Insert missing spaces in > for statements. > * gcc.target/powerpc/vec-replace-word-runnable_2.c: New test file. > --- [snip...] > > [VEC_REVB, vec_revb, __builtin_vec_revb] >vss __builtin_vec_revb (vss); > diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md > index 0c269e4e8d9..7a4cf492ea5 100644 > --- a/gcc/config/rs6000/vsx.md > +++ b/gcc/config/rs6000/vsx.md > @@ -380,10 +380,13 @@ (define_int_attr xvcvbf16 [(UNSPEC_VSX_XVCVSPBF16 > "xvcvspbf16") > ;; Like VI, defined in vector.md, but add ISA 2.07 integer vector ops > (define_mode_iterator VI2 [V4SI V8HI V16QI V2DI]) > > -;; Vector extract_elt iterator/attr for 32-bit and 64-bit elements > -(define_mode_iterator REPLACE_ELT [V4SI V4SF V2DI V2DF]) > +;; Vector and scalar extract_elt iterator/attr for 32-bit and 64-bit elements Nit: Since you touched this comment line, extract_elt is wrong before. Maybe s/extract_elt/vector replace/? > +(define_mode_iterator REPLACE_ELT_V [V4SI V4SF V2DI V2DF]) > +(define_mode_iterator REPLACE_ELT [SI SF DI DF]) > (define_mode_attr REPLACE_ELT_char [(V4SI "w") (V4SF "w") > - (V2DI "d") (V2DF "d")]) > + (V2DI "d") (V2DF "d") > + (SI "w") (SF "w") > + (DI "d") (DF "d")]) > (define_mode_attr REPLACE_ELT_sh [(V4SI "2") (V4SF "2") > (V2DI "3") (V2DF "3")]) > (define_mode_attr REPLACE_ELT_max [(V4SI "12") (
Re: [PATCH 2/2 ver 5] rs6000, fix vec_replace_unaligned built-in arguments
GCC maintainers: Version 5, Fixed patch description, the first argument should be of type vector. Fixed comment in vsx.md to say "Vector and scalar extract_elt iterator/attr ". Removed a few of the changes in version 4. Specifically, reverted the names of REPLACE_ELT_V_sh back to REPLACE_ELT_sh and REPLACE_ELT_V_max back to REPLACE_ELT_V_max. Combined the REPLACE_ELT_char and REPLACE_ELT_V_char mode attributes into REPLACE_ELT_char. Put the "dg-do link" directive back into the vec-replace-word-runnable_1.c test file. The patch was tested with the updated patch 1 in the series on Power 8 LE/BE, Power 9 LE/BE and Power 10 with no regressions. Version 4, changed the new RS6000_OVLD_VEC_REPLACE_UN case statement rs6000/rs6000-c.cc. The existing REPLACE_ELT iterator name was changed to REPLACE_ELT_V along with the associated define_mode_attr. Renamed VEC_RU to REPLACE_ELT for the iterator name and VEC_RU_char to REPLACE_ELT_char. Fixed the double test in vec-replace-word- runnable_1.c to be consistent with the other tests. Removed the "dg- do link" from both tests. Put in an explicit cast in test vec-replace- word-runnable_2.c to eliminate the need for the -flax-vector- conversions dg-option. Version 3, added code to altivec_resolve_overloaded_builtin so the correct instruction is selected for the size of the second argument. This restores the instruction counts to the original values where the correct instructions were originally being generated. The naming of the overloaded builtin instances and builtin definitions were changed to reflect the type of the second argument since the type of the first argument is now the same for all overloaded instances. A new builtin test file was added for the case where the first argument is cast to the unsigned long long type. This test requires the -flax-vector- conversions gcc command line option. Since the other tests do not require this option, I felt that the new test needed to be in a separate file. Finally some formatting fixes were made in the original test file. Patch has been retested on Power 10 with no regressions. Version 2, fixed various typos. Updated the change log body to say the instruction counts were updated. The instruction counts changed as a result of changing the first argument of the vec_replace_unaligned builtin call from vector unsigned long long (vull) to vector unsigned char (vuc). When the first argument was vull the builtin call generated the vinsd instruction for the two test cases. The updated call with vuc as the first argument generates two vinsw instructions instead. Patch was retested on Power 10 with no regressions. The following patch fixes the first argument in the builtin definition and the corresponding test cases. Initially, the builtin specification was wrong due to a cut and past error. The documentation was fixed in: commit ed3fea09b18f67e757b5768b42cb6e816626f1db Author: Bill Schmidt Date: Fri Feb 4 13:07:17 2022 -0600 rs6000: Correct function prototypes for vec_replace_unaligned Due to a pasto error in the documentation, vec_replace_unaligned was implemented with the same function prototypes as vec_replace_elt. It was intended that vec_replace_unaligned always specify output vectors as having type vector unsigned char, to emphasize that elements are potentially misaligned by this built-in function. This patch corrects the misimplementation. This patch fixes the arguments in the definitions and updates the testcases accordingly. Additionally, a few minor spacing issues are fixed. The patch has been tested on Power 10 with no regressions. Please let me know if the patch is acceptable for mainline. Thanks. Carl rs6000, fix vec_replace_unaligned built-in arguments The first argument of the vec_replace_unaligned built-in should always be of type vector unsigned char, as specified in gcc/doc/extend.texi. This patch fixes the builtin definitions and updates the test cases to use the correct arguments. The original test file is renamed and a second test file is added for a new test case. gcc/ChangeLog: * config/rs6000/rs6000-builtins.def: Rename __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si. Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF, VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF, VREPLACE_UN_V4SI a
